]>
Commit | Line | Data |
---|---|---|
89a36810 AR |
1 | /* |
2 | * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters | |
3 | * | |
729c8456 AR |
4 | * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com> |
5 | * PMC-Sierra Inc | |
89a36810 AR |
6 | * |
7 | * Copyright (C) 2008, 2009 PMC Sierra Inc | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, | |
22 | * USA | |
23 | * | |
24 | */ | |
25 | #include <linux/fs.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/types.h> | |
28 | #include <linux/errno.h> | |
29 | #include <linux/kernel.h> | |
30 | #include <linux/ioport.h> | |
31 | #include <linux/delay.h> | |
32 | #include <linux/pci.h> | |
33 | #include <linux/wait.h> | |
34 | #include <linux/spinlock.h> | |
35 | #include <linux/sched.h> | |
36 | #include <linux/interrupt.h> | |
37 | #include <linux/blkdev.h> | |
38 | #include <linux/firmware.h> | |
39 | #include <linux/module.h> | |
40 | #include <linux/moduleparam.h> | |
41 | #include <linux/hdreg.h> | |
42 | #include <linux/version.h> | |
43 | #include <linux/io.h> | |
5a0e3ad6 | 44 | #include <linux/slab.h> |
89a36810 AR |
45 | #include <asm/irq.h> |
46 | #include <asm/processor.h> | |
47 | #include <linux/libata.h> | |
48 | #include <linux/mutex.h> | |
49 | #include <scsi/scsi.h> | |
50 | #include <scsi/scsi_host.h> | |
34876402 | 51 | #include <scsi/scsi_device.h> |
89a36810 AR |
52 | #include <scsi/scsi_tcq.h> |
53 | #include <scsi/scsi_eh.h> | |
54 | #include <scsi/scsi_cmnd.h> | |
55 | #include <scsi/scsicam.h> | |
56 | ||
57 | #include "pmcraid.h" | |
58 | ||
59 | /* | |
60 | * Module configuration parameters | |
61 | */ | |
62 | static unsigned int pmcraid_debug_log; | |
63 | static unsigned int pmcraid_disable_aen; | |
64 | static unsigned int pmcraid_log_level = IOASC_LOG_LEVEL_MUST; | |
5da61410 | 65 | static unsigned int pmcraid_enable_msix; |
89a36810 AR |
66 | |
67 | /* | |
68 | * Data structures to support multiple adapters by the LLD. | |
69 | * pmcraid_adapter_count - count of configured adapters | |
70 | */ | |
71 | static atomic_t pmcraid_adapter_count = ATOMIC_INIT(0); | |
72 | ||
73 | /* | |
74 | * Supporting user-level control interface through IOCTL commands. | |
75 | * pmcraid_major - major number to use | |
76 | * pmcraid_minor - minor number(s) to use | |
77 | */ | |
78 | static unsigned int pmcraid_major; | |
79 | static struct class *pmcraid_class; | |
80 | DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS); | |
81 | ||
82 | /* | |
83 | * Module parameters | |
84 | */ | |
729c8456 | 85 | MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>"); |
89a36810 AR |
86 | MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver"); |
87 | MODULE_LICENSE("GPL"); | |
88 | MODULE_VERSION(PMCRAID_DRIVER_VERSION); | |
89 | ||
90 | module_param_named(log_level, pmcraid_log_level, uint, (S_IRUGO | S_IWUSR)); | |
91 | MODULE_PARM_DESC(log_level, | |
92 | "Enables firmware error code logging, default :1 high-severity" | |
93 | " errors, 2: all errors including high-severity errors," | |
94 | " 0: disables logging"); | |
95 | ||
96 | module_param_named(debug, pmcraid_debug_log, uint, (S_IRUGO | S_IWUSR)); | |
97 | MODULE_PARM_DESC(debug, | |
98 | "Enable driver verbose message logging. Set 1 to enable." | |
99 | "(default: 0)"); | |
100 | ||
101 | module_param_named(disable_aen, pmcraid_disable_aen, uint, (S_IRUGO | S_IWUSR)); | |
102 | MODULE_PARM_DESC(disable_aen, | |
103 | "Disable driver aen notifications to apps. Set 1 to disable." | |
104 | "(default: 0)"); | |
105 | ||
106 | /* chip specific constants for PMC MaxRAID controllers (same for | |
107 | * 0x5220 and 0x8010 | |
108 | */ | |
109 | static struct pmcraid_chip_details pmcraid_chip_cfg[] = { | |
110 | { | |
111 | .ioastatus = 0x0, | |
112 | .ioarrin = 0x00040, | |
113 | .mailbox = 0x7FC30, | |
114 | .global_intr_mask = 0x00034, | |
115 | .ioa_host_intr = 0x0009C, | |
116 | .ioa_host_intr_clr = 0x000A0, | |
c20c4267 | 117 | .ioa_host_msix_intr = 0x7FC40, |
89a36810 AR |
118 | .ioa_host_mask = 0x7FC28, |
119 | .ioa_host_mask_clr = 0x7FC28, | |
120 | .host_ioa_intr = 0x00020, | |
121 | .host_ioa_intr_clr = 0x00020, | |
122 | .transop_timeout = 300 | |
123 | } | |
124 | }; | |
125 | ||
126 | /* | |
127 | * PCI device ids supported by pmcraid driver | |
128 | */ | |
129 | static struct pci_device_id pmcraid_pci_table[] __devinitdata = { | |
130 | { PCI_DEVICE(PCI_VENDOR_ID_PMC, PCI_DEVICE_ID_PMC_MAXRAID), | |
131 | 0, 0, (kernel_ulong_t)&pmcraid_chip_cfg[0] | |
132 | }, | |
133 | {} | |
134 | }; | |
135 | ||
136 | MODULE_DEVICE_TABLE(pci, pmcraid_pci_table); | |
137 | ||
138 | ||
139 | ||
140 | /** | |
141 | * pmcraid_slave_alloc - Prepare for commands to a device | |
142 | * @scsi_dev: scsi device struct | |
143 | * | |
144 | * This function is called by mid-layer prior to sending any command to the new | |
145 | * device. Stores resource entry details of the device in scsi_device struct. | |
146 | * Queuecommand uses the resource handle and other details to fill up IOARCB | |
147 | * while sending commands to the device. | |
148 | * | |
149 | * Return value: | |
150 | * 0 on success / -ENXIO if device does not exist | |
151 | */ | |
152 | static int pmcraid_slave_alloc(struct scsi_device *scsi_dev) | |
153 | { | |
154 | struct pmcraid_resource_entry *temp, *res = NULL; | |
155 | struct pmcraid_instance *pinstance; | |
156 | u8 target, bus, lun; | |
157 | unsigned long lock_flags; | |
158 | int rc = -ENXIO; | |
c20c4267 AR |
159 | u16 fw_version; |
160 | ||
89a36810 AR |
161 | pinstance = shost_priv(scsi_dev->host); |
162 | ||
c20c4267 AR |
163 | fw_version = be16_to_cpu(pinstance->inq_data->fw_version); |
164 | ||
89a36810 AR |
165 | /* Driver exposes VSET and GSCSI resources only; all other device types |
166 | * are not exposed. Resource list is synchronized using resource lock | |
167 | * so any traversal or modifications to the list should be done inside | |
168 | * this lock | |
169 | */ | |
170 | spin_lock_irqsave(&pinstance->resource_lock, lock_flags); | |
171 | list_for_each_entry(temp, &pinstance->used_res_q, queue) { | |
172 | ||
729c8456 | 173 | /* do not expose VSETs with order-ids > MAX_VSET_TARGETS */ |
89a36810 | 174 | if (RES_IS_VSET(temp->cfg_entry)) { |
c20c4267 AR |
175 | if (fw_version <= PMCRAID_FW_VERSION_1) |
176 | target = temp->cfg_entry.unique_flags1; | |
177 | else | |
178 | target = temp->cfg_entry.array_id & 0xFF; | |
179 | ||
729c8456 | 180 | if (target > PMCRAID_MAX_VSET_TARGETS) |
89a36810 AR |
181 | continue; |
182 | bus = PMCRAID_VSET_BUS_ID; | |
183 | lun = 0; | |
184 | } else if (RES_IS_GSCSI(temp->cfg_entry)) { | |
185 | target = RES_TARGET(temp->cfg_entry.resource_address); | |
186 | bus = PMCRAID_PHYS_BUS_ID; | |
187 | lun = RES_LUN(temp->cfg_entry.resource_address); | |
188 | } else { | |
189 | continue; | |
190 | } | |
191 | ||
192 | if (bus == scsi_dev->channel && | |
193 | target == scsi_dev->id && | |
194 | lun == scsi_dev->lun) { | |
195 | res = temp; | |
196 | break; | |
197 | } | |
198 | } | |
199 | ||
200 | if (res) { | |
201 | res->scsi_dev = scsi_dev; | |
202 | scsi_dev->hostdata = res; | |
203 | res->change_detected = 0; | |
204 | atomic_set(&res->read_failures, 0); | |
205 | atomic_set(&res->write_failures, 0); | |
206 | rc = 0; | |
207 | } | |
208 | spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags); | |
209 | return rc; | |
210 | } | |
211 | ||
212 | /** | |
213 | * pmcraid_slave_configure - Configures a SCSI device | |
214 | * @scsi_dev: scsi device struct | |
215 | * | |
25985edc | 216 | * This function is executed by SCSI mid layer just after a device is first |
89a36810 AR |
217 | * scanned (i.e. it has responded to an INQUIRY). For VSET resources, the |
218 | * timeout value (default 30s) will be over-written to a higher value (60s) | |
219 | * and max_sectors value will be over-written to 512. It also sets queue depth | |
220 | * to host->cmd_per_lun value | |
221 | * | |
222 | * Return value: | |
223 | * 0 on success | |
224 | */ | |
225 | static int pmcraid_slave_configure(struct scsi_device *scsi_dev) | |
226 | { | |
227 | struct pmcraid_resource_entry *res = scsi_dev->hostdata; | |
228 | ||
229 | if (!res) | |
230 | return 0; | |
231 | ||
232 | /* LLD exposes VSETs and Enclosure devices only */ | |
233 | if (RES_IS_GSCSI(res->cfg_entry) && | |
234 | scsi_dev->type != TYPE_ENCLOSURE) | |
235 | return -ENXIO; | |
236 | ||
237 | pmcraid_info("configuring %x:%x:%x:%x\n", | |
238 | scsi_dev->host->unique_id, | |
239 | scsi_dev->channel, | |
240 | scsi_dev->id, | |
241 | scsi_dev->lun); | |
242 | ||
243 | if (RES_IS_GSCSI(res->cfg_entry)) { | |
244 | scsi_dev->allow_restart = 1; | |
245 | } else if (RES_IS_VSET(res->cfg_entry)) { | |
246 | scsi_dev->allow_restart = 1; | |
247 | blk_queue_rq_timeout(scsi_dev->request_queue, | |
248 | PMCRAID_VSET_IO_TIMEOUT); | |
086fa5ff | 249 | blk_queue_max_hw_sectors(scsi_dev->request_queue, |
89a36810 AR |
250 | PMCRAID_VSET_MAX_SECTORS); |
251 | } | |
252 | ||
253 | if (scsi_dev->tagged_supported && | |
254 | (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry))) { | |
255 | scsi_activate_tcq(scsi_dev, scsi_dev->queue_depth); | |
256 | scsi_adjust_queue_depth(scsi_dev, MSG_SIMPLE_TAG, | |
257 | scsi_dev->host->cmd_per_lun); | |
258 | } else { | |
259 | scsi_adjust_queue_depth(scsi_dev, 0, | |
260 | scsi_dev->host->cmd_per_lun); | |
261 | } | |
262 | ||
263 | return 0; | |
264 | } | |
265 | ||
266 | /** | |
267 | * pmcraid_slave_destroy - Unconfigure a SCSI device before removing it | |
268 | * | |
269 | * @scsi_dev: scsi device struct | |
270 | * | |
271 | * This is called by mid-layer before removing a device. Pointer assignments | |
272 | * done in pmcraid_slave_alloc will be reset to NULL here. | |
273 | * | |
274 | * Return value | |
275 | * none | |
276 | */ | |
277 | static void pmcraid_slave_destroy(struct scsi_device *scsi_dev) | |
278 | { | |
279 | struct pmcraid_resource_entry *res; | |
280 | ||
281 | res = (struct pmcraid_resource_entry *)scsi_dev->hostdata; | |
282 | ||
283 | if (res) | |
284 | res->scsi_dev = NULL; | |
285 | ||
286 | scsi_dev->hostdata = NULL; | |
287 | } | |
288 | ||
289 | /** | |
290 | * pmcraid_change_queue_depth - Change the device's queue depth | |
291 | * @scsi_dev: scsi device struct | |
292 | * @depth: depth to set | |
e881a172 | 293 | * @reason: calling context |
89a36810 AR |
294 | * |
295 | * Return value | |
c20c4267 | 296 | * actual depth set |
89a36810 | 297 | */ |
e881a172 MC |
298 | static int pmcraid_change_queue_depth(struct scsi_device *scsi_dev, int depth, |
299 | int reason) | |
89a36810 | 300 | { |
e881a172 MC |
301 | if (reason != SCSI_QDEPTH_DEFAULT) |
302 | return -EOPNOTSUPP; | |
303 | ||
89a36810 AR |
304 | if (depth > PMCRAID_MAX_CMD_PER_LUN) |
305 | depth = PMCRAID_MAX_CMD_PER_LUN; | |
306 | ||
307 | scsi_adjust_queue_depth(scsi_dev, scsi_get_tag_type(scsi_dev), depth); | |
308 | ||
309 | return scsi_dev->queue_depth; | |
310 | } | |
311 | ||
312 | /** | |
313 | * pmcraid_change_queue_type - Change the device's queue type | |
314 | * @scsi_dev: scsi device struct | |
315 | * @tag: type of tags to use | |
316 | * | |
317 | * Return value: | |
c20c4267 | 318 | * actual queue type set |
89a36810 AR |
319 | */ |
320 | static int pmcraid_change_queue_type(struct scsi_device *scsi_dev, int tag) | |
321 | { | |
322 | struct pmcraid_resource_entry *res; | |
323 | ||
324 | res = (struct pmcraid_resource_entry *)scsi_dev->hostdata; | |
325 | ||
326 | if ((res) && scsi_dev->tagged_supported && | |
327 | (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry))) { | |
328 | scsi_set_tag_type(scsi_dev, tag); | |
329 | ||
330 | if (tag) | |
331 | scsi_activate_tcq(scsi_dev, scsi_dev->queue_depth); | |
332 | else | |
333 | scsi_deactivate_tcq(scsi_dev, scsi_dev->queue_depth); | |
334 | } else | |
335 | tag = 0; | |
336 | ||
337 | return tag; | |
338 | } | |
339 | ||
340 | ||
341 | /** | |
342 | * pmcraid_init_cmdblk - initializes a command block | |
343 | * | |
344 | * @cmd: pointer to struct pmcraid_cmd to be initialized | |
345 | * @index: if >=0 first time initialization; otherwise reinitialization | |
346 | * | |
347 | * Return Value | |
348 | * None | |
349 | */ | |
350 | void pmcraid_init_cmdblk(struct pmcraid_cmd *cmd, int index) | |
351 | { | |
352 | struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb); | |
353 | dma_addr_t dma_addr = cmd->ioa_cb_bus_addr; | |
354 | ||
355 | if (index >= 0) { | |
356 | /* first time initialization (called from probe) */ | |
357 | u32 ioasa_offset = | |
358 | offsetof(struct pmcraid_control_block, ioasa); | |
359 | ||
360 | cmd->index = index; | |
361 | ioarcb->response_handle = cpu_to_le32(index << 2); | |
362 | ioarcb->ioarcb_bus_addr = cpu_to_le64(dma_addr); | |
363 | ioarcb->ioasa_bus_addr = cpu_to_le64(dma_addr + ioasa_offset); | |
364 | ioarcb->ioasa_len = cpu_to_le16(sizeof(struct pmcraid_ioasa)); | |
365 | } else { | |
366 | /* re-initialization of various lengths, called once command is | |
367 | * processed by IOA | |
368 | */ | |
369 | memset(&cmd->ioa_cb->ioarcb.cdb, 0, PMCRAID_MAX_CDB_LEN); | |
c20c4267 | 370 | ioarcb->hrrq_id = 0; |
89a36810 AR |
371 | ioarcb->request_flags0 = 0; |
372 | ioarcb->request_flags1 = 0; | |
373 | ioarcb->cmd_timeout = 0; | |
374 | ioarcb->ioarcb_bus_addr &= (~0x1FULL); | |
375 | ioarcb->ioadl_bus_addr = 0; | |
376 | ioarcb->ioadl_length = 0; | |
377 | ioarcb->data_transfer_length = 0; | |
378 | ioarcb->add_cmd_param_length = 0; | |
379 | ioarcb->add_cmd_param_offset = 0; | |
380 | cmd->ioa_cb->ioasa.ioasc = 0; | |
381 | cmd->ioa_cb->ioasa.residual_data_length = 0; | |
c20c4267 | 382 | cmd->time_left = 0; |
89a36810 AR |
383 | } |
384 | ||
385 | cmd->cmd_done = NULL; | |
386 | cmd->scsi_cmd = NULL; | |
387 | cmd->release = 0; | |
388 | cmd->completion_req = 0; | |
c20c4267 AR |
389 | cmd->sense_buffer = 0; |
390 | cmd->sense_buffer_dma = 0; | |
89a36810 AR |
391 | cmd->dma_handle = 0; |
392 | init_timer(&cmd->timer); | |
393 | } | |
394 | ||
395 | /** | |
396 | * pmcraid_reinit_cmdblk - reinitialize a command block | |
397 | * | |
398 | * @cmd: pointer to struct pmcraid_cmd to be reinitialized | |
399 | * | |
400 | * Return Value | |
401 | * None | |
402 | */ | |
403 | static void pmcraid_reinit_cmdblk(struct pmcraid_cmd *cmd) | |
404 | { | |
405 | pmcraid_init_cmdblk(cmd, -1); | |
406 | } | |
407 | ||
408 | /** | |
409 | * pmcraid_get_free_cmd - get a free cmd block from command block pool | |
410 | * @pinstance: adapter instance structure | |
411 | * | |
412 | * Return Value: | |
413 | * returns pointer to cmd block or NULL if no blocks are available | |
414 | */ | |
415 | static struct pmcraid_cmd *pmcraid_get_free_cmd( | |
416 | struct pmcraid_instance *pinstance | |
417 | ) | |
418 | { | |
419 | struct pmcraid_cmd *cmd = NULL; | |
420 | unsigned long lock_flags; | |
421 | ||
422 | /* free cmd block list is protected by free_pool_lock */ | |
423 | spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags); | |
424 | ||
425 | if (!list_empty(&pinstance->free_cmd_pool)) { | |
426 | cmd = list_entry(pinstance->free_cmd_pool.next, | |
427 | struct pmcraid_cmd, free_list); | |
428 | list_del(&cmd->free_list); | |
429 | } | |
430 | spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags); | |
431 | ||
432 | /* Initialize the command block before giving it the caller */ | |
433 | if (cmd != NULL) | |
434 | pmcraid_reinit_cmdblk(cmd); | |
435 | return cmd; | |
436 | } | |
437 | ||
438 | /** | |
439 | * pmcraid_return_cmd - return a completed command block back into free pool | |
440 | * @cmd: pointer to the command block | |
441 | * | |
442 | * Return Value: | |
443 | * nothing | |
444 | */ | |
445 | void pmcraid_return_cmd(struct pmcraid_cmd *cmd) | |
446 | { | |
447 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
448 | unsigned long lock_flags; | |
449 | ||
450 | spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags); | |
451 | list_add_tail(&cmd->free_list, &pinstance->free_cmd_pool); | |
452 | spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags); | |
453 | } | |
454 | ||
455 | /** | |
456 | * pmcraid_read_interrupts - reads IOA interrupts | |
457 | * | |
458 | * @pinstance: pointer to adapter instance structure | |
459 | * | |
460 | * Return value | |
461 | * interrupts read from IOA | |
462 | */ | |
463 | static u32 pmcraid_read_interrupts(struct pmcraid_instance *pinstance) | |
464 | { | |
c20c4267 AR |
465 | return (pinstance->interrupt_mode) ? |
466 | ioread32(pinstance->int_regs.ioa_host_msix_interrupt_reg) : | |
467 | ioread32(pinstance->int_regs.ioa_host_interrupt_reg); | |
89a36810 AR |
468 | } |
469 | ||
470 | /** | |
471 | * pmcraid_disable_interrupts - Masks and clears all specified interrupts | |
472 | * | |
473 | * @pinstance: pointer to per adapter instance structure | |
474 | * @intrs: interrupts to disable | |
475 | * | |
476 | * Return Value | |
477 | * None | |
478 | */ | |
479 | static void pmcraid_disable_interrupts( | |
480 | struct pmcraid_instance *pinstance, | |
481 | u32 intrs | |
482 | ) | |
483 | { | |
484 | u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg); | |
485 | u32 nmask = gmask | GLOBAL_INTERRUPT_MASK; | |
486 | ||
89a36810 | 487 | iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_clr_reg); |
c20c4267 AR |
488 | iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg); |
489 | ioread32(pinstance->int_regs.global_interrupt_mask_reg); | |
490 | ||
491 | if (!pinstance->interrupt_mode) { | |
492 | iowrite32(intrs, | |
493 | pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
494 | ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
495 | } | |
89a36810 AR |
496 | } |
497 | ||
498 | /** | |
499 | * pmcraid_enable_interrupts - Enables specified interrupts | |
500 | * | |
501 | * @pinstance: pointer to per adapter instance structure | |
502 | * @intr: interrupts to enable | |
503 | * | |
504 | * Return Value | |
505 | * None | |
506 | */ | |
507 | static void pmcraid_enable_interrupts( | |
508 | struct pmcraid_instance *pinstance, | |
509 | u32 intrs | |
510 | ) | |
511 | { | |
512 | u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg); | |
513 | u32 nmask = gmask & (~GLOBAL_INTERRUPT_MASK); | |
514 | ||
515 | iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg); | |
c20c4267 AR |
516 | |
517 | if (!pinstance->interrupt_mode) { | |
518 | iowrite32(~intrs, | |
519 | pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
520 | ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
521 | } | |
89a36810 AR |
522 | |
523 | pmcraid_info("enabled interrupts global mask = %x intr_mask = %x\n", | |
524 | ioread32(pinstance->int_regs.global_interrupt_mask_reg), | |
525 | ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg)); | |
526 | } | |
527 | ||
c20c4267 AR |
528 | /** |
529 | * pmcraid_clr_trans_op - clear trans to op interrupt | |
530 | * | |
531 | * @pinstance: pointer to per adapter instance structure | |
532 | * | |
533 | * Return Value | |
534 | * None | |
535 | */ | |
536 | static void pmcraid_clr_trans_op( | |
537 | struct pmcraid_instance *pinstance | |
538 | ) | |
539 | { | |
540 | unsigned long lock_flags; | |
541 | ||
542 | if (!pinstance->interrupt_mode) { | |
543 | iowrite32(INTRS_TRANSITION_TO_OPERATIONAL, | |
544 | pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
545 | ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
546 | iowrite32(INTRS_TRANSITION_TO_OPERATIONAL, | |
547 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
548 | ioread32(pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
549 | } | |
550 | ||
551 | if (pinstance->reset_cmd != NULL) { | |
552 | del_timer(&pinstance->reset_cmd->timer); | |
553 | spin_lock_irqsave( | |
554 | pinstance->host->host_lock, lock_flags); | |
555 | pinstance->reset_cmd->cmd_done(pinstance->reset_cmd); | |
556 | spin_unlock_irqrestore( | |
557 | pinstance->host->host_lock, lock_flags); | |
558 | } | |
559 | } | |
560 | ||
89a36810 AR |
561 | /** |
562 | * pmcraid_reset_type - Determine the required reset type | |
563 | * @pinstance: pointer to adapter instance structure | |
564 | * | |
565 | * IOA requires hard reset if any of the following conditions is true. | |
566 | * 1. If HRRQ valid interrupt is not masked | |
567 | * 2. IOA reset alert doorbell is set | |
568 | * 3. If there are any error interrupts | |
569 | */ | |
570 | static void pmcraid_reset_type(struct pmcraid_instance *pinstance) | |
571 | { | |
572 | u32 mask; | |
573 | u32 intrs; | |
574 | u32 alerts; | |
575 | ||
576 | mask = ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
577 | intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg); | |
578 | alerts = ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
579 | ||
580 | if ((mask & INTRS_HRRQ_VALID) == 0 || | |
581 | (alerts & DOORBELL_IOA_RESET_ALERT) || | |
582 | (intrs & PMCRAID_ERROR_INTERRUPTS)) { | |
583 | pmcraid_info("IOA requires hard reset\n"); | |
584 | pinstance->ioa_hard_reset = 1; | |
585 | } | |
586 | ||
587 | /* If unit check is active, trigger the dump */ | |
588 | if (intrs & INTRS_IOA_UNIT_CHECK) | |
589 | pinstance->ioa_unit_check = 1; | |
590 | } | |
591 | ||
592 | /** | |
593 | * pmcraid_bist_done - completion function for PCI BIST | |
594 | * @cmd: pointer to reset command | |
595 | * Return Value | |
c20c4267 | 596 | * none |
89a36810 AR |
597 | */ |
598 | ||
599 | static void pmcraid_ioa_reset(struct pmcraid_cmd *); | |
600 | ||
601 | static void pmcraid_bist_done(struct pmcraid_cmd *cmd) | |
602 | { | |
603 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
604 | unsigned long lock_flags; | |
605 | int rc; | |
606 | u16 pci_reg; | |
607 | ||
608 | rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg); | |
609 | ||
610 | /* If PCI config space can't be accessed wait for another two secs */ | |
611 | if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) && | |
c20c4267 | 612 | cmd->time_left > 0) { |
89a36810 | 613 | pmcraid_info("BIST not complete, waiting another 2 secs\n"); |
c20c4267 AR |
614 | cmd->timer.expires = jiffies + cmd->time_left; |
615 | cmd->time_left = 0; | |
89a36810 AR |
616 | cmd->timer.data = (unsigned long)cmd; |
617 | cmd->timer.function = | |
618 | (void (*)(unsigned long))pmcraid_bist_done; | |
619 | add_timer(&cmd->timer); | |
620 | } else { | |
c20c4267 | 621 | cmd->time_left = 0; |
89a36810 AR |
622 | pmcraid_info("BIST is complete, proceeding with reset\n"); |
623 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
624 | pmcraid_ioa_reset(cmd); | |
625 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
626 | } | |
627 | } | |
628 | ||
629 | /** | |
630 | * pmcraid_start_bist - starts BIST | |
631 | * @cmd: pointer to reset cmd | |
632 | * Return Value | |
633 | * none | |
634 | */ | |
635 | static void pmcraid_start_bist(struct pmcraid_cmd *cmd) | |
636 | { | |
637 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
638 | u32 doorbells, intrs; | |
639 | ||
640 | /* proceed with bist and wait for 2 seconds */ | |
641 | iowrite32(DOORBELL_IOA_START_BIST, | |
642 | pinstance->int_regs.host_ioa_interrupt_reg); | |
643 | doorbells = ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
644 | intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg); | |
c20c4267 | 645 | pmcraid_info("doorbells after start bist: %x intrs: %x\n", |
89a36810 AR |
646 | doorbells, intrs); |
647 | ||
c20c4267 | 648 | cmd->time_left = msecs_to_jiffies(PMCRAID_BIST_TIMEOUT); |
89a36810 AR |
649 | cmd->timer.data = (unsigned long)cmd; |
650 | cmd->timer.expires = jiffies + msecs_to_jiffies(PMCRAID_BIST_TIMEOUT); | |
651 | cmd->timer.function = (void (*)(unsigned long))pmcraid_bist_done; | |
652 | add_timer(&cmd->timer); | |
653 | } | |
654 | ||
655 | /** | |
656 | * pmcraid_reset_alert_done - completion routine for reset_alert | |
657 | * @cmd: pointer to command block used in reset sequence | |
658 | * Return value | |
659 | * None | |
660 | */ | |
661 | static void pmcraid_reset_alert_done(struct pmcraid_cmd *cmd) | |
662 | { | |
663 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
664 | u32 status = ioread32(pinstance->ioa_status); | |
665 | unsigned long lock_flags; | |
666 | ||
667 | /* if the critical operation in progress bit is set or the wait times | |
668 | * out, invoke reset engine to proceed with hard reset. If there is | |
669 | * some more time to wait, restart the timer | |
670 | */ | |
671 | if (((status & INTRS_CRITICAL_OP_IN_PROGRESS) == 0) || | |
c20c4267 | 672 | cmd->time_left <= 0) { |
89a36810 AR |
673 | pmcraid_info("critical op is reset proceeding with reset\n"); |
674 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
675 | pmcraid_ioa_reset(cmd); | |
676 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
677 | } else { | |
678 | pmcraid_info("critical op is not yet reset waiting again\n"); | |
679 | /* restart timer if some more time is available to wait */ | |
c20c4267 | 680 | cmd->time_left -= PMCRAID_CHECK_FOR_RESET_TIMEOUT; |
89a36810 AR |
681 | cmd->timer.data = (unsigned long)cmd; |
682 | cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT; | |
683 | cmd->timer.function = | |
684 | (void (*)(unsigned long))pmcraid_reset_alert_done; | |
685 | add_timer(&cmd->timer); | |
686 | } | |
687 | } | |
688 | ||
689 | /** | |
690 | * pmcraid_reset_alert - alerts IOA for a possible reset | |
691 | * @cmd : command block to be used for reset sequence. | |
692 | * | |
693 | * Return Value | |
694 | * returns 0 if pci config-space is accessible and RESET_DOORBELL is | |
695 | * successfully written to IOA. Returns non-zero in case pci_config_space | |
696 | * is not accessible | |
697 | */ | |
c20c4267 | 698 | static void pmcraid_notify_ioastate(struct pmcraid_instance *, u32); |
89a36810 AR |
699 | static void pmcraid_reset_alert(struct pmcraid_cmd *cmd) |
700 | { | |
701 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
702 | u32 doorbells; | |
703 | int rc; | |
704 | u16 pci_reg; | |
705 | ||
706 | /* If we are able to access IOA PCI config space, alert IOA that we are | |
707 | * going to reset it soon. This enables IOA to preserv persistent error | |
708 | * data if any. In case memory space is not accessible, proceed with | |
709 | * BIST or slot_reset | |
710 | */ | |
711 | rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg); | |
712 | if ((rc == PCIBIOS_SUCCESSFUL) && (pci_reg & PCI_COMMAND_MEMORY)) { | |
713 | ||
714 | /* wait for IOA permission i.e until CRITICAL_OPERATION bit is | |
715 | * reset IOA doesn't generate any interrupts when CRITICAL | |
716 | * OPERATION bit is reset. A timer is started to wait for this | |
717 | * bit to be reset. | |
718 | */ | |
c20c4267 | 719 | cmd->time_left = PMCRAID_RESET_TIMEOUT; |
89a36810 AR |
720 | cmd->timer.data = (unsigned long)cmd; |
721 | cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT; | |
722 | cmd->timer.function = | |
723 | (void (*)(unsigned long))pmcraid_reset_alert_done; | |
724 | add_timer(&cmd->timer); | |
725 | ||
726 | iowrite32(DOORBELL_IOA_RESET_ALERT, | |
727 | pinstance->int_regs.host_ioa_interrupt_reg); | |
728 | doorbells = | |
729 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
730 | pmcraid_info("doorbells after reset alert: %x\n", doorbells); | |
731 | } else { | |
732 | pmcraid_info("PCI config is not accessible starting BIST\n"); | |
733 | pinstance->ioa_state = IOA_STATE_IN_HARD_RESET; | |
734 | pmcraid_start_bist(cmd); | |
735 | } | |
736 | } | |
737 | ||
738 | /** | |
739 | * pmcraid_timeout_handler - Timeout handler for internally generated ops | |
740 | * | |
741 | * @cmd : pointer to command structure, that got timedout | |
742 | * | |
743 | * This function blocks host requests and initiates an adapter reset. | |
744 | * | |
745 | * Return value: | |
746 | * None | |
747 | */ | |
748 | static void pmcraid_timeout_handler(struct pmcraid_cmd *cmd) | |
749 | { | |
750 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
751 | unsigned long lock_flags; | |
752 | ||
34876402 | 753 | dev_info(&pinstance->pdev->dev, |
c20c4267 AR |
754 | "Adapter being reset due to cmd(CDB[0] = %x) timeout\n", |
755 | cmd->ioa_cb->ioarcb.cdb[0]); | |
89a36810 AR |
756 | |
757 | /* Command timeouts result in hard reset sequence. The command that got | |
758 | * timed out may be the one used as part of reset sequence. In this | |
759 | * case restart reset sequence using the same command block even if | |
760 | * reset is in progress. Otherwise fail this command and get a free | |
761 | * command block to restart the reset sequence. | |
762 | */ | |
763 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
764 | if (!pinstance->ioa_reset_in_progress) { | |
765 | pinstance->ioa_reset_attempts = 0; | |
766 | cmd = pmcraid_get_free_cmd(pinstance); | |
767 | ||
768 | /* If we are out of command blocks, just return here itself. | |
769 | * Some other command's timeout handler can do the reset job | |
770 | */ | |
771 | if (cmd == NULL) { | |
772 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
773 | lock_flags); | |
774 | pmcraid_err("no free cmnd block for timeout handler\n"); | |
775 | return; | |
776 | } | |
777 | ||
778 | pinstance->reset_cmd = cmd; | |
779 | pinstance->ioa_reset_in_progress = 1; | |
780 | } else { | |
781 | pmcraid_info("reset is already in progress\n"); | |
782 | ||
783 | if (pinstance->reset_cmd != cmd) { | |
784 | /* This command should have been given to IOA, this | |
785 | * command will be completed by fail_outstanding_cmds | |
786 | * anyway | |
787 | */ | |
788 | pmcraid_err("cmd is pending but reset in progress\n"); | |
789 | } | |
790 | ||
791 | /* If this command was being used as part of the reset | |
792 | * sequence, set cmd_done pointer to pmcraid_ioa_reset. This | |
793 | * causes fail_outstanding_commands not to return the command | |
794 | * block back to free pool | |
795 | */ | |
796 | if (cmd == pinstance->reset_cmd) | |
797 | cmd->cmd_done = pmcraid_ioa_reset; | |
89a36810 AR |
798 | } |
799 | ||
c20c4267 AR |
800 | /* Notify apps of important IOA bringup/bringdown sequences */ |
801 | if (pinstance->scn.ioa_state != PMC_DEVICE_EVENT_RESET_START && | |
802 | pinstance->scn.ioa_state != PMC_DEVICE_EVENT_SHUTDOWN_START) | |
803 | pmcraid_notify_ioastate(pinstance, | |
804 | PMC_DEVICE_EVENT_RESET_START); | |
805 | ||
89a36810 AR |
806 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; |
807 | scsi_block_requests(pinstance->host); | |
808 | pmcraid_reset_alert(cmd); | |
809 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
810 | } | |
811 | ||
812 | /** | |
813 | * pmcraid_internal_done - completion routine for internally generated cmds | |
814 | * | |
815 | * @cmd: command that got response from IOA | |
816 | * | |
817 | * Return Value: | |
818 | * none | |
819 | */ | |
820 | static void pmcraid_internal_done(struct pmcraid_cmd *cmd) | |
821 | { | |
822 | pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n", | |
823 | cmd->ioa_cb->ioarcb.cdb[0], | |
824 | le32_to_cpu(cmd->ioa_cb->ioasa.ioasc)); | |
825 | ||
826 | /* Some of the internal commands are sent with callers blocking for the | |
827 | * response. Same will be indicated as part of cmd->completion_req | |
828 | * field. Response path needs to wake up any waiters waiting for cmd | |
829 | * completion if this flag is set. | |
830 | */ | |
831 | if (cmd->completion_req) { | |
832 | cmd->completion_req = 0; | |
833 | complete(&cmd->wait_for_completion); | |
834 | } | |
835 | ||
836 | /* most of the internal commands are completed by caller itself, so | |
837 | * no need to return the command block back to free pool until we are | |
838 | * required to do so (e.g once done with initialization). | |
839 | */ | |
840 | if (cmd->release) { | |
841 | cmd->release = 0; | |
842 | pmcraid_return_cmd(cmd); | |
843 | } | |
844 | } | |
845 | ||
846 | /** | |
847 | * pmcraid_reinit_cfgtable_done - done function for cfg table reinitialization | |
848 | * | |
849 | * @cmd: command that got response from IOA | |
850 | * | |
851 | * This routine is called after driver re-reads configuration table due to a | |
852 | * lost CCN. It returns the command block back to free pool and schedules | |
853 | * worker thread to add/delete devices into the system. | |
854 | * | |
855 | * Return Value: | |
856 | * none | |
857 | */ | |
858 | static void pmcraid_reinit_cfgtable_done(struct pmcraid_cmd *cmd) | |
859 | { | |
860 | pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n", | |
861 | cmd->ioa_cb->ioarcb.cdb[0], | |
862 | le32_to_cpu(cmd->ioa_cb->ioasa.ioasc)); | |
863 | ||
864 | if (cmd->release) { | |
865 | cmd->release = 0; | |
866 | pmcraid_return_cmd(cmd); | |
867 | } | |
868 | pmcraid_info("scheduling worker for config table reinitialization\n"); | |
869 | schedule_work(&cmd->drv_inst->worker_q); | |
870 | } | |
871 | ||
872 | /** | |
873 | * pmcraid_erp_done - Process completion of SCSI error response from device | |
874 | * @cmd: pmcraid_command | |
875 | * | |
876 | * This function copies the sense buffer into the scsi_cmd struct and completes | |
877 | * scsi_cmd by calling scsi_done function. | |
878 | * | |
879 | * Return value: | |
880 | * none | |
881 | */ | |
882 | static void pmcraid_erp_done(struct pmcraid_cmd *cmd) | |
883 | { | |
884 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
885 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
886 | u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
887 | ||
888 | if (PMCRAID_IOASC_SENSE_KEY(ioasc) > 0) { | |
889 | scsi_cmd->result |= (DID_ERROR << 16); | |
34876402 AR |
890 | scmd_printk(KERN_INFO, scsi_cmd, |
891 | "command CDB[0] = %x failed with IOASC: 0x%08X\n", | |
892 | cmd->ioa_cb->ioarcb.cdb[0], ioasc); | |
89a36810 AR |
893 | } |
894 | ||
895 | /* if we had allocated sense buffers for request sense, copy the sense | |
896 | * release the buffers | |
897 | */ | |
898 | if (cmd->sense_buffer != NULL) { | |
899 | memcpy(scsi_cmd->sense_buffer, | |
900 | cmd->sense_buffer, | |
901 | SCSI_SENSE_BUFFERSIZE); | |
902 | pci_free_consistent(pinstance->pdev, | |
903 | SCSI_SENSE_BUFFERSIZE, | |
904 | cmd->sense_buffer, cmd->sense_buffer_dma); | |
905 | cmd->sense_buffer = NULL; | |
906 | cmd->sense_buffer_dma = 0; | |
907 | } | |
908 | ||
909 | scsi_dma_unmap(scsi_cmd); | |
910 | pmcraid_return_cmd(cmd); | |
911 | scsi_cmd->scsi_done(scsi_cmd); | |
912 | } | |
913 | ||
914 | /** | |
915 | * pmcraid_fire_command - sends an IOA command to adapter | |
916 | * | |
917 | * This function adds the given block into pending command list | |
918 | * and returns without waiting | |
919 | * | |
920 | * @cmd : command to be sent to the device | |
921 | * | |
922 | * Return Value | |
923 | * None | |
924 | */ | |
925 | static void _pmcraid_fire_command(struct pmcraid_cmd *cmd) | |
926 | { | |
927 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
928 | unsigned long lock_flags; | |
929 | ||
930 | /* Add this command block to pending cmd pool. We do this prior to | |
931 | * writting IOARCB to ioarrin because IOA might complete the command | |
932 | * by the time we are about to add it to the list. Response handler | |
c20c4267 | 933 | * (isr/tasklet) looks for cmd block in the pending pending list. |
89a36810 AR |
934 | */ |
935 | spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags); | |
936 | list_add_tail(&cmd->free_list, &pinstance->pending_cmd_pool); | |
937 | spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags); | |
938 | atomic_inc(&pinstance->outstanding_cmds); | |
939 | ||
940 | /* driver writes lower 32-bit value of IOARCB address only */ | |
941 | mb(); | |
942 | iowrite32(le32_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr), | |
943 | pinstance->ioarrin); | |
944 | } | |
945 | ||
946 | /** | |
947 | * pmcraid_send_cmd - fires a command to IOA | |
948 | * | |
949 | * This function also sets up timeout function, and command completion | |
950 | * function | |
951 | * | |
952 | * @cmd: pointer to the command block to be fired to IOA | |
953 | * @cmd_done: command completion function, called once IOA responds | |
954 | * @timeout: timeout to wait for this command completion | |
955 | * @timeout_func: timeout handler | |
956 | * | |
957 | * Return value | |
958 | * none | |
959 | */ | |
960 | static void pmcraid_send_cmd( | |
961 | struct pmcraid_cmd *cmd, | |
962 | void (*cmd_done) (struct pmcraid_cmd *), | |
963 | unsigned long timeout, | |
964 | void (*timeout_func) (struct pmcraid_cmd *) | |
965 | ) | |
966 | { | |
967 | /* initialize done function */ | |
968 | cmd->cmd_done = cmd_done; | |
969 | ||
970 | if (timeout_func) { | |
971 | /* setup timeout handler */ | |
972 | cmd->timer.data = (unsigned long)cmd; | |
973 | cmd->timer.expires = jiffies + timeout; | |
974 | cmd->timer.function = (void (*)(unsigned long))timeout_func; | |
975 | add_timer(&cmd->timer); | |
976 | } | |
977 | ||
978 | /* fire the command to IOA */ | |
979 | _pmcraid_fire_command(cmd); | |
980 | } | |
981 | ||
c20c4267 AR |
982 | /** |
983 | * pmcraid_ioa_shutdown_done - completion function for IOA shutdown command | |
984 | * @cmd: pointer to the command block used for sending IOA shutdown command | |
985 | * | |
986 | * Return value | |
987 | * None | |
988 | */ | |
989 | static void pmcraid_ioa_shutdown_done(struct pmcraid_cmd *cmd) | |
990 | { | |
991 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
992 | unsigned long lock_flags; | |
993 | ||
994 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
995 | pmcraid_ioa_reset(cmd); | |
996 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
997 | } | |
998 | ||
89a36810 AR |
999 | /** |
1000 | * pmcraid_ioa_shutdown - sends SHUTDOWN command to ioa | |
1001 | * | |
1002 | * @cmd: pointer to the command block used as part of reset sequence | |
1003 | * | |
1004 | * Return Value | |
1005 | * None | |
1006 | */ | |
1007 | static void pmcraid_ioa_shutdown(struct pmcraid_cmd *cmd) | |
1008 | { | |
1009 | pmcraid_info("response for Cancel CCN CDB[0] = %x ioasc = %x\n", | |
1010 | cmd->ioa_cb->ioarcb.cdb[0], | |
1011 | le32_to_cpu(cmd->ioa_cb->ioasa.ioasc)); | |
1012 | ||
1013 | /* Note that commands sent during reset require next command to be sent | |
1014 | * to IOA. Hence reinit the done function as well as timeout function | |
1015 | */ | |
1016 | pmcraid_reinit_cmdblk(cmd); | |
1017 | cmd->ioa_cb->ioarcb.request_type = REQ_TYPE_IOACMD; | |
1018 | cmd->ioa_cb->ioarcb.resource_handle = | |
1019 | cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
1020 | cmd->ioa_cb->ioarcb.cdb[0] = PMCRAID_IOA_SHUTDOWN; | |
1021 | cmd->ioa_cb->ioarcb.cdb[1] = PMCRAID_SHUTDOWN_NORMAL; | |
1022 | ||
1023 | /* fire shutdown command to hardware. */ | |
1024 | pmcraid_info("firing normal shutdown command (%d) to IOA\n", | |
1025 | le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle)); | |
1026 | ||
c20c4267 AR |
1027 | pmcraid_notify_ioastate(cmd->drv_inst, PMC_DEVICE_EVENT_SHUTDOWN_START); |
1028 | ||
1029 | pmcraid_send_cmd(cmd, pmcraid_ioa_shutdown_done, | |
89a36810 AR |
1030 | PMCRAID_SHUTDOWN_TIMEOUT, |
1031 | pmcraid_timeout_handler); | |
1032 | } | |
1033 | ||
1034 | /** | |
c20c4267 AR |
1035 | * pmcraid_get_fwversion_done - completion function for get_fwversion |
1036 | * | |
1037 | * @cmd: pointer to command block used to send INQUIRY command | |
89a36810 AR |
1038 | * |
1039 | * Return Value | |
c20c4267 | 1040 | * none |
89a36810 | 1041 | */ |
89a36810 AR |
1042 | static void pmcraid_querycfg(struct pmcraid_cmd *); |
1043 | ||
c20c4267 AR |
1044 | static void pmcraid_get_fwversion_done(struct pmcraid_cmd *cmd) |
1045 | { | |
1046 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1047 | u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
1048 | unsigned long lock_flags; | |
1049 | ||
1050 | /* configuration table entry size depends on firmware version. If fw | |
1051 | * version is not known, it is not possible to interpret IOA config | |
1052 | * table | |
1053 | */ | |
1054 | if (ioasc) { | |
1055 | pmcraid_err("IOA Inquiry failed with %x\n", ioasc); | |
1056 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
1057 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; | |
1058 | pmcraid_reset_alert(cmd); | |
1059 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
1060 | } else { | |
1061 | pmcraid_querycfg(cmd); | |
1062 | } | |
1063 | } | |
1064 | ||
1065 | /** | |
1066 | * pmcraid_get_fwversion - reads firmware version information | |
1067 | * | |
1068 | * @cmd: pointer to command block used to send INQUIRY command | |
1069 | * | |
1070 | * Return Value | |
1071 | * none | |
1072 | */ | |
1073 | static void pmcraid_get_fwversion(struct pmcraid_cmd *cmd) | |
1074 | { | |
1075 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
1076 | struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl; | |
1077 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1078 | u16 data_size = sizeof(struct pmcraid_inquiry_data); | |
1079 | ||
1080 | pmcraid_reinit_cmdblk(cmd); | |
1081 | ioarcb->request_type = REQ_TYPE_SCSI; | |
1082 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
1083 | ioarcb->cdb[0] = INQUIRY; | |
1084 | ioarcb->cdb[1] = 1; | |
1085 | ioarcb->cdb[2] = 0xD0; | |
1086 | ioarcb->cdb[3] = (data_size >> 8) & 0xFF; | |
1087 | ioarcb->cdb[4] = data_size & 0xFF; | |
1088 | ||
1089 | /* Since entire inquiry data it can be part of IOARCB itself | |
1090 | */ | |
1091 | ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
1092 | offsetof(struct pmcraid_ioarcb, | |
1093 | add_data.u.ioadl[0])); | |
1094 | ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); | |
1095 | ioarcb->ioarcb_bus_addr &= ~(0x1FULL); | |
1096 | ||
1097 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
1098 | ioarcb->data_transfer_length = cpu_to_le32(data_size); | |
1099 | ioadl = &(ioarcb->add_data.u.ioadl[0]); | |
1100 | ioadl->flags = IOADL_FLAGS_LAST_DESC; | |
1101 | ioadl->address = cpu_to_le64(pinstance->inq_data_baddr); | |
1102 | ioadl->data_len = cpu_to_le32(data_size); | |
1103 | ||
1104 | pmcraid_send_cmd(cmd, pmcraid_get_fwversion_done, | |
1105 | PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler); | |
1106 | } | |
1107 | ||
1108 | /** | |
1109 | * pmcraid_identify_hrrq - registers host rrq buffers with IOA | |
1110 | * @cmd: pointer to command block to be used for identify hrrq | |
1111 | * | |
1112 | * Return Value | |
1113 | * none | |
1114 | */ | |
89a36810 AR |
1115 | static void pmcraid_identify_hrrq(struct pmcraid_cmd *cmd) |
1116 | { | |
1117 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1118 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
c20c4267 | 1119 | int index = cmd->hrrq_index; |
89a36810 AR |
1120 | __be64 hrrq_addr = cpu_to_be64(pinstance->hrrq_start_bus_addr[index]); |
1121 | u32 hrrq_size = cpu_to_be32(sizeof(u32) * PMCRAID_MAX_CMD); | |
c20c4267 | 1122 | void (*done_function)(struct pmcraid_cmd *); |
89a36810 AR |
1123 | |
1124 | pmcraid_reinit_cmdblk(cmd); | |
c20c4267 AR |
1125 | cmd->hrrq_index = index + 1; |
1126 | ||
1127 | if (cmd->hrrq_index < pinstance->num_hrrq) { | |
1128 | done_function = pmcraid_identify_hrrq; | |
1129 | } else { | |
1130 | cmd->hrrq_index = 0; | |
1131 | done_function = pmcraid_get_fwversion; | |
1132 | } | |
89a36810 AR |
1133 | |
1134 | /* Initialize ioarcb */ | |
1135 | ioarcb->request_type = REQ_TYPE_IOACMD; | |
1136 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
1137 | ||
1138 | /* initialize the hrrq number where IOA will respond to this command */ | |
1139 | ioarcb->hrrq_id = index; | |
1140 | ioarcb->cdb[0] = PMCRAID_IDENTIFY_HRRQ; | |
1141 | ioarcb->cdb[1] = index; | |
1142 | ||
1143 | /* IOA expects 64-bit pci address to be written in B.E format | |
1144 | * (i.e cdb[2]=MSByte..cdb[9]=LSB. | |
1145 | */ | |
c20c4267 AR |
1146 | pmcraid_info("HRRQ_IDENTIFY with hrrq:ioarcb:index => %llx:%llx:%x\n", |
1147 | hrrq_addr, ioarcb->ioarcb_bus_addr, index); | |
89a36810 AR |
1148 | |
1149 | memcpy(&(ioarcb->cdb[2]), &hrrq_addr, sizeof(hrrq_addr)); | |
1150 | memcpy(&(ioarcb->cdb[10]), &hrrq_size, sizeof(hrrq_size)); | |
1151 | ||
1152 | /* Subsequent commands require HRRQ identification to be successful. | |
1153 | * Note that this gets called even during reset from SCSI mid-layer | |
1154 | * or tasklet | |
1155 | */ | |
c20c4267 | 1156 | pmcraid_send_cmd(cmd, done_function, |
89a36810 AR |
1157 | PMCRAID_INTERNAL_TIMEOUT, |
1158 | pmcraid_timeout_handler); | |
1159 | } | |
1160 | ||
1161 | static void pmcraid_process_ccn(struct pmcraid_cmd *cmd); | |
1162 | static void pmcraid_process_ldn(struct pmcraid_cmd *cmd); | |
1163 | ||
1164 | /** | |
1165 | * pmcraid_send_hcam_cmd - send an initialized command block(HCAM) to IOA | |
1166 | * | |
1167 | * @cmd: initialized command block pointer | |
1168 | * | |
1169 | * Return Value | |
1170 | * none | |
1171 | */ | |
1172 | static void pmcraid_send_hcam_cmd(struct pmcraid_cmd *cmd) | |
1173 | { | |
1174 | if (cmd->ioa_cb->ioarcb.cdb[1] == PMCRAID_HCAM_CODE_CONFIG_CHANGE) | |
1175 | atomic_set(&(cmd->drv_inst->ccn.ignore), 0); | |
1176 | else | |
1177 | atomic_set(&(cmd->drv_inst->ldn.ignore), 0); | |
1178 | ||
1179 | pmcraid_send_cmd(cmd, cmd->cmd_done, 0, NULL); | |
1180 | } | |
1181 | ||
1182 | /** | |
1183 | * pmcraid_init_hcam - send an initialized command block(HCAM) to IOA | |
1184 | * | |
1185 | * @pinstance: pointer to adapter instance structure | |
1186 | * @type: HCAM type | |
1187 | * | |
1188 | * Return Value | |
1189 | * pointer to initialized pmcraid_cmd structure or NULL | |
1190 | */ | |
1191 | static struct pmcraid_cmd *pmcraid_init_hcam | |
1192 | ( | |
1193 | struct pmcraid_instance *pinstance, | |
1194 | u8 type | |
1195 | ) | |
1196 | { | |
1197 | struct pmcraid_cmd *cmd; | |
1198 | struct pmcraid_ioarcb *ioarcb; | |
1199 | struct pmcraid_ioadl_desc *ioadl; | |
1200 | struct pmcraid_hostrcb *hcam; | |
1201 | void (*cmd_done) (struct pmcraid_cmd *); | |
1202 | dma_addr_t dma; | |
1203 | int rcb_size; | |
1204 | ||
1205 | cmd = pmcraid_get_free_cmd(pinstance); | |
1206 | ||
1207 | if (!cmd) { | |
1208 | pmcraid_err("no free command blocks for hcam\n"); | |
1209 | return cmd; | |
1210 | } | |
1211 | ||
1212 | if (type == PMCRAID_HCAM_CODE_CONFIG_CHANGE) { | |
c20c4267 | 1213 | rcb_size = sizeof(struct pmcraid_hcam_ccn_ext); |
89a36810 AR |
1214 | cmd_done = pmcraid_process_ccn; |
1215 | dma = pinstance->ccn.baddr + PMCRAID_AEN_HDR_SIZE; | |
1216 | hcam = &pinstance->ccn; | |
1217 | } else { | |
1218 | rcb_size = sizeof(struct pmcraid_hcam_ldn); | |
1219 | cmd_done = pmcraid_process_ldn; | |
1220 | dma = pinstance->ldn.baddr + PMCRAID_AEN_HDR_SIZE; | |
1221 | hcam = &pinstance->ldn; | |
1222 | } | |
1223 | ||
1224 | /* initialize command pointer used for HCAM registration */ | |
1225 | hcam->cmd = cmd; | |
1226 | ||
1227 | ioarcb = &cmd->ioa_cb->ioarcb; | |
1228 | ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
1229 | offsetof(struct pmcraid_ioarcb, | |
1230 | add_data.u.ioadl[0])); | |
1231 | ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); | |
1232 | ioadl = ioarcb->add_data.u.ioadl; | |
1233 | ||
1234 | /* Initialize ioarcb */ | |
1235 | ioarcb->request_type = REQ_TYPE_HCAM; | |
1236 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
1237 | ioarcb->cdb[0] = PMCRAID_HOST_CONTROLLED_ASYNC; | |
1238 | ioarcb->cdb[1] = type; | |
1239 | ioarcb->cdb[7] = (rcb_size >> 8) & 0xFF; | |
1240 | ioarcb->cdb[8] = (rcb_size) & 0xFF; | |
1241 | ||
1242 | ioarcb->data_transfer_length = cpu_to_le32(rcb_size); | |
1243 | ||
88197966 | 1244 | ioadl[0].flags |= IOADL_FLAGS_READ_LAST; |
89a36810 AR |
1245 | ioadl[0].data_len = cpu_to_le32(rcb_size); |
1246 | ioadl[0].address = cpu_to_le32(dma); | |
1247 | ||
1248 | cmd->cmd_done = cmd_done; | |
1249 | return cmd; | |
1250 | } | |
1251 | ||
1252 | /** | |
1253 | * pmcraid_send_hcam - Send an HCAM to IOA | |
1254 | * @pinstance: ioa config struct | |
1255 | * @type: HCAM type | |
1256 | * | |
1257 | * This function will send a Host Controlled Async command to IOA. | |
1258 | * | |
1259 | * Return value: | |
c20c4267 | 1260 | * none |
89a36810 AR |
1261 | */ |
1262 | static void pmcraid_send_hcam(struct pmcraid_instance *pinstance, u8 type) | |
1263 | { | |
1264 | struct pmcraid_cmd *cmd = pmcraid_init_hcam(pinstance, type); | |
1265 | pmcraid_send_hcam_cmd(cmd); | |
1266 | } | |
1267 | ||
1268 | ||
1269 | /** | |
1270 | * pmcraid_prepare_cancel_cmd - prepares a command block to abort another | |
1271 | * | |
1272 | * @cmd: pointer to cmd that is used as cancelling command | |
1273 | * @cmd_to_cancel: pointer to the command that needs to be cancelled | |
1274 | */ | |
1275 | static void pmcraid_prepare_cancel_cmd( | |
1276 | struct pmcraid_cmd *cmd, | |
1277 | struct pmcraid_cmd *cmd_to_cancel | |
1278 | ) | |
1279 | { | |
1280 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
1281 | __be64 ioarcb_addr = cmd_to_cancel->ioa_cb->ioarcb.ioarcb_bus_addr; | |
1282 | ||
1283 | /* Get the resource handle to where the command to be aborted has been | |
1284 | * sent. | |
1285 | */ | |
1286 | ioarcb->resource_handle = cmd_to_cancel->ioa_cb->ioarcb.resource_handle; | |
1287 | ioarcb->request_type = REQ_TYPE_IOACMD; | |
1288 | memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN); | |
1289 | ioarcb->cdb[0] = PMCRAID_ABORT_CMD; | |
1290 | ||
1291 | /* IOARCB address of the command to be cancelled is given in | |
1292 | * cdb[2]..cdb[9] is Big-Endian format. Note that length bits in | |
1293 | * IOARCB address are not masked. | |
1294 | */ | |
1295 | ioarcb_addr = cpu_to_be64(ioarcb_addr); | |
1296 | memcpy(&(ioarcb->cdb[2]), &ioarcb_addr, sizeof(ioarcb_addr)); | |
1297 | } | |
1298 | ||
1299 | /** | |
1300 | * pmcraid_cancel_hcam - sends ABORT task to abort a given HCAM | |
1301 | * | |
1302 | * @cmd: command to be used as cancelling command | |
1303 | * @type: HCAM type | |
1304 | * @cmd_done: op done function for the cancelling command | |
1305 | */ | |
1306 | static void pmcraid_cancel_hcam( | |
1307 | struct pmcraid_cmd *cmd, | |
1308 | u8 type, | |
1309 | void (*cmd_done) (struct pmcraid_cmd *) | |
1310 | ) | |
1311 | { | |
1312 | struct pmcraid_instance *pinstance; | |
1313 | struct pmcraid_hostrcb *hcam; | |
1314 | ||
1315 | pinstance = cmd->drv_inst; | |
1316 | hcam = (type == PMCRAID_HCAM_CODE_LOG_DATA) ? | |
1317 | &pinstance->ldn : &pinstance->ccn; | |
1318 | ||
1319 | /* prepare for cancelling previous hcam command. If the HCAM is | |
1320 | * currently not pending with IOA, we would have hcam->cmd as non-null | |
1321 | */ | |
1322 | if (hcam->cmd == NULL) | |
1323 | return; | |
1324 | ||
1325 | pmcraid_prepare_cancel_cmd(cmd, hcam->cmd); | |
1326 | ||
1327 | /* writing to IOARRIN must be protected by host_lock, as mid-layer | |
1328 | * schedule queuecommand while we are doing this | |
1329 | */ | |
1330 | pmcraid_send_cmd(cmd, cmd_done, | |
1331 | PMCRAID_INTERNAL_TIMEOUT, | |
1332 | pmcraid_timeout_handler); | |
1333 | } | |
1334 | ||
1335 | /** | |
1336 | * pmcraid_cancel_ccn - cancel CCN HCAM already registered with IOA | |
1337 | * | |
1338 | * @cmd: command block to be used for cancelling the HCAM | |
1339 | */ | |
1340 | static void pmcraid_cancel_ccn(struct pmcraid_cmd *cmd) | |
1341 | { | |
1342 | pmcraid_info("response for Cancel LDN CDB[0] = %x ioasc = %x\n", | |
1343 | cmd->ioa_cb->ioarcb.cdb[0], | |
1344 | le32_to_cpu(cmd->ioa_cb->ioasa.ioasc)); | |
1345 | ||
1346 | pmcraid_reinit_cmdblk(cmd); | |
1347 | ||
1348 | pmcraid_cancel_hcam(cmd, | |
1349 | PMCRAID_HCAM_CODE_CONFIG_CHANGE, | |
1350 | pmcraid_ioa_shutdown); | |
1351 | } | |
1352 | ||
1353 | /** | |
1354 | * pmcraid_cancel_ldn - cancel LDN HCAM already registered with IOA | |
1355 | * | |
1356 | * @cmd: command block to be used for cancelling the HCAM | |
1357 | */ | |
1358 | static void pmcraid_cancel_ldn(struct pmcraid_cmd *cmd) | |
1359 | { | |
1360 | pmcraid_cancel_hcam(cmd, | |
1361 | PMCRAID_HCAM_CODE_LOG_DATA, | |
1362 | pmcraid_cancel_ccn); | |
1363 | } | |
1364 | ||
1365 | /** | |
1366 | * pmcraid_expose_resource - check if the resource can be exposed to OS | |
1367 | * | |
c20c4267 | 1368 | * @fw_version: firmware version code |
89a36810 AR |
1369 | * @cfgte: pointer to configuration table entry of the resource |
1370 | * | |
1371 | * Return value: | |
c20c4267 | 1372 | * true if resource can be added to midlayer, false(0) otherwise |
89a36810 | 1373 | */ |
c20c4267 AR |
1374 | static int pmcraid_expose_resource(u16 fw_version, |
1375 | struct pmcraid_config_table_entry *cfgte) | |
89a36810 AR |
1376 | { |
1377 | int retval = 0; | |
1378 | ||
c20c4267 AR |
1379 | if (cfgte->resource_type == RES_TYPE_VSET) { |
1380 | if (fw_version <= PMCRAID_FW_VERSION_1) | |
1381 | retval = ((cfgte->unique_flags1 & 0x80) == 0); | |
1382 | else | |
1383 | retval = ((cfgte->unique_flags0 & 0x80) == 0 && | |
1384 | (cfgte->unique_flags1 & 0x80) == 0); | |
1385 | ||
1386 | } else if (cfgte->resource_type == RES_TYPE_GSCSI) | |
89a36810 AR |
1387 | retval = (RES_BUS(cfgte->resource_address) != |
1388 | PMCRAID_VIRTUAL_ENCL_BUS_ID); | |
1389 | return retval; | |
1390 | } | |
1391 | ||
1392 | /* attributes supported by pmcraid_event_family */ | |
1393 | enum { | |
1394 | PMCRAID_AEN_ATTR_UNSPEC, | |
1395 | PMCRAID_AEN_ATTR_EVENT, | |
1396 | __PMCRAID_AEN_ATTR_MAX, | |
1397 | }; | |
1398 | #define PMCRAID_AEN_ATTR_MAX (__PMCRAID_AEN_ATTR_MAX - 1) | |
1399 | ||
1400 | /* commands supported by pmcraid_event_family */ | |
1401 | enum { | |
1402 | PMCRAID_AEN_CMD_UNSPEC, | |
1403 | PMCRAID_AEN_CMD_EVENT, | |
1404 | __PMCRAID_AEN_CMD_MAX, | |
1405 | }; | |
1406 | #define PMCRAID_AEN_CMD_MAX (__PMCRAID_AEN_CMD_MAX - 1) | |
1407 | ||
1408 | static struct genl_family pmcraid_event_family = { | |
1409 | .id = GENL_ID_GENERATE, | |
1410 | .name = "pmcraid", | |
1411 | .version = 1, | |
1412 | .maxattr = PMCRAID_AEN_ATTR_MAX | |
1413 | }; | |
1414 | ||
1415 | /** | |
1416 | * pmcraid_netlink_init - registers pmcraid_event_family | |
1417 | * | |
1418 | * Return value: | |
c20c4267 AR |
1419 | * 0 if the pmcraid_event_family is successfully registered |
1420 | * with netlink generic, non-zero otherwise | |
89a36810 AR |
1421 | */ |
1422 | static int pmcraid_netlink_init(void) | |
1423 | { | |
1424 | int result; | |
1425 | ||
1426 | result = genl_register_family(&pmcraid_event_family); | |
1427 | ||
1428 | if (result) | |
1429 | return result; | |
1430 | ||
1431 | pmcraid_info("registered NETLINK GENERIC group: %d\n", | |
1432 | pmcraid_event_family.id); | |
1433 | ||
1434 | return result; | |
1435 | } | |
1436 | ||
1437 | /** | |
1438 | * pmcraid_netlink_release - unregisters pmcraid_event_family | |
1439 | * | |
1440 | * Return value: | |
c20c4267 | 1441 | * none |
89a36810 AR |
1442 | */ |
1443 | static void pmcraid_netlink_release(void) | |
1444 | { | |
1445 | genl_unregister_family(&pmcraid_event_family); | |
1446 | } | |
1447 | ||
1448 | /** | |
1449 | * pmcraid_notify_aen - sends event msg to user space application | |
1450 | * @pinstance: pointer to adapter instance structure | |
1451 | * @type: HCAM type | |
1452 | * | |
1453 | * Return value: | |
1454 | * 0 if success, error value in case of any failure. | |
1455 | */ | |
c20c4267 AR |
1456 | static int pmcraid_notify_aen( |
1457 | struct pmcraid_instance *pinstance, | |
1458 | struct pmcraid_aen_msg *aen_msg, | |
1459 | u32 data_size | |
1460 | ) | |
89a36810 AR |
1461 | { |
1462 | struct sk_buff *skb; | |
89a36810 | 1463 | void *msg_header; |
c20c4267 | 1464 | u32 total_size, nla_genl_hdr_total_size; |
89a36810 AR |
1465 | int result; |
1466 | ||
89a36810 AR |
1467 | aen_msg->hostno = (pinstance->host->unique_id << 16 | |
1468 | MINOR(pinstance->cdev.dev)); | |
1469 | aen_msg->length = data_size; | |
c20c4267 | 1470 | |
89a36810 AR |
1471 | data_size += sizeof(*aen_msg); |
1472 | ||
1473 | total_size = nla_total_size(data_size); | |
c20c4267 AR |
1474 | /* Add GENL_HDR to total_size */ |
1475 | nla_genl_hdr_total_size = | |
1476 | (total_size + (GENL_HDRLEN + | |
1477 | ((struct genl_family *)&pmcraid_event_family)->hdrsize) | |
1478 | + NLMSG_HDRLEN); | |
1479 | skb = genlmsg_new(nla_genl_hdr_total_size, GFP_ATOMIC); | |
89a36810 AR |
1480 | |
1481 | ||
1482 | if (!skb) { | |
1483 | pmcraid_err("Failed to allocate aen data SKB of size: %x\n", | |
1484 | total_size); | |
1485 | return -ENOMEM; | |
1486 | } | |
1487 | ||
1488 | /* add the genetlink message header */ | |
1489 | msg_header = genlmsg_put(skb, 0, 0, | |
1490 | &pmcraid_event_family, 0, | |
1491 | PMCRAID_AEN_CMD_EVENT); | |
1492 | if (!msg_header) { | |
1493 | pmcraid_err("failed to copy command details\n"); | |
1494 | nlmsg_free(skb); | |
1495 | return -ENOMEM; | |
1496 | } | |
1497 | ||
1498 | result = nla_put(skb, PMCRAID_AEN_ATTR_EVENT, data_size, aen_msg); | |
1499 | ||
1500 | if (result) { | |
c20c4267 | 1501 | pmcraid_err("failed to copy AEN attribute data\n"); |
89a36810 AR |
1502 | nlmsg_free(skb); |
1503 | return -EINVAL; | |
1504 | } | |
1505 | ||
1506 | /* send genetlink multicast message to notify appplications */ | |
1507 | result = genlmsg_end(skb, msg_header); | |
1508 | ||
1509 | if (result < 0) { | |
1510 | pmcraid_err("genlmsg_end failed\n"); | |
1511 | nlmsg_free(skb); | |
1512 | return result; | |
1513 | } | |
1514 | ||
1515 | result = | |
1516 | genlmsg_multicast(skb, 0, pmcraid_event_family.id, GFP_ATOMIC); | |
1517 | ||
1518 | /* If there are no listeners, genlmsg_multicast may return non-zero | |
1519 | * value. | |
1520 | */ | |
1521 | if (result) | |
c20c4267 | 1522 | pmcraid_info("error (%x) sending aen event message\n", result); |
89a36810 AR |
1523 | return result; |
1524 | } | |
1525 | ||
c20c4267 AR |
1526 | /** |
1527 | * pmcraid_notify_ccn - notifies about CCN event msg to user space | |
1528 | * @pinstance: pointer adapter instance structure | |
1529 | * | |
1530 | * Return value: | |
1531 | * 0 if success, error value in case of any failure | |
1532 | */ | |
1533 | static int pmcraid_notify_ccn(struct pmcraid_instance *pinstance) | |
1534 | { | |
1535 | return pmcraid_notify_aen(pinstance, | |
1536 | pinstance->ccn.msg, | |
1537 | pinstance->ccn.hcam->data_len + | |
1538 | sizeof(struct pmcraid_hcam_hdr)); | |
1539 | } | |
1540 | ||
1541 | /** | |
1542 | * pmcraid_notify_ldn - notifies about CCN event msg to user space | |
1543 | * @pinstance: pointer adapter instance structure | |
1544 | * | |
1545 | * Return value: | |
1546 | * 0 if success, error value in case of any failure | |
1547 | */ | |
1548 | static int pmcraid_notify_ldn(struct pmcraid_instance *pinstance) | |
1549 | { | |
1550 | return pmcraid_notify_aen(pinstance, | |
1551 | pinstance->ldn.msg, | |
1552 | pinstance->ldn.hcam->data_len + | |
1553 | sizeof(struct pmcraid_hcam_hdr)); | |
1554 | } | |
1555 | ||
1556 | /** | |
1557 | * pmcraid_notify_ioastate - sends IOA state event msg to user space | |
1558 | * @pinstance: pointer adapter instance structure | |
1559 | * @evt: controller state event to be sent | |
1560 | * | |
1561 | * Return value: | |
1562 | * 0 if success, error value in case of any failure | |
1563 | */ | |
1564 | static void pmcraid_notify_ioastate(struct pmcraid_instance *pinstance, u32 evt) | |
1565 | { | |
1566 | pinstance->scn.ioa_state = evt; | |
1567 | pmcraid_notify_aen(pinstance, | |
1568 | &pinstance->scn.msg, | |
1569 | sizeof(u32)); | |
1570 | } | |
1571 | ||
89a36810 AR |
1572 | /** |
1573 | * pmcraid_handle_config_change - Handle a config change from the adapter | |
1574 | * @pinstance: pointer to per adapter instance structure | |
1575 | * | |
1576 | * Return value: | |
1577 | * none | |
1578 | */ | |
729c8456 | 1579 | |
89a36810 AR |
1580 | static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance) |
1581 | { | |
1582 | struct pmcraid_config_table_entry *cfg_entry; | |
1583 | struct pmcraid_hcam_ccn *ccn_hcam; | |
1584 | struct pmcraid_cmd *cmd; | |
1585 | struct pmcraid_cmd *cfgcmd; | |
1586 | struct pmcraid_resource_entry *res = NULL; | |
89a36810 AR |
1587 | unsigned long lock_flags; |
1588 | unsigned long host_lock_flags; | |
729c8456 AR |
1589 | u32 new_entry = 1; |
1590 | u32 hidden_entry = 0; | |
c20c4267 | 1591 | u16 fw_version; |
89a36810 AR |
1592 | int rc; |
1593 | ||
1594 | ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam; | |
1595 | cfg_entry = &ccn_hcam->cfg_entry; | |
c20c4267 | 1596 | fw_version = be16_to_cpu(pinstance->inq_data->fw_version); |
89a36810 | 1597 | |
592488a3 AR |
1598 | pmcraid_info("CCN(%x): %x timestamp: %llx type: %x lost: %x flags: %x \ |
1599 | res: %x:%x:%x:%x\n", | |
89a36810 AR |
1600 | pinstance->ccn.hcam->ilid, |
1601 | pinstance->ccn.hcam->op_code, | |
592488a3 AR |
1602 | ((pinstance->ccn.hcam->timestamp1) | |
1603 | ((pinstance->ccn.hcam->timestamp2 & 0xffffffffLL) << 32)), | |
89a36810 AR |
1604 | pinstance->ccn.hcam->notification_type, |
1605 | pinstance->ccn.hcam->notification_lost, | |
1606 | pinstance->ccn.hcam->flags, | |
1607 | pinstance->host->unique_id, | |
1608 | RES_IS_VSET(*cfg_entry) ? PMCRAID_VSET_BUS_ID : | |
1609 | (RES_IS_GSCSI(*cfg_entry) ? PMCRAID_PHYS_BUS_ID : | |
1610 | RES_BUS(cfg_entry->resource_address)), | |
c20c4267 AR |
1611 | RES_IS_VSET(*cfg_entry) ? |
1612 | (fw_version <= PMCRAID_FW_VERSION_1 ? | |
1613 | cfg_entry->unique_flags1 : | |
1614 | cfg_entry->array_id & 0xFF) : | |
89a36810 AR |
1615 | RES_TARGET(cfg_entry->resource_address), |
1616 | RES_LUN(cfg_entry->resource_address)); | |
1617 | ||
1618 | ||
1619 | /* If this HCAM indicates a lost notification, read the config table */ | |
1620 | if (pinstance->ccn.hcam->notification_lost) { | |
1621 | cfgcmd = pmcraid_get_free_cmd(pinstance); | |
1622 | if (cfgcmd) { | |
1623 | pmcraid_info("lost CCN, reading config table\b"); | |
1624 | pinstance->reinit_cfg_table = 1; | |
1625 | pmcraid_querycfg(cfgcmd); | |
1626 | } else { | |
1627 | pmcraid_err("lost CCN, no free cmd for querycfg\n"); | |
1628 | } | |
1629 | goto out_notify_apps; | |
1630 | } | |
1631 | ||
1632 | /* If this resource is not going to be added to mid-layer, just notify | |
729c8456 AR |
1633 | * applications and return. If this notification is about hiding a VSET |
1634 | * resource, check if it was exposed already. | |
89a36810 | 1635 | */ |
729c8456 AR |
1636 | if (pinstance->ccn.hcam->notification_type == |
1637 | NOTIFICATION_TYPE_ENTRY_CHANGED && | |
c20c4267 AR |
1638 | cfg_entry->resource_type == RES_TYPE_VSET) { |
1639 | ||
1640 | if (fw_version <= PMCRAID_FW_VERSION_1) | |
1641 | hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0; | |
1642 | else | |
1643 | hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0; | |
1644 | ||
1645 | } else if (!pmcraid_expose_resource(fw_version, cfg_entry)) { | |
89a36810 | 1646 | goto out_notify_apps; |
c20c4267 | 1647 | } |
89a36810 AR |
1648 | |
1649 | spin_lock_irqsave(&pinstance->resource_lock, lock_flags); | |
1650 | list_for_each_entry(res, &pinstance->used_res_q, queue) { | |
1651 | rc = memcmp(&res->cfg_entry.resource_address, | |
1652 | &cfg_entry->resource_address, | |
1653 | sizeof(cfg_entry->resource_address)); | |
1654 | if (!rc) { | |
1655 | new_entry = 0; | |
1656 | break; | |
1657 | } | |
1658 | } | |
1659 | ||
1660 | if (new_entry) { | |
1661 | ||
729c8456 AR |
1662 | if (hidden_entry) { |
1663 | spin_unlock_irqrestore(&pinstance->resource_lock, | |
1664 | lock_flags); | |
1665 | goto out_notify_apps; | |
1666 | } | |
1667 | ||
89a36810 AR |
1668 | /* If there are more number of resources than what driver can |
1669 | * manage, do not notify the applications about the CCN. Just | |
1670 | * ignore this notifications and re-register the same HCAM | |
1671 | */ | |
1672 | if (list_empty(&pinstance->free_res_q)) { | |
1673 | spin_unlock_irqrestore(&pinstance->resource_lock, | |
1674 | lock_flags); | |
1675 | pmcraid_err("too many resources attached\n"); | |
1676 | spin_lock_irqsave(pinstance->host->host_lock, | |
1677 | host_lock_flags); | |
1678 | pmcraid_send_hcam(pinstance, | |
1679 | PMCRAID_HCAM_CODE_CONFIG_CHANGE); | |
1680 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
1681 | host_lock_flags); | |
1682 | return; | |
1683 | } | |
1684 | ||
1685 | res = list_entry(pinstance->free_res_q.next, | |
1686 | struct pmcraid_resource_entry, queue); | |
1687 | ||
1688 | list_del(&res->queue); | |
1689 | res->scsi_dev = NULL; | |
1690 | res->reset_progress = 0; | |
1691 | list_add_tail(&res->queue, &pinstance->used_res_q); | |
1692 | } | |
1693 | ||
c20c4267 | 1694 | memcpy(&res->cfg_entry, cfg_entry, pinstance->config_table_entry_size); |
89a36810 AR |
1695 | |
1696 | if (pinstance->ccn.hcam->notification_type == | |
729c8456 | 1697 | NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) { |
89a36810 | 1698 | if (res->scsi_dev) { |
c20c4267 AR |
1699 | if (fw_version <= PMCRAID_FW_VERSION_1) |
1700 | res->cfg_entry.unique_flags1 &= 0x7F; | |
1701 | else | |
1702 | res->cfg_entry.array_id &= 0xFF; | |
89a36810 AR |
1703 | res->change_detected = RES_CHANGE_DEL; |
1704 | res->cfg_entry.resource_handle = | |
1705 | PMCRAID_INVALID_RES_HANDLE; | |
1706 | schedule_work(&pinstance->worker_q); | |
1707 | } else { | |
1708 | /* This may be one of the non-exposed resources */ | |
1709 | list_move_tail(&res->queue, &pinstance->free_res_q); | |
1710 | } | |
1711 | } else if (!res->scsi_dev) { | |
1712 | res->change_detected = RES_CHANGE_ADD; | |
1713 | schedule_work(&pinstance->worker_q); | |
1714 | } | |
1715 | spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags); | |
1716 | ||
1717 | out_notify_apps: | |
1718 | ||
1719 | /* Notify configuration changes to registered applications.*/ | |
1720 | if (!pmcraid_disable_aen) | |
c20c4267 | 1721 | pmcraid_notify_ccn(pinstance); |
89a36810 AR |
1722 | |
1723 | cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE); | |
1724 | if (cmd) | |
1725 | pmcraid_send_hcam_cmd(cmd); | |
1726 | } | |
1727 | ||
1728 | /** | |
1729 | * pmcraid_get_error_info - return error string for an ioasc | |
1730 | * @ioasc: ioasc code | |
1731 | * Return Value | |
1732 | * none | |
1733 | */ | |
1734 | static struct pmcraid_ioasc_error *pmcraid_get_error_info(u32 ioasc) | |
1735 | { | |
1736 | int i; | |
1737 | for (i = 0; i < ARRAY_SIZE(pmcraid_ioasc_error_table); i++) { | |
1738 | if (pmcraid_ioasc_error_table[i].ioasc_code == ioasc) | |
1739 | return &pmcraid_ioasc_error_table[i]; | |
1740 | } | |
1741 | return NULL; | |
1742 | } | |
1743 | ||
1744 | /** | |
1745 | * pmcraid_ioasc_logger - log IOASC information based user-settings | |
1746 | * @ioasc: ioasc code | |
1747 | * @cmd: pointer to command that resulted in 'ioasc' | |
1748 | */ | |
1749 | void pmcraid_ioasc_logger(u32 ioasc, struct pmcraid_cmd *cmd) | |
1750 | { | |
1751 | struct pmcraid_ioasc_error *error_info = pmcraid_get_error_info(ioasc); | |
1752 | ||
1753 | if (error_info == NULL || | |
1754 | cmd->drv_inst->current_log_level < error_info->log_level) | |
1755 | return; | |
1756 | ||
1757 | /* log the error string */ | |
c20c4267 | 1758 | pmcraid_err("cmd [%x] for resource %x failed with %x(%s)\n", |
89a36810 AR |
1759 | cmd->ioa_cb->ioarcb.cdb[0], |
1760 | cmd->ioa_cb->ioarcb.resource_handle, | |
1761 | le32_to_cpu(ioasc), error_info->error_string); | |
1762 | } | |
1763 | ||
1764 | /** | |
1765 | * pmcraid_handle_error_log - Handle a config change (error log) from the IOA | |
1766 | * | |
1767 | * @pinstance: pointer to per adapter instance structure | |
1768 | * | |
1769 | * Return value: | |
1770 | * none | |
1771 | */ | |
1772 | static void pmcraid_handle_error_log(struct pmcraid_instance *pinstance) | |
1773 | { | |
1774 | struct pmcraid_hcam_ldn *hcam_ldn; | |
1775 | u32 ioasc; | |
1776 | ||
1777 | hcam_ldn = (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam; | |
1778 | ||
1779 | pmcraid_info | |
1780 | ("LDN(%x): %x type: %x lost: %x flags: %x overlay id: %x\n", | |
1781 | pinstance->ldn.hcam->ilid, | |
1782 | pinstance->ldn.hcam->op_code, | |
1783 | pinstance->ldn.hcam->notification_type, | |
1784 | pinstance->ldn.hcam->notification_lost, | |
1785 | pinstance->ldn.hcam->flags, | |
1786 | pinstance->ldn.hcam->overlay_id); | |
1787 | ||
1788 | /* log only the errors, no need to log informational log entries */ | |
1789 | if (pinstance->ldn.hcam->notification_type != | |
1790 | NOTIFICATION_TYPE_ERROR_LOG) | |
1791 | return; | |
1792 | ||
1793 | if (pinstance->ldn.hcam->notification_lost == | |
1794 | HOSTRCB_NOTIFICATIONS_LOST) | |
34876402 | 1795 | dev_info(&pinstance->pdev->dev, "Error notifications lost\n"); |
89a36810 AR |
1796 | |
1797 | ioasc = le32_to_cpu(hcam_ldn->error_log.fd_ioasc); | |
1798 | ||
1799 | if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET || | |
1800 | ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER) { | |
34876402 | 1801 | dev_info(&pinstance->pdev->dev, |
89a36810 AR |
1802 | "UnitAttention due to IOA Bus Reset\n"); |
1803 | scsi_report_bus_reset( | |
1804 | pinstance->host, | |
1805 | RES_BUS(hcam_ldn->error_log.fd_ra)); | |
1806 | } | |
1807 | ||
1808 | return; | |
1809 | } | |
1810 | ||
1811 | /** | |
1812 | * pmcraid_process_ccn - Op done function for a CCN. | |
1813 | * @cmd: pointer to command struct | |
1814 | * | |
1815 | * This function is the op done function for a configuration | |
1816 | * change notification | |
1817 | * | |
1818 | * Return value: | |
1819 | * none | |
1820 | */ | |
1821 | static void pmcraid_process_ccn(struct pmcraid_cmd *cmd) | |
1822 | { | |
1823 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1824 | u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
1825 | unsigned long lock_flags; | |
1826 | ||
1827 | pinstance->ccn.cmd = NULL; | |
1828 | pmcraid_return_cmd(cmd); | |
1829 | ||
1830 | /* If driver initiated IOA reset happened while this hcam was pending | |
1831 | * with IOA, or IOA bringdown sequence is in progress, no need to | |
1832 | * re-register the hcam | |
1833 | */ | |
1834 | if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET || | |
1835 | atomic_read(&pinstance->ccn.ignore) == 1) { | |
1836 | return; | |
1837 | } else if (ioasc) { | |
34876402 | 1838 | dev_info(&pinstance->pdev->dev, |
89a36810 AR |
1839 | "Host RCB (CCN) failed with IOASC: 0x%08X\n", ioasc); |
1840 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
1841 | pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE); | |
1842 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
1843 | } else { | |
1844 | pmcraid_handle_config_change(pinstance); | |
1845 | } | |
1846 | } | |
1847 | ||
1848 | /** | |
1849 | * pmcraid_process_ldn - op done function for an LDN | |
1850 | * @cmd: pointer to command block | |
1851 | * | |
1852 | * Return value | |
1853 | * none | |
1854 | */ | |
1855 | static void pmcraid_initiate_reset(struct pmcraid_instance *); | |
592488a3 | 1856 | static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd); |
89a36810 AR |
1857 | |
1858 | static void pmcraid_process_ldn(struct pmcraid_cmd *cmd) | |
1859 | { | |
1860 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1861 | struct pmcraid_hcam_ldn *ldn_hcam = | |
1862 | (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam; | |
1863 | u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
1864 | u32 fd_ioasc = le32_to_cpu(ldn_hcam->error_log.fd_ioasc); | |
1865 | unsigned long lock_flags; | |
1866 | ||
1867 | /* return the command block back to freepool */ | |
1868 | pinstance->ldn.cmd = NULL; | |
1869 | pmcraid_return_cmd(cmd); | |
1870 | ||
1871 | /* If driver initiated IOA reset happened while this hcam was pending | |
1872 | * with IOA, no need to re-register the hcam as reset engine will do it | |
1873 | * once reset sequence is complete | |
1874 | */ | |
1875 | if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET || | |
1876 | atomic_read(&pinstance->ccn.ignore) == 1) { | |
1877 | return; | |
1878 | } else if (!ioasc) { | |
1879 | pmcraid_handle_error_log(pinstance); | |
1880 | if (fd_ioasc == PMCRAID_IOASC_NR_IOA_RESET_REQUIRED) { | |
1881 | spin_lock_irqsave(pinstance->host->host_lock, | |
1882 | lock_flags); | |
1883 | pmcraid_initiate_reset(pinstance); | |
1884 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
1885 | lock_flags); | |
1886 | return; | |
1887 | } | |
592488a3 AR |
1888 | if (fd_ioasc == PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC) { |
1889 | pinstance->timestamp_error = 1; | |
1890 | pmcraid_set_timestamp(cmd); | |
1891 | } | |
89a36810 | 1892 | } else { |
34876402 | 1893 | dev_info(&pinstance->pdev->dev, |
89a36810 AR |
1894 | "Host RCB(LDN) failed with IOASC: 0x%08X\n", ioasc); |
1895 | } | |
1896 | /* send netlink message for HCAM notification if enabled */ | |
1897 | if (!pmcraid_disable_aen) | |
c20c4267 | 1898 | pmcraid_notify_ldn(pinstance); |
89a36810 AR |
1899 | |
1900 | cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA); | |
1901 | if (cmd) | |
1902 | pmcraid_send_hcam_cmd(cmd); | |
1903 | } | |
1904 | ||
1905 | /** | |
1906 | * pmcraid_register_hcams - register HCAMs for CCN and LDN | |
1907 | * | |
1908 | * @pinstance: pointer per adapter instance structure | |
1909 | * | |
1910 | * Return Value | |
1911 | * none | |
1912 | */ | |
1913 | static void pmcraid_register_hcams(struct pmcraid_instance *pinstance) | |
1914 | { | |
1915 | pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE); | |
1916 | pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA); | |
1917 | } | |
1918 | ||
1919 | /** | |
1920 | * pmcraid_unregister_hcams - cancel HCAMs registered already | |
1921 | * @cmd: pointer to command used as part of reset sequence | |
1922 | */ | |
1923 | static void pmcraid_unregister_hcams(struct pmcraid_cmd *cmd) | |
1924 | { | |
1925 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1926 | ||
1927 | /* During IOA bringdown, HCAM gets fired and tasklet proceeds with | |
1928 | * handling hcam response though it is not necessary. In order to | |
1929 | * prevent this, set 'ignore', so that bring-down sequence doesn't | |
1930 | * re-send any more hcams | |
1931 | */ | |
1932 | atomic_set(&pinstance->ccn.ignore, 1); | |
1933 | atomic_set(&pinstance->ldn.ignore, 1); | |
1934 | ||
1935 | /* If adapter reset was forced as part of runtime reset sequence, | |
c20c4267 AR |
1936 | * start the reset sequence. Reset will be triggered even in case |
1937 | * IOA unit_check. | |
89a36810 | 1938 | */ |
c20c4267 AR |
1939 | if ((pinstance->force_ioa_reset && !pinstance->ioa_bringdown) || |
1940 | pinstance->ioa_unit_check) { | |
89a36810 | 1941 | pinstance->force_ioa_reset = 0; |
c20c4267 | 1942 | pinstance->ioa_unit_check = 0; |
89a36810 AR |
1943 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; |
1944 | pmcraid_reset_alert(cmd); | |
1945 | return; | |
1946 | } | |
1947 | ||
1948 | /* Driver tries to cancel HCAMs by sending ABORT TASK for each HCAM | |
1949 | * one after the other. So CCN cancellation will be triggered by | |
1950 | * pmcraid_cancel_ldn itself. | |
1951 | */ | |
1952 | pmcraid_cancel_ldn(cmd); | |
1953 | } | |
1954 | ||
1955 | /** | |
1956 | * pmcraid_reset_enable_ioa - re-enable IOA after a hard reset | |
1957 | * @pinstance: pointer to adapter instance structure | |
1958 | * Return Value | |
1959 | * 1 if TRANSITION_TO_OPERATIONAL is active, otherwise 0 | |
1960 | */ | |
1961 | static void pmcraid_reinit_buffers(struct pmcraid_instance *); | |
1962 | ||
1963 | static int pmcraid_reset_enable_ioa(struct pmcraid_instance *pinstance) | |
1964 | { | |
1965 | u32 intrs; | |
1966 | ||
1967 | pmcraid_reinit_buffers(pinstance); | |
1968 | intrs = pmcraid_read_interrupts(pinstance); | |
1969 | ||
1970 | pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS); | |
1971 | ||
1972 | if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) { | |
c20c4267 AR |
1973 | if (!pinstance->interrupt_mode) { |
1974 | iowrite32(INTRS_TRANSITION_TO_OPERATIONAL, | |
1975 | pinstance->int_regs. | |
1976 | ioa_host_interrupt_mask_reg); | |
1977 | iowrite32(INTRS_TRANSITION_TO_OPERATIONAL, | |
1978 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
1979 | } | |
89a36810 AR |
1980 | return 1; |
1981 | } else { | |
1982 | return 0; | |
1983 | } | |
1984 | } | |
1985 | ||
1986 | /** | |
1987 | * pmcraid_soft_reset - performs a soft reset and makes IOA become ready | |
1988 | * @cmd : pointer to reset command block | |
1989 | * | |
1990 | * Return Value | |
1991 | * none | |
1992 | */ | |
1993 | static void pmcraid_soft_reset(struct pmcraid_cmd *cmd) | |
1994 | { | |
1995 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1996 | u32 int_reg; | |
1997 | u32 doorbell; | |
1998 | ||
1999 | /* There will be an interrupt when Transition to Operational bit is | |
2000 | * set so tasklet would execute next reset task. The timeout handler | |
2001 | * would re-initiate a reset | |
2002 | */ | |
2003 | cmd->cmd_done = pmcraid_ioa_reset; | |
2004 | cmd->timer.data = (unsigned long)cmd; | |
2005 | cmd->timer.expires = jiffies + | |
2006 | msecs_to_jiffies(PMCRAID_TRANSOP_TIMEOUT); | |
2007 | cmd->timer.function = (void (*)(unsigned long))pmcraid_timeout_handler; | |
2008 | ||
2009 | if (!timer_pending(&cmd->timer)) | |
2010 | add_timer(&cmd->timer); | |
2011 | ||
2012 | /* Enable destructive diagnostics on IOA if it is not yet in | |
2013 | * operational state | |
2014 | */ | |
2015 | doorbell = DOORBELL_RUNTIME_RESET | | |
2016 | DOORBELL_ENABLE_DESTRUCTIVE_DIAGS; | |
2017 | ||
c20c4267 AR |
2018 | /* Since we do RESET_ALERT and Start BIST we have to again write |
2019 | * MSIX Doorbell to indicate the interrupt mode | |
2020 | */ | |
2021 | if (pinstance->interrupt_mode) { | |
2022 | iowrite32(DOORBELL_INTR_MODE_MSIX, | |
2023 | pinstance->int_regs.host_ioa_interrupt_reg); | |
2024 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
2025 | } | |
2026 | ||
89a36810 | 2027 | iowrite32(doorbell, pinstance->int_regs.host_ioa_interrupt_reg); |
c20c4267 | 2028 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg), |
89a36810 | 2029 | int_reg = ioread32(pinstance->int_regs.ioa_host_interrupt_reg); |
c20c4267 | 2030 | |
89a36810 AR |
2031 | pmcraid_info("Waiting for IOA to become operational %x:%x\n", |
2032 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg), | |
2033 | int_reg); | |
2034 | } | |
2035 | ||
2036 | /** | |
2037 | * pmcraid_get_dump - retrieves IOA dump in case of Unit Check interrupt | |
2038 | * | |
2039 | * @pinstance: pointer to adapter instance structure | |
2040 | * | |
2041 | * Return Value | |
2042 | * none | |
2043 | */ | |
2044 | static void pmcraid_get_dump(struct pmcraid_instance *pinstance) | |
2045 | { | |
2046 | pmcraid_info("%s is not yet implemented\n", __func__); | |
2047 | } | |
2048 | ||
2049 | /** | |
2050 | * pmcraid_fail_outstanding_cmds - Fails all outstanding ops. | |
2051 | * @pinstance: pointer to adapter instance structure | |
2052 | * | |
2053 | * This function fails all outstanding ops. If they are submitted to IOA | |
2054 | * already, it sends cancel all messages if IOA is still accepting IOARCBs, | |
2055 | * otherwise just completes the commands and returns the cmd blocks to free | |
2056 | * pool. | |
2057 | * | |
2058 | * Return value: | |
2059 | * none | |
2060 | */ | |
2061 | static void pmcraid_fail_outstanding_cmds(struct pmcraid_instance *pinstance) | |
2062 | { | |
2063 | struct pmcraid_cmd *cmd, *temp; | |
2064 | unsigned long lock_flags; | |
2065 | ||
2066 | /* pending command list is protected by pending_pool_lock. Its | |
2067 | * traversal must be done as within this lock | |
2068 | */ | |
2069 | spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags); | |
2070 | list_for_each_entry_safe(cmd, temp, &pinstance->pending_cmd_pool, | |
2071 | free_list) { | |
2072 | list_del(&cmd->free_list); | |
2073 | spin_unlock_irqrestore(&pinstance->pending_pool_lock, | |
2074 | lock_flags); | |
2075 | cmd->ioa_cb->ioasa.ioasc = | |
2076 | cpu_to_le32(PMCRAID_IOASC_IOA_WAS_RESET); | |
2077 | cmd->ioa_cb->ioasa.ilid = | |
2078 | cpu_to_be32(PMCRAID_DRIVER_ILID); | |
2079 | ||
2080 | /* In case the command timer is still running */ | |
2081 | del_timer(&cmd->timer); | |
2082 | ||
2083 | /* If this is an IO command, complete it by invoking scsi_done | |
2084 | * function. If this is one of the internal commands other | |
2085 | * than pmcraid_ioa_reset and HCAM commands invoke cmd_done to | |
2086 | * complete it | |
2087 | */ | |
2088 | if (cmd->scsi_cmd) { | |
2089 | ||
2090 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
2091 | __le32 resp = cmd->ioa_cb->ioarcb.response_handle; | |
2092 | ||
2093 | scsi_cmd->result |= DID_ERROR << 16; | |
2094 | ||
2095 | scsi_dma_unmap(scsi_cmd); | |
2096 | pmcraid_return_cmd(cmd); | |
2097 | ||
89a36810 AR |
2098 | pmcraid_info("failing(%d) CDB[0] = %x result: %x\n", |
2099 | le32_to_cpu(resp) >> 2, | |
2100 | cmd->ioa_cb->ioarcb.cdb[0], | |
2101 | scsi_cmd->result); | |
2102 | scsi_cmd->scsi_done(scsi_cmd); | |
2103 | } else if (cmd->cmd_done == pmcraid_internal_done || | |
2104 | cmd->cmd_done == pmcraid_erp_done) { | |
2105 | cmd->cmd_done(cmd); | |
c20c4267 AR |
2106 | } else if (cmd->cmd_done != pmcraid_ioa_reset && |
2107 | cmd->cmd_done != pmcraid_ioa_shutdown_done) { | |
89a36810 AR |
2108 | pmcraid_return_cmd(cmd); |
2109 | } | |
2110 | ||
2111 | atomic_dec(&pinstance->outstanding_cmds); | |
2112 | spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags); | |
2113 | } | |
2114 | ||
2115 | spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags); | |
2116 | } | |
2117 | ||
2118 | /** | |
2119 | * pmcraid_ioa_reset - Implementation of IOA reset logic | |
2120 | * | |
2121 | * @cmd: pointer to the cmd block to be used for entire reset process | |
2122 | * | |
2123 | * This function executes most of the steps required for IOA reset. This gets | |
2124 | * called by user threads (modprobe/insmod/rmmod) timer, tasklet and midlayer's | |
25985edc | 2125 | * 'eh_' thread. Access to variables used for controlling the reset sequence is |
89a36810 AR |
2126 | * synchronized using host lock. Various functions called during reset process |
2127 | * would make use of a single command block, pointer to which is also stored in | |
2128 | * adapter instance structure. | |
2129 | * | |
2130 | * Return Value | |
2131 | * None | |
2132 | */ | |
2133 | static void pmcraid_ioa_reset(struct pmcraid_cmd *cmd) | |
2134 | { | |
2135 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
2136 | u8 reset_complete = 0; | |
2137 | ||
2138 | pinstance->ioa_reset_in_progress = 1; | |
2139 | ||
2140 | if (pinstance->reset_cmd != cmd) { | |
2141 | pmcraid_err("reset is called with different command block\n"); | |
2142 | pinstance->reset_cmd = cmd; | |
2143 | } | |
2144 | ||
2145 | pmcraid_info("reset_engine: state = %d, command = %p\n", | |
2146 | pinstance->ioa_state, cmd); | |
2147 | ||
2148 | switch (pinstance->ioa_state) { | |
2149 | ||
2150 | case IOA_STATE_DEAD: | |
2151 | /* If IOA is offline, whatever may be the reset reason, just | |
2152 | * return. callers might be waiting on the reset wait_q, wake | |
2153 | * up them | |
2154 | */ | |
2155 | pmcraid_err("IOA is offline no reset is possible\n"); | |
2156 | reset_complete = 1; | |
2157 | break; | |
2158 | ||
2159 | case IOA_STATE_IN_BRINGDOWN: | |
2160 | /* we enter here, once ioa shutdown command is processed by IOA | |
2161 | * Alert IOA for a possible reset. If reset alert fails, IOA | |
2162 | * goes through hard-reset | |
2163 | */ | |
2164 | pmcraid_disable_interrupts(pinstance, ~0); | |
2165 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; | |
2166 | pmcraid_reset_alert(cmd); | |
2167 | break; | |
2168 | ||
2169 | case IOA_STATE_UNKNOWN: | |
2170 | /* We may be called during probe or resume. Some pre-processing | |
2171 | * is required for prior to reset | |
2172 | */ | |
2173 | scsi_block_requests(pinstance->host); | |
2174 | ||
2175 | /* If asked to reset while IOA was processing responses or | |
2176 | * there are any error responses then IOA may require | |
2177 | * hard-reset. | |
2178 | */ | |
2179 | if (pinstance->ioa_hard_reset == 0) { | |
2180 | if (ioread32(pinstance->ioa_status) & | |
2181 | INTRS_TRANSITION_TO_OPERATIONAL) { | |
2182 | pmcraid_info("sticky bit set, bring-up\n"); | |
2183 | pinstance->ioa_state = IOA_STATE_IN_BRINGUP; | |
2184 | pmcraid_reinit_cmdblk(cmd); | |
2185 | pmcraid_identify_hrrq(cmd); | |
2186 | } else { | |
2187 | pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET; | |
2188 | pmcraid_soft_reset(cmd); | |
2189 | } | |
2190 | } else { | |
2191 | /* Alert IOA of a possible reset and wait for critical | |
2192 | * operation in progress bit to reset | |
2193 | */ | |
2194 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; | |
2195 | pmcraid_reset_alert(cmd); | |
2196 | } | |
2197 | break; | |
2198 | ||
2199 | case IOA_STATE_IN_RESET_ALERT: | |
2200 | /* If critical operation in progress bit is reset or wait gets | |
2201 | * timed out, reset proceeds with starting BIST on the IOA. | |
2202 | * pmcraid_ioa_hard_reset keeps a count of reset attempts. If | |
2203 | * they are 3 or more, reset engine marks IOA dead and returns | |
2204 | */ | |
2205 | pinstance->ioa_state = IOA_STATE_IN_HARD_RESET; | |
2206 | pmcraid_start_bist(cmd); | |
2207 | break; | |
2208 | ||
2209 | case IOA_STATE_IN_HARD_RESET: | |
2210 | pinstance->ioa_reset_attempts++; | |
2211 | ||
2212 | /* retry reset if we haven't reached maximum allowed limit */ | |
2213 | if (pinstance->ioa_reset_attempts > PMCRAID_RESET_ATTEMPTS) { | |
2214 | pinstance->ioa_reset_attempts = 0; | |
2215 | pmcraid_err("IOA didn't respond marking it as dead\n"); | |
2216 | pinstance->ioa_state = IOA_STATE_DEAD; | |
c20c4267 AR |
2217 | |
2218 | if (pinstance->ioa_bringdown) | |
2219 | pmcraid_notify_ioastate(pinstance, | |
2220 | PMC_DEVICE_EVENT_SHUTDOWN_FAILED); | |
2221 | else | |
2222 | pmcraid_notify_ioastate(pinstance, | |
2223 | PMC_DEVICE_EVENT_RESET_FAILED); | |
89a36810 AR |
2224 | reset_complete = 1; |
2225 | break; | |
2226 | } | |
2227 | ||
2228 | /* Once either bist or pci reset is done, restore PCI config | |
2229 | * space. If this fails, proceed with hard reset again | |
2230 | */ | |
1d3c16a8 | 2231 | pci_restore_state(pinstance->pdev); |
89a36810 AR |
2232 | |
2233 | /* fail all pending commands */ | |
2234 | pmcraid_fail_outstanding_cmds(pinstance); | |
2235 | ||
2236 | /* check if unit check is active, if so extract dump */ | |
2237 | if (pinstance->ioa_unit_check) { | |
2238 | pmcraid_info("unit check is active\n"); | |
2239 | pinstance->ioa_unit_check = 0; | |
2240 | pmcraid_get_dump(pinstance); | |
2241 | pinstance->ioa_reset_attempts--; | |
2242 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; | |
2243 | pmcraid_reset_alert(cmd); | |
2244 | break; | |
2245 | } | |
2246 | ||
2247 | /* if the reset reason is to bring-down the ioa, we might be | |
2248 | * done with the reset restore pci_config_space and complete | |
2249 | * the reset | |
2250 | */ | |
2251 | if (pinstance->ioa_bringdown) { | |
2252 | pmcraid_info("bringing down the adapter\n"); | |
2253 | pinstance->ioa_shutdown_type = SHUTDOWN_NONE; | |
2254 | pinstance->ioa_bringdown = 0; | |
2255 | pinstance->ioa_state = IOA_STATE_UNKNOWN; | |
c20c4267 AR |
2256 | pmcraid_notify_ioastate(pinstance, |
2257 | PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS); | |
89a36810 AR |
2258 | reset_complete = 1; |
2259 | } else { | |
2260 | /* bring-up IOA, so proceed with soft reset | |
2261 | * Reinitialize hrrq_buffers and their indices also | |
2262 | * enable interrupts after a pci_restore_state | |
2263 | */ | |
2264 | if (pmcraid_reset_enable_ioa(pinstance)) { | |
2265 | pinstance->ioa_state = IOA_STATE_IN_BRINGUP; | |
2266 | pmcraid_info("bringing up the adapter\n"); | |
2267 | pmcraid_reinit_cmdblk(cmd); | |
2268 | pmcraid_identify_hrrq(cmd); | |
2269 | } else { | |
2270 | pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET; | |
2271 | pmcraid_soft_reset(cmd); | |
2272 | } | |
2273 | } | |
2274 | break; | |
2275 | ||
2276 | case IOA_STATE_IN_SOFT_RESET: | |
2277 | /* TRANSITION TO OPERATIONAL is on so start initialization | |
2278 | * sequence | |
2279 | */ | |
2280 | pmcraid_info("In softreset proceeding with bring-up\n"); | |
2281 | pinstance->ioa_state = IOA_STATE_IN_BRINGUP; | |
2282 | ||
2283 | /* Initialization commands start with HRRQ identification. From | |
2284 | * now on tasklet completes most of the commands as IOA is up | |
2285 | * and intrs are enabled | |
2286 | */ | |
2287 | pmcraid_identify_hrrq(cmd); | |
2288 | break; | |
2289 | ||
2290 | case IOA_STATE_IN_BRINGUP: | |
2291 | /* we are done with bringing up of IOA, change the ioa_state to | |
2292 | * operational and wake up any waiters | |
2293 | */ | |
2294 | pinstance->ioa_state = IOA_STATE_OPERATIONAL; | |
2295 | reset_complete = 1; | |
2296 | break; | |
2297 | ||
2298 | case IOA_STATE_OPERATIONAL: | |
2299 | default: | |
2300 | /* When IOA is operational and a reset is requested, check for | |
2301 | * the reset reason. If reset is to bring down IOA, unregister | |
2302 | * HCAMs and initiate shutdown; if adapter reset is forced then | |
2303 | * restart reset sequence again | |
2304 | */ | |
2305 | if (pinstance->ioa_shutdown_type == SHUTDOWN_NONE && | |
2306 | pinstance->force_ioa_reset == 0) { | |
c20c4267 AR |
2307 | pmcraid_notify_ioastate(pinstance, |
2308 | PMC_DEVICE_EVENT_RESET_SUCCESS); | |
89a36810 AR |
2309 | reset_complete = 1; |
2310 | } else { | |
2311 | if (pinstance->ioa_shutdown_type != SHUTDOWN_NONE) | |
2312 | pinstance->ioa_state = IOA_STATE_IN_BRINGDOWN; | |
2313 | pmcraid_reinit_cmdblk(cmd); | |
2314 | pmcraid_unregister_hcams(cmd); | |
2315 | } | |
2316 | break; | |
2317 | } | |
2318 | ||
2319 | /* reset will be completed if ioa_state is either DEAD or UNKNOWN or | |
2320 | * OPERATIONAL. Reset all control variables used during reset, wake up | |
2321 | * any waiting threads and let the SCSI mid-layer send commands. Note | |
2322 | * that host_lock must be held before invoking scsi_report_bus_reset. | |
2323 | */ | |
2324 | if (reset_complete) { | |
2325 | pinstance->ioa_reset_in_progress = 0; | |
2326 | pinstance->ioa_reset_attempts = 0; | |
2327 | pinstance->reset_cmd = NULL; | |
2328 | pinstance->ioa_shutdown_type = SHUTDOWN_NONE; | |
2329 | pinstance->ioa_bringdown = 0; | |
2330 | pmcraid_return_cmd(cmd); | |
2331 | ||
2332 | /* If target state is to bring up the adapter, proceed with | |
2333 | * hcam registration and resource exposure to mid-layer. | |
2334 | */ | |
2335 | if (pinstance->ioa_state == IOA_STATE_OPERATIONAL) | |
2336 | pmcraid_register_hcams(pinstance); | |
2337 | ||
2338 | wake_up_all(&pinstance->reset_wait_q); | |
2339 | } | |
2340 | ||
2341 | return; | |
2342 | } | |
2343 | ||
2344 | /** | |
2345 | * pmcraid_initiate_reset - initiates reset sequence. This is called from | |
2346 | * ISR/tasklet during error interrupts including IOA unit check. If reset | |
2347 | * is already in progress, it just returns, otherwise initiates IOA reset | |
2348 | * to bring IOA up to operational state. | |
2349 | * | |
2350 | * @pinstance: pointer to adapter instance structure | |
2351 | * | |
2352 | * Return value | |
2353 | * none | |
2354 | */ | |
2355 | static void pmcraid_initiate_reset(struct pmcraid_instance *pinstance) | |
2356 | { | |
2357 | struct pmcraid_cmd *cmd; | |
2358 | ||
2359 | /* If the reset is already in progress, just return, otherwise start | |
2360 | * reset sequence and return | |
2361 | */ | |
2362 | if (!pinstance->ioa_reset_in_progress) { | |
2363 | scsi_block_requests(pinstance->host); | |
2364 | cmd = pmcraid_get_free_cmd(pinstance); | |
2365 | ||
2366 | if (cmd == NULL) { | |
2367 | pmcraid_err("no cmnd blocks for initiate_reset\n"); | |
2368 | return; | |
2369 | } | |
2370 | ||
2371 | pinstance->ioa_shutdown_type = SHUTDOWN_NONE; | |
2372 | pinstance->reset_cmd = cmd; | |
2373 | pinstance->force_ioa_reset = 1; | |
c20c4267 AR |
2374 | pmcraid_notify_ioastate(pinstance, |
2375 | PMC_DEVICE_EVENT_RESET_START); | |
89a36810 AR |
2376 | pmcraid_ioa_reset(cmd); |
2377 | } | |
2378 | } | |
2379 | ||
2380 | /** | |
2381 | * pmcraid_reset_reload - utility routine for doing IOA reset either to bringup | |
2382 | * or bringdown IOA | |
2383 | * @pinstance: pointer adapter instance structure | |
2384 | * @shutdown_type: shutdown type to be used NONE, NORMAL or ABRREV | |
2385 | * @target_state: expected target state after reset | |
2386 | * | |
2387 | * Note: This command initiates reset and waits for its completion. Hence this | |
2388 | * should not be called from isr/timer/tasklet functions (timeout handlers, | |
2389 | * error response handlers and interrupt handlers). | |
2390 | * | |
2391 | * Return Value | |
2392 | * 1 in case ioa_state is not target_state, 0 otherwise. | |
2393 | */ | |
2394 | static int pmcraid_reset_reload( | |
2395 | struct pmcraid_instance *pinstance, | |
2396 | u8 shutdown_type, | |
2397 | u8 target_state | |
2398 | ) | |
2399 | { | |
2400 | struct pmcraid_cmd *reset_cmd = NULL; | |
2401 | unsigned long lock_flags; | |
2402 | int reset = 1; | |
2403 | ||
2404 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
2405 | ||
2406 | if (pinstance->ioa_reset_in_progress) { | |
2407 | pmcraid_info("reset_reload: reset is already in progress\n"); | |
2408 | ||
2409 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
2410 | ||
2411 | wait_event(pinstance->reset_wait_q, | |
2412 | !pinstance->ioa_reset_in_progress); | |
2413 | ||
2414 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
2415 | ||
2416 | if (pinstance->ioa_state == IOA_STATE_DEAD) { | |
2417 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
2418 | lock_flags); | |
2419 | pmcraid_info("reset_reload: IOA is dead\n"); | |
2420 | return reset; | |
2421 | } else if (pinstance->ioa_state == target_state) { | |
2422 | reset = 0; | |
2423 | } | |
2424 | } | |
2425 | ||
2426 | if (reset) { | |
2427 | pmcraid_info("reset_reload: proceeding with reset\n"); | |
2428 | scsi_block_requests(pinstance->host); | |
2429 | reset_cmd = pmcraid_get_free_cmd(pinstance); | |
2430 | ||
2431 | if (reset_cmd == NULL) { | |
2432 | pmcraid_err("no free cmnd for reset_reload\n"); | |
2433 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
2434 | lock_flags); | |
2435 | return reset; | |
2436 | } | |
2437 | ||
2438 | if (shutdown_type == SHUTDOWN_NORMAL) | |
2439 | pinstance->ioa_bringdown = 1; | |
2440 | ||
2441 | pinstance->ioa_shutdown_type = shutdown_type; | |
2442 | pinstance->reset_cmd = reset_cmd; | |
2443 | pinstance->force_ioa_reset = reset; | |
2444 | pmcraid_info("reset_reload: initiating reset\n"); | |
2445 | pmcraid_ioa_reset(reset_cmd); | |
2446 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
2447 | pmcraid_info("reset_reload: waiting for reset to complete\n"); | |
2448 | wait_event(pinstance->reset_wait_q, | |
2449 | !pinstance->ioa_reset_in_progress); | |
2450 | ||
c20c4267 | 2451 | pmcraid_info("reset_reload: reset is complete !!\n"); |
89a36810 AR |
2452 | scsi_unblock_requests(pinstance->host); |
2453 | if (pinstance->ioa_state == target_state) | |
2454 | reset = 0; | |
2455 | } | |
2456 | ||
2457 | return reset; | |
2458 | } | |
2459 | ||
2460 | /** | |
2461 | * pmcraid_reset_bringdown - wrapper over pmcraid_reset_reload to bringdown IOA | |
2462 | * | |
2463 | * @pinstance: pointer to adapter instance structure | |
2464 | * | |
2465 | * Return Value | |
2466 | * whatever is returned from pmcraid_reset_reload | |
2467 | */ | |
2468 | static int pmcraid_reset_bringdown(struct pmcraid_instance *pinstance) | |
2469 | { | |
2470 | return pmcraid_reset_reload(pinstance, | |
2471 | SHUTDOWN_NORMAL, | |
2472 | IOA_STATE_UNKNOWN); | |
2473 | } | |
2474 | ||
2475 | /** | |
2476 | * pmcraid_reset_bringup - wrapper over pmcraid_reset_reload to bring up IOA | |
2477 | * | |
2478 | * @pinstance: pointer to adapter instance structure | |
2479 | * | |
2480 | * Return Value | |
2481 | * whatever is returned from pmcraid_reset_reload | |
2482 | */ | |
2483 | static int pmcraid_reset_bringup(struct pmcraid_instance *pinstance) | |
2484 | { | |
c20c4267 AR |
2485 | pmcraid_notify_ioastate(pinstance, PMC_DEVICE_EVENT_RESET_START); |
2486 | ||
89a36810 AR |
2487 | return pmcraid_reset_reload(pinstance, |
2488 | SHUTDOWN_NONE, | |
2489 | IOA_STATE_OPERATIONAL); | |
2490 | } | |
2491 | ||
2492 | /** | |
2493 | * pmcraid_request_sense - Send request sense to a device | |
2494 | * @cmd: pmcraid command struct | |
2495 | * | |
2496 | * This function sends a request sense to a device as a result of a check | |
2497 | * condition. This method re-uses the same command block that failed earlier. | |
2498 | */ | |
2499 | static void pmcraid_request_sense(struct pmcraid_cmd *cmd) | |
2500 | { | |
2501 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
2502 | struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl; | |
2503 | ||
2504 | /* allocate DMAable memory for sense buffers */ | |
2505 | cmd->sense_buffer = pci_alloc_consistent(cmd->drv_inst->pdev, | |
2506 | SCSI_SENSE_BUFFERSIZE, | |
2507 | &cmd->sense_buffer_dma); | |
2508 | ||
2509 | if (cmd->sense_buffer == NULL) { | |
2510 | pmcraid_err | |
2511 | ("couldn't allocate sense buffer for request sense\n"); | |
2512 | pmcraid_erp_done(cmd); | |
2513 | return; | |
2514 | } | |
2515 | ||
2516 | /* re-use the command block */ | |
2517 | memset(&cmd->ioa_cb->ioasa, 0, sizeof(struct pmcraid_ioasa)); | |
2518 | memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN); | |
2519 | ioarcb->request_flags0 = (SYNC_COMPLETE | | |
2520 | NO_LINK_DESCS | | |
2521 | INHIBIT_UL_CHECK); | |
2522 | ioarcb->request_type = REQ_TYPE_SCSI; | |
2523 | ioarcb->cdb[0] = REQUEST_SENSE; | |
2524 | ioarcb->cdb[4] = SCSI_SENSE_BUFFERSIZE; | |
2525 | ||
2526 | ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
2527 | offsetof(struct pmcraid_ioarcb, | |
2528 | add_data.u.ioadl[0])); | |
2529 | ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); | |
2530 | ||
2531 | ioarcb->data_transfer_length = cpu_to_le32(SCSI_SENSE_BUFFERSIZE); | |
2532 | ||
2533 | ioadl->address = cpu_to_le64(cmd->sense_buffer_dma); | |
2534 | ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE); | |
88197966 | 2535 | ioadl->flags = IOADL_FLAGS_LAST_DESC; |
89a36810 AR |
2536 | |
2537 | /* request sense might be called as part of error response processing | |
2538 | * which runs in tasklets context. It is possible that mid-layer might | |
2539 | * schedule queuecommand during this time, hence, writting to IOARRIN | |
2540 | * must be protect by host_lock | |
2541 | */ | |
2542 | pmcraid_send_cmd(cmd, pmcraid_erp_done, | |
2543 | PMCRAID_REQUEST_SENSE_TIMEOUT, | |
2544 | pmcraid_timeout_handler); | |
2545 | } | |
2546 | ||
2547 | /** | |
2548 | * pmcraid_cancel_all - cancel all outstanding IOARCBs as part of error recovery | |
2549 | * @cmd: command that failed | |
2550 | * @sense: true if request_sense is required after cancel all | |
2551 | * | |
2552 | * This function sends a cancel all to a device to clear the queue. | |
2553 | */ | |
2554 | static void pmcraid_cancel_all(struct pmcraid_cmd *cmd, u32 sense) | |
2555 | { | |
2556 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
2557 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
2558 | struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata; | |
2559 | void (*cmd_done) (struct pmcraid_cmd *) = sense ? pmcraid_erp_done | |
2560 | : pmcraid_request_sense; | |
2561 | ||
2562 | memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN); | |
2563 | ioarcb->request_flags0 = SYNC_OVERRIDE; | |
2564 | ioarcb->request_type = REQ_TYPE_IOACMD; | |
2565 | ioarcb->cdb[0] = PMCRAID_CANCEL_ALL_REQUESTS; | |
2566 | ||
2567 | if (RES_IS_GSCSI(res->cfg_entry)) | |
2568 | ioarcb->cdb[1] = PMCRAID_SYNC_COMPLETE_AFTER_CANCEL; | |
2569 | ||
2570 | ioarcb->ioadl_bus_addr = 0; | |
2571 | ioarcb->ioadl_length = 0; | |
2572 | ioarcb->data_transfer_length = 0; | |
2573 | ioarcb->ioarcb_bus_addr &= (~0x1FULL); | |
2574 | ||
2575 | /* writing to IOARRIN must be protected by host_lock, as mid-layer | |
2576 | * schedule queuecommand while we are doing this | |
2577 | */ | |
2578 | pmcraid_send_cmd(cmd, cmd_done, | |
2579 | PMCRAID_REQUEST_SENSE_TIMEOUT, | |
2580 | pmcraid_timeout_handler); | |
2581 | } | |
2582 | ||
2583 | /** | |
2584 | * pmcraid_frame_auto_sense: frame fixed format sense information | |
2585 | * | |
2586 | * @cmd: pointer to failing command block | |
2587 | * | |
2588 | * Return value | |
2589 | * none | |
2590 | */ | |
2591 | static void pmcraid_frame_auto_sense(struct pmcraid_cmd *cmd) | |
2592 | { | |
2593 | u8 *sense_buf = cmd->scsi_cmd->sense_buffer; | |
2594 | struct pmcraid_resource_entry *res = cmd->scsi_cmd->device->hostdata; | |
2595 | struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa; | |
2596 | u32 ioasc = le32_to_cpu(ioasa->ioasc); | |
2597 | u32 failing_lba = 0; | |
2598 | ||
2599 | memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE); | |
2600 | cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION; | |
2601 | ||
2602 | if (RES_IS_VSET(res->cfg_entry) && | |
2603 | ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC && | |
2604 | ioasa->u.vset.failing_lba_hi != 0) { | |
2605 | ||
2606 | sense_buf[0] = 0x72; | |
2607 | sense_buf[1] = PMCRAID_IOASC_SENSE_KEY(ioasc); | |
2608 | sense_buf[2] = PMCRAID_IOASC_SENSE_CODE(ioasc); | |
2609 | sense_buf[3] = PMCRAID_IOASC_SENSE_QUAL(ioasc); | |
2610 | ||
2611 | sense_buf[7] = 12; | |
2612 | sense_buf[8] = 0; | |
2613 | sense_buf[9] = 0x0A; | |
2614 | sense_buf[10] = 0x80; | |
2615 | ||
2616 | failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_hi); | |
2617 | ||
2618 | sense_buf[12] = (failing_lba & 0xff000000) >> 24; | |
2619 | sense_buf[13] = (failing_lba & 0x00ff0000) >> 16; | |
2620 | sense_buf[14] = (failing_lba & 0x0000ff00) >> 8; | |
2621 | sense_buf[15] = failing_lba & 0x000000ff; | |
2622 | ||
2623 | failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_lo); | |
2624 | ||
2625 | sense_buf[16] = (failing_lba & 0xff000000) >> 24; | |
2626 | sense_buf[17] = (failing_lba & 0x00ff0000) >> 16; | |
2627 | sense_buf[18] = (failing_lba & 0x0000ff00) >> 8; | |
2628 | sense_buf[19] = failing_lba & 0x000000ff; | |
2629 | } else { | |
2630 | sense_buf[0] = 0x70; | |
2631 | sense_buf[2] = PMCRAID_IOASC_SENSE_KEY(ioasc); | |
2632 | sense_buf[12] = PMCRAID_IOASC_SENSE_CODE(ioasc); | |
2633 | sense_buf[13] = PMCRAID_IOASC_SENSE_QUAL(ioasc); | |
2634 | ||
2635 | if (ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC) { | |
2636 | if (RES_IS_VSET(res->cfg_entry)) | |
2637 | failing_lba = | |
2638 | le32_to_cpu(ioasa->u. | |
2639 | vset.failing_lba_lo); | |
2640 | sense_buf[0] |= 0x80; | |
2641 | sense_buf[3] = (failing_lba >> 24) & 0xff; | |
2642 | sense_buf[4] = (failing_lba >> 16) & 0xff; | |
2643 | sense_buf[5] = (failing_lba >> 8) & 0xff; | |
2644 | sense_buf[6] = failing_lba & 0xff; | |
2645 | } | |
2646 | ||
2647 | sense_buf[7] = 6; /* additional length */ | |
2648 | } | |
2649 | } | |
2650 | ||
2651 | /** | |
2652 | * pmcraid_error_handler - Error response handlers for a SCSI op | |
2653 | * @cmd: pointer to pmcraid_cmd that has failed | |
2654 | * | |
2655 | * This function determines whether or not to initiate ERP on the affected | |
2656 | * device. This is called from a tasklet, which doesn't hold any locks. | |
2657 | * | |
2658 | * Return value: | |
2659 | * 0 it caller can complete the request, otherwise 1 where in error | |
2660 | * handler itself completes the request and returns the command block | |
2661 | * back to free-pool | |
2662 | */ | |
2663 | static int pmcraid_error_handler(struct pmcraid_cmd *cmd) | |
2664 | { | |
2665 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
2666 | struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata; | |
2667 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
2668 | struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa; | |
2669 | u32 ioasc = le32_to_cpu(ioasa->ioasc); | |
2670 | u32 masked_ioasc = ioasc & PMCRAID_IOASC_SENSE_MASK; | |
2671 | u32 sense_copied = 0; | |
2672 | ||
2673 | if (!res) { | |
2674 | pmcraid_info("resource pointer is NULL\n"); | |
2675 | return 0; | |
2676 | } | |
2677 | ||
2678 | /* If this was a SCSI read/write command keep count of errors */ | |
2679 | if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_READ_CMD) | |
2680 | atomic_inc(&res->read_failures); | |
2681 | else if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_WRITE_CMD) | |
2682 | atomic_inc(&res->write_failures); | |
2683 | ||
2684 | if (!RES_IS_GSCSI(res->cfg_entry) && | |
2685 | masked_ioasc != PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR) { | |
2686 | pmcraid_frame_auto_sense(cmd); | |
2687 | } | |
2688 | ||
2689 | /* Log IOASC/IOASA information based on user settings */ | |
2690 | pmcraid_ioasc_logger(ioasc, cmd); | |
2691 | ||
2692 | switch (masked_ioasc) { | |
2693 | ||
2694 | case PMCRAID_IOASC_AC_TERMINATED_BY_HOST: | |
2695 | scsi_cmd->result |= (DID_ABORT << 16); | |
2696 | break; | |
2697 | ||
2698 | case PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE: | |
2699 | case PMCRAID_IOASC_HW_CANNOT_COMMUNICATE: | |
2700 | scsi_cmd->result |= (DID_NO_CONNECT << 16); | |
2701 | break; | |
2702 | ||
2703 | case PMCRAID_IOASC_NR_SYNC_REQUIRED: | |
2704 | res->sync_reqd = 1; | |
2705 | scsi_cmd->result |= (DID_IMM_RETRY << 16); | |
2706 | break; | |
2707 | ||
2708 | case PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC: | |
2709 | scsi_cmd->result |= (DID_PASSTHROUGH << 16); | |
2710 | break; | |
2711 | ||
2712 | case PMCRAID_IOASC_UA_BUS_WAS_RESET: | |
2713 | case PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER: | |
2714 | if (!res->reset_progress) | |
2715 | scsi_report_bus_reset(pinstance->host, | |
2716 | scsi_cmd->device->channel); | |
2717 | scsi_cmd->result |= (DID_ERROR << 16); | |
2718 | break; | |
2719 | ||
2720 | case PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR: | |
2721 | scsi_cmd->result |= PMCRAID_IOASC_SENSE_STATUS(ioasc); | |
2722 | res->sync_reqd = 1; | |
2723 | ||
2724 | /* if check_condition is not active return with error otherwise | |
2725 | * get/frame the sense buffer | |
2726 | */ | |
2727 | if (PMCRAID_IOASC_SENSE_STATUS(ioasc) != | |
2728 | SAM_STAT_CHECK_CONDITION && | |
2729 | PMCRAID_IOASC_SENSE_STATUS(ioasc) != SAM_STAT_ACA_ACTIVE) | |
2730 | return 0; | |
2731 | ||
2732 | /* If we have auto sense data as part of IOASA pass it to | |
2733 | * mid-layer | |
2734 | */ | |
2735 | if (ioasa->auto_sense_length != 0) { | |
2736 | short sense_len = ioasa->auto_sense_length; | |
2737 | int data_size = min_t(u16, le16_to_cpu(sense_len), | |
2738 | SCSI_SENSE_BUFFERSIZE); | |
2739 | ||
2740 | memcpy(scsi_cmd->sense_buffer, | |
2741 | ioasa->sense_data, | |
2742 | data_size); | |
2743 | sense_copied = 1; | |
2744 | } | |
2745 | ||
a70757ba | 2746 | if (RES_IS_GSCSI(res->cfg_entry)) |
89a36810 | 2747 | pmcraid_cancel_all(cmd, sense_copied); |
a70757ba | 2748 | else if (sense_copied) |
89a36810 | 2749 | pmcraid_erp_done(cmd); |
a70757ba | 2750 | else |
89a36810 | 2751 | pmcraid_request_sense(cmd); |
89a36810 AR |
2752 | |
2753 | return 1; | |
2754 | ||
2755 | case PMCRAID_IOASC_NR_INIT_CMD_REQUIRED: | |
2756 | break; | |
2757 | ||
2758 | default: | |
2759 | if (PMCRAID_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR) | |
2760 | scsi_cmd->result |= (DID_ERROR << 16); | |
2761 | break; | |
2762 | } | |
2763 | return 0; | |
2764 | } | |
2765 | ||
2766 | /** | |
2767 | * pmcraid_reset_device - device reset handler functions | |
2768 | * | |
2769 | * @scsi_cmd: scsi command struct | |
2770 | * @modifier: reset modifier indicating the reset sequence to be performed | |
2771 | * | |
2772 | * This function issues a device reset to the affected device. | |
2773 | * A LUN reset will be sent to the device first. If that does | |
2774 | * not work, a target reset will be sent. | |
2775 | * | |
2776 | * Return value: | |
2777 | * SUCCESS / FAILED | |
2778 | */ | |
2779 | static int pmcraid_reset_device( | |
2780 | struct scsi_cmnd *scsi_cmd, | |
2781 | unsigned long timeout, | |
2782 | u8 modifier | |
2783 | ) | |
2784 | { | |
2785 | struct pmcraid_cmd *cmd; | |
2786 | struct pmcraid_instance *pinstance; | |
2787 | struct pmcraid_resource_entry *res; | |
2788 | struct pmcraid_ioarcb *ioarcb; | |
2789 | unsigned long lock_flags; | |
2790 | u32 ioasc; | |
2791 | ||
2792 | pinstance = | |
2793 | (struct pmcraid_instance *)scsi_cmd->device->host->hostdata; | |
2794 | res = scsi_cmd->device->hostdata; | |
2795 | ||
2796 | if (!res) { | |
34876402 AR |
2797 | sdev_printk(KERN_ERR, scsi_cmd->device, |
2798 | "reset_device: NULL resource pointer\n"); | |
89a36810 AR |
2799 | return FAILED; |
2800 | } | |
2801 | ||
2802 | /* If adapter is currently going through reset/reload, return failed. | |
2803 | * This will force the mid-layer to call _eh_bus/host reset, which | |
2804 | * will then go to sleep and wait for the reset to complete | |
2805 | */ | |
2806 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
2807 | if (pinstance->ioa_reset_in_progress || | |
2808 | pinstance->ioa_state == IOA_STATE_DEAD) { | |
2809 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
2810 | return FAILED; | |
2811 | } | |
2812 | ||
2813 | res->reset_progress = 1; | |
2814 | pmcraid_info("Resetting %s resource with addr %x\n", | |
2815 | ((modifier & RESET_DEVICE_LUN) ? "LUN" : | |
2816 | ((modifier & RESET_DEVICE_TARGET) ? "TARGET" : "BUS")), | |
2817 | le32_to_cpu(res->cfg_entry.resource_address)); | |
2818 | ||
2819 | /* get a free cmd block */ | |
2820 | cmd = pmcraid_get_free_cmd(pinstance); | |
2821 | ||
2822 | if (cmd == NULL) { | |
2823 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
2824 | pmcraid_err("%s: no cmd blocks are available\n", __func__); | |
2825 | return FAILED; | |
2826 | } | |
2827 | ||
2828 | ioarcb = &cmd->ioa_cb->ioarcb; | |
2829 | ioarcb->resource_handle = res->cfg_entry.resource_handle; | |
2830 | ioarcb->request_type = REQ_TYPE_IOACMD; | |
2831 | ioarcb->cdb[0] = PMCRAID_RESET_DEVICE; | |
2832 | ||
2833 | /* Initialize reset modifier bits */ | |
2834 | if (modifier) | |
2835 | modifier = ENABLE_RESET_MODIFIER | modifier; | |
2836 | ||
2837 | ioarcb->cdb[1] = modifier; | |
2838 | ||
2839 | init_completion(&cmd->wait_for_completion); | |
2840 | cmd->completion_req = 1; | |
2841 | ||
2842 | pmcraid_info("cmd(CDB[0] = %x) for %x with index = %d\n", | |
2843 | cmd->ioa_cb->ioarcb.cdb[0], | |
2844 | le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle), | |
2845 | le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2); | |
2846 | ||
2847 | pmcraid_send_cmd(cmd, | |
2848 | pmcraid_internal_done, | |
2849 | timeout, | |
2850 | pmcraid_timeout_handler); | |
2851 | ||
2852 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
2853 | ||
2854 | /* RESET_DEVICE command completes after all pending IOARCBs are | |
2855 | * completed. Once this command is completed, pmcraind_internal_done | |
2856 | * will wake up the 'completion' queue. | |
2857 | */ | |
2858 | wait_for_completion(&cmd->wait_for_completion); | |
2859 | ||
2860 | /* complete the command here itself and return the command block | |
2861 | * to free list | |
2862 | */ | |
2863 | pmcraid_return_cmd(cmd); | |
2864 | res->reset_progress = 0; | |
2865 | ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
2866 | ||
2867 | /* set the return value based on the returned ioasc */ | |
2868 | return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS; | |
2869 | } | |
2870 | ||
2871 | /** | |
2872 | * _pmcraid_io_done - helper for pmcraid_io_done function | |
2873 | * | |
2874 | * @cmd: pointer to pmcraid command struct | |
2875 | * @reslen: residual data length to be set in the ioasa | |
2876 | * @ioasc: ioasc either returned by IOA or set by driver itself. | |
2877 | * | |
2878 | * This function is invoked by pmcraid_io_done to complete mid-layer | |
2879 | * scsi ops. | |
2880 | * | |
2881 | * Return value: | |
2882 | * 0 if caller is required to return it to free_pool. Returns 1 if | |
2883 | * caller need not worry about freeing command block as error handler | |
2884 | * will take care of that. | |
2885 | */ | |
2886 | ||
2887 | static int _pmcraid_io_done(struct pmcraid_cmd *cmd, int reslen, int ioasc) | |
2888 | { | |
2889 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
2890 | int rc = 0; | |
2891 | ||
2892 | scsi_set_resid(scsi_cmd, reslen); | |
2893 | ||
2894 | pmcraid_info("response(%d) CDB[0] = %x ioasc:result: %x:%x\n", | |
2895 | le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2, | |
2896 | cmd->ioa_cb->ioarcb.cdb[0], | |
2897 | ioasc, scsi_cmd->result); | |
2898 | ||
2899 | if (PMCRAID_IOASC_SENSE_KEY(ioasc) != 0) | |
2900 | rc = pmcraid_error_handler(cmd); | |
2901 | ||
2902 | if (rc == 0) { | |
2903 | scsi_dma_unmap(scsi_cmd); | |
2904 | scsi_cmd->scsi_done(scsi_cmd); | |
2905 | } | |
2906 | ||
2907 | return rc; | |
2908 | } | |
2909 | ||
2910 | /** | |
2911 | * pmcraid_io_done - SCSI completion function | |
2912 | * | |
2913 | * @cmd: pointer to pmcraid command struct | |
2914 | * | |
2915 | * This function is invoked by tasklet/mid-layer error handler to completing | |
2916 | * the SCSI ops sent from mid-layer. | |
2917 | * | |
2918 | * Return value | |
2919 | * none | |
2920 | */ | |
2921 | ||
2922 | static void pmcraid_io_done(struct pmcraid_cmd *cmd) | |
2923 | { | |
2924 | u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
2925 | u32 reslen = le32_to_cpu(cmd->ioa_cb->ioasa.residual_data_length); | |
2926 | ||
2927 | if (_pmcraid_io_done(cmd, reslen, ioasc) == 0) | |
2928 | pmcraid_return_cmd(cmd); | |
2929 | } | |
2930 | ||
2931 | /** | |
2932 | * pmcraid_abort_cmd - Aborts a single IOARCB already submitted to IOA | |
2933 | * | |
2934 | * @cmd: command block of the command to be aborted | |
2935 | * | |
2936 | * Return Value: | |
2937 | * returns pointer to command structure used as cancelling cmd | |
2938 | */ | |
2939 | static struct pmcraid_cmd *pmcraid_abort_cmd(struct pmcraid_cmd *cmd) | |
2940 | { | |
2941 | struct pmcraid_cmd *cancel_cmd; | |
2942 | struct pmcraid_instance *pinstance; | |
2943 | struct pmcraid_resource_entry *res; | |
2944 | ||
2945 | pinstance = (struct pmcraid_instance *)cmd->drv_inst; | |
2946 | res = cmd->scsi_cmd->device->hostdata; | |
2947 | ||
2948 | cancel_cmd = pmcraid_get_free_cmd(pinstance); | |
2949 | ||
2950 | if (cancel_cmd == NULL) { | |
2951 | pmcraid_err("%s: no cmd blocks are available\n", __func__); | |
2952 | return NULL; | |
2953 | } | |
2954 | ||
2955 | pmcraid_prepare_cancel_cmd(cancel_cmd, cmd); | |
2956 | ||
2957 | pmcraid_info("aborting command CDB[0]= %x with index = %d\n", | |
2958 | cmd->ioa_cb->ioarcb.cdb[0], | |
2959 | cmd->ioa_cb->ioarcb.response_handle >> 2); | |
2960 | ||
2961 | init_completion(&cancel_cmd->wait_for_completion); | |
2962 | cancel_cmd->completion_req = 1; | |
2963 | ||
2964 | pmcraid_info("command (%d) CDB[0] = %x for %x\n", | |
2965 | le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.response_handle) >> 2, | |
c20c4267 | 2966 | cancel_cmd->ioa_cb->ioarcb.cdb[0], |
89a36810 AR |
2967 | le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.resource_handle)); |
2968 | ||
2969 | pmcraid_send_cmd(cancel_cmd, | |
2970 | pmcraid_internal_done, | |
2971 | PMCRAID_INTERNAL_TIMEOUT, | |
2972 | pmcraid_timeout_handler); | |
2973 | return cancel_cmd; | |
2974 | } | |
2975 | ||
2976 | /** | |
2977 | * pmcraid_abort_complete - Waits for ABORT TASK completion | |
2978 | * | |
2979 | * @cancel_cmd: command block use as cancelling command | |
2980 | * | |
2981 | * Return Value: | |
2982 | * returns SUCCESS if ABORT TASK has good completion | |
2983 | * otherwise FAILED | |
2984 | */ | |
2985 | static int pmcraid_abort_complete(struct pmcraid_cmd *cancel_cmd) | |
2986 | { | |
2987 | struct pmcraid_resource_entry *res; | |
2988 | u32 ioasc; | |
2989 | ||
2990 | wait_for_completion(&cancel_cmd->wait_for_completion); | |
c20c4267 AR |
2991 | res = cancel_cmd->res; |
2992 | cancel_cmd->res = NULL; | |
89a36810 AR |
2993 | ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc); |
2994 | ||
2995 | /* If the abort task is not timed out we will get a Good completion | |
2996 | * as sense_key, otherwise we may get one the following responses | |
25985edc | 2997 | * due to subsequent bus reset or device reset. In case IOASC is |
89a36810 AR |
2998 | * NR_SYNC_REQUIRED, set sync_reqd flag for the corresponding resource |
2999 | */ | |
3000 | if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET || | |
3001 | ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) { | |
3002 | if (ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) | |
3003 | res->sync_reqd = 1; | |
3004 | ioasc = 0; | |
3005 | } | |
3006 | ||
3007 | /* complete the command here itself */ | |
3008 | pmcraid_return_cmd(cancel_cmd); | |
3009 | return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS; | |
3010 | } | |
3011 | ||
3012 | /** | |
3013 | * pmcraid_eh_abort_handler - entry point for aborting a single task on errors | |
3014 | * | |
3015 | * @scsi_cmd: scsi command struct given by mid-layer. When this is called | |
3016 | * mid-layer ensures that no other commands are queued. This | |
3017 | * never gets called under interrupt, but a separate eh thread. | |
3018 | * | |
3019 | * Return value: | |
3020 | * SUCCESS / FAILED | |
3021 | */ | |
3022 | static int pmcraid_eh_abort_handler(struct scsi_cmnd *scsi_cmd) | |
3023 | { | |
3024 | struct pmcraid_instance *pinstance; | |
3025 | struct pmcraid_cmd *cmd; | |
3026 | struct pmcraid_resource_entry *res; | |
3027 | unsigned long host_lock_flags; | |
3028 | unsigned long pending_lock_flags; | |
3029 | struct pmcraid_cmd *cancel_cmd = NULL; | |
3030 | int cmd_found = 0; | |
3031 | int rc = FAILED; | |
3032 | ||
3033 | pinstance = | |
3034 | (struct pmcraid_instance *)scsi_cmd->device->host->hostdata; | |
3035 | ||
34876402 AR |
3036 | scmd_printk(KERN_INFO, scsi_cmd, |
3037 | "I/O command timed out, aborting it.\n"); | |
89a36810 AR |
3038 | |
3039 | res = scsi_cmd->device->hostdata; | |
3040 | ||
3041 | if (res == NULL) | |
3042 | return rc; | |
3043 | ||
3044 | /* If we are currently going through reset/reload, return failed. | |
3045 | * This will force the mid-layer to eventually call | |
3046 | * pmcraid_eh_host_reset which will then go to sleep and wait for the | |
3047 | * reset to complete | |
3048 | */ | |
3049 | spin_lock_irqsave(pinstance->host->host_lock, host_lock_flags); | |
3050 | ||
3051 | if (pinstance->ioa_reset_in_progress || | |
3052 | pinstance->ioa_state == IOA_STATE_DEAD) { | |
3053 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
3054 | host_lock_flags); | |
3055 | return rc; | |
3056 | } | |
3057 | ||
3058 | /* loop over pending cmd list to find cmd corresponding to this | |
3059 | * scsi_cmd. Note that this command might not have been completed | |
3060 | * already. locking: all pending commands are protected with | |
3061 | * pending_pool_lock. | |
3062 | */ | |
3063 | spin_lock_irqsave(&pinstance->pending_pool_lock, pending_lock_flags); | |
3064 | list_for_each_entry(cmd, &pinstance->pending_cmd_pool, free_list) { | |
3065 | ||
3066 | if (cmd->scsi_cmd == scsi_cmd) { | |
3067 | cmd_found = 1; | |
3068 | break; | |
3069 | } | |
3070 | } | |
3071 | ||
3072 | spin_unlock_irqrestore(&pinstance->pending_pool_lock, | |
3073 | pending_lock_flags); | |
3074 | ||
3075 | /* If the command to be aborted was given to IOA and still pending with | |
3076 | * it, send ABORT_TASK to abort this and wait for its completion | |
3077 | */ | |
3078 | if (cmd_found) | |
3079 | cancel_cmd = pmcraid_abort_cmd(cmd); | |
3080 | ||
3081 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
3082 | host_lock_flags); | |
3083 | ||
3084 | if (cancel_cmd) { | |
c20c4267 | 3085 | cancel_cmd->res = cmd->scsi_cmd->device->hostdata; |
89a36810 AR |
3086 | rc = pmcraid_abort_complete(cancel_cmd); |
3087 | } | |
3088 | ||
3089 | return cmd_found ? rc : SUCCESS; | |
3090 | } | |
3091 | ||
3092 | /** | |
3093 | * pmcraid_eh_xxxx_reset_handler - bus/target/device reset handler callbacks | |
3094 | * | |
3095 | * @scmd: pointer to scsi_cmd that was sent to the resource to be reset. | |
3096 | * | |
3097 | * All these routines invokve pmcraid_reset_device with appropriate parameters. | |
3098 | * Since these are called from mid-layer EH thread, no other IO will be queued | |
3099 | * to the resource being reset. However, control path (IOCTL) may be active so | |
3100 | * it is necessary to synchronize IOARRIN writes which pmcraid_reset_device | |
3101 | * takes care by locking/unlocking host_lock. | |
3102 | * | |
3103 | * Return value | |
c20c4267 | 3104 | * SUCCESS or FAILED |
89a36810 AR |
3105 | */ |
3106 | static int pmcraid_eh_device_reset_handler(struct scsi_cmnd *scmd) | |
3107 | { | |
34876402 AR |
3108 | scmd_printk(KERN_INFO, scmd, |
3109 | "resetting device due to an I/O command timeout.\n"); | |
89a36810 AR |
3110 | return pmcraid_reset_device(scmd, |
3111 | PMCRAID_INTERNAL_TIMEOUT, | |
3112 | RESET_DEVICE_LUN); | |
3113 | } | |
3114 | ||
3115 | static int pmcraid_eh_bus_reset_handler(struct scsi_cmnd *scmd) | |
3116 | { | |
34876402 AR |
3117 | scmd_printk(KERN_INFO, scmd, |
3118 | "Doing bus reset due to an I/O command timeout.\n"); | |
89a36810 AR |
3119 | return pmcraid_reset_device(scmd, |
3120 | PMCRAID_RESET_BUS_TIMEOUT, | |
3121 | RESET_DEVICE_BUS); | |
3122 | } | |
3123 | ||
3124 | static int pmcraid_eh_target_reset_handler(struct scsi_cmnd *scmd) | |
3125 | { | |
34876402 AR |
3126 | scmd_printk(KERN_INFO, scmd, |
3127 | "Doing target reset due to an I/O command timeout.\n"); | |
89a36810 AR |
3128 | return pmcraid_reset_device(scmd, |
3129 | PMCRAID_INTERNAL_TIMEOUT, | |
3130 | RESET_DEVICE_TARGET); | |
3131 | } | |
3132 | ||
3133 | /** | |
3134 | * pmcraid_eh_host_reset_handler - adapter reset handler callback | |
3135 | * | |
3136 | * @scmd: pointer to scsi_cmd that was sent to a resource of adapter | |
3137 | * | |
3138 | * Initiates adapter reset to bring it up to operational state | |
3139 | * | |
3140 | * Return value | |
c20c4267 | 3141 | * SUCCESS or FAILED |
89a36810 AR |
3142 | */ |
3143 | static int pmcraid_eh_host_reset_handler(struct scsi_cmnd *scmd) | |
3144 | { | |
3145 | unsigned long interval = 10000; /* 10 seconds interval */ | |
3146 | int waits = jiffies_to_msecs(PMCRAID_RESET_HOST_TIMEOUT) / interval; | |
3147 | struct pmcraid_instance *pinstance = | |
3148 | (struct pmcraid_instance *)(scmd->device->host->hostdata); | |
3149 | ||
3150 | ||
3151 | /* wait for an additional 150 seconds just in case firmware could come | |
3152 | * up and if it could complete all the pending commands excluding the | |
3153 | * two HCAM (CCN and LDN). | |
3154 | */ | |
3155 | while (waits--) { | |
3156 | if (atomic_read(&pinstance->outstanding_cmds) <= | |
3157 | PMCRAID_MAX_HCAM_CMD) | |
3158 | return SUCCESS; | |
3159 | msleep(interval); | |
3160 | } | |
3161 | ||
3162 | dev_err(&pinstance->pdev->dev, | |
3163 | "Adapter being reset due to an I/O command timeout.\n"); | |
3164 | return pmcraid_reset_bringup(pinstance) == 0 ? SUCCESS : FAILED; | |
3165 | } | |
3166 | ||
3167 | /** | |
3168 | * pmcraid_task_attributes - Translate SPI Q-Tags to task attributes | |
3169 | * @scsi_cmd: scsi command struct | |
3170 | * | |
3171 | * Return value | |
3172 | * number of tags or 0 if the task is not tagged | |
3173 | */ | |
3174 | static u8 pmcraid_task_attributes(struct scsi_cmnd *scsi_cmd) | |
3175 | { | |
3176 | char tag[2]; | |
3177 | u8 rc = 0; | |
3178 | ||
3179 | if (scsi_populate_tag_msg(scsi_cmd, tag)) { | |
3180 | switch (tag[0]) { | |
3181 | case MSG_SIMPLE_TAG: | |
3182 | rc = TASK_TAG_SIMPLE; | |
3183 | break; | |
3184 | case MSG_HEAD_TAG: | |
3185 | rc = TASK_TAG_QUEUE_HEAD; | |
3186 | break; | |
3187 | case MSG_ORDERED_TAG: | |
3188 | rc = TASK_TAG_ORDERED; | |
3189 | break; | |
3190 | }; | |
3191 | } | |
3192 | ||
3193 | return rc; | |
3194 | } | |
3195 | ||
3196 | ||
3197 | /** | |
3198 | * pmcraid_init_ioadls - initializes IOADL related fields in IOARCB | |
3199 | * @cmd: pmcraid command struct | |
3200 | * @sgcount: count of scatter-gather elements | |
3201 | * | |
3202 | * Return value | |
3203 | * returns pointer pmcraid_ioadl_desc, initialized to point to internal | |
3204 | * or external IOADLs | |
3205 | */ | |
3206 | struct pmcraid_ioadl_desc * | |
3207 | pmcraid_init_ioadls(struct pmcraid_cmd *cmd, int sgcount) | |
3208 | { | |
3209 | struct pmcraid_ioadl_desc *ioadl; | |
3210 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
3211 | int ioadl_count = 0; | |
3212 | ||
3213 | if (ioarcb->add_cmd_param_length) | |
3214 | ioadl_count = DIV_ROUND_UP(ioarcb->add_cmd_param_length, 16); | |
3215 | ioarcb->ioadl_length = | |
3216 | sizeof(struct pmcraid_ioadl_desc) * sgcount; | |
3217 | ||
3218 | if ((sgcount + ioadl_count) > (ARRAY_SIZE(ioarcb->add_data.u.ioadl))) { | |
3219 | /* external ioadls start at offset 0x80 from control_block | |
3220 | * structure, re-using 24 out of 27 ioadls part of IOARCB. | |
3221 | * It is necessary to indicate to firmware that driver is | |
3222 | * using ioadls to be treated as external to IOARCB. | |
3223 | */ | |
3224 | ioarcb->ioarcb_bus_addr &= ~(0x1FULL); | |
3225 | ioarcb->ioadl_bus_addr = | |
3226 | cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
3227 | offsetof(struct pmcraid_ioarcb, | |
3228 | add_data.u.ioadl[3])); | |
3229 | ioadl = &ioarcb->add_data.u.ioadl[3]; | |
3230 | } else { | |
3231 | ioarcb->ioadl_bus_addr = | |
3232 | cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
3233 | offsetof(struct pmcraid_ioarcb, | |
3234 | add_data.u.ioadl[ioadl_count])); | |
3235 | ||
3236 | ioadl = &ioarcb->add_data.u.ioadl[ioadl_count]; | |
3237 | ioarcb->ioarcb_bus_addr |= | |
3238 | DIV_ROUND_CLOSEST(sgcount + ioadl_count, 8); | |
3239 | } | |
3240 | ||
3241 | return ioadl; | |
3242 | } | |
3243 | ||
3244 | /** | |
3245 | * pmcraid_build_ioadl - Build a scatter/gather list and map the buffer | |
3246 | * @pinstance: pointer to adapter instance structure | |
3247 | * @cmd: pmcraid command struct | |
3248 | * | |
3249 | * This function is invoked by queuecommand entry point while sending a command | |
3250 | * to firmware. This builds ioadl descriptors and sets up ioarcb fields. | |
3251 | * | |
3252 | * Return value: | |
c20c4267 | 3253 | * 0 on success or -1 on failure |
89a36810 AR |
3254 | */ |
3255 | static int pmcraid_build_ioadl( | |
3256 | struct pmcraid_instance *pinstance, | |
3257 | struct pmcraid_cmd *cmd | |
3258 | ) | |
3259 | { | |
3260 | int i, nseg; | |
3261 | struct scatterlist *sglist; | |
3262 | ||
3263 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
3264 | struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb); | |
3265 | struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl; | |
3266 | ||
3267 | u32 length = scsi_bufflen(scsi_cmd); | |
3268 | ||
3269 | if (!length) | |
3270 | return 0; | |
3271 | ||
3272 | nseg = scsi_dma_map(scsi_cmd); | |
3273 | ||
3274 | if (nseg < 0) { | |
34876402 | 3275 | scmd_printk(KERN_ERR, scsi_cmd, "scsi_map_dma failed!\n"); |
89a36810 AR |
3276 | return -1; |
3277 | } else if (nseg > PMCRAID_MAX_IOADLS) { | |
3278 | scsi_dma_unmap(scsi_cmd); | |
34876402 | 3279 | scmd_printk(KERN_ERR, scsi_cmd, |
89a36810 AR |
3280 | "sg count is (%d) more than allowed!\n", nseg); |
3281 | return -1; | |
3282 | } | |
3283 | ||
3284 | /* Initialize IOARCB data transfer length fields */ | |
3285 | if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) | |
3286 | ioarcb->request_flags0 |= TRANSFER_DIR_WRITE; | |
3287 | ||
3288 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
3289 | ioarcb->data_transfer_length = cpu_to_le32(length); | |
3290 | ioadl = pmcraid_init_ioadls(cmd, nseg); | |
3291 | ||
3292 | /* Initialize IOADL descriptor addresses */ | |
3293 | scsi_for_each_sg(scsi_cmd, sglist, nseg, i) { | |
3294 | ioadl[i].data_len = cpu_to_le32(sg_dma_len(sglist)); | |
3295 | ioadl[i].address = cpu_to_le64(sg_dma_address(sglist)); | |
3296 | ioadl[i].flags = 0; | |
3297 | } | |
3298 | /* setup last descriptor */ | |
88197966 | 3299 | ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC; |
89a36810 AR |
3300 | |
3301 | return 0; | |
3302 | } | |
3303 | ||
3304 | /** | |
3305 | * pmcraid_free_sglist - Frees an allocated SG buffer list | |
3306 | * @sglist: scatter/gather list pointer | |
3307 | * | |
3308 | * Free a DMA'able memory previously allocated with pmcraid_alloc_sglist | |
3309 | * | |
3310 | * Return value: | |
c20c4267 | 3311 | * none |
89a36810 AR |
3312 | */ |
3313 | static void pmcraid_free_sglist(struct pmcraid_sglist *sglist) | |
3314 | { | |
3315 | int i; | |
3316 | ||
3317 | for (i = 0; i < sglist->num_sg; i++) | |
3318 | __free_pages(sg_page(&(sglist->scatterlist[i])), | |
3319 | sglist->order); | |
3320 | ||
3321 | kfree(sglist); | |
3322 | } | |
3323 | ||
3324 | /** | |
3325 | * pmcraid_alloc_sglist - Allocates memory for a SG list | |
3326 | * @buflen: buffer length | |
3327 | * | |
3328 | * Allocates a DMA'able buffer in chunks and assembles a scatter/gather | |
3329 | * list. | |
3330 | * | |
3331 | * Return value | |
c20c4267 | 3332 | * pointer to sglist / NULL on failure |
89a36810 AR |
3333 | */ |
3334 | static struct pmcraid_sglist *pmcraid_alloc_sglist(int buflen) | |
3335 | { | |
3336 | struct pmcraid_sglist *sglist; | |
3337 | struct scatterlist *scatterlist; | |
3338 | struct page *page; | |
3339 | int num_elem, i, j; | |
3340 | int sg_size; | |
3341 | int order; | |
3342 | int bsize_elem; | |
3343 | ||
3344 | sg_size = buflen / (PMCRAID_MAX_IOADLS - 1); | |
3345 | order = (sg_size > 0) ? get_order(sg_size) : 0; | |
3346 | bsize_elem = PAGE_SIZE * (1 << order); | |
3347 | ||
3348 | /* Determine the actual number of sg entries needed */ | |
3349 | if (buflen % bsize_elem) | |
3350 | num_elem = (buflen / bsize_elem) + 1; | |
3351 | else | |
3352 | num_elem = buflen / bsize_elem; | |
3353 | ||
3354 | /* Allocate a scatter/gather list for the DMA */ | |
3355 | sglist = kzalloc(sizeof(struct pmcraid_sglist) + | |
3356 | (sizeof(struct scatterlist) * (num_elem - 1)), | |
3357 | GFP_KERNEL); | |
3358 | ||
3359 | if (sglist == NULL) | |
3360 | return NULL; | |
3361 | ||
3362 | scatterlist = sglist->scatterlist; | |
3363 | sg_init_table(scatterlist, num_elem); | |
3364 | sglist->order = order; | |
3365 | sglist->num_sg = num_elem; | |
3366 | sg_size = buflen; | |
3367 | ||
3368 | for (i = 0; i < num_elem; i++) { | |
592488a3 | 3369 | page = alloc_pages(GFP_KERNEL|GFP_DMA|__GFP_ZERO, order); |
89a36810 AR |
3370 | if (!page) { |
3371 | for (j = i - 1; j >= 0; j--) | |
3372 | __free_pages(sg_page(&scatterlist[j]), order); | |
3373 | kfree(sglist); | |
3374 | return NULL; | |
3375 | } | |
3376 | ||
3377 | sg_set_page(&scatterlist[i], page, | |
3378 | sg_size < bsize_elem ? sg_size : bsize_elem, 0); | |
3379 | sg_size -= bsize_elem; | |
3380 | } | |
3381 | ||
3382 | return sglist; | |
3383 | } | |
3384 | ||
3385 | /** | |
3386 | * pmcraid_copy_sglist - Copy user buffer to kernel buffer's SG list | |
3387 | * @sglist: scatter/gather list pointer | |
3388 | * @buffer: buffer pointer | |
3389 | * @len: buffer length | |
3390 | * @direction: data transfer direction | |
3391 | * | |
3392 | * Copy a user buffer into a buffer allocated by pmcraid_alloc_sglist | |
3393 | * | |
3394 | * Return value: | |
3395 | * 0 on success / other on failure | |
3396 | */ | |
3397 | static int pmcraid_copy_sglist( | |
3398 | struct pmcraid_sglist *sglist, | |
3399 | unsigned long buffer, | |
3400 | u32 len, | |
3401 | int direction | |
3402 | ) | |
3403 | { | |
3404 | struct scatterlist *scatterlist; | |
3405 | void *kaddr; | |
3406 | int bsize_elem; | |
3407 | int i; | |
3408 | int rc = 0; | |
3409 | ||
3410 | /* Determine the actual number of bytes per element */ | |
3411 | bsize_elem = PAGE_SIZE * (1 << sglist->order); | |
3412 | ||
3413 | scatterlist = sglist->scatterlist; | |
3414 | ||
3415 | for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) { | |
3416 | struct page *page = sg_page(&scatterlist[i]); | |
3417 | ||
3418 | kaddr = kmap(page); | |
3419 | if (direction == DMA_TO_DEVICE) | |
3420 | rc = __copy_from_user(kaddr, | |
3421 | (void *)buffer, | |
3422 | bsize_elem); | |
3423 | else | |
3424 | rc = __copy_to_user((void *)buffer, kaddr, bsize_elem); | |
3425 | ||
3426 | kunmap(page); | |
3427 | ||
3428 | if (rc) { | |
3429 | pmcraid_err("failed to copy user data into sg list\n"); | |
3430 | return -EFAULT; | |
3431 | } | |
3432 | ||
3433 | scatterlist[i].length = bsize_elem; | |
3434 | } | |
3435 | ||
3436 | if (len % bsize_elem) { | |
3437 | struct page *page = sg_page(&scatterlist[i]); | |
3438 | ||
3439 | kaddr = kmap(page); | |
3440 | ||
3441 | if (direction == DMA_TO_DEVICE) | |
3442 | rc = __copy_from_user(kaddr, | |
3443 | (void *)buffer, | |
3444 | len % bsize_elem); | |
3445 | else | |
3446 | rc = __copy_to_user((void *)buffer, | |
3447 | kaddr, | |
3448 | len % bsize_elem); | |
3449 | ||
3450 | kunmap(page); | |
3451 | ||
3452 | scatterlist[i].length = len % bsize_elem; | |
3453 | } | |
3454 | ||
3455 | if (rc) { | |
3456 | pmcraid_err("failed to copy user data into sg list\n"); | |
3457 | rc = -EFAULT; | |
3458 | } | |
3459 | ||
3460 | return rc; | |
3461 | } | |
3462 | ||
3463 | /** | |
3464 | * pmcraid_queuecommand - Queue a mid-layer request | |
3465 | * @scsi_cmd: scsi command struct | |
3466 | * @done: done function | |
3467 | * | |
3468 | * This function queues a request generated by the mid-layer. Midlayer calls | |
3469 | * this routine within host->lock. Some of the functions called by queuecommand | |
3470 | * would use cmd block queue locks (free_pool_lock and pending_pool_lock) | |
3471 | * | |
3472 | * Return value: | |
3473 | * 0 on success | |
3474 | * SCSI_MLQUEUE_DEVICE_BUSY if device is busy | |
3475 | * SCSI_MLQUEUE_HOST_BUSY if host is busy | |
3476 | */ | |
f281233d | 3477 | static int pmcraid_queuecommand_lck( |
89a36810 AR |
3478 | struct scsi_cmnd *scsi_cmd, |
3479 | void (*done) (struct scsi_cmnd *) | |
3480 | ) | |
3481 | { | |
3482 | struct pmcraid_instance *pinstance; | |
3483 | struct pmcraid_resource_entry *res; | |
3484 | struct pmcraid_ioarcb *ioarcb; | |
3485 | struct pmcraid_cmd *cmd; | |
c20c4267 | 3486 | u32 fw_version; |
89a36810 AR |
3487 | int rc = 0; |
3488 | ||
3489 | pinstance = | |
3490 | (struct pmcraid_instance *)scsi_cmd->device->host->hostdata; | |
c20c4267 | 3491 | fw_version = be16_to_cpu(pinstance->inq_data->fw_version); |
89a36810 AR |
3492 | scsi_cmd->scsi_done = done; |
3493 | res = scsi_cmd->device->hostdata; | |
3494 | scsi_cmd->result = (DID_OK << 16); | |
3495 | ||
3496 | /* if adapter is marked as dead, set result to DID_NO_CONNECT complete | |
3497 | * the command | |
3498 | */ | |
3499 | if (pinstance->ioa_state == IOA_STATE_DEAD) { | |
3500 | pmcraid_info("IOA is dead, but queuecommand is scheduled\n"); | |
3501 | scsi_cmd->result = (DID_NO_CONNECT << 16); | |
3502 | scsi_cmd->scsi_done(scsi_cmd); | |
3503 | return 0; | |
3504 | } | |
3505 | ||
3506 | /* If IOA reset is in progress, can't queue the commands */ | |
3507 | if (pinstance->ioa_reset_in_progress) | |
3508 | return SCSI_MLQUEUE_HOST_BUSY; | |
3509 | ||
c20c4267 AR |
3510 | /* Firmware doesn't support SYNCHRONIZE_CACHE command (0x35), complete |
3511 | * the command here itself with success return | |
3512 | */ | |
3513 | if (scsi_cmd->cmnd[0] == SYNCHRONIZE_CACHE) { | |
3514 | pmcraid_info("SYNC_CACHE(0x35), completing in driver itself\n"); | |
3515 | scsi_cmd->scsi_done(scsi_cmd); | |
3516 | return 0; | |
3517 | } | |
3518 | ||
89a36810 AR |
3519 | /* initialize the command and IOARCB to be sent to IOA */ |
3520 | cmd = pmcraid_get_free_cmd(pinstance); | |
3521 | ||
3522 | if (cmd == NULL) { | |
3523 | pmcraid_err("free command block is not available\n"); | |
3524 | return SCSI_MLQUEUE_HOST_BUSY; | |
3525 | } | |
3526 | ||
3527 | cmd->scsi_cmd = scsi_cmd; | |
3528 | ioarcb = &(cmd->ioa_cb->ioarcb); | |
3529 | memcpy(ioarcb->cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len); | |
3530 | ioarcb->resource_handle = res->cfg_entry.resource_handle; | |
3531 | ioarcb->request_type = REQ_TYPE_SCSI; | |
3532 | ||
c20c4267 AR |
3533 | /* set hrrq number where the IOA should respond to. Note that all cmds |
3534 | * generated internally uses hrrq_id 0, exception to this is the cmd | |
3535 | * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses | |
3536 | * hrrq_id assigned here in queuecommand | |
3537 | */ | |
3538 | ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) % | |
3539 | pinstance->num_hrrq; | |
89a36810 AR |
3540 | cmd->cmd_done = pmcraid_io_done; |
3541 | ||
3542 | if (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry)) { | |
3543 | if (scsi_cmd->underflow == 0) | |
3544 | ioarcb->request_flags0 |= INHIBIT_UL_CHECK; | |
3545 | ||
3546 | if (res->sync_reqd) { | |
3547 | ioarcb->request_flags0 |= SYNC_COMPLETE; | |
3548 | res->sync_reqd = 0; | |
3549 | } | |
3550 | ||
3551 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
3552 | ioarcb->request_flags1 |= pmcraid_task_attributes(scsi_cmd); | |
3553 | ||
3554 | if (RES_IS_GSCSI(res->cfg_entry)) | |
3555 | ioarcb->request_flags1 |= DELAY_AFTER_RESET; | |
3556 | } | |
3557 | ||
3558 | rc = pmcraid_build_ioadl(pinstance, cmd); | |
3559 | ||
3560 | pmcraid_info("command (%d) CDB[0] = %x for %x:%x:%x:%x\n", | |
3561 | le32_to_cpu(ioarcb->response_handle) >> 2, | |
3562 | scsi_cmd->cmnd[0], pinstance->host->unique_id, | |
3563 | RES_IS_VSET(res->cfg_entry) ? PMCRAID_VSET_BUS_ID : | |
3564 | PMCRAID_PHYS_BUS_ID, | |
3565 | RES_IS_VSET(res->cfg_entry) ? | |
c20c4267 AR |
3566 | (fw_version <= PMCRAID_FW_VERSION_1 ? |
3567 | res->cfg_entry.unique_flags1 : | |
3568 | res->cfg_entry.array_id & 0xFF) : | |
89a36810 AR |
3569 | RES_TARGET(res->cfg_entry.resource_address), |
3570 | RES_LUN(res->cfg_entry.resource_address)); | |
3571 | ||
3572 | if (likely(rc == 0)) { | |
3573 | _pmcraid_fire_command(cmd); | |
3574 | } else { | |
3575 | pmcraid_err("queuecommand could not build ioadl\n"); | |
3576 | pmcraid_return_cmd(cmd); | |
3577 | rc = SCSI_MLQUEUE_HOST_BUSY; | |
3578 | } | |
3579 | ||
3580 | return rc; | |
3581 | } | |
3582 | ||
f281233d JG |
3583 | static DEF_SCSI_QCMD(pmcraid_queuecommand) |
3584 | ||
89a36810 AR |
3585 | /** |
3586 | * pmcraid_open -char node "open" entry, allowed only users with admin access | |
3587 | */ | |
3588 | static int pmcraid_chr_open(struct inode *inode, struct file *filep) | |
3589 | { | |
3590 | struct pmcraid_instance *pinstance; | |
3591 | ||
3592 | if (!capable(CAP_SYS_ADMIN)) | |
3593 | return -EACCES; | |
3594 | ||
3595 | /* Populate adapter instance * pointer for use by ioctl */ | |
3596 | pinstance = container_of(inode->i_cdev, struct pmcraid_instance, cdev); | |
3597 | filep->private_data = pinstance; | |
3598 | ||
3599 | return 0; | |
3600 | } | |
3601 | ||
3602 | /** | |
3603 | * pmcraid_release - char node "release" entry point | |
3604 | */ | |
3605 | static int pmcraid_chr_release(struct inode *inode, struct file *filep) | |
3606 | { | |
660bdddb | 3607 | struct pmcraid_instance *pinstance = filep->private_data; |
89a36810 AR |
3608 | |
3609 | filep->private_data = NULL; | |
3610 | fasync_helper(-1, filep, 0, &pinstance->aen_queue); | |
3611 | ||
3612 | return 0; | |
3613 | } | |
3614 | ||
3615 | /** | |
3616 | * pmcraid_fasync - Async notifier registration from applications | |
3617 | * | |
3618 | * This function adds the calling process to a driver global queue. When an | |
3619 | * event occurs, SIGIO will be sent to all processes in this queue. | |
3620 | */ | |
3621 | static int pmcraid_chr_fasync(int fd, struct file *filep, int mode) | |
3622 | { | |
3623 | struct pmcraid_instance *pinstance; | |
3624 | int rc; | |
3625 | ||
660bdddb | 3626 | pinstance = filep->private_data; |
89a36810 AR |
3627 | mutex_lock(&pinstance->aen_queue_lock); |
3628 | rc = fasync_helper(fd, filep, mode, &pinstance->aen_queue); | |
3629 | mutex_unlock(&pinstance->aen_queue_lock); | |
3630 | ||
3631 | return rc; | |
3632 | } | |
3633 | ||
3634 | ||
3635 | /** | |
3636 | * pmcraid_build_passthrough_ioadls - builds SG elements for passthrough | |
3637 | * commands sent over IOCTL interface | |
3638 | * | |
3639 | * @cmd : pointer to struct pmcraid_cmd | |
3640 | * @buflen : length of the request buffer | |
3641 | * @direction : data transfer direction | |
3642 | * | |
3643 | * Return value | |
af901ca1 | 3644 | * 0 on success, non-zero error code on failure |
89a36810 AR |
3645 | */ |
3646 | static int pmcraid_build_passthrough_ioadls( | |
3647 | struct pmcraid_cmd *cmd, | |
3648 | int buflen, | |
3649 | int direction | |
3650 | ) | |
3651 | { | |
3652 | struct pmcraid_sglist *sglist = NULL; | |
3653 | struct scatterlist *sg = NULL; | |
3654 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
3655 | struct pmcraid_ioadl_desc *ioadl; | |
3656 | int i; | |
3657 | ||
3658 | sglist = pmcraid_alloc_sglist(buflen); | |
3659 | ||
3660 | if (!sglist) { | |
3661 | pmcraid_err("can't allocate memory for passthrough SGls\n"); | |
3662 | return -ENOMEM; | |
3663 | } | |
3664 | ||
3665 | sglist->num_dma_sg = pci_map_sg(cmd->drv_inst->pdev, | |
3666 | sglist->scatterlist, | |
3667 | sglist->num_sg, direction); | |
3668 | ||
3669 | if (!sglist->num_dma_sg || sglist->num_dma_sg > PMCRAID_MAX_IOADLS) { | |
3670 | dev_err(&cmd->drv_inst->pdev->dev, | |
3671 | "Failed to map passthrough buffer!\n"); | |
3672 | pmcraid_free_sglist(sglist); | |
3673 | return -EIO; | |
3674 | } | |
3675 | ||
3676 | cmd->sglist = sglist; | |
3677 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
3678 | ||
3679 | ioadl = pmcraid_init_ioadls(cmd, sglist->num_dma_sg); | |
3680 | ||
3681 | /* Initialize IOADL descriptor addresses */ | |
3682 | for_each_sg(sglist->scatterlist, sg, sglist->num_dma_sg, i) { | |
3683 | ioadl[i].data_len = cpu_to_le32(sg_dma_len(sg)); | |
3684 | ioadl[i].address = cpu_to_le64(sg_dma_address(sg)); | |
3685 | ioadl[i].flags = 0; | |
3686 | } | |
3687 | ||
3688 | /* setup the last descriptor */ | |
88197966 | 3689 | ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC; |
89a36810 AR |
3690 | |
3691 | return 0; | |
3692 | } | |
3693 | ||
3694 | ||
3695 | /** | |
3696 | * pmcraid_release_passthrough_ioadls - release passthrough ioadls | |
3697 | * | |
3698 | * @cmd: pointer to struct pmcraid_cmd for which ioadls were allocated | |
3699 | * @buflen: size of the request buffer | |
3700 | * @direction: data transfer direction | |
3701 | * | |
3702 | * Return value | |
af901ca1 | 3703 | * 0 on success, non-zero error code on failure |
89a36810 AR |
3704 | */ |
3705 | static void pmcraid_release_passthrough_ioadls( | |
3706 | struct pmcraid_cmd *cmd, | |
3707 | int buflen, | |
3708 | int direction | |
3709 | ) | |
3710 | { | |
3711 | struct pmcraid_sglist *sglist = cmd->sglist; | |
3712 | ||
3713 | if (buflen > 0) { | |
3714 | pci_unmap_sg(cmd->drv_inst->pdev, | |
3715 | sglist->scatterlist, | |
3716 | sglist->num_sg, | |
3717 | direction); | |
3718 | pmcraid_free_sglist(sglist); | |
3719 | cmd->sglist = NULL; | |
3720 | } | |
3721 | } | |
3722 | ||
3723 | /** | |
3724 | * pmcraid_ioctl_passthrough - handling passthrough IOCTL commands | |
3725 | * | |
3726 | * @pinstance: pointer to adapter instance structure | |
3727 | * @cmd: ioctl code | |
3728 | * @arg: pointer to pmcraid_passthrough_buffer user buffer | |
3729 | * | |
3730 | * Return value | |
af901ca1 | 3731 | * 0 on success, non-zero error code on failure |
89a36810 AR |
3732 | */ |
3733 | static long pmcraid_ioctl_passthrough( | |
3734 | struct pmcraid_instance *pinstance, | |
3735 | unsigned int ioctl_cmd, | |
3736 | unsigned int buflen, | |
3737 | unsigned long arg | |
3738 | ) | |
3739 | { | |
3740 | struct pmcraid_passthrough_ioctl_buffer *buffer; | |
3741 | struct pmcraid_ioarcb *ioarcb; | |
3742 | struct pmcraid_cmd *cmd; | |
3743 | struct pmcraid_cmd *cancel_cmd; | |
3744 | unsigned long request_buffer; | |
3745 | unsigned long request_offset; | |
3746 | unsigned long lock_flags; | |
592488a3 | 3747 | void *ioasa; |
c20c4267 | 3748 | u32 ioasc; |
89a36810 AR |
3749 | int request_size; |
3750 | int buffer_size; | |
3751 | u8 access, direction; | |
3752 | int rc = 0; | |
3753 | ||
3754 | /* If IOA reset is in progress, wait 10 secs for reset to complete */ | |
3755 | if (pinstance->ioa_reset_in_progress) { | |
3756 | rc = wait_event_interruptible_timeout( | |
3757 | pinstance->reset_wait_q, | |
3758 | !pinstance->ioa_reset_in_progress, | |
3759 | msecs_to_jiffies(10000)); | |
3760 | ||
3761 | if (!rc) | |
3762 | return -ETIMEDOUT; | |
3763 | else if (rc < 0) | |
3764 | return -ERESTARTSYS; | |
3765 | } | |
3766 | ||
3767 | /* If adapter is not in operational state, return error */ | |
3768 | if (pinstance->ioa_state != IOA_STATE_OPERATIONAL) { | |
3769 | pmcraid_err("IOA is not operational\n"); | |
3770 | return -ENOTTY; | |
3771 | } | |
3772 | ||
3773 | buffer_size = sizeof(struct pmcraid_passthrough_ioctl_buffer); | |
3774 | buffer = kmalloc(buffer_size, GFP_KERNEL); | |
3775 | ||
3776 | if (!buffer) { | |
3777 | pmcraid_err("no memory for passthrough buffer\n"); | |
3778 | return -ENOMEM; | |
3779 | } | |
3780 | ||
3781 | request_offset = | |
3782 | offsetof(struct pmcraid_passthrough_ioctl_buffer, request_buffer); | |
3783 | ||
3784 | request_buffer = arg + request_offset; | |
3785 | ||
3786 | rc = __copy_from_user(buffer, | |
3787 | (struct pmcraid_passthrough_ioctl_buffer *) arg, | |
3788 | sizeof(struct pmcraid_passthrough_ioctl_buffer)); | |
592488a3 AR |
3789 | |
3790 | ioasa = | |
3791 | (void *)(arg + | |
3792 | offsetof(struct pmcraid_passthrough_ioctl_buffer, ioasa)); | |
3793 | ||
89a36810 AR |
3794 | if (rc) { |
3795 | pmcraid_err("ioctl: can't copy passthrough buffer\n"); | |
3796 | rc = -EFAULT; | |
3797 | goto out_free_buffer; | |
3798 | } | |
3799 | ||
3800 | request_size = buffer->ioarcb.data_transfer_length; | |
3801 | ||
3802 | if (buffer->ioarcb.request_flags0 & TRANSFER_DIR_WRITE) { | |
3803 | access = VERIFY_READ; | |
3804 | direction = DMA_TO_DEVICE; | |
3805 | } else { | |
3806 | access = VERIFY_WRITE; | |
3807 | direction = DMA_FROM_DEVICE; | |
3808 | } | |
3809 | ||
3810 | if (request_size > 0) { | |
3811 | rc = access_ok(access, arg, request_offset + request_size); | |
3812 | ||
3813 | if (!rc) { | |
3814 | rc = -EFAULT; | |
3815 | goto out_free_buffer; | |
3816 | } | |
5f6279da DR |
3817 | } else if (request_size < 0) { |
3818 | rc = -EINVAL; | |
3819 | goto out_free_buffer; | |
89a36810 AR |
3820 | } |
3821 | ||
3822 | /* check if we have any additional command parameters */ | |
3823 | if (buffer->ioarcb.add_cmd_param_length > PMCRAID_ADD_CMD_PARAM_LEN) { | |
3824 | rc = -EINVAL; | |
3825 | goto out_free_buffer; | |
3826 | } | |
3827 | ||
3828 | cmd = pmcraid_get_free_cmd(pinstance); | |
3829 | ||
3830 | if (!cmd) { | |
3831 | pmcraid_err("free command block is not available\n"); | |
3832 | rc = -ENOMEM; | |
3833 | goto out_free_buffer; | |
3834 | } | |
3835 | ||
3836 | cmd->scsi_cmd = NULL; | |
3837 | ioarcb = &(cmd->ioa_cb->ioarcb); | |
3838 | ||
3839 | /* Copy the user-provided IOARCB stuff field by field */ | |
3840 | ioarcb->resource_handle = buffer->ioarcb.resource_handle; | |
3841 | ioarcb->data_transfer_length = buffer->ioarcb.data_transfer_length; | |
3842 | ioarcb->cmd_timeout = buffer->ioarcb.cmd_timeout; | |
3843 | ioarcb->request_type = buffer->ioarcb.request_type; | |
3844 | ioarcb->request_flags0 = buffer->ioarcb.request_flags0; | |
3845 | ioarcb->request_flags1 = buffer->ioarcb.request_flags1; | |
3846 | memcpy(ioarcb->cdb, buffer->ioarcb.cdb, PMCRAID_MAX_CDB_LEN); | |
3847 | ||
3848 | if (buffer->ioarcb.add_cmd_param_length) { | |
3849 | ioarcb->add_cmd_param_length = | |
3850 | buffer->ioarcb.add_cmd_param_length; | |
3851 | ioarcb->add_cmd_param_offset = | |
3852 | buffer->ioarcb.add_cmd_param_offset; | |
3853 | memcpy(ioarcb->add_data.u.add_cmd_params, | |
3854 | buffer->ioarcb.add_data.u.add_cmd_params, | |
3855 | buffer->ioarcb.add_cmd_param_length); | |
3856 | } | |
3857 | ||
c20c4267 AR |
3858 | /* set hrrq number where the IOA should respond to. Note that all cmds |
3859 | * generated internally uses hrrq_id 0, exception to this is the cmd | |
3860 | * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses | |
3861 | * hrrq_id assigned here in queuecommand | |
3862 | */ | |
3863 | ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) % | |
3864 | pinstance->num_hrrq; | |
3865 | ||
89a36810 AR |
3866 | if (request_size) { |
3867 | rc = pmcraid_build_passthrough_ioadls(cmd, | |
3868 | request_size, | |
3869 | direction); | |
3870 | if (rc) { | |
3871 | pmcraid_err("couldn't build passthrough ioadls\n"); | |
3872 | goto out_free_buffer; | |
3873 | } | |
b5b51544 DR |
3874 | } else if (request_size < 0) { |
3875 | rc = -EINVAL; | |
3876 | goto out_free_buffer; | |
89a36810 AR |
3877 | } |
3878 | ||
3879 | /* If data is being written into the device, copy the data from user | |
3880 | * buffers | |
3881 | */ | |
3882 | if (direction == DMA_TO_DEVICE && request_size > 0) { | |
3883 | rc = pmcraid_copy_sglist(cmd->sglist, | |
3884 | request_buffer, | |
3885 | request_size, | |
3886 | direction); | |
3887 | if (rc) { | |
3888 | pmcraid_err("failed to copy user buffer\n"); | |
3889 | goto out_free_sglist; | |
3890 | } | |
3891 | } | |
3892 | ||
3893 | /* passthrough ioctl is a blocking command so, put the user to sleep | |
3894 | * until timeout. Note that a timeout value of 0 means, do timeout. | |
3895 | */ | |
3896 | cmd->cmd_done = pmcraid_internal_done; | |
3897 | init_completion(&cmd->wait_for_completion); | |
3898 | cmd->completion_req = 1; | |
3899 | ||
3900 | pmcraid_info("command(%d) (CDB[0] = %x) for %x\n", | |
3901 | le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2, | |
3902 | cmd->ioa_cb->ioarcb.cdb[0], | |
3903 | le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle)); | |
3904 | ||
3905 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
3906 | _pmcraid_fire_command(cmd); | |
3907 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
3908 | ||
c20c4267 AR |
3909 | /* NOTE ! Remove the below line once abort_task is implemented |
3910 | * in firmware. This line disables ioctl command timeout handling logic | |
3911 | * similar to IO command timeout handling, making ioctl commands to wait | |
3912 | * until the command completion regardless of timeout value specified in | |
3913 | * ioarcb | |
3914 | */ | |
3915 | buffer->ioarcb.cmd_timeout = 0; | |
3916 | ||
89a36810 AR |
3917 | /* If command timeout is specified put caller to wait till that time, |
3918 | * otherwise it would be blocking wait. If command gets timed out, it | |
3919 | * will be aborted. | |
3920 | */ | |
3921 | if (buffer->ioarcb.cmd_timeout == 0) { | |
3922 | wait_for_completion(&cmd->wait_for_completion); | |
3923 | } else if (!wait_for_completion_timeout( | |
3924 | &cmd->wait_for_completion, | |
3925 | msecs_to_jiffies(buffer->ioarcb.cmd_timeout * 1000))) { | |
3926 | ||
3927 | pmcraid_info("aborting cmd %d (CDB[0] = %x) due to timeout\n", | |
3928 | le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle >> 2), | |
3929 | cmd->ioa_cb->ioarcb.cdb[0]); | |
3930 | ||
89a36810 AR |
3931 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); |
3932 | cancel_cmd = pmcraid_abort_cmd(cmd); | |
3933 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
3934 | ||
3935 | if (cancel_cmd) { | |
3936 | wait_for_completion(&cancel_cmd->wait_for_completion); | |
c20c4267 | 3937 | ioasc = cancel_cmd->ioa_cb->ioasa.ioasc; |
89a36810 | 3938 | pmcraid_return_cmd(cancel_cmd); |
c20c4267 AR |
3939 | |
3940 | /* if abort task couldn't find the command i.e it got | |
3941 | * completed prior to aborting, return good completion. | |
25985edc | 3942 | * if command got aborted successfully or there was IOA |
c20c4267 AR |
3943 | * reset due to abort task itself getting timedout then |
3944 | * return -ETIMEDOUT | |
3945 | */ | |
3946 | if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET || | |
3947 | PMCRAID_IOASC_SENSE_KEY(ioasc) == 0x00) { | |
3948 | if (ioasc != PMCRAID_IOASC_GC_IOARCB_NOTFOUND) | |
3949 | rc = -ETIMEDOUT; | |
3950 | goto out_handle_response; | |
3951 | } | |
89a36810 AR |
3952 | } |
3953 | ||
c20c4267 AR |
3954 | /* no command block for abort task or abort task failed to abort |
3955 | * the IOARCB, then wait for 150 more seconds and initiate reset | |
3956 | * sequence after timeout | |
3957 | */ | |
3958 | if (!wait_for_completion_timeout( | |
3959 | &cmd->wait_for_completion, | |
3960 | msecs_to_jiffies(150 * 1000))) { | |
3961 | pmcraid_reset_bringup(cmd->drv_inst); | |
3962 | rc = -ETIMEDOUT; | |
3963 | } | |
89a36810 AR |
3964 | } |
3965 | ||
c20c4267 | 3966 | out_handle_response: |
592488a3 AR |
3967 | /* copy entire IOASA buffer and return IOCTL success. |
3968 | * If copying IOASA to user-buffer fails, return | |
89a36810 AR |
3969 | * EFAULT |
3970 | */ | |
592488a3 AR |
3971 | if (copy_to_user(ioasa, &cmd->ioa_cb->ioasa, |
3972 | sizeof(struct pmcraid_ioasa))) { | |
3973 | pmcraid_err("failed to copy ioasa buffer to user\n"); | |
3974 | rc = -EFAULT; | |
89a36810 | 3975 | } |
c20c4267 | 3976 | |
89a36810 AR |
3977 | /* If the data transfer was from device, copy the data onto user |
3978 | * buffers | |
3979 | */ | |
3980 | else if (direction == DMA_FROM_DEVICE && request_size > 0) { | |
3981 | rc = pmcraid_copy_sglist(cmd->sglist, | |
3982 | request_buffer, | |
3983 | request_size, | |
3984 | direction); | |
3985 | if (rc) { | |
3986 | pmcraid_err("failed to copy user buffer\n"); | |
3987 | rc = -EFAULT; | |
3988 | } | |
3989 | } | |
3990 | ||
3991 | out_free_sglist: | |
3992 | pmcraid_release_passthrough_ioadls(cmd, request_size, direction); | |
3993 | pmcraid_return_cmd(cmd); | |
3994 | ||
3995 | out_free_buffer: | |
3996 | kfree(buffer); | |
3997 | ||
3998 | return rc; | |
3999 | } | |
4000 | ||
4001 | ||
4002 | ||
4003 | ||
4004 | /** | |
4005 | * pmcraid_ioctl_driver - ioctl handler for commands handled by driver itself | |
4006 | * | |
4007 | * @pinstance: pointer to adapter instance structure | |
4008 | * @cmd: ioctl command passed in | |
4009 | * @buflen: length of user_buffer | |
4010 | * @user_buffer: user buffer pointer | |
4011 | * | |
4012 | * Return Value | |
4013 | * 0 in case of success, otherwise appropriate error code | |
4014 | */ | |
4015 | static long pmcraid_ioctl_driver( | |
4016 | struct pmcraid_instance *pinstance, | |
4017 | unsigned int cmd, | |
4018 | unsigned int buflen, | |
4019 | void __user *user_buffer | |
4020 | ) | |
4021 | { | |
4022 | int rc = -ENOSYS; | |
4023 | ||
4024 | if (!access_ok(VERIFY_READ, user_buffer, _IOC_SIZE(cmd))) { | |
c20c4267 | 4025 | pmcraid_err("ioctl_driver: access fault in request buffer\n"); |
89a36810 AR |
4026 | return -EFAULT; |
4027 | } | |
4028 | ||
4029 | switch (cmd) { | |
4030 | case PMCRAID_IOCTL_RESET_ADAPTER: | |
4031 | pmcraid_reset_bringup(pinstance); | |
4032 | rc = 0; | |
4033 | break; | |
4034 | ||
4035 | default: | |
4036 | break; | |
4037 | } | |
4038 | ||
4039 | return rc; | |
4040 | } | |
4041 | ||
4042 | /** | |
4043 | * pmcraid_check_ioctl_buffer - check for proper access to user buffer | |
4044 | * | |
4045 | * @cmd: ioctl command | |
4046 | * @arg: user buffer | |
4047 | * @hdr: pointer to kernel memory for pmcraid_ioctl_header | |
4048 | * | |
4049 | * Return Value | |
4050 | * negetive error code if there are access issues, otherwise zero. | |
4051 | * Upon success, returns ioctl header copied out of user buffer. | |
4052 | */ | |
4053 | ||
4054 | static int pmcraid_check_ioctl_buffer( | |
4055 | int cmd, | |
4056 | void __user *arg, | |
4057 | struct pmcraid_ioctl_header *hdr | |
4058 | ) | |
4059 | { | |
4060 | int rc = 0; | |
4061 | int access = VERIFY_READ; | |
4062 | ||
4063 | if (copy_from_user(hdr, arg, sizeof(struct pmcraid_ioctl_header))) { | |
4064 | pmcraid_err("couldn't copy ioctl header from user buffer\n"); | |
4065 | return -EFAULT; | |
4066 | } | |
4067 | ||
4068 | /* check for valid driver signature */ | |
4069 | rc = memcmp(hdr->signature, | |
4070 | PMCRAID_IOCTL_SIGNATURE, | |
4071 | sizeof(hdr->signature)); | |
4072 | if (rc) { | |
4073 | pmcraid_err("signature verification failed\n"); | |
4074 | return -EINVAL; | |
4075 | } | |
4076 | ||
89a36810 AR |
4077 | /* check for appropriate buffer access */ |
4078 | if ((_IOC_DIR(cmd) & _IOC_READ) == _IOC_READ) | |
4079 | access = VERIFY_WRITE; | |
4080 | ||
4081 | rc = access_ok(access, | |
4082 | (arg + sizeof(struct pmcraid_ioctl_header)), | |
4083 | hdr->buffer_length); | |
4084 | if (!rc) { | |
4085 | pmcraid_err("access failed for user buffer of size %d\n", | |
4086 | hdr->buffer_length); | |
4087 | return -EFAULT; | |
4088 | } | |
4089 | ||
4090 | return 0; | |
4091 | } | |
4092 | ||
4093 | /** | |
4094 | * pmcraid_ioctl - char node ioctl entry point | |
4095 | */ | |
4096 | static long pmcraid_chr_ioctl( | |
4097 | struct file *filep, | |
4098 | unsigned int cmd, | |
4099 | unsigned long arg | |
4100 | ) | |
4101 | { | |
4102 | struct pmcraid_instance *pinstance = NULL; | |
4103 | struct pmcraid_ioctl_header *hdr = NULL; | |
4104 | int retval = -ENOTTY; | |
4105 | ||
4106 | hdr = kmalloc(GFP_KERNEL, sizeof(struct pmcraid_ioctl_header)); | |
4107 | ||
4108 | if (!hdr) { | |
4109 | pmcraid_err("faile to allocate memory for ioctl header\n"); | |
4110 | return -ENOMEM; | |
4111 | } | |
4112 | ||
4113 | retval = pmcraid_check_ioctl_buffer(cmd, (void *)arg, hdr); | |
4114 | ||
4115 | if (retval) { | |
4116 | pmcraid_info("chr_ioctl: header check failed\n"); | |
4117 | kfree(hdr); | |
4118 | return retval; | |
4119 | } | |
4120 | ||
660bdddb | 4121 | pinstance = filep->private_data; |
89a36810 AR |
4122 | |
4123 | if (!pinstance) { | |
4124 | pmcraid_info("adapter instance is not found\n"); | |
4125 | kfree(hdr); | |
4126 | return -ENOTTY; | |
4127 | } | |
4128 | ||
4129 | switch (_IOC_TYPE(cmd)) { | |
4130 | ||
4131 | case PMCRAID_PASSTHROUGH_IOCTL: | |
4132 | /* If ioctl code is to download microcode, we need to block | |
4133 | * mid-layer requests. | |
4134 | */ | |
4135 | if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE) | |
4136 | scsi_block_requests(pinstance->host); | |
4137 | ||
4138 | retval = pmcraid_ioctl_passthrough(pinstance, | |
4139 | cmd, | |
4140 | hdr->buffer_length, | |
4141 | arg); | |
4142 | ||
4143 | if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE) | |
4144 | scsi_unblock_requests(pinstance->host); | |
4145 | break; | |
4146 | ||
4147 | case PMCRAID_DRIVER_IOCTL: | |
4148 | arg += sizeof(struct pmcraid_ioctl_header); | |
4149 | retval = pmcraid_ioctl_driver(pinstance, | |
4150 | cmd, | |
4151 | hdr->buffer_length, | |
4152 | (void __user *)arg); | |
4153 | break; | |
4154 | ||
4155 | default: | |
4156 | retval = -ENOTTY; | |
4157 | break; | |
4158 | } | |
4159 | ||
4160 | kfree(hdr); | |
4161 | ||
4162 | return retval; | |
4163 | } | |
4164 | ||
4165 | /** | |
4166 | * File operations structure for management interface | |
4167 | */ | |
4168 | static const struct file_operations pmcraid_fops = { | |
4169 | .owner = THIS_MODULE, | |
4170 | .open = pmcraid_chr_open, | |
4171 | .release = pmcraid_chr_release, | |
4172 | .fasync = pmcraid_chr_fasync, | |
4173 | .unlocked_ioctl = pmcraid_chr_ioctl, | |
4174 | #ifdef CONFIG_COMPAT | |
4175 | .compat_ioctl = pmcraid_chr_ioctl, | |
4176 | #endif | |
6038f373 | 4177 | .llseek = noop_llseek, |
89a36810 AR |
4178 | }; |
4179 | ||
4180 | ||
4181 | ||
4182 | ||
4183 | /** | |
4184 | * pmcraid_show_log_level - Display adapter's error logging level | |
4185 | * @dev: class device struct | |
4186 | * @buf: buffer | |
4187 | * | |
4188 | * Return value: | |
4189 | * number of bytes printed to buffer | |
4190 | */ | |
4191 | static ssize_t pmcraid_show_log_level( | |
4192 | struct device *dev, | |
4193 | struct device_attribute *attr, | |
4194 | char *buf) | |
4195 | { | |
4196 | struct Scsi_Host *shost = class_to_shost(dev); | |
4197 | struct pmcraid_instance *pinstance = | |
4198 | (struct pmcraid_instance *)shost->hostdata; | |
4199 | return snprintf(buf, PAGE_SIZE, "%d\n", pinstance->current_log_level); | |
4200 | } | |
4201 | ||
4202 | /** | |
4203 | * pmcraid_store_log_level - Change the adapter's error logging level | |
4204 | * @dev: class device struct | |
4205 | * @buf: buffer | |
4206 | * @count: not used | |
4207 | * | |
4208 | * Return value: | |
4209 | * number of bytes printed to buffer | |
4210 | */ | |
4211 | static ssize_t pmcraid_store_log_level( | |
4212 | struct device *dev, | |
4213 | struct device_attribute *attr, | |
4214 | const char *buf, | |
4215 | size_t count | |
4216 | ) | |
4217 | { | |
4218 | struct Scsi_Host *shost; | |
4219 | struct pmcraid_instance *pinstance; | |
4220 | unsigned long val; | |
4221 | ||
4222 | if (strict_strtoul(buf, 10, &val)) | |
4223 | return -EINVAL; | |
4224 | /* log-level should be from 0 to 2 */ | |
4225 | if (val > 2) | |
4226 | return -EINVAL; | |
4227 | ||
4228 | shost = class_to_shost(dev); | |
4229 | pinstance = (struct pmcraid_instance *)shost->hostdata; | |
4230 | pinstance->current_log_level = val; | |
4231 | ||
4232 | return strlen(buf); | |
4233 | } | |
4234 | ||
4235 | static struct device_attribute pmcraid_log_level_attr = { | |
4236 | .attr = { | |
4237 | .name = "log_level", | |
4238 | .mode = S_IRUGO | S_IWUSR, | |
4239 | }, | |
4240 | .show = pmcraid_show_log_level, | |
4241 | .store = pmcraid_store_log_level, | |
4242 | }; | |
4243 | ||
4244 | /** | |
4245 | * pmcraid_show_drv_version - Display driver version | |
4246 | * @dev: class device struct | |
4247 | * @buf: buffer | |
4248 | * | |
4249 | * Return value: | |
4250 | * number of bytes printed to buffer | |
4251 | */ | |
4252 | static ssize_t pmcraid_show_drv_version( | |
4253 | struct device *dev, | |
4254 | struct device_attribute *attr, | |
4255 | char *buf | |
4256 | ) | |
4257 | { | |
a1b66665 MM |
4258 | return snprintf(buf, PAGE_SIZE, "version: %s\n", |
4259 | PMCRAID_DRIVER_VERSION); | |
89a36810 AR |
4260 | } |
4261 | ||
4262 | static struct device_attribute pmcraid_driver_version_attr = { | |
4263 | .attr = { | |
4264 | .name = "drv_version", | |
4265 | .mode = S_IRUGO, | |
4266 | }, | |
4267 | .show = pmcraid_show_drv_version, | |
4268 | }; | |
4269 | ||
4270 | /** | |
4271 | * pmcraid_show_io_adapter_id - Display driver assigned adapter id | |
4272 | * @dev: class device struct | |
4273 | * @buf: buffer | |
4274 | * | |
4275 | * Return value: | |
4276 | * number of bytes printed to buffer | |
4277 | */ | |
4278 | static ssize_t pmcraid_show_adapter_id( | |
4279 | struct device *dev, | |
4280 | struct device_attribute *attr, | |
4281 | char *buf | |
4282 | ) | |
4283 | { | |
4284 | struct Scsi_Host *shost = class_to_shost(dev); | |
4285 | struct pmcraid_instance *pinstance = | |
4286 | (struct pmcraid_instance *)shost->hostdata; | |
4287 | u32 adapter_id = (pinstance->pdev->bus->number << 8) | | |
4288 | pinstance->pdev->devfn; | |
4289 | u32 aen_group = pmcraid_event_family.id; | |
4290 | ||
4291 | return snprintf(buf, PAGE_SIZE, | |
4292 | "adapter id: %d\nminor: %d\naen group: %d\n", | |
4293 | adapter_id, MINOR(pinstance->cdev.dev), aen_group); | |
4294 | } | |
4295 | ||
4296 | static struct device_attribute pmcraid_adapter_id_attr = { | |
4297 | .attr = { | |
4298 | .name = "adapter_id", | |
4299 | .mode = S_IRUGO | S_IWUSR, | |
4300 | }, | |
4301 | .show = pmcraid_show_adapter_id, | |
4302 | }; | |
4303 | ||
4304 | static struct device_attribute *pmcraid_host_attrs[] = { | |
4305 | &pmcraid_log_level_attr, | |
4306 | &pmcraid_driver_version_attr, | |
4307 | &pmcraid_adapter_id_attr, | |
4308 | NULL, | |
4309 | }; | |
4310 | ||
4311 | ||
4312 | /* host template structure for pmcraid driver */ | |
4313 | static struct scsi_host_template pmcraid_host_template = { | |
4314 | .module = THIS_MODULE, | |
4315 | .name = PMCRAID_DRIVER_NAME, | |
4316 | .queuecommand = pmcraid_queuecommand, | |
4317 | .eh_abort_handler = pmcraid_eh_abort_handler, | |
4318 | .eh_bus_reset_handler = pmcraid_eh_bus_reset_handler, | |
4319 | .eh_target_reset_handler = pmcraid_eh_target_reset_handler, | |
4320 | .eh_device_reset_handler = pmcraid_eh_device_reset_handler, | |
4321 | .eh_host_reset_handler = pmcraid_eh_host_reset_handler, | |
4322 | ||
4323 | .slave_alloc = pmcraid_slave_alloc, | |
4324 | .slave_configure = pmcraid_slave_configure, | |
4325 | .slave_destroy = pmcraid_slave_destroy, | |
4326 | .change_queue_depth = pmcraid_change_queue_depth, | |
4327 | .change_queue_type = pmcraid_change_queue_type, | |
4328 | .can_queue = PMCRAID_MAX_IO_CMD, | |
4329 | .this_id = -1, | |
4330 | .sg_tablesize = PMCRAID_MAX_IOADLS, | |
4331 | .max_sectors = PMCRAID_IOA_MAX_SECTORS, | |
4332 | .cmd_per_lun = PMCRAID_MAX_CMD_PER_LUN, | |
4333 | .use_clustering = ENABLE_CLUSTERING, | |
4334 | .shost_attrs = pmcraid_host_attrs, | |
4335 | .proc_name = PMCRAID_DRIVER_NAME | |
4336 | }; | |
4337 | ||
c20c4267 AR |
4338 | /* |
4339 | * pmcraid_isr_msix - implements MSI-X interrupt handling routine | |
4340 | * @irq: interrupt vector number | |
4341 | * @dev_id: pointer hrrq_vector | |
89a36810 AR |
4342 | * |
4343 | * Return Value | |
c20c4267 | 4344 | * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored |
89a36810 | 4345 | */ |
c20c4267 AR |
4346 | |
4347 | static irqreturn_t pmcraid_isr_msix(int irq, void *dev_id) | |
89a36810 | 4348 | { |
c20c4267 AR |
4349 | struct pmcraid_isr_param *hrrq_vector; |
4350 | struct pmcraid_instance *pinstance; | |
4351 | unsigned long lock_flags; | |
4352 | u32 intrs_val; | |
4353 | int hrrq_id; | |
4354 | ||
4355 | hrrq_vector = (struct pmcraid_isr_param *)dev_id; | |
4356 | hrrq_id = hrrq_vector->hrrq_id; | |
4357 | pinstance = hrrq_vector->drv_inst; | |
4358 | ||
4359 | if (!hrrq_id) { | |
4360 | /* Read the interrupt */ | |
4361 | intrs_val = pmcraid_read_interrupts(pinstance); | |
4362 | if (intrs_val && | |
4363 | ((ioread32(pinstance->int_regs.host_ioa_interrupt_reg) | |
4364 | & DOORBELL_INTR_MSIX_CLR) == 0)) { | |
4365 | /* Any error interrupts including unit_check, | |
4366 | * initiate IOA reset.In case of unit check indicate | |
4367 | * to reset_sequence that IOA unit checked and prepare | |
4368 | * for a dump during reset sequence | |
4369 | */ | |
4370 | if (intrs_val & PMCRAID_ERROR_INTERRUPTS) { | |
4371 | if (intrs_val & INTRS_IOA_UNIT_CHECK) | |
4372 | pinstance->ioa_unit_check = 1; | |
4373 | ||
4374 | pmcraid_err("ISR: error interrupts: %x \ | |
4375 | initiating reset\n", intrs_val); | |
4376 | spin_lock_irqsave(pinstance->host->host_lock, | |
4377 | lock_flags); | |
4378 | pmcraid_initiate_reset(pinstance); | |
4379 | spin_unlock_irqrestore( | |
4380 | pinstance->host->host_lock, | |
4381 | lock_flags); | |
4382 | } | |
4383 | /* If interrupt was as part of the ioa initialization, | |
4384 | * clear it. Delete the timer and wakeup the | |
4385 | * reset engine to proceed with reset sequence | |
4386 | */ | |
4387 | if (intrs_val & INTRS_TRANSITION_TO_OPERATIONAL) | |
4388 | pmcraid_clr_trans_op(pinstance); | |
4389 | ||
4390 | /* Clear the interrupt register by writing | |
4391 | * to host to ioa doorbell. Once done | |
4392 | * FW will clear the interrupt. | |
4393 | */ | |
4394 | iowrite32(DOORBELL_INTR_MSIX_CLR, | |
4395 | pinstance->int_regs.host_ioa_interrupt_reg); | |
4396 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
4397 | ||
89a36810 | 4398 | |
c20c4267 AR |
4399 | } |
4400 | } | |
4401 | ||
4402 | tasklet_schedule(&(pinstance->isr_tasklet[hrrq_id])); | |
4403 | ||
4404 | return IRQ_HANDLED; | |
89a36810 AR |
4405 | } |
4406 | ||
4407 | /** | |
c20c4267 | 4408 | * pmcraid_isr - implements legacy interrupt handling routine |
89a36810 AR |
4409 | * |
4410 | * @irq: interrupt vector number | |
4411 | * @dev_id: pointer hrrq_vector | |
4412 | * | |
4413 | * Return Value | |
4414 | * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored | |
4415 | */ | |
4416 | static irqreturn_t pmcraid_isr(int irq, void *dev_id) | |
4417 | { | |
4418 | struct pmcraid_isr_param *hrrq_vector; | |
4419 | struct pmcraid_instance *pinstance; | |
89a36810 | 4420 | u32 intrs; |
c20c4267 AR |
4421 | unsigned long lock_flags; |
4422 | int hrrq_id = 0; | |
89a36810 AR |
4423 | |
4424 | /* In case of legacy interrupt mode where interrupts are shared across | |
4425 | * isrs, it may be possible that the current interrupt is not from IOA | |
4426 | */ | |
4427 | if (!dev_id) { | |
4428 | printk(KERN_INFO "%s(): NULL host pointer\n", __func__); | |
4429 | return IRQ_NONE; | |
4430 | } | |
89a36810 AR |
4431 | hrrq_vector = (struct pmcraid_isr_param *)dev_id; |
4432 | pinstance = hrrq_vector->drv_inst; | |
4433 | ||
89a36810 AR |
4434 | intrs = pmcraid_read_interrupts(pinstance); |
4435 | ||
c20c4267 | 4436 | if (unlikely((intrs & PMCRAID_PCI_INTERRUPTS) == 0)) |
89a36810 | 4437 | return IRQ_NONE; |
89a36810 AR |
4438 | |
4439 | /* Any error interrupts including unit_check, initiate IOA reset. | |
4440 | * In case of unit check indicate to reset_sequence that IOA unit | |
4441 | * checked and prepare for a dump during reset sequence | |
4442 | */ | |
4443 | if (intrs & PMCRAID_ERROR_INTERRUPTS) { | |
4444 | ||
4445 | if (intrs & INTRS_IOA_UNIT_CHECK) | |
4446 | pinstance->ioa_unit_check = 1; | |
4447 | ||
4448 | iowrite32(intrs, | |
4449 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
4450 | pmcraid_err("ISR: error interrupts: %x initiating reset\n", | |
4451 | intrs); | |
c20c4267 AR |
4452 | intrs = ioread32( |
4453 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
4454 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
89a36810 | 4455 | pmcraid_initiate_reset(pinstance); |
c20c4267 | 4456 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); |
89a36810 | 4457 | } else { |
c20c4267 AR |
4458 | /* If interrupt was as part of the ioa initialization, |
4459 | * clear. Delete the timer and wakeup the | |
4460 | * reset engine to proceed with reset sequence | |
4461 | */ | |
4462 | if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) { | |
4463 | pmcraid_clr_trans_op(pinstance); | |
4464 | } else { | |
4465 | iowrite32(intrs, | |
4466 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
4467 | ioread32( | |
4468 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
89a36810 | 4469 | |
c20c4267 AR |
4470 | tasklet_schedule( |
4471 | &(pinstance->isr_tasklet[hrrq_id])); | |
4472 | } | |
4473 | } | |
89a36810 AR |
4474 | |
4475 | return IRQ_HANDLED; | |
4476 | } | |
4477 | ||
4478 | ||
4479 | /** | |
4480 | * pmcraid_worker_function - worker thread function | |
4481 | * | |
4482 | * @workp: pointer to struct work queue | |
4483 | * | |
4484 | * Return Value | |
4485 | * None | |
4486 | */ | |
4487 | ||
4488 | static void pmcraid_worker_function(struct work_struct *workp) | |
4489 | { | |
4490 | struct pmcraid_instance *pinstance; | |
4491 | struct pmcraid_resource_entry *res; | |
4492 | struct pmcraid_resource_entry *temp; | |
4493 | struct scsi_device *sdev; | |
4494 | unsigned long lock_flags; | |
4495 | unsigned long host_lock_flags; | |
c20c4267 | 4496 | u16 fw_version; |
89a36810 AR |
4497 | u8 bus, target, lun; |
4498 | ||
4499 | pinstance = container_of(workp, struct pmcraid_instance, worker_q); | |
4500 | /* add resources only after host is added into system */ | |
4501 | if (!atomic_read(&pinstance->expose_resources)) | |
4502 | return; | |
4503 | ||
c20c4267 AR |
4504 | fw_version = be16_to_cpu(pinstance->inq_data->fw_version); |
4505 | ||
89a36810 AR |
4506 | spin_lock_irqsave(&pinstance->resource_lock, lock_flags); |
4507 | list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) { | |
4508 | ||
4509 | if (res->change_detected == RES_CHANGE_DEL && res->scsi_dev) { | |
4510 | sdev = res->scsi_dev; | |
4511 | ||
4512 | /* host_lock must be held before calling | |
4513 | * scsi_device_get | |
4514 | */ | |
4515 | spin_lock_irqsave(pinstance->host->host_lock, | |
4516 | host_lock_flags); | |
4517 | if (!scsi_device_get(sdev)) { | |
4518 | spin_unlock_irqrestore( | |
4519 | pinstance->host->host_lock, | |
4520 | host_lock_flags); | |
4521 | pmcraid_info("deleting %x from midlayer\n", | |
4522 | res->cfg_entry.resource_address); | |
4523 | list_move_tail(&res->queue, | |
4524 | &pinstance->free_res_q); | |
4525 | spin_unlock_irqrestore( | |
4526 | &pinstance->resource_lock, | |
4527 | lock_flags); | |
4528 | scsi_remove_device(sdev); | |
4529 | scsi_device_put(sdev); | |
4530 | spin_lock_irqsave(&pinstance->resource_lock, | |
4531 | lock_flags); | |
4532 | res->change_detected = 0; | |
4533 | } else { | |
4534 | spin_unlock_irqrestore( | |
4535 | pinstance->host->host_lock, | |
4536 | host_lock_flags); | |
4537 | } | |
4538 | } | |
4539 | } | |
4540 | ||
4541 | list_for_each_entry(res, &pinstance->used_res_q, queue) { | |
4542 | ||
4543 | if (res->change_detected == RES_CHANGE_ADD) { | |
4544 | ||
c20c4267 AR |
4545 | if (!pmcraid_expose_resource(fw_version, |
4546 | &res->cfg_entry)) | |
89a36810 AR |
4547 | continue; |
4548 | ||
4549 | if (RES_IS_VSET(res->cfg_entry)) { | |
4550 | bus = PMCRAID_VSET_BUS_ID; | |
c20c4267 AR |
4551 | if (fw_version <= PMCRAID_FW_VERSION_1) |
4552 | target = res->cfg_entry.unique_flags1; | |
4553 | else | |
4554 | target = res->cfg_entry.array_id & 0xFF; | |
89a36810 AR |
4555 | lun = PMCRAID_VSET_LUN_ID; |
4556 | } else { | |
4557 | bus = PMCRAID_PHYS_BUS_ID; | |
4558 | target = | |
4559 | RES_TARGET( | |
4560 | res->cfg_entry.resource_address); | |
4561 | lun = RES_LUN(res->cfg_entry.resource_address); | |
4562 | } | |
4563 | ||
4564 | res->change_detected = 0; | |
4565 | spin_unlock_irqrestore(&pinstance->resource_lock, | |
4566 | lock_flags); | |
4567 | scsi_add_device(pinstance->host, bus, target, lun); | |
4568 | spin_lock_irqsave(&pinstance->resource_lock, | |
4569 | lock_flags); | |
4570 | } | |
4571 | } | |
4572 | ||
4573 | spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags); | |
4574 | } | |
4575 | ||
4576 | /** | |
4577 | * pmcraid_tasklet_function - Tasklet function | |
4578 | * | |
4579 | * @instance: pointer to msix param structure | |
4580 | * | |
4581 | * Return Value | |
4582 | * None | |
4583 | */ | |
c20c4267 | 4584 | static void pmcraid_tasklet_function(unsigned long instance) |
89a36810 AR |
4585 | { |
4586 | struct pmcraid_isr_param *hrrq_vector; | |
4587 | struct pmcraid_instance *pinstance; | |
4588 | unsigned long hrrq_lock_flags; | |
4589 | unsigned long pending_lock_flags; | |
4590 | unsigned long host_lock_flags; | |
4591 | spinlock_t *lockp; /* hrrq buffer lock */ | |
4592 | int id; | |
89a36810 AR |
4593 | __le32 resp; |
4594 | ||
4595 | hrrq_vector = (struct pmcraid_isr_param *)instance; | |
4596 | pinstance = hrrq_vector->drv_inst; | |
4597 | id = hrrq_vector->hrrq_id; | |
4598 | lockp = &(pinstance->hrrq_lock[id]); | |
89a36810 AR |
4599 | |
4600 | /* loop through each of the commands responded by IOA. Each HRRQ buf is | |
4601 | * protected by its own lock. Traversals must be done within this lock | |
4602 | * as there may be multiple tasklets running on multiple CPUs. Note | |
4603 | * that the lock is held just for picking up the response handle and | |
4604 | * manipulating hrrq_curr/toggle_bit values. | |
4605 | */ | |
4606 | spin_lock_irqsave(lockp, hrrq_lock_flags); | |
4607 | ||
4608 | resp = le32_to_cpu(*(pinstance->hrrq_curr[id])); | |
4609 | ||
4610 | while ((resp & HRRQ_TOGGLE_BIT) == | |
4611 | pinstance->host_toggle_bit[id]) { | |
4612 | ||
4613 | int cmd_index = resp >> 2; | |
4614 | struct pmcraid_cmd *cmd = NULL; | |
4615 | ||
89a36810 AR |
4616 | if (pinstance->hrrq_curr[id] < pinstance->hrrq_end[id]) { |
4617 | pinstance->hrrq_curr[id]++; | |
4618 | } else { | |
4619 | pinstance->hrrq_curr[id] = pinstance->hrrq_start[id]; | |
4620 | pinstance->host_toggle_bit[id] ^= 1u; | |
4621 | } | |
4622 | ||
c20c4267 AR |
4623 | if (cmd_index >= PMCRAID_MAX_CMD) { |
4624 | /* In case of invalid response handle, log message */ | |
4625 | pmcraid_err("Invalid response handle %d\n", cmd_index); | |
4626 | resp = le32_to_cpu(*(pinstance->hrrq_curr[id])); | |
4627 | continue; | |
4628 | } | |
4629 | ||
4630 | cmd = pinstance->cmd_list[cmd_index]; | |
89a36810 AR |
4631 | spin_unlock_irqrestore(lockp, hrrq_lock_flags); |
4632 | ||
4633 | spin_lock_irqsave(&pinstance->pending_pool_lock, | |
4634 | pending_lock_flags); | |
4635 | list_del(&cmd->free_list); | |
4636 | spin_unlock_irqrestore(&pinstance->pending_pool_lock, | |
4637 | pending_lock_flags); | |
4638 | del_timer(&cmd->timer); | |
4639 | atomic_dec(&pinstance->outstanding_cmds); | |
4640 | ||
4641 | if (cmd->cmd_done == pmcraid_ioa_reset) { | |
4642 | spin_lock_irqsave(pinstance->host->host_lock, | |
4643 | host_lock_flags); | |
4644 | cmd->cmd_done(cmd); | |
4645 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
4646 | host_lock_flags); | |
4647 | } else if (cmd->cmd_done != NULL) { | |
4648 | cmd->cmd_done(cmd); | |
4649 | } | |
4650 | /* loop over until we are done with all responses */ | |
4651 | spin_lock_irqsave(lockp, hrrq_lock_flags); | |
4652 | resp = le32_to_cpu(*(pinstance->hrrq_curr[id])); | |
4653 | } | |
4654 | ||
4655 | spin_unlock_irqrestore(lockp, hrrq_lock_flags); | |
4656 | } | |
4657 | ||
4658 | /** | |
4659 | * pmcraid_unregister_interrupt_handler - de-register interrupts handlers | |
4660 | * @pinstance: pointer to adapter instance structure | |
4661 | * | |
4662 | * This routine un-registers registered interrupt handler and | |
4663 | * also frees irqs/vectors. | |
4664 | * | |
4665 | * Retun Value | |
4666 | * None | |
4667 | */ | |
4668 | static | |
4669 | void pmcraid_unregister_interrupt_handler(struct pmcraid_instance *pinstance) | |
4670 | { | |
c20c4267 AR |
4671 | int i; |
4672 | ||
4673 | for (i = 0; i < pinstance->num_hrrq; i++) | |
4674 | free_irq(pinstance->hrrq_vector[i].vector, | |
4675 | &(pinstance->hrrq_vector[i])); | |
4676 | ||
4677 | if (pinstance->interrupt_mode) { | |
4678 | pci_disable_msix(pinstance->pdev); | |
4679 | pinstance->interrupt_mode = 0; | |
4680 | } | |
89a36810 AR |
4681 | } |
4682 | ||
4683 | /** | |
4684 | * pmcraid_register_interrupt_handler - registers interrupt handler | |
4685 | * @pinstance: pointer to per-adapter instance structure | |
4686 | * | |
4687 | * Return Value | |
4688 | * 0 on success, non-zero error code otherwise. | |
4689 | */ | |
4690 | static int | |
4691 | pmcraid_register_interrupt_handler(struct pmcraid_instance *pinstance) | |
4692 | { | |
c20c4267 | 4693 | int rc; |
89a36810 AR |
4694 | struct pci_dev *pdev = pinstance->pdev; |
4695 | ||
5da61410 AR |
4696 | if ((pmcraid_enable_msix) && |
4697 | (pci_find_capability(pdev, PCI_CAP_ID_MSIX))) { | |
c20c4267 AR |
4698 | int num_hrrq = PMCRAID_NUM_MSIX_VECTORS; |
4699 | struct msix_entry entries[PMCRAID_NUM_MSIX_VECTORS]; | |
4700 | int i; | |
4701 | for (i = 0; i < PMCRAID_NUM_MSIX_VECTORS; i++) | |
4702 | entries[i].entry = i; | |
4703 | ||
4704 | rc = pci_enable_msix(pdev, entries, num_hrrq); | |
4705 | if (rc < 0) | |
4706 | goto pmcraid_isr_legacy; | |
4707 | ||
4708 | /* Check how many MSIX vectors are allocated and register | |
4709 | * msi-x handlers for each of them giving appropriate buffer | |
4710 | */ | |
4711 | if (rc > 0) { | |
4712 | num_hrrq = rc; | |
4713 | if (pci_enable_msix(pdev, entries, num_hrrq)) | |
4714 | goto pmcraid_isr_legacy; | |
4715 | } | |
4716 | ||
4717 | for (i = 0; i < num_hrrq; i++) { | |
4718 | pinstance->hrrq_vector[i].hrrq_id = i; | |
4719 | pinstance->hrrq_vector[i].drv_inst = pinstance; | |
4720 | pinstance->hrrq_vector[i].vector = entries[i].vector; | |
4721 | rc = request_irq(pinstance->hrrq_vector[i].vector, | |
4722 | pmcraid_isr_msix, 0, | |
4723 | PMCRAID_DRIVER_NAME, | |
4724 | &(pinstance->hrrq_vector[i])); | |
4725 | ||
4726 | if (rc) { | |
4727 | int j; | |
4728 | for (j = 0; j < i; j++) | |
4729 | free_irq(entries[j].vector, | |
4730 | &(pinstance->hrrq_vector[j])); | |
4731 | pci_disable_msix(pdev); | |
4732 | goto pmcraid_isr_legacy; | |
4733 | } | |
4734 | } | |
4735 | ||
4736 | pinstance->num_hrrq = num_hrrq; | |
4737 | pinstance->interrupt_mode = 1; | |
4738 | iowrite32(DOORBELL_INTR_MODE_MSIX, | |
4739 | pinstance->int_regs.host_ioa_interrupt_reg); | |
4740 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
4741 | goto pmcraid_isr_out; | |
4742 | } | |
4743 | ||
4744 | pmcraid_isr_legacy: | |
4745 | /* If MSI-X registration failed fallback to legacy mode, where | |
4746 | * only one hrrq entry will be used | |
4747 | */ | |
89a36810 AR |
4748 | pinstance->hrrq_vector[0].hrrq_id = 0; |
4749 | pinstance->hrrq_vector[0].drv_inst = pinstance; | |
c20c4267 | 4750 | pinstance->hrrq_vector[0].vector = pdev->irq; |
89a36810 | 4751 | pinstance->num_hrrq = 1; |
c20c4267 AR |
4752 | rc = 0; |
4753 | ||
4754 | rc = request_irq(pdev->irq, pmcraid_isr, IRQF_SHARED, | |
4755 | PMCRAID_DRIVER_NAME, &pinstance->hrrq_vector[0]); | |
4756 | pmcraid_isr_out: | |
4757 | return rc; | |
89a36810 AR |
4758 | } |
4759 | ||
4760 | /** | |
4761 | * pmcraid_release_cmd_blocks - release buufers allocated for command blocks | |
4762 | * @pinstance: per adapter instance structure pointer | |
4763 | * @max_index: number of buffer blocks to release | |
4764 | * | |
4765 | * Return Value | |
4766 | * None | |
4767 | */ | |
4768 | static void | |
4769 | pmcraid_release_cmd_blocks(struct pmcraid_instance *pinstance, int max_index) | |
4770 | { | |
4771 | int i; | |
4772 | for (i = 0; i < max_index; i++) { | |
4773 | kmem_cache_free(pinstance->cmd_cachep, pinstance->cmd_list[i]); | |
4774 | pinstance->cmd_list[i] = NULL; | |
4775 | } | |
4776 | kmem_cache_destroy(pinstance->cmd_cachep); | |
4777 | pinstance->cmd_cachep = NULL; | |
4778 | } | |
4779 | ||
4780 | /** | |
4781 | * pmcraid_release_control_blocks - releases buffers alloced for control blocks | |
4782 | * @pinstance: pointer to per adapter instance structure | |
4783 | * @max_index: number of buffers (from 0 onwards) to release | |
4784 | * | |
4785 | * This function assumes that the command blocks for which control blocks are | |
4786 | * linked are not released. | |
4787 | * | |
4788 | * Return Value | |
4789 | * None | |
4790 | */ | |
4791 | static void | |
4792 | pmcraid_release_control_blocks( | |
4793 | struct pmcraid_instance *pinstance, | |
4794 | int max_index | |
4795 | ) | |
4796 | { | |
4797 | int i; | |
4798 | ||
4799 | if (pinstance->control_pool == NULL) | |
4800 | return; | |
4801 | ||
4802 | for (i = 0; i < max_index; i++) { | |
4803 | pci_pool_free(pinstance->control_pool, | |
4804 | pinstance->cmd_list[i]->ioa_cb, | |
4805 | pinstance->cmd_list[i]->ioa_cb_bus_addr); | |
4806 | pinstance->cmd_list[i]->ioa_cb = NULL; | |
4807 | pinstance->cmd_list[i]->ioa_cb_bus_addr = 0; | |
4808 | } | |
4809 | pci_pool_destroy(pinstance->control_pool); | |
4810 | pinstance->control_pool = NULL; | |
4811 | } | |
4812 | ||
4813 | /** | |
4814 | * pmcraid_allocate_cmd_blocks - allocate memory for cmd block structures | |
4815 | * @pinstance - pointer to per adapter instance structure | |
4816 | * | |
4817 | * Allocates memory for command blocks using kernel slab allocator. | |
4818 | * | |
4819 | * Return Value | |
4820 | * 0 in case of success; -ENOMEM in case of failure | |
4821 | */ | |
4822 | static int __devinit | |
4823 | pmcraid_allocate_cmd_blocks(struct pmcraid_instance *pinstance) | |
4824 | { | |
4825 | int i; | |
4826 | ||
4827 | sprintf(pinstance->cmd_pool_name, "pmcraid_cmd_pool_%d", | |
4828 | pinstance->host->unique_id); | |
4829 | ||
4830 | ||
4831 | pinstance->cmd_cachep = kmem_cache_create( | |
4832 | pinstance->cmd_pool_name, | |
4833 | sizeof(struct pmcraid_cmd), 0, | |
4834 | SLAB_HWCACHE_ALIGN, NULL); | |
4835 | if (!pinstance->cmd_cachep) | |
4836 | return -ENOMEM; | |
4837 | ||
4838 | for (i = 0; i < PMCRAID_MAX_CMD; i++) { | |
4839 | pinstance->cmd_list[i] = | |
4840 | kmem_cache_alloc(pinstance->cmd_cachep, GFP_KERNEL); | |
4841 | if (!pinstance->cmd_list[i]) { | |
4842 | pmcraid_release_cmd_blocks(pinstance, i); | |
4843 | return -ENOMEM; | |
4844 | } | |
4845 | } | |
4846 | return 0; | |
4847 | } | |
4848 | ||
4849 | /** | |
4850 | * pmcraid_allocate_control_blocks - allocates memory control blocks | |
4851 | * @pinstance : pointer to per adapter instance structure | |
4852 | * | |
4853 | * This function allocates PCI memory for DMAable buffers like IOARCB, IOADLs | |
4854 | * and IOASAs. This is called after command blocks are already allocated. | |
4855 | * | |
4856 | * Return Value | |
4857 | * 0 in case it can allocate all control blocks, otherwise -ENOMEM | |
4858 | */ | |
4859 | static int __devinit | |
4860 | pmcraid_allocate_control_blocks(struct pmcraid_instance *pinstance) | |
4861 | { | |
4862 | int i; | |
4863 | ||
4864 | sprintf(pinstance->ctl_pool_name, "pmcraid_control_pool_%d", | |
4865 | pinstance->host->unique_id); | |
4866 | ||
4867 | pinstance->control_pool = | |
4868 | pci_pool_create(pinstance->ctl_pool_name, | |
4869 | pinstance->pdev, | |
4870 | sizeof(struct pmcraid_control_block), | |
4871 | PMCRAID_IOARCB_ALIGNMENT, 0); | |
4872 | ||
4873 | if (!pinstance->control_pool) | |
4874 | return -ENOMEM; | |
4875 | ||
4876 | for (i = 0; i < PMCRAID_MAX_CMD; i++) { | |
4877 | pinstance->cmd_list[i]->ioa_cb = | |
4878 | pci_pool_alloc( | |
4879 | pinstance->control_pool, | |
4880 | GFP_KERNEL, | |
4881 | &(pinstance->cmd_list[i]->ioa_cb_bus_addr)); | |
4882 | ||
4883 | if (!pinstance->cmd_list[i]->ioa_cb) { | |
4884 | pmcraid_release_control_blocks(pinstance, i); | |
4885 | return -ENOMEM; | |
4886 | } | |
4887 | memset(pinstance->cmd_list[i]->ioa_cb, 0, | |
4888 | sizeof(struct pmcraid_control_block)); | |
4889 | } | |
4890 | return 0; | |
4891 | } | |
4892 | ||
4893 | /** | |
4894 | * pmcraid_release_host_rrqs - release memory allocated for hrrq buffer(s) | |
4895 | * @pinstance: pointer to per adapter instance structure | |
4896 | * @maxindex: size of hrrq buffer pointer array | |
4897 | * | |
4898 | * Return Value | |
4899 | * None | |
4900 | */ | |
4901 | static void | |
4902 | pmcraid_release_host_rrqs(struct pmcraid_instance *pinstance, int maxindex) | |
4903 | { | |
4904 | int i; | |
4905 | for (i = 0; i < maxindex; i++) { | |
4906 | ||
4907 | pci_free_consistent(pinstance->pdev, | |
4908 | HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD, | |
4909 | pinstance->hrrq_start[i], | |
4910 | pinstance->hrrq_start_bus_addr[i]); | |
4911 | ||
4912 | /* reset pointers and toggle bit to zeros */ | |
4913 | pinstance->hrrq_start[i] = NULL; | |
4914 | pinstance->hrrq_start_bus_addr[i] = 0; | |
4915 | pinstance->host_toggle_bit[i] = 0; | |
4916 | } | |
4917 | } | |
4918 | ||
4919 | /** | |
4920 | * pmcraid_allocate_host_rrqs - Allocate and initialize host RRQ buffers | |
4921 | * @pinstance: pointer to per adapter instance structure | |
4922 | * | |
4923 | * Return value | |
4924 | * 0 hrrq buffers are allocated, -ENOMEM otherwise. | |
4925 | */ | |
4926 | static int __devinit | |
4927 | pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance) | |
4928 | { | |
c20c4267 | 4929 | int i, buffer_size; |
89a36810 | 4930 | |
c20c4267 | 4931 | buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD; |
89a36810 | 4932 | |
c20c4267 | 4933 | for (i = 0; i < pinstance->num_hrrq; i++) { |
89a36810 AR |
4934 | pinstance->hrrq_start[i] = |
4935 | pci_alloc_consistent( | |
4936 | pinstance->pdev, | |
4937 | buffer_size, | |
4938 | &(pinstance->hrrq_start_bus_addr[i])); | |
4939 | ||
4940 | if (pinstance->hrrq_start[i] == 0) { | |
c20c4267 AR |
4941 | pmcraid_err("pci_alloc failed for hrrq vector : %d\n", |
4942 | i); | |
89a36810 AR |
4943 | pmcraid_release_host_rrqs(pinstance, i); |
4944 | return -ENOMEM; | |
4945 | } | |
4946 | ||
4947 | memset(pinstance->hrrq_start[i], 0, buffer_size); | |
4948 | pinstance->hrrq_curr[i] = pinstance->hrrq_start[i]; | |
4949 | pinstance->hrrq_end[i] = | |
c20c4267 | 4950 | pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1; |
89a36810 AR |
4951 | pinstance->host_toggle_bit[i] = 1; |
4952 | spin_lock_init(&pinstance->hrrq_lock[i]); | |
4953 | } | |
4954 | return 0; | |
4955 | } | |
4956 | ||
4957 | /** | |
4958 | * pmcraid_release_hcams - release HCAM buffers | |
4959 | * | |
4960 | * @pinstance: pointer to per adapter instance structure | |
4961 | * | |
4962 | * Return value | |
4963 | * none | |
4964 | */ | |
4965 | static void pmcraid_release_hcams(struct pmcraid_instance *pinstance) | |
4966 | { | |
4967 | if (pinstance->ccn.msg != NULL) { | |
4968 | pci_free_consistent(pinstance->pdev, | |
4969 | PMCRAID_AEN_HDR_SIZE + | |
c20c4267 | 4970 | sizeof(struct pmcraid_hcam_ccn_ext), |
89a36810 AR |
4971 | pinstance->ccn.msg, |
4972 | pinstance->ccn.baddr); | |
4973 | ||
4974 | pinstance->ccn.msg = NULL; | |
4975 | pinstance->ccn.hcam = NULL; | |
4976 | pinstance->ccn.baddr = 0; | |
4977 | } | |
4978 | ||
4979 | if (pinstance->ldn.msg != NULL) { | |
4980 | pci_free_consistent(pinstance->pdev, | |
4981 | PMCRAID_AEN_HDR_SIZE + | |
4982 | sizeof(struct pmcraid_hcam_ldn), | |
4983 | pinstance->ldn.msg, | |
4984 | pinstance->ldn.baddr); | |
4985 | ||
4986 | pinstance->ldn.msg = NULL; | |
4987 | pinstance->ldn.hcam = NULL; | |
4988 | pinstance->ldn.baddr = 0; | |
4989 | } | |
4990 | } | |
4991 | ||
4992 | /** | |
4993 | * pmcraid_allocate_hcams - allocates HCAM buffers | |
4994 | * @pinstance : pointer to per adapter instance structure | |
4995 | * | |
4996 | * Return Value: | |
4997 | * 0 in case of successful allocation, non-zero otherwise | |
4998 | */ | |
4999 | static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance) | |
5000 | { | |
5001 | pinstance->ccn.msg = pci_alloc_consistent( | |
5002 | pinstance->pdev, | |
5003 | PMCRAID_AEN_HDR_SIZE + | |
c20c4267 | 5004 | sizeof(struct pmcraid_hcam_ccn_ext), |
89a36810 AR |
5005 | &(pinstance->ccn.baddr)); |
5006 | ||
5007 | pinstance->ldn.msg = pci_alloc_consistent( | |
5008 | pinstance->pdev, | |
5009 | PMCRAID_AEN_HDR_SIZE + | |
5010 | sizeof(struct pmcraid_hcam_ldn), | |
5011 | &(pinstance->ldn.baddr)); | |
5012 | ||
5013 | if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) { | |
5014 | pmcraid_release_hcams(pinstance); | |
5015 | } else { | |
5016 | pinstance->ccn.hcam = | |
5017 | (void *)pinstance->ccn.msg + PMCRAID_AEN_HDR_SIZE; | |
5018 | pinstance->ldn.hcam = | |
5019 | (void *)pinstance->ldn.msg + PMCRAID_AEN_HDR_SIZE; | |
5020 | ||
5021 | atomic_set(&pinstance->ccn.ignore, 0); | |
5022 | atomic_set(&pinstance->ldn.ignore, 0); | |
5023 | } | |
5024 | ||
5025 | return (pinstance->ldn.msg == NULL) ? -ENOMEM : 0; | |
5026 | } | |
5027 | ||
5028 | /** | |
5029 | * pmcraid_release_config_buffers - release config.table buffers | |
5030 | * @pinstance: pointer to per adapter instance structure | |
5031 | * | |
5032 | * Return Value | |
5033 | * none | |
5034 | */ | |
5035 | static void pmcraid_release_config_buffers(struct pmcraid_instance *pinstance) | |
5036 | { | |
5037 | if (pinstance->cfg_table != NULL && | |
5038 | pinstance->cfg_table_bus_addr != 0) { | |
5039 | pci_free_consistent(pinstance->pdev, | |
5040 | sizeof(struct pmcraid_config_table), | |
5041 | pinstance->cfg_table, | |
5042 | pinstance->cfg_table_bus_addr); | |
5043 | pinstance->cfg_table = NULL; | |
5044 | pinstance->cfg_table_bus_addr = 0; | |
5045 | } | |
5046 | ||
5047 | if (pinstance->res_entries != NULL) { | |
5048 | int i; | |
5049 | ||
5050 | for (i = 0; i < PMCRAID_MAX_RESOURCES; i++) | |
5051 | list_del(&pinstance->res_entries[i].queue); | |
5052 | kfree(pinstance->res_entries); | |
5053 | pinstance->res_entries = NULL; | |
5054 | } | |
5055 | ||
5056 | pmcraid_release_hcams(pinstance); | |
5057 | } | |
5058 | ||
5059 | /** | |
5060 | * pmcraid_allocate_config_buffers - allocates DMAable memory for config table | |
5061 | * @pinstance : pointer to per adapter instance structure | |
5062 | * | |
5063 | * Return Value | |
5064 | * 0 for successful allocation, -ENOMEM for any failure | |
5065 | */ | |
5066 | static int __devinit | |
5067 | pmcraid_allocate_config_buffers(struct pmcraid_instance *pinstance) | |
5068 | { | |
5069 | int i; | |
5070 | ||
5071 | pinstance->res_entries = | |
5072 | kzalloc(sizeof(struct pmcraid_resource_entry) * | |
5073 | PMCRAID_MAX_RESOURCES, GFP_KERNEL); | |
5074 | ||
5075 | if (NULL == pinstance->res_entries) { | |
5076 | pmcraid_err("failed to allocate memory for resource table\n"); | |
5077 | return -ENOMEM; | |
5078 | } | |
5079 | ||
5080 | for (i = 0; i < PMCRAID_MAX_RESOURCES; i++) | |
5081 | list_add_tail(&pinstance->res_entries[i].queue, | |
5082 | &pinstance->free_res_q); | |
5083 | ||
5084 | pinstance->cfg_table = | |
5085 | pci_alloc_consistent(pinstance->pdev, | |
5086 | sizeof(struct pmcraid_config_table), | |
5087 | &pinstance->cfg_table_bus_addr); | |
5088 | ||
5089 | if (NULL == pinstance->cfg_table) { | |
5090 | pmcraid_err("couldn't alloc DMA memory for config table\n"); | |
5091 | pmcraid_release_config_buffers(pinstance); | |
5092 | return -ENOMEM; | |
5093 | } | |
5094 | ||
5095 | if (pmcraid_allocate_hcams(pinstance)) { | |
5096 | pmcraid_err("could not alloc DMA memory for HCAMS\n"); | |
5097 | pmcraid_release_config_buffers(pinstance); | |
5098 | return -ENOMEM; | |
5099 | } | |
5100 | ||
5101 | return 0; | |
5102 | } | |
5103 | ||
5104 | /** | |
5105 | * pmcraid_init_tasklets - registers tasklets for response handling | |
5106 | * | |
5107 | * @pinstance: pointer adapter instance structure | |
5108 | * | |
5109 | * Return value | |
5110 | * none | |
5111 | */ | |
5112 | static void pmcraid_init_tasklets(struct pmcraid_instance *pinstance) | |
5113 | { | |
5114 | int i; | |
5115 | for (i = 0; i < pinstance->num_hrrq; i++) | |
5116 | tasklet_init(&pinstance->isr_tasklet[i], | |
5117 | pmcraid_tasklet_function, | |
5118 | (unsigned long)&pinstance->hrrq_vector[i]); | |
5119 | } | |
5120 | ||
5121 | /** | |
5122 | * pmcraid_kill_tasklets - destroys tasklets registered for response handling | |
5123 | * | |
5124 | * @pinstance: pointer to adapter instance structure | |
5125 | * | |
5126 | * Return value | |
5127 | * none | |
5128 | */ | |
5129 | static void pmcraid_kill_tasklets(struct pmcraid_instance *pinstance) | |
5130 | { | |
5131 | int i; | |
5132 | for (i = 0; i < pinstance->num_hrrq; i++) | |
5133 | tasklet_kill(&pinstance->isr_tasklet[i]); | |
5134 | } | |
5135 | ||
c20c4267 AR |
5136 | /** |
5137 | * pmcraid_release_buffers - release per-adapter buffers allocated | |
5138 | * | |
5139 | * @pinstance: pointer to adapter soft state | |
5140 | * | |
5141 | * Return Value | |
5142 | * none | |
5143 | */ | |
5144 | static void pmcraid_release_buffers(struct pmcraid_instance *pinstance) | |
5145 | { | |
5146 | pmcraid_release_config_buffers(pinstance); | |
5147 | pmcraid_release_control_blocks(pinstance, PMCRAID_MAX_CMD); | |
5148 | pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD); | |
5149 | pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq); | |
5150 | ||
5151 | if (pinstance->inq_data != NULL) { | |
5152 | pci_free_consistent(pinstance->pdev, | |
5153 | sizeof(struct pmcraid_inquiry_data), | |
5154 | pinstance->inq_data, | |
5155 | pinstance->inq_data_baddr); | |
5156 | ||
5157 | pinstance->inq_data = NULL; | |
5158 | pinstance->inq_data_baddr = 0; | |
5159 | } | |
592488a3 AR |
5160 | |
5161 | if (pinstance->timestamp_data != NULL) { | |
5162 | pci_free_consistent(pinstance->pdev, | |
5163 | sizeof(struct pmcraid_timestamp_data), | |
5164 | pinstance->timestamp_data, | |
5165 | pinstance->timestamp_data_baddr); | |
5166 | ||
5167 | pinstance->timestamp_data = NULL; | |
5168 | pinstance->timestamp_data_baddr = 0; | |
5169 | } | |
c20c4267 AR |
5170 | } |
5171 | ||
89a36810 AR |
5172 | /** |
5173 | * pmcraid_init_buffers - allocates memory and initializes various structures | |
5174 | * @pinstance: pointer to per adapter instance structure | |
5175 | * | |
5176 | * This routine pre-allocates memory based on the type of block as below: | |
5177 | * cmdblocks(PMCRAID_MAX_CMD): kernel memory using kernel's slab_allocator, | |
5178 | * IOARCBs(PMCRAID_MAX_CMD) : DMAable memory, using pci pool allocator | |
5179 | * config-table entries : DMAable memory using pci_alloc_consistent | |
5180 | * HostRRQs : DMAable memory, using pci_alloc_consistent | |
5181 | * | |
5182 | * Return Value | |
5183 | * 0 in case all of the blocks are allocated, -ENOMEM otherwise. | |
5184 | */ | |
5185 | static int __devinit pmcraid_init_buffers(struct pmcraid_instance *pinstance) | |
5186 | { | |
5187 | int i; | |
5188 | ||
5189 | if (pmcraid_allocate_host_rrqs(pinstance)) { | |
5190 | pmcraid_err("couldn't allocate memory for %d host rrqs\n", | |
5191 | pinstance->num_hrrq); | |
5192 | return -ENOMEM; | |
5193 | } | |
5194 | ||
5195 | if (pmcraid_allocate_config_buffers(pinstance)) { | |
5196 | pmcraid_err("couldn't allocate memory for config buffers\n"); | |
5197 | pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq); | |
5198 | return -ENOMEM; | |
5199 | } | |
5200 | ||
5201 | if (pmcraid_allocate_cmd_blocks(pinstance)) { | |
c20c4267 | 5202 | pmcraid_err("couldn't allocate memory for cmd blocks\n"); |
89a36810 AR |
5203 | pmcraid_release_config_buffers(pinstance); |
5204 | pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq); | |
5205 | return -ENOMEM; | |
5206 | } | |
5207 | ||
5208 | if (pmcraid_allocate_control_blocks(pinstance)) { | |
c20c4267 | 5209 | pmcraid_err("couldn't allocate memory control blocks\n"); |
89a36810 AR |
5210 | pmcraid_release_config_buffers(pinstance); |
5211 | pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD); | |
5212 | pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq); | |
5213 | return -ENOMEM; | |
5214 | } | |
5215 | ||
c20c4267 AR |
5216 | /* allocate DMAable memory for page D0 INQUIRY buffer */ |
5217 | pinstance->inq_data = pci_alloc_consistent( | |
5218 | pinstance->pdev, | |
5219 | sizeof(struct pmcraid_inquiry_data), | |
5220 | &pinstance->inq_data_baddr); | |
5221 | ||
5222 | if (pinstance->inq_data == NULL) { | |
5223 | pmcraid_err("couldn't allocate DMA memory for INQUIRY\n"); | |
5224 | pmcraid_release_buffers(pinstance); | |
5225 | return -ENOMEM; | |
5226 | } | |
5227 | ||
592488a3 AR |
5228 | /* allocate DMAable memory for set timestamp data buffer */ |
5229 | pinstance->timestamp_data = pci_alloc_consistent( | |
5230 | pinstance->pdev, | |
5231 | sizeof(struct pmcraid_timestamp_data), | |
5232 | &pinstance->timestamp_data_baddr); | |
5233 | ||
5234 | if (pinstance->timestamp_data == NULL) { | |
5235 | pmcraid_err("couldn't allocate DMA memory for \ | |
5236 | set time_stamp \n"); | |
5237 | pmcraid_release_buffers(pinstance); | |
5238 | return -ENOMEM; | |
5239 | } | |
5240 | ||
5241 | ||
89a36810 AR |
5242 | /* Initialize all the command blocks and add them to free pool. No |
5243 | * need to lock (free_pool_lock) as this is done in initialization | |
5244 | * itself | |
5245 | */ | |
5246 | for (i = 0; i < PMCRAID_MAX_CMD; i++) { | |
5247 | struct pmcraid_cmd *cmdp = pinstance->cmd_list[i]; | |
5248 | pmcraid_init_cmdblk(cmdp, i); | |
5249 | cmdp->drv_inst = pinstance; | |
5250 | list_add_tail(&cmdp->free_list, &pinstance->free_cmd_pool); | |
5251 | } | |
5252 | ||
5253 | return 0; | |
5254 | } | |
5255 | ||
5256 | /** | |
5257 | * pmcraid_reinit_buffers - resets various buffer pointers | |
5258 | * @pinstance: pointer to adapter instance | |
5259 | * Return value | |
c20c4267 | 5260 | * none |
89a36810 AR |
5261 | */ |
5262 | static void pmcraid_reinit_buffers(struct pmcraid_instance *pinstance) | |
5263 | { | |
5264 | int i; | |
5265 | int buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD; | |
5266 | ||
5267 | for (i = 0; i < pinstance->num_hrrq; i++) { | |
5268 | memset(pinstance->hrrq_start[i], 0, buffer_size); | |
5269 | pinstance->hrrq_curr[i] = pinstance->hrrq_start[i]; | |
5270 | pinstance->hrrq_end[i] = | |
5271 | pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1; | |
5272 | pinstance->host_toggle_bit[i] = 1; | |
5273 | } | |
5274 | } | |
5275 | ||
5276 | /** | |
5277 | * pmcraid_init_instance - initialize per instance data structure | |
5278 | * @pdev: pointer to pci device structure | |
5279 | * @host: pointer to Scsi_Host structure | |
5280 | * @mapped_pci_addr: memory mapped IOA configuration registers | |
5281 | * | |
5282 | * Return Value | |
5283 | * 0 on success, non-zero in case of any failure | |
5284 | */ | |
5285 | static int __devinit pmcraid_init_instance( | |
5286 | struct pci_dev *pdev, | |
5287 | struct Scsi_Host *host, | |
5288 | void __iomem *mapped_pci_addr | |
5289 | ) | |
5290 | { | |
5291 | struct pmcraid_instance *pinstance = | |
5292 | (struct pmcraid_instance *)host->hostdata; | |
5293 | ||
5294 | pinstance->host = host; | |
5295 | pinstance->pdev = pdev; | |
5296 | ||
5297 | /* Initialize register addresses */ | |
5298 | pinstance->mapped_dma_addr = mapped_pci_addr; | |
5299 | ||
5300 | /* Initialize chip-specific details */ | |
5301 | { | |
5302 | struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg; | |
5303 | struct pmcraid_interrupts *pint_regs = &pinstance->int_regs; | |
5304 | ||
5305 | pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin; | |
5306 | ||
5307 | pint_regs->ioa_host_interrupt_reg = | |
5308 | mapped_pci_addr + chip_cfg->ioa_host_intr; | |
5309 | pint_regs->ioa_host_interrupt_clr_reg = | |
5310 | mapped_pci_addr + chip_cfg->ioa_host_intr_clr; | |
c20c4267 AR |
5311 | pint_regs->ioa_host_msix_interrupt_reg = |
5312 | mapped_pci_addr + chip_cfg->ioa_host_msix_intr; | |
89a36810 AR |
5313 | pint_regs->host_ioa_interrupt_reg = |
5314 | mapped_pci_addr + chip_cfg->host_ioa_intr; | |
5315 | pint_regs->host_ioa_interrupt_clr_reg = | |
5316 | mapped_pci_addr + chip_cfg->host_ioa_intr_clr; | |
5317 | ||
5318 | /* Current version of firmware exposes interrupt mask set | |
5319 | * and mask clr registers through memory mapped bar0. | |
5320 | */ | |
5321 | pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox; | |
5322 | pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus; | |
5323 | pint_regs->ioa_host_interrupt_mask_reg = | |
5324 | mapped_pci_addr + chip_cfg->ioa_host_mask; | |
5325 | pint_regs->ioa_host_interrupt_mask_clr_reg = | |
5326 | mapped_pci_addr + chip_cfg->ioa_host_mask_clr; | |
5327 | pint_regs->global_interrupt_mask_reg = | |
5328 | mapped_pci_addr + chip_cfg->global_intr_mask; | |
5329 | }; | |
5330 | ||
5331 | pinstance->ioa_reset_attempts = 0; | |
5332 | init_waitqueue_head(&pinstance->reset_wait_q); | |
5333 | ||
5334 | atomic_set(&pinstance->outstanding_cmds, 0); | |
c20c4267 | 5335 | atomic_set(&pinstance->last_message_id, 0); |
89a36810 AR |
5336 | atomic_set(&pinstance->expose_resources, 0); |
5337 | ||
5338 | INIT_LIST_HEAD(&pinstance->free_res_q); | |
5339 | INIT_LIST_HEAD(&pinstance->used_res_q); | |
5340 | INIT_LIST_HEAD(&pinstance->free_cmd_pool); | |
5341 | INIT_LIST_HEAD(&pinstance->pending_cmd_pool); | |
5342 | ||
5343 | spin_lock_init(&pinstance->free_pool_lock); | |
5344 | spin_lock_init(&pinstance->pending_pool_lock); | |
5345 | spin_lock_init(&pinstance->resource_lock); | |
5346 | mutex_init(&pinstance->aen_queue_lock); | |
5347 | ||
5348 | /* Work-queue (Shared) for deferred processing error handling */ | |
5349 | INIT_WORK(&pinstance->worker_q, pmcraid_worker_function); | |
5350 | ||
5351 | /* Initialize the default log_level */ | |
5352 | pinstance->current_log_level = pmcraid_log_level; | |
5353 | ||
5354 | /* Setup variables required for reset engine */ | |
5355 | pinstance->ioa_state = IOA_STATE_UNKNOWN; | |
5356 | pinstance->reset_cmd = NULL; | |
5357 | return 0; | |
5358 | } | |
5359 | ||
89a36810 AR |
5360 | /** |
5361 | * pmcraid_shutdown - shutdown adapter controller. | |
5362 | * @pdev: pci device struct | |
5363 | * | |
5364 | * Issues an adapter shutdown to the card waits for its completion | |
5365 | * | |
5366 | * Return value | |
5367 | * none | |
5368 | */ | |
5369 | static void pmcraid_shutdown(struct pci_dev *pdev) | |
5370 | { | |
5371 | struct pmcraid_instance *pinstance = pci_get_drvdata(pdev); | |
5372 | pmcraid_reset_bringdown(pinstance); | |
5373 | } | |
5374 | ||
5375 | ||
5376 | /** | |
5377 | * pmcraid_get_minor - returns unused minor number from minor number bitmap | |
5378 | */ | |
5379 | static unsigned short pmcraid_get_minor(void) | |
5380 | { | |
5381 | int minor; | |
5382 | ||
5383 | minor = find_first_zero_bit(pmcraid_minor, sizeof(pmcraid_minor)); | |
5384 | __set_bit(minor, pmcraid_minor); | |
5385 | return minor; | |
5386 | } | |
5387 | ||
5388 | /** | |
5389 | * pmcraid_release_minor - releases given minor back to minor number bitmap | |
5390 | */ | |
5391 | static void pmcraid_release_minor(unsigned short minor) | |
5392 | { | |
5393 | __clear_bit(minor, pmcraid_minor); | |
5394 | } | |
5395 | ||
5396 | /** | |
5397 | * pmcraid_setup_chrdev - allocates a minor number and registers a char device | |
5398 | * | |
5399 | * @pinstance: pointer to adapter instance for which to register device | |
5400 | * | |
5401 | * Return value | |
5402 | * 0 in case of success, otherwise non-zero | |
5403 | */ | |
5404 | static int pmcraid_setup_chrdev(struct pmcraid_instance *pinstance) | |
5405 | { | |
5406 | int minor; | |
5407 | int error; | |
5408 | ||
5409 | minor = pmcraid_get_minor(); | |
5410 | cdev_init(&pinstance->cdev, &pmcraid_fops); | |
5411 | pinstance->cdev.owner = THIS_MODULE; | |
5412 | ||
5413 | error = cdev_add(&pinstance->cdev, MKDEV(pmcraid_major, minor), 1); | |
5414 | ||
5415 | if (error) | |
5416 | pmcraid_release_minor(minor); | |
5417 | else | |
5418 | device_create(pmcraid_class, NULL, MKDEV(pmcraid_major, minor), | |
c20c4267 | 5419 | NULL, "%s%u", PMCRAID_DEVFILE, minor); |
89a36810 AR |
5420 | return error; |
5421 | } | |
5422 | ||
5423 | /** | |
5424 | * pmcraid_release_chrdev - unregisters per-adapter management interface | |
5425 | * | |
5426 | * @pinstance: pointer to adapter instance structure | |
5427 | * | |
5428 | * Return value | |
5429 | * none | |
5430 | */ | |
5431 | static void pmcraid_release_chrdev(struct pmcraid_instance *pinstance) | |
5432 | { | |
5433 | pmcraid_release_minor(MINOR(pinstance->cdev.dev)); | |
5434 | device_destroy(pmcraid_class, | |
5435 | MKDEV(pmcraid_major, MINOR(pinstance->cdev.dev))); | |
5436 | cdev_del(&pinstance->cdev); | |
5437 | } | |
5438 | ||
5439 | /** | |
5440 | * pmcraid_remove - IOA hot plug remove entry point | |
5441 | * @pdev: pci device struct | |
5442 | * | |
5443 | * Return value | |
5444 | * none | |
5445 | */ | |
5446 | static void __devexit pmcraid_remove(struct pci_dev *pdev) | |
5447 | { | |
5448 | struct pmcraid_instance *pinstance = pci_get_drvdata(pdev); | |
5449 | ||
5450 | /* remove the management interface (/dev file) for this device */ | |
5451 | pmcraid_release_chrdev(pinstance); | |
5452 | ||
5453 | /* remove host template from scsi midlayer */ | |
5454 | scsi_remove_host(pinstance->host); | |
5455 | ||
5456 | /* block requests from mid-layer */ | |
5457 | scsi_block_requests(pinstance->host); | |
5458 | ||
5459 | /* initiate shutdown adapter */ | |
5460 | pmcraid_shutdown(pdev); | |
5461 | ||
5462 | pmcraid_disable_interrupts(pinstance, ~0); | |
a684b8da | 5463 | flush_work_sync(&pinstance->worker_q); |
89a36810 AR |
5464 | |
5465 | pmcraid_kill_tasklets(pinstance); | |
5466 | pmcraid_unregister_interrupt_handler(pinstance); | |
5467 | pmcraid_release_buffers(pinstance); | |
5468 | iounmap(pinstance->mapped_dma_addr); | |
5469 | pci_release_regions(pdev); | |
5470 | scsi_host_put(pinstance->host); | |
5471 | pci_disable_device(pdev); | |
5472 | ||
5473 | return; | |
5474 | } | |
5475 | ||
5476 | #ifdef CONFIG_PM | |
5477 | /** | |
5478 | * pmcraid_suspend - driver suspend entry point for power management | |
5479 | * @pdev: PCI device structure | |
5480 | * @state: PCI power state to suspend routine | |
5481 | * | |
5482 | * Return Value - 0 always | |
5483 | */ | |
5484 | static int pmcraid_suspend(struct pci_dev *pdev, pm_message_t state) | |
5485 | { | |
5486 | struct pmcraid_instance *pinstance = pci_get_drvdata(pdev); | |
5487 | ||
5488 | pmcraid_shutdown(pdev); | |
5489 | pmcraid_disable_interrupts(pinstance, ~0); | |
5490 | pmcraid_kill_tasklets(pinstance); | |
5491 | pci_set_drvdata(pinstance->pdev, pinstance); | |
5492 | pmcraid_unregister_interrupt_handler(pinstance); | |
5493 | pci_save_state(pdev); | |
5494 | pci_disable_device(pdev); | |
5495 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | |
5496 | ||
5497 | return 0; | |
5498 | } | |
5499 | ||
5500 | /** | |
5501 | * pmcraid_resume - driver resume entry point PCI power management | |
5502 | * @pdev: PCI device structure | |
5503 | * | |
5504 | * Return Value - 0 in case of success. Error code in case of any failure | |
5505 | */ | |
5506 | static int pmcraid_resume(struct pci_dev *pdev) | |
5507 | { | |
5508 | struct pmcraid_instance *pinstance = pci_get_drvdata(pdev); | |
5509 | struct Scsi_Host *host = pinstance->host; | |
5510 | int rc; | |
89a36810 AR |
5511 | |
5512 | pci_set_power_state(pdev, PCI_D0); | |
5513 | pci_enable_wake(pdev, PCI_D0, 0); | |
5514 | pci_restore_state(pdev); | |
5515 | ||
5516 | rc = pci_enable_device(pdev); | |
5517 | ||
5518 | if (rc) { | |
34876402 | 5519 | dev_err(&pdev->dev, "resume: Enable device failed\n"); |
89a36810 AR |
5520 | return rc; |
5521 | } | |
5522 | ||
5523 | pci_set_master(pdev); | |
5524 | ||
5525 | if ((sizeof(dma_addr_t) == 4) || | |
5526 | pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) | |
5527 | rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); | |
5528 | ||
5529 | if (rc == 0) | |
5530 | rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); | |
5531 | ||
5532 | if (rc != 0) { | |
34876402 | 5533 | dev_err(&pdev->dev, "resume: Failed to set PCI DMA mask\n"); |
89a36810 AR |
5534 | goto disable_device; |
5535 | } | |
5536 | ||
c20c4267 | 5537 | pmcraid_disable_interrupts(pinstance, ~0); |
89a36810 | 5538 | atomic_set(&pinstance->outstanding_cmds, 0); |
89a36810 AR |
5539 | rc = pmcraid_register_interrupt_handler(pinstance); |
5540 | ||
5541 | if (rc) { | |
34876402 AR |
5542 | dev_err(&pdev->dev, |
5543 | "resume: couldn't register interrupt handlers\n"); | |
89a36810 AR |
5544 | rc = -ENODEV; |
5545 | goto release_host; | |
5546 | } | |
5547 | ||
5548 | pmcraid_init_tasklets(pinstance); | |
5549 | pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS); | |
5550 | ||
5551 | /* Start with hard reset sequence which brings up IOA to operational | |
5552 | * state as well as completes the reset sequence. | |
5553 | */ | |
5554 | pinstance->ioa_hard_reset = 1; | |
5555 | ||
5556 | /* Start IOA firmware initialization and bring card to Operational | |
5557 | * state. | |
5558 | */ | |
5559 | if (pmcraid_reset_bringup(pinstance)) { | |
c20c4267 | 5560 | dev_err(&pdev->dev, "couldn't initialize IOA\n"); |
89a36810 AR |
5561 | rc = -ENODEV; |
5562 | goto release_tasklets; | |
5563 | } | |
5564 | ||
5565 | return 0; | |
5566 | ||
5567 | release_tasklets: | |
c20c4267 | 5568 | pmcraid_disable_interrupts(pinstance, ~0); |
89a36810 AR |
5569 | pmcraid_kill_tasklets(pinstance); |
5570 | pmcraid_unregister_interrupt_handler(pinstance); | |
5571 | ||
5572 | release_host: | |
5573 | scsi_host_put(host); | |
5574 | ||
5575 | disable_device: | |
5576 | pci_disable_device(pdev); | |
5577 | ||
5578 | return rc; | |
5579 | } | |
5580 | ||
5581 | #else | |
5582 | ||
5583 | #define pmcraid_suspend NULL | |
5584 | #define pmcraid_resume NULL | |
5585 | ||
5586 | #endif /* CONFIG_PM */ | |
5587 | ||
5588 | /** | |
5589 | * pmcraid_complete_ioa_reset - Called by either timer or tasklet during | |
c20c4267 | 5590 | * completion of the ioa reset |
89a36810 AR |
5591 | * @cmd: pointer to reset command block |
5592 | */ | |
5593 | static void pmcraid_complete_ioa_reset(struct pmcraid_cmd *cmd) | |
5594 | { | |
5595 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
5596 | unsigned long flags; | |
5597 | ||
5598 | spin_lock_irqsave(pinstance->host->host_lock, flags); | |
5599 | pmcraid_ioa_reset(cmd); | |
5600 | spin_unlock_irqrestore(pinstance->host->host_lock, flags); | |
5601 | scsi_unblock_requests(pinstance->host); | |
5602 | schedule_work(&pinstance->worker_q); | |
5603 | } | |
5604 | ||
5605 | /** | |
5606 | * pmcraid_set_supported_devs - sends SET SUPPORTED DEVICES to IOAFP | |
5607 | * | |
5608 | * @cmd: pointer to pmcraid_cmd structure | |
5609 | * | |
5610 | * Return Value | |
5611 | * 0 for success or non-zero for failure cases | |
5612 | */ | |
5613 | static void pmcraid_set_supported_devs(struct pmcraid_cmd *cmd) | |
5614 | { | |
5615 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
5616 | void (*cmd_done) (struct pmcraid_cmd *) = pmcraid_complete_ioa_reset; | |
5617 | ||
5618 | pmcraid_reinit_cmdblk(cmd); | |
5619 | ||
5620 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
5621 | ioarcb->request_type = REQ_TYPE_IOACMD; | |
5622 | ioarcb->cdb[0] = PMCRAID_SET_SUPPORTED_DEVICES; | |
5623 | ioarcb->cdb[1] = ALL_DEVICES_SUPPORTED; | |
5624 | ||
5625 | /* If this was called as part of resource table reinitialization due to | |
5626 | * lost CCN, it is enough to return the command block back to free pool | |
5627 | * as part of set_supported_devs completion function. | |
5628 | */ | |
5629 | if (cmd->drv_inst->reinit_cfg_table) { | |
5630 | cmd->drv_inst->reinit_cfg_table = 0; | |
5631 | cmd->release = 1; | |
5632 | cmd_done = pmcraid_reinit_cfgtable_done; | |
5633 | } | |
5634 | ||
5635 | /* we will be done with the reset sequence after set supported devices, | |
5636 | * setup the done function to return the command block back to free | |
5637 | * pool | |
5638 | */ | |
5639 | pmcraid_send_cmd(cmd, | |
5640 | cmd_done, | |
5641 | PMCRAID_SET_SUP_DEV_TIMEOUT, | |
5642 | pmcraid_timeout_handler); | |
5643 | return; | |
5644 | } | |
5645 | ||
592488a3 AR |
5646 | /** |
5647 | * pmcraid_set_timestamp - set the timestamp to IOAFP | |
5648 | * | |
5649 | * @cmd: pointer to pmcraid_cmd structure | |
5650 | * | |
5651 | * Return Value | |
5652 | * 0 for success or non-zero for failure cases | |
5653 | */ | |
5654 | static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd) | |
5655 | { | |
5656 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
5657 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
5658 | __be32 time_stamp_len = cpu_to_be32(PMCRAID_TIMESTAMP_LEN); | |
5659 | struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl; | |
5660 | ||
5661 | struct timeval tv; | |
5662 | __le64 timestamp; | |
5663 | ||
5664 | do_gettimeofday(&tv); | |
5665 | timestamp = tv.tv_sec * 1000; | |
5666 | ||
5667 | pinstance->timestamp_data->timestamp[0] = (__u8)(timestamp); | |
5668 | pinstance->timestamp_data->timestamp[1] = (__u8)((timestamp) >> 8); | |
5669 | pinstance->timestamp_data->timestamp[2] = (__u8)((timestamp) >> 16); | |
5670 | pinstance->timestamp_data->timestamp[3] = (__u8)((timestamp) >> 24); | |
5671 | pinstance->timestamp_data->timestamp[4] = (__u8)((timestamp) >> 32); | |
5672 | pinstance->timestamp_data->timestamp[5] = (__u8)((timestamp) >> 40); | |
5673 | ||
5674 | pmcraid_reinit_cmdblk(cmd); | |
5675 | ioarcb->request_type = REQ_TYPE_SCSI; | |
5676 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
5677 | ioarcb->cdb[0] = PMCRAID_SCSI_SET_TIMESTAMP; | |
5678 | ioarcb->cdb[1] = PMCRAID_SCSI_SERVICE_ACTION; | |
5679 | memcpy(&(ioarcb->cdb[6]), &time_stamp_len, sizeof(time_stamp_len)); | |
5680 | ||
5681 | ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
5682 | offsetof(struct pmcraid_ioarcb, | |
5683 | add_data.u.ioadl[0])); | |
5684 | ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); | |
5685 | ioarcb->ioarcb_bus_addr &= ~(0x1FULL); | |
5686 | ||
5687 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
5688 | ioarcb->request_flags0 |= TRANSFER_DIR_WRITE; | |
5689 | ioarcb->data_transfer_length = | |
5690 | cpu_to_le32(sizeof(struct pmcraid_timestamp_data)); | |
5691 | ioadl = &(ioarcb->add_data.u.ioadl[0]); | |
5692 | ioadl->flags = IOADL_FLAGS_LAST_DESC; | |
5693 | ioadl->address = cpu_to_le64(pinstance->timestamp_data_baddr); | |
5694 | ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_timestamp_data)); | |
5695 | ||
5696 | if (!pinstance->timestamp_error) { | |
5697 | pinstance->timestamp_error = 0; | |
5698 | pmcraid_send_cmd(cmd, pmcraid_set_supported_devs, | |
5699 | PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler); | |
5700 | } else { | |
5701 | pmcraid_send_cmd(cmd, pmcraid_return_cmd, | |
5702 | PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler); | |
5703 | return; | |
5704 | } | |
5705 | } | |
5706 | ||
5707 | ||
89a36810 AR |
5708 | /** |
5709 | * pmcraid_init_res_table - Initialize the resource table | |
5710 | * @cmd: pointer to pmcraid command struct | |
5711 | * | |
5712 | * This function looks through the existing resource table, comparing | |
5713 | * it with the config table. This function will take care of old/new | |
5714 | * devices and schedule adding/removing them from the mid-layer | |
5715 | * as appropriate. | |
5716 | * | |
5717 | * Return value | |
5718 | * None | |
5719 | */ | |
5720 | static void pmcraid_init_res_table(struct pmcraid_cmd *cmd) | |
5721 | { | |
5722 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
5723 | struct pmcraid_resource_entry *res, *temp; | |
5724 | struct pmcraid_config_table_entry *cfgte; | |
5725 | unsigned long lock_flags; | |
5726 | int found, rc, i; | |
c20c4267 | 5727 | u16 fw_version; |
89a36810 AR |
5728 | LIST_HEAD(old_res); |
5729 | ||
5730 | if (pinstance->cfg_table->flags & MICROCODE_UPDATE_REQUIRED) | |
34876402 | 5731 | pmcraid_err("IOA requires microcode download\n"); |
89a36810 | 5732 | |
c20c4267 AR |
5733 | fw_version = be16_to_cpu(pinstance->inq_data->fw_version); |
5734 | ||
89a36810 AR |
5735 | /* resource list is protected by pinstance->resource_lock. |
5736 | * init_res_table can be called from probe (user-thread) or runtime | |
5737 | * reset (timer/tasklet) | |
5738 | */ | |
5739 | spin_lock_irqsave(&pinstance->resource_lock, lock_flags); | |
5740 | ||
5741 | list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) | |
5742 | list_move_tail(&res->queue, &old_res); | |
5743 | ||
5744 | for (i = 0; i < pinstance->cfg_table->num_entries; i++) { | |
c20c4267 AR |
5745 | if (be16_to_cpu(pinstance->inq_data->fw_version) <= |
5746 | PMCRAID_FW_VERSION_1) | |
5747 | cfgte = &pinstance->cfg_table->entries[i]; | |
5748 | else | |
5749 | cfgte = (struct pmcraid_config_table_entry *) | |
5750 | &pinstance->cfg_table->entries_ext[i]; | |
89a36810 | 5751 | |
c20c4267 | 5752 | if (!pmcraid_expose_resource(fw_version, cfgte)) |
89a36810 AR |
5753 | continue; |
5754 | ||
5755 | found = 0; | |
5756 | ||
5757 | /* If this entry was already detected and initialized */ | |
5758 | list_for_each_entry_safe(res, temp, &old_res, queue) { | |
5759 | ||
5760 | rc = memcmp(&res->cfg_entry.resource_address, | |
5761 | &cfgte->resource_address, | |
5762 | sizeof(cfgte->resource_address)); | |
5763 | if (!rc) { | |
5764 | list_move_tail(&res->queue, | |
5765 | &pinstance->used_res_q); | |
5766 | found = 1; | |
5767 | break; | |
5768 | } | |
5769 | } | |
5770 | ||
5771 | /* If this is new entry, initialize it and add it the queue */ | |
5772 | if (!found) { | |
5773 | ||
5774 | if (list_empty(&pinstance->free_res_q)) { | |
34876402 | 5775 | pmcraid_err("Too many devices attached\n"); |
89a36810 AR |
5776 | break; |
5777 | } | |
5778 | ||
5779 | found = 1; | |
5780 | res = list_entry(pinstance->free_res_q.next, | |
5781 | struct pmcraid_resource_entry, queue); | |
5782 | ||
5783 | res->scsi_dev = NULL; | |
5784 | res->change_detected = RES_CHANGE_ADD; | |
5785 | res->reset_progress = 0; | |
5786 | list_move_tail(&res->queue, &pinstance->used_res_q); | |
5787 | } | |
5788 | ||
5789 | /* copy new configuration table entry details into driver | |
5790 | * maintained resource entry | |
5791 | */ | |
5792 | if (found) { | |
5793 | memcpy(&res->cfg_entry, cfgte, | |
c20c4267 | 5794 | pinstance->config_table_entry_size); |
89a36810 AR |
5795 | pmcraid_info("New res type:%x, vset:%x, addr:%x:\n", |
5796 | res->cfg_entry.resource_type, | |
c20c4267 AR |
5797 | (fw_version <= PMCRAID_FW_VERSION_1 ? |
5798 | res->cfg_entry.unique_flags1 : | |
5799 | res->cfg_entry.array_id & 0xFF), | |
89a36810 AR |
5800 | le32_to_cpu(res->cfg_entry.resource_address)); |
5801 | } | |
5802 | } | |
5803 | ||
5804 | /* Detect any deleted entries, mark them for deletion from mid-layer */ | |
5805 | list_for_each_entry_safe(res, temp, &old_res, queue) { | |
5806 | ||
5807 | if (res->scsi_dev) { | |
5808 | res->change_detected = RES_CHANGE_DEL; | |
5809 | res->cfg_entry.resource_handle = | |
5810 | PMCRAID_INVALID_RES_HANDLE; | |
5811 | list_move_tail(&res->queue, &pinstance->used_res_q); | |
5812 | } else { | |
5813 | list_move_tail(&res->queue, &pinstance->free_res_q); | |
5814 | } | |
5815 | } | |
5816 | ||
5817 | /* release the resource list lock */ | |
5818 | spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags); | |
592488a3 | 5819 | pmcraid_set_timestamp(cmd); |
89a36810 AR |
5820 | } |
5821 | ||
5822 | /** | |
5823 | * pmcraid_querycfg - Send a Query IOA Config to the adapter. | |
5824 | * @cmd: pointer pmcraid_cmd struct | |
5825 | * | |
5826 | * This function sends a Query IOA Configuration command to the adapter to | |
5827 | * retrieve the IOA configuration table. | |
5828 | * | |
5829 | * Return value: | |
5830 | * none | |
5831 | */ | |
5832 | static void pmcraid_querycfg(struct pmcraid_cmd *cmd) | |
5833 | { | |
5834 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
5835 | struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl; | |
5836 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
5837 | int cfg_table_size = cpu_to_be32(sizeof(struct pmcraid_config_table)); | |
5838 | ||
c20c4267 AR |
5839 | if (be16_to_cpu(pinstance->inq_data->fw_version) <= |
5840 | PMCRAID_FW_VERSION_1) | |
5841 | pinstance->config_table_entry_size = | |
5842 | sizeof(struct pmcraid_config_table_entry); | |
5843 | else | |
5844 | pinstance->config_table_entry_size = | |
5845 | sizeof(struct pmcraid_config_table_entry_ext); | |
5846 | ||
89a36810 AR |
5847 | ioarcb->request_type = REQ_TYPE_IOACMD; |
5848 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
5849 | ||
5850 | ioarcb->cdb[0] = PMCRAID_QUERY_IOA_CONFIG; | |
5851 | ||
5852 | /* firmware requires 4-byte length field, specified in B.E format */ | |
5853 | memcpy(&(ioarcb->cdb[10]), &cfg_table_size, sizeof(cfg_table_size)); | |
5854 | ||
5855 | /* Since entire config table can be described by single IOADL, it can | |
5856 | * be part of IOARCB itself | |
5857 | */ | |
5858 | ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
5859 | offsetof(struct pmcraid_ioarcb, | |
5860 | add_data.u.ioadl[0])); | |
5861 | ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); | |
5862 | ioarcb->ioarcb_bus_addr &= ~(0x1FULL); | |
5863 | ||
5864 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
5865 | ioarcb->data_transfer_length = | |
5866 | cpu_to_le32(sizeof(struct pmcraid_config_table)); | |
5867 | ||
5868 | ioadl = &(ioarcb->add_data.u.ioadl[0]); | |
88197966 | 5869 | ioadl->flags = IOADL_FLAGS_LAST_DESC; |
89a36810 AR |
5870 | ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr); |
5871 | ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table)); | |
5872 | ||
5873 | pmcraid_send_cmd(cmd, pmcraid_init_res_table, | |
5874 | PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler); | |
5875 | } | |
5876 | ||
5877 | ||
5878 | /** | |
c20c4267 | 5879 | * pmcraid_probe - PCI probe entry pointer for PMC MaxRAID controller driver |
89a36810 AR |
5880 | * @pdev: pointer to pci device structure |
5881 | * @dev_id: pointer to device ids structure | |
5882 | * | |
5883 | * Return Value | |
5884 | * returns 0 if the device is claimed and successfully configured. | |
5885 | * returns non-zero error code in case of any failure | |
5886 | */ | |
5887 | static int __devinit pmcraid_probe( | |
5888 | struct pci_dev *pdev, | |
5889 | const struct pci_device_id *dev_id | |
5890 | ) | |
5891 | { | |
5892 | struct pmcraid_instance *pinstance; | |
5893 | struct Scsi_Host *host; | |
5894 | void __iomem *mapped_pci_addr; | |
5895 | int rc = PCIBIOS_SUCCESSFUL; | |
5896 | ||
5897 | if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) { | |
5898 | pmcraid_err | |
5899 | ("maximum number(%d) of supported adapters reached\n", | |
5900 | atomic_read(&pmcraid_adapter_count)); | |
5901 | return -ENOMEM; | |
5902 | } | |
5903 | ||
5904 | atomic_inc(&pmcraid_adapter_count); | |
5905 | rc = pci_enable_device(pdev); | |
5906 | ||
5907 | if (rc) { | |
5908 | dev_err(&pdev->dev, "Cannot enable adapter\n"); | |
5909 | atomic_dec(&pmcraid_adapter_count); | |
5910 | return rc; | |
5911 | } | |
5912 | ||
5913 | dev_info(&pdev->dev, | |
5914 | "Found new IOA(%x:%x), Total IOA count: %d\n", | |
5915 | pdev->vendor, pdev->device, | |
5916 | atomic_read(&pmcraid_adapter_count)); | |
5917 | ||
5918 | rc = pci_request_regions(pdev, PMCRAID_DRIVER_NAME); | |
5919 | ||
5920 | if (rc < 0) { | |
5921 | dev_err(&pdev->dev, | |
5922 | "Couldn't register memory range of registers\n"); | |
5923 | goto out_disable_device; | |
5924 | } | |
5925 | ||
5926 | mapped_pci_addr = pci_iomap(pdev, 0, 0); | |
5927 | ||
5928 | if (!mapped_pci_addr) { | |
5929 | dev_err(&pdev->dev, "Couldn't map PCI registers memory\n"); | |
5930 | rc = -ENOMEM; | |
5931 | goto out_release_regions; | |
5932 | } | |
5933 | ||
5934 | pci_set_master(pdev); | |
5935 | ||
5936 | /* Firmware requires the system bus address of IOARCB to be within | |
5937 | * 32-bit addressable range though it has 64-bit IOARRIN register. | |
5938 | * However, firmware supports 64-bit streaming DMA buffers, whereas | |
5939 | * coherent buffers are to be 32-bit. Since pci_alloc_consistent always | |
5940 | * returns memory within 4GB (if not, change this logic), coherent | |
25985edc | 5941 | * buffers are within firmware acceptable address ranges. |
89a36810 AR |
5942 | */ |
5943 | if ((sizeof(dma_addr_t) == 4) || | |
5944 | pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) | |
5945 | rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); | |
5946 | ||
5947 | /* firmware expects 32-bit DMA addresses for IOARRIN register; set 32 | |
5948 | * bit mask for pci_alloc_consistent to return addresses within 4GB | |
5949 | */ | |
5950 | if (rc == 0) | |
5951 | rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); | |
5952 | ||
5953 | if (rc != 0) { | |
5954 | dev_err(&pdev->dev, "Failed to set PCI DMA mask\n"); | |
5955 | goto cleanup_nomem; | |
5956 | } | |
5957 | ||
5958 | host = scsi_host_alloc(&pmcraid_host_template, | |
5959 | sizeof(struct pmcraid_instance)); | |
5960 | ||
5961 | if (!host) { | |
5962 | dev_err(&pdev->dev, "scsi_host_alloc failed!\n"); | |
5963 | rc = -ENOMEM; | |
5964 | goto cleanup_nomem; | |
5965 | } | |
5966 | ||
5967 | host->max_id = PMCRAID_MAX_NUM_TARGETS_PER_BUS; | |
5968 | host->max_lun = PMCRAID_MAX_NUM_LUNS_PER_TARGET; | |
5969 | host->unique_id = host->host_no; | |
5970 | host->max_channel = PMCRAID_MAX_BUS_TO_SCAN; | |
5971 | host->max_cmd_len = PMCRAID_MAX_CDB_LEN; | |
5972 | ||
5973 | /* zero out entire instance structure */ | |
5974 | pinstance = (struct pmcraid_instance *)host->hostdata; | |
5975 | memset(pinstance, 0, sizeof(*pinstance)); | |
5976 | ||
5977 | pinstance->chip_cfg = | |
5978 | (struct pmcraid_chip_details *)(dev_id->driver_data); | |
5979 | ||
5980 | rc = pmcraid_init_instance(pdev, host, mapped_pci_addr); | |
5981 | ||
5982 | if (rc < 0) { | |
5983 | dev_err(&pdev->dev, "failed to initialize adapter instance\n"); | |
5984 | goto out_scsi_host_put; | |
5985 | } | |
5986 | ||
5987 | pci_set_drvdata(pdev, pinstance); | |
5988 | ||
5989 | /* Save PCI config-space for use following the reset */ | |
5990 | rc = pci_save_state(pinstance->pdev); | |
5991 | ||
5992 | if (rc != 0) { | |
5993 | dev_err(&pdev->dev, "Failed to save PCI config space\n"); | |
5994 | goto out_scsi_host_put; | |
5995 | } | |
5996 | ||
5997 | pmcraid_disable_interrupts(pinstance, ~0); | |
5998 | ||
5999 | rc = pmcraid_register_interrupt_handler(pinstance); | |
6000 | ||
6001 | if (rc) { | |
34876402 | 6002 | dev_err(&pdev->dev, "couldn't register interrupt handler\n"); |
89a36810 AR |
6003 | goto out_scsi_host_put; |
6004 | } | |
6005 | ||
6006 | pmcraid_init_tasklets(pinstance); | |
6007 | ||
6008 | /* allocate verious buffers used by LLD.*/ | |
6009 | rc = pmcraid_init_buffers(pinstance); | |
6010 | ||
6011 | if (rc) { | |
6012 | pmcraid_err("couldn't allocate memory blocks\n"); | |
6013 | goto out_unregister_isr; | |
6014 | } | |
6015 | ||
6016 | /* check the reset type required */ | |
6017 | pmcraid_reset_type(pinstance); | |
6018 | ||
6019 | pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS); | |
6020 | ||
6021 | /* Start IOA firmware initialization and bring card to Operational | |
6022 | * state. | |
6023 | */ | |
6024 | pmcraid_info("starting IOA initialization sequence\n"); | |
6025 | if (pmcraid_reset_bringup(pinstance)) { | |
c20c4267 | 6026 | dev_err(&pdev->dev, "couldn't initialize IOA\n"); |
89a36810 AR |
6027 | rc = 1; |
6028 | goto out_release_bufs; | |
6029 | } | |
6030 | ||
6031 | /* Add adapter instance into mid-layer list */ | |
6032 | rc = scsi_add_host(pinstance->host, &pdev->dev); | |
6033 | if (rc != 0) { | |
6034 | pmcraid_err("couldn't add host into mid-layer: %d\n", rc); | |
6035 | goto out_release_bufs; | |
6036 | } | |
6037 | ||
6038 | scsi_scan_host(pinstance->host); | |
6039 | ||
6040 | rc = pmcraid_setup_chrdev(pinstance); | |
6041 | ||
6042 | if (rc != 0) { | |
6043 | pmcraid_err("couldn't create mgmt interface, error: %x\n", | |
6044 | rc); | |
6045 | goto out_remove_host; | |
6046 | } | |
6047 | ||
6048 | /* Schedule worker thread to handle CCN and take care of adding and | |
6049 | * removing devices to OS | |
6050 | */ | |
6051 | atomic_set(&pinstance->expose_resources, 1); | |
6052 | schedule_work(&pinstance->worker_q); | |
6053 | return rc; | |
6054 | ||
6055 | out_remove_host: | |
6056 | scsi_remove_host(host); | |
6057 | ||
6058 | out_release_bufs: | |
6059 | pmcraid_release_buffers(pinstance); | |
6060 | ||
6061 | out_unregister_isr: | |
6062 | pmcraid_kill_tasklets(pinstance); | |
6063 | pmcraid_unregister_interrupt_handler(pinstance); | |
6064 | ||
6065 | out_scsi_host_put: | |
6066 | scsi_host_put(host); | |
6067 | ||
6068 | cleanup_nomem: | |
6069 | iounmap(mapped_pci_addr); | |
6070 | ||
6071 | out_release_regions: | |
6072 | pci_release_regions(pdev); | |
6073 | ||
6074 | out_disable_device: | |
6075 | atomic_dec(&pmcraid_adapter_count); | |
6076 | pci_set_drvdata(pdev, NULL); | |
6077 | pci_disable_device(pdev); | |
6078 | return -ENODEV; | |
6079 | } | |
6080 | ||
6081 | /* | |
6082 | * PCI driver structure of pcmraid driver | |
6083 | */ | |
6084 | static struct pci_driver pmcraid_driver = { | |
6085 | .name = PMCRAID_DRIVER_NAME, | |
6086 | .id_table = pmcraid_pci_table, | |
6087 | .probe = pmcraid_probe, | |
6088 | .remove = pmcraid_remove, | |
6089 | .suspend = pmcraid_suspend, | |
6090 | .resume = pmcraid_resume, | |
6091 | .shutdown = pmcraid_shutdown | |
6092 | }; | |
6093 | ||
89a36810 AR |
6094 | /** |
6095 | * pmcraid_init - module load entry point | |
6096 | */ | |
6097 | static int __init pmcraid_init(void) | |
6098 | { | |
6099 | dev_t dev; | |
6100 | int error; | |
6101 | ||
a1b66665 MM |
6102 | pmcraid_info("%s Device Driver version: %s\n", |
6103 | PMCRAID_DRIVER_NAME, PMCRAID_DRIVER_VERSION); | |
89a36810 AR |
6104 | |
6105 | error = alloc_chrdev_region(&dev, 0, | |
6106 | PMCRAID_MAX_ADAPTERS, | |
6107 | PMCRAID_DEVFILE); | |
6108 | ||
6109 | if (error) { | |
6110 | pmcraid_err("failed to get a major number for adapters\n"); | |
6111 | goto out_init; | |
6112 | } | |
6113 | ||
6114 | pmcraid_major = MAJOR(dev); | |
6115 | pmcraid_class = class_create(THIS_MODULE, PMCRAID_DEVFILE); | |
6116 | ||
6117 | if (IS_ERR(pmcraid_class)) { | |
6118 | error = PTR_ERR(pmcraid_class); | |
6119 | pmcraid_err("failed to register with with sysfs, error = %x\n", | |
6120 | error); | |
6121 | goto out_unreg_chrdev; | |
6122 | } | |
6123 | ||
89a36810 AR |
6124 | error = pmcraid_netlink_init(); |
6125 | ||
6126 | if (error) | |
6127 | goto out_unreg_chrdev; | |
6128 | ||
6129 | error = pci_register_driver(&pmcraid_driver); | |
6130 | ||
6131 | if (error == 0) | |
6132 | goto out_init; | |
6133 | ||
6134 | pmcraid_err("failed to register pmcraid driver, error = %x\n", | |
6135 | error); | |
6136 | class_destroy(pmcraid_class); | |
6137 | pmcraid_netlink_release(); | |
6138 | ||
6139 | out_unreg_chrdev: | |
6140 | unregister_chrdev_region(MKDEV(pmcraid_major, 0), PMCRAID_MAX_ADAPTERS); | |
34876402 | 6141 | |
89a36810 AR |
6142 | out_init: |
6143 | return error; | |
6144 | } | |
6145 | ||
6146 | /** | |
6147 | * pmcraid_exit - module unload entry point | |
6148 | */ | |
6149 | static void __exit pmcraid_exit(void) | |
6150 | { | |
6151 | pmcraid_netlink_release(); | |
89a36810 AR |
6152 | unregister_chrdev_region(MKDEV(pmcraid_major, 0), |
6153 | PMCRAID_MAX_ADAPTERS); | |
6154 | pci_unregister_driver(&pmcraid_driver); | |
592488a3 | 6155 | class_destroy(pmcraid_class); |
89a36810 AR |
6156 | } |
6157 | ||
6158 | module_init(pmcraid_init); | |
6159 | module_exit(pmcraid_exit); |