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89a36810 AR |
1 | /* |
2 | * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters | |
3 | * | |
729c8456 AR |
4 | * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com> |
5 | * PMC-Sierra Inc | |
89a36810 AR |
6 | * |
7 | * Copyright (C) 2008, 2009 PMC Sierra Inc | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, | |
22 | * USA | |
23 | * | |
24 | */ | |
25 | #include <linux/fs.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/types.h> | |
28 | #include <linux/errno.h> | |
29 | #include <linux/kernel.h> | |
30 | #include <linux/ioport.h> | |
31 | #include <linux/delay.h> | |
32 | #include <linux/pci.h> | |
33 | #include <linux/wait.h> | |
34 | #include <linux/spinlock.h> | |
35 | #include <linux/sched.h> | |
36 | #include <linux/interrupt.h> | |
37 | #include <linux/blkdev.h> | |
38 | #include <linux/firmware.h> | |
39 | #include <linux/module.h> | |
40 | #include <linux/moduleparam.h> | |
41 | #include <linux/hdreg.h> | |
89a36810 | 42 | #include <linux/io.h> |
5a0e3ad6 | 43 | #include <linux/slab.h> |
89a36810 AR |
44 | #include <asm/irq.h> |
45 | #include <asm/processor.h> | |
46 | #include <linux/libata.h> | |
47 | #include <linux/mutex.h> | |
9c9bd593 | 48 | #include <linux/ktime.h> |
89a36810 AR |
49 | #include <scsi/scsi.h> |
50 | #include <scsi/scsi_host.h> | |
34876402 | 51 | #include <scsi/scsi_device.h> |
89a36810 AR |
52 | #include <scsi/scsi_tcq.h> |
53 | #include <scsi/scsi_eh.h> | |
54 | #include <scsi/scsi_cmnd.h> | |
55 | #include <scsi/scsicam.h> | |
56 | ||
57 | #include "pmcraid.h" | |
58 | ||
59 | /* | |
60 | * Module configuration parameters | |
61 | */ | |
62 | static unsigned int pmcraid_debug_log; | |
63 | static unsigned int pmcraid_disable_aen; | |
64 | static unsigned int pmcraid_log_level = IOASC_LOG_LEVEL_MUST; | |
5da61410 | 65 | static unsigned int pmcraid_enable_msix; |
89a36810 AR |
66 | |
67 | /* | |
68 | * Data structures to support multiple adapters by the LLD. | |
69 | * pmcraid_adapter_count - count of configured adapters | |
70 | */ | |
71 | static atomic_t pmcraid_adapter_count = ATOMIC_INIT(0); | |
72 | ||
73 | /* | |
74 | * Supporting user-level control interface through IOCTL commands. | |
75 | * pmcraid_major - major number to use | |
76 | * pmcraid_minor - minor number(s) to use | |
77 | */ | |
78 | static unsigned int pmcraid_major; | |
79 | static struct class *pmcraid_class; | |
144b139c | 80 | static DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS); |
89a36810 AR |
81 | |
82 | /* | |
83 | * Module parameters | |
84 | */ | |
729c8456 | 85 | MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>"); |
89a36810 AR |
86 | MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver"); |
87 | MODULE_LICENSE("GPL"); | |
88 | MODULE_VERSION(PMCRAID_DRIVER_VERSION); | |
89 | ||
90 | module_param_named(log_level, pmcraid_log_level, uint, (S_IRUGO | S_IWUSR)); | |
91 | MODULE_PARM_DESC(log_level, | |
92 | "Enables firmware error code logging, default :1 high-severity" | |
93 | " errors, 2: all errors including high-severity errors," | |
94 | " 0: disables logging"); | |
95 | ||
96 | module_param_named(debug, pmcraid_debug_log, uint, (S_IRUGO | S_IWUSR)); | |
97 | MODULE_PARM_DESC(debug, | |
98 | "Enable driver verbose message logging. Set 1 to enable." | |
99 | "(default: 0)"); | |
100 | ||
101 | module_param_named(disable_aen, pmcraid_disable_aen, uint, (S_IRUGO | S_IWUSR)); | |
102 | MODULE_PARM_DESC(disable_aen, | |
103 | "Disable driver aen notifications to apps. Set 1 to disable." | |
104 | "(default: 0)"); | |
105 | ||
106 | /* chip specific constants for PMC MaxRAID controllers (same for | |
107 | * 0x5220 and 0x8010 | |
108 | */ | |
109 | static struct pmcraid_chip_details pmcraid_chip_cfg[] = { | |
110 | { | |
111 | .ioastatus = 0x0, | |
112 | .ioarrin = 0x00040, | |
113 | .mailbox = 0x7FC30, | |
114 | .global_intr_mask = 0x00034, | |
115 | .ioa_host_intr = 0x0009C, | |
116 | .ioa_host_intr_clr = 0x000A0, | |
c20c4267 | 117 | .ioa_host_msix_intr = 0x7FC40, |
89a36810 AR |
118 | .ioa_host_mask = 0x7FC28, |
119 | .ioa_host_mask_clr = 0x7FC28, | |
120 | .host_ioa_intr = 0x00020, | |
121 | .host_ioa_intr_clr = 0x00020, | |
122 | .transop_timeout = 300 | |
123 | } | |
124 | }; | |
125 | ||
126 | /* | |
127 | * PCI device ids supported by pmcraid driver | |
128 | */ | |
6f039790 | 129 | static struct pci_device_id pmcraid_pci_table[] = { |
89a36810 AR |
130 | { PCI_DEVICE(PCI_VENDOR_ID_PMC, PCI_DEVICE_ID_PMC_MAXRAID), |
131 | 0, 0, (kernel_ulong_t)&pmcraid_chip_cfg[0] | |
132 | }, | |
133 | {} | |
134 | }; | |
135 | ||
136 | MODULE_DEVICE_TABLE(pci, pmcraid_pci_table); | |
137 | ||
138 | ||
139 | ||
140 | /** | |
141 | * pmcraid_slave_alloc - Prepare for commands to a device | |
142 | * @scsi_dev: scsi device struct | |
143 | * | |
144 | * This function is called by mid-layer prior to sending any command to the new | |
145 | * device. Stores resource entry details of the device in scsi_device struct. | |
146 | * Queuecommand uses the resource handle and other details to fill up IOARCB | |
147 | * while sending commands to the device. | |
148 | * | |
149 | * Return value: | |
150 | * 0 on success / -ENXIO if device does not exist | |
151 | */ | |
152 | static int pmcraid_slave_alloc(struct scsi_device *scsi_dev) | |
153 | { | |
154 | struct pmcraid_resource_entry *temp, *res = NULL; | |
155 | struct pmcraid_instance *pinstance; | |
156 | u8 target, bus, lun; | |
157 | unsigned long lock_flags; | |
158 | int rc = -ENXIO; | |
c20c4267 AR |
159 | u16 fw_version; |
160 | ||
89a36810 AR |
161 | pinstance = shost_priv(scsi_dev->host); |
162 | ||
c20c4267 AR |
163 | fw_version = be16_to_cpu(pinstance->inq_data->fw_version); |
164 | ||
89a36810 AR |
165 | /* Driver exposes VSET and GSCSI resources only; all other device types |
166 | * are not exposed. Resource list is synchronized using resource lock | |
167 | * so any traversal or modifications to the list should be done inside | |
168 | * this lock | |
169 | */ | |
170 | spin_lock_irqsave(&pinstance->resource_lock, lock_flags); | |
171 | list_for_each_entry(temp, &pinstance->used_res_q, queue) { | |
172 | ||
729c8456 | 173 | /* do not expose VSETs with order-ids > MAX_VSET_TARGETS */ |
89a36810 | 174 | if (RES_IS_VSET(temp->cfg_entry)) { |
c20c4267 AR |
175 | if (fw_version <= PMCRAID_FW_VERSION_1) |
176 | target = temp->cfg_entry.unique_flags1; | |
177 | else | |
45c80be6 | 178 | target = le16_to_cpu(temp->cfg_entry.array_id) & 0xFF; |
c20c4267 | 179 | |
729c8456 | 180 | if (target > PMCRAID_MAX_VSET_TARGETS) |
89a36810 AR |
181 | continue; |
182 | bus = PMCRAID_VSET_BUS_ID; | |
183 | lun = 0; | |
184 | } else if (RES_IS_GSCSI(temp->cfg_entry)) { | |
185 | target = RES_TARGET(temp->cfg_entry.resource_address); | |
186 | bus = PMCRAID_PHYS_BUS_ID; | |
187 | lun = RES_LUN(temp->cfg_entry.resource_address); | |
188 | } else { | |
189 | continue; | |
190 | } | |
191 | ||
192 | if (bus == scsi_dev->channel && | |
193 | target == scsi_dev->id && | |
194 | lun == scsi_dev->lun) { | |
195 | res = temp; | |
196 | break; | |
197 | } | |
198 | } | |
199 | ||
200 | if (res) { | |
201 | res->scsi_dev = scsi_dev; | |
202 | scsi_dev->hostdata = res; | |
203 | res->change_detected = 0; | |
204 | atomic_set(&res->read_failures, 0); | |
205 | atomic_set(&res->write_failures, 0); | |
206 | rc = 0; | |
207 | } | |
208 | spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags); | |
209 | return rc; | |
210 | } | |
211 | ||
212 | /** | |
213 | * pmcraid_slave_configure - Configures a SCSI device | |
214 | * @scsi_dev: scsi device struct | |
215 | * | |
25985edc | 216 | * This function is executed by SCSI mid layer just after a device is first |
89a36810 AR |
217 | * scanned (i.e. it has responded to an INQUIRY). For VSET resources, the |
218 | * timeout value (default 30s) will be over-written to a higher value (60s) | |
219 | * and max_sectors value will be over-written to 512. It also sets queue depth | |
220 | * to host->cmd_per_lun value | |
221 | * | |
222 | * Return value: | |
223 | * 0 on success | |
224 | */ | |
225 | static int pmcraid_slave_configure(struct scsi_device *scsi_dev) | |
226 | { | |
227 | struct pmcraid_resource_entry *res = scsi_dev->hostdata; | |
228 | ||
229 | if (!res) | |
230 | return 0; | |
231 | ||
232 | /* LLD exposes VSETs and Enclosure devices only */ | |
233 | if (RES_IS_GSCSI(res->cfg_entry) && | |
234 | scsi_dev->type != TYPE_ENCLOSURE) | |
235 | return -ENXIO; | |
236 | ||
237 | pmcraid_info("configuring %x:%x:%x:%x\n", | |
238 | scsi_dev->host->unique_id, | |
239 | scsi_dev->channel, | |
240 | scsi_dev->id, | |
9cb78c16 | 241 | (u8)scsi_dev->lun); |
89a36810 AR |
242 | |
243 | if (RES_IS_GSCSI(res->cfg_entry)) { | |
244 | scsi_dev->allow_restart = 1; | |
245 | } else if (RES_IS_VSET(res->cfg_entry)) { | |
246 | scsi_dev->allow_restart = 1; | |
247 | blk_queue_rq_timeout(scsi_dev->request_queue, | |
248 | PMCRAID_VSET_IO_TIMEOUT); | |
086fa5ff | 249 | blk_queue_max_hw_sectors(scsi_dev->request_queue, |
89a36810 AR |
250 | PMCRAID_VSET_MAX_SECTORS); |
251 | } | |
252 | ||
c8b09f6f CH |
253 | /* |
254 | * We never want to report TCQ support for these types of devices. | |
255 | */ | |
256 | if (!RES_IS_GSCSI(res->cfg_entry) && !RES_IS_VSET(res->cfg_entry)) | |
257 | scsi_dev->tagged_supported = 0; | |
89a36810 AR |
258 | |
259 | return 0; | |
260 | } | |
261 | ||
262 | /** | |
263 | * pmcraid_slave_destroy - Unconfigure a SCSI device before removing it | |
264 | * | |
265 | * @scsi_dev: scsi device struct | |
266 | * | |
267 | * This is called by mid-layer before removing a device. Pointer assignments | |
268 | * done in pmcraid_slave_alloc will be reset to NULL here. | |
269 | * | |
270 | * Return value | |
271 | * none | |
272 | */ | |
273 | static void pmcraid_slave_destroy(struct scsi_device *scsi_dev) | |
274 | { | |
275 | struct pmcraid_resource_entry *res; | |
276 | ||
277 | res = (struct pmcraid_resource_entry *)scsi_dev->hostdata; | |
278 | ||
279 | if (res) | |
280 | res->scsi_dev = NULL; | |
281 | ||
282 | scsi_dev->hostdata = NULL; | |
283 | } | |
284 | ||
285 | /** | |
286 | * pmcraid_change_queue_depth - Change the device's queue depth | |
287 | * @scsi_dev: scsi device struct | |
288 | * @depth: depth to set | |
289 | * | |
290 | * Return value | |
c20c4267 | 291 | * actual depth set |
89a36810 | 292 | */ |
db5ed4df | 293 | static int pmcraid_change_queue_depth(struct scsi_device *scsi_dev, int depth) |
89a36810 AR |
294 | { |
295 | if (depth > PMCRAID_MAX_CMD_PER_LUN) | |
296 | depth = PMCRAID_MAX_CMD_PER_LUN; | |
db5ed4df | 297 | return scsi_change_queue_depth(scsi_dev, depth); |
89a36810 AR |
298 | } |
299 | ||
89a36810 AR |
300 | /** |
301 | * pmcraid_init_cmdblk - initializes a command block | |
302 | * | |
303 | * @cmd: pointer to struct pmcraid_cmd to be initialized | |
304 | * @index: if >=0 first time initialization; otherwise reinitialization | |
305 | * | |
306 | * Return Value | |
307 | * None | |
308 | */ | |
61b96d5b | 309 | static void pmcraid_init_cmdblk(struct pmcraid_cmd *cmd, int index) |
89a36810 AR |
310 | { |
311 | struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb); | |
312 | dma_addr_t dma_addr = cmd->ioa_cb_bus_addr; | |
313 | ||
314 | if (index >= 0) { | |
315 | /* first time initialization (called from probe) */ | |
316 | u32 ioasa_offset = | |
317 | offsetof(struct pmcraid_control_block, ioasa); | |
318 | ||
319 | cmd->index = index; | |
320 | ioarcb->response_handle = cpu_to_le32(index << 2); | |
321 | ioarcb->ioarcb_bus_addr = cpu_to_le64(dma_addr); | |
322 | ioarcb->ioasa_bus_addr = cpu_to_le64(dma_addr + ioasa_offset); | |
323 | ioarcb->ioasa_len = cpu_to_le16(sizeof(struct pmcraid_ioasa)); | |
324 | } else { | |
325 | /* re-initialization of various lengths, called once command is | |
326 | * processed by IOA | |
327 | */ | |
328 | memset(&cmd->ioa_cb->ioarcb.cdb, 0, PMCRAID_MAX_CDB_LEN); | |
c20c4267 | 329 | ioarcb->hrrq_id = 0; |
89a36810 AR |
330 | ioarcb->request_flags0 = 0; |
331 | ioarcb->request_flags1 = 0; | |
332 | ioarcb->cmd_timeout = 0; | |
45c80be6 | 333 | ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL); |
89a36810 AR |
334 | ioarcb->ioadl_bus_addr = 0; |
335 | ioarcb->ioadl_length = 0; | |
336 | ioarcb->data_transfer_length = 0; | |
337 | ioarcb->add_cmd_param_length = 0; | |
338 | ioarcb->add_cmd_param_offset = 0; | |
339 | cmd->ioa_cb->ioasa.ioasc = 0; | |
340 | cmd->ioa_cb->ioasa.residual_data_length = 0; | |
c20c4267 | 341 | cmd->time_left = 0; |
89a36810 AR |
342 | } |
343 | ||
344 | cmd->cmd_done = NULL; | |
345 | cmd->scsi_cmd = NULL; | |
346 | cmd->release = 0; | |
347 | cmd->completion_req = 0; | |
144b139c | 348 | cmd->sense_buffer = NULL; |
c20c4267 | 349 | cmd->sense_buffer_dma = 0; |
89a36810 | 350 | cmd->dma_handle = 0; |
242b5657 | 351 | timer_setup(&cmd->timer, NULL, 0); |
89a36810 AR |
352 | } |
353 | ||
354 | /** | |
355 | * pmcraid_reinit_cmdblk - reinitialize a command block | |
356 | * | |
357 | * @cmd: pointer to struct pmcraid_cmd to be reinitialized | |
358 | * | |
359 | * Return Value | |
360 | * None | |
361 | */ | |
362 | static void pmcraid_reinit_cmdblk(struct pmcraid_cmd *cmd) | |
363 | { | |
364 | pmcraid_init_cmdblk(cmd, -1); | |
365 | } | |
366 | ||
367 | /** | |
368 | * pmcraid_get_free_cmd - get a free cmd block from command block pool | |
369 | * @pinstance: adapter instance structure | |
370 | * | |
371 | * Return Value: | |
372 | * returns pointer to cmd block or NULL if no blocks are available | |
373 | */ | |
374 | static struct pmcraid_cmd *pmcraid_get_free_cmd( | |
375 | struct pmcraid_instance *pinstance | |
376 | ) | |
377 | { | |
378 | struct pmcraid_cmd *cmd = NULL; | |
379 | unsigned long lock_flags; | |
380 | ||
381 | /* free cmd block list is protected by free_pool_lock */ | |
382 | spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags); | |
383 | ||
384 | if (!list_empty(&pinstance->free_cmd_pool)) { | |
385 | cmd = list_entry(pinstance->free_cmd_pool.next, | |
386 | struct pmcraid_cmd, free_list); | |
387 | list_del(&cmd->free_list); | |
388 | } | |
389 | spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags); | |
390 | ||
391 | /* Initialize the command block before giving it the caller */ | |
392 | if (cmd != NULL) | |
393 | pmcraid_reinit_cmdblk(cmd); | |
394 | return cmd; | |
395 | } | |
396 | ||
397 | /** | |
398 | * pmcraid_return_cmd - return a completed command block back into free pool | |
399 | * @cmd: pointer to the command block | |
400 | * | |
401 | * Return Value: | |
402 | * nothing | |
403 | */ | |
61b96d5b | 404 | static void pmcraid_return_cmd(struct pmcraid_cmd *cmd) |
89a36810 AR |
405 | { |
406 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
407 | unsigned long lock_flags; | |
408 | ||
409 | spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags); | |
410 | list_add_tail(&cmd->free_list, &pinstance->free_cmd_pool); | |
411 | spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags); | |
412 | } | |
413 | ||
414 | /** | |
415 | * pmcraid_read_interrupts - reads IOA interrupts | |
416 | * | |
417 | * @pinstance: pointer to adapter instance structure | |
418 | * | |
419 | * Return value | |
420 | * interrupts read from IOA | |
421 | */ | |
422 | static u32 pmcraid_read_interrupts(struct pmcraid_instance *pinstance) | |
423 | { | |
c20c4267 AR |
424 | return (pinstance->interrupt_mode) ? |
425 | ioread32(pinstance->int_regs.ioa_host_msix_interrupt_reg) : | |
426 | ioread32(pinstance->int_regs.ioa_host_interrupt_reg); | |
89a36810 AR |
427 | } |
428 | ||
429 | /** | |
430 | * pmcraid_disable_interrupts - Masks and clears all specified interrupts | |
431 | * | |
432 | * @pinstance: pointer to per adapter instance structure | |
433 | * @intrs: interrupts to disable | |
434 | * | |
435 | * Return Value | |
436 | * None | |
437 | */ | |
438 | static void pmcraid_disable_interrupts( | |
439 | struct pmcraid_instance *pinstance, | |
440 | u32 intrs | |
441 | ) | |
442 | { | |
443 | u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg); | |
444 | u32 nmask = gmask | GLOBAL_INTERRUPT_MASK; | |
445 | ||
89a36810 | 446 | iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_clr_reg); |
c20c4267 AR |
447 | iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg); |
448 | ioread32(pinstance->int_regs.global_interrupt_mask_reg); | |
449 | ||
450 | if (!pinstance->interrupt_mode) { | |
451 | iowrite32(intrs, | |
452 | pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
453 | ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
454 | } | |
89a36810 AR |
455 | } |
456 | ||
457 | /** | |
458 | * pmcraid_enable_interrupts - Enables specified interrupts | |
459 | * | |
460 | * @pinstance: pointer to per adapter instance structure | |
461 | * @intr: interrupts to enable | |
462 | * | |
463 | * Return Value | |
464 | * None | |
465 | */ | |
466 | static void pmcraid_enable_interrupts( | |
467 | struct pmcraid_instance *pinstance, | |
468 | u32 intrs | |
469 | ) | |
470 | { | |
471 | u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg); | |
472 | u32 nmask = gmask & (~GLOBAL_INTERRUPT_MASK); | |
473 | ||
474 | iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg); | |
c20c4267 AR |
475 | |
476 | if (!pinstance->interrupt_mode) { | |
477 | iowrite32(~intrs, | |
478 | pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
479 | ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
480 | } | |
89a36810 AR |
481 | |
482 | pmcraid_info("enabled interrupts global mask = %x intr_mask = %x\n", | |
483 | ioread32(pinstance->int_regs.global_interrupt_mask_reg), | |
484 | ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg)); | |
485 | } | |
486 | ||
c20c4267 AR |
487 | /** |
488 | * pmcraid_clr_trans_op - clear trans to op interrupt | |
489 | * | |
490 | * @pinstance: pointer to per adapter instance structure | |
491 | * | |
492 | * Return Value | |
493 | * None | |
494 | */ | |
495 | static void pmcraid_clr_trans_op( | |
496 | struct pmcraid_instance *pinstance | |
497 | ) | |
498 | { | |
499 | unsigned long lock_flags; | |
500 | ||
501 | if (!pinstance->interrupt_mode) { | |
502 | iowrite32(INTRS_TRANSITION_TO_OPERATIONAL, | |
503 | pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
504 | ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
505 | iowrite32(INTRS_TRANSITION_TO_OPERATIONAL, | |
506 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
507 | ioread32(pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
508 | } | |
509 | ||
510 | if (pinstance->reset_cmd != NULL) { | |
511 | del_timer(&pinstance->reset_cmd->timer); | |
512 | spin_lock_irqsave( | |
513 | pinstance->host->host_lock, lock_flags); | |
514 | pinstance->reset_cmd->cmd_done(pinstance->reset_cmd); | |
515 | spin_unlock_irqrestore( | |
516 | pinstance->host->host_lock, lock_flags); | |
517 | } | |
518 | } | |
519 | ||
89a36810 AR |
520 | /** |
521 | * pmcraid_reset_type - Determine the required reset type | |
522 | * @pinstance: pointer to adapter instance structure | |
523 | * | |
524 | * IOA requires hard reset if any of the following conditions is true. | |
525 | * 1. If HRRQ valid interrupt is not masked | |
526 | * 2. IOA reset alert doorbell is set | |
527 | * 3. If there are any error interrupts | |
528 | */ | |
529 | static void pmcraid_reset_type(struct pmcraid_instance *pinstance) | |
530 | { | |
531 | u32 mask; | |
532 | u32 intrs; | |
533 | u32 alerts; | |
534 | ||
535 | mask = ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg); | |
536 | intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg); | |
537 | alerts = ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
538 | ||
539 | if ((mask & INTRS_HRRQ_VALID) == 0 || | |
540 | (alerts & DOORBELL_IOA_RESET_ALERT) || | |
541 | (intrs & PMCRAID_ERROR_INTERRUPTS)) { | |
542 | pmcraid_info("IOA requires hard reset\n"); | |
543 | pinstance->ioa_hard_reset = 1; | |
544 | } | |
545 | ||
546 | /* If unit check is active, trigger the dump */ | |
547 | if (intrs & INTRS_IOA_UNIT_CHECK) | |
548 | pinstance->ioa_unit_check = 1; | |
549 | } | |
550 | ||
551 | /** | |
552 | * pmcraid_bist_done - completion function for PCI BIST | |
553 | * @cmd: pointer to reset command | |
554 | * Return Value | |
c20c4267 | 555 | * none |
89a36810 AR |
556 | */ |
557 | ||
558 | static void pmcraid_ioa_reset(struct pmcraid_cmd *); | |
559 | ||
242b5657 | 560 | static void pmcraid_bist_done(struct timer_list *t) |
89a36810 | 561 | { |
242b5657 | 562 | struct pmcraid_cmd *cmd = from_timer(cmd, t, timer); |
89a36810 AR |
563 | struct pmcraid_instance *pinstance = cmd->drv_inst; |
564 | unsigned long lock_flags; | |
565 | int rc; | |
566 | u16 pci_reg; | |
567 | ||
568 | rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg); | |
569 | ||
570 | /* If PCI config space can't be accessed wait for another two secs */ | |
571 | if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) && | |
c20c4267 | 572 | cmd->time_left > 0) { |
89a36810 | 573 | pmcraid_info("BIST not complete, waiting another 2 secs\n"); |
c20c4267 AR |
574 | cmd->timer.expires = jiffies + cmd->time_left; |
575 | cmd->time_left = 0; | |
89a36810 AR |
576 | add_timer(&cmd->timer); |
577 | } else { | |
c20c4267 | 578 | cmd->time_left = 0; |
89a36810 AR |
579 | pmcraid_info("BIST is complete, proceeding with reset\n"); |
580 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
581 | pmcraid_ioa_reset(cmd); | |
582 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
583 | } | |
584 | } | |
585 | ||
586 | /** | |
587 | * pmcraid_start_bist - starts BIST | |
588 | * @cmd: pointer to reset cmd | |
589 | * Return Value | |
590 | * none | |
591 | */ | |
592 | static void pmcraid_start_bist(struct pmcraid_cmd *cmd) | |
593 | { | |
594 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
595 | u32 doorbells, intrs; | |
596 | ||
597 | /* proceed with bist and wait for 2 seconds */ | |
598 | iowrite32(DOORBELL_IOA_START_BIST, | |
599 | pinstance->int_regs.host_ioa_interrupt_reg); | |
600 | doorbells = ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
601 | intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg); | |
c20c4267 | 602 | pmcraid_info("doorbells after start bist: %x intrs: %x\n", |
89a36810 AR |
603 | doorbells, intrs); |
604 | ||
c20c4267 | 605 | cmd->time_left = msecs_to_jiffies(PMCRAID_BIST_TIMEOUT); |
89a36810 | 606 | cmd->timer.expires = jiffies + msecs_to_jiffies(PMCRAID_BIST_TIMEOUT); |
841b86f3 | 607 | cmd->timer.function = pmcraid_bist_done; |
89a36810 AR |
608 | add_timer(&cmd->timer); |
609 | } | |
610 | ||
611 | /** | |
612 | * pmcraid_reset_alert_done - completion routine for reset_alert | |
613 | * @cmd: pointer to command block used in reset sequence | |
614 | * Return value | |
615 | * None | |
616 | */ | |
242b5657 | 617 | static void pmcraid_reset_alert_done(struct timer_list *t) |
89a36810 | 618 | { |
242b5657 | 619 | struct pmcraid_cmd *cmd = from_timer(cmd, t, timer); |
89a36810 AR |
620 | struct pmcraid_instance *pinstance = cmd->drv_inst; |
621 | u32 status = ioread32(pinstance->ioa_status); | |
622 | unsigned long lock_flags; | |
623 | ||
624 | /* if the critical operation in progress bit is set or the wait times | |
625 | * out, invoke reset engine to proceed with hard reset. If there is | |
626 | * some more time to wait, restart the timer | |
627 | */ | |
628 | if (((status & INTRS_CRITICAL_OP_IN_PROGRESS) == 0) || | |
c20c4267 | 629 | cmd->time_left <= 0) { |
89a36810 AR |
630 | pmcraid_info("critical op is reset proceeding with reset\n"); |
631 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
632 | pmcraid_ioa_reset(cmd); | |
633 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
634 | } else { | |
635 | pmcraid_info("critical op is not yet reset waiting again\n"); | |
636 | /* restart timer if some more time is available to wait */ | |
c20c4267 | 637 | cmd->time_left -= PMCRAID_CHECK_FOR_RESET_TIMEOUT; |
89a36810 | 638 | cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT; |
841b86f3 | 639 | cmd->timer.function = pmcraid_reset_alert_done; |
89a36810 AR |
640 | add_timer(&cmd->timer); |
641 | } | |
642 | } | |
643 | ||
644 | /** | |
645 | * pmcraid_reset_alert - alerts IOA for a possible reset | |
646 | * @cmd : command block to be used for reset sequence. | |
647 | * | |
648 | * Return Value | |
649 | * returns 0 if pci config-space is accessible and RESET_DOORBELL is | |
650 | * successfully written to IOA. Returns non-zero in case pci_config_space | |
651 | * is not accessible | |
652 | */ | |
c20c4267 | 653 | static void pmcraid_notify_ioastate(struct pmcraid_instance *, u32); |
89a36810 AR |
654 | static void pmcraid_reset_alert(struct pmcraid_cmd *cmd) |
655 | { | |
656 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
657 | u32 doorbells; | |
658 | int rc; | |
659 | u16 pci_reg; | |
660 | ||
661 | /* If we are able to access IOA PCI config space, alert IOA that we are | |
662 | * going to reset it soon. This enables IOA to preserv persistent error | |
663 | * data if any. In case memory space is not accessible, proceed with | |
664 | * BIST or slot_reset | |
665 | */ | |
666 | rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg); | |
667 | if ((rc == PCIBIOS_SUCCESSFUL) && (pci_reg & PCI_COMMAND_MEMORY)) { | |
668 | ||
669 | /* wait for IOA permission i.e until CRITICAL_OPERATION bit is | |
670 | * reset IOA doesn't generate any interrupts when CRITICAL | |
671 | * OPERATION bit is reset. A timer is started to wait for this | |
672 | * bit to be reset. | |
673 | */ | |
c20c4267 | 674 | cmd->time_left = PMCRAID_RESET_TIMEOUT; |
89a36810 | 675 | cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT; |
841b86f3 | 676 | cmd->timer.function = pmcraid_reset_alert_done; |
89a36810 AR |
677 | add_timer(&cmd->timer); |
678 | ||
679 | iowrite32(DOORBELL_IOA_RESET_ALERT, | |
680 | pinstance->int_regs.host_ioa_interrupt_reg); | |
681 | doorbells = | |
682 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
683 | pmcraid_info("doorbells after reset alert: %x\n", doorbells); | |
684 | } else { | |
685 | pmcraid_info("PCI config is not accessible starting BIST\n"); | |
686 | pinstance->ioa_state = IOA_STATE_IN_HARD_RESET; | |
687 | pmcraid_start_bist(cmd); | |
688 | } | |
689 | } | |
690 | ||
691 | /** | |
692 | * pmcraid_timeout_handler - Timeout handler for internally generated ops | |
693 | * | |
694 | * @cmd : pointer to command structure, that got timedout | |
695 | * | |
696 | * This function blocks host requests and initiates an adapter reset. | |
697 | * | |
698 | * Return value: | |
699 | * None | |
700 | */ | |
242b5657 | 701 | static void pmcraid_timeout_handler(struct timer_list *t) |
89a36810 | 702 | { |
242b5657 | 703 | struct pmcraid_cmd *cmd = from_timer(cmd, t, timer); |
89a36810 AR |
704 | struct pmcraid_instance *pinstance = cmd->drv_inst; |
705 | unsigned long lock_flags; | |
706 | ||
34876402 | 707 | dev_info(&pinstance->pdev->dev, |
c20c4267 AR |
708 | "Adapter being reset due to cmd(CDB[0] = %x) timeout\n", |
709 | cmd->ioa_cb->ioarcb.cdb[0]); | |
89a36810 AR |
710 | |
711 | /* Command timeouts result in hard reset sequence. The command that got | |
712 | * timed out may be the one used as part of reset sequence. In this | |
713 | * case restart reset sequence using the same command block even if | |
714 | * reset is in progress. Otherwise fail this command and get a free | |
715 | * command block to restart the reset sequence. | |
716 | */ | |
717 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
718 | if (!pinstance->ioa_reset_in_progress) { | |
719 | pinstance->ioa_reset_attempts = 0; | |
720 | cmd = pmcraid_get_free_cmd(pinstance); | |
721 | ||
722 | /* If we are out of command blocks, just return here itself. | |
723 | * Some other command's timeout handler can do the reset job | |
724 | */ | |
725 | if (cmd == NULL) { | |
726 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
727 | lock_flags); | |
728 | pmcraid_err("no free cmnd block for timeout handler\n"); | |
729 | return; | |
730 | } | |
731 | ||
732 | pinstance->reset_cmd = cmd; | |
733 | pinstance->ioa_reset_in_progress = 1; | |
734 | } else { | |
735 | pmcraid_info("reset is already in progress\n"); | |
736 | ||
737 | if (pinstance->reset_cmd != cmd) { | |
738 | /* This command should have been given to IOA, this | |
739 | * command will be completed by fail_outstanding_cmds | |
740 | * anyway | |
741 | */ | |
742 | pmcraid_err("cmd is pending but reset in progress\n"); | |
743 | } | |
744 | ||
745 | /* If this command was being used as part of the reset | |
746 | * sequence, set cmd_done pointer to pmcraid_ioa_reset. This | |
747 | * causes fail_outstanding_commands not to return the command | |
748 | * block back to free pool | |
749 | */ | |
750 | if (cmd == pinstance->reset_cmd) | |
751 | cmd->cmd_done = pmcraid_ioa_reset; | |
89a36810 AR |
752 | } |
753 | ||
c20c4267 AR |
754 | /* Notify apps of important IOA bringup/bringdown sequences */ |
755 | if (pinstance->scn.ioa_state != PMC_DEVICE_EVENT_RESET_START && | |
756 | pinstance->scn.ioa_state != PMC_DEVICE_EVENT_SHUTDOWN_START) | |
757 | pmcraid_notify_ioastate(pinstance, | |
758 | PMC_DEVICE_EVENT_RESET_START); | |
759 | ||
89a36810 AR |
760 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; |
761 | scsi_block_requests(pinstance->host); | |
762 | pmcraid_reset_alert(cmd); | |
763 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
764 | } | |
765 | ||
766 | /** | |
767 | * pmcraid_internal_done - completion routine for internally generated cmds | |
768 | * | |
769 | * @cmd: command that got response from IOA | |
770 | * | |
771 | * Return Value: | |
772 | * none | |
773 | */ | |
774 | static void pmcraid_internal_done(struct pmcraid_cmd *cmd) | |
775 | { | |
776 | pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n", | |
777 | cmd->ioa_cb->ioarcb.cdb[0], | |
778 | le32_to_cpu(cmd->ioa_cb->ioasa.ioasc)); | |
779 | ||
780 | /* Some of the internal commands are sent with callers blocking for the | |
781 | * response. Same will be indicated as part of cmd->completion_req | |
782 | * field. Response path needs to wake up any waiters waiting for cmd | |
783 | * completion if this flag is set. | |
784 | */ | |
785 | if (cmd->completion_req) { | |
786 | cmd->completion_req = 0; | |
787 | complete(&cmd->wait_for_completion); | |
788 | } | |
789 | ||
790 | /* most of the internal commands are completed by caller itself, so | |
791 | * no need to return the command block back to free pool until we are | |
792 | * required to do so (e.g once done with initialization). | |
793 | */ | |
794 | if (cmd->release) { | |
795 | cmd->release = 0; | |
796 | pmcraid_return_cmd(cmd); | |
797 | } | |
798 | } | |
799 | ||
800 | /** | |
801 | * pmcraid_reinit_cfgtable_done - done function for cfg table reinitialization | |
802 | * | |
803 | * @cmd: command that got response from IOA | |
804 | * | |
805 | * This routine is called after driver re-reads configuration table due to a | |
806 | * lost CCN. It returns the command block back to free pool and schedules | |
807 | * worker thread to add/delete devices into the system. | |
808 | * | |
809 | * Return Value: | |
810 | * none | |
811 | */ | |
812 | static void pmcraid_reinit_cfgtable_done(struct pmcraid_cmd *cmd) | |
813 | { | |
814 | pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n", | |
815 | cmd->ioa_cb->ioarcb.cdb[0], | |
816 | le32_to_cpu(cmd->ioa_cb->ioasa.ioasc)); | |
817 | ||
818 | if (cmd->release) { | |
819 | cmd->release = 0; | |
820 | pmcraid_return_cmd(cmd); | |
821 | } | |
822 | pmcraid_info("scheduling worker for config table reinitialization\n"); | |
823 | schedule_work(&cmd->drv_inst->worker_q); | |
824 | } | |
825 | ||
826 | /** | |
827 | * pmcraid_erp_done - Process completion of SCSI error response from device | |
828 | * @cmd: pmcraid_command | |
829 | * | |
830 | * This function copies the sense buffer into the scsi_cmd struct and completes | |
831 | * scsi_cmd by calling scsi_done function. | |
832 | * | |
833 | * Return value: | |
834 | * none | |
835 | */ | |
836 | static void pmcraid_erp_done(struct pmcraid_cmd *cmd) | |
837 | { | |
838 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
839 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
840 | u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
841 | ||
842 | if (PMCRAID_IOASC_SENSE_KEY(ioasc) > 0) { | |
843 | scsi_cmd->result |= (DID_ERROR << 16); | |
34876402 AR |
844 | scmd_printk(KERN_INFO, scsi_cmd, |
845 | "command CDB[0] = %x failed with IOASC: 0x%08X\n", | |
846 | cmd->ioa_cb->ioarcb.cdb[0], ioasc); | |
89a36810 AR |
847 | } |
848 | ||
a9b9e3ad CH |
849 | if (cmd->sense_buffer) { |
850 | dma_unmap_single(&pinstance->pdev->dev, cmd->sense_buffer_dma, | |
851 | SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE); | |
89a36810 AR |
852 | cmd->sense_buffer = NULL; |
853 | cmd->sense_buffer_dma = 0; | |
854 | } | |
855 | ||
856 | scsi_dma_unmap(scsi_cmd); | |
857 | pmcraid_return_cmd(cmd); | |
858 | scsi_cmd->scsi_done(scsi_cmd); | |
859 | } | |
860 | ||
861 | /** | |
862 | * pmcraid_fire_command - sends an IOA command to adapter | |
863 | * | |
864 | * This function adds the given block into pending command list | |
865 | * and returns without waiting | |
866 | * | |
867 | * @cmd : command to be sent to the device | |
868 | * | |
869 | * Return Value | |
870 | * None | |
871 | */ | |
872 | static void _pmcraid_fire_command(struct pmcraid_cmd *cmd) | |
873 | { | |
874 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
875 | unsigned long lock_flags; | |
876 | ||
877 | /* Add this command block to pending cmd pool. We do this prior to | |
878 | * writting IOARCB to ioarrin because IOA might complete the command | |
879 | * by the time we are about to add it to the list. Response handler | |
c20c4267 | 880 | * (isr/tasklet) looks for cmd block in the pending pending list. |
89a36810 AR |
881 | */ |
882 | spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags); | |
883 | list_add_tail(&cmd->free_list, &pinstance->pending_cmd_pool); | |
884 | spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags); | |
885 | atomic_inc(&pinstance->outstanding_cmds); | |
886 | ||
887 | /* driver writes lower 32-bit value of IOARCB address only */ | |
888 | mb(); | |
45c80be6 | 889 | iowrite32(le64_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr), pinstance->ioarrin); |
89a36810 AR |
890 | } |
891 | ||
892 | /** | |
893 | * pmcraid_send_cmd - fires a command to IOA | |
894 | * | |
895 | * This function also sets up timeout function, and command completion | |
896 | * function | |
897 | * | |
898 | * @cmd: pointer to the command block to be fired to IOA | |
899 | * @cmd_done: command completion function, called once IOA responds | |
900 | * @timeout: timeout to wait for this command completion | |
901 | * @timeout_func: timeout handler | |
902 | * | |
903 | * Return value | |
904 | * none | |
905 | */ | |
906 | static void pmcraid_send_cmd( | |
907 | struct pmcraid_cmd *cmd, | |
908 | void (*cmd_done) (struct pmcraid_cmd *), | |
909 | unsigned long timeout, | |
242b5657 | 910 | void (*timeout_func) (struct timer_list *) |
89a36810 AR |
911 | ) |
912 | { | |
913 | /* initialize done function */ | |
914 | cmd->cmd_done = cmd_done; | |
915 | ||
916 | if (timeout_func) { | |
917 | /* setup timeout handler */ | |
89a36810 | 918 | cmd->timer.expires = jiffies + timeout; |
841b86f3 | 919 | cmd->timer.function = timeout_func; |
89a36810 AR |
920 | add_timer(&cmd->timer); |
921 | } | |
922 | ||
923 | /* fire the command to IOA */ | |
924 | _pmcraid_fire_command(cmd); | |
925 | } | |
926 | ||
c20c4267 AR |
927 | /** |
928 | * pmcraid_ioa_shutdown_done - completion function for IOA shutdown command | |
929 | * @cmd: pointer to the command block used for sending IOA shutdown command | |
930 | * | |
931 | * Return value | |
932 | * None | |
933 | */ | |
934 | static void pmcraid_ioa_shutdown_done(struct pmcraid_cmd *cmd) | |
935 | { | |
936 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
937 | unsigned long lock_flags; | |
938 | ||
939 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
940 | pmcraid_ioa_reset(cmd); | |
941 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
942 | } | |
943 | ||
89a36810 AR |
944 | /** |
945 | * pmcraid_ioa_shutdown - sends SHUTDOWN command to ioa | |
946 | * | |
947 | * @cmd: pointer to the command block used as part of reset sequence | |
948 | * | |
949 | * Return Value | |
950 | * None | |
951 | */ | |
952 | static void pmcraid_ioa_shutdown(struct pmcraid_cmd *cmd) | |
953 | { | |
954 | pmcraid_info("response for Cancel CCN CDB[0] = %x ioasc = %x\n", | |
955 | cmd->ioa_cb->ioarcb.cdb[0], | |
956 | le32_to_cpu(cmd->ioa_cb->ioasa.ioasc)); | |
957 | ||
958 | /* Note that commands sent during reset require next command to be sent | |
959 | * to IOA. Hence reinit the done function as well as timeout function | |
960 | */ | |
961 | pmcraid_reinit_cmdblk(cmd); | |
962 | cmd->ioa_cb->ioarcb.request_type = REQ_TYPE_IOACMD; | |
963 | cmd->ioa_cb->ioarcb.resource_handle = | |
964 | cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
965 | cmd->ioa_cb->ioarcb.cdb[0] = PMCRAID_IOA_SHUTDOWN; | |
966 | cmd->ioa_cb->ioarcb.cdb[1] = PMCRAID_SHUTDOWN_NORMAL; | |
967 | ||
968 | /* fire shutdown command to hardware. */ | |
969 | pmcraid_info("firing normal shutdown command (%d) to IOA\n", | |
970 | le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle)); | |
971 | ||
c20c4267 AR |
972 | pmcraid_notify_ioastate(cmd->drv_inst, PMC_DEVICE_EVENT_SHUTDOWN_START); |
973 | ||
974 | pmcraid_send_cmd(cmd, pmcraid_ioa_shutdown_done, | |
89a36810 AR |
975 | PMCRAID_SHUTDOWN_TIMEOUT, |
976 | pmcraid_timeout_handler); | |
977 | } | |
978 | ||
979 | /** | |
c20c4267 AR |
980 | * pmcraid_get_fwversion_done - completion function for get_fwversion |
981 | * | |
982 | * @cmd: pointer to command block used to send INQUIRY command | |
89a36810 AR |
983 | * |
984 | * Return Value | |
c20c4267 | 985 | * none |
89a36810 | 986 | */ |
89a36810 AR |
987 | static void pmcraid_querycfg(struct pmcraid_cmd *); |
988 | ||
c20c4267 AR |
989 | static void pmcraid_get_fwversion_done(struct pmcraid_cmd *cmd) |
990 | { | |
991 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
992 | u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
993 | unsigned long lock_flags; | |
994 | ||
995 | /* configuration table entry size depends on firmware version. If fw | |
996 | * version is not known, it is not possible to interpret IOA config | |
997 | * table | |
998 | */ | |
999 | if (ioasc) { | |
1000 | pmcraid_err("IOA Inquiry failed with %x\n", ioasc); | |
1001 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
1002 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; | |
1003 | pmcraid_reset_alert(cmd); | |
1004 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
1005 | } else { | |
1006 | pmcraid_querycfg(cmd); | |
1007 | } | |
1008 | } | |
1009 | ||
1010 | /** | |
1011 | * pmcraid_get_fwversion - reads firmware version information | |
1012 | * | |
1013 | * @cmd: pointer to command block used to send INQUIRY command | |
1014 | * | |
1015 | * Return Value | |
1016 | * none | |
1017 | */ | |
1018 | static void pmcraid_get_fwversion(struct pmcraid_cmd *cmd) | |
1019 | { | |
1020 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
b22ee87d | 1021 | struct pmcraid_ioadl_desc *ioadl; |
c20c4267 AR |
1022 | struct pmcraid_instance *pinstance = cmd->drv_inst; |
1023 | u16 data_size = sizeof(struct pmcraid_inquiry_data); | |
1024 | ||
1025 | pmcraid_reinit_cmdblk(cmd); | |
1026 | ioarcb->request_type = REQ_TYPE_SCSI; | |
1027 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
1028 | ioarcb->cdb[0] = INQUIRY; | |
1029 | ioarcb->cdb[1] = 1; | |
1030 | ioarcb->cdb[2] = 0xD0; | |
1031 | ioarcb->cdb[3] = (data_size >> 8) & 0xFF; | |
1032 | ioarcb->cdb[4] = data_size & 0xFF; | |
1033 | ||
1034 | /* Since entire inquiry data it can be part of IOARCB itself | |
1035 | */ | |
1036 | ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
1037 | offsetof(struct pmcraid_ioarcb, | |
1038 | add_data.u.ioadl[0])); | |
1039 | ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); | |
45c80be6 | 1040 | ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL)); |
c20c4267 AR |
1041 | |
1042 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
1043 | ioarcb->data_transfer_length = cpu_to_le32(data_size); | |
1044 | ioadl = &(ioarcb->add_data.u.ioadl[0]); | |
1045 | ioadl->flags = IOADL_FLAGS_LAST_DESC; | |
1046 | ioadl->address = cpu_to_le64(pinstance->inq_data_baddr); | |
1047 | ioadl->data_len = cpu_to_le32(data_size); | |
1048 | ||
1049 | pmcraid_send_cmd(cmd, pmcraid_get_fwversion_done, | |
1050 | PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler); | |
1051 | } | |
1052 | ||
1053 | /** | |
1054 | * pmcraid_identify_hrrq - registers host rrq buffers with IOA | |
1055 | * @cmd: pointer to command block to be used for identify hrrq | |
1056 | * | |
1057 | * Return Value | |
1058 | * none | |
1059 | */ | |
89a36810 AR |
1060 | static void pmcraid_identify_hrrq(struct pmcraid_cmd *cmd) |
1061 | { | |
1062 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1063 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
c20c4267 | 1064 | int index = cmd->hrrq_index; |
89a36810 | 1065 | __be64 hrrq_addr = cpu_to_be64(pinstance->hrrq_start_bus_addr[index]); |
45c80be6 | 1066 | __be32 hrrq_size = cpu_to_be32(sizeof(u32) * PMCRAID_MAX_CMD); |
c20c4267 | 1067 | void (*done_function)(struct pmcraid_cmd *); |
89a36810 AR |
1068 | |
1069 | pmcraid_reinit_cmdblk(cmd); | |
c20c4267 AR |
1070 | cmd->hrrq_index = index + 1; |
1071 | ||
1072 | if (cmd->hrrq_index < pinstance->num_hrrq) { | |
1073 | done_function = pmcraid_identify_hrrq; | |
1074 | } else { | |
1075 | cmd->hrrq_index = 0; | |
1076 | done_function = pmcraid_get_fwversion; | |
1077 | } | |
89a36810 AR |
1078 | |
1079 | /* Initialize ioarcb */ | |
1080 | ioarcb->request_type = REQ_TYPE_IOACMD; | |
1081 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
1082 | ||
1083 | /* initialize the hrrq number where IOA will respond to this command */ | |
1084 | ioarcb->hrrq_id = index; | |
1085 | ioarcb->cdb[0] = PMCRAID_IDENTIFY_HRRQ; | |
1086 | ioarcb->cdb[1] = index; | |
1087 | ||
1088 | /* IOA expects 64-bit pci address to be written in B.E format | |
1089 | * (i.e cdb[2]=MSByte..cdb[9]=LSB. | |
1090 | */ | |
c20c4267 AR |
1091 | pmcraid_info("HRRQ_IDENTIFY with hrrq:ioarcb:index => %llx:%llx:%x\n", |
1092 | hrrq_addr, ioarcb->ioarcb_bus_addr, index); | |
89a36810 AR |
1093 | |
1094 | memcpy(&(ioarcb->cdb[2]), &hrrq_addr, sizeof(hrrq_addr)); | |
1095 | memcpy(&(ioarcb->cdb[10]), &hrrq_size, sizeof(hrrq_size)); | |
1096 | ||
1097 | /* Subsequent commands require HRRQ identification to be successful. | |
1098 | * Note that this gets called even during reset from SCSI mid-layer | |
1099 | * or tasklet | |
1100 | */ | |
c20c4267 | 1101 | pmcraid_send_cmd(cmd, done_function, |
89a36810 AR |
1102 | PMCRAID_INTERNAL_TIMEOUT, |
1103 | pmcraid_timeout_handler); | |
1104 | } | |
1105 | ||
1106 | static void pmcraid_process_ccn(struct pmcraid_cmd *cmd); | |
1107 | static void pmcraid_process_ldn(struct pmcraid_cmd *cmd); | |
1108 | ||
1109 | /** | |
1110 | * pmcraid_send_hcam_cmd - send an initialized command block(HCAM) to IOA | |
1111 | * | |
1112 | * @cmd: initialized command block pointer | |
1113 | * | |
1114 | * Return Value | |
1115 | * none | |
1116 | */ | |
1117 | static void pmcraid_send_hcam_cmd(struct pmcraid_cmd *cmd) | |
1118 | { | |
1119 | if (cmd->ioa_cb->ioarcb.cdb[1] == PMCRAID_HCAM_CODE_CONFIG_CHANGE) | |
1120 | atomic_set(&(cmd->drv_inst->ccn.ignore), 0); | |
1121 | else | |
1122 | atomic_set(&(cmd->drv_inst->ldn.ignore), 0); | |
1123 | ||
1124 | pmcraid_send_cmd(cmd, cmd->cmd_done, 0, NULL); | |
1125 | } | |
1126 | ||
1127 | /** | |
1128 | * pmcraid_init_hcam - send an initialized command block(HCAM) to IOA | |
1129 | * | |
1130 | * @pinstance: pointer to adapter instance structure | |
1131 | * @type: HCAM type | |
1132 | * | |
1133 | * Return Value | |
1134 | * pointer to initialized pmcraid_cmd structure or NULL | |
1135 | */ | |
1136 | static struct pmcraid_cmd *pmcraid_init_hcam | |
1137 | ( | |
1138 | struct pmcraid_instance *pinstance, | |
1139 | u8 type | |
1140 | ) | |
1141 | { | |
1142 | struct pmcraid_cmd *cmd; | |
1143 | struct pmcraid_ioarcb *ioarcb; | |
1144 | struct pmcraid_ioadl_desc *ioadl; | |
1145 | struct pmcraid_hostrcb *hcam; | |
1146 | void (*cmd_done) (struct pmcraid_cmd *); | |
1147 | dma_addr_t dma; | |
1148 | int rcb_size; | |
1149 | ||
1150 | cmd = pmcraid_get_free_cmd(pinstance); | |
1151 | ||
1152 | if (!cmd) { | |
1153 | pmcraid_err("no free command blocks for hcam\n"); | |
1154 | return cmd; | |
1155 | } | |
1156 | ||
1157 | if (type == PMCRAID_HCAM_CODE_CONFIG_CHANGE) { | |
c20c4267 | 1158 | rcb_size = sizeof(struct pmcraid_hcam_ccn_ext); |
89a36810 AR |
1159 | cmd_done = pmcraid_process_ccn; |
1160 | dma = pinstance->ccn.baddr + PMCRAID_AEN_HDR_SIZE; | |
1161 | hcam = &pinstance->ccn; | |
1162 | } else { | |
1163 | rcb_size = sizeof(struct pmcraid_hcam_ldn); | |
1164 | cmd_done = pmcraid_process_ldn; | |
1165 | dma = pinstance->ldn.baddr + PMCRAID_AEN_HDR_SIZE; | |
1166 | hcam = &pinstance->ldn; | |
1167 | } | |
1168 | ||
1169 | /* initialize command pointer used for HCAM registration */ | |
1170 | hcam->cmd = cmd; | |
1171 | ||
1172 | ioarcb = &cmd->ioa_cb->ioarcb; | |
1173 | ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
1174 | offsetof(struct pmcraid_ioarcb, | |
1175 | add_data.u.ioadl[0])); | |
1176 | ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); | |
1177 | ioadl = ioarcb->add_data.u.ioadl; | |
1178 | ||
1179 | /* Initialize ioarcb */ | |
1180 | ioarcb->request_type = REQ_TYPE_HCAM; | |
1181 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
1182 | ioarcb->cdb[0] = PMCRAID_HOST_CONTROLLED_ASYNC; | |
1183 | ioarcb->cdb[1] = type; | |
1184 | ioarcb->cdb[7] = (rcb_size >> 8) & 0xFF; | |
1185 | ioarcb->cdb[8] = (rcb_size) & 0xFF; | |
1186 | ||
1187 | ioarcb->data_transfer_length = cpu_to_le32(rcb_size); | |
1188 | ||
88197966 | 1189 | ioadl[0].flags |= IOADL_FLAGS_READ_LAST; |
89a36810 | 1190 | ioadl[0].data_len = cpu_to_le32(rcb_size); |
45c80be6 | 1191 | ioadl[0].address = cpu_to_le64(dma); |
89a36810 AR |
1192 | |
1193 | cmd->cmd_done = cmd_done; | |
1194 | return cmd; | |
1195 | } | |
1196 | ||
1197 | /** | |
1198 | * pmcraid_send_hcam - Send an HCAM to IOA | |
1199 | * @pinstance: ioa config struct | |
1200 | * @type: HCAM type | |
1201 | * | |
1202 | * This function will send a Host Controlled Async command to IOA. | |
1203 | * | |
1204 | * Return value: | |
c20c4267 | 1205 | * none |
89a36810 AR |
1206 | */ |
1207 | static void pmcraid_send_hcam(struct pmcraid_instance *pinstance, u8 type) | |
1208 | { | |
1209 | struct pmcraid_cmd *cmd = pmcraid_init_hcam(pinstance, type); | |
1210 | pmcraid_send_hcam_cmd(cmd); | |
1211 | } | |
1212 | ||
1213 | ||
1214 | /** | |
1215 | * pmcraid_prepare_cancel_cmd - prepares a command block to abort another | |
1216 | * | |
1217 | * @cmd: pointer to cmd that is used as cancelling command | |
1218 | * @cmd_to_cancel: pointer to the command that needs to be cancelled | |
1219 | */ | |
1220 | static void pmcraid_prepare_cancel_cmd( | |
1221 | struct pmcraid_cmd *cmd, | |
1222 | struct pmcraid_cmd *cmd_to_cancel | |
1223 | ) | |
1224 | { | |
1225 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
45c80be6 AB |
1226 | __be64 ioarcb_addr; |
1227 | ||
1228 | /* IOARCB address of the command to be cancelled is given in | |
1229 | * cdb[2]..cdb[9] is Big-Endian format. Note that length bits in | |
1230 | * IOARCB address are not masked. | |
1231 | */ | |
1232 | ioarcb_addr = cpu_to_be64(le64_to_cpu(cmd_to_cancel->ioa_cb->ioarcb.ioarcb_bus_addr)); | |
89a36810 AR |
1233 | |
1234 | /* Get the resource handle to where the command to be aborted has been | |
1235 | * sent. | |
1236 | */ | |
1237 | ioarcb->resource_handle = cmd_to_cancel->ioa_cb->ioarcb.resource_handle; | |
1238 | ioarcb->request_type = REQ_TYPE_IOACMD; | |
1239 | memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN); | |
1240 | ioarcb->cdb[0] = PMCRAID_ABORT_CMD; | |
1241 | ||
89a36810 AR |
1242 | memcpy(&(ioarcb->cdb[2]), &ioarcb_addr, sizeof(ioarcb_addr)); |
1243 | } | |
1244 | ||
1245 | /** | |
1246 | * pmcraid_cancel_hcam - sends ABORT task to abort a given HCAM | |
1247 | * | |
1248 | * @cmd: command to be used as cancelling command | |
1249 | * @type: HCAM type | |
1250 | * @cmd_done: op done function for the cancelling command | |
1251 | */ | |
1252 | static void pmcraid_cancel_hcam( | |
1253 | struct pmcraid_cmd *cmd, | |
1254 | u8 type, | |
1255 | void (*cmd_done) (struct pmcraid_cmd *) | |
1256 | ) | |
1257 | { | |
1258 | struct pmcraid_instance *pinstance; | |
1259 | struct pmcraid_hostrcb *hcam; | |
1260 | ||
1261 | pinstance = cmd->drv_inst; | |
1262 | hcam = (type == PMCRAID_HCAM_CODE_LOG_DATA) ? | |
1263 | &pinstance->ldn : &pinstance->ccn; | |
1264 | ||
1265 | /* prepare for cancelling previous hcam command. If the HCAM is | |
1266 | * currently not pending with IOA, we would have hcam->cmd as non-null | |
1267 | */ | |
1268 | if (hcam->cmd == NULL) | |
1269 | return; | |
1270 | ||
1271 | pmcraid_prepare_cancel_cmd(cmd, hcam->cmd); | |
1272 | ||
1273 | /* writing to IOARRIN must be protected by host_lock, as mid-layer | |
1274 | * schedule queuecommand while we are doing this | |
1275 | */ | |
1276 | pmcraid_send_cmd(cmd, cmd_done, | |
1277 | PMCRAID_INTERNAL_TIMEOUT, | |
1278 | pmcraid_timeout_handler); | |
1279 | } | |
1280 | ||
1281 | /** | |
1282 | * pmcraid_cancel_ccn - cancel CCN HCAM already registered with IOA | |
1283 | * | |
1284 | * @cmd: command block to be used for cancelling the HCAM | |
1285 | */ | |
1286 | static void pmcraid_cancel_ccn(struct pmcraid_cmd *cmd) | |
1287 | { | |
1288 | pmcraid_info("response for Cancel LDN CDB[0] = %x ioasc = %x\n", | |
1289 | cmd->ioa_cb->ioarcb.cdb[0], | |
1290 | le32_to_cpu(cmd->ioa_cb->ioasa.ioasc)); | |
1291 | ||
1292 | pmcraid_reinit_cmdblk(cmd); | |
1293 | ||
1294 | pmcraid_cancel_hcam(cmd, | |
1295 | PMCRAID_HCAM_CODE_CONFIG_CHANGE, | |
1296 | pmcraid_ioa_shutdown); | |
1297 | } | |
1298 | ||
1299 | /** | |
1300 | * pmcraid_cancel_ldn - cancel LDN HCAM already registered with IOA | |
1301 | * | |
1302 | * @cmd: command block to be used for cancelling the HCAM | |
1303 | */ | |
1304 | static void pmcraid_cancel_ldn(struct pmcraid_cmd *cmd) | |
1305 | { | |
1306 | pmcraid_cancel_hcam(cmd, | |
1307 | PMCRAID_HCAM_CODE_LOG_DATA, | |
1308 | pmcraid_cancel_ccn); | |
1309 | } | |
1310 | ||
1311 | /** | |
1312 | * pmcraid_expose_resource - check if the resource can be exposed to OS | |
1313 | * | |
c20c4267 | 1314 | * @fw_version: firmware version code |
89a36810 AR |
1315 | * @cfgte: pointer to configuration table entry of the resource |
1316 | * | |
1317 | * Return value: | |
c20c4267 | 1318 | * true if resource can be added to midlayer, false(0) otherwise |
89a36810 | 1319 | */ |
c20c4267 AR |
1320 | static int pmcraid_expose_resource(u16 fw_version, |
1321 | struct pmcraid_config_table_entry *cfgte) | |
89a36810 AR |
1322 | { |
1323 | int retval = 0; | |
1324 | ||
c20c4267 AR |
1325 | if (cfgte->resource_type == RES_TYPE_VSET) { |
1326 | if (fw_version <= PMCRAID_FW_VERSION_1) | |
1327 | retval = ((cfgte->unique_flags1 & 0x80) == 0); | |
1328 | else | |
1329 | retval = ((cfgte->unique_flags0 & 0x80) == 0 && | |
1330 | (cfgte->unique_flags1 & 0x80) == 0); | |
1331 | ||
1332 | } else if (cfgte->resource_type == RES_TYPE_GSCSI) | |
89a36810 AR |
1333 | retval = (RES_BUS(cfgte->resource_address) != |
1334 | PMCRAID_VIRTUAL_ENCL_BUS_ID); | |
1335 | return retval; | |
1336 | } | |
1337 | ||
1338 | /* attributes supported by pmcraid_event_family */ | |
1339 | enum { | |
1340 | PMCRAID_AEN_ATTR_UNSPEC, | |
1341 | PMCRAID_AEN_ATTR_EVENT, | |
1342 | __PMCRAID_AEN_ATTR_MAX, | |
1343 | }; | |
1344 | #define PMCRAID_AEN_ATTR_MAX (__PMCRAID_AEN_ATTR_MAX - 1) | |
1345 | ||
1346 | /* commands supported by pmcraid_event_family */ | |
1347 | enum { | |
1348 | PMCRAID_AEN_CMD_UNSPEC, | |
1349 | PMCRAID_AEN_CMD_EVENT, | |
1350 | __PMCRAID_AEN_CMD_MAX, | |
1351 | }; | |
1352 | #define PMCRAID_AEN_CMD_MAX (__PMCRAID_AEN_CMD_MAX - 1) | |
1353 | ||
5e53e689 JB |
1354 | static struct genl_multicast_group pmcraid_mcgrps[] = { |
1355 | { .name = "events", /* not really used - see ID discussion below */ }, | |
1356 | }; | |
1357 | ||
56989f6d | 1358 | static struct genl_family pmcraid_event_family __ro_after_init = { |
489111e5 | 1359 | .module = THIS_MODULE, |
89a36810 AR |
1360 | .name = "pmcraid", |
1361 | .version = 1, | |
5e53e689 JB |
1362 | .maxattr = PMCRAID_AEN_ATTR_MAX, |
1363 | .mcgrps = pmcraid_mcgrps, | |
1364 | .n_mcgrps = ARRAY_SIZE(pmcraid_mcgrps), | |
89a36810 AR |
1365 | }; |
1366 | ||
1367 | /** | |
1368 | * pmcraid_netlink_init - registers pmcraid_event_family | |
1369 | * | |
1370 | * Return value: | |
c20c4267 AR |
1371 | * 0 if the pmcraid_event_family is successfully registered |
1372 | * with netlink generic, non-zero otherwise | |
89a36810 | 1373 | */ |
56989f6d | 1374 | static int __init pmcraid_netlink_init(void) |
89a36810 AR |
1375 | { |
1376 | int result; | |
1377 | ||
1378 | result = genl_register_family(&pmcraid_event_family); | |
1379 | ||
1380 | if (result) | |
1381 | return result; | |
1382 | ||
1383 | pmcraid_info("registered NETLINK GENERIC group: %d\n", | |
1384 | pmcraid_event_family.id); | |
1385 | ||
1386 | return result; | |
1387 | } | |
1388 | ||
1389 | /** | |
1390 | * pmcraid_netlink_release - unregisters pmcraid_event_family | |
1391 | * | |
1392 | * Return value: | |
c20c4267 | 1393 | * none |
89a36810 AR |
1394 | */ |
1395 | static void pmcraid_netlink_release(void) | |
1396 | { | |
1397 | genl_unregister_family(&pmcraid_event_family); | |
1398 | } | |
1399 | ||
1400 | /** | |
1401 | * pmcraid_notify_aen - sends event msg to user space application | |
1402 | * @pinstance: pointer to adapter instance structure | |
1403 | * @type: HCAM type | |
1404 | * | |
1405 | * Return value: | |
1406 | * 0 if success, error value in case of any failure. | |
1407 | */ | |
c20c4267 AR |
1408 | static int pmcraid_notify_aen( |
1409 | struct pmcraid_instance *pinstance, | |
1410 | struct pmcraid_aen_msg *aen_msg, | |
1411 | u32 data_size | |
1412 | ) | |
89a36810 AR |
1413 | { |
1414 | struct sk_buff *skb; | |
89a36810 | 1415 | void *msg_header; |
c20c4267 | 1416 | u32 total_size, nla_genl_hdr_total_size; |
89a36810 AR |
1417 | int result; |
1418 | ||
89a36810 AR |
1419 | aen_msg->hostno = (pinstance->host->unique_id << 16 | |
1420 | MINOR(pinstance->cdev.dev)); | |
1421 | aen_msg->length = data_size; | |
c20c4267 | 1422 | |
89a36810 AR |
1423 | data_size += sizeof(*aen_msg); |
1424 | ||
1425 | total_size = nla_total_size(data_size); | |
c20c4267 AR |
1426 | /* Add GENL_HDR to total_size */ |
1427 | nla_genl_hdr_total_size = | |
1428 | (total_size + (GENL_HDRLEN + | |
1429 | ((struct genl_family *)&pmcraid_event_family)->hdrsize) | |
1430 | + NLMSG_HDRLEN); | |
1431 | skb = genlmsg_new(nla_genl_hdr_total_size, GFP_ATOMIC); | |
89a36810 AR |
1432 | |
1433 | ||
1434 | if (!skb) { | |
1435 | pmcraid_err("Failed to allocate aen data SKB of size: %x\n", | |
1436 | total_size); | |
1437 | return -ENOMEM; | |
1438 | } | |
1439 | ||
1440 | /* add the genetlink message header */ | |
1441 | msg_header = genlmsg_put(skb, 0, 0, | |
1442 | &pmcraid_event_family, 0, | |
1443 | PMCRAID_AEN_CMD_EVENT); | |
1444 | if (!msg_header) { | |
1445 | pmcraid_err("failed to copy command details\n"); | |
1446 | nlmsg_free(skb); | |
1447 | return -ENOMEM; | |
1448 | } | |
1449 | ||
1450 | result = nla_put(skb, PMCRAID_AEN_ATTR_EVENT, data_size, aen_msg); | |
1451 | ||
1452 | if (result) { | |
c20c4267 | 1453 | pmcraid_err("failed to copy AEN attribute data\n"); |
89a36810 AR |
1454 | nlmsg_free(skb); |
1455 | return -EINVAL; | |
1456 | } | |
1457 | ||
1458 | /* send genetlink multicast message to notify appplications */ | |
053c095a | 1459 | genlmsg_end(skb, msg_header); |
89a36810 | 1460 | |
5e53e689 JB |
1461 | result = genlmsg_multicast(&pmcraid_event_family, skb, |
1462 | 0, 0, GFP_ATOMIC); | |
89a36810 AR |
1463 | |
1464 | /* If there are no listeners, genlmsg_multicast may return non-zero | |
1465 | * value. | |
1466 | */ | |
1467 | if (result) | |
c20c4267 | 1468 | pmcraid_info("error (%x) sending aen event message\n", result); |
89a36810 AR |
1469 | return result; |
1470 | } | |
1471 | ||
c20c4267 AR |
1472 | /** |
1473 | * pmcraid_notify_ccn - notifies about CCN event msg to user space | |
1474 | * @pinstance: pointer adapter instance structure | |
1475 | * | |
1476 | * Return value: | |
1477 | * 0 if success, error value in case of any failure | |
1478 | */ | |
1479 | static int pmcraid_notify_ccn(struct pmcraid_instance *pinstance) | |
1480 | { | |
1481 | return pmcraid_notify_aen(pinstance, | |
1482 | pinstance->ccn.msg, | |
45c80be6 | 1483 | le32_to_cpu(pinstance->ccn.hcam->data_len) + |
c20c4267 AR |
1484 | sizeof(struct pmcraid_hcam_hdr)); |
1485 | } | |
1486 | ||
1487 | /** | |
1488 | * pmcraid_notify_ldn - notifies about CCN event msg to user space | |
1489 | * @pinstance: pointer adapter instance structure | |
1490 | * | |
1491 | * Return value: | |
1492 | * 0 if success, error value in case of any failure | |
1493 | */ | |
1494 | static int pmcraid_notify_ldn(struct pmcraid_instance *pinstance) | |
1495 | { | |
1496 | return pmcraid_notify_aen(pinstance, | |
1497 | pinstance->ldn.msg, | |
45c80be6 | 1498 | le32_to_cpu(pinstance->ldn.hcam->data_len) + |
c20c4267 AR |
1499 | sizeof(struct pmcraid_hcam_hdr)); |
1500 | } | |
1501 | ||
1502 | /** | |
1503 | * pmcraid_notify_ioastate - sends IOA state event msg to user space | |
1504 | * @pinstance: pointer adapter instance structure | |
1505 | * @evt: controller state event to be sent | |
1506 | * | |
1507 | * Return value: | |
1508 | * 0 if success, error value in case of any failure | |
1509 | */ | |
1510 | static void pmcraid_notify_ioastate(struct pmcraid_instance *pinstance, u32 evt) | |
1511 | { | |
1512 | pinstance->scn.ioa_state = evt; | |
1513 | pmcraid_notify_aen(pinstance, | |
1514 | &pinstance->scn.msg, | |
1515 | sizeof(u32)); | |
1516 | } | |
1517 | ||
89a36810 AR |
1518 | /** |
1519 | * pmcraid_handle_config_change - Handle a config change from the adapter | |
1520 | * @pinstance: pointer to per adapter instance structure | |
1521 | * | |
1522 | * Return value: | |
1523 | * none | |
1524 | */ | |
729c8456 | 1525 | |
89a36810 AR |
1526 | static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance) |
1527 | { | |
1528 | struct pmcraid_config_table_entry *cfg_entry; | |
1529 | struct pmcraid_hcam_ccn *ccn_hcam; | |
1530 | struct pmcraid_cmd *cmd; | |
1531 | struct pmcraid_cmd *cfgcmd; | |
1532 | struct pmcraid_resource_entry *res = NULL; | |
89a36810 AR |
1533 | unsigned long lock_flags; |
1534 | unsigned long host_lock_flags; | |
729c8456 AR |
1535 | u32 new_entry = 1; |
1536 | u32 hidden_entry = 0; | |
c20c4267 | 1537 | u16 fw_version; |
89a36810 AR |
1538 | int rc; |
1539 | ||
1540 | ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam; | |
1541 | cfg_entry = &ccn_hcam->cfg_entry; | |
c20c4267 | 1542 | fw_version = be16_to_cpu(pinstance->inq_data->fw_version); |
89a36810 | 1543 | |
592488a3 AR |
1544 | pmcraid_info("CCN(%x): %x timestamp: %llx type: %x lost: %x flags: %x \ |
1545 | res: %x:%x:%x:%x\n", | |
45c80be6 | 1546 | le32_to_cpu(pinstance->ccn.hcam->ilid), |
89a36810 | 1547 | pinstance->ccn.hcam->op_code, |
45c80be6 AB |
1548 | (le32_to_cpu(pinstance->ccn.hcam->timestamp1) | |
1549 | ((le32_to_cpu(pinstance->ccn.hcam->timestamp2) & 0xffffffffLL) << 32)), | |
89a36810 AR |
1550 | pinstance->ccn.hcam->notification_type, |
1551 | pinstance->ccn.hcam->notification_lost, | |
1552 | pinstance->ccn.hcam->flags, | |
1553 | pinstance->host->unique_id, | |
1554 | RES_IS_VSET(*cfg_entry) ? PMCRAID_VSET_BUS_ID : | |
1555 | (RES_IS_GSCSI(*cfg_entry) ? PMCRAID_PHYS_BUS_ID : | |
1556 | RES_BUS(cfg_entry->resource_address)), | |
c20c4267 AR |
1557 | RES_IS_VSET(*cfg_entry) ? |
1558 | (fw_version <= PMCRAID_FW_VERSION_1 ? | |
1559 | cfg_entry->unique_flags1 : | |
45c80be6 | 1560 | le16_to_cpu(cfg_entry->array_id) & 0xFF) : |
89a36810 AR |
1561 | RES_TARGET(cfg_entry->resource_address), |
1562 | RES_LUN(cfg_entry->resource_address)); | |
1563 | ||
1564 | ||
1565 | /* If this HCAM indicates a lost notification, read the config table */ | |
1566 | if (pinstance->ccn.hcam->notification_lost) { | |
1567 | cfgcmd = pmcraid_get_free_cmd(pinstance); | |
1568 | if (cfgcmd) { | |
1569 | pmcraid_info("lost CCN, reading config table\b"); | |
1570 | pinstance->reinit_cfg_table = 1; | |
1571 | pmcraid_querycfg(cfgcmd); | |
1572 | } else { | |
1573 | pmcraid_err("lost CCN, no free cmd for querycfg\n"); | |
1574 | } | |
1575 | goto out_notify_apps; | |
1576 | } | |
1577 | ||
1578 | /* If this resource is not going to be added to mid-layer, just notify | |
729c8456 AR |
1579 | * applications and return. If this notification is about hiding a VSET |
1580 | * resource, check if it was exposed already. | |
89a36810 | 1581 | */ |
729c8456 AR |
1582 | if (pinstance->ccn.hcam->notification_type == |
1583 | NOTIFICATION_TYPE_ENTRY_CHANGED && | |
c20c4267 | 1584 | cfg_entry->resource_type == RES_TYPE_VSET) { |
db269932 | 1585 | hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0; |
c20c4267 | 1586 | } else if (!pmcraid_expose_resource(fw_version, cfg_entry)) { |
89a36810 | 1587 | goto out_notify_apps; |
c20c4267 | 1588 | } |
89a36810 AR |
1589 | |
1590 | spin_lock_irqsave(&pinstance->resource_lock, lock_flags); | |
1591 | list_for_each_entry(res, &pinstance->used_res_q, queue) { | |
1592 | rc = memcmp(&res->cfg_entry.resource_address, | |
1593 | &cfg_entry->resource_address, | |
1594 | sizeof(cfg_entry->resource_address)); | |
1595 | if (!rc) { | |
1596 | new_entry = 0; | |
1597 | break; | |
1598 | } | |
1599 | } | |
1600 | ||
1601 | if (new_entry) { | |
1602 | ||
729c8456 AR |
1603 | if (hidden_entry) { |
1604 | spin_unlock_irqrestore(&pinstance->resource_lock, | |
1605 | lock_flags); | |
1606 | goto out_notify_apps; | |
1607 | } | |
1608 | ||
89a36810 AR |
1609 | /* If there are more number of resources than what driver can |
1610 | * manage, do not notify the applications about the CCN. Just | |
1611 | * ignore this notifications and re-register the same HCAM | |
1612 | */ | |
1613 | if (list_empty(&pinstance->free_res_q)) { | |
1614 | spin_unlock_irqrestore(&pinstance->resource_lock, | |
1615 | lock_flags); | |
1616 | pmcraid_err("too many resources attached\n"); | |
1617 | spin_lock_irqsave(pinstance->host->host_lock, | |
1618 | host_lock_flags); | |
1619 | pmcraid_send_hcam(pinstance, | |
1620 | PMCRAID_HCAM_CODE_CONFIG_CHANGE); | |
1621 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
1622 | host_lock_flags); | |
1623 | return; | |
1624 | } | |
1625 | ||
1626 | res = list_entry(pinstance->free_res_q.next, | |
1627 | struct pmcraid_resource_entry, queue); | |
1628 | ||
1629 | list_del(&res->queue); | |
1630 | res->scsi_dev = NULL; | |
1631 | res->reset_progress = 0; | |
1632 | list_add_tail(&res->queue, &pinstance->used_res_q); | |
1633 | } | |
1634 | ||
c20c4267 | 1635 | memcpy(&res->cfg_entry, cfg_entry, pinstance->config_table_entry_size); |
89a36810 AR |
1636 | |
1637 | if (pinstance->ccn.hcam->notification_type == | |
729c8456 | 1638 | NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) { |
89a36810 | 1639 | if (res->scsi_dev) { |
c20c4267 AR |
1640 | if (fw_version <= PMCRAID_FW_VERSION_1) |
1641 | res->cfg_entry.unique_flags1 &= 0x7F; | |
1642 | else | |
45c80be6 | 1643 | res->cfg_entry.array_id &= cpu_to_le16(0xFF); |
89a36810 AR |
1644 | res->change_detected = RES_CHANGE_DEL; |
1645 | res->cfg_entry.resource_handle = | |
1646 | PMCRAID_INVALID_RES_HANDLE; | |
1647 | schedule_work(&pinstance->worker_q); | |
1648 | } else { | |
1649 | /* This may be one of the non-exposed resources */ | |
1650 | list_move_tail(&res->queue, &pinstance->free_res_q); | |
1651 | } | |
1652 | } else if (!res->scsi_dev) { | |
1653 | res->change_detected = RES_CHANGE_ADD; | |
1654 | schedule_work(&pinstance->worker_q); | |
1655 | } | |
1656 | spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags); | |
1657 | ||
1658 | out_notify_apps: | |
1659 | ||
1660 | /* Notify configuration changes to registered applications.*/ | |
1661 | if (!pmcraid_disable_aen) | |
c20c4267 | 1662 | pmcraid_notify_ccn(pinstance); |
89a36810 AR |
1663 | |
1664 | cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE); | |
1665 | if (cmd) | |
1666 | pmcraid_send_hcam_cmd(cmd); | |
1667 | } | |
1668 | ||
1669 | /** | |
1670 | * pmcraid_get_error_info - return error string for an ioasc | |
1671 | * @ioasc: ioasc code | |
1672 | * Return Value | |
1673 | * none | |
1674 | */ | |
1675 | static struct pmcraid_ioasc_error *pmcraid_get_error_info(u32 ioasc) | |
1676 | { | |
1677 | int i; | |
1678 | for (i = 0; i < ARRAY_SIZE(pmcraid_ioasc_error_table); i++) { | |
1679 | if (pmcraid_ioasc_error_table[i].ioasc_code == ioasc) | |
1680 | return &pmcraid_ioasc_error_table[i]; | |
1681 | } | |
1682 | return NULL; | |
1683 | } | |
1684 | ||
1685 | /** | |
1686 | * pmcraid_ioasc_logger - log IOASC information based user-settings | |
1687 | * @ioasc: ioasc code | |
1688 | * @cmd: pointer to command that resulted in 'ioasc' | |
1689 | */ | |
61b96d5b | 1690 | static void pmcraid_ioasc_logger(u32 ioasc, struct pmcraid_cmd *cmd) |
89a36810 AR |
1691 | { |
1692 | struct pmcraid_ioasc_error *error_info = pmcraid_get_error_info(ioasc); | |
1693 | ||
1694 | if (error_info == NULL || | |
1695 | cmd->drv_inst->current_log_level < error_info->log_level) | |
1696 | return; | |
1697 | ||
1698 | /* log the error string */ | |
c20c4267 | 1699 | pmcraid_err("cmd [%x] for resource %x failed with %x(%s)\n", |
89a36810 | 1700 | cmd->ioa_cb->ioarcb.cdb[0], |
45c80be6 AB |
1701 | le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle), |
1702 | ioasc, error_info->error_string); | |
89a36810 AR |
1703 | } |
1704 | ||
1705 | /** | |
1706 | * pmcraid_handle_error_log - Handle a config change (error log) from the IOA | |
1707 | * | |
1708 | * @pinstance: pointer to per adapter instance structure | |
1709 | * | |
1710 | * Return value: | |
1711 | * none | |
1712 | */ | |
1713 | static void pmcraid_handle_error_log(struct pmcraid_instance *pinstance) | |
1714 | { | |
1715 | struct pmcraid_hcam_ldn *hcam_ldn; | |
1716 | u32 ioasc; | |
1717 | ||
1718 | hcam_ldn = (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam; | |
1719 | ||
1720 | pmcraid_info | |
1721 | ("LDN(%x): %x type: %x lost: %x flags: %x overlay id: %x\n", | |
1722 | pinstance->ldn.hcam->ilid, | |
1723 | pinstance->ldn.hcam->op_code, | |
1724 | pinstance->ldn.hcam->notification_type, | |
1725 | pinstance->ldn.hcam->notification_lost, | |
1726 | pinstance->ldn.hcam->flags, | |
1727 | pinstance->ldn.hcam->overlay_id); | |
1728 | ||
1729 | /* log only the errors, no need to log informational log entries */ | |
1730 | if (pinstance->ldn.hcam->notification_type != | |
1731 | NOTIFICATION_TYPE_ERROR_LOG) | |
1732 | return; | |
1733 | ||
1734 | if (pinstance->ldn.hcam->notification_lost == | |
1735 | HOSTRCB_NOTIFICATIONS_LOST) | |
34876402 | 1736 | dev_info(&pinstance->pdev->dev, "Error notifications lost\n"); |
89a36810 AR |
1737 | |
1738 | ioasc = le32_to_cpu(hcam_ldn->error_log.fd_ioasc); | |
1739 | ||
1740 | if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET || | |
1741 | ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER) { | |
34876402 | 1742 | dev_info(&pinstance->pdev->dev, |
89a36810 AR |
1743 | "UnitAttention due to IOA Bus Reset\n"); |
1744 | scsi_report_bus_reset( | |
1745 | pinstance->host, | |
1746 | RES_BUS(hcam_ldn->error_log.fd_ra)); | |
1747 | } | |
1748 | ||
1749 | return; | |
1750 | } | |
1751 | ||
1752 | /** | |
1753 | * pmcraid_process_ccn - Op done function for a CCN. | |
1754 | * @cmd: pointer to command struct | |
1755 | * | |
1756 | * This function is the op done function for a configuration | |
1757 | * change notification | |
1758 | * | |
1759 | * Return value: | |
1760 | * none | |
1761 | */ | |
1762 | static void pmcraid_process_ccn(struct pmcraid_cmd *cmd) | |
1763 | { | |
1764 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1765 | u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
1766 | unsigned long lock_flags; | |
1767 | ||
1768 | pinstance->ccn.cmd = NULL; | |
1769 | pmcraid_return_cmd(cmd); | |
1770 | ||
1771 | /* If driver initiated IOA reset happened while this hcam was pending | |
1772 | * with IOA, or IOA bringdown sequence is in progress, no need to | |
1773 | * re-register the hcam | |
1774 | */ | |
1775 | if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET || | |
1776 | atomic_read(&pinstance->ccn.ignore) == 1) { | |
1777 | return; | |
1778 | } else if (ioasc) { | |
34876402 | 1779 | dev_info(&pinstance->pdev->dev, |
89a36810 AR |
1780 | "Host RCB (CCN) failed with IOASC: 0x%08X\n", ioasc); |
1781 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
1782 | pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE); | |
1783 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
1784 | } else { | |
1785 | pmcraid_handle_config_change(pinstance); | |
1786 | } | |
1787 | } | |
1788 | ||
1789 | /** | |
1790 | * pmcraid_process_ldn - op done function for an LDN | |
1791 | * @cmd: pointer to command block | |
1792 | * | |
1793 | * Return value | |
1794 | * none | |
1795 | */ | |
1796 | static void pmcraid_initiate_reset(struct pmcraid_instance *); | |
592488a3 | 1797 | static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd); |
89a36810 AR |
1798 | |
1799 | static void pmcraid_process_ldn(struct pmcraid_cmd *cmd) | |
1800 | { | |
1801 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1802 | struct pmcraid_hcam_ldn *ldn_hcam = | |
1803 | (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam; | |
1804 | u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
1805 | u32 fd_ioasc = le32_to_cpu(ldn_hcam->error_log.fd_ioasc); | |
1806 | unsigned long lock_flags; | |
1807 | ||
1808 | /* return the command block back to freepool */ | |
1809 | pinstance->ldn.cmd = NULL; | |
1810 | pmcraid_return_cmd(cmd); | |
1811 | ||
1812 | /* If driver initiated IOA reset happened while this hcam was pending | |
1813 | * with IOA, no need to re-register the hcam as reset engine will do it | |
1814 | * once reset sequence is complete | |
1815 | */ | |
1816 | if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET || | |
1817 | atomic_read(&pinstance->ccn.ignore) == 1) { | |
1818 | return; | |
1819 | } else if (!ioasc) { | |
1820 | pmcraid_handle_error_log(pinstance); | |
1821 | if (fd_ioasc == PMCRAID_IOASC_NR_IOA_RESET_REQUIRED) { | |
1822 | spin_lock_irqsave(pinstance->host->host_lock, | |
1823 | lock_flags); | |
1824 | pmcraid_initiate_reset(pinstance); | |
1825 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
1826 | lock_flags); | |
1827 | return; | |
1828 | } | |
592488a3 AR |
1829 | if (fd_ioasc == PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC) { |
1830 | pinstance->timestamp_error = 1; | |
1831 | pmcraid_set_timestamp(cmd); | |
1832 | } | |
89a36810 | 1833 | } else { |
34876402 | 1834 | dev_info(&pinstance->pdev->dev, |
89a36810 AR |
1835 | "Host RCB(LDN) failed with IOASC: 0x%08X\n", ioasc); |
1836 | } | |
1837 | /* send netlink message for HCAM notification if enabled */ | |
1838 | if (!pmcraid_disable_aen) | |
c20c4267 | 1839 | pmcraid_notify_ldn(pinstance); |
89a36810 AR |
1840 | |
1841 | cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA); | |
1842 | if (cmd) | |
1843 | pmcraid_send_hcam_cmd(cmd); | |
1844 | } | |
1845 | ||
1846 | /** | |
1847 | * pmcraid_register_hcams - register HCAMs for CCN and LDN | |
1848 | * | |
1849 | * @pinstance: pointer per adapter instance structure | |
1850 | * | |
1851 | * Return Value | |
1852 | * none | |
1853 | */ | |
1854 | static void pmcraid_register_hcams(struct pmcraid_instance *pinstance) | |
1855 | { | |
1856 | pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE); | |
1857 | pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA); | |
1858 | } | |
1859 | ||
1860 | /** | |
1861 | * pmcraid_unregister_hcams - cancel HCAMs registered already | |
1862 | * @cmd: pointer to command used as part of reset sequence | |
1863 | */ | |
1864 | static void pmcraid_unregister_hcams(struct pmcraid_cmd *cmd) | |
1865 | { | |
1866 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1867 | ||
1868 | /* During IOA bringdown, HCAM gets fired and tasklet proceeds with | |
1869 | * handling hcam response though it is not necessary. In order to | |
1870 | * prevent this, set 'ignore', so that bring-down sequence doesn't | |
1871 | * re-send any more hcams | |
1872 | */ | |
1873 | atomic_set(&pinstance->ccn.ignore, 1); | |
1874 | atomic_set(&pinstance->ldn.ignore, 1); | |
1875 | ||
1876 | /* If adapter reset was forced as part of runtime reset sequence, | |
c20c4267 AR |
1877 | * start the reset sequence. Reset will be triggered even in case |
1878 | * IOA unit_check. | |
89a36810 | 1879 | */ |
c20c4267 AR |
1880 | if ((pinstance->force_ioa_reset && !pinstance->ioa_bringdown) || |
1881 | pinstance->ioa_unit_check) { | |
89a36810 | 1882 | pinstance->force_ioa_reset = 0; |
c20c4267 | 1883 | pinstance->ioa_unit_check = 0; |
89a36810 AR |
1884 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; |
1885 | pmcraid_reset_alert(cmd); | |
1886 | return; | |
1887 | } | |
1888 | ||
1889 | /* Driver tries to cancel HCAMs by sending ABORT TASK for each HCAM | |
1890 | * one after the other. So CCN cancellation will be triggered by | |
1891 | * pmcraid_cancel_ldn itself. | |
1892 | */ | |
1893 | pmcraid_cancel_ldn(cmd); | |
1894 | } | |
1895 | ||
1896 | /** | |
1897 | * pmcraid_reset_enable_ioa - re-enable IOA after a hard reset | |
1898 | * @pinstance: pointer to adapter instance structure | |
1899 | * Return Value | |
1900 | * 1 if TRANSITION_TO_OPERATIONAL is active, otherwise 0 | |
1901 | */ | |
1902 | static void pmcraid_reinit_buffers(struct pmcraid_instance *); | |
1903 | ||
1904 | static int pmcraid_reset_enable_ioa(struct pmcraid_instance *pinstance) | |
1905 | { | |
1906 | u32 intrs; | |
1907 | ||
1908 | pmcraid_reinit_buffers(pinstance); | |
1909 | intrs = pmcraid_read_interrupts(pinstance); | |
1910 | ||
1911 | pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS); | |
1912 | ||
1913 | if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) { | |
c20c4267 AR |
1914 | if (!pinstance->interrupt_mode) { |
1915 | iowrite32(INTRS_TRANSITION_TO_OPERATIONAL, | |
1916 | pinstance->int_regs. | |
1917 | ioa_host_interrupt_mask_reg); | |
1918 | iowrite32(INTRS_TRANSITION_TO_OPERATIONAL, | |
1919 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
1920 | } | |
89a36810 AR |
1921 | return 1; |
1922 | } else { | |
1923 | return 0; | |
1924 | } | |
1925 | } | |
1926 | ||
1927 | /** | |
1928 | * pmcraid_soft_reset - performs a soft reset and makes IOA become ready | |
1929 | * @cmd : pointer to reset command block | |
1930 | * | |
1931 | * Return Value | |
1932 | * none | |
1933 | */ | |
1934 | static void pmcraid_soft_reset(struct pmcraid_cmd *cmd) | |
1935 | { | |
1936 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
1937 | u32 int_reg; | |
1938 | u32 doorbell; | |
1939 | ||
1940 | /* There will be an interrupt when Transition to Operational bit is | |
1941 | * set so tasklet would execute next reset task. The timeout handler | |
1942 | * would re-initiate a reset | |
1943 | */ | |
1944 | cmd->cmd_done = pmcraid_ioa_reset; | |
89a36810 AR |
1945 | cmd->timer.expires = jiffies + |
1946 | msecs_to_jiffies(PMCRAID_TRANSOP_TIMEOUT); | |
841b86f3 | 1947 | cmd->timer.function = pmcraid_timeout_handler; |
89a36810 AR |
1948 | |
1949 | if (!timer_pending(&cmd->timer)) | |
1950 | add_timer(&cmd->timer); | |
1951 | ||
1952 | /* Enable destructive diagnostics on IOA if it is not yet in | |
1953 | * operational state | |
1954 | */ | |
1955 | doorbell = DOORBELL_RUNTIME_RESET | | |
1956 | DOORBELL_ENABLE_DESTRUCTIVE_DIAGS; | |
1957 | ||
c20c4267 AR |
1958 | /* Since we do RESET_ALERT and Start BIST we have to again write |
1959 | * MSIX Doorbell to indicate the interrupt mode | |
1960 | */ | |
1961 | if (pinstance->interrupt_mode) { | |
1962 | iowrite32(DOORBELL_INTR_MODE_MSIX, | |
1963 | pinstance->int_regs.host_ioa_interrupt_reg); | |
1964 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
1965 | } | |
1966 | ||
89a36810 | 1967 | iowrite32(doorbell, pinstance->int_regs.host_ioa_interrupt_reg); |
c20c4267 | 1968 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg), |
89a36810 | 1969 | int_reg = ioread32(pinstance->int_regs.ioa_host_interrupt_reg); |
c20c4267 | 1970 | |
89a36810 AR |
1971 | pmcraid_info("Waiting for IOA to become operational %x:%x\n", |
1972 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg), | |
1973 | int_reg); | |
1974 | } | |
1975 | ||
1976 | /** | |
1977 | * pmcraid_get_dump - retrieves IOA dump in case of Unit Check interrupt | |
1978 | * | |
1979 | * @pinstance: pointer to adapter instance structure | |
1980 | * | |
1981 | * Return Value | |
1982 | * none | |
1983 | */ | |
1984 | static void pmcraid_get_dump(struct pmcraid_instance *pinstance) | |
1985 | { | |
1986 | pmcraid_info("%s is not yet implemented\n", __func__); | |
1987 | } | |
1988 | ||
1989 | /** | |
1990 | * pmcraid_fail_outstanding_cmds - Fails all outstanding ops. | |
1991 | * @pinstance: pointer to adapter instance structure | |
1992 | * | |
1993 | * This function fails all outstanding ops. If they are submitted to IOA | |
1994 | * already, it sends cancel all messages if IOA is still accepting IOARCBs, | |
1995 | * otherwise just completes the commands and returns the cmd blocks to free | |
1996 | * pool. | |
1997 | * | |
1998 | * Return value: | |
1999 | * none | |
2000 | */ | |
2001 | static void pmcraid_fail_outstanding_cmds(struct pmcraid_instance *pinstance) | |
2002 | { | |
2003 | struct pmcraid_cmd *cmd, *temp; | |
2004 | unsigned long lock_flags; | |
2005 | ||
2006 | /* pending command list is protected by pending_pool_lock. Its | |
2007 | * traversal must be done as within this lock | |
2008 | */ | |
2009 | spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags); | |
2010 | list_for_each_entry_safe(cmd, temp, &pinstance->pending_cmd_pool, | |
2011 | free_list) { | |
2012 | list_del(&cmd->free_list); | |
2013 | spin_unlock_irqrestore(&pinstance->pending_pool_lock, | |
2014 | lock_flags); | |
2015 | cmd->ioa_cb->ioasa.ioasc = | |
2016 | cpu_to_le32(PMCRAID_IOASC_IOA_WAS_RESET); | |
2017 | cmd->ioa_cb->ioasa.ilid = | |
45c80be6 | 2018 | cpu_to_le32(PMCRAID_DRIVER_ILID); |
89a36810 AR |
2019 | |
2020 | /* In case the command timer is still running */ | |
2021 | del_timer(&cmd->timer); | |
2022 | ||
2023 | /* If this is an IO command, complete it by invoking scsi_done | |
2024 | * function. If this is one of the internal commands other | |
2025 | * than pmcraid_ioa_reset and HCAM commands invoke cmd_done to | |
2026 | * complete it | |
2027 | */ | |
2028 | if (cmd->scsi_cmd) { | |
2029 | ||
2030 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
2031 | __le32 resp = cmd->ioa_cb->ioarcb.response_handle; | |
2032 | ||
2033 | scsi_cmd->result |= DID_ERROR << 16; | |
2034 | ||
2035 | scsi_dma_unmap(scsi_cmd); | |
2036 | pmcraid_return_cmd(cmd); | |
2037 | ||
89a36810 AR |
2038 | pmcraid_info("failing(%d) CDB[0] = %x result: %x\n", |
2039 | le32_to_cpu(resp) >> 2, | |
2040 | cmd->ioa_cb->ioarcb.cdb[0], | |
2041 | scsi_cmd->result); | |
2042 | scsi_cmd->scsi_done(scsi_cmd); | |
2043 | } else if (cmd->cmd_done == pmcraid_internal_done || | |
2044 | cmd->cmd_done == pmcraid_erp_done) { | |
2045 | cmd->cmd_done(cmd); | |
c20c4267 AR |
2046 | } else if (cmd->cmd_done != pmcraid_ioa_reset && |
2047 | cmd->cmd_done != pmcraid_ioa_shutdown_done) { | |
89a36810 AR |
2048 | pmcraid_return_cmd(cmd); |
2049 | } | |
2050 | ||
2051 | atomic_dec(&pinstance->outstanding_cmds); | |
2052 | spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags); | |
2053 | } | |
2054 | ||
2055 | spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags); | |
2056 | } | |
2057 | ||
2058 | /** | |
2059 | * pmcraid_ioa_reset - Implementation of IOA reset logic | |
2060 | * | |
2061 | * @cmd: pointer to the cmd block to be used for entire reset process | |
2062 | * | |
2063 | * This function executes most of the steps required for IOA reset. This gets | |
2064 | * called by user threads (modprobe/insmod/rmmod) timer, tasklet and midlayer's | |
25985edc | 2065 | * 'eh_' thread. Access to variables used for controlling the reset sequence is |
89a36810 AR |
2066 | * synchronized using host lock. Various functions called during reset process |
2067 | * would make use of a single command block, pointer to which is also stored in | |
2068 | * adapter instance structure. | |
2069 | * | |
2070 | * Return Value | |
2071 | * None | |
2072 | */ | |
2073 | static void pmcraid_ioa_reset(struct pmcraid_cmd *cmd) | |
2074 | { | |
2075 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
2076 | u8 reset_complete = 0; | |
2077 | ||
2078 | pinstance->ioa_reset_in_progress = 1; | |
2079 | ||
2080 | if (pinstance->reset_cmd != cmd) { | |
2081 | pmcraid_err("reset is called with different command block\n"); | |
2082 | pinstance->reset_cmd = cmd; | |
2083 | } | |
2084 | ||
2085 | pmcraid_info("reset_engine: state = %d, command = %p\n", | |
2086 | pinstance->ioa_state, cmd); | |
2087 | ||
2088 | switch (pinstance->ioa_state) { | |
2089 | ||
2090 | case IOA_STATE_DEAD: | |
2091 | /* If IOA is offline, whatever may be the reset reason, just | |
2092 | * return. callers might be waiting on the reset wait_q, wake | |
2093 | * up them | |
2094 | */ | |
2095 | pmcraid_err("IOA is offline no reset is possible\n"); | |
2096 | reset_complete = 1; | |
2097 | break; | |
2098 | ||
2099 | case IOA_STATE_IN_BRINGDOWN: | |
2100 | /* we enter here, once ioa shutdown command is processed by IOA | |
2101 | * Alert IOA for a possible reset. If reset alert fails, IOA | |
2102 | * goes through hard-reset | |
2103 | */ | |
2104 | pmcraid_disable_interrupts(pinstance, ~0); | |
2105 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; | |
2106 | pmcraid_reset_alert(cmd); | |
2107 | break; | |
2108 | ||
2109 | case IOA_STATE_UNKNOWN: | |
2110 | /* We may be called during probe or resume. Some pre-processing | |
2111 | * is required for prior to reset | |
2112 | */ | |
2113 | scsi_block_requests(pinstance->host); | |
2114 | ||
2115 | /* If asked to reset while IOA was processing responses or | |
2116 | * there are any error responses then IOA may require | |
2117 | * hard-reset. | |
2118 | */ | |
2119 | if (pinstance->ioa_hard_reset == 0) { | |
2120 | if (ioread32(pinstance->ioa_status) & | |
2121 | INTRS_TRANSITION_TO_OPERATIONAL) { | |
2122 | pmcraid_info("sticky bit set, bring-up\n"); | |
2123 | pinstance->ioa_state = IOA_STATE_IN_BRINGUP; | |
2124 | pmcraid_reinit_cmdblk(cmd); | |
2125 | pmcraid_identify_hrrq(cmd); | |
2126 | } else { | |
2127 | pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET; | |
2128 | pmcraid_soft_reset(cmd); | |
2129 | } | |
2130 | } else { | |
2131 | /* Alert IOA of a possible reset and wait for critical | |
2132 | * operation in progress bit to reset | |
2133 | */ | |
2134 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; | |
2135 | pmcraid_reset_alert(cmd); | |
2136 | } | |
2137 | break; | |
2138 | ||
2139 | case IOA_STATE_IN_RESET_ALERT: | |
2140 | /* If critical operation in progress bit is reset or wait gets | |
2141 | * timed out, reset proceeds with starting BIST on the IOA. | |
2142 | * pmcraid_ioa_hard_reset keeps a count of reset attempts. If | |
2143 | * they are 3 or more, reset engine marks IOA dead and returns | |
2144 | */ | |
2145 | pinstance->ioa_state = IOA_STATE_IN_HARD_RESET; | |
2146 | pmcraid_start_bist(cmd); | |
2147 | break; | |
2148 | ||
2149 | case IOA_STATE_IN_HARD_RESET: | |
2150 | pinstance->ioa_reset_attempts++; | |
2151 | ||
2152 | /* retry reset if we haven't reached maximum allowed limit */ | |
2153 | if (pinstance->ioa_reset_attempts > PMCRAID_RESET_ATTEMPTS) { | |
2154 | pinstance->ioa_reset_attempts = 0; | |
2155 | pmcraid_err("IOA didn't respond marking it as dead\n"); | |
2156 | pinstance->ioa_state = IOA_STATE_DEAD; | |
c20c4267 AR |
2157 | |
2158 | if (pinstance->ioa_bringdown) | |
2159 | pmcraid_notify_ioastate(pinstance, | |
2160 | PMC_DEVICE_EVENT_SHUTDOWN_FAILED); | |
2161 | else | |
2162 | pmcraid_notify_ioastate(pinstance, | |
2163 | PMC_DEVICE_EVENT_RESET_FAILED); | |
89a36810 AR |
2164 | reset_complete = 1; |
2165 | break; | |
2166 | } | |
2167 | ||
2168 | /* Once either bist or pci reset is done, restore PCI config | |
2169 | * space. If this fails, proceed with hard reset again | |
2170 | */ | |
1d3c16a8 | 2171 | pci_restore_state(pinstance->pdev); |
89a36810 AR |
2172 | |
2173 | /* fail all pending commands */ | |
2174 | pmcraid_fail_outstanding_cmds(pinstance); | |
2175 | ||
2176 | /* check if unit check is active, if so extract dump */ | |
2177 | if (pinstance->ioa_unit_check) { | |
2178 | pmcraid_info("unit check is active\n"); | |
2179 | pinstance->ioa_unit_check = 0; | |
2180 | pmcraid_get_dump(pinstance); | |
2181 | pinstance->ioa_reset_attempts--; | |
2182 | pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; | |
2183 | pmcraid_reset_alert(cmd); | |
2184 | break; | |
2185 | } | |
2186 | ||
2187 | /* if the reset reason is to bring-down the ioa, we might be | |
2188 | * done with the reset restore pci_config_space and complete | |
2189 | * the reset | |
2190 | */ | |
2191 | if (pinstance->ioa_bringdown) { | |
2192 | pmcraid_info("bringing down the adapter\n"); | |
2193 | pinstance->ioa_shutdown_type = SHUTDOWN_NONE; | |
2194 | pinstance->ioa_bringdown = 0; | |
2195 | pinstance->ioa_state = IOA_STATE_UNKNOWN; | |
c20c4267 AR |
2196 | pmcraid_notify_ioastate(pinstance, |
2197 | PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS); | |
89a36810 AR |
2198 | reset_complete = 1; |
2199 | } else { | |
2200 | /* bring-up IOA, so proceed with soft reset | |
2201 | * Reinitialize hrrq_buffers and their indices also | |
2202 | * enable interrupts after a pci_restore_state | |
2203 | */ | |
2204 | if (pmcraid_reset_enable_ioa(pinstance)) { | |
2205 | pinstance->ioa_state = IOA_STATE_IN_BRINGUP; | |
2206 | pmcraid_info("bringing up the adapter\n"); | |
2207 | pmcraid_reinit_cmdblk(cmd); | |
2208 | pmcraid_identify_hrrq(cmd); | |
2209 | } else { | |
2210 | pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET; | |
2211 | pmcraid_soft_reset(cmd); | |
2212 | } | |
2213 | } | |
2214 | break; | |
2215 | ||
2216 | case IOA_STATE_IN_SOFT_RESET: | |
2217 | /* TRANSITION TO OPERATIONAL is on so start initialization | |
2218 | * sequence | |
2219 | */ | |
2220 | pmcraid_info("In softreset proceeding with bring-up\n"); | |
2221 | pinstance->ioa_state = IOA_STATE_IN_BRINGUP; | |
2222 | ||
2223 | /* Initialization commands start with HRRQ identification. From | |
2224 | * now on tasklet completes most of the commands as IOA is up | |
2225 | * and intrs are enabled | |
2226 | */ | |
2227 | pmcraid_identify_hrrq(cmd); | |
2228 | break; | |
2229 | ||
2230 | case IOA_STATE_IN_BRINGUP: | |
2231 | /* we are done with bringing up of IOA, change the ioa_state to | |
2232 | * operational and wake up any waiters | |
2233 | */ | |
2234 | pinstance->ioa_state = IOA_STATE_OPERATIONAL; | |
2235 | reset_complete = 1; | |
2236 | break; | |
2237 | ||
2238 | case IOA_STATE_OPERATIONAL: | |
2239 | default: | |
2240 | /* When IOA is operational and a reset is requested, check for | |
2241 | * the reset reason. If reset is to bring down IOA, unregister | |
2242 | * HCAMs and initiate shutdown; if adapter reset is forced then | |
2243 | * restart reset sequence again | |
2244 | */ | |
2245 | if (pinstance->ioa_shutdown_type == SHUTDOWN_NONE && | |
2246 | pinstance->force_ioa_reset == 0) { | |
c20c4267 AR |
2247 | pmcraid_notify_ioastate(pinstance, |
2248 | PMC_DEVICE_EVENT_RESET_SUCCESS); | |
89a36810 AR |
2249 | reset_complete = 1; |
2250 | } else { | |
2251 | if (pinstance->ioa_shutdown_type != SHUTDOWN_NONE) | |
2252 | pinstance->ioa_state = IOA_STATE_IN_BRINGDOWN; | |
2253 | pmcraid_reinit_cmdblk(cmd); | |
2254 | pmcraid_unregister_hcams(cmd); | |
2255 | } | |
2256 | break; | |
2257 | } | |
2258 | ||
2259 | /* reset will be completed if ioa_state is either DEAD or UNKNOWN or | |
2260 | * OPERATIONAL. Reset all control variables used during reset, wake up | |
2261 | * any waiting threads and let the SCSI mid-layer send commands. Note | |
2262 | * that host_lock must be held before invoking scsi_report_bus_reset. | |
2263 | */ | |
2264 | if (reset_complete) { | |
2265 | pinstance->ioa_reset_in_progress = 0; | |
2266 | pinstance->ioa_reset_attempts = 0; | |
2267 | pinstance->reset_cmd = NULL; | |
2268 | pinstance->ioa_shutdown_type = SHUTDOWN_NONE; | |
2269 | pinstance->ioa_bringdown = 0; | |
2270 | pmcraid_return_cmd(cmd); | |
2271 | ||
2272 | /* If target state is to bring up the adapter, proceed with | |
2273 | * hcam registration and resource exposure to mid-layer. | |
2274 | */ | |
2275 | if (pinstance->ioa_state == IOA_STATE_OPERATIONAL) | |
2276 | pmcraid_register_hcams(pinstance); | |
2277 | ||
2278 | wake_up_all(&pinstance->reset_wait_q); | |
2279 | } | |
2280 | ||
2281 | return; | |
2282 | } | |
2283 | ||
2284 | /** | |
2285 | * pmcraid_initiate_reset - initiates reset sequence. This is called from | |
2286 | * ISR/tasklet during error interrupts including IOA unit check. If reset | |
2287 | * is already in progress, it just returns, otherwise initiates IOA reset | |
2288 | * to bring IOA up to operational state. | |
2289 | * | |
2290 | * @pinstance: pointer to adapter instance structure | |
2291 | * | |
2292 | * Return value | |
2293 | * none | |
2294 | */ | |
2295 | static void pmcraid_initiate_reset(struct pmcraid_instance *pinstance) | |
2296 | { | |
2297 | struct pmcraid_cmd *cmd; | |
2298 | ||
2299 | /* If the reset is already in progress, just return, otherwise start | |
2300 | * reset sequence and return | |
2301 | */ | |
2302 | if (!pinstance->ioa_reset_in_progress) { | |
2303 | scsi_block_requests(pinstance->host); | |
2304 | cmd = pmcraid_get_free_cmd(pinstance); | |
2305 | ||
2306 | if (cmd == NULL) { | |
2307 | pmcraid_err("no cmnd blocks for initiate_reset\n"); | |
2308 | return; | |
2309 | } | |
2310 | ||
2311 | pinstance->ioa_shutdown_type = SHUTDOWN_NONE; | |
2312 | pinstance->reset_cmd = cmd; | |
2313 | pinstance->force_ioa_reset = 1; | |
c20c4267 AR |
2314 | pmcraid_notify_ioastate(pinstance, |
2315 | PMC_DEVICE_EVENT_RESET_START); | |
89a36810 AR |
2316 | pmcraid_ioa_reset(cmd); |
2317 | } | |
2318 | } | |
2319 | ||
2320 | /** | |
2321 | * pmcraid_reset_reload - utility routine for doing IOA reset either to bringup | |
2322 | * or bringdown IOA | |
2323 | * @pinstance: pointer adapter instance structure | |
2324 | * @shutdown_type: shutdown type to be used NONE, NORMAL or ABRREV | |
2325 | * @target_state: expected target state after reset | |
2326 | * | |
2327 | * Note: This command initiates reset and waits for its completion. Hence this | |
2328 | * should not be called from isr/timer/tasklet functions (timeout handlers, | |
2329 | * error response handlers and interrupt handlers). | |
2330 | * | |
2331 | * Return Value | |
2332 | * 1 in case ioa_state is not target_state, 0 otherwise. | |
2333 | */ | |
2334 | static int pmcraid_reset_reload( | |
2335 | struct pmcraid_instance *pinstance, | |
2336 | u8 shutdown_type, | |
2337 | u8 target_state | |
2338 | ) | |
2339 | { | |
2340 | struct pmcraid_cmd *reset_cmd = NULL; | |
2341 | unsigned long lock_flags; | |
2342 | int reset = 1; | |
2343 | ||
2344 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
2345 | ||
2346 | if (pinstance->ioa_reset_in_progress) { | |
2347 | pmcraid_info("reset_reload: reset is already in progress\n"); | |
2348 | ||
2349 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
2350 | ||
2351 | wait_event(pinstance->reset_wait_q, | |
2352 | !pinstance->ioa_reset_in_progress); | |
2353 | ||
2354 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
2355 | ||
2356 | if (pinstance->ioa_state == IOA_STATE_DEAD) { | |
89a36810 | 2357 | pmcraid_info("reset_reload: IOA is dead\n"); |
91402608 CH |
2358 | goto out_unlock; |
2359 | } | |
2360 | ||
2361 | if (pinstance->ioa_state == target_state) { | |
89a36810 | 2362 | reset = 0; |
91402608 | 2363 | goto out_unlock; |
89a36810 AR |
2364 | } |
2365 | } | |
2366 | ||
91402608 CH |
2367 | pmcraid_info("reset_reload: proceeding with reset\n"); |
2368 | scsi_block_requests(pinstance->host); | |
2369 | reset_cmd = pmcraid_get_free_cmd(pinstance); | |
2370 | if (reset_cmd == NULL) { | |
2371 | pmcraid_err("no free cmnd for reset_reload\n"); | |
2372 | goto out_unlock; | |
2373 | } | |
89a36810 | 2374 | |
91402608 CH |
2375 | if (shutdown_type == SHUTDOWN_NORMAL) |
2376 | pinstance->ioa_bringdown = 1; | |
89a36810 | 2377 | |
91402608 CH |
2378 | pinstance->ioa_shutdown_type = shutdown_type; |
2379 | pinstance->reset_cmd = reset_cmd; | |
2380 | pinstance->force_ioa_reset = reset; | |
2381 | pmcraid_info("reset_reload: initiating reset\n"); | |
2382 | pmcraid_ioa_reset(reset_cmd); | |
2383 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
2384 | pmcraid_info("reset_reload: waiting for reset to complete\n"); | |
2385 | wait_event(pinstance->reset_wait_q, | |
2386 | !pinstance->ioa_reset_in_progress); | |
89a36810 | 2387 | |
91402608 CH |
2388 | pmcraid_info("reset_reload: reset is complete !!\n"); |
2389 | scsi_unblock_requests(pinstance->host); | |
2390 | return pinstance->ioa_state != target_state; | |
89a36810 | 2391 | |
91402608 CH |
2392 | out_unlock: |
2393 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
89a36810 AR |
2394 | return reset; |
2395 | } | |
2396 | ||
2397 | /** | |
2398 | * pmcraid_reset_bringdown - wrapper over pmcraid_reset_reload to bringdown IOA | |
2399 | * | |
2400 | * @pinstance: pointer to adapter instance structure | |
2401 | * | |
2402 | * Return Value | |
2403 | * whatever is returned from pmcraid_reset_reload | |
2404 | */ | |
2405 | static int pmcraid_reset_bringdown(struct pmcraid_instance *pinstance) | |
2406 | { | |
2407 | return pmcraid_reset_reload(pinstance, | |
2408 | SHUTDOWN_NORMAL, | |
2409 | IOA_STATE_UNKNOWN); | |
2410 | } | |
2411 | ||
2412 | /** | |
2413 | * pmcraid_reset_bringup - wrapper over pmcraid_reset_reload to bring up IOA | |
2414 | * | |
2415 | * @pinstance: pointer to adapter instance structure | |
2416 | * | |
2417 | * Return Value | |
2418 | * whatever is returned from pmcraid_reset_reload | |
2419 | */ | |
2420 | static int pmcraid_reset_bringup(struct pmcraid_instance *pinstance) | |
2421 | { | |
c20c4267 AR |
2422 | pmcraid_notify_ioastate(pinstance, PMC_DEVICE_EVENT_RESET_START); |
2423 | ||
89a36810 AR |
2424 | return pmcraid_reset_reload(pinstance, |
2425 | SHUTDOWN_NONE, | |
2426 | IOA_STATE_OPERATIONAL); | |
2427 | } | |
2428 | ||
2429 | /** | |
2430 | * pmcraid_request_sense - Send request sense to a device | |
2431 | * @cmd: pmcraid command struct | |
2432 | * | |
2433 | * This function sends a request sense to a device as a result of a check | |
2434 | * condition. This method re-uses the same command block that failed earlier. | |
2435 | */ | |
2436 | static void pmcraid_request_sense(struct pmcraid_cmd *cmd) | |
2437 | { | |
2438 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
2439 | struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl; | |
a9b9e3ad | 2440 | struct device *dev = &cmd->drv_inst->pdev->dev; |
89a36810 | 2441 | |
a9b9e3ad CH |
2442 | cmd->sense_buffer = cmd->scsi_cmd->sense_buffer; |
2443 | cmd->sense_buffer_dma = dma_map_single(dev, cmd->sense_buffer, | |
2444 | SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE); | |
2445 | if (dma_mapping_error(dev, cmd->sense_buffer_dma)) { | |
89a36810 AR |
2446 | pmcraid_err |
2447 | ("couldn't allocate sense buffer for request sense\n"); | |
2448 | pmcraid_erp_done(cmd); | |
2449 | return; | |
2450 | } | |
2451 | ||
2452 | /* re-use the command block */ | |
2453 | memset(&cmd->ioa_cb->ioasa, 0, sizeof(struct pmcraid_ioasa)); | |
2454 | memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN); | |
2455 | ioarcb->request_flags0 = (SYNC_COMPLETE | | |
2456 | NO_LINK_DESCS | | |
2457 | INHIBIT_UL_CHECK); | |
2458 | ioarcb->request_type = REQ_TYPE_SCSI; | |
2459 | ioarcb->cdb[0] = REQUEST_SENSE; | |
2460 | ioarcb->cdb[4] = SCSI_SENSE_BUFFERSIZE; | |
2461 | ||
2462 | ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
2463 | offsetof(struct pmcraid_ioarcb, | |
2464 | add_data.u.ioadl[0])); | |
2465 | ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); | |
2466 | ||
2467 | ioarcb->data_transfer_length = cpu_to_le32(SCSI_SENSE_BUFFERSIZE); | |
2468 | ||
2469 | ioadl->address = cpu_to_le64(cmd->sense_buffer_dma); | |
2470 | ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE); | |
88197966 | 2471 | ioadl->flags = IOADL_FLAGS_LAST_DESC; |
89a36810 AR |
2472 | |
2473 | /* request sense might be called as part of error response processing | |
2474 | * which runs in tasklets context. It is possible that mid-layer might | |
2475 | * schedule queuecommand during this time, hence, writting to IOARRIN | |
2476 | * must be protect by host_lock | |
2477 | */ | |
2478 | pmcraid_send_cmd(cmd, pmcraid_erp_done, | |
2479 | PMCRAID_REQUEST_SENSE_TIMEOUT, | |
2480 | pmcraid_timeout_handler); | |
2481 | } | |
2482 | ||
2483 | /** | |
2484 | * pmcraid_cancel_all - cancel all outstanding IOARCBs as part of error recovery | |
2485 | * @cmd: command that failed | |
203654b4 | 2486 | * @need_sense: true if request_sense is required after cancel all |
89a36810 AR |
2487 | * |
2488 | * This function sends a cancel all to a device to clear the queue. | |
2489 | */ | |
203654b4 | 2490 | static void pmcraid_cancel_all(struct pmcraid_cmd *cmd, bool need_sense) |
89a36810 AR |
2491 | { |
2492 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
2493 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
2494 | struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata; | |
89a36810 AR |
2495 | |
2496 | memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN); | |
2497 | ioarcb->request_flags0 = SYNC_OVERRIDE; | |
2498 | ioarcb->request_type = REQ_TYPE_IOACMD; | |
2499 | ioarcb->cdb[0] = PMCRAID_CANCEL_ALL_REQUESTS; | |
2500 | ||
2501 | if (RES_IS_GSCSI(res->cfg_entry)) | |
2502 | ioarcb->cdb[1] = PMCRAID_SYNC_COMPLETE_AFTER_CANCEL; | |
2503 | ||
2504 | ioarcb->ioadl_bus_addr = 0; | |
2505 | ioarcb->ioadl_length = 0; | |
2506 | ioarcb->data_transfer_length = 0; | |
45c80be6 | 2507 | ioarcb->ioarcb_bus_addr &= cpu_to_le64((~0x1FULL)); |
89a36810 AR |
2508 | |
2509 | /* writing to IOARRIN must be protected by host_lock, as mid-layer | |
2510 | * schedule queuecommand while we are doing this | |
2511 | */ | |
203654b4 CH |
2512 | pmcraid_send_cmd(cmd, need_sense ? |
2513 | pmcraid_erp_done : pmcraid_request_sense, | |
89a36810 AR |
2514 | PMCRAID_REQUEST_SENSE_TIMEOUT, |
2515 | pmcraid_timeout_handler); | |
2516 | } | |
2517 | ||
2518 | /** | |
2519 | * pmcraid_frame_auto_sense: frame fixed format sense information | |
2520 | * | |
2521 | * @cmd: pointer to failing command block | |
2522 | * | |
2523 | * Return value | |
2524 | * none | |
2525 | */ | |
2526 | static void pmcraid_frame_auto_sense(struct pmcraid_cmd *cmd) | |
2527 | { | |
2528 | u8 *sense_buf = cmd->scsi_cmd->sense_buffer; | |
2529 | struct pmcraid_resource_entry *res = cmd->scsi_cmd->device->hostdata; | |
2530 | struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa; | |
2531 | u32 ioasc = le32_to_cpu(ioasa->ioasc); | |
2532 | u32 failing_lba = 0; | |
2533 | ||
2534 | memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE); | |
2535 | cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION; | |
2536 | ||
2537 | if (RES_IS_VSET(res->cfg_entry) && | |
2538 | ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC && | |
2539 | ioasa->u.vset.failing_lba_hi != 0) { | |
2540 | ||
2541 | sense_buf[0] = 0x72; | |
2542 | sense_buf[1] = PMCRAID_IOASC_SENSE_KEY(ioasc); | |
2543 | sense_buf[2] = PMCRAID_IOASC_SENSE_CODE(ioasc); | |
2544 | sense_buf[3] = PMCRAID_IOASC_SENSE_QUAL(ioasc); | |
2545 | ||
2546 | sense_buf[7] = 12; | |
2547 | sense_buf[8] = 0; | |
2548 | sense_buf[9] = 0x0A; | |
2549 | sense_buf[10] = 0x80; | |
2550 | ||
2551 | failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_hi); | |
2552 | ||
2553 | sense_buf[12] = (failing_lba & 0xff000000) >> 24; | |
2554 | sense_buf[13] = (failing_lba & 0x00ff0000) >> 16; | |
2555 | sense_buf[14] = (failing_lba & 0x0000ff00) >> 8; | |
2556 | sense_buf[15] = failing_lba & 0x000000ff; | |
2557 | ||
2558 | failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_lo); | |
2559 | ||
2560 | sense_buf[16] = (failing_lba & 0xff000000) >> 24; | |
2561 | sense_buf[17] = (failing_lba & 0x00ff0000) >> 16; | |
2562 | sense_buf[18] = (failing_lba & 0x0000ff00) >> 8; | |
2563 | sense_buf[19] = failing_lba & 0x000000ff; | |
2564 | } else { | |
2565 | sense_buf[0] = 0x70; | |
2566 | sense_buf[2] = PMCRAID_IOASC_SENSE_KEY(ioasc); | |
2567 | sense_buf[12] = PMCRAID_IOASC_SENSE_CODE(ioasc); | |
2568 | sense_buf[13] = PMCRAID_IOASC_SENSE_QUAL(ioasc); | |
2569 | ||
2570 | if (ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC) { | |
2571 | if (RES_IS_VSET(res->cfg_entry)) | |
2572 | failing_lba = | |
2573 | le32_to_cpu(ioasa->u. | |
2574 | vset.failing_lba_lo); | |
2575 | sense_buf[0] |= 0x80; | |
2576 | sense_buf[3] = (failing_lba >> 24) & 0xff; | |
2577 | sense_buf[4] = (failing_lba >> 16) & 0xff; | |
2578 | sense_buf[5] = (failing_lba >> 8) & 0xff; | |
2579 | sense_buf[6] = failing_lba & 0xff; | |
2580 | } | |
2581 | ||
2582 | sense_buf[7] = 6; /* additional length */ | |
2583 | } | |
2584 | } | |
2585 | ||
2586 | /** | |
2587 | * pmcraid_error_handler - Error response handlers for a SCSI op | |
2588 | * @cmd: pointer to pmcraid_cmd that has failed | |
2589 | * | |
2590 | * This function determines whether or not to initiate ERP on the affected | |
2591 | * device. This is called from a tasklet, which doesn't hold any locks. | |
2592 | * | |
2593 | * Return value: | |
2594 | * 0 it caller can complete the request, otherwise 1 where in error | |
2595 | * handler itself completes the request and returns the command block | |
2596 | * back to free-pool | |
2597 | */ | |
2598 | static int pmcraid_error_handler(struct pmcraid_cmd *cmd) | |
2599 | { | |
2600 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
2601 | struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata; | |
2602 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
2603 | struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa; | |
2604 | u32 ioasc = le32_to_cpu(ioasa->ioasc); | |
2605 | u32 masked_ioasc = ioasc & PMCRAID_IOASC_SENSE_MASK; | |
203654b4 | 2606 | bool sense_copied = false; |
89a36810 AR |
2607 | |
2608 | if (!res) { | |
2609 | pmcraid_info("resource pointer is NULL\n"); | |
2610 | return 0; | |
2611 | } | |
2612 | ||
2613 | /* If this was a SCSI read/write command keep count of errors */ | |
2614 | if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_READ_CMD) | |
2615 | atomic_inc(&res->read_failures); | |
2616 | else if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_WRITE_CMD) | |
2617 | atomic_inc(&res->write_failures); | |
2618 | ||
2619 | if (!RES_IS_GSCSI(res->cfg_entry) && | |
2620 | masked_ioasc != PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR) { | |
2621 | pmcraid_frame_auto_sense(cmd); | |
2622 | } | |
2623 | ||
2624 | /* Log IOASC/IOASA information based on user settings */ | |
2625 | pmcraid_ioasc_logger(ioasc, cmd); | |
2626 | ||
2627 | switch (masked_ioasc) { | |
2628 | ||
2629 | case PMCRAID_IOASC_AC_TERMINATED_BY_HOST: | |
2630 | scsi_cmd->result |= (DID_ABORT << 16); | |
2631 | break; | |
2632 | ||
2633 | case PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE: | |
2634 | case PMCRAID_IOASC_HW_CANNOT_COMMUNICATE: | |
2635 | scsi_cmd->result |= (DID_NO_CONNECT << 16); | |
2636 | break; | |
2637 | ||
2638 | case PMCRAID_IOASC_NR_SYNC_REQUIRED: | |
2639 | res->sync_reqd = 1; | |
2640 | scsi_cmd->result |= (DID_IMM_RETRY << 16); | |
2641 | break; | |
2642 | ||
2643 | case PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC: | |
2644 | scsi_cmd->result |= (DID_PASSTHROUGH << 16); | |
2645 | break; | |
2646 | ||
2647 | case PMCRAID_IOASC_UA_BUS_WAS_RESET: | |
2648 | case PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER: | |
2649 | if (!res->reset_progress) | |
2650 | scsi_report_bus_reset(pinstance->host, | |
2651 | scsi_cmd->device->channel); | |
2652 | scsi_cmd->result |= (DID_ERROR << 16); | |
2653 | break; | |
2654 | ||
2655 | case PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR: | |
2656 | scsi_cmd->result |= PMCRAID_IOASC_SENSE_STATUS(ioasc); | |
2657 | res->sync_reqd = 1; | |
2658 | ||
2659 | /* if check_condition is not active return with error otherwise | |
2660 | * get/frame the sense buffer | |
2661 | */ | |
2662 | if (PMCRAID_IOASC_SENSE_STATUS(ioasc) != | |
2663 | SAM_STAT_CHECK_CONDITION && | |
2664 | PMCRAID_IOASC_SENSE_STATUS(ioasc) != SAM_STAT_ACA_ACTIVE) | |
2665 | return 0; | |
2666 | ||
2667 | /* If we have auto sense data as part of IOASA pass it to | |
2668 | * mid-layer | |
2669 | */ | |
2670 | if (ioasa->auto_sense_length != 0) { | |
45c80be6 AB |
2671 | short sense_len = le16_to_cpu(ioasa->auto_sense_length); |
2672 | int data_size = min_t(u16, sense_len, | |
89a36810 AR |
2673 | SCSI_SENSE_BUFFERSIZE); |
2674 | ||
2675 | memcpy(scsi_cmd->sense_buffer, | |
2676 | ioasa->sense_data, | |
2677 | data_size); | |
203654b4 | 2678 | sense_copied = true; |
89a36810 AR |
2679 | } |
2680 | ||
a70757ba | 2681 | if (RES_IS_GSCSI(res->cfg_entry)) |
89a36810 | 2682 | pmcraid_cancel_all(cmd, sense_copied); |
a70757ba | 2683 | else if (sense_copied) |
89a36810 | 2684 | pmcraid_erp_done(cmd); |
a70757ba | 2685 | else |
89a36810 | 2686 | pmcraid_request_sense(cmd); |
89a36810 AR |
2687 | |
2688 | return 1; | |
2689 | ||
2690 | case PMCRAID_IOASC_NR_INIT_CMD_REQUIRED: | |
2691 | break; | |
2692 | ||
2693 | default: | |
2694 | if (PMCRAID_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR) | |
2695 | scsi_cmd->result |= (DID_ERROR << 16); | |
2696 | break; | |
2697 | } | |
2698 | return 0; | |
2699 | } | |
2700 | ||
2701 | /** | |
2702 | * pmcraid_reset_device - device reset handler functions | |
2703 | * | |
2704 | * @scsi_cmd: scsi command struct | |
2705 | * @modifier: reset modifier indicating the reset sequence to be performed | |
2706 | * | |
2707 | * This function issues a device reset to the affected device. | |
2708 | * A LUN reset will be sent to the device first. If that does | |
2709 | * not work, a target reset will be sent. | |
2710 | * | |
2711 | * Return value: | |
2712 | * SUCCESS / FAILED | |
2713 | */ | |
2714 | static int pmcraid_reset_device( | |
2715 | struct scsi_cmnd *scsi_cmd, | |
2716 | unsigned long timeout, | |
2717 | u8 modifier | |
2718 | ) | |
2719 | { | |
2720 | struct pmcraid_cmd *cmd; | |
2721 | struct pmcraid_instance *pinstance; | |
2722 | struct pmcraid_resource_entry *res; | |
2723 | struct pmcraid_ioarcb *ioarcb; | |
2724 | unsigned long lock_flags; | |
2725 | u32 ioasc; | |
2726 | ||
2727 | pinstance = | |
2728 | (struct pmcraid_instance *)scsi_cmd->device->host->hostdata; | |
2729 | res = scsi_cmd->device->hostdata; | |
2730 | ||
2731 | if (!res) { | |
34876402 AR |
2732 | sdev_printk(KERN_ERR, scsi_cmd->device, |
2733 | "reset_device: NULL resource pointer\n"); | |
89a36810 AR |
2734 | return FAILED; |
2735 | } | |
2736 | ||
2737 | /* If adapter is currently going through reset/reload, return failed. | |
2738 | * This will force the mid-layer to call _eh_bus/host reset, which | |
2739 | * will then go to sleep and wait for the reset to complete | |
2740 | */ | |
2741 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
2742 | if (pinstance->ioa_reset_in_progress || | |
2743 | pinstance->ioa_state == IOA_STATE_DEAD) { | |
2744 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
2745 | return FAILED; | |
2746 | } | |
2747 | ||
2748 | res->reset_progress = 1; | |
2749 | pmcraid_info("Resetting %s resource with addr %x\n", | |
2750 | ((modifier & RESET_DEVICE_LUN) ? "LUN" : | |
2751 | ((modifier & RESET_DEVICE_TARGET) ? "TARGET" : "BUS")), | |
2752 | le32_to_cpu(res->cfg_entry.resource_address)); | |
2753 | ||
2754 | /* get a free cmd block */ | |
2755 | cmd = pmcraid_get_free_cmd(pinstance); | |
2756 | ||
2757 | if (cmd == NULL) { | |
2758 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
2759 | pmcraid_err("%s: no cmd blocks are available\n", __func__); | |
2760 | return FAILED; | |
2761 | } | |
2762 | ||
2763 | ioarcb = &cmd->ioa_cb->ioarcb; | |
2764 | ioarcb->resource_handle = res->cfg_entry.resource_handle; | |
2765 | ioarcb->request_type = REQ_TYPE_IOACMD; | |
2766 | ioarcb->cdb[0] = PMCRAID_RESET_DEVICE; | |
2767 | ||
2768 | /* Initialize reset modifier bits */ | |
2769 | if (modifier) | |
2770 | modifier = ENABLE_RESET_MODIFIER | modifier; | |
2771 | ||
2772 | ioarcb->cdb[1] = modifier; | |
2773 | ||
2774 | init_completion(&cmd->wait_for_completion); | |
2775 | cmd->completion_req = 1; | |
2776 | ||
2777 | pmcraid_info("cmd(CDB[0] = %x) for %x with index = %d\n", | |
2778 | cmd->ioa_cb->ioarcb.cdb[0], | |
2779 | le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle), | |
2780 | le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2); | |
2781 | ||
2782 | pmcraid_send_cmd(cmd, | |
2783 | pmcraid_internal_done, | |
2784 | timeout, | |
2785 | pmcraid_timeout_handler); | |
2786 | ||
2787 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
2788 | ||
2789 | /* RESET_DEVICE command completes after all pending IOARCBs are | |
2790 | * completed. Once this command is completed, pmcraind_internal_done | |
2791 | * will wake up the 'completion' queue. | |
2792 | */ | |
2793 | wait_for_completion(&cmd->wait_for_completion); | |
2794 | ||
2795 | /* complete the command here itself and return the command block | |
2796 | * to free list | |
2797 | */ | |
2798 | pmcraid_return_cmd(cmd); | |
2799 | res->reset_progress = 0; | |
2800 | ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
2801 | ||
2802 | /* set the return value based on the returned ioasc */ | |
2803 | return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS; | |
2804 | } | |
2805 | ||
2806 | /** | |
2807 | * _pmcraid_io_done - helper for pmcraid_io_done function | |
2808 | * | |
2809 | * @cmd: pointer to pmcraid command struct | |
2810 | * @reslen: residual data length to be set in the ioasa | |
2811 | * @ioasc: ioasc either returned by IOA or set by driver itself. | |
2812 | * | |
2813 | * This function is invoked by pmcraid_io_done to complete mid-layer | |
2814 | * scsi ops. | |
2815 | * | |
2816 | * Return value: | |
2817 | * 0 if caller is required to return it to free_pool. Returns 1 if | |
2818 | * caller need not worry about freeing command block as error handler | |
2819 | * will take care of that. | |
2820 | */ | |
2821 | ||
2822 | static int _pmcraid_io_done(struct pmcraid_cmd *cmd, int reslen, int ioasc) | |
2823 | { | |
2824 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
2825 | int rc = 0; | |
2826 | ||
2827 | scsi_set_resid(scsi_cmd, reslen); | |
2828 | ||
2829 | pmcraid_info("response(%d) CDB[0] = %x ioasc:result: %x:%x\n", | |
2830 | le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2, | |
2831 | cmd->ioa_cb->ioarcb.cdb[0], | |
2832 | ioasc, scsi_cmd->result); | |
2833 | ||
2834 | if (PMCRAID_IOASC_SENSE_KEY(ioasc) != 0) | |
2835 | rc = pmcraid_error_handler(cmd); | |
2836 | ||
2837 | if (rc == 0) { | |
2838 | scsi_dma_unmap(scsi_cmd); | |
2839 | scsi_cmd->scsi_done(scsi_cmd); | |
2840 | } | |
2841 | ||
2842 | return rc; | |
2843 | } | |
2844 | ||
2845 | /** | |
2846 | * pmcraid_io_done - SCSI completion function | |
2847 | * | |
2848 | * @cmd: pointer to pmcraid command struct | |
2849 | * | |
2850 | * This function is invoked by tasklet/mid-layer error handler to completing | |
2851 | * the SCSI ops sent from mid-layer. | |
2852 | * | |
2853 | * Return value | |
2854 | * none | |
2855 | */ | |
2856 | ||
2857 | static void pmcraid_io_done(struct pmcraid_cmd *cmd) | |
2858 | { | |
2859 | u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); | |
2860 | u32 reslen = le32_to_cpu(cmd->ioa_cb->ioasa.residual_data_length); | |
2861 | ||
2862 | if (_pmcraid_io_done(cmd, reslen, ioasc) == 0) | |
2863 | pmcraid_return_cmd(cmd); | |
2864 | } | |
2865 | ||
2866 | /** | |
2867 | * pmcraid_abort_cmd - Aborts a single IOARCB already submitted to IOA | |
2868 | * | |
2869 | * @cmd: command block of the command to be aborted | |
2870 | * | |
2871 | * Return Value: | |
2872 | * returns pointer to command structure used as cancelling cmd | |
2873 | */ | |
2874 | static struct pmcraid_cmd *pmcraid_abort_cmd(struct pmcraid_cmd *cmd) | |
2875 | { | |
2876 | struct pmcraid_cmd *cancel_cmd; | |
2877 | struct pmcraid_instance *pinstance; | |
2878 | struct pmcraid_resource_entry *res; | |
2879 | ||
2880 | pinstance = (struct pmcraid_instance *)cmd->drv_inst; | |
2881 | res = cmd->scsi_cmd->device->hostdata; | |
2882 | ||
2883 | cancel_cmd = pmcraid_get_free_cmd(pinstance); | |
2884 | ||
2885 | if (cancel_cmd == NULL) { | |
2886 | pmcraid_err("%s: no cmd blocks are available\n", __func__); | |
2887 | return NULL; | |
2888 | } | |
2889 | ||
2890 | pmcraid_prepare_cancel_cmd(cancel_cmd, cmd); | |
2891 | ||
2892 | pmcraid_info("aborting command CDB[0]= %x with index = %d\n", | |
2893 | cmd->ioa_cb->ioarcb.cdb[0], | |
45c80be6 | 2894 | le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2); |
89a36810 AR |
2895 | |
2896 | init_completion(&cancel_cmd->wait_for_completion); | |
2897 | cancel_cmd->completion_req = 1; | |
2898 | ||
2899 | pmcraid_info("command (%d) CDB[0] = %x for %x\n", | |
2900 | le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.response_handle) >> 2, | |
c20c4267 | 2901 | cancel_cmd->ioa_cb->ioarcb.cdb[0], |
89a36810 AR |
2902 | le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.resource_handle)); |
2903 | ||
2904 | pmcraid_send_cmd(cancel_cmd, | |
2905 | pmcraid_internal_done, | |
2906 | PMCRAID_INTERNAL_TIMEOUT, | |
2907 | pmcraid_timeout_handler); | |
2908 | return cancel_cmd; | |
2909 | } | |
2910 | ||
2911 | /** | |
2912 | * pmcraid_abort_complete - Waits for ABORT TASK completion | |
2913 | * | |
2914 | * @cancel_cmd: command block use as cancelling command | |
2915 | * | |
2916 | * Return Value: | |
2917 | * returns SUCCESS if ABORT TASK has good completion | |
2918 | * otherwise FAILED | |
2919 | */ | |
2920 | static int pmcraid_abort_complete(struct pmcraid_cmd *cancel_cmd) | |
2921 | { | |
2922 | struct pmcraid_resource_entry *res; | |
2923 | u32 ioasc; | |
2924 | ||
2925 | wait_for_completion(&cancel_cmd->wait_for_completion); | |
c20c4267 AR |
2926 | res = cancel_cmd->res; |
2927 | cancel_cmd->res = NULL; | |
89a36810 AR |
2928 | ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc); |
2929 | ||
2930 | /* If the abort task is not timed out we will get a Good completion | |
2931 | * as sense_key, otherwise we may get one the following responses | |
25985edc | 2932 | * due to subsequent bus reset or device reset. In case IOASC is |
89a36810 AR |
2933 | * NR_SYNC_REQUIRED, set sync_reqd flag for the corresponding resource |
2934 | */ | |
2935 | if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET || | |
2936 | ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) { | |
2937 | if (ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) | |
2938 | res->sync_reqd = 1; | |
2939 | ioasc = 0; | |
2940 | } | |
2941 | ||
2942 | /* complete the command here itself */ | |
2943 | pmcraid_return_cmd(cancel_cmd); | |
2944 | return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS; | |
2945 | } | |
2946 | ||
2947 | /** | |
2948 | * pmcraid_eh_abort_handler - entry point for aborting a single task on errors | |
2949 | * | |
2950 | * @scsi_cmd: scsi command struct given by mid-layer. When this is called | |
2951 | * mid-layer ensures that no other commands are queued. This | |
2952 | * never gets called under interrupt, but a separate eh thread. | |
2953 | * | |
2954 | * Return value: | |
2955 | * SUCCESS / FAILED | |
2956 | */ | |
2957 | static int pmcraid_eh_abort_handler(struct scsi_cmnd *scsi_cmd) | |
2958 | { | |
2959 | struct pmcraid_instance *pinstance; | |
2960 | struct pmcraid_cmd *cmd; | |
2961 | struct pmcraid_resource_entry *res; | |
2962 | unsigned long host_lock_flags; | |
2963 | unsigned long pending_lock_flags; | |
2964 | struct pmcraid_cmd *cancel_cmd = NULL; | |
2965 | int cmd_found = 0; | |
2966 | int rc = FAILED; | |
2967 | ||
2968 | pinstance = | |
2969 | (struct pmcraid_instance *)scsi_cmd->device->host->hostdata; | |
2970 | ||
34876402 AR |
2971 | scmd_printk(KERN_INFO, scsi_cmd, |
2972 | "I/O command timed out, aborting it.\n"); | |
89a36810 AR |
2973 | |
2974 | res = scsi_cmd->device->hostdata; | |
2975 | ||
2976 | if (res == NULL) | |
2977 | return rc; | |
2978 | ||
2979 | /* If we are currently going through reset/reload, return failed. | |
2980 | * This will force the mid-layer to eventually call | |
2981 | * pmcraid_eh_host_reset which will then go to sleep and wait for the | |
2982 | * reset to complete | |
2983 | */ | |
2984 | spin_lock_irqsave(pinstance->host->host_lock, host_lock_flags); | |
2985 | ||
2986 | if (pinstance->ioa_reset_in_progress || | |
2987 | pinstance->ioa_state == IOA_STATE_DEAD) { | |
2988 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
2989 | host_lock_flags); | |
2990 | return rc; | |
2991 | } | |
2992 | ||
2993 | /* loop over pending cmd list to find cmd corresponding to this | |
2994 | * scsi_cmd. Note that this command might not have been completed | |
2995 | * already. locking: all pending commands are protected with | |
2996 | * pending_pool_lock. | |
2997 | */ | |
2998 | spin_lock_irqsave(&pinstance->pending_pool_lock, pending_lock_flags); | |
2999 | list_for_each_entry(cmd, &pinstance->pending_cmd_pool, free_list) { | |
3000 | ||
3001 | if (cmd->scsi_cmd == scsi_cmd) { | |
3002 | cmd_found = 1; | |
3003 | break; | |
3004 | } | |
3005 | } | |
3006 | ||
3007 | spin_unlock_irqrestore(&pinstance->pending_pool_lock, | |
3008 | pending_lock_flags); | |
3009 | ||
3010 | /* If the command to be aborted was given to IOA and still pending with | |
3011 | * it, send ABORT_TASK to abort this and wait for its completion | |
3012 | */ | |
3013 | if (cmd_found) | |
3014 | cancel_cmd = pmcraid_abort_cmd(cmd); | |
3015 | ||
3016 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
3017 | host_lock_flags); | |
3018 | ||
3019 | if (cancel_cmd) { | |
c20c4267 | 3020 | cancel_cmd->res = cmd->scsi_cmd->device->hostdata; |
89a36810 AR |
3021 | rc = pmcraid_abort_complete(cancel_cmd); |
3022 | } | |
3023 | ||
3024 | return cmd_found ? rc : SUCCESS; | |
3025 | } | |
3026 | ||
3027 | /** | |
3028 | * pmcraid_eh_xxxx_reset_handler - bus/target/device reset handler callbacks | |
3029 | * | |
3030 | * @scmd: pointer to scsi_cmd that was sent to the resource to be reset. | |
3031 | * | |
3032 | * All these routines invokve pmcraid_reset_device with appropriate parameters. | |
3033 | * Since these are called from mid-layer EH thread, no other IO will be queued | |
3034 | * to the resource being reset. However, control path (IOCTL) may be active so | |
3035 | * it is necessary to synchronize IOARRIN writes which pmcraid_reset_device | |
3036 | * takes care by locking/unlocking host_lock. | |
3037 | * | |
3038 | * Return value | |
c20c4267 | 3039 | * SUCCESS or FAILED |
89a36810 AR |
3040 | */ |
3041 | static int pmcraid_eh_device_reset_handler(struct scsi_cmnd *scmd) | |
3042 | { | |
34876402 AR |
3043 | scmd_printk(KERN_INFO, scmd, |
3044 | "resetting device due to an I/O command timeout.\n"); | |
89a36810 AR |
3045 | return pmcraid_reset_device(scmd, |
3046 | PMCRAID_INTERNAL_TIMEOUT, | |
3047 | RESET_DEVICE_LUN); | |
3048 | } | |
3049 | ||
3050 | static int pmcraid_eh_bus_reset_handler(struct scsi_cmnd *scmd) | |
3051 | { | |
34876402 AR |
3052 | scmd_printk(KERN_INFO, scmd, |
3053 | "Doing bus reset due to an I/O command timeout.\n"); | |
89a36810 AR |
3054 | return pmcraid_reset_device(scmd, |
3055 | PMCRAID_RESET_BUS_TIMEOUT, | |
3056 | RESET_DEVICE_BUS); | |
3057 | } | |
3058 | ||
3059 | static int pmcraid_eh_target_reset_handler(struct scsi_cmnd *scmd) | |
3060 | { | |
34876402 AR |
3061 | scmd_printk(KERN_INFO, scmd, |
3062 | "Doing target reset due to an I/O command timeout.\n"); | |
89a36810 AR |
3063 | return pmcraid_reset_device(scmd, |
3064 | PMCRAID_INTERNAL_TIMEOUT, | |
3065 | RESET_DEVICE_TARGET); | |
3066 | } | |
3067 | ||
3068 | /** | |
3069 | * pmcraid_eh_host_reset_handler - adapter reset handler callback | |
3070 | * | |
3071 | * @scmd: pointer to scsi_cmd that was sent to a resource of adapter | |
3072 | * | |
3073 | * Initiates adapter reset to bring it up to operational state | |
3074 | * | |
3075 | * Return value | |
c20c4267 | 3076 | * SUCCESS or FAILED |
89a36810 AR |
3077 | */ |
3078 | static int pmcraid_eh_host_reset_handler(struct scsi_cmnd *scmd) | |
3079 | { | |
3080 | unsigned long interval = 10000; /* 10 seconds interval */ | |
3081 | int waits = jiffies_to_msecs(PMCRAID_RESET_HOST_TIMEOUT) / interval; | |
3082 | struct pmcraid_instance *pinstance = | |
3083 | (struct pmcraid_instance *)(scmd->device->host->hostdata); | |
3084 | ||
3085 | ||
3086 | /* wait for an additional 150 seconds just in case firmware could come | |
3087 | * up and if it could complete all the pending commands excluding the | |
3088 | * two HCAM (CCN and LDN). | |
3089 | */ | |
3090 | while (waits--) { | |
3091 | if (atomic_read(&pinstance->outstanding_cmds) <= | |
3092 | PMCRAID_MAX_HCAM_CMD) | |
3093 | return SUCCESS; | |
3094 | msleep(interval); | |
3095 | } | |
3096 | ||
3097 | dev_err(&pinstance->pdev->dev, | |
3098 | "Adapter being reset due to an I/O command timeout.\n"); | |
3099 | return pmcraid_reset_bringup(pinstance) == 0 ? SUCCESS : FAILED; | |
3100 | } | |
3101 | ||
89a36810 AR |
3102 | /** |
3103 | * pmcraid_init_ioadls - initializes IOADL related fields in IOARCB | |
3104 | * @cmd: pmcraid command struct | |
3105 | * @sgcount: count of scatter-gather elements | |
3106 | * | |
3107 | * Return value | |
3108 | * returns pointer pmcraid_ioadl_desc, initialized to point to internal | |
3109 | * or external IOADLs | |
3110 | */ | |
61b96d5b | 3111 | static struct pmcraid_ioadl_desc * |
89a36810 AR |
3112 | pmcraid_init_ioadls(struct pmcraid_cmd *cmd, int sgcount) |
3113 | { | |
3114 | struct pmcraid_ioadl_desc *ioadl; | |
3115 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
3116 | int ioadl_count = 0; | |
3117 | ||
3118 | if (ioarcb->add_cmd_param_length) | |
45c80be6 AB |
3119 | ioadl_count = DIV_ROUND_UP(le16_to_cpu(ioarcb->add_cmd_param_length), 16); |
3120 | ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc) * sgcount); | |
89a36810 AR |
3121 | |
3122 | if ((sgcount + ioadl_count) > (ARRAY_SIZE(ioarcb->add_data.u.ioadl))) { | |
3123 | /* external ioadls start at offset 0x80 from control_block | |
3124 | * structure, re-using 24 out of 27 ioadls part of IOARCB. | |
3125 | * It is necessary to indicate to firmware that driver is | |
3126 | * using ioadls to be treated as external to IOARCB. | |
3127 | */ | |
45c80be6 | 3128 | ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL)); |
89a36810 AR |
3129 | ioarcb->ioadl_bus_addr = |
3130 | cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
3131 | offsetof(struct pmcraid_ioarcb, | |
3132 | add_data.u.ioadl[3])); | |
3133 | ioadl = &ioarcb->add_data.u.ioadl[3]; | |
3134 | } else { | |
3135 | ioarcb->ioadl_bus_addr = | |
3136 | cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
3137 | offsetof(struct pmcraid_ioarcb, | |
3138 | add_data.u.ioadl[ioadl_count])); | |
3139 | ||
3140 | ioadl = &ioarcb->add_data.u.ioadl[ioadl_count]; | |
3141 | ioarcb->ioarcb_bus_addr |= | |
45c80be6 | 3142 | cpu_to_le64(DIV_ROUND_CLOSEST(sgcount + ioadl_count, 8)); |
89a36810 AR |
3143 | } |
3144 | ||
3145 | return ioadl; | |
3146 | } | |
3147 | ||
3148 | /** | |
3149 | * pmcraid_build_ioadl - Build a scatter/gather list and map the buffer | |
3150 | * @pinstance: pointer to adapter instance structure | |
3151 | * @cmd: pmcraid command struct | |
3152 | * | |
3153 | * This function is invoked by queuecommand entry point while sending a command | |
3154 | * to firmware. This builds ioadl descriptors and sets up ioarcb fields. | |
3155 | * | |
3156 | * Return value: | |
c20c4267 | 3157 | * 0 on success or -1 on failure |
89a36810 AR |
3158 | */ |
3159 | static int pmcraid_build_ioadl( | |
3160 | struct pmcraid_instance *pinstance, | |
3161 | struct pmcraid_cmd *cmd | |
3162 | ) | |
3163 | { | |
3164 | int i, nseg; | |
3165 | struct scatterlist *sglist; | |
3166 | ||
3167 | struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; | |
3168 | struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb); | |
b22ee87d | 3169 | struct pmcraid_ioadl_desc *ioadl; |
89a36810 AR |
3170 | |
3171 | u32 length = scsi_bufflen(scsi_cmd); | |
3172 | ||
3173 | if (!length) | |
3174 | return 0; | |
3175 | ||
3176 | nseg = scsi_dma_map(scsi_cmd); | |
3177 | ||
3178 | if (nseg < 0) { | |
34876402 | 3179 | scmd_printk(KERN_ERR, scsi_cmd, "scsi_map_dma failed!\n"); |
89a36810 AR |
3180 | return -1; |
3181 | } else if (nseg > PMCRAID_MAX_IOADLS) { | |
3182 | scsi_dma_unmap(scsi_cmd); | |
34876402 | 3183 | scmd_printk(KERN_ERR, scsi_cmd, |
89a36810 AR |
3184 | "sg count is (%d) more than allowed!\n", nseg); |
3185 | return -1; | |
3186 | } | |
3187 | ||
3188 | /* Initialize IOARCB data transfer length fields */ | |
3189 | if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) | |
3190 | ioarcb->request_flags0 |= TRANSFER_DIR_WRITE; | |
3191 | ||
3192 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
3193 | ioarcb->data_transfer_length = cpu_to_le32(length); | |
3194 | ioadl = pmcraid_init_ioadls(cmd, nseg); | |
3195 | ||
3196 | /* Initialize IOADL descriptor addresses */ | |
3197 | scsi_for_each_sg(scsi_cmd, sglist, nseg, i) { | |
3198 | ioadl[i].data_len = cpu_to_le32(sg_dma_len(sglist)); | |
3199 | ioadl[i].address = cpu_to_le64(sg_dma_address(sglist)); | |
3200 | ioadl[i].flags = 0; | |
3201 | } | |
3202 | /* setup last descriptor */ | |
88197966 | 3203 | ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC; |
89a36810 AR |
3204 | |
3205 | return 0; | |
3206 | } | |
3207 | ||
3208 | /** | |
3209 | * pmcraid_free_sglist - Frees an allocated SG buffer list | |
3210 | * @sglist: scatter/gather list pointer | |
3211 | * | |
3212 | * Free a DMA'able memory previously allocated with pmcraid_alloc_sglist | |
3213 | * | |
3214 | * Return value: | |
c20c4267 | 3215 | * none |
89a36810 AR |
3216 | */ |
3217 | static void pmcraid_free_sglist(struct pmcraid_sglist *sglist) | |
3218 | { | |
ed4414ce | 3219 | sgl_free_order(sglist->scatterlist, sglist->order); |
89a36810 AR |
3220 | kfree(sglist); |
3221 | } | |
3222 | ||
3223 | /** | |
3224 | * pmcraid_alloc_sglist - Allocates memory for a SG list | |
3225 | * @buflen: buffer length | |
3226 | * | |
3227 | * Allocates a DMA'able buffer in chunks and assembles a scatter/gather | |
3228 | * list. | |
3229 | * | |
3230 | * Return value | |
c20c4267 | 3231 | * pointer to sglist / NULL on failure |
89a36810 AR |
3232 | */ |
3233 | static struct pmcraid_sglist *pmcraid_alloc_sglist(int buflen) | |
3234 | { | |
3235 | struct pmcraid_sglist *sglist; | |
89a36810 AR |
3236 | int sg_size; |
3237 | int order; | |
89a36810 AR |
3238 | |
3239 | sg_size = buflen / (PMCRAID_MAX_IOADLS - 1); | |
3240 | order = (sg_size > 0) ? get_order(sg_size) : 0; | |
89a36810 AR |
3241 | |
3242 | /* Allocate a scatter/gather list for the DMA */ | |
ed4414ce | 3243 | sglist = kzalloc(sizeof(struct pmcraid_sglist), GFP_KERNEL); |
89a36810 AR |
3244 | if (sglist == NULL) |
3245 | return NULL; | |
3246 | ||
89a36810 | 3247 | sglist->order = order; |
ed4414ce BVA |
3248 | sgl_alloc_order(buflen, order, false, |
3249 | GFP_KERNEL | GFP_DMA | __GFP_ZERO, &sglist->num_sg); | |
89a36810 AR |
3250 | |
3251 | return sglist; | |
3252 | } | |
3253 | ||
3254 | /** | |
3255 | * pmcraid_copy_sglist - Copy user buffer to kernel buffer's SG list | |
3256 | * @sglist: scatter/gather list pointer | |
3257 | * @buffer: buffer pointer | |
3258 | * @len: buffer length | |
3259 | * @direction: data transfer direction | |
3260 | * | |
3261 | * Copy a user buffer into a buffer allocated by pmcraid_alloc_sglist | |
3262 | * | |
3263 | * Return value: | |
3264 | * 0 on success / other on failure | |
3265 | */ | |
3266 | static int pmcraid_copy_sglist( | |
3267 | struct pmcraid_sglist *sglist, | |
3397623b | 3268 | void __user *buffer, |
89a36810 AR |
3269 | u32 len, |
3270 | int direction | |
3271 | ) | |
3272 | { | |
74eb7446 | 3273 | struct scatterlist *sg; |
89a36810 AR |
3274 | void *kaddr; |
3275 | int bsize_elem; | |
3276 | int i; | |
3277 | int rc = 0; | |
3278 | ||
3279 | /* Determine the actual number of bytes per element */ | |
3280 | bsize_elem = PAGE_SIZE * (1 << sglist->order); | |
3281 | ||
74eb7446 | 3282 | sg = sglist->scatterlist; |
89a36810 | 3283 | |
74eb7446 ML |
3284 | for (i = 0; i < (len / bsize_elem); i++, sg = sg_next(sg), buffer += bsize_elem) { |
3285 | struct page *page = sg_page(sg); | |
89a36810 AR |
3286 | |
3287 | kaddr = kmap(page); | |
3288 | if (direction == DMA_TO_DEVICE) | |
edb88cef | 3289 | rc = copy_from_user(kaddr, buffer, bsize_elem); |
89a36810 | 3290 | else |
edb88cef | 3291 | rc = copy_to_user(buffer, kaddr, bsize_elem); |
89a36810 AR |
3292 | |
3293 | kunmap(page); | |
3294 | ||
3295 | if (rc) { | |
3296 | pmcraid_err("failed to copy user data into sg list\n"); | |
3297 | return -EFAULT; | |
3298 | } | |
3299 | ||
74eb7446 | 3300 | sg->length = bsize_elem; |
89a36810 AR |
3301 | } |
3302 | ||
3303 | if (len % bsize_elem) { | |
74eb7446 | 3304 | struct page *page = sg_page(sg); |
89a36810 AR |
3305 | |
3306 | kaddr = kmap(page); | |
3307 | ||
3308 | if (direction == DMA_TO_DEVICE) | |
edb88cef | 3309 | rc = copy_from_user(kaddr, buffer, len % bsize_elem); |
89a36810 | 3310 | else |
edb88cef | 3311 | rc = copy_to_user(buffer, kaddr, len % bsize_elem); |
89a36810 AR |
3312 | |
3313 | kunmap(page); | |
3314 | ||
74eb7446 | 3315 | sg->length = len % bsize_elem; |
89a36810 AR |
3316 | } |
3317 | ||
3318 | if (rc) { | |
3319 | pmcraid_err("failed to copy user data into sg list\n"); | |
3320 | rc = -EFAULT; | |
3321 | } | |
3322 | ||
3323 | return rc; | |
3324 | } | |
3325 | ||
3326 | /** | |
3327 | * pmcraid_queuecommand - Queue a mid-layer request | |
3328 | * @scsi_cmd: scsi command struct | |
3329 | * @done: done function | |
3330 | * | |
3331 | * This function queues a request generated by the mid-layer. Midlayer calls | |
3332 | * this routine within host->lock. Some of the functions called by queuecommand | |
3333 | * would use cmd block queue locks (free_pool_lock and pending_pool_lock) | |
3334 | * | |
3335 | * Return value: | |
3336 | * 0 on success | |
3337 | * SCSI_MLQUEUE_DEVICE_BUSY if device is busy | |
3338 | * SCSI_MLQUEUE_HOST_BUSY if host is busy | |
3339 | */ | |
f281233d | 3340 | static int pmcraid_queuecommand_lck( |
89a36810 AR |
3341 | struct scsi_cmnd *scsi_cmd, |
3342 | void (*done) (struct scsi_cmnd *) | |
3343 | ) | |
3344 | { | |
3345 | struct pmcraid_instance *pinstance; | |
3346 | struct pmcraid_resource_entry *res; | |
3347 | struct pmcraid_ioarcb *ioarcb; | |
3348 | struct pmcraid_cmd *cmd; | |
c20c4267 | 3349 | u32 fw_version; |
89a36810 AR |
3350 | int rc = 0; |
3351 | ||
3352 | pinstance = | |
3353 | (struct pmcraid_instance *)scsi_cmd->device->host->hostdata; | |
c20c4267 | 3354 | fw_version = be16_to_cpu(pinstance->inq_data->fw_version); |
89a36810 AR |
3355 | scsi_cmd->scsi_done = done; |
3356 | res = scsi_cmd->device->hostdata; | |
3357 | scsi_cmd->result = (DID_OK << 16); | |
3358 | ||
3359 | /* if adapter is marked as dead, set result to DID_NO_CONNECT complete | |
3360 | * the command | |
3361 | */ | |
3362 | if (pinstance->ioa_state == IOA_STATE_DEAD) { | |
3363 | pmcraid_info("IOA is dead, but queuecommand is scheduled\n"); | |
3364 | scsi_cmd->result = (DID_NO_CONNECT << 16); | |
3365 | scsi_cmd->scsi_done(scsi_cmd); | |
3366 | return 0; | |
3367 | } | |
3368 | ||
3369 | /* If IOA reset is in progress, can't queue the commands */ | |
3370 | if (pinstance->ioa_reset_in_progress) | |
3371 | return SCSI_MLQUEUE_HOST_BUSY; | |
3372 | ||
c20c4267 AR |
3373 | /* Firmware doesn't support SYNCHRONIZE_CACHE command (0x35), complete |
3374 | * the command here itself with success return | |
3375 | */ | |
3376 | if (scsi_cmd->cmnd[0] == SYNCHRONIZE_CACHE) { | |
3377 | pmcraid_info("SYNC_CACHE(0x35), completing in driver itself\n"); | |
3378 | scsi_cmd->scsi_done(scsi_cmd); | |
3379 | return 0; | |
3380 | } | |
3381 | ||
89a36810 AR |
3382 | /* initialize the command and IOARCB to be sent to IOA */ |
3383 | cmd = pmcraid_get_free_cmd(pinstance); | |
3384 | ||
3385 | if (cmd == NULL) { | |
3386 | pmcraid_err("free command block is not available\n"); | |
3387 | return SCSI_MLQUEUE_HOST_BUSY; | |
3388 | } | |
3389 | ||
3390 | cmd->scsi_cmd = scsi_cmd; | |
3391 | ioarcb = &(cmd->ioa_cb->ioarcb); | |
3392 | memcpy(ioarcb->cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len); | |
3393 | ioarcb->resource_handle = res->cfg_entry.resource_handle; | |
3394 | ioarcb->request_type = REQ_TYPE_SCSI; | |
3395 | ||
c20c4267 AR |
3396 | /* set hrrq number where the IOA should respond to. Note that all cmds |
3397 | * generated internally uses hrrq_id 0, exception to this is the cmd | |
3398 | * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses | |
3399 | * hrrq_id assigned here in queuecommand | |
3400 | */ | |
3401 | ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) % | |
3402 | pinstance->num_hrrq; | |
89a36810 AR |
3403 | cmd->cmd_done = pmcraid_io_done; |
3404 | ||
3405 | if (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry)) { | |
3406 | if (scsi_cmd->underflow == 0) | |
3407 | ioarcb->request_flags0 |= INHIBIT_UL_CHECK; | |
3408 | ||
3409 | if (res->sync_reqd) { | |
3410 | ioarcb->request_flags0 |= SYNC_COMPLETE; | |
3411 | res->sync_reqd = 0; | |
3412 | } | |
3413 | ||
3414 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
50668633 CH |
3415 | |
3416 | if (scsi_cmd->flags & SCMD_TAGGED) | |
3417 | ioarcb->request_flags1 |= TASK_TAG_SIMPLE; | |
89a36810 AR |
3418 | |
3419 | if (RES_IS_GSCSI(res->cfg_entry)) | |
3420 | ioarcb->request_flags1 |= DELAY_AFTER_RESET; | |
3421 | } | |
3422 | ||
3423 | rc = pmcraid_build_ioadl(pinstance, cmd); | |
3424 | ||
3425 | pmcraid_info("command (%d) CDB[0] = %x for %x:%x:%x:%x\n", | |
3426 | le32_to_cpu(ioarcb->response_handle) >> 2, | |
3427 | scsi_cmd->cmnd[0], pinstance->host->unique_id, | |
3428 | RES_IS_VSET(res->cfg_entry) ? PMCRAID_VSET_BUS_ID : | |
3429 | PMCRAID_PHYS_BUS_ID, | |
3430 | RES_IS_VSET(res->cfg_entry) ? | |
c20c4267 AR |
3431 | (fw_version <= PMCRAID_FW_VERSION_1 ? |
3432 | res->cfg_entry.unique_flags1 : | |
45c80be6 | 3433 | le16_to_cpu(res->cfg_entry.array_id) & 0xFF) : |
89a36810 AR |
3434 | RES_TARGET(res->cfg_entry.resource_address), |
3435 | RES_LUN(res->cfg_entry.resource_address)); | |
3436 | ||
3437 | if (likely(rc == 0)) { | |
3438 | _pmcraid_fire_command(cmd); | |
3439 | } else { | |
3440 | pmcraid_err("queuecommand could not build ioadl\n"); | |
3441 | pmcraid_return_cmd(cmd); | |
3442 | rc = SCSI_MLQUEUE_HOST_BUSY; | |
3443 | } | |
3444 | ||
3445 | return rc; | |
3446 | } | |
3447 | ||
f281233d JG |
3448 | static DEF_SCSI_QCMD(pmcraid_queuecommand) |
3449 | ||
89a36810 AR |
3450 | /** |
3451 | * pmcraid_open -char node "open" entry, allowed only users with admin access | |
3452 | */ | |
3453 | static int pmcraid_chr_open(struct inode *inode, struct file *filep) | |
3454 | { | |
3455 | struct pmcraid_instance *pinstance; | |
3456 | ||
3457 | if (!capable(CAP_SYS_ADMIN)) | |
3458 | return -EACCES; | |
3459 | ||
3460 | /* Populate adapter instance * pointer for use by ioctl */ | |
3461 | pinstance = container_of(inode->i_cdev, struct pmcraid_instance, cdev); | |
3462 | filep->private_data = pinstance; | |
3463 | ||
3464 | return 0; | |
3465 | } | |
3466 | ||
89a36810 AR |
3467 | /** |
3468 | * pmcraid_fasync - Async notifier registration from applications | |
3469 | * | |
3470 | * This function adds the calling process to a driver global queue. When an | |
3471 | * event occurs, SIGIO will be sent to all processes in this queue. | |
3472 | */ | |
3473 | static int pmcraid_chr_fasync(int fd, struct file *filep, int mode) | |
3474 | { | |
3475 | struct pmcraid_instance *pinstance; | |
3476 | int rc; | |
3477 | ||
660bdddb | 3478 | pinstance = filep->private_data; |
89a36810 AR |
3479 | mutex_lock(&pinstance->aen_queue_lock); |
3480 | rc = fasync_helper(fd, filep, mode, &pinstance->aen_queue); | |
3481 | mutex_unlock(&pinstance->aen_queue_lock); | |
3482 | ||
3483 | return rc; | |
3484 | } | |
3485 | ||
3486 | ||
3487 | /** | |
3488 | * pmcraid_build_passthrough_ioadls - builds SG elements for passthrough | |
3489 | * commands sent over IOCTL interface | |
3490 | * | |
3491 | * @cmd : pointer to struct pmcraid_cmd | |
3492 | * @buflen : length of the request buffer | |
3493 | * @direction : data transfer direction | |
3494 | * | |
3495 | * Return value | |
af901ca1 | 3496 | * 0 on success, non-zero error code on failure |
89a36810 AR |
3497 | */ |
3498 | static int pmcraid_build_passthrough_ioadls( | |
3499 | struct pmcraid_cmd *cmd, | |
3500 | int buflen, | |
3501 | int direction | |
3502 | ) | |
3503 | { | |
3504 | struct pmcraid_sglist *sglist = NULL; | |
3505 | struct scatterlist *sg = NULL; | |
3506 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
3507 | struct pmcraid_ioadl_desc *ioadl; | |
3508 | int i; | |
3509 | ||
3510 | sglist = pmcraid_alloc_sglist(buflen); | |
3511 | ||
3512 | if (!sglist) { | |
3513 | pmcraid_err("can't allocate memory for passthrough SGls\n"); | |
3514 | return -ENOMEM; | |
3515 | } | |
3516 | ||
371a6c32 | 3517 | sglist->num_dma_sg = dma_map_sg(&cmd->drv_inst->pdev->dev, |
89a36810 AR |
3518 | sglist->scatterlist, |
3519 | sglist->num_sg, direction); | |
3520 | ||
3521 | if (!sglist->num_dma_sg || sglist->num_dma_sg > PMCRAID_MAX_IOADLS) { | |
3522 | dev_err(&cmd->drv_inst->pdev->dev, | |
3523 | "Failed to map passthrough buffer!\n"); | |
3524 | pmcraid_free_sglist(sglist); | |
3525 | return -EIO; | |
3526 | } | |
3527 | ||
3528 | cmd->sglist = sglist; | |
3529 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
3530 | ||
3531 | ioadl = pmcraid_init_ioadls(cmd, sglist->num_dma_sg); | |
3532 | ||
3533 | /* Initialize IOADL descriptor addresses */ | |
3534 | for_each_sg(sglist->scatterlist, sg, sglist->num_dma_sg, i) { | |
3535 | ioadl[i].data_len = cpu_to_le32(sg_dma_len(sg)); | |
3536 | ioadl[i].address = cpu_to_le64(sg_dma_address(sg)); | |
3537 | ioadl[i].flags = 0; | |
3538 | } | |
3539 | ||
3540 | /* setup the last descriptor */ | |
88197966 | 3541 | ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC; |
89a36810 AR |
3542 | |
3543 | return 0; | |
3544 | } | |
3545 | ||
3546 | ||
3547 | /** | |
3548 | * pmcraid_release_passthrough_ioadls - release passthrough ioadls | |
3549 | * | |
3550 | * @cmd: pointer to struct pmcraid_cmd for which ioadls were allocated | |
3551 | * @buflen: size of the request buffer | |
3552 | * @direction: data transfer direction | |
3553 | * | |
3554 | * Return value | |
af901ca1 | 3555 | * 0 on success, non-zero error code on failure |
89a36810 AR |
3556 | */ |
3557 | static void pmcraid_release_passthrough_ioadls( | |
3558 | struct pmcraid_cmd *cmd, | |
3559 | int buflen, | |
3560 | int direction | |
3561 | ) | |
3562 | { | |
3563 | struct pmcraid_sglist *sglist = cmd->sglist; | |
3564 | ||
3565 | if (buflen > 0) { | |
371a6c32 | 3566 | dma_unmap_sg(&cmd->drv_inst->pdev->dev, |
89a36810 AR |
3567 | sglist->scatterlist, |
3568 | sglist->num_sg, | |
3569 | direction); | |
3570 | pmcraid_free_sglist(sglist); | |
3571 | cmd->sglist = NULL; | |
3572 | } | |
3573 | } | |
3574 | ||
3575 | /** | |
3576 | * pmcraid_ioctl_passthrough - handling passthrough IOCTL commands | |
3577 | * | |
3578 | * @pinstance: pointer to adapter instance structure | |
3579 | * @cmd: ioctl code | |
3580 | * @arg: pointer to pmcraid_passthrough_buffer user buffer | |
3581 | * | |
3582 | * Return value | |
af901ca1 | 3583 | * 0 on success, non-zero error code on failure |
89a36810 AR |
3584 | */ |
3585 | static long pmcraid_ioctl_passthrough( | |
3586 | struct pmcraid_instance *pinstance, | |
3587 | unsigned int ioctl_cmd, | |
3588 | unsigned int buflen, | |
3397623b | 3589 | void __user *arg |
89a36810 AR |
3590 | ) |
3591 | { | |
3592 | struct pmcraid_passthrough_ioctl_buffer *buffer; | |
3593 | struct pmcraid_ioarcb *ioarcb; | |
3594 | struct pmcraid_cmd *cmd; | |
3595 | struct pmcraid_cmd *cancel_cmd; | |
3397623b | 3596 | void __user *request_buffer; |
89a36810 AR |
3597 | unsigned long request_offset; |
3598 | unsigned long lock_flags; | |
3397623b | 3599 | void __user *ioasa; |
c20c4267 | 3600 | u32 ioasc; |
89a36810 AR |
3601 | int request_size; |
3602 | int buffer_size; | |
96d4f267 | 3603 | u8 direction; |
89a36810 AR |
3604 | int rc = 0; |
3605 | ||
3606 | /* If IOA reset is in progress, wait 10 secs for reset to complete */ | |
3607 | if (pinstance->ioa_reset_in_progress) { | |
3608 | rc = wait_event_interruptible_timeout( | |
3609 | pinstance->reset_wait_q, | |
3610 | !pinstance->ioa_reset_in_progress, | |
3611 | msecs_to_jiffies(10000)); | |
3612 | ||
3613 | if (!rc) | |
3614 | return -ETIMEDOUT; | |
3615 | else if (rc < 0) | |
3616 | return -ERESTARTSYS; | |
3617 | } | |
3618 | ||
3619 | /* If adapter is not in operational state, return error */ | |
3620 | if (pinstance->ioa_state != IOA_STATE_OPERATIONAL) { | |
3621 | pmcraid_err("IOA is not operational\n"); | |
3622 | return -ENOTTY; | |
3623 | } | |
3624 | ||
3625 | buffer_size = sizeof(struct pmcraid_passthrough_ioctl_buffer); | |
3626 | buffer = kmalloc(buffer_size, GFP_KERNEL); | |
3627 | ||
3628 | if (!buffer) { | |
3629 | pmcraid_err("no memory for passthrough buffer\n"); | |
3630 | return -ENOMEM; | |
3631 | } | |
3632 | ||
3633 | request_offset = | |
3634 | offsetof(struct pmcraid_passthrough_ioctl_buffer, request_buffer); | |
3635 | ||
3636 | request_buffer = arg + request_offset; | |
3637 | ||
edb88cef | 3638 | rc = copy_from_user(buffer, arg, |
89a36810 | 3639 | sizeof(struct pmcraid_passthrough_ioctl_buffer)); |
592488a3 | 3640 | |
3397623b | 3641 | ioasa = arg + offsetof(struct pmcraid_passthrough_ioctl_buffer, ioasa); |
592488a3 | 3642 | |
89a36810 AR |
3643 | if (rc) { |
3644 | pmcraid_err("ioctl: can't copy passthrough buffer\n"); | |
3645 | rc = -EFAULT; | |
3646 | goto out_free_buffer; | |
3647 | } | |
3648 | ||
45c80be6 | 3649 | request_size = le32_to_cpu(buffer->ioarcb.data_transfer_length); |
89a36810 AR |
3650 | |
3651 | if (buffer->ioarcb.request_flags0 & TRANSFER_DIR_WRITE) { | |
89a36810 AR |
3652 | direction = DMA_TO_DEVICE; |
3653 | } else { | |
89a36810 AR |
3654 | direction = DMA_FROM_DEVICE; |
3655 | } | |
3656 | ||
edb88cef | 3657 | if (request_size < 0) { |
5f6279da DR |
3658 | rc = -EINVAL; |
3659 | goto out_free_buffer; | |
89a36810 AR |
3660 | } |
3661 | ||
3662 | /* check if we have any additional command parameters */ | |
45c80be6 AB |
3663 | if (le16_to_cpu(buffer->ioarcb.add_cmd_param_length) |
3664 | > PMCRAID_ADD_CMD_PARAM_LEN) { | |
89a36810 AR |
3665 | rc = -EINVAL; |
3666 | goto out_free_buffer; | |
3667 | } | |
3668 | ||
3669 | cmd = pmcraid_get_free_cmd(pinstance); | |
3670 | ||
3671 | if (!cmd) { | |
3672 | pmcraid_err("free command block is not available\n"); | |
3673 | rc = -ENOMEM; | |
3674 | goto out_free_buffer; | |
3675 | } | |
3676 | ||
3677 | cmd->scsi_cmd = NULL; | |
3678 | ioarcb = &(cmd->ioa_cb->ioarcb); | |
3679 | ||
3680 | /* Copy the user-provided IOARCB stuff field by field */ | |
3681 | ioarcb->resource_handle = buffer->ioarcb.resource_handle; | |
3682 | ioarcb->data_transfer_length = buffer->ioarcb.data_transfer_length; | |
3683 | ioarcb->cmd_timeout = buffer->ioarcb.cmd_timeout; | |
3684 | ioarcb->request_type = buffer->ioarcb.request_type; | |
3685 | ioarcb->request_flags0 = buffer->ioarcb.request_flags0; | |
3686 | ioarcb->request_flags1 = buffer->ioarcb.request_flags1; | |
3687 | memcpy(ioarcb->cdb, buffer->ioarcb.cdb, PMCRAID_MAX_CDB_LEN); | |
3688 | ||
3689 | if (buffer->ioarcb.add_cmd_param_length) { | |
3690 | ioarcb->add_cmd_param_length = | |
3691 | buffer->ioarcb.add_cmd_param_length; | |
3692 | ioarcb->add_cmd_param_offset = | |
3693 | buffer->ioarcb.add_cmd_param_offset; | |
3694 | memcpy(ioarcb->add_data.u.add_cmd_params, | |
3695 | buffer->ioarcb.add_data.u.add_cmd_params, | |
45c80be6 | 3696 | le16_to_cpu(buffer->ioarcb.add_cmd_param_length)); |
89a36810 AR |
3697 | } |
3698 | ||
c20c4267 AR |
3699 | /* set hrrq number where the IOA should respond to. Note that all cmds |
3700 | * generated internally uses hrrq_id 0, exception to this is the cmd | |
3701 | * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses | |
3702 | * hrrq_id assigned here in queuecommand | |
3703 | */ | |
3704 | ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) % | |
3705 | pinstance->num_hrrq; | |
3706 | ||
89a36810 AR |
3707 | if (request_size) { |
3708 | rc = pmcraid_build_passthrough_ioadls(cmd, | |
3709 | request_size, | |
3710 | direction); | |
3711 | if (rc) { | |
3712 | pmcraid_err("couldn't build passthrough ioadls\n"); | |
2d76a247 | 3713 | goto out_free_cmd; |
89a36810 AR |
3714 | } |
3715 | } | |
3716 | ||
3717 | /* If data is being written into the device, copy the data from user | |
3718 | * buffers | |
3719 | */ | |
3720 | if (direction == DMA_TO_DEVICE && request_size > 0) { | |
3721 | rc = pmcraid_copy_sglist(cmd->sglist, | |
3722 | request_buffer, | |
3723 | request_size, | |
3724 | direction); | |
3725 | if (rc) { | |
3726 | pmcraid_err("failed to copy user buffer\n"); | |
3727 | goto out_free_sglist; | |
3728 | } | |
3729 | } | |
3730 | ||
3731 | /* passthrough ioctl is a blocking command so, put the user to sleep | |
3732 | * until timeout. Note that a timeout value of 0 means, do timeout. | |
3733 | */ | |
3734 | cmd->cmd_done = pmcraid_internal_done; | |
3735 | init_completion(&cmd->wait_for_completion); | |
3736 | cmd->completion_req = 1; | |
3737 | ||
3738 | pmcraid_info("command(%d) (CDB[0] = %x) for %x\n", | |
3739 | le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2, | |
3740 | cmd->ioa_cb->ioarcb.cdb[0], | |
3741 | le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle)); | |
3742 | ||
3743 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
3744 | _pmcraid_fire_command(cmd); | |
3745 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
3746 | ||
c20c4267 AR |
3747 | /* NOTE ! Remove the below line once abort_task is implemented |
3748 | * in firmware. This line disables ioctl command timeout handling logic | |
3749 | * similar to IO command timeout handling, making ioctl commands to wait | |
3750 | * until the command completion regardless of timeout value specified in | |
3751 | * ioarcb | |
3752 | */ | |
3753 | buffer->ioarcb.cmd_timeout = 0; | |
3754 | ||
89a36810 AR |
3755 | /* If command timeout is specified put caller to wait till that time, |
3756 | * otherwise it would be blocking wait. If command gets timed out, it | |
3757 | * will be aborted. | |
3758 | */ | |
3759 | if (buffer->ioarcb.cmd_timeout == 0) { | |
3760 | wait_for_completion(&cmd->wait_for_completion); | |
3761 | } else if (!wait_for_completion_timeout( | |
3762 | &cmd->wait_for_completion, | |
45c80be6 | 3763 | msecs_to_jiffies(le16_to_cpu(buffer->ioarcb.cmd_timeout) * 1000))) { |
89a36810 AR |
3764 | |
3765 | pmcraid_info("aborting cmd %d (CDB[0] = %x) due to timeout\n", | |
45c80be6 | 3766 | le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2, |
89a36810 AR |
3767 | cmd->ioa_cb->ioarcb.cdb[0]); |
3768 | ||
89a36810 AR |
3769 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); |
3770 | cancel_cmd = pmcraid_abort_cmd(cmd); | |
3771 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); | |
3772 | ||
3773 | if (cancel_cmd) { | |
3774 | wait_for_completion(&cancel_cmd->wait_for_completion); | |
45c80be6 | 3775 | ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc); |
89a36810 | 3776 | pmcraid_return_cmd(cancel_cmd); |
c20c4267 AR |
3777 | |
3778 | /* if abort task couldn't find the command i.e it got | |
3779 | * completed prior to aborting, return good completion. | |
25985edc | 3780 | * if command got aborted successfully or there was IOA |
c20c4267 AR |
3781 | * reset due to abort task itself getting timedout then |
3782 | * return -ETIMEDOUT | |
3783 | */ | |
3784 | if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET || | |
3785 | PMCRAID_IOASC_SENSE_KEY(ioasc) == 0x00) { | |
3786 | if (ioasc != PMCRAID_IOASC_GC_IOARCB_NOTFOUND) | |
3787 | rc = -ETIMEDOUT; | |
3788 | goto out_handle_response; | |
3789 | } | |
89a36810 AR |
3790 | } |
3791 | ||
c20c4267 AR |
3792 | /* no command block for abort task or abort task failed to abort |
3793 | * the IOARCB, then wait for 150 more seconds and initiate reset | |
3794 | * sequence after timeout | |
3795 | */ | |
3796 | if (!wait_for_completion_timeout( | |
3797 | &cmd->wait_for_completion, | |
3798 | msecs_to_jiffies(150 * 1000))) { | |
3799 | pmcraid_reset_bringup(cmd->drv_inst); | |
3800 | rc = -ETIMEDOUT; | |
3801 | } | |
89a36810 AR |
3802 | } |
3803 | ||
c20c4267 | 3804 | out_handle_response: |
592488a3 AR |
3805 | /* copy entire IOASA buffer and return IOCTL success. |
3806 | * If copying IOASA to user-buffer fails, return | |
89a36810 AR |
3807 | * EFAULT |
3808 | */ | |
592488a3 AR |
3809 | if (copy_to_user(ioasa, &cmd->ioa_cb->ioasa, |
3810 | sizeof(struct pmcraid_ioasa))) { | |
3811 | pmcraid_err("failed to copy ioasa buffer to user\n"); | |
3812 | rc = -EFAULT; | |
89a36810 | 3813 | } |
c20c4267 | 3814 | |
89a36810 AR |
3815 | /* If the data transfer was from device, copy the data onto user |
3816 | * buffers | |
3817 | */ | |
3818 | else if (direction == DMA_FROM_DEVICE && request_size > 0) { | |
3819 | rc = pmcraid_copy_sglist(cmd->sglist, | |
3820 | request_buffer, | |
3821 | request_size, | |
3822 | direction); | |
3823 | if (rc) { | |
3824 | pmcraid_err("failed to copy user buffer\n"); | |
3825 | rc = -EFAULT; | |
3826 | } | |
3827 | } | |
3828 | ||
3829 | out_free_sglist: | |
3830 | pmcraid_release_passthrough_ioadls(cmd, request_size, direction); | |
2d76a247 QL |
3831 | |
3832 | out_free_cmd: | |
89a36810 AR |
3833 | pmcraid_return_cmd(cmd); |
3834 | ||
3835 | out_free_buffer: | |
3836 | kfree(buffer); | |
3837 | ||
3838 | return rc; | |
3839 | } | |
3840 | ||
3841 | ||
3842 | ||
3843 | ||
3844 | /** | |
3845 | * pmcraid_ioctl_driver - ioctl handler for commands handled by driver itself | |
3846 | * | |
3847 | * @pinstance: pointer to adapter instance structure | |
3848 | * @cmd: ioctl command passed in | |
3849 | * @buflen: length of user_buffer | |
3850 | * @user_buffer: user buffer pointer | |
3851 | * | |
3852 | * Return Value | |
3853 | * 0 in case of success, otherwise appropriate error code | |
3854 | */ | |
3855 | static long pmcraid_ioctl_driver( | |
3856 | struct pmcraid_instance *pinstance, | |
3857 | unsigned int cmd, | |
3858 | unsigned int buflen, | |
3859 | void __user *user_buffer | |
3860 | ) | |
3861 | { | |
3862 | int rc = -ENOSYS; | |
3863 | ||
89a36810 AR |
3864 | switch (cmd) { |
3865 | case PMCRAID_IOCTL_RESET_ADAPTER: | |
3866 | pmcraid_reset_bringup(pinstance); | |
3867 | rc = 0; | |
3868 | break; | |
3869 | ||
3870 | default: | |
3871 | break; | |
3872 | } | |
3873 | ||
3874 | return rc; | |
3875 | } | |
3876 | ||
3877 | /** | |
3878 | * pmcraid_check_ioctl_buffer - check for proper access to user buffer | |
3879 | * | |
3880 | * @cmd: ioctl command | |
3881 | * @arg: user buffer | |
3882 | * @hdr: pointer to kernel memory for pmcraid_ioctl_header | |
3883 | * | |
3884 | * Return Value | |
3885 | * negetive error code if there are access issues, otherwise zero. | |
3886 | * Upon success, returns ioctl header copied out of user buffer. | |
3887 | */ | |
3888 | ||
3889 | static int pmcraid_check_ioctl_buffer( | |
3890 | int cmd, | |
3891 | void __user *arg, | |
3892 | struct pmcraid_ioctl_header *hdr | |
3893 | ) | |
3894 | { | |
edb88cef | 3895 | int rc; |
89a36810 AR |
3896 | |
3897 | if (copy_from_user(hdr, arg, sizeof(struct pmcraid_ioctl_header))) { | |
3898 | pmcraid_err("couldn't copy ioctl header from user buffer\n"); | |
3899 | return -EFAULT; | |
3900 | } | |
3901 | ||
3902 | /* check for valid driver signature */ | |
3903 | rc = memcmp(hdr->signature, | |
3904 | PMCRAID_IOCTL_SIGNATURE, | |
3905 | sizeof(hdr->signature)); | |
3906 | if (rc) { | |
3907 | pmcraid_err("signature verification failed\n"); | |
3908 | return -EINVAL; | |
3909 | } | |
3910 | ||
89a36810 AR |
3911 | return 0; |
3912 | } | |
3913 | ||
3914 | /** | |
3915 | * pmcraid_ioctl - char node ioctl entry point | |
3916 | */ | |
3917 | static long pmcraid_chr_ioctl( | |
3918 | struct file *filep, | |
3919 | unsigned int cmd, | |
3920 | unsigned long arg | |
3921 | ) | |
3922 | { | |
3923 | struct pmcraid_instance *pinstance = NULL; | |
3924 | struct pmcraid_ioctl_header *hdr = NULL; | |
3397623b | 3925 | void __user *argp = (void __user *)arg; |
89a36810 AR |
3926 | int retval = -ENOTTY; |
3927 | ||
a63ec376 | 3928 | hdr = kmalloc(sizeof(struct pmcraid_ioctl_header), GFP_KERNEL); |
89a36810 AR |
3929 | |
3930 | if (!hdr) { | |
4f91b114 | 3931 | pmcraid_err("failed to allocate memory for ioctl header\n"); |
89a36810 AR |
3932 | return -ENOMEM; |
3933 | } | |
3934 | ||
3397623b | 3935 | retval = pmcraid_check_ioctl_buffer(cmd, argp, hdr); |
89a36810 AR |
3936 | |
3937 | if (retval) { | |
3938 | pmcraid_info("chr_ioctl: header check failed\n"); | |
3939 | kfree(hdr); | |
3940 | return retval; | |
3941 | } | |
3942 | ||
660bdddb | 3943 | pinstance = filep->private_data; |
89a36810 AR |
3944 | |
3945 | if (!pinstance) { | |
3946 | pmcraid_info("adapter instance is not found\n"); | |
3947 | kfree(hdr); | |
3948 | return -ENOTTY; | |
3949 | } | |
3950 | ||
3951 | switch (_IOC_TYPE(cmd)) { | |
3952 | ||
3953 | case PMCRAID_PASSTHROUGH_IOCTL: | |
3954 | /* If ioctl code is to download microcode, we need to block | |
3955 | * mid-layer requests. | |
3956 | */ | |
3957 | if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE) | |
3958 | scsi_block_requests(pinstance->host); | |
3959 | ||
3397623b AB |
3960 | retval = pmcraid_ioctl_passthrough(pinstance, cmd, |
3961 | hdr->buffer_length, argp); | |
89a36810 AR |
3962 | |
3963 | if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE) | |
3964 | scsi_unblock_requests(pinstance->host); | |
3965 | break; | |
3966 | ||
3967 | case PMCRAID_DRIVER_IOCTL: | |
3968 | arg += sizeof(struct pmcraid_ioctl_header); | |
3397623b AB |
3969 | retval = pmcraid_ioctl_driver(pinstance, cmd, |
3970 | hdr->buffer_length, argp); | |
89a36810 AR |
3971 | break; |
3972 | ||
3973 | default: | |
3974 | retval = -ENOTTY; | |
3975 | break; | |
3976 | } | |
3977 | ||
3978 | kfree(hdr); | |
3979 | ||
3980 | return retval; | |
3981 | } | |
3982 | ||
3983 | /** | |
3984 | * File operations structure for management interface | |
3985 | */ | |
3986 | static const struct file_operations pmcraid_fops = { | |
3987 | .owner = THIS_MODULE, | |
3988 | .open = pmcraid_chr_open, | |
89a36810 AR |
3989 | .fasync = pmcraid_chr_fasync, |
3990 | .unlocked_ioctl = pmcraid_chr_ioctl, | |
3991 | #ifdef CONFIG_COMPAT | |
3992 | .compat_ioctl = pmcraid_chr_ioctl, | |
3993 | #endif | |
6038f373 | 3994 | .llseek = noop_llseek, |
89a36810 AR |
3995 | }; |
3996 | ||
3997 | ||
3998 | ||
3999 | ||
4000 | /** | |
4001 | * pmcraid_show_log_level - Display adapter's error logging level | |
4002 | * @dev: class device struct | |
4003 | * @buf: buffer | |
4004 | * | |
4005 | * Return value: | |
4006 | * number of bytes printed to buffer | |
4007 | */ | |
4008 | static ssize_t pmcraid_show_log_level( | |
4009 | struct device *dev, | |
4010 | struct device_attribute *attr, | |
4011 | char *buf) | |
4012 | { | |
4013 | struct Scsi_Host *shost = class_to_shost(dev); | |
4014 | struct pmcraid_instance *pinstance = | |
4015 | (struct pmcraid_instance *)shost->hostdata; | |
4016 | return snprintf(buf, PAGE_SIZE, "%d\n", pinstance->current_log_level); | |
4017 | } | |
4018 | ||
4019 | /** | |
4020 | * pmcraid_store_log_level - Change the adapter's error logging level | |
4021 | * @dev: class device struct | |
4022 | * @buf: buffer | |
4023 | * @count: not used | |
4024 | * | |
4025 | * Return value: | |
4026 | * number of bytes printed to buffer | |
4027 | */ | |
4028 | static ssize_t pmcraid_store_log_level( | |
4029 | struct device *dev, | |
4030 | struct device_attribute *attr, | |
4031 | const char *buf, | |
4032 | size_t count | |
4033 | ) | |
4034 | { | |
4035 | struct Scsi_Host *shost; | |
4036 | struct pmcraid_instance *pinstance; | |
f7c65af5 | 4037 | u8 val; |
89a36810 | 4038 | |
f7c65af5 | 4039 | if (kstrtou8(buf, 10, &val)) |
89a36810 AR |
4040 | return -EINVAL; |
4041 | /* log-level should be from 0 to 2 */ | |
4042 | if (val > 2) | |
4043 | return -EINVAL; | |
4044 | ||
4045 | shost = class_to_shost(dev); | |
4046 | pinstance = (struct pmcraid_instance *)shost->hostdata; | |
4047 | pinstance->current_log_level = val; | |
4048 | ||
4049 | return strlen(buf); | |
4050 | } | |
4051 | ||
4052 | static struct device_attribute pmcraid_log_level_attr = { | |
4053 | .attr = { | |
4054 | .name = "log_level", | |
4055 | .mode = S_IRUGO | S_IWUSR, | |
4056 | }, | |
4057 | .show = pmcraid_show_log_level, | |
4058 | .store = pmcraid_store_log_level, | |
4059 | }; | |
4060 | ||
4061 | /** | |
4062 | * pmcraid_show_drv_version - Display driver version | |
4063 | * @dev: class device struct | |
4064 | * @buf: buffer | |
4065 | * | |
4066 | * Return value: | |
4067 | * number of bytes printed to buffer | |
4068 | */ | |
4069 | static ssize_t pmcraid_show_drv_version( | |
4070 | struct device *dev, | |
4071 | struct device_attribute *attr, | |
4072 | char *buf | |
4073 | ) | |
4074 | { | |
a1b66665 MM |
4075 | return snprintf(buf, PAGE_SIZE, "version: %s\n", |
4076 | PMCRAID_DRIVER_VERSION); | |
89a36810 AR |
4077 | } |
4078 | ||
4079 | static struct device_attribute pmcraid_driver_version_attr = { | |
4080 | .attr = { | |
4081 | .name = "drv_version", | |
4082 | .mode = S_IRUGO, | |
4083 | }, | |
4084 | .show = pmcraid_show_drv_version, | |
4085 | }; | |
4086 | ||
4087 | /** | |
4088 | * pmcraid_show_io_adapter_id - Display driver assigned adapter id | |
4089 | * @dev: class device struct | |
4090 | * @buf: buffer | |
4091 | * | |
4092 | * Return value: | |
4093 | * number of bytes printed to buffer | |
4094 | */ | |
4095 | static ssize_t pmcraid_show_adapter_id( | |
4096 | struct device *dev, | |
4097 | struct device_attribute *attr, | |
4098 | char *buf | |
4099 | ) | |
4100 | { | |
4101 | struct Scsi_Host *shost = class_to_shost(dev); | |
4102 | struct pmcraid_instance *pinstance = | |
4103 | (struct pmcraid_instance *)shost->hostdata; | |
4104 | u32 adapter_id = (pinstance->pdev->bus->number << 8) | | |
4105 | pinstance->pdev->devfn; | |
4106 | u32 aen_group = pmcraid_event_family.id; | |
4107 | ||
4108 | return snprintf(buf, PAGE_SIZE, | |
4109 | "adapter id: %d\nminor: %d\naen group: %d\n", | |
4110 | adapter_id, MINOR(pinstance->cdev.dev), aen_group); | |
4111 | } | |
4112 | ||
4113 | static struct device_attribute pmcraid_adapter_id_attr = { | |
4114 | .attr = { | |
4115 | .name = "adapter_id", | |
5a0ccb6b | 4116 | .mode = S_IRUGO, |
89a36810 AR |
4117 | }, |
4118 | .show = pmcraid_show_adapter_id, | |
4119 | }; | |
4120 | ||
4121 | static struct device_attribute *pmcraid_host_attrs[] = { | |
4122 | &pmcraid_log_level_attr, | |
4123 | &pmcraid_driver_version_attr, | |
4124 | &pmcraid_adapter_id_attr, | |
4125 | NULL, | |
4126 | }; | |
4127 | ||
4128 | ||
4129 | /* host template structure for pmcraid driver */ | |
4130 | static struct scsi_host_template pmcraid_host_template = { | |
4131 | .module = THIS_MODULE, | |
4132 | .name = PMCRAID_DRIVER_NAME, | |
4133 | .queuecommand = pmcraid_queuecommand, | |
4134 | .eh_abort_handler = pmcraid_eh_abort_handler, | |
4135 | .eh_bus_reset_handler = pmcraid_eh_bus_reset_handler, | |
4136 | .eh_target_reset_handler = pmcraid_eh_target_reset_handler, | |
4137 | .eh_device_reset_handler = pmcraid_eh_device_reset_handler, | |
4138 | .eh_host_reset_handler = pmcraid_eh_host_reset_handler, | |
4139 | ||
4140 | .slave_alloc = pmcraid_slave_alloc, | |
4141 | .slave_configure = pmcraid_slave_configure, | |
4142 | .slave_destroy = pmcraid_slave_destroy, | |
4143 | .change_queue_depth = pmcraid_change_queue_depth, | |
89a36810 AR |
4144 | .can_queue = PMCRAID_MAX_IO_CMD, |
4145 | .this_id = -1, | |
4146 | .sg_tablesize = PMCRAID_MAX_IOADLS, | |
4147 | .max_sectors = PMCRAID_IOA_MAX_SECTORS, | |
54b2b50c | 4148 | .no_write_same = 1, |
89a36810 | 4149 | .cmd_per_lun = PMCRAID_MAX_CMD_PER_LUN, |
89a36810 | 4150 | .shost_attrs = pmcraid_host_attrs, |
2ecb204d | 4151 | .proc_name = PMCRAID_DRIVER_NAME, |
89a36810 AR |
4152 | }; |
4153 | ||
c20c4267 AR |
4154 | /* |
4155 | * pmcraid_isr_msix - implements MSI-X interrupt handling routine | |
4156 | * @irq: interrupt vector number | |
4157 | * @dev_id: pointer hrrq_vector | |
89a36810 AR |
4158 | * |
4159 | * Return Value | |
c20c4267 | 4160 | * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored |
89a36810 | 4161 | */ |
c20c4267 AR |
4162 | |
4163 | static irqreturn_t pmcraid_isr_msix(int irq, void *dev_id) | |
89a36810 | 4164 | { |
c20c4267 AR |
4165 | struct pmcraid_isr_param *hrrq_vector; |
4166 | struct pmcraid_instance *pinstance; | |
4167 | unsigned long lock_flags; | |
4168 | u32 intrs_val; | |
4169 | int hrrq_id; | |
4170 | ||
4171 | hrrq_vector = (struct pmcraid_isr_param *)dev_id; | |
4172 | hrrq_id = hrrq_vector->hrrq_id; | |
4173 | pinstance = hrrq_vector->drv_inst; | |
4174 | ||
4175 | if (!hrrq_id) { | |
4176 | /* Read the interrupt */ | |
4177 | intrs_val = pmcraid_read_interrupts(pinstance); | |
4178 | if (intrs_val && | |
4179 | ((ioread32(pinstance->int_regs.host_ioa_interrupt_reg) | |
4180 | & DOORBELL_INTR_MSIX_CLR) == 0)) { | |
4181 | /* Any error interrupts including unit_check, | |
4182 | * initiate IOA reset.In case of unit check indicate | |
4183 | * to reset_sequence that IOA unit checked and prepare | |
4184 | * for a dump during reset sequence | |
4185 | */ | |
4186 | if (intrs_val & PMCRAID_ERROR_INTERRUPTS) { | |
4187 | if (intrs_val & INTRS_IOA_UNIT_CHECK) | |
4188 | pinstance->ioa_unit_check = 1; | |
4189 | ||
4190 | pmcraid_err("ISR: error interrupts: %x \ | |
4191 | initiating reset\n", intrs_val); | |
4192 | spin_lock_irqsave(pinstance->host->host_lock, | |
4193 | lock_flags); | |
4194 | pmcraid_initiate_reset(pinstance); | |
4195 | spin_unlock_irqrestore( | |
4196 | pinstance->host->host_lock, | |
4197 | lock_flags); | |
4198 | } | |
4199 | /* If interrupt was as part of the ioa initialization, | |
4200 | * clear it. Delete the timer and wakeup the | |
4201 | * reset engine to proceed with reset sequence | |
4202 | */ | |
4203 | if (intrs_val & INTRS_TRANSITION_TO_OPERATIONAL) | |
4204 | pmcraid_clr_trans_op(pinstance); | |
4205 | ||
4206 | /* Clear the interrupt register by writing | |
4207 | * to host to ioa doorbell. Once done | |
4208 | * FW will clear the interrupt. | |
4209 | */ | |
4210 | iowrite32(DOORBELL_INTR_MSIX_CLR, | |
4211 | pinstance->int_regs.host_ioa_interrupt_reg); | |
4212 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
4213 | ||
89a36810 | 4214 | |
c20c4267 AR |
4215 | } |
4216 | } | |
4217 | ||
4218 | tasklet_schedule(&(pinstance->isr_tasklet[hrrq_id])); | |
4219 | ||
4220 | return IRQ_HANDLED; | |
89a36810 AR |
4221 | } |
4222 | ||
4223 | /** | |
c20c4267 | 4224 | * pmcraid_isr - implements legacy interrupt handling routine |
89a36810 AR |
4225 | * |
4226 | * @irq: interrupt vector number | |
4227 | * @dev_id: pointer hrrq_vector | |
4228 | * | |
4229 | * Return Value | |
4230 | * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored | |
4231 | */ | |
4232 | static irqreturn_t pmcraid_isr(int irq, void *dev_id) | |
4233 | { | |
4234 | struct pmcraid_isr_param *hrrq_vector; | |
4235 | struct pmcraid_instance *pinstance; | |
89a36810 | 4236 | u32 intrs; |
c20c4267 AR |
4237 | unsigned long lock_flags; |
4238 | int hrrq_id = 0; | |
89a36810 AR |
4239 | |
4240 | /* In case of legacy interrupt mode where interrupts are shared across | |
4241 | * isrs, it may be possible that the current interrupt is not from IOA | |
4242 | */ | |
4243 | if (!dev_id) { | |
4244 | printk(KERN_INFO "%s(): NULL host pointer\n", __func__); | |
4245 | return IRQ_NONE; | |
4246 | } | |
89a36810 AR |
4247 | hrrq_vector = (struct pmcraid_isr_param *)dev_id; |
4248 | pinstance = hrrq_vector->drv_inst; | |
4249 | ||
89a36810 AR |
4250 | intrs = pmcraid_read_interrupts(pinstance); |
4251 | ||
c20c4267 | 4252 | if (unlikely((intrs & PMCRAID_PCI_INTERRUPTS) == 0)) |
89a36810 | 4253 | return IRQ_NONE; |
89a36810 AR |
4254 | |
4255 | /* Any error interrupts including unit_check, initiate IOA reset. | |
4256 | * In case of unit check indicate to reset_sequence that IOA unit | |
4257 | * checked and prepare for a dump during reset sequence | |
4258 | */ | |
4259 | if (intrs & PMCRAID_ERROR_INTERRUPTS) { | |
4260 | ||
4261 | if (intrs & INTRS_IOA_UNIT_CHECK) | |
4262 | pinstance->ioa_unit_check = 1; | |
4263 | ||
4264 | iowrite32(intrs, | |
4265 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
4266 | pmcraid_err("ISR: error interrupts: %x initiating reset\n", | |
4267 | intrs); | |
c20c4267 AR |
4268 | intrs = ioread32( |
4269 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
4270 | spin_lock_irqsave(pinstance->host->host_lock, lock_flags); | |
89a36810 | 4271 | pmcraid_initiate_reset(pinstance); |
c20c4267 | 4272 | spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); |
89a36810 | 4273 | } else { |
c20c4267 AR |
4274 | /* If interrupt was as part of the ioa initialization, |
4275 | * clear. Delete the timer and wakeup the | |
4276 | * reset engine to proceed with reset sequence | |
4277 | */ | |
4278 | if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) { | |
4279 | pmcraid_clr_trans_op(pinstance); | |
4280 | } else { | |
4281 | iowrite32(intrs, | |
4282 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
4283 | ioread32( | |
4284 | pinstance->int_regs.ioa_host_interrupt_clr_reg); | |
89a36810 | 4285 | |
c20c4267 AR |
4286 | tasklet_schedule( |
4287 | &(pinstance->isr_tasklet[hrrq_id])); | |
4288 | } | |
4289 | } | |
89a36810 AR |
4290 | |
4291 | return IRQ_HANDLED; | |
4292 | } | |
4293 | ||
4294 | ||
4295 | /** | |
4296 | * pmcraid_worker_function - worker thread function | |
4297 | * | |
4298 | * @workp: pointer to struct work queue | |
4299 | * | |
4300 | * Return Value | |
4301 | * None | |
4302 | */ | |
4303 | ||
4304 | static void pmcraid_worker_function(struct work_struct *workp) | |
4305 | { | |
4306 | struct pmcraid_instance *pinstance; | |
4307 | struct pmcraid_resource_entry *res; | |
4308 | struct pmcraid_resource_entry *temp; | |
4309 | struct scsi_device *sdev; | |
4310 | unsigned long lock_flags; | |
4311 | unsigned long host_lock_flags; | |
c20c4267 | 4312 | u16 fw_version; |
89a36810 AR |
4313 | u8 bus, target, lun; |
4314 | ||
4315 | pinstance = container_of(workp, struct pmcraid_instance, worker_q); | |
4316 | /* add resources only after host is added into system */ | |
4317 | if (!atomic_read(&pinstance->expose_resources)) | |
4318 | return; | |
4319 | ||
c20c4267 AR |
4320 | fw_version = be16_to_cpu(pinstance->inq_data->fw_version); |
4321 | ||
89a36810 AR |
4322 | spin_lock_irqsave(&pinstance->resource_lock, lock_flags); |
4323 | list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) { | |
4324 | ||
4325 | if (res->change_detected == RES_CHANGE_DEL && res->scsi_dev) { | |
4326 | sdev = res->scsi_dev; | |
4327 | ||
4328 | /* host_lock must be held before calling | |
4329 | * scsi_device_get | |
4330 | */ | |
4331 | spin_lock_irqsave(pinstance->host->host_lock, | |
4332 | host_lock_flags); | |
4333 | if (!scsi_device_get(sdev)) { | |
4334 | spin_unlock_irqrestore( | |
4335 | pinstance->host->host_lock, | |
4336 | host_lock_flags); | |
4337 | pmcraid_info("deleting %x from midlayer\n", | |
4338 | res->cfg_entry.resource_address); | |
4339 | list_move_tail(&res->queue, | |
4340 | &pinstance->free_res_q); | |
4341 | spin_unlock_irqrestore( | |
4342 | &pinstance->resource_lock, | |
4343 | lock_flags); | |
4344 | scsi_remove_device(sdev); | |
4345 | scsi_device_put(sdev); | |
4346 | spin_lock_irqsave(&pinstance->resource_lock, | |
4347 | lock_flags); | |
4348 | res->change_detected = 0; | |
4349 | } else { | |
4350 | spin_unlock_irqrestore( | |
4351 | pinstance->host->host_lock, | |
4352 | host_lock_flags); | |
4353 | } | |
4354 | } | |
4355 | } | |
4356 | ||
4357 | list_for_each_entry(res, &pinstance->used_res_q, queue) { | |
4358 | ||
4359 | if (res->change_detected == RES_CHANGE_ADD) { | |
4360 | ||
c20c4267 AR |
4361 | if (!pmcraid_expose_resource(fw_version, |
4362 | &res->cfg_entry)) | |
89a36810 AR |
4363 | continue; |
4364 | ||
4365 | if (RES_IS_VSET(res->cfg_entry)) { | |
4366 | bus = PMCRAID_VSET_BUS_ID; | |
c20c4267 AR |
4367 | if (fw_version <= PMCRAID_FW_VERSION_1) |
4368 | target = res->cfg_entry.unique_flags1; | |
4369 | else | |
45c80be6 | 4370 | target = le16_to_cpu(res->cfg_entry.array_id) & 0xFF; |
89a36810 AR |
4371 | lun = PMCRAID_VSET_LUN_ID; |
4372 | } else { | |
4373 | bus = PMCRAID_PHYS_BUS_ID; | |
4374 | target = | |
4375 | RES_TARGET( | |
4376 | res->cfg_entry.resource_address); | |
4377 | lun = RES_LUN(res->cfg_entry.resource_address); | |
4378 | } | |
4379 | ||
4380 | res->change_detected = 0; | |
4381 | spin_unlock_irqrestore(&pinstance->resource_lock, | |
4382 | lock_flags); | |
4383 | scsi_add_device(pinstance->host, bus, target, lun); | |
4384 | spin_lock_irqsave(&pinstance->resource_lock, | |
4385 | lock_flags); | |
4386 | } | |
4387 | } | |
4388 | ||
4389 | spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags); | |
4390 | } | |
4391 | ||
4392 | /** | |
4393 | * pmcraid_tasklet_function - Tasklet function | |
4394 | * | |
4395 | * @instance: pointer to msix param structure | |
4396 | * | |
4397 | * Return Value | |
4398 | * None | |
4399 | */ | |
c20c4267 | 4400 | static void pmcraid_tasklet_function(unsigned long instance) |
89a36810 AR |
4401 | { |
4402 | struct pmcraid_isr_param *hrrq_vector; | |
4403 | struct pmcraid_instance *pinstance; | |
4404 | unsigned long hrrq_lock_flags; | |
4405 | unsigned long pending_lock_flags; | |
4406 | unsigned long host_lock_flags; | |
4407 | spinlock_t *lockp; /* hrrq buffer lock */ | |
4408 | int id; | |
45c80be6 | 4409 | u32 resp; |
89a36810 AR |
4410 | |
4411 | hrrq_vector = (struct pmcraid_isr_param *)instance; | |
4412 | pinstance = hrrq_vector->drv_inst; | |
4413 | id = hrrq_vector->hrrq_id; | |
4414 | lockp = &(pinstance->hrrq_lock[id]); | |
89a36810 AR |
4415 | |
4416 | /* loop through each of the commands responded by IOA. Each HRRQ buf is | |
4417 | * protected by its own lock. Traversals must be done within this lock | |
4418 | * as there may be multiple tasklets running on multiple CPUs. Note | |
4419 | * that the lock is held just for picking up the response handle and | |
4420 | * manipulating hrrq_curr/toggle_bit values. | |
4421 | */ | |
4422 | spin_lock_irqsave(lockp, hrrq_lock_flags); | |
4423 | ||
4424 | resp = le32_to_cpu(*(pinstance->hrrq_curr[id])); | |
4425 | ||
4426 | while ((resp & HRRQ_TOGGLE_BIT) == | |
4427 | pinstance->host_toggle_bit[id]) { | |
4428 | ||
4429 | int cmd_index = resp >> 2; | |
4430 | struct pmcraid_cmd *cmd = NULL; | |
4431 | ||
89a36810 AR |
4432 | if (pinstance->hrrq_curr[id] < pinstance->hrrq_end[id]) { |
4433 | pinstance->hrrq_curr[id]++; | |
4434 | } else { | |
4435 | pinstance->hrrq_curr[id] = pinstance->hrrq_start[id]; | |
4436 | pinstance->host_toggle_bit[id] ^= 1u; | |
4437 | } | |
4438 | ||
c20c4267 AR |
4439 | if (cmd_index >= PMCRAID_MAX_CMD) { |
4440 | /* In case of invalid response handle, log message */ | |
4441 | pmcraid_err("Invalid response handle %d\n", cmd_index); | |
4442 | resp = le32_to_cpu(*(pinstance->hrrq_curr[id])); | |
4443 | continue; | |
4444 | } | |
4445 | ||
4446 | cmd = pinstance->cmd_list[cmd_index]; | |
89a36810 AR |
4447 | spin_unlock_irqrestore(lockp, hrrq_lock_flags); |
4448 | ||
4449 | spin_lock_irqsave(&pinstance->pending_pool_lock, | |
4450 | pending_lock_flags); | |
4451 | list_del(&cmd->free_list); | |
4452 | spin_unlock_irqrestore(&pinstance->pending_pool_lock, | |
4453 | pending_lock_flags); | |
4454 | del_timer(&cmd->timer); | |
4455 | atomic_dec(&pinstance->outstanding_cmds); | |
4456 | ||
4457 | if (cmd->cmd_done == pmcraid_ioa_reset) { | |
4458 | spin_lock_irqsave(pinstance->host->host_lock, | |
4459 | host_lock_flags); | |
4460 | cmd->cmd_done(cmd); | |
4461 | spin_unlock_irqrestore(pinstance->host->host_lock, | |
4462 | host_lock_flags); | |
4463 | } else if (cmd->cmd_done != NULL) { | |
4464 | cmd->cmd_done(cmd); | |
4465 | } | |
4466 | /* loop over until we are done with all responses */ | |
4467 | spin_lock_irqsave(lockp, hrrq_lock_flags); | |
4468 | resp = le32_to_cpu(*(pinstance->hrrq_curr[id])); | |
4469 | } | |
4470 | ||
4471 | spin_unlock_irqrestore(lockp, hrrq_lock_flags); | |
4472 | } | |
4473 | ||
4474 | /** | |
4475 | * pmcraid_unregister_interrupt_handler - de-register interrupts handlers | |
4476 | * @pinstance: pointer to adapter instance structure | |
4477 | * | |
4478 | * This routine un-registers registered interrupt handler and | |
4479 | * also frees irqs/vectors. | |
4480 | * | |
4481 | * Retun Value | |
4482 | * None | |
4483 | */ | |
4484 | static | |
4485 | void pmcraid_unregister_interrupt_handler(struct pmcraid_instance *pinstance) | |
4486 | { | |
eab5c150 | 4487 | struct pci_dev *pdev = pinstance->pdev; |
c20c4267 AR |
4488 | int i; |
4489 | ||
4490 | for (i = 0; i < pinstance->num_hrrq; i++) | |
eab5c150 | 4491 | free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]); |
c20c4267 | 4492 | |
eab5c150 CH |
4493 | pinstance->interrupt_mode = 0; |
4494 | pci_free_irq_vectors(pdev); | |
89a36810 AR |
4495 | } |
4496 | ||
4497 | /** | |
4498 | * pmcraid_register_interrupt_handler - registers interrupt handler | |
4499 | * @pinstance: pointer to per-adapter instance structure | |
4500 | * | |
4501 | * Return Value | |
4502 | * 0 on success, non-zero error code otherwise. | |
4503 | */ | |
4504 | static int | |
4505 | pmcraid_register_interrupt_handler(struct pmcraid_instance *pinstance) | |
4506 | { | |
4507 | struct pci_dev *pdev = pinstance->pdev; | |
eab5c150 CH |
4508 | unsigned int irq_flag = PCI_IRQ_LEGACY, flag; |
4509 | int num_hrrq, rc, i; | |
4510 | irq_handler_t isr; | |
89a36810 | 4511 | |
eab5c150 CH |
4512 | if (pmcraid_enable_msix) |
4513 | irq_flag |= PCI_IRQ_MSIX; | |
4514 | ||
4515 | num_hrrq = pci_alloc_irq_vectors(pdev, 1, PMCRAID_NUM_MSIX_VECTORS, | |
4516 | irq_flag); | |
4517 | if (num_hrrq < 0) | |
4518 | return num_hrrq; | |
4519 | ||
4520 | if (pdev->msix_enabled) { | |
4521 | flag = 0; | |
4522 | isr = pmcraid_isr_msix; | |
4523 | } else { | |
4524 | flag = IRQF_SHARED; | |
4525 | isr = pmcraid_isr; | |
4526 | } | |
4527 | ||
4528 | for (i = 0; i < num_hrrq; i++) { | |
4529 | struct pmcraid_isr_param *vec = &pinstance->hrrq_vector[i]; | |
4530 | ||
4531 | vec->hrrq_id = i; | |
4532 | vec->drv_inst = pinstance; | |
4533 | rc = request_irq(pci_irq_vector(pdev, i), isr, flag, | |
4534 | PMCRAID_DRIVER_NAME, vec); | |
4535 | if (rc) | |
4536 | goto out_unwind; | |
4537 | } | |
c20c4267 | 4538 | |
eab5c150 CH |
4539 | pinstance->num_hrrq = num_hrrq; |
4540 | if (pdev->msix_enabled) { | |
c20c4267 AR |
4541 | pinstance->interrupt_mode = 1; |
4542 | iowrite32(DOORBELL_INTR_MODE_MSIX, | |
4543 | pinstance->int_regs.host_ioa_interrupt_reg); | |
4544 | ioread32(pinstance->int_regs.host_ioa_interrupt_reg); | |
c20c4267 AR |
4545 | } |
4546 | ||
eab5c150 CH |
4547 | return 0; |
4548 | ||
4549 | out_unwind: | |
4550 | while (--i > 0) | |
4551 | free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]); | |
4552 | pci_free_irq_vectors(pdev); | |
c20c4267 | 4553 | return rc; |
89a36810 AR |
4554 | } |
4555 | ||
4556 | /** | |
4557 | * pmcraid_release_cmd_blocks - release buufers allocated for command blocks | |
4558 | * @pinstance: per adapter instance structure pointer | |
4559 | * @max_index: number of buffer blocks to release | |
4560 | * | |
4561 | * Return Value | |
4562 | * None | |
4563 | */ | |
4564 | static void | |
4565 | pmcraid_release_cmd_blocks(struct pmcraid_instance *pinstance, int max_index) | |
4566 | { | |
4567 | int i; | |
4568 | for (i = 0; i < max_index; i++) { | |
4569 | kmem_cache_free(pinstance->cmd_cachep, pinstance->cmd_list[i]); | |
4570 | pinstance->cmd_list[i] = NULL; | |
4571 | } | |
4572 | kmem_cache_destroy(pinstance->cmd_cachep); | |
4573 | pinstance->cmd_cachep = NULL; | |
4574 | } | |
4575 | ||
4576 | /** | |
4577 | * pmcraid_release_control_blocks - releases buffers alloced for control blocks | |
4578 | * @pinstance: pointer to per adapter instance structure | |
4579 | * @max_index: number of buffers (from 0 onwards) to release | |
4580 | * | |
4581 | * This function assumes that the command blocks for which control blocks are | |
4582 | * linked are not released. | |
4583 | * | |
4584 | * Return Value | |
4585 | * None | |
4586 | */ | |
4587 | static void | |
4588 | pmcraid_release_control_blocks( | |
4589 | struct pmcraid_instance *pinstance, | |
4590 | int max_index | |
4591 | ) | |
4592 | { | |
4593 | int i; | |
4594 | ||
4595 | if (pinstance->control_pool == NULL) | |
4596 | return; | |
4597 | ||
4598 | for (i = 0; i < max_index; i++) { | |
a7ec87a9 | 4599 | dma_pool_free(pinstance->control_pool, |
89a36810 AR |
4600 | pinstance->cmd_list[i]->ioa_cb, |
4601 | pinstance->cmd_list[i]->ioa_cb_bus_addr); | |
4602 | pinstance->cmd_list[i]->ioa_cb = NULL; | |
4603 | pinstance->cmd_list[i]->ioa_cb_bus_addr = 0; | |
4604 | } | |
a7ec87a9 | 4605 | dma_pool_destroy(pinstance->control_pool); |
89a36810 AR |
4606 | pinstance->control_pool = NULL; |
4607 | } | |
4608 | ||
4609 | /** | |
4610 | * pmcraid_allocate_cmd_blocks - allocate memory for cmd block structures | |
4611 | * @pinstance - pointer to per adapter instance structure | |
4612 | * | |
4613 | * Allocates memory for command blocks using kernel slab allocator. | |
4614 | * | |
4615 | * Return Value | |
4616 | * 0 in case of success; -ENOMEM in case of failure | |
4617 | */ | |
6f039790 | 4618 | static int pmcraid_allocate_cmd_blocks(struct pmcraid_instance *pinstance) |
89a36810 AR |
4619 | { |
4620 | int i; | |
4621 | ||
4622 | sprintf(pinstance->cmd_pool_name, "pmcraid_cmd_pool_%d", | |
4623 | pinstance->host->unique_id); | |
4624 | ||
4625 | ||
4626 | pinstance->cmd_cachep = kmem_cache_create( | |
4627 | pinstance->cmd_pool_name, | |
4628 | sizeof(struct pmcraid_cmd), 0, | |
4629 | SLAB_HWCACHE_ALIGN, NULL); | |
4630 | if (!pinstance->cmd_cachep) | |
4631 | return -ENOMEM; | |
4632 | ||
4633 | for (i = 0; i < PMCRAID_MAX_CMD; i++) { | |
4634 | pinstance->cmd_list[i] = | |
4635 | kmem_cache_alloc(pinstance->cmd_cachep, GFP_KERNEL); | |
4636 | if (!pinstance->cmd_list[i]) { | |
4637 | pmcraid_release_cmd_blocks(pinstance, i); | |
4638 | return -ENOMEM; | |
4639 | } | |
4640 | } | |
4641 | return 0; | |
4642 | } | |
4643 | ||
4644 | /** | |
4645 | * pmcraid_allocate_control_blocks - allocates memory control blocks | |
4646 | * @pinstance : pointer to per adapter instance structure | |
4647 | * | |
4648 | * This function allocates PCI memory for DMAable buffers like IOARCB, IOADLs | |
4649 | * and IOASAs. This is called after command blocks are already allocated. | |
4650 | * | |
4651 | * Return Value | |
4652 | * 0 in case it can allocate all control blocks, otherwise -ENOMEM | |
4653 | */ | |
6f039790 | 4654 | static int pmcraid_allocate_control_blocks(struct pmcraid_instance *pinstance) |
89a36810 AR |
4655 | { |
4656 | int i; | |
4657 | ||
4658 | sprintf(pinstance->ctl_pool_name, "pmcraid_control_pool_%d", | |
4659 | pinstance->host->unique_id); | |
4660 | ||
4661 | pinstance->control_pool = | |
a7ec87a9 RP |
4662 | dma_pool_create(pinstance->ctl_pool_name, |
4663 | &pinstance->pdev->dev, | |
89a36810 AR |
4664 | sizeof(struct pmcraid_control_block), |
4665 | PMCRAID_IOARCB_ALIGNMENT, 0); | |
4666 | ||
4667 | if (!pinstance->control_pool) | |
4668 | return -ENOMEM; | |
4669 | ||
4670 | for (i = 0; i < PMCRAID_MAX_CMD; i++) { | |
4671 | pinstance->cmd_list[i]->ioa_cb = | |
a7ec87a9 | 4672 | dma_pool_alloc( |
89a36810 AR |
4673 | pinstance->control_pool, |
4674 | GFP_KERNEL, | |
4675 | &(pinstance->cmd_list[i]->ioa_cb_bus_addr)); | |
4676 | ||
4677 | if (!pinstance->cmd_list[i]->ioa_cb) { | |
4678 | pmcraid_release_control_blocks(pinstance, i); | |
4679 | return -ENOMEM; | |
4680 | } | |
4681 | memset(pinstance->cmd_list[i]->ioa_cb, 0, | |
4682 | sizeof(struct pmcraid_control_block)); | |
4683 | } | |
4684 | return 0; | |
4685 | } | |
4686 | ||
4687 | /** | |
4688 | * pmcraid_release_host_rrqs - release memory allocated for hrrq buffer(s) | |
4689 | * @pinstance: pointer to per adapter instance structure | |
4690 | * @maxindex: size of hrrq buffer pointer array | |
4691 | * | |
4692 | * Return Value | |
4693 | * None | |
4694 | */ | |
4695 | static void | |
4696 | pmcraid_release_host_rrqs(struct pmcraid_instance *pinstance, int maxindex) | |
4697 | { | |
4698 | int i; | |
89a36810 | 4699 | |
371a6c32 CH |
4700 | for (i = 0; i < maxindex; i++) { |
4701 | dma_free_coherent(&pinstance->pdev->dev, | |
89a36810 AR |
4702 | HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD, |
4703 | pinstance->hrrq_start[i], | |
4704 | pinstance->hrrq_start_bus_addr[i]); | |
4705 | ||
4706 | /* reset pointers and toggle bit to zeros */ | |
4707 | pinstance->hrrq_start[i] = NULL; | |
4708 | pinstance->hrrq_start_bus_addr[i] = 0; | |
4709 | pinstance->host_toggle_bit[i] = 0; | |
4710 | } | |
4711 | } | |
4712 | ||
4713 | /** | |
4714 | * pmcraid_allocate_host_rrqs - Allocate and initialize host RRQ buffers | |
4715 | * @pinstance: pointer to per adapter instance structure | |
4716 | * | |
4717 | * Return value | |
4718 | * 0 hrrq buffers are allocated, -ENOMEM otherwise. | |
4719 | */ | |
6f039790 | 4720 | static int pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance) |
89a36810 | 4721 | { |
c20c4267 | 4722 | int i, buffer_size; |
89a36810 | 4723 | |
c20c4267 | 4724 | buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD; |
89a36810 | 4725 | |
c20c4267 | 4726 | for (i = 0; i < pinstance->num_hrrq; i++) { |
89a36810 | 4727 | pinstance->hrrq_start[i] = |
371a6c32 CH |
4728 | dma_alloc_coherent(&pinstance->pdev->dev, buffer_size, |
4729 | &pinstance->hrrq_start_bus_addr[i], | |
4730 | GFP_KERNEL); | |
144b139c | 4731 | if (!pinstance->hrrq_start[i]) { |
c20c4267 AR |
4732 | pmcraid_err("pci_alloc failed for hrrq vector : %d\n", |
4733 | i); | |
89a36810 AR |
4734 | pmcraid_release_host_rrqs(pinstance, i); |
4735 | return -ENOMEM; | |
4736 | } | |
4737 | ||
4738 | memset(pinstance->hrrq_start[i], 0, buffer_size); | |
4739 | pinstance->hrrq_curr[i] = pinstance->hrrq_start[i]; | |
4740 | pinstance->hrrq_end[i] = | |
c20c4267 | 4741 | pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1; |
89a36810 AR |
4742 | pinstance->host_toggle_bit[i] = 1; |
4743 | spin_lock_init(&pinstance->hrrq_lock[i]); | |
4744 | } | |
4745 | return 0; | |
4746 | } | |
4747 | ||
4748 | /** | |
4749 | * pmcraid_release_hcams - release HCAM buffers | |
4750 | * | |
4751 | * @pinstance: pointer to per adapter instance structure | |
4752 | * | |
4753 | * Return value | |
4754 | * none | |
4755 | */ | |
4756 | static void pmcraid_release_hcams(struct pmcraid_instance *pinstance) | |
4757 | { | |
4758 | if (pinstance->ccn.msg != NULL) { | |
371a6c32 | 4759 | dma_free_coherent(&pinstance->pdev->dev, |
89a36810 | 4760 | PMCRAID_AEN_HDR_SIZE + |
c20c4267 | 4761 | sizeof(struct pmcraid_hcam_ccn_ext), |
89a36810 AR |
4762 | pinstance->ccn.msg, |
4763 | pinstance->ccn.baddr); | |
4764 | ||
4765 | pinstance->ccn.msg = NULL; | |
4766 | pinstance->ccn.hcam = NULL; | |
4767 | pinstance->ccn.baddr = 0; | |
4768 | } | |
4769 | ||
4770 | if (pinstance->ldn.msg != NULL) { | |
371a6c32 | 4771 | dma_free_coherent(&pinstance->pdev->dev, |
89a36810 AR |
4772 | PMCRAID_AEN_HDR_SIZE + |
4773 | sizeof(struct pmcraid_hcam_ldn), | |
4774 | pinstance->ldn.msg, | |
4775 | pinstance->ldn.baddr); | |
4776 | ||
4777 | pinstance->ldn.msg = NULL; | |
4778 | pinstance->ldn.hcam = NULL; | |
4779 | pinstance->ldn.baddr = 0; | |
4780 | } | |
4781 | } | |
4782 | ||
4783 | /** | |
4784 | * pmcraid_allocate_hcams - allocates HCAM buffers | |
4785 | * @pinstance : pointer to per adapter instance structure | |
4786 | * | |
4787 | * Return Value: | |
4788 | * 0 in case of successful allocation, non-zero otherwise | |
4789 | */ | |
4790 | static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance) | |
4791 | { | |
371a6c32 | 4792 | pinstance->ccn.msg = dma_alloc_coherent(&pinstance->pdev->dev, |
89a36810 | 4793 | PMCRAID_AEN_HDR_SIZE + |
c20c4267 | 4794 | sizeof(struct pmcraid_hcam_ccn_ext), |
371a6c32 | 4795 | &pinstance->ccn.baddr, GFP_KERNEL); |
89a36810 | 4796 | |
371a6c32 | 4797 | pinstance->ldn.msg = dma_alloc_coherent(&pinstance->pdev->dev, |
89a36810 AR |
4798 | PMCRAID_AEN_HDR_SIZE + |
4799 | sizeof(struct pmcraid_hcam_ldn), | |
371a6c32 | 4800 | &pinstance->ldn.baddr, GFP_KERNEL); |
89a36810 AR |
4801 | |
4802 | if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) { | |
4803 | pmcraid_release_hcams(pinstance); | |
4804 | } else { | |
4805 | pinstance->ccn.hcam = | |
4806 | (void *)pinstance->ccn.msg + PMCRAID_AEN_HDR_SIZE; | |
4807 | pinstance->ldn.hcam = | |
4808 | (void *)pinstance->ldn.msg + PMCRAID_AEN_HDR_SIZE; | |
4809 | ||
4810 | atomic_set(&pinstance->ccn.ignore, 0); | |
4811 | atomic_set(&pinstance->ldn.ignore, 0); | |
4812 | } | |
4813 | ||
4814 | return (pinstance->ldn.msg == NULL) ? -ENOMEM : 0; | |
4815 | } | |
4816 | ||
4817 | /** | |
4818 | * pmcraid_release_config_buffers - release config.table buffers | |
4819 | * @pinstance: pointer to per adapter instance structure | |
4820 | * | |
4821 | * Return Value | |
4822 | * none | |
4823 | */ | |
4824 | static void pmcraid_release_config_buffers(struct pmcraid_instance *pinstance) | |
4825 | { | |
4826 | if (pinstance->cfg_table != NULL && | |
4827 | pinstance->cfg_table_bus_addr != 0) { | |
371a6c32 | 4828 | dma_free_coherent(&pinstance->pdev->dev, |
89a36810 AR |
4829 | sizeof(struct pmcraid_config_table), |
4830 | pinstance->cfg_table, | |
4831 | pinstance->cfg_table_bus_addr); | |
4832 | pinstance->cfg_table = NULL; | |
4833 | pinstance->cfg_table_bus_addr = 0; | |
4834 | } | |
4835 | ||
4836 | if (pinstance->res_entries != NULL) { | |
4837 | int i; | |
4838 | ||
4839 | for (i = 0; i < PMCRAID_MAX_RESOURCES; i++) | |
4840 | list_del(&pinstance->res_entries[i].queue); | |
4841 | kfree(pinstance->res_entries); | |
4842 | pinstance->res_entries = NULL; | |
4843 | } | |
4844 | ||
4845 | pmcraid_release_hcams(pinstance); | |
4846 | } | |
4847 | ||
4848 | /** | |
4849 | * pmcraid_allocate_config_buffers - allocates DMAable memory for config table | |
4850 | * @pinstance : pointer to per adapter instance structure | |
4851 | * | |
4852 | * Return Value | |
4853 | * 0 for successful allocation, -ENOMEM for any failure | |
4854 | */ | |
6f039790 | 4855 | static int pmcraid_allocate_config_buffers(struct pmcraid_instance *pinstance) |
89a36810 AR |
4856 | { |
4857 | int i; | |
4858 | ||
4859 | pinstance->res_entries = | |
6396bb22 KC |
4860 | kcalloc(PMCRAID_MAX_RESOURCES, |
4861 | sizeof(struct pmcraid_resource_entry), | |
4862 | GFP_KERNEL); | |
89a36810 AR |
4863 | |
4864 | if (NULL == pinstance->res_entries) { | |
4865 | pmcraid_err("failed to allocate memory for resource table\n"); | |
4866 | return -ENOMEM; | |
4867 | } | |
4868 | ||
4869 | for (i = 0; i < PMCRAID_MAX_RESOURCES; i++) | |
4870 | list_add_tail(&pinstance->res_entries[i].queue, | |
4871 | &pinstance->free_res_q); | |
4872 | ||
371a6c32 | 4873 | pinstance->cfg_table = dma_alloc_coherent(&pinstance->pdev->dev, |
89a36810 | 4874 | sizeof(struct pmcraid_config_table), |
371a6c32 CH |
4875 | &pinstance->cfg_table_bus_addr, |
4876 | GFP_KERNEL); | |
89a36810 AR |
4877 | |
4878 | if (NULL == pinstance->cfg_table) { | |
4879 | pmcraid_err("couldn't alloc DMA memory for config table\n"); | |
4880 | pmcraid_release_config_buffers(pinstance); | |
4881 | return -ENOMEM; | |
4882 | } | |
4883 | ||
4884 | if (pmcraid_allocate_hcams(pinstance)) { | |
4885 | pmcraid_err("could not alloc DMA memory for HCAMS\n"); | |
4886 | pmcraid_release_config_buffers(pinstance); | |
4887 | return -ENOMEM; | |
4888 | } | |
4889 | ||
4890 | return 0; | |
4891 | } | |
4892 | ||
4893 | /** | |
4894 | * pmcraid_init_tasklets - registers tasklets for response handling | |
4895 | * | |
4896 | * @pinstance: pointer adapter instance structure | |
4897 | * | |
4898 | * Return value | |
4899 | * none | |
4900 | */ | |
4901 | static void pmcraid_init_tasklets(struct pmcraid_instance *pinstance) | |
4902 | { | |
4903 | int i; | |
4904 | for (i = 0; i < pinstance->num_hrrq; i++) | |
4905 | tasklet_init(&pinstance->isr_tasklet[i], | |
4906 | pmcraid_tasklet_function, | |
4907 | (unsigned long)&pinstance->hrrq_vector[i]); | |
4908 | } | |
4909 | ||
4910 | /** | |
4911 | * pmcraid_kill_tasklets - destroys tasklets registered for response handling | |
4912 | * | |
4913 | * @pinstance: pointer to adapter instance structure | |
4914 | * | |
4915 | * Return value | |
4916 | * none | |
4917 | */ | |
4918 | static void pmcraid_kill_tasklets(struct pmcraid_instance *pinstance) | |
4919 | { | |
4920 | int i; | |
4921 | for (i = 0; i < pinstance->num_hrrq; i++) | |
4922 | tasklet_kill(&pinstance->isr_tasklet[i]); | |
4923 | } | |
4924 | ||
c20c4267 AR |
4925 | /** |
4926 | * pmcraid_release_buffers - release per-adapter buffers allocated | |
4927 | * | |
4928 | * @pinstance: pointer to adapter soft state | |
4929 | * | |
4930 | * Return Value | |
4931 | * none | |
4932 | */ | |
4933 | static void pmcraid_release_buffers(struct pmcraid_instance *pinstance) | |
4934 | { | |
4935 | pmcraid_release_config_buffers(pinstance); | |
4936 | pmcraid_release_control_blocks(pinstance, PMCRAID_MAX_CMD); | |
4937 | pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD); | |
4938 | pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq); | |
4939 | ||
4940 | if (pinstance->inq_data != NULL) { | |
371a6c32 | 4941 | dma_free_coherent(&pinstance->pdev->dev, |
c20c4267 AR |
4942 | sizeof(struct pmcraid_inquiry_data), |
4943 | pinstance->inq_data, | |
4944 | pinstance->inq_data_baddr); | |
4945 | ||
4946 | pinstance->inq_data = NULL; | |
4947 | pinstance->inq_data_baddr = 0; | |
4948 | } | |
592488a3 AR |
4949 | |
4950 | if (pinstance->timestamp_data != NULL) { | |
371a6c32 | 4951 | dma_free_coherent(&pinstance->pdev->dev, |
592488a3 AR |
4952 | sizeof(struct pmcraid_timestamp_data), |
4953 | pinstance->timestamp_data, | |
4954 | pinstance->timestamp_data_baddr); | |
4955 | ||
4956 | pinstance->timestamp_data = NULL; | |
4957 | pinstance->timestamp_data_baddr = 0; | |
4958 | } | |
c20c4267 AR |
4959 | } |
4960 | ||
89a36810 AR |
4961 | /** |
4962 | * pmcraid_init_buffers - allocates memory and initializes various structures | |
4963 | * @pinstance: pointer to per adapter instance structure | |
4964 | * | |
4965 | * This routine pre-allocates memory based on the type of block as below: | |
4966 | * cmdblocks(PMCRAID_MAX_CMD): kernel memory using kernel's slab_allocator, | |
4967 | * IOARCBs(PMCRAID_MAX_CMD) : DMAable memory, using pci pool allocator | |
371a6c32 CH |
4968 | * config-table entries : DMAable memory using dma_alloc_coherent |
4969 | * HostRRQs : DMAable memory, using dma_alloc_coherent | |
89a36810 AR |
4970 | * |
4971 | * Return Value | |
4972 | * 0 in case all of the blocks are allocated, -ENOMEM otherwise. | |
4973 | */ | |
6f039790 | 4974 | static int pmcraid_init_buffers(struct pmcraid_instance *pinstance) |
89a36810 AR |
4975 | { |
4976 | int i; | |
4977 | ||
4978 | if (pmcraid_allocate_host_rrqs(pinstance)) { | |
4979 | pmcraid_err("couldn't allocate memory for %d host rrqs\n", | |
4980 | pinstance->num_hrrq); | |
4981 | return -ENOMEM; | |
4982 | } | |
4983 | ||
4984 | if (pmcraid_allocate_config_buffers(pinstance)) { | |
4985 | pmcraid_err("couldn't allocate memory for config buffers\n"); | |
4986 | pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq); | |
4987 | return -ENOMEM; | |
4988 | } | |
4989 | ||
4990 | if (pmcraid_allocate_cmd_blocks(pinstance)) { | |
c20c4267 | 4991 | pmcraid_err("couldn't allocate memory for cmd blocks\n"); |
89a36810 AR |
4992 | pmcraid_release_config_buffers(pinstance); |
4993 | pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq); | |
4994 | return -ENOMEM; | |
4995 | } | |
4996 | ||
4997 | if (pmcraid_allocate_control_blocks(pinstance)) { | |
c20c4267 | 4998 | pmcraid_err("couldn't allocate memory control blocks\n"); |
89a36810 AR |
4999 | pmcraid_release_config_buffers(pinstance); |
5000 | pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD); | |
5001 | pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq); | |
5002 | return -ENOMEM; | |
5003 | } | |
5004 | ||
c20c4267 | 5005 | /* allocate DMAable memory for page D0 INQUIRY buffer */ |
371a6c32 | 5006 | pinstance->inq_data = dma_alloc_coherent(&pinstance->pdev->dev, |
c20c4267 | 5007 | sizeof(struct pmcraid_inquiry_data), |
371a6c32 | 5008 | &pinstance->inq_data_baddr, GFP_KERNEL); |
c20c4267 AR |
5009 | if (pinstance->inq_data == NULL) { |
5010 | pmcraid_err("couldn't allocate DMA memory for INQUIRY\n"); | |
5011 | pmcraid_release_buffers(pinstance); | |
5012 | return -ENOMEM; | |
5013 | } | |
5014 | ||
592488a3 | 5015 | /* allocate DMAable memory for set timestamp data buffer */ |
371a6c32 | 5016 | pinstance->timestamp_data = dma_alloc_coherent(&pinstance->pdev->dev, |
592488a3 | 5017 | sizeof(struct pmcraid_timestamp_data), |
371a6c32 CH |
5018 | &pinstance->timestamp_data_baddr, |
5019 | GFP_KERNEL); | |
592488a3 AR |
5020 | if (pinstance->timestamp_data == NULL) { |
5021 | pmcraid_err("couldn't allocate DMA memory for \ | |
5022 | set time_stamp \n"); | |
5023 | pmcraid_release_buffers(pinstance); | |
5024 | return -ENOMEM; | |
5025 | } | |
5026 | ||
5027 | ||
89a36810 AR |
5028 | /* Initialize all the command blocks and add them to free pool. No |
5029 | * need to lock (free_pool_lock) as this is done in initialization | |
5030 | * itself | |
5031 | */ | |
5032 | for (i = 0; i < PMCRAID_MAX_CMD; i++) { | |
5033 | struct pmcraid_cmd *cmdp = pinstance->cmd_list[i]; | |
5034 | pmcraid_init_cmdblk(cmdp, i); | |
5035 | cmdp->drv_inst = pinstance; | |
5036 | list_add_tail(&cmdp->free_list, &pinstance->free_cmd_pool); | |
5037 | } | |
5038 | ||
5039 | return 0; | |
5040 | } | |
5041 | ||
5042 | /** | |
5043 | * pmcraid_reinit_buffers - resets various buffer pointers | |
5044 | * @pinstance: pointer to adapter instance | |
5045 | * Return value | |
c20c4267 | 5046 | * none |
89a36810 AR |
5047 | */ |
5048 | static void pmcraid_reinit_buffers(struct pmcraid_instance *pinstance) | |
5049 | { | |
5050 | int i; | |
5051 | int buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD; | |
5052 | ||
5053 | for (i = 0; i < pinstance->num_hrrq; i++) { | |
5054 | memset(pinstance->hrrq_start[i], 0, buffer_size); | |
5055 | pinstance->hrrq_curr[i] = pinstance->hrrq_start[i]; | |
5056 | pinstance->hrrq_end[i] = | |
5057 | pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1; | |
5058 | pinstance->host_toggle_bit[i] = 1; | |
5059 | } | |
5060 | } | |
5061 | ||
5062 | /** | |
5063 | * pmcraid_init_instance - initialize per instance data structure | |
5064 | * @pdev: pointer to pci device structure | |
5065 | * @host: pointer to Scsi_Host structure | |
5066 | * @mapped_pci_addr: memory mapped IOA configuration registers | |
5067 | * | |
5068 | * Return Value | |
5069 | * 0 on success, non-zero in case of any failure | |
5070 | */ | |
6f039790 GKH |
5071 | static int pmcraid_init_instance(struct pci_dev *pdev, struct Scsi_Host *host, |
5072 | void __iomem *mapped_pci_addr) | |
89a36810 AR |
5073 | { |
5074 | struct pmcraid_instance *pinstance = | |
5075 | (struct pmcraid_instance *)host->hostdata; | |
5076 | ||
5077 | pinstance->host = host; | |
5078 | pinstance->pdev = pdev; | |
5079 | ||
5080 | /* Initialize register addresses */ | |
5081 | pinstance->mapped_dma_addr = mapped_pci_addr; | |
5082 | ||
5083 | /* Initialize chip-specific details */ | |
5084 | { | |
5085 | struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg; | |
5086 | struct pmcraid_interrupts *pint_regs = &pinstance->int_regs; | |
5087 | ||
5088 | pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin; | |
5089 | ||
5090 | pint_regs->ioa_host_interrupt_reg = | |
5091 | mapped_pci_addr + chip_cfg->ioa_host_intr; | |
5092 | pint_regs->ioa_host_interrupt_clr_reg = | |
5093 | mapped_pci_addr + chip_cfg->ioa_host_intr_clr; | |
c20c4267 AR |
5094 | pint_regs->ioa_host_msix_interrupt_reg = |
5095 | mapped_pci_addr + chip_cfg->ioa_host_msix_intr; | |
89a36810 AR |
5096 | pint_regs->host_ioa_interrupt_reg = |
5097 | mapped_pci_addr + chip_cfg->host_ioa_intr; | |
5098 | pint_regs->host_ioa_interrupt_clr_reg = | |
5099 | mapped_pci_addr + chip_cfg->host_ioa_intr_clr; | |
5100 | ||
5101 | /* Current version of firmware exposes interrupt mask set | |
5102 | * and mask clr registers through memory mapped bar0. | |
5103 | */ | |
5104 | pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox; | |
5105 | pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus; | |
5106 | pint_regs->ioa_host_interrupt_mask_reg = | |
5107 | mapped_pci_addr + chip_cfg->ioa_host_mask; | |
5108 | pint_regs->ioa_host_interrupt_mask_clr_reg = | |
5109 | mapped_pci_addr + chip_cfg->ioa_host_mask_clr; | |
5110 | pint_regs->global_interrupt_mask_reg = | |
5111 | mapped_pci_addr + chip_cfg->global_intr_mask; | |
5112 | }; | |
5113 | ||
5114 | pinstance->ioa_reset_attempts = 0; | |
5115 | init_waitqueue_head(&pinstance->reset_wait_q); | |
5116 | ||
5117 | atomic_set(&pinstance->outstanding_cmds, 0); | |
c20c4267 | 5118 | atomic_set(&pinstance->last_message_id, 0); |
89a36810 AR |
5119 | atomic_set(&pinstance->expose_resources, 0); |
5120 | ||
5121 | INIT_LIST_HEAD(&pinstance->free_res_q); | |
5122 | INIT_LIST_HEAD(&pinstance->used_res_q); | |
5123 | INIT_LIST_HEAD(&pinstance->free_cmd_pool); | |
5124 | INIT_LIST_HEAD(&pinstance->pending_cmd_pool); | |
5125 | ||
5126 | spin_lock_init(&pinstance->free_pool_lock); | |
5127 | spin_lock_init(&pinstance->pending_pool_lock); | |
5128 | spin_lock_init(&pinstance->resource_lock); | |
5129 | mutex_init(&pinstance->aen_queue_lock); | |
5130 | ||
5131 | /* Work-queue (Shared) for deferred processing error handling */ | |
5132 | INIT_WORK(&pinstance->worker_q, pmcraid_worker_function); | |
5133 | ||
5134 | /* Initialize the default log_level */ | |
5135 | pinstance->current_log_level = pmcraid_log_level; | |
5136 | ||
5137 | /* Setup variables required for reset engine */ | |
5138 | pinstance->ioa_state = IOA_STATE_UNKNOWN; | |
5139 | pinstance->reset_cmd = NULL; | |
5140 | return 0; | |
5141 | } | |
5142 | ||
89a36810 AR |
5143 | /** |
5144 | * pmcraid_shutdown - shutdown adapter controller. | |
5145 | * @pdev: pci device struct | |
5146 | * | |
5147 | * Issues an adapter shutdown to the card waits for its completion | |
5148 | * | |
5149 | * Return value | |
5150 | * none | |
5151 | */ | |
5152 | static void pmcraid_shutdown(struct pci_dev *pdev) | |
5153 | { | |
5154 | struct pmcraid_instance *pinstance = pci_get_drvdata(pdev); | |
5155 | pmcraid_reset_bringdown(pinstance); | |
5156 | } | |
5157 | ||
5158 | ||
5159 | /** | |
5160 | * pmcraid_get_minor - returns unused minor number from minor number bitmap | |
5161 | */ | |
5162 | static unsigned short pmcraid_get_minor(void) | |
5163 | { | |
5164 | int minor; | |
5165 | ||
36d9e0e8 | 5166 | minor = find_first_zero_bit(pmcraid_minor, PMCRAID_MAX_ADAPTERS); |
89a36810 AR |
5167 | __set_bit(minor, pmcraid_minor); |
5168 | return minor; | |
5169 | } | |
5170 | ||
5171 | /** | |
5172 | * pmcraid_release_minor - releases given minor back to minor number bitmap | |
5173 | */ | |
5174 | static void pmcraid_release_minor(unsigned short minor) | |
5175 | { | |
5176 | __clear_bit(minor, pmcraid_minor); | |
5177 | } | |
5178 | ||
5179 | /** | |
5180 | * pmcraid_setup_chrdev - allocates a minor number and registers a char device | |
5181 | * | |
5182 | * @pinstance: pointer to adapter instance for which to register device | |
5183 | * | |
5184 | * Return value | |
5185 | * 0 in case of success, otherwise non-zero | |
5186 | */ | |
5187 | static int pmcraid_setup_chrdev(struct pmcraid_instance *pinstance) | |
5188 | { | |
5189 | int minor; | |
5190 | int error; | |
5191 | ||
5192 | minor = pmcraid_get_minor(); | |
5193 | cdev_init(&pinstance->cdev, &pmcraid_fops); | |
5194 | pinstance->cdev.owner = THIS_MODULE; | |
5195 | ||
5196 | error = cdev_add(&pinstance->cdev, MKDEV(pmcraid_major, minor), 1); | |
5197 | ||
5198 | if (error) | |
5199 | pmcraid_release_minor(minor); | |
5200 | else | |
5201 | device_create(pmcraid_class, NULL, MKDEV(pmcraid_major, minor), | |
c20c4267 | 5202 | NULL, "%s%u", PMCRAID_DEVFILE, minor); |
89a36810 AR |
5203 | return error; |
5204 | } | |
5205 | ||
5206 | /** | |
5207 | * pmcraid_release_chrdev - unregisters per-adapter management interface | |
5208 | * | |
5209 | * @pinstance: pointer to adapter instance structure | |
5210 | * | |
5211 | * Return value | |
5212 | * none | |
5213 | */ | |
5214 | static void pmcraid_release_chrdev(struct pmcraid_instance *pinstance) | |
5215 | { | |
5216 | pmcraid_release_minor(MINOR(pinstance->cdev.dev)); | |
5217 | device_destroy(pmcraid_class, | |
5218 | MKDEV(pmcraid_major, MINOR(pinstance->cdev.dev))); | |
5219 | cdev_del(&pinstance->cdev); | |
5220 | } | |
5221 | ||
5222 | /** | |
5223 | * pmcraid_remove - IOA hot plug remove entry point | |
5224 | * @pdev: pci device struct | |
5225 | * | |
5226 | * Return value | |
5227 | * none | |
5228 | */ | |
6f039790 | 5229 | static void pmcraid_remove(struct pci_dev *pdev) |
89a36810 AR |
5230 | { |
5231 | struct pmcraid_instance *pinstance = pci_get_drvdata(pdev); | |
5232 | ||
5233 | /* remove the management interface (/dev file) for this device */ | |
5234 | pmcraid_release_chrdev(pinstance); | |
5235 | ||
5236 | /* remove host template from scsi midlayer */ | |
5237 | scsi_remove_host(pinstance->host); | |
5238 | ||
5239 | /* block requests from mid-layer */ | |
5240 | scsi_block_requests(pinstance->host); | |
5241 | ||
5242 | /* initiate shutdown adapter */ | |
5243 | pmcraid_shutdown(pdev); | |
5244 | ||
5245 | pmcraid_disable_interrupts(pinstance, ~0); | |
43829731 | 5246 | flush_work(&pinstance->worker_q); |
89a36810 AR |
5247 | |
5248 | pmcraid_kill_tasklets(pinstance); | |
5249 | pmcraid_unregister_interrupt_handler(pinstance); | |
5250 | pmcraid_release_buffers(pinstance); | |
5251 | iounmap(pinstance->mapped_dma_addr); | |
5252 | pci_release_regions(pdev); | |
5253 | scsi_host_put(pinstance->host); | |
5254 | pci_disable_device(pdev); | |
5255 | ||
5256 | return; | |
5257 | } | |
5258 | ||
5259 | #ifdef CONFIG_PM | |
5260 | /** | |
5261 | * pmcraid_suspend - driver suspend entry point for power management | |
5262 | * @pdev: PCI device structure | |
5263 | * @state: PCI power state to suspend routine | |
5264 | * | |
5265 | * Return Value - 0 always | |
5266 | */ | |
5267 | static int pmcraid_suspend(struct pci_dev *pdev, pm_message_t state) | |
5268 | { | |
5269 | struct pmcraid_instance *pinstance = pci_get_drvdata(pdev); | |
5270 | ||
5271 | pmcraid_shutdown(pdev); | |
5272 | pmcraid_disable_interrupts(pinstance, ~0); | |
5273 | pmcraid_kill_tasklets(pinstance); | |
5274 | pci_set_drvdata(pinstance->pdev, pinstance); | |
5275 | pmcraid_unregister_interrupt_handler(pinstance); | |
5276 | pci_save_state(pdev); | |
5277 | pci_disable_device(pdev); | |
5278 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | |
5279 | ||
5280 | return 0; | |
5281 | } | |
5282 | ||
5283 | /** | |
5284 | * pmcraid_resume - driver resume entry point PCI power management | |
5285 | * @pdev: PCI device structure | |
5286 | * | |
5287 | * Return Value - 0 in case of success. Error code in case of any failure | |
5288 | */ | |
5289 | static int pmcraid_resume(struct pci_dev *pdev) | |
5290 | { | |
5291 | struct pmcraid_instance *pinstance = pci_get_drvdata(pdev); | |
5292 | struct Scsi_Host *host = pinstance->host; | |
5293 | int rc; | |
89a36810 AR |
5294 | |
5295 | pci_set_power_state(pdev, PCI_D0); | |
5296 | pci_enable_wake(pdev, PCI_D0, 0); | |
5297 | pci_restore_state(pdev); | |
5298 | ||
5299 | rc = pci_enable_device(pdev); | |
5300 | ||
5301 | if (rc) { | |
34876402 | 5302 | dev_err(&pdev->dev, "resume: Enable device failed\n"); |
89a36810 AR |
5303 | return rc; |
5304 | } | |
5305 | ||
5306 | pci_set_master(pdev); | |
5307 | ||
371a6c32 CH |
5308 | if (sizeof(dma_addr_t) == 4 || |
5309 | dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) | |
5310 | rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); | |
89a36810 AR |
5311 | |
5312 | if (rc == 0) | |
371a6c32 | 5313 | rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); |
89a36810 AR |
5314 | |
5315 | if (rc != 0) { | |
34876402 | 5316 | dev_err(&pdev->dev, "resume: Failed to set PCI DMA mask\n"); |
89a36810 AR |
5317 | goto disable_device; |
5318 | } | |
5319 | ||
c20c4267 | 5320 | pmcraid_disable_interrupts(pinstance, ~0); |
89a36810 | 5321 | atomic_set(&pinstance->outstanding_cmds, 0); |
89a36810 AR |
5322 | rc = pmcraid_register_interrupt_handler(pinstance); |
5323 | ||
5324 | if (rc) { | |
34876402 AR |
5325 | dev_err(&pdev->dev, |
5326 | "resume: couldn't register interrupt handlers\n"); | |
89a36810 AR |
5327 | rc = -ENODEV; |
5328 | goto release_host; | |
5329 | } | |
5330 | ||
5331 | pmcraid_init_tasklets(pinstance); | |
5332 | pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS); | |
5333 | ||
5334 | /* Start with hard reset sequence which brings up IOA to operational | |
5335 | * state as well as completes the reset sequence. | |
5336 | */ | |
5337 | pinstance->ioa_hard_reset = 1; | |
5338 | ||
5339 | /* Start IOA firmware initialization and bring card to Operational | |
5340 | * state. | |
5341 | */ | |
5342 | if (pmcraid_reset_bringup(pinstance)) { | |
c20c4267 | 5343 | dev_err(&pdev->dev, "couldn't initialize IOA\n"); |
89a36810 AR |
5344 | rc = -ENODEV; |
5345 | goto release_tasklets; | |
5346 | } | |
5347 | ||
5348 | return 0; | |
5349 | ||
5350 | release_tasklets: | |
c20c4267 | 5351 | pmcraid_disable_interrupts(pinstance, ~0); |
89a36810 AR |
5352 | pmcraid_kill_tasklets(pinstance); |
5353 | pmcraid_unregister_interrupt_handler(pinstance); | |
5354 | ||
5355 | release_host: | |
5356 | scsi_host_put(host); | |
5357 | ||
5358 | disable_device: | |
5359 | pci_disable_device(pdev); | |
5360 | ||
5361 | return rc; | |
5362 | } | |
5363 | ||
5364 | #else | |
5365 | ||
5366 | #define pmcraid_suspend NULL | |
5367 | #define pmcraid_resume NULL | |
5368 | ||
5369 | #endif /* CONFIG_PM */ | |
5370 | ||
5371 | /** | |
5372 | * pmcraid_complete_ioa_reset - Called by either timer or tasklet during | |
c20c4267 | 5373 | * completion of the ioa reset |
89a36810 AR |
5374 | * @cmd: pointer to reset command block |
5375 | */ | |
5376 | static void pmcraid_complete_ioa_reset(struct pmcraid_cmd *cmd) | |
5377 | { | |
5378 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
5379 | unsigned long flags; | |
5380 | ||
5381 | spin_lock_irqsave(pinstance->host->host_lock, flags); | |
5382 | pmcraid_ioa_reset(cmd); | |
5383 | spin_unlock_irqrestore(pinstance->host->host_lock, flags); | |
5384 | scsi_unblock_requests(pinstance->host); | |
5385 | schedule_work(&pinstance->worker_q); | |
5386 | } | |
5387 | ||
5388 | /** | |
5389 | * pmcraid_set_supported_devs - sends SET SUPPORTED DEVICES to IOAFP | |
5390 | * | |
5391 | * @cmd: pointer to pmcraid_cmd structure | |
5392 | * | |
5393 | * Return Value | |
5394 | * 0 for success or non-zero for failure cases | |
5395 | */ | |
5396 | static void pmcraid_set_supported_devs(struct pmcraid_cmd *cmd) | |
5397 | { | |
5398 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
5399 | void (*cmd_done) (struct pmcraid_cmd *) = pmcraid_complete_ioa_reset; | |
5400 | ||
5401 | pmcraid_reinit_cmdblk(cmd); | |
5402 | ||
5403 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
5404 | ioarcb->request_type = REQ_TYPE_IOACMD; | |
5405 | ioarcb->cdb[0] = PMCRAID_SET_SUPPORTED_DEVICES; | |
5406 | ioarcb->cdb[1] = ALL_DEVICES_SUPPORTED; | |
5407 | ||
5408 | /* If this was called as part of resource table reinitialization due to | |
5409 | * lost CCN, it is enough to return the command block back to free pool | |
5410 | * as part of set_supported_devs completion function. | |
5411 | */ | |
5412 | if (cmd->drv_inst->reinit_cfg_table) { | |
5413 | cmd->drv_inst->reinit_cfg_table = 0; | |
5414 | cmd->release = 1; | |
5415 | cmd_done = pmcraid_reinit_cfgtable_done; | |
5416 | } | |
5417 | ||
5418 | /* we will be done with the reset sequence after set supported devices, | |
5419 | * setup the done function to return the command block back to free | |
5420 | * pool | |
5421 | */ | |
5422 | pmcraid_send_cmd(cmd, | |
5423 | cmd_done, | |
5424 | PMCRAID_SET_SUP_DEV_TIMEOUT, | |
5425 | pmcraid_timeout_handler); | |
5426 | return; | |
5427 | } | |
5428 | ||
592488a3 AR |
5429 | /** |
5430 | * pmcraid_set_timestamp - set the timestamp to IOAFP | |
5431 | * | |
5432 | * @cmd: pointer to pmcraid_cmd structure | |
5433 | * | |
5434 | * Return Value | |
5435 | * 0 for success or non-zero for failure cases | |
5436 | */ | |
5437 | static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd) | |
5438 | { | |
5439 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
5440 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
5441 | __be32 time_stamp_len = cpu_to_be32(PMCRAID_TIMESTAMP_LEN); | |
b22ee87d | 5442 | struct pmcraid_ioadl_desc *ioadl; |
45c80be6 | 5443 | u64 timestamp; |
592488a3 | 5444 | |
9c9bd593 | 5445 | timestamp = ktime_get_real_seconds() * 1000; |
592488a3 AR |
5446 | |
5447 | pinstance->timestamp_data->timestamp[0] = (__u8)(timestamp); | |
5448 | pinstance->timestamp_data->timestamp[1] = (__u8)((timestamp) >> 8); | |
5449 | pinstance->timestamp_data->timestamp[2] = (__u8)((timestamp) >> 16); | |
5450 | pinstance->timestamp_data->timestamp[3] = (__u8)((timestamp) >> 24); | |
5451 | pinstance->timestamp_data->timestamp[4] = (__u8)((timestamp) >> 32); | |
5452 | pinstance->timestamp_data->timestamp[5] = (__u8)((timestamp) >> 40); | |
5453 | ||
5454 | pmcraid_reinit_cmdblk(cmd); | |
5455 | ioarcb->request_type = REQ_TYPE_SCSI; | |
5456 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
5457 | ioarcb->cdb[0] = PMCRAID_SCSI_SET_TIMESTAMP; | |
5458 | ioarcb->cdb[1] = PMCRAID_SCSI_SERVICE_ACTION; | |
5459 | memcpy(&(ioarcb->cdb[6]), &time_stamp_len, sizeof(time_stamp_len)); | |
5460 | ||
5461 | ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
5462 | offsetof(struct pmcraid_ioarcb, | |
5463 | add_data.u.ioadl[0])); | |
5464 | ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); | |
45c80be6 | 5465 | ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL)); |
592488a3 AR |
5466 | |
5467 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
5468 | ioarcb->request_flags0 |= TRANSFER_DIR_WRITE; | |
5469 | ioarcb->data_transfer_length = | |
5470 | cpu_to_le32(sizeof(struct pmcraid_timestamp_data)); | |
5471 | ioadl = &(ioarcb->add_data.u.ioadl[0]); | |
5472 | ioadl->flags = IOADL_FLAGS_LAST_DESC; | |
5473 | ioadl->address = cpu_to_le64(pinstance->timestamp_data_baddr); | |
5474 | ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_timestamp_data)); | |
5475 | ||
5476 | if (!pinstance->timestamp_error) { | |
5477 | pinstance->timestamp_error = 0; | |
5478 | pmcraid_send_cmd(cmd, pmcraid_set_supported_devs, | |
5479 | PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler); | |
5480 | } else { | |
5481 | pmcraid_send_cmd(cmd, pmcraid_return_cmd, | |
5482 | PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler); | |
5483 | return; | |
5484 | } | |
5485 | } | |
5486 | ||
5487 | ||
89a36810 AR |
5488 | /** |
5489 | * pmcraid_init_res_table - Initialize the resource table | |
5490 | * @cmd: pointer to pmcraid command struct | |
5491 | * | |
5492 | * This function looks through the existing resource table, comparing | |
5493 | * it with the config table. This function will take care of old/new | |
5494 | * devices and schedule adding/removing them from the mid-layer | |
5495 | * as appropriate. | |
5496 | * | |
5497 | * Return value | |
5498 | * None | |
5499 | */ | |
5500 | static void pmcraid_init_res_table(struct pmcraid_cmd *cmd) | |
5501 | { | |
5502 | struct pmcraid_instance *pinstance = cmd->drv_inst; | |
5503 | struct pmcraid_resource_entry *res, *temp; | |
5504 | struct pmcraid_config_table_entry *cfgte; | |
5505 | unsigned long lock_flags; | |
5506 | int found, rc, i; | |
c20c4267 | 5507 | u16 fw_version; |
89a36810 AR |
5508 | LIST_HEAD(old_res); |
5509 | ||
5510 | if (pinstance->cfg_table->flags & MICROCODE_UPDATE_REQUIRED) | |
34876402 | 5511 | pmcraid_err("IOA requires microcode download\n"); |
89a36810 | 5512 | |
c20c4267 AR |
5513 | fw_version = be16_to_cpu(pinstance->inq_data->fw_version); |
5514 | ||
89a36810 AR |
5515 | /* resource list is protected by pinstance->resource_lock. |
5516 | * init_res_table can be called from probe (user-thread) or runtime | |
5517 | * reset (timer/tasklet) | |
5518 | */ | |
5519 | spin_lock_irqsave(&pinstance->resource_lock, lock_flags); | |
5520 | ||
5521 | list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) | |
5522 | list_move_tail(&res->queue, &old_res); | |
5523 | ||
45c80be6 | 5524 | for (i = 0; i < le16_to_cpu(pinstance->cfg_table->num_entries); i++) { |
c20c4267 AR |
5525 | if (be16_to_cpu(pinstance->inq_data->fw_version) <= |
5526 | PMCRAID_FW_VERSION_1) | |
5527 | cfgte = &pinstance->cfg_table->entries[i]; | |
5528 | else | |
5529 | cfgte = (struct pmcraid_config_table_entry *) | |
5530 | &pinstance->cfg_table->entries_ext[i]; | |
89a36810 | 5531 | |
c20c4267 | 5532 | if (!pmcraid_expose_resource(fw_version, cfgte)) |
89a36810 AR |
5533 | continue; |
5534 | ||
5535 | found = 0; | |
5536 | ||
5537 | /* If this entry was already detected and initialized */ | |
5538 | list_for_each_entry_safe(res, temp, &old_res, queue) { | |
5539 | ||
5540 | rc = memcmp(&res->cfg_entry.resource_address, | |
5541 | &cfgte->resource_address, | |
5542 | sizeof(cfgte->resource_address)); | |
5543 | if (!rc) { | |
5544 | list_move_tail(&res->queue, | |
5545 | &pinstance->used_res_q); | |
5546 | found = 1; | |
5547 | break; | |
5548 | } | |
5549 | } | |
5550 | ||
5551 | /* If this is new entry, initialize it and add it the queue */ | |
5552 | if (!found) { | |
5553 | ||
5554 | if (list_empty(&pinstance->free_res_q)) { | |
34876402 | 5555 | pmcraid_err("Too many devices attached\n"); |
89a36810 AR |
5556 | break; |
5557 | } | |
5558 | ||
5559 | found = 1; | |
5560 | res = list_entry(pinstance->free_res_q.next, | |
5561 | struct pmcraid_resource_entry, queue); | |
5562 | ||
5563 | res->scsi_dev = NULL; | |
5564 | res->change_detected = RES_CHANGE_ADD; | |
5565 | res->reset_progress = 0; | |
5566 | list_move_tail(&res->queue, &pinstance->used_res_q); | |
5567 | } | |
5568 | ||
5569 | /* copy new configuration table entry details into driver | |
5570 | * maintained resource entry | |
5571 | */ | |
5572 | if (found) { | |
5573 | memcpy(&res->cfg_entry, cfgte, | |
c20c4267 | 5574 | pinstance->config_table_entry_size); |
89a36810 AR |
5575 | pmcraid_info("New res type:%x, vset:%x, addr:%x:\n", |
5576 | res->cfg_entry.resource_type, | |
c20c4267 AR |
5577 | (fw_version <= PMCRAID_FW_VERSION_1 ? |
5578 | res->cfg_entry.unique_flags1 : | |
45c80be6 | 5579 | le16_to_cpu(res->cfg_entry.array_id) & 0xFF), |
89a36810 AR |
5580 | le32_to_cpu(res->cfg_entry.resource_address)); |
5581 | } | |
5582 | } | |
5583 | ||
5584 | /* Detect any deleted entries, mark them for deletion from mid-layer */ | |
5585 | list_for_each_entry_safe(res, temp, &old_res, queue) { | |
5586 | ||
5587 | if (res->scsi_dev) { | |
5588 | res->change_detected = RES_CHANGE_DEL; | |
5589 | res->cfg_entry.resource_handle = | |
5590 | PMCRAID_INVALID_RES_HANDLE; | |
5591 | list_move_tail(&res->queue, &pinstance->used_res_q); | |
5592 | } else { | |
5593 | list_move_tail(&res->queue, &pinstance->free_res_q); | |
5594 | } | |
5595 | } | |
5596 | ||
5597 | /* release the resource list lock */ | |
5598 | spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags); | |
592488a3 | 5599 | pmcraid_set_timestamp(cmd); |
89a36810 AR |
5600 | } |
5601 | ||
5602 | /** | |
5603 | * pmcraid_querycfg - Send a Query IOA Config to the adapter. | |
5604 | * @cmd: pointer pmcraid_cmd struct | |
5605 | * | |
5606 | * This function sends a Query IOA Configuration command to the adapter to | |
5607 | * retrieve the IOA configuration table. | |
5608 | * | |
5609 | * Return value: | |
5610 | * none | |
5611 | */ | |
5612 | static void pmcraid_querycfg(struct pmcraid_cmd *cmd) | |
5613 | { | |
5614 | struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; | |
b22ee87d | 5615 | struct pmcraid_ioadl_desc *ioadl; |
89a36810 | 5616 | struct pmcraid_instance *pinstance = cmd->drv_inst; |
45c80be6 | 5617 | __be32 cfg_table_size = cpu_to_be32(sizeof(struct pmcraid_config_table)); |
89a36810 | 5618 | |
c20c4267 AR |
5619 | if (be16_to_cpu(pinstance->inq_data->fw_version) <= |
5620 | PMCRAID_FW_VERSION_1) | |
5621 | pinstance->config_table_entry_size = | |
5622 | sizeof(struct pmcraid_config_table_entry); | |
5623 | else | |
5624 | pinstance->config_table_entry_size = | |
5625 | sizeof(struct pmcraid_config_table_entry_ext); | |
5626 | ||
89a36810 AR |
5627 | ioarcb->request_type = REQ_TYPE_IOACMD; |
5628 | ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); | |
5629 | ||
5630 | ioarcb->cdb[0] = PMCRAID_QUERY_IOA_CONFIG; | |
5631 | ||
5632 | /* firmware requires 4-byte length field, specified in B.E format */ | |
5633 | memcpy(&(ioarcb->cdb[10]), &cfg_table_size, sizeof(cfg_table_size)); | |
5634 | ||
5635 | /* Since entire config table can be described by single IOADL, it can | |
5636 | * be part of IOARCB itself | |
5637 | */ | |
5638 | ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + | |
5639 | offsetof(struct pmcraid_ioarcb, | |
5640 | add_data.u.ioadl[0])); | |
5641 | ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); | |
45c80be6 | 5642 | ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL); |
89a36810 AR |
5643 | |
5644 | ioarcb->request_flags0 |= NO_LINK_DESCS; | |
5645 | ioarcb->data_transfer_length = | |
5646 | cpu_to_le32(sizeof(struct pmcraid_config_table)); | |
5647 | ||
5648 | ioadl = &(ioarcb->add_data.u.ioadl[0]); | |
88197966 | 5649 | ioadl->flags = IOADL_FLAGS_LAST_DESC; |
89a36810 AR |
5650 | ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr); |
5651 | ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table)); | |
5652 | ||
5653 | pmcraid_send_cmd(cmd, pmcraid_init_res_table, | |
5654 | PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler); | |
5655 | } | |
5656 | ||
5657 | ||
5658 | /** | |
c20c4267 | 5659 | * pmcraid_probe - PCI probe entry pointer for PMC MaxRAID controller driver |
89a36810 AR |
5660 | * @pdev: pointer to pci device structure |
5661 | * @dev_id: pointer to device ids structure | |
5662 | * | |
5663 | * Return Value | |
5664 | * returns 0 if the device is claimed and successfully configured. | |
5665 | * returns non-zero error code in case of any failure | |
5666 | */ | |
6f039790 GKH |
5667 | static int pmcraid_probe(struct pci_dev *pdev, |
5668 | const struct pci_device_id *dev_id) | |
89a36810 AR |
5669 | { |
5670 | struct pmcraid_instance *pinstance; | |
5671 | struct Scsi_Host *host; | |
5672 | void __iomem *mapped_pci_addr; | |
5673 | int rc = PCIBIOS_SUCCESSFUL; | |
5674 | ||
5675 | if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) { | |
5676 | pmcraid_err | |
5677 | ("maximum number(%d) of supported adapters reached\n", | |
5678 | atomic_read(&pmcraid_adapter_count)); | |
5679 | return -ENOMEM; | |
5680 | } | |
5681 | ||
5682 | atomic_inc(&pmcraid_adapter_count); | |
5683 | rc = pci_enable_device(pdev); | |
5684 | ||
5685 | if (rc) { | |
5686 | dev_err(&pdev->dev, "Cannot enable adapter\n"); | |
5687 | atomic_dec(&pmcraid_adapter_count); | |
5688 | return rc; | |
5689 | } | |
5690 | ||
5691 | dev_info(&pdev->dev, | |
5692 | "Found new IOA(%x:%x), Total IOA count: %d\n", | |
5693 | pdev->vendor, pdev->device, | |
5694 | atomic_read(&pmcraid_adapter_count)); | |
5695 | ||
5696 | rc = pci_request_regions(pdev, PMCRAID_DRIVER_NAME); | |
5697 | ||
5698 | if (rc < 0) { | |
5699 | dev_err(&pdev->dev, | |
5700 | "Couldn't register memory range of registers\n"); | |
5701 | goto out_disable_device; | |
5702 | } | |
5703 | ||
5704 | mapped_pci_addr = pci_iomap(pdev, 0, 0); | |
5705 | ||
5706 | if (!mapped_pci_addr) { | |
5707 | dev_err(&pdev->dev, "Couldn't map PCI registers memory\n"); | |
5708 | rc = -ENOMEM; | |
5709 | goto out_release_regions; | |
5710 | } | |
5711 | ||
5712 | pci_set_master(pdev); | |
5713 | ||
5714 | /* Firmware requires the system bus address of IOARCB to be within | |
5715 | * 32-bit addressable range though it has 64-bit IOARRIN register. | |
5716 | * However, firmware supports 64-bit streaming DMA buffers, whereas | |
371a6c32 | 5717 | * coherent buffers are to be 32-bit. Since dma_alloc_coherent always |
89a36810 | 5718 | * returns memory within 4GB (if not, change this logic), coherent |
25985edc | 5719 | * buffers are within firmware acceptable address ranges. |
89a36810 | 5720 | */ |
371a6c32 CH |
5721 | if (sizeof(dma_addr_t) == 4 || |
5722 | dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) | |
5723 | rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); | |
89a36810 AR |
5724 | |
5725 | /* firmware expects 32-bit DMA addresses for IOARRIN register; set 32 | |
371a6c32 | 5726 | * bit mask for dma_alloc_coherent to return addresses within 4GB |
89a36810 AR |
5727 | */ |
5728 | if (rc == 0) | |
371a6c32 | 5729 | rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); |
89a36810 AR |
5730 | |
5731 | if (rc != 0) { | |
5732 | dev_err(&pdev->dev, "Failed to set PCI DMA mask\n"); | |
5733 | goto cleanup_nomem; | |
5734 | } | |
5735 | ||
5736 | host = scsi_host_alloc(&pmcraid_host_template, | |
5737 | sizeof(struct pmcraid_instance)); | |
5738 | ||
5739 | if (!host) { | |
5740 | dev_err(&pdev->dev, "scsi_host_alloc failed!\n"); | |
5741 | rc = -ENOMEM; | |
5742 | goto cleanup_nomem; | |
5743 | } | |
5744 | ||
5745 | host->max_id = PMCRAID_MAX_NUM_TARGETS_PER_BUS; | |
5746 | host->max_lun = PMCRAID_MAX_NUM_LUNS_PER_TARGET; | |
5747 | host->unique_id = host->host_no; | |
5748 | host->max_channel = PMCRAID_MAX_BUS_TO_SCAN; | |
5749 | host->max_cmd_len = PMCRAID_MAX_CDB_LEN; | |
5750 | ||
5751 | /* zero out entire instance structure */ | |
5752 | pinstance = (struct pmcraid_instance *)host->hostdata; | |
5753 | memset(pinstance, 0, sizeof(*pinstance)); | |
5754 | ||
5755 | pinstance->chip_cfg = | |
5756 | (struct pmcraid_chip_details *)(dev_id->driver_data); | |
5757 | ||
5758 | rc = pmcraid_init_instance(pdev, host, mapped_pci_addr); | |
5759 | ||
5760 | if (rc < 0) { | |
5761 | dev_err(&pdev->dev, "failed to initialize adapter instance\n"); | |
5762 | goto out_scsi_host_put; | |
5763 | } | |
5764 | ||
5765 | pci_set_drvdata(pdev, pinstance); | |
5766 | ||
5767 | /* Save PCI config-space for use following the reset */ | |
5768 | rc = pci_save_state(pinstance->pdev); | |
5769 | ||
5770 | if (rc != 0) { | |
5771 | dev_err(&pdev->dev, "Failed to save PCI config space\n"); | |
5772 | goto out_scsi_host_put; | |
5773 | } | |
5774 | ||
5775 | pmcraid_disable_interrupts(pinstance, ~0); | |
5776 | ||
5777 | rc = pmcraid_register_interrupt_handler(pinstance); | |
5778 | ||
5779 | if (rc) { | |
34876402 | 5780 | dev_err(&pdev->dev, "couldn't register interrupt handler\n"); |
89a36810 AR |
5781 | goto out_scsi_host_put; |
5782 | } | |
5783 | ||
5784 | pmcraid_init_tasklets(pinstance); | |
5785 | ||
5786 | /* allocate verious buffers used by LLD.*/ | |
5787 | rc = pmcraid_init_buffers(pinstance); | |
5788 | ||
5789 | if (rc) { | |
5790 | pmcraid_err("couldn't allocate memory blocks\n"); | |
5791 | goto out_unregister_isr; | |
5792 | } | |
5793 | ||
5794 | /* check the reset type required */ | |
5795 | pmcraid_reset_type(pinstance); | |
5796 | ||
5797 | pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS); | |
5798 | ||
5799 | /* Start IOA firmware initialization and bring card to Operational | |
5800 | * state. | |
5801 | */ | |
5802 | pmcraid_info("starting IOA initialization sequence\n"); | |
5803 | if (pmcraid_reset_bringup(pinstance)) { | |
c20c4267 | 5804 | dev_err(&pdev->dev, "couldn't initialize IOA\n"); |
89a36810 AR |
5805 | rc = 1; |
5806 | goto out_release_bufs; | |
5807 | } | |
5808 | ||
5809 | /* Add adapter instance into mid-layer list */ | |
5810 | rc = scsi_add_host(pinstance->host, &pdev->dev); | |
5811 | if (rc != 0) { | |
5812 | pmcraid_err("couldn't add host into mid-layer: %d\n", rc); | |
5813 | goto out_release_bufs; | |
5814 | } | |
5815 | ||
5816 | scsi_scan_host(pinstance->host); | |
5817 | ||
5818 | rc = pmcraid_setup_chrdev(pinstance); | |
5819 | ||
5820 | if (rc != 0) { | |
5821 | pmcraid_err("couldn't create mgmt interface, error: %x\n", | |
5822 | rc); | |
5823 | goto out_remove_host; | |
5824 | } | |
5825 | ||
5826 | /* Schedule worker thread to handle CCN and take care of adding and | |
5827 | * removing devices to OS | |
5828 | */ | |
5829 | atomic_set(&pinstance->expose_resources, 1); | |
5830 | schedule_work(&pinstance->worker_q); | |
5831 | return rc; | |
5832 | ||
5833 | out_remove_host: | |
5834 | scsi_remove_host(host); | |
5835 | ||
5836 | out_release_bufs: | |
5837 | pmcraid_release_buffers(pinstance); | |
5838 | ||
5839 | out_unregister_isr: | |
5840 | pmcraid_kill_tasklets(pinstance); | |
5841 | pmcraid_unregister_interrupt_handler(pinstance); | |
5842 | ||
5843 | out_scsi_host_put: | |
5844 | scsi_host_put(host); | |
5845 | ||
5846 | cleanup_nomem: | |
5847 | iounmap(mapped_pci_addr); | |
5848 | ||
5849 | out_release_regions: | |
5850 | pci_release_regions(pdev); | |
5851 | ||
5852 | out_disable_device: | |
5853 | atomic_dec(&pmcraid_adapter_count); | |
89a36810 AR |
5854 | pci_disable_device(pdev); |
5855 | return -ENODEV; | |
5856 | } | |
5857 | ||
5858 | /* | |
5859 | * PCI driver structure of pcmraid driver | |
5860 | */ | |
5861 | static struct pci_driver pmcraid_driver = { | |
5862 | .name = PMCRAID_DRIVER_NAME, | |
5863 | .id_table = pmcraid_pci_table, | |
5864 | .probe = pmcraid_probe, | |
5865 | .remove = pmcraid_remove, | |
5866 | .suspend = pmcraid_suspend, | |
5867 | .resume = pmcraid_resume, | |
5868 | .shutdown = pmcraid_shutdown | |
5869 | }; | |
5870 | ||
89a36810 AR |
5871 | /** |
5872 | * pmcraid_init - module load entry point | |
5873 | */ | |
5874 | static int __init pmcraid_init(void) | |
5875 | { | |
5876 | dev_t dev; | |
5877 | int error; | |
5878 | ||
a1b66665 MM |
5879 | pmcraid_info("%s Device Driver version: %s\n", |
5880 | PMCRAID_DRIVER_NAME, PMCRAID_DRIVER_VERSION); | |
89a36810 AR |
5881 | |
5882 | error = alloc_chrdev_region(&dev, 0, | |
5883 | PMCRAID_MAX_ADAPTERS, | |
5884 | PMCRAID_DEVFILE); | |
5885 | ||
5886 | if (error) { | |
5887 | pmcraid_err("failed to get a major number for adapters\n"); | |
5888 | goto out_init; | |
5889 | } | |
5890 | ||
5891 | pmcraid_major = MAJOR(dev); | |
5892 | pmcraid_class = class_create(THIS_MODULE, PMCRAID_DEVFILE); | |
5893 | ||
5894 | if (IS_ERR(pmcraid_class)) { | |
5895 | error = PTR_ERR(pmcraid_class); | |
278cee05 | 5896 | pmcraid_err("failed to register with sysfs, error = %x\n", |
89a36810 AR |
5897 | error); |
5898 | goto out_unreg_chrdev; | |
5899 | } | |
5900 | ||
89a36810 AR |
5901 | error = pmcraid_netlink_init(); |
5902 | ||
2d76a247 QL |
5903 | if (error) { |
5904 | class_destroy(pmcraid_class); | |
89a36810 | 5905 | goto out_unreg_chrdev; |
2d76a247 | 5906 | } |
89a36810 AR |
5907 | |
5908 | error = pci_register_driver(&pmcraid_driver); | |
5909 | ||
5910 | if (error == 0) | |
5911 | goto out_init; | |
5912 | ||
5913 | pmcraid_err("failed to register pmcraid driver, error = %x\n", | |
5914 | error); | |
5915 | class_destroy(pmcraid_class); | |
5916 | pmcraid_netlink_release(); | |
5917 | ||
5918 | out_unreg_chrdev: | |
5919 | unregister_chrdev_region(MKDEV(pmcraid_major, 0), PMCRAID_MAX_ADAPTERS); | |
34876402 | 5920 | |
89a36810 AR |
5921 | out_init: |
5922 | return error; | |
5923 | } | |
5924 | ||
5925 | /** | |
5926 | * pmcraid_exit - module unload entry point | |
5927 | */ | |
5928 | static void __exit pmcraid_exit(void) | |
5929 | { | |
5930 | pmcraid_netlink_release(); | |
89a36810 AR |
5931 | unregister_chrdev_region(MKDEV(pmcraid_major, 0), |
5932 | PMCRAID_MAX_ADAPTERS); | |
5933 | pci_unregister_driver(&pmcraid_driver); | |
592488a3 | 5934 | class_destroy(pmcraid_class); |
89a36810 AR |
5935 | } |
5936 | ||
5937 | module_init(pmcraid_init); | |
5938 | module_exit(pmcraid_exit); |