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77adf3f0 1// SPDX-License-Identifier: GPL-2.0-only
8482e118 2/*
fa90c54f 3 * QLogic Fibre Channel HBA Driver
bd21eaf9 4 * Copyright (c) 2003-2014 QLogic Corporation
8482e118
AV
5 */
6#include "qla_def.h"
2d70c103 7#include "qla_target.h"
8482e118 8
2c3dfe3f 9#include <linux/kthread.h>
7aaef27b 10#include <linux/vmalloc.h>
5a0e3ad6 11#include <linux/slab.h>
00eabe7c 12#include <linux/delay.h>
8482e118 13
a824ebb3 14static int qla24xx_vport_disable(struct fc_vport *, bool);
6e98016c 15
8482e118
AV
16/* SYSFS attributes --------------------------------------------------------- */
17
18static ssize_t
2c3c8bea 19qla2x00_sysfs_read_fw_dump(struct file *filp, struct kobject *kobj,
91a69029
ZR
20 struct bin_attribute *bin_attr,
21 char *buf, loff_t off, size_t count)
8482e118 22{
7b867cf7 23 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
8482e118 24 struct device, kobj)));
7b867cf7 25 struct qla_hw_data *ha = vha->hw;
08de2844 26 int rval = 0;
8482e118 27
cbb01c2f
AE
28 if (!(ha->fw_dump_reading || ha->mctp_dump_reading ||
29 ha->mpi_fw_dump_reading))
8482e118 30 return 0;
8482e118 31
a6b95d1c 32 mutex_lock(&ha->optrom_mutex);
7ec0effd 33 if (IS_P3P_TYPE(ha)) {
08de2844
GM
34 if (off < ha->md_template_size) {
35 rval = memory_read_from_buffer(buf, count,
36 &off, ha->md_tmplt_hdr, ha->md_template_size);
a6b95d1c
QT
37 } else {
38 off -= ha->md_template_size;
39 rval = memory_read_from_buffer(buf, count,
40 &off, ha->md_dump, ha->md_dump_size);
08de2844 41 }
a6b95d1c
QT
42 } else if (ha->mctp_dumped && ha->mctp_dump_reading) {
43 rval = memory_read_from_buffer(buf, count, &off, ha->mctp_dump,
81178772 44 MCTP_DUMP_SIZE);
cbb01c2f
AE
45 } else if (ha->mpi_fw_dumped && ha->mpi_fw_dump_reading) {
46 rval = memory_read_from_buffer(buf, count, &off,
47 ha->mpi_fw_dump,
48 ha->mpi_fw_dump_len);
a6b95d1c
QT
49 } else if (ha->fw_dump_reading) {
50 rval = memory_read_from_buffer(buf, count, &off, ha->fw_dump,
b3dc9088 51 ha->fw_dump_len);
a6b95d1c
QT
52 } else {
53 rval = 0;
54 }
55 mutex_unlock(&ha->optrom_mutex);
56 return rval;
8482e118
AV
57}
58
59static ssize_t
2c3c8bea 60qla2x00_sysfs_write_fw_dump(struct file *filp, struct kobject *kobj,
91a69029
ZR
61 struct bin_attribute *bin_attr,
62 char *buf, loff_t off, size_t count)
8482e118 63{
7b867cf7 64 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
8482e118 65 struct device, kobj)));
7b867cf7 66 struct qla_hw_data *ha = vha->hw;
8482e118 67 int reading;
8482e118
AV
68
69 if (off != 0)
70 return (0);
71
72 reading = simple_strtol(buf, NULL, 10);
73 switch (reading) {
74 case 0:
a7a167bf
AV
75 if (!ha->fw_dump_reading)
76 break;
8482e118 77
7c3df132 78 ql_log(ql_log_info, vha, 0x705d,
7b867cf7 79 "Firmware dump cleared on (%ld).\n", vha->host_no);
a7a167bf 80
7ec0effd 81 if (IS_P3P_TYPE(ha)) {
08de2844
GM
82 qla82xx_md_free(vha);
83 qla82xx_md_prep(vha);
84 }
a7a167bf 85 ha->fw_dump_reading = 0;
dbe6f492 86 ha->fw_dumped = false;
8482e118
AV
87 break;
88 case 1:
d4e3e04d 89 if (ha->fw_dumped && !ha->fw_dump_reading) {
8482e118
AV
90 ha->fw_dump_reading = 1;
91
7c3df132 92 ql_log(ql_log_info, vha, 0x705e,
a7a167bf 93 "Raw firmware dump ready for read on (%ld).\n",
7b867cf7 94 vha->host_no);
8482e118
AV
95 }
96 break;
a7a167bf 97 case 2:
7b867cf7 98 qla2x00_alloc_fw_dump(vha);
a7a167bf 99 break;
68af0811 100 case 3:
08de2844
GM
101 if (IS_QLA82XX(ha)) {
102 qla82xx_idc_lock(ha);
103 qla82xx_set_reset_owner(vha);
104 qla82xx_idc_unlock(ha);
7ec0effd
AD
105 } else if (IS_QLA8044(ha)) {
106 qla8044_idc_lock(ha);
107 qla82xx_set_reset_owner(vha);
108 qla8044_idc_unlock(ha);
d52cd774 109 } else {
08de2844 110 qla2x00_system_error(vha);
d52cd774 111 }
08de2844
GM
112 break;
113 case 4:
7ec0effd 114 if (IS_P3P_TYPE(ha)) {
08de2844
GM
115 if (ha->md_tmplt_hdr)
116 ql_dbg(ql_dbg_user, vha, 0x705b,
117 "MiniDump supported with this firmware.\n");
118 else
119 ql_dbg(ql_dbg_user, vha, 0x709d,
120 "MiniDump not supported with this firmware.\n");
121 }
122 break;
123 case 5:
7ec0effd 124 if (IS_P3P_TYPE(ha))
08de2844 125 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
68af0811 126 break;
81178772
SK
127 case 6:
128 if (!ha->mctp_dump_reading)
129 break;
130 ql_log(ql_log_info, vha, 0x70c1,
131 "MCTP dump cleared on (%ld).\n", vha->host_no);
132 ha->mctp_dump_reading = 0;
133 ha->mctp_dumped = 0;
134 break;
135 case 7:
136 if (ha->mctp_dumped && !ha->mctp_dump_reading) {
137 ha->mctp_dump_reading = 1;
138 ql_log(ql_log_info, vha, 0x70c2,
139 "Raw mctp dump ready for read on (%ld).\n",
140 vha->host_no);
141 }
142 break;
cbb01c2f
AE
143 case 8:
144 if (!ha->mpi_fw_dump_reading)
145 break;
146 ql_log(ql_log_info, vha, 0x70e7,
147 "MPI firmware dump cleared on (%ld).\n", vha->host_no);
148 ha->mpi_fw_dump_reading = 0;
149 ha->mpi_fw_dumped = 0;
150 break;
151 case 9:
152 if (ha->mpi_fw_dumped && !ha->mpi_fw_dump_reading) {
153 ha->mpi_fw_dump_reading = 1;
154 ql_log(ql_log_info, vha, 0x70e8,
155 "Raw MPI firmware dump ready for read on (%ld).\n",
156 vha->host_no);
157 }
158 break;
8482e118 159 }
71dfe9e7 160 return count;
8482e118
AV
161}
162
163static struct bin_attribute sysfs_fw_dump_attr = {
164 .attr = {
165 .name = "fw_dump",
166 .mode = S_IRUSR | S_IWUSR,
8482e118
AV
167 },
168 .size = 0,
169 .read = qla2x00_sysfs_read_fw_dump,
170 .write = qla2x00_sysfs_write_fw_dump,
171};
172
173static ssize_t
2c3c8bea 174qla2x00_sysfs_read_nvram(struct file *filp, struct kobject *kobj,
91a69029
ZR
175 struct bin_attribute *bin_attr,
176 char *buf, loff_t off, size_t count)
8482e118 177{
7b867cf7 178 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
8482e118 179 struct device, kobj)));
7b867cf7 180 struct qla_hw_data *ha = vha->hw;
5fa8774c
JC
181 uint32_t faddr;
182 struct active_regions active_regions = { };
8482e118 183
b3dc9088 184 if (!capable(CAP_SYS_ADMIN))
8482e118
AV
185 return 0;
186
b6faaaf7
QT
187 mutex_lock(&ha->optrom_mutex);
188 if (qla2x00_chip_is_down(vha)) {
189 mutex_unlock(&ha->optrom_mutex);
190 return -EAGAIN;
191 }
192
5fa8774c
JC
193 if (!IS_NOCACHE_VPD_TYPE(ha)) {
194 mutex_unlock(&ha->optrom_mutex);
195 goto skip;
196 }
197
198 faddr = ha->flt_region_nvram;
199 if (IS_QLA28XX(ha)) {
4e71dcae 200 qla28xx_get_aux_images(vha, &active_regions);
5fa8774c
JC
201 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
202 faddr = ha->flt_region_nvram_sec;
203 }
204 ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size);
205
b6faaaf7
QT
206 mutex_unlock(&ha->optrom_mutex);
207
5fa8774c 208skip:
b3dc9088
AM
209 return memory_read_from_buffer(buf, count, &off, ha->nvram,
210 ha->nvram_size);
8482e118
AV
211}
212
213static ssize_t
2c3c8bea 214qla2x00_sysfs_write_nvram(struct file *filp, struct kobject *kobj,
91a69029
ZR
215 struct bin_attribute *bin_attr,
216 char *buf, loff_t off, size_t count)
8482e118 217{
7b867cf7 218 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
8482e118 219 struct device, kobj)));
7b867cf7 220 struct qla_hw_data *ha = vha->hw;
8482e118 221 uint16_t cnt;
8482e118 222
3d79038f
AV
223 if (!capable(CAP_SYS_ADMIN) || off != 0 || count != ha->nvram_size ||
224 !ha->isp_ops->write_nvram)
b668ae37 225 return -EINVAL;
8482e118
AV
226
227 /* Checksum NVRAM. */
e428924c 228 if (IS_FWI2_CAPABLE(ha)) {
7ffa5b93 229 __le32 *iter = (__force __le32 *)buf;
459c5378
AV
230 uint32_t chksum;
231
459c5378 232 chksum = 0;
da08ef5c
JC
233 for (cnt = 0; cnt < ((count >> 2) - 1); cnt++, iter++)
234 chksum += le32_to_cpu(*iter);
459c5378
AV
235 chksum = ~chksum + 1;
236 *iter = cpu_to_le32(chksum);
237 } else {
238 uint8_t *iter;
239 uint8_t chksum;
240
241 iter = (uint8_t *)buf;
242 chksum = 0;
243 for (cnt = 0; cnt < count - 1; cnt++)
244 chksum += *iter++;
245 chksum = ~chksum + 1;
246 *iter = chksum;
247 }
8482e118 248
2533cf67 249 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
7c3df132 250 ql_log(ql_log_warn, vha, 0x705f,
2533cf67
LC
251 "HBA not online, failing NVRAM update.\n");
252 return -EAGAIN;
253 }
254
b6faaaf7
QT
255 mutex_lock(&ha->optrom_mutex);
256 if (qla2x00_chip_is_down(vha)) {
109a5987 257 mutex_unlock(&ha->optrom_mutex);
b6faaaf7
QT
258 return -EAGAIN;
259 }
260
8482e118 261 /* Write NVRAM. */
3695310e
JC
262 ha->isp_ops->write_nvram(vha, buf, ha->nvram_base, count);
263 ha->isp_ops->read_nvram(vha, ha->nvram, ha->nvram_base,
264 count);
b6faaaf7 265 mutex_unlock(&ha->optrom_mutex);
8482e118 266
7c3df132
SK
267 ql_dbg(ql_dbg_user, vha, 0x7060,
268 "Setting ISP_ABORT_NEEDED\n");
2533cf67 269 /* NVRAM settings take effect immediately. */
7b867cf7 270 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2533cf67
LC
271 qla2xxx_wake_dpc(vha);
272 qla2x00_wait_for_chip_reset(vha);
26b8d348 273
b668ae37 274 return count;
8482e118
AV
275}
276
277static struct bin_attribute sysfs_nvram_attr = {
278 .attr = {
279 .name = "nvram",
280 .mode = S_IRUSR | S_IWUSR,
8482e118 281 },
1b3f6365 282 .size = 512,
8482e118
AV
283 .read = qla2x00_sysfs_read_nvram,
284 .write = qla2x00_sysfs_write_nvram,
285};
286
854165f4 287static ssize_t
2c3c8bea 288qla2x00_sysfs_read_optrom(struct file *filp, struct kobject *kobj,
91a69029
ZR
289 struct bin_attribute *bin_attr,
290 char *buf, loff_t off, size_t count)
854165f4 291{
7b867cf7 292 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
854165f4 293 struct device, kobj)));
7b867cf7 294 struct qla_hw_data *ha = vha->hw;
7a8ab9c8 295 ssize_t rval = 0;
854165f4 296
c7702b8c
MG
297 mutex_lock(&ha->optrom_mutex);
298
854165f4 299 if (ha->optrom_state != QLA_SREADING)
c7702b8c 300 goto out;
854165f4 301
7a8ab9c8
CD
302 rval = memory_read_from_buffer(buf, count, &off, ha->optrom_buffer,
303 ha->optrom_region_size);
c7702b8c
MG
304
305out:
7a8ab9c8
CD
306 mutex_unlock(&ha->optrom_mutex);
307
308 return rval;
854165f4
AV
309}
310
311static ssize_t
2c3c8bea 312qla2x00_sysfs_write_optrom(struct file *filp, struct kobject *kobj,
91a69029
ZR
313 struct bin_attribute *bin_attr,
314 char *buf, loff_t off, size_t count)
854165f4 315{
7b867cf7 316 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
854165f4 317 struct device, kobj)));
7b867cf7 318 struct qla_hw_data *ha = vha->hw;
854165f4 319
c7702b8c
MG
320 mutex_lock(&ha->optrom_mutex);
321
322 if (ha->optrom_state != QLA_SWRITING) {
323 mutex_unlock(&ha->optrom_mutex);
854165f4 324 return -EINVAL;
c7702b8c
MG
325 }
326 if (off > ha->optrom_region_size) {
327 mutex_unlock(&ha->optrom_mutex);
854165f4 328 return -ERANGE;
c7702b8c 329 }
b7cc176c
JC
330 if (off + count > ha->optrom_region_size)
331 count = ha->optrom_region_size - off;
854165f4
AV
332
333 memcpy(&ha->optrom_buffer[off], buf, count);
7a8ab9c8 334 mutex_unlock(&ha->optrom_mutex);
854165f4
AV
335
336 return count;
337}
338
339static struct bin_attribute sysfs_optrom_attr = {
340 .attr = {
341 .name = "optrom",
342 .mode = S_IRUSR | S_IWUSR,
854165f4 343 },
c3a2f0df 344 .size = 0,
854165f4
AV
345 .read = qla2x00_sysfs_read_optrom,
346 .write = qla2x00_sysfs_write_optrom,
347};
348
349static ssize_t
2c3c8bea 350qla2x00_sysfs_write_optrom_ctl(struct file *filp, struct kobject *kobj,
91a69029
ZR
351 struct bin_attribute *bin_attr,
352 char *buf, loff_t off, size_t count)
854165f4 353{
7b867cf7 354 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
854165f4 355 struct device, kobj)));
7b867cf7 356 struct qla_hw_data *ha = vha->hw;
b7cc176c
JC
357 uint32_t start = 0;
358 uint32_t size = ha->optrom_size;
359 int val, valid;
7a8ab9c8 360 ssize_t rval = count;
854165f4
AV
361
362 if (off)
b668ae37 363 return -EINVAL;
854165f4 364
85880801 365 if (unlikely(pci_channel_offline(ha->pdev)))
b668ae37 366 return -EAGAIN;
85880801 367
b7cc176c
JC
368 if (sscanf(buf, "%d:%x:%x", &val, &start, &size) < 1)
369 return -EINVAL;
370 if (start > ha->optrom_size)
854165f4 371 return -EINVAL;
e6f77540
DC
372 if (size > ha->optrom_size - start)
373 size = ha->optrom_size - start;
854165f4 374
7a8ab9c8 375 mutex_lock(&ha->optrom_mutex);
b6faaaf7
QT
376 if (qla2x00_chip_is_down(vha)) {
377 mutex_unlock(&ha->optrom_mutex);
378 return -EAGAIN;
379 }
854165f4
AV
380 switch (val) {
381 case 0:
382 if (ha->optrom_state != QLA_SREADING &&
7a8ab9c8
CD
383 ha->optrom_state != QLA_SWRITING) {
384 rval = -EINVAL;
385 goto out;
386 }
854165f4 387 ha->optrom_state = QLA_SWAITING;
b7cc176c 388
7c3df132 389 ql_dbg(ql_dbg_user, vha, 0x7061,
b7cc176c 390 "Freeing flash region allocation -- 0x%x bytes.\n",
7c3df132 391 ha->optrom_region_size);
b7cc176c 392
854165f4
AV
393 vfree(ha->optrom_buffer);
394 ha->optrom_buffer = NULL;
395 break;
396 case 1:
7a8ab9c8
CD
397 if (ha->optrom_state != QLA_SWAITING) {
398 rval = -EINVAL;
399 goto out;
400 }
854165f4 401
b7cc176c 402 ha->optrom_region_start = start;
5cbdae10 403 ha->optrom_region_size = size;
b7cc176c 404
854165f4 405 ha->optrom_state = QLA_SREADING;
56cc8fae 406 ha->optrom_buffer = vzalloc(ha->optrom_region_size);
854165f4 407 if (ha->optrom_buffer == NULL) {
7c3df132 408 ql_log(ql_log_warn, vha, 0x7062,
854165f4 409 "Unable to allocate memory for optrom retrieval "
b7cc176c 410 "(%x).\n", ha->optrom_region_size);
854165f4
AV
411
412 ha->optrom_state = QLA_SWAITING;
7a8ab9c8
CD
413 rval = -ENOMEM;
414 goto out;
854165f4
AV
415 }
416
86fbee86 417 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
7c3df132
SK
418 ql_log(ql_log_warn, vha, 0x7063,
419 "HBA not online, failing NVRAM update.\n");
7a8ab9c8
CD
420 rval = -EAGAIN;
421 goto out;
86fbee86
LC
422 }
423
7c3df132 424 ql_dbg(ql_dbg_user, vha, 0x7064,
b7cc176c 425 "Reading flash region -- 0x%x/0x%x.\n",
7c3df132 426 ha->optrom_region_start, ha->optrom_region_size);
b7cc176c 427
7b867cf7 428 ha->isp_ops->read_optrom(vha, ha->optrom_buffer,
b7cc176c 429 ha->optrom_region_start, ha->optrom_region_size);
854165f4
AV
430 break;
431 case 2:
7a8ab9c8
CD
432 if (ha->optrom_state != QLA_SWAITING) {
433 rval = -EINVAL;
434 goto out;
435 }
854165f4 436
b7cc176c
JC
437 /*
438 * We need to be more restrictive on which FLASH regions are
439 * allowed to be updated via user-space. Regions accessible
440 * via this method include:
441 *
442 * ISP21xx/ISP22xx/ISP23xx type boards:
443 *
444 * 0x000000 -> 0x020000 -- Boot code.
445 *
446 * ISP2322/ISP24xx type boards:
447 *
448 * 0x000000 -> 0x07ffff -- Boot code.
449 * 0x080000 -> 0x0fffff -- Firmware.
450 *
451 * ISP25xx type boards:
452 *
453 * 0x000000 -> 0x07ffff -- Boot code.
454 * 0x080000 -> 0x0fffff -- Firmware.
455 * 0x120000 -> 0x12ffff -- VPD and HBA parameters.
e81d1bcb
AV
456 *
457 * > ISP25xx type boards:
458 *
459 * None -- should go through BSG.
b7cc176c
JC
460 */
461 valid = 0;
462 if (ha->optrom_size == OPTROM_SIZE_2300 && start == 0)
463 valid = 1;
e81d1bcb 464 else if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
a9083016 465 valid = 1;
b7cc176c 466 if (!valid) {
7c3df132 467 ql_log(ql_log_warn, vha, 0x7065,
b7cc176c 468 "Invalid start region 0x%x/0x%x.\n", start, size);
7a8ab9c8
CD
469 rval = -EINVAL;
470 goto out;
b7cc176c
JC
471 }
472
473 ha->optrom_region_start = start;
5cbdae10 474 ha->optrom_region_size = size;
b7cc176c 475
854165f4 476 ha->optrom_state = QLA_SWRITING;
56cc8fae 477 ha->optrom_buffer = vzalloc(ha->optrom_region_size);
854165f4 478 if (ha->optrom_buffer == NULL) {
7c3df132 479 ql_log(ql_log_warn, vha, 0x7066,
854165f4 480 "Unable to allocate memory for optrom update "
7c3df132 481 "(%x)\n", ha->optrom_region_size);
854165f4
AV
482
483 ha->optrom_state = QLA_SWAITING;
7a8ab9c8
CD
484 rval = -ENOMEM;
485 goto out;
854165f4 486 }
b7cc176c 487
7c3df132 488 ql_dbg(ql_dbg_user, vha, 0x7067,
b7cc176c 489 "Staging flash region write -- 0x%x/0x%x.\n",
7c3df132 490 ha->optrom_region_start, ha->optrom_region_size);
b7cc176c 491
854165f4
AV
492 break;
493 case 3:
7a8ab9c8
CD
494 if (ha->optrom_state != QLA_SWRITING) {
495 rval = -EINVAL;
496 goto out;
497 }
854165f4 498
2533cf67 499 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
7c3df132 500 ql_log(ql_log_warn, vha, 0x7068,
2533cf67 501 "HBA not online, failing flash update.\n");
7a8ab9c8
CD
502 rval = -EAGAIN;
503 goto out;
2533cf67
LC
504 }
505
7c3df132 506 ql_dbg(ql_dbg_user, vha, 0x7069,
b7cc176c 507 "Writing flash region -- 0x%x/0x%x.\n",
7c3df132 508 ha->optrom_region_start, ha->optrom_region_size);
b7cc176c 509
8d8b83f5 510 rval = ha->isp_ops->write_optrom(vha, ha->optrom_buffer,
b7cc176c 511 ha->optrom_region_start, ha->optrom_region_size);
8d8b83f5
QT
512 if (rval)
513 rval = -EIO;
854165f4 514 break;
b7cc176c 515 default:
7a8ab9c8 516 rval = -EINVAL;
854165f4 517 }
7a8ab9c8
CD
518
519out:
520 mutex_unlock(&ha->optrom_mutex);
521 return rval;
854165f4
AV
522}
523
524static struct bin_attribute sysfs_optrom_ctl_attr = {
525 .attr = {
526 .name = "optrom_ctl",
527 .mode = S_IWUSR,
854165f4
AV
528 },
529 .size = 0,
530 .write = qla2x00_sysfs_write_optrom_ctl,
531};
532
6f641790 533static ssize_t
2c3c8bea 534qla2x00_sysfs_read_vpd(struct file *filp, struct kobject *kobj,
91a69029
ZR
535 struct bin_attribute *bin_attr,
536 char *buf, loff_t off, size_t count)
6f641790 537{
7b867cf7 538 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
6f641790 539 struct device, kobj)));
7b867cf7 540 struct qla_hw_data *ha = vha->hw;
4243c115 541 uint32_t faddr;
5fa8774c 542 struct active_regions active_regions = { };
6f641790 543
85880801 544 if (unlikely(pci_channel_offline(ha->pdev)))
b668ae37 545 return -EAGAIN;
85880801 546
b3dc9088 547 if (!capable(CAP_SYS_ADMIN))
b668ae37 548 return -EINVAL;
6f641790 549
3695310e
JC
550 if (IS_NOCACHE_VPD_TYPE(ha))
551 goto skip;
4243c115 552
3695310e 553 faddr = ha->flt_region_vpd << 2;
4243c115 554
5fa8774c
JC
555 if (IS_QLA28XX(ha)) {
556 qla28xx_get_aux_images(vha, &active_regions);
557 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
558 faddr = ha->flt_region_vpd_sec << 2;
559
560 ql_dbg(ql_dbg_init, vha, 0x7070,
561 "Loading %s nvram image.\n",
562 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
563 "primary" : "secondary");
564 }
3695310e
JC
565
566 mutex_lock(&ha->optrom_mutex);
567 if (qla2x00_chip_is_down(vha)) {
b6faaaf7 568 mutex_unlock(&ha->optrom_mutex);
3695310e 569 return -EAGAIN;
4243c115 570 }
3695310e
JC
571
572 ha->isp_ops->read_optrom(vha, ha->vpd, faddr, ha->vpd_size);
573 mutex_unlock(&ha->optrom_mutex);
5fa8774c
JC
574
575 ha->isp_ops->read_optrom(vha, ha->vpd, faddr, ha->vpd_size);
3695310e 576skip:
b3dc9088 577 return memory_read_from_buffer(buf, count, &off, ha->vpd, ha->vpd_size);
6f641790
AV
578}
579
580static ssize_t
2c3c8bea 581qla2x00_sysfs_write_vpd(struct file *filp, struct kobject *kobj,
91a69029
ZR
582 struct bin_attribute *bin_attr,
583 char *buf, loff_t off, size_t count)
6f641790 584{
7b867cf7 585 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
6f641790 586 struct device, kobj)));
7b867cf7 587 struct qla_hw_data *ha = vha->hw;
d0c3eefa 588 uint8_t *tmp_data;
6f641790 589
85880801
AV
590 if (unlikely(pci_channel_offline(ha->pdev)))
591 return 0;
592
b726d99d
QT
593 if (qla2x00_chip_is_down(vha))
594 return 0;
595
3d79038f
AV
596 if (!capable(CAP_SYS_ADMIN) || off != 0 || count != ha->vpd_size ||
597 !ha->isp_ops->write_nvram)
6f641790
AV
598 return 0;
599
2533cf67 600 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
7c3df132 601 ql_log(ql_log_warn, vha, 0x706a,
2533cf67
LC
602 "HBA not online, failing VPD update.\n");
603 return -EAGAIN;
604 }
605
b6faaaf7
QT
606 mutex_lock(&ha->optrom_mutex);
607 if (qla2x00_chip_is_down(vha)) {
608 mutex_unlock(&ha->optrom_mutex);
609 return -EAGAIN;
610 }
611
6f641790 612 /* Write NVRAM. */
3695310e
JC
613 ha->isp_ops->write_nvram(vha, buf, ha->vpd_base, count);
614 ha->isp_ops->read_nvram(vha, ha->vpd, ha->vpd_base, count);
6f641790 615
d0c3eefa 616 /* Update flash version information for 4Gb & above. */
b6faaaf7
QT
617 if (!IS_FWI2_CAPABLE(ha)) {
618 mutex_unlock(&ha->optrom_mutex);
b668ae37 619 return -EINVAL;
b6faaaf7 620 }
d0c3eefa
LC
621
622 tmp_data = vmalloc(256);
623 if (!tmp_data) {
b6faaaf7 624 mutex_unlock(&ha->optrom_mutex);
7c3df132 625 ql_log(ql_log_warn, vha, 0x706b,
d0c3eefa 626 "Unable to allocate memory for VPD information update.\n");
b668ae37 627 return -ENOMEM;
d0c3eefa
LC
628 }
629 ha->isp_ops->get_flash_version(vha, tmp_data);
630 vfree(tmp_data);
b668ae37 631
b6faaaf7
QT
632 mutex_unlock(&ha->optrom_mutex);
633
6f641790
AV
634 return count;
635}
636
637static struct bin_attribute sysfs_vpd_attr = {
638 .attr = {
639 .name = "vpd",
640 .mode = S_IRUSR | S_IWUSR,
6f641790
AV
641 },
642 .size = 0,
643 .read = qla2x00_sysfs_read_vpd,
644 .write = qla2x00_sysfs_write_vpd,
645};
646
88729e53 647static ssize_t
2c3c8bea 648qla2x00_sysfs_read_sfp(struct file *filp, struct kobject *kobj,
91a69029
ZR
649 struct bin_attribute *bin_attr,
650 char *buf, loff_t off, size_t count)
88729e53 651{
7b867cf7 652 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
88729e53 653 struct device, kobj)));
88729e53
AV
654 int rval;
655
e4e3a2ce 656 if (!capable(CAP_SYS_ADMIN) || off != 0 || count < SFP_DEV_SIZE)
88729e53
AV
657 return 0;
658
b6faaaf7
QT
659 mutex_lock(&vha->hw->optrom_mutex);
660 if (qla2x00_chip_is_down(vha)) {
661 mutex_unlock(&vha->hw->optrom_mutex);
e8711085 662 return 0;
b6faaaf7 663 }
7c3df132 664
e4e3a2ce 665 rval = qla2x00_read_sfp_dev(vha, buf, count);
b6faaaf7
QT
666 mutex_unlock(&vha->hw->optrom_mutex);
667
e4e3a2ce
QT
668 if (rval)
669 return -EIO;
88729e53
AV
670
671 return count;
672}
673
674static struct bin_attribute sysfs_sfp_attr = {
675 .attr = {
676 .name = "sfp",
677 .mode = S_IRUSR | S_IWUSR,
88729e53 678 },
e4e3a2ce 679 .size = SFP_DEV_SIZE,
88729e53
AV
680 .read = qla2x00_sysfs_read_sfp,
681};
682
6e181be5 683static ssize_t
2c3c8bea 684qla2x00_sysfs_write_reset(struct file *filp, struct kobject *kobj,
6e181be5
LC
685 struct bin_attribute *bin_attr,
686 char *buf, loff_t off, size_t count)
687{
688 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
689 struct device, kobj)));
690 struct qla_hw_data *ha = vha->hw;
a9083016 691 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
6e181be5 692 int type;
7d613ac6 693 uint32_t idc_control;
8c2cf7d4 694 uint8_t *tmp_data = NULL;
bd432bb5 695
6e181be5 696 if (off != 0)
b668ae37 697 return -EINVAL;
6e181be5
LC
698
699 type = simple_strtol(buf, NULL, 10);
700 switch (type) {
701 case 0x2025c:
7c3df132
SK
702 ql_log(ql_log_info, vha, 0x706e,
703 "Issuing ISP reset.\n");
6e181be5
LC
704
705 scsi_block_requests(vha->host);
08de2844 706 if (IS_QLA82XX(ha)) {
b6d0d9d5 707 ha->flags.isp82xx_no_md_cap = 1;
08de2844
GM
708 qla82xx_idc_lock(ha);
709 qla82xx_set_reset_owner(vha);
710 qla82xx_idc_unlock(ha);
7ec0effd
AD
711 } else if (IS_QLA8044(ha)) {
712 qla8044_idc_lock(ha);
713 idc_control = qla8044_rd_reg(ha,
714 QLA8044_IDC_DRV_CTRL);
715 qla8044_wr_reg(ha, QLA8044_IDC_DRV_CTRL,
716 (idc_control | GRACEFUL_RESET_BIT1));
717 qla82xx_set_reset_owner(vha);
718 qla8044_idc_unlock(ha);
719 } else {
720 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
721 qla2xxx_wake_dpc(vha);
08de2844 722 }
6e181be5
LC
723 qla2x00_wait_for_chip_reset(vha);
724 scsi_unblock_requests(vha->host);
725 break;
726 case 0x2025d:
cbb01c2f
AE
727 if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
728 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
b668ae37 729 return -EPERM;
6e181be5 730
7c3df132
SK
731 ql_log(ql_log_info, vha, 0x706f,
732 "Issuing MPI reset.\n");
6e181be5 733
ecc89f25 734 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
7d613ac6
SV
735 uint32_t idc_control;
736
737 qla83xx_idc_lock(vha, 0);
738 __qla83xx_get_idc_control(vha, &idc_control);
739 idc_control |= QLA83XX_IDC_GRACEFUL_RESET;
740 __qla83xx_set_idc_control(vha, idc_control);
741 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
742 QLA8XXX_DEV_NEED_RESET);
743 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
744 qla83xx_idc_unlock(vha, 0);
745 break;
cbb01c2f
AE
746 } else if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
747 qla27xx_reset_mpi(vha);
7d613ac6
SV
748 } else {
749 /* Make sure FC side is not in reset */
e6803efa
BVA
750 WARN_ON_ONCE(qla2x00_wait_for_hba_online(vha) !=
751 QLA_SUCCESS);
7d613ac6
SV
752
753 /* Issue MPI reset */
754 scsi_block_requests(vha->host);
755 if (qla81xx_restart_mpi_firmware(vha) != QLA_SUCCESS)
756 ql_log(ql_log_warn, vha, 0x7070,
757 "MPI reset failed.\n");
758 scsi_unblock_requests(vha->host);
759 break;
760 }
cbb01c2f 761 break;
a9083016 762 case 0x2025e:
7ec0effd 763 if (!IS_P3P_TYPE(ha) || vha != base_vha) {
7c3df132 764 ql_log(ql_log_info, vha, 0x7071,
5a68a1c2 765 "FCoE ctx reset not supported.\n");
b668ae37 766 return -EPERM;
a9083016
GM
767 }
768
7c3df132
SK
769 ql_log(ql_log_info, vha, 0x7072,
770 "Issuing FCoE ctx reset.\n");
a9083016
GM
771 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
772 qla2xxx_wake_dpc(vha);
773 qla2x00_wait_for_fcoe_ctx_reset(vha);
774 break;
7d613ac6
SV
775 case 0x2025f:
776 if (!IS_QLA8031(ha))
777 return -EPERM;
778 ql_log(ql_log_info, vha, 0x70bc,
779 "Disabling Reset by IDC control\n");
780 qla83xx_idc_lock(vha, 0);
781 __qla83xx_get_idc_control(vha, &idc_control);
782 idc_control |= QLA83XX_IDC_RESET_DISABLED;
783 __qla83xx_set_idc_control(vha, idc_control);
784 qla83xx_idc_unlock(vha, 0);
785 break;
786 case 0x20260:
787 if (!IS_QLA8031(ha))
788 return -EPERM;
789 ql_log(ql_log_info, vha, 0x70bd,
790 "Enabling Reset by IDC control\n");
791 qla83xx_idc_lock(vha, 0);
792 __qla83xx_get_idc_control(vha, &idc_control);
793 idc_control &= ~QLA83XX_IDC_RESET_DISABLED;
794 __qla83xx_set_idc_control(vha, idc_control);
795 qla83xx_idc_unlock(vha, 0);
796 break;
8c2cf7d4
SC
797 case 0x20261:
798 ql_dbg(ql_dbg_user, vha, 0x70e0,
799 "Updating cache versions without reset ");
800
801 tmp_data = vmalloc(256);
802 if (!tmp_data) {
803 ql_log(ql_log_warn, vha, 0x70e1,
804 "Unable to allocate memory for VPD information update.\n");
805 return -ENOMEM;
806 }
807 ha->isp_ops->get_flash_version(vha, tmp_data);
808 vfree(tmp_data);
809 break;
6e181be5
LC
810 }
811 return count;
812}
813
814static struct bin_attribute sysfs_reset_attr = {
815 .attr = {
816 .name = "reset",
817 .mode = S_IWUSR,
818 },
819 .size = 0,
820 .write = qla2x00_sysfs_write_reset,
821};
822
6eb54715
HM
823static ssize_t
824qla2x00_issue_logo(struct file *filp, struct kobject *kobj,
825 struct bin_attribute *bin_attr,
826 char *buf, loff_t off, size_t count)
827{
828 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
829 struct device, kobj)));
830 int type;
6eb54715
HM
831 port_id_t did;
832
22ebde16
QT
833 if (!capable(CAP_SYS_ADMIN))
834 return 0;
835
836 if (unlikely(pci_channel_offline(vha->hw->pdev)))
837 return 0;
838
839 if (qla2x00_chip_is_down(vha))
840 return 0;
841
6eb54715
HM
842 type = simple_strtol(buf, NULL, 10);
843
844 did.b.domain = (type & 0x00ff0000) >> 16;
845 did.b.area = (type & 0x0000ff00) >> 8;
846 did.b.al_pa = (type & 0x000000ff);
847
83548fe2 848 ql_log(ql_log_info, vha, 0xd04d, "portid=%02x%02x%02x done\n",
6eb54715
HM
849 did.b.domain, did.b.area, did.b.al_pa);
850
851 ql_log(ql_log_info, vha, 0x70e4, "%s: %d\n", __func__, type);
852
91f42b33 853 qla24xx_els_dcmd_iocb(vha, ELS_DCMD_LOGO, did);
6eb54715
HM
854 return count;
855}
856
857static struct bin_attribute sysfs_issue_logo_attr = {
858 .attr = {
859 .name = "issue_logo",
860 .mode = S_IWUSR,
861 },
862 .size = 0,
863 .write = qla2x00_issue_logo,
864};
865
ce0423f4 866static ssize_t
2c3c8bea 867qla2x00_sysfs_read_xgmac_stats(struct file *filp, struct kobject *kobj,
ce0423f4
AV
868 struct bin_attribute *bin_attr,
869 char *buf, loff_t off, size_t count)
870{
871 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
872 struct device, kobj)));
873 struct qla_hw_data *ha = vha->hw;
874 int rval;
875 uint16_t actual_size;
876
877 if (!capable(CAP_SYS_ADMIN) || off != 0 || count > XGMAC_DATA_SIZE)
878 return 0;
879
22ebde16
QT
880 if (unlikely(pci_channel_offline(ha->pdev)))
881 return 0;
b6faaaf7
QT
882 mutex_lock(&vha->hw->optrom_mutex);
883 if (qla2x00_chip_is_down(vha)) {
884 mutex_unlock(&vha->hw->optrom_mutex);
22ebde16 885 return 0;
b6faaaf7 886 }
22ebde16 887
ce0423f4
AV
888 if (ha->xgmac_data)
889 goto do_read;
890
891 ha->xgmac_data = dma_alloc_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
892 &ha->xgmac_data_dma, GFP_KERNEL);
893 if (!ha->xgmac_data) {
b6faaaf7 894 mutex_unlock(&vha->hw->optrom_mutex);
7c3df132 895 ql_log(ql_log_warn, vha, 0x7076,
ce0423f4
AV
896 "Unable to allocate memory for XGMAC read-data.\n");
897 return 0;
898 }
899
900do_read:
901 actual_size = 0;
902 memset(ha->xgmac_data, 0, XGMAC_DATA_SIZE);
903
904 rval = qla2x00_get_xgmac_stats(vha, ha->xgmac_data_dma,
905 XGMAC_DATA_SIZE, &actual_size);
b6faaaf7
QT
906
907 mutex_unlock(&vha->hw->optrom_mutex);
ce0423f4 908 if (rval != QLA_SUCCESS) {
7c3df132 909 ql_log(ql_log_warn, vha, 0x7077,
ce0423f4
AV
910 "Unable to read XGMAC data (%x).\n", rval);
911 count = 0;
912 }
913
58e2753c 914 count = actual_size > count ? count : actual_size;
ce0423f4
AV
915 memcpy(buf, ha->xgmac_data, count);
916
917 return count;
918}
919
920static struct bin_attribute sysfs_xgmac_stats_attr = {
921 .attr = {
922 .name = "xgmac_stats",
923 .mode = S_IRUSR,
924 },
925 .size = 0,
926 .read = qla2x00_sysfs_read_xgmac_stats,
927};
928
11bbc1d8 929static ssize_t
2c3c8bea 930qla2x00_sysfs_read_dcbx_tlv(struct file *filp, struct kobject *kobj,
11bbc1d8
AV
931 struct bin_attribute *bin_attr,
932 char *buf, loff_t off, size_t count)
933{
934 struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
935 struct device, kobj)));
936 struct qla_hw_data *ha = vha->hw;
937 int rval;
11bbc1d8
AV
938
939 if (!capable(CAP_SYS_ADMIN) || off != 0 || count > DCBX_TLV_DATA_SIZE)
940 return 0;
941
942 if (ha->dcbx_tlv)
943 goto do_read;
b6faaaf7
QT
944 mutex_lock(&vha->hw->optrom_mutex);
945 if (qla2x00_chip_is_down(vha)) {
946 mutex_unlock(&vha->hw->optrom_mutex);
22ebde16 947 return 0;
b6faaaf7 948 }
22ebde16 949
11bbc1d8
AV
950 ha->dcbx_tlv = dma_alloc_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
951 &ha->dcbx_tlv_dma, GFP_KERNEL);
952 if (!ha->dcbx_tlv) {
b6faaaf7 953 mutex_unlock(&vha->hw->optrom_mutex);
7c3df132 954 ql_log(ql_log_warn, vha, 0x7078,
11bbc1d8 955 "Unable to allocate memory for DCBX TLV read-data.\n");
b668ae37 956 return -ENOMEM;
11bbc1d8
AV
957 }
958
959do_read:
11bbc1d8
AV
960 memset(ha->dcbx_tlv, 0, DCBX_TLV_DATA_SIZE);
961
962 rval = qla2x00_get_dcbx_params(vha, ha->dcbx_tlv_dma,
963 DCBX_TLV_DATA_SIZE);
b6faaaf7
QT
964
965 mutex_unlock(&vha->hw->optrom_mutex);
966
11bbc1d8 967 if (rval != QLA_SUCCESS) {
7c3df132
SK
968 ql_log(ql_log_warn, vha, 0x7079,
969 "Unable to read DCBX TLV (%x).\n", rval);
b668ae37 970 return -EIO;
11bbc1d8
AV
971 }
972
973 memcpy(buf, ha->dcbx_tlv, count);
974
975 return count;
976}
977
978static struct bin_attribute sysfs_dcbx_tlv_attr = {
979 .attr = {
980 .name = "dcbx_tlv",
981 .mode = S_IRUSR,
982 },
983 .size = 0,
984 .read = qla2x00_sysfs_read_dcbx_tlv,
985};
986
f1663ad5
AV
987static struct sysfs_entry {
988 char *name;
989 struct bin_attribute *attr;
3695310e 990 int type;
f1663ad5
AV
991} bin_file_entries[] = {
992 { "fw_dump", &sysfs_fw_dump_attr, },
993 { "nvram", &sysfs_nvram_attr, },
994 { "optrom", &sysfs_optrom_attr, },
995 { "optrom_ctl", &sysfs_optrom_ctl_attr, },
996 { "vpd", &sysfs_vpd_attr, 1 },
997 { "sfp", &sysfs_sfp_attr, 1 },
6e181be5 998 { "reset", &sysfs_reset_attr, },
6eb54715 999 { "issue_logo", &sysfs_issue_logo_attr, },
ce0423f4 1000 { "xgmac_stats", &sysfs_xgmac_stats_attr, 3 },
11bbc1d8 1001 { "dcbx_tlv", &sysfs_dcbx_tlv_attr, 3 },
46ddab7b 1002 { NULL },
f1663ad5
AV
1003};
1004
8482e118 1005void
7b867cf7 1006qla2x00_alloc_sysfs_attr(scsi_qla_host_t *vha)
8482e118 1007{
7b867cf7 1008 struct Scsi_Host *host = vha->host;
f1663ad5
AV
1009 struct sysfs_entry *iter;
1010 int ret;
8482e118 1011
f1663ad5 1012 for (iter = bin_file_entries; iter->name; iter++) {
3695310e 1013 if (iter->type && !IS_FWI2_CAPABLE(vha->hw))
f1663ad5 1014 continue;
3695310e 1015 if (iter->type == 2 && !IS_QLA25XX(vha->hw))
ad0ecd61 1016 continue;
3695310e 1017 if (iter->type == 3 && !(IS_CNA_CAPABLE(vha->hw)))
ce0423f4 1018 continue;
f1663ad5
AV
1019
1020 ret = sysfs_create_bin_file(&host->shost_gendev.kobj,
1021 iter->attr);
1022 if (ret)
7c3df132
SK
1023 ql_log(ql_log_warn, vha, 0x00f3,
1024 "Unable to create sysfs %s binary attribute (%d).\n",
1025 iter->name, ret);
1026 else
1027 ql_dbg(ql_dbg_init, vha, 0x00f4,
0bf0efa1 1028 "Successfully created sysfs %s binary attribute.\n",
7c3df132 1029 iter->name);
7914d004 1030 }
8482e118
AV
1031}
1032
1033void
fe1b806f 1034qla2x00_free_sysfs_attr(scsi_qla_host_t *vha, bool stop_beacon)
8482e118 1035{
7b867cf7 1036 struct Scsi_Host *host = vha->host;
f1663ad5 1037 struct sysfs_entry *iter;
7b867cf7 1038 struct qla_hw_data *ha = vha->hw;
f1663ad5
AV
1039
1040 for (iter = bin_file_entries; iter->name; iter++) {
3695310e 1041 if (iter->type && !IS_FWI2_CAPABLE(ha))
f1663ad5 1042 continue;
3695310e 1043 if (iter->type == 2 && !IS_QLA25XX(ha))
ad0ecd61 1044 continue;
3695310e 1045 if (iter->type == 3 && !(IS_CNA_CAPABLE(ha)))
ce0423f4 1046 continue;
3695310e
JC
1047 if (iter->type == 0x27 &&
1048 (!IS_QLA27XX(ha) || !IS_QLA28XX(ha)))
7473952e 1049 continue;
8482e118 1050
88729e53 1051 sysfs_remove_bin_file(&host->shost_gendev.kobj,
f1663ad5 1052 iter->attr);
7914d004 1053 }
f6df144c 1054
fe1b806f 1055 if (stop_beacon && ha->beacon_blink_led == 1)
7b867cf7 1056 ha->isp_ops->beacon_off(vha);
8482e118
AV
1057}
1058
afb046e2
AV
1059/* Scsi_Host attributes. */
1060
1061static ssize_t
50b81275 1062qla2x00_driver_version_show(struct device *dev,
ee959b00 1063 struct device_attribute *attr, char *buf)
afb046e2 1064{
15904d76 1065 return scnprintf(buf, PAGE_SIZE, "%s\n", qla2x00_version_str);
afb046e2
AV
1066}
1067
1068static ssize_t
ee959b00
TJ
1069qla2x00_fw_version_show(struct device *dev,
1070 struct device_attribute *attr, char *buf)
afb046e2 1071{
7b867cf7
AC
1072 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1073 struct qla_hw_data *ha = vha->hw;
1074 char fw_str[128];
afb046e2 1075
15904d76 1076 return scnprintf(buf, PAGE_SIZE, "%s\n",
df57caba 1077 ha->isp_ops->fw_version_str(vha, fw_str, sizeof(fw_str)));
afb046e2
AV
1078}
1079
1080static ssize_t
ee959b00
TJ
1081qla2x00_serial_num_show(struct device *dev, struct device_attribute *attr,
1082 char *buf)
afb046e2 1083{
7b867cf7
AC
1084 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1085 struct qla_hw_data *ha = vha->hw;
afb046e2
AV
1086 uint32_t sn;
1087
8ae6d9c7 1088 if (IS_QLAFX00(vha->hw)) {
15904d76 1089 return scnprintf(buf, PAGE_SIZE, "%s\n",
8ae6d9c7
GM
1090 vha->hw->mr.serial_num);
1091 } else if (IS_FWI2_CAPABLE(ha)) {
ad5fa025
JC
1092 qla2xxx_get_vpd_field(vha, "SN", buf, PAGE_SIZE - 1);
1093 return strlen(strcat(buf, "\n"));
1ee27146 1094 }
8b7afc2a 1095
afb046e2 1096 sn = ((ha->serial0 & 0x1f) << 16) | (ha->serial2 << 8) | ha->serial1;
15904d76 1097 return scnprintf(buf, PAGE_SIZE, "%c%05d\n", 'A' + sn / 100000,
afb046e2
AV
1098 sn % 100000);
1099}
1100
1101static ssize_t
ee959b00
TJ
1102qla2x00_isp_name_show(struct device *dev, struct device_attribute *attr,
1103 char *buf)
afb046e2 1104{
7b867cf7 1105 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
bd432bb5 1106
15904d76 1107 return scnprintf(buf, PAGE_SIZE, "ISP%04X\n", vha->hw->pdev->device);
afb046e2
AV
1108}
1109
1110static ssize_t
ee959b00
TJ
1111qla2x00_isp_id_show(struct device *dev, struct device_attribute *attr,
1112 char *buf)
afb046e2 1113{
7b867cf7
AC
1114 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1115 struct qla_hw_data *ha = vha->hw;
8ae6d9c7
GM
1116
1117 if (IS_QLAFX00(vha->hw))
15904d76 1118 return scnprintf(buf, PAGE_SIZE, "%s\n",
8ae6d9c7
GM
1119 vha->hw->mr.hw_version);
1120
15904d76 1121 return scnprintf(buf, PAGE_SIZE, "%04x %04x %04x %04x\n",
afb046e2
AV
1122 ha->product_id[0], ha->product_id[1], ha->product_id[2],
1123 ha->product_id[3]);
1124}
1125
1126static ssize_t
ee959b00
TJ
1127qla2x00_model_name_show(struct device *dev, struct device_attribute *attr,
1128 char *buf)
afb046e2 1129{
7b867cf7 1130 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
8ae6d9c7 1131
15904d76 1132 return scnprintf(buf, PAGE_SIZE, "%s\n", vha->hw->model_number);
afb046e2
AV
1133}
1134
1135static ssize_t
ee959b00
TJ
1136qla2x00_model_desc_show(struct device *dev, struct device_attribute *attr,
1137 char *buf)
afb046e2 1138{
7b867cf7 1139 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
bd432bb5 1140
82e6afd4 1141 return scnprintf(buf, PAGE_SIZE, "%s\n", vha->hw->model_desc);
afb046e2
AV
1142}
1143
1144static ssize_t
ee959b00
TJ
1145qla2x00_pci_info_show(struct device *dev, struct device_attribute *attr,
1146 char *buf)
afb046e2 1147{
7b867cf7 1148 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
afb046e2
AV
1149 char pci_info[30];
1150
15904d76 1151 return scnprintf(buf, PAGE_SIZE, "%s\n",
dc6d6d34
BVA
1152 vha->hw->isp_ops->pci_info_str(vha, pci_info,
1153 sizeof(pci_info)));
afb046e2
AV
1154}
1155
1156static ssize_t
bbd1ae41
HR
1157qla2x00_link_state_show(struct device *dev, struct device_attribute *attr,
1158 char *buf)
afb046e2 1159{
7b867cf7
AC
1160 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1161 struct qla_hw_data *ha = vha->hw;
afb046e2
AV
1162 int len = 0;
1163
7b867cf7 1164 if (atomic_read(&vha->loop_state) == LOOP_DOWN ||
62542f4b
AV
1165 atomic_read(&vha->loop_state) == LOOP_DEAD ||
1166 vha->device_flags & DFLG_NO_CABLE)
15904d76 1167 len = scnprintf(buf, PAGE_SIZE, "Link Down\n");
7b867cf7 1168 else if (atomic_read(&vha->loop_state) != LOOP_READY ||
22ebde16 1169 qla2x00_chip_is_down(vha))
15904d76 1170 len = scnprintf(buf, PAGE_SIZE, "Unknown Link State\n");
afb046e2 1171 else {
15904d76 1172 len = scnprintf(buf, PAGE_SIZE, "Link Up - ");
afb046e2
AV
1173
1174 switch (ha->current_topology) {
1175 case ISP_CFG_NL:
15904d76 1176 len += scnprintf(buf + len, PAGE_SIZE-len, "Loop\n");
afb046e2
AV
1177 break;
1178 case ISP_CFG_FL:
15904d76 1179 len += scnprintf(buf + len, PAGE_SIZE-len, "FL_Port\n");
afb046e2
AV
1180 break;
1181 case ISP_CFG_N:
15904d76 1182 len += scnprintf(buf + len, PAGE_SIZE-len,
afb046e2
AV
1183 "N_Port to N_Port\n");
1184 break;
1185 case ISP_CFG_F:
15904d76 1186 len += scnprintf(buf + len, PAGE_SIZE-len, "F_Port\n");
afb046e2
AV
1187 break;
1188 default:
15904d76 1189 len += scnprintf(buf + len, PAGE_SIZE-len, "Loop\n");
afb046e2
AV
1190 break;
1191 }
1192 }
1193 return len;
1194}
1195
4fdfefe5 1196static ssize_t
ee959b00
TJ
1197qla2x00_zio_show(struct device *dev, struct device_attribute *attr,
1198 char *buf)
4fdfefe5 1199{
7b867cf7 1200 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
4fdfefe5
AV
1201 int len = 0;
1202
7b867cf7 1203 switch (vha->hw->zio_mode) {
4fdfefe5 1204 case QLA_ZIO_MODE_6:
15904d76 1205 len += scnprintf(buf + len, PAGE_SIZE-len, "Mode 6\n");
4fdfefe5
AV
1206 break;
1207 case QLA_ZIO_DISABLED:
15904d76 1208 len += scnprintf(buf + len, PAGE_SIZE-len, "Disabled\n");
4fdfefe5
AV
1209 break;
1210 }
1211 return len;
1212}
1213
1214static ssize_t
ee959b00
TJ
1215qla2x00_zio_store(struct device *dev, struct device_attribute *attr,
1216 const char *buf, size_t count)
4fdfefe5 1217{
7b867cf7
AC
1218 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1219 struct qla_hw_data *ha = vha->hw;
4fdfefe5
AV
1220 int val = 0;
1221 uint16_t zio_mode;
1222
4a59f71d
AV
1223 if (!IS_ZIO_SUPPORTED(ha))
1224 return -ENOTSUPP;
1225
4fdfefe5
AV
1226 if (sscanf(buf, "%d", &val) != 1)
1227 return -EINVAL;
1228
4a59f71d 1229 if (val)
4fdfefe5 1230 zio_mode = QLA_ZIO_MODE_6;
4a59f71d 1231 else
4fdfefe5 1232 zio_mode = QLA_ZIO_DISABLED;
4fdfefe5
AV
1233
1234 /* Update per-hba values and queue a reset. */
1235 if (zio_mode != QLA_ZIO_DISABLED || ha->zio_mode != QLA_ZIO_DISABLED) {
1236 ha->zio_mode = zio_mode;
7b867cf7 1237 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
4fdfefe5
AV
1238 }
1239 return strlen(buf);
1240}
1241
1242static ssize_t
ee959b00
TJ
1243qla2x00_zio_timer_show(struct device *dev, struct device_attribute *attr,
1244 char *buf)
4fdfefe5 1245{
7b867cf7 1246 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
4fdfefe5 1247
15904d76 1248 return scnprintf(buf, PAGE_SIZE, "%d us\n", vha->hw->zio_timer * 100);
4fdfefe5
AV
1249}
1250
1251static ssize_t
ee959b00
TJ
1252qla2x00_zio_timer_store(struct device *dev, struct device_attribute *attr,
1253 const char *buf, size_t count)
4fdfefe5 1254{
7b867cf7 1255 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
4fdfefe5
AV
1256 int val = 0;
1257 uint16_t zio_timer;
1258
1259 if (sscanf(buf, "%d", &val) != 1)
1260 return -EINVAL;
1261 if (val > 25500 || val < 100)
1262 return -ERANGE;
1263
1264 zio_timer = (uint16_t)(val / 100);
7b867cf7 1265 vha->hw->zio_timer = zio_timer;
4fdfefe5
AV
1266
1267 return strlen(buf);
1268}
1269
8b4673ba
QT
1270static ssize_t
1271qla_zio_threshold_show(struct device *dev, struct device_attribute *attr,
1272 char *buf)
1273{
1274 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1275
1276 return scnprintf(buf, PAGE_SIZE, "%d exchanges\n",
1277 vha->hw->last_zio_threshold);
1278}
1279
1280static ssize_t
1281qla_zio_threshold_store(struct device *dev, struct device_attribute *attr,
1282 const char *buf, size_t count)
1283{
1284 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1285 int val = 0;
1286
1287 if (vha->hw->zio_mode != QLA_ZIO_MODE_6)
1288 return -EINVAL;
1289 if (sscanf(buf, "%d", &val) != 1)
1290 return -EINVAL;
1703659d 1291 if (val < 0 || val > 256)
8b4673ba
QT
1292 return -ERANGE;
1293
1294 atomic_set(&vha->hw->zio_threshold, val);
1295 return strlen(buf);
1296}
1297
f6df144c 1298static ssize_t
ee959b00
TJ
1299qla2x00_beacon_show(struct device *dev, struct device_attribute *attr,
1300 char *buf)
f6df144c 1301{
7b867cf7 1302 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
f6df144c
AV
1303 int len = 0;
1304
7b867cf7 1305 if (vha->hw->beacon_blink_led)
15904d76 1306 len += scnprintf(buf + len, PAGE_SIZE-len, "Enabled\n");
f6df144c 1307 else
15904d76 1308 len += scnprintf(buf + len, PAGE_SIZE-len, "Disabled\n");
f6df144c
AV
1309 return len;
1310}
1311
1312static ssize_t
ee959b00
TJ
1313qla2x00_beacon_store(struct device *dev, struct device_attribute *attr,
1314 const char *buf, size_t count)
f6df144c 1315{
7b867cf7
AC
1316 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1317 struct qla_hw_data *ha = vha->hw;
f6df144c
AV
1318 int val = 0;
1319 int rval;
1320
1321 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1322 return -EPERM;
1323
b6faaaf7
QT
1324 if (sscanf(buf, "%d", &val) != 1)
1325 return -EINVAL;
1326
1327 mutex_lock(&vha->hw->optrom_mutex);
22ebde16 1328 if (qla2x00_chip_is_down(vha)) {
b6faaaf7 1329 mutex_unlock(&vha->hw->optrom_mutex);
7c3df132 1330 ql_log(ql_log_warn, vha, 0x707a,
f6df144c
AV
1331 "Abort ISP active -- ignoring beacon request.\n");
1332 return -EBUSY;
1333 }
1334
f6df144c 1335 if (val)
7b867cf7 1336 rval = ha->isp_ops->beacon_on(vha);
f6df144c 1337 else
7b867cf7 1338 rval = ha->isp_ops->beacon_off(vha);
f6df144c
AV
1339
1340 if (rval != QLA_SUCCESS)
1341 count = 0;
1342
b6faaaf7
QT
1343 mutex_unlock(&vha->hw->optrom_mutex);
1344
f6df144c
AV
1345 return count;
1346}
1347
07553b1e
JC
1348static ssize_t
1349qla2x00_beacon_config_show(struct device *dev, struct device_attribute *attr,
1350 char *buf)
1351{
1352 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1353 struct qla_hw_data *ha = vha->hw;
1354 uint16_t led[3] = { 0 };
1355
1356 if (!IS_QLA2031(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
1357 return -EPERM;
1358
1359 if (ql26xx_led_config(vha, 0, led))
1360 return scnprintf(buf, PAGE_SIZE, "\n");
1361
1362 return scnprintf(buf, PAGE_SIZE, "%#04hx %#04hx %#04hx\n",
1363 led[0], led[1], led[2]);
1364}
1365
1366static ssize_t
1367qla2x00_beacon_config_store(struct device *dev, struct device_attribute *attr,
1368 const char *buf, size_t count)
1369{
1370 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1371 struct qla_hw_data *ha = vha->hw;
1372 uint16_t options = BIT_0;
1373 uint16_t led[3] = { 0 };
1374 uint16_t word[4];
1375 int n;
1376
1377 if (!IS_QLA2031(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
1378 return -EPERM;
1379
1380 n = sscanf(buf, "%hx %hx %hx %hx", word+0, word+1, word+2, word+3);
1381 if (n == 4) {
1382 if (word[0] == 3) {
1383 options |= BIT_3|BIT_2|BIT_1;
1384 led[0] = word[1];
1385 led[1] = word[2];
1386 led[2] = word[3];
1387 goto write;
1388 }
1389 return -EINVAL;
1390 }
1391
1392 if (n == 2) {
1393 /* check led index */
1394 if (word[0] == 0) {
1395 options |= BIT_2;
1396 led[0] = word[1];
1397 goto write;
1398 }
1399 if (word[0] == 1) {
1400 options |= BIT_3;
1401 led[1] = word[1];
1402 goto write;
1403 }
1404 if (word[0] == 2) {
1405 options |= BIT_1;
1406 led[2] = word[1];
1407 goto write;
1408 }
1409 return -EINVAL;
1410 }
1411
1412 return -EINVAL;
1413
1414write:
1415 if (ql26xx_led_config(vha, options, led))
1416 return -EFAULT;
1417
1418 return count;
1419}
1420
30c47662 1421static ssize_t
ee959b00
TJ
1422qla2x00_optrom_bios_version_show(struct device *dev,
1423 struct device_attribute *attr, char *buf)
30c47662 1424{
7b867cf7
AC
1425 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1426 struct qla_hw_data *ha = vha->hw;
bd432bb5 1427
15904d76 1428 return scnprintf(buf, PAGE_SIZE, "%d.%02d\n", ha->bios_revision[1],
30c47662
AV
1429 ha->bios_revision[0]);
1430}
1431
1432static ssize_t
ee959b00
TJ
1433qla2x00_optrom_efi_version_show(struct device *dev,
1434 struct device_attribute *attr, char *buf)
30c47662 1435{
7b867cf7
AC
1436 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1437 struct qla_hw_data *ha = vha->hw;
bd432bb5 1438
15904d76 1439 return scnprintf(buf, PAGE_SIZE, "%d.%02d\n", ha->efi_revision[1],
30c47662
AV
1440 ha->efi_revision[0]);
1441}
1442
1443static ssize_t
ee959b00
TJ
1444qla2x00_optrom_fcode_version_show(struct device *dev,
1445 struct device_attribute *attr, char *buf)
30c47662 1446{
7b867cf7
AC
1447 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1448 struct qla_hw_data *ha = vha->hw;
bd432bb5 1449
15904d76 1450 return scnprintf(buf, PAGE_SIZE, "%d.%02d\n", ha->fcode_revision[1],
30c47662
AV
1451 ha->fcode_revision[0]);
1452}
1453
1454static ssize_t
ee959b00
TJ
1455qla2x00_optrom_fw_version_show(struct device *dev,
1456 struct device_attribute *attr, char *buf)
30c47662 1457{
7b867cf7
AC
1458 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1459 struct qla_hw_data *ha = vha->hw;
bd432bb5 1460
15904d76 1461 return scnprintf(buf, PAGE_SIZE, "%d.%02d.%02d %d\n",
30c47662
AV
1462 ha->fw_revision[0], ha->fw_revision[1], ha->fw_revision[2],
1463 ha->fw_revision[3]);
1464}
1465
0f2d962f
MI
1466static ssize_t
1467qla2x00_optrom_gold_fw_version_show(struct device *dev,
1468 struct device_attribute *attr, char *buf)
1469{
1470 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1471 struct qla_hw_data *ha = vha->hw;
1472
ecc89f25
JC
1473 if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
1474 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
15904d76 1475 return scnprintf(buf, PAGE_SIZE, "\n");
0f2d962f 1476
15904d76 1477 return scnprintf(buf, PAGE_SIZE, "%d.%02d.%02d (%d)\n",
0f2d962f
MI
1478 ha->gold_fw_version[0], ha->gold_fw_version[1],
1479 ha->gold_fw_version[2], ha->gold_fw_version[3]);
1480}
1481
e5f5f6f7
HZ
1482static ssize_t
1483qla2x00_total_isp_aborts_show(struct device *dev,
1484 struct device_attribute *attr, char *buf)
1485{
7b867cf7 1486 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
bd432bb5 1487
15904d76 1488 return scnprintf(buf, PAGE_SIZE, "%d\n",
2be21fa2 1489 vha->qla_stats.total_isp_aborts);
e5f5f6f7
HZ
1490}
1491
9a069e19
GM
1492static ssize_t
1493qla24xx_84xx_fw_version_show(struct device *dev,
1494 struct device_attribute *attr, char *buf)
1495{
1496 int rval = QLA_SUCCESS;
3695310e 1497 uint16_t status[2] = { 0 };
9a069e19
GM
1498 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1499 struct qla_hw_data *ha = vha->hw;
1500
0b9dae6a 1501 if (!IS_QLA84XX(ha))
15904d76 1502 return scnprintf(buf, PAGE_SIZE, "\n");
0b9dae6a 1503
3695310e 1504 if (!ha->cs84xx->op_fw_version) {
0b9dae6a 1505 rval = qla84xx_verify_chip(vha, status);
9a069e19 1506
3695310e
JC
1507 if (!rval && !status[0])
1508 return scnprintf(buf, PAGE_SIZE, "%u\n",
1509 (uint32_t)ha->cs84xx->op_fw_version);
1510 }
9a069e19 1511
15904d76 1512 return scnprintf(buf, PAGE_SIZE, "\n");
9a069e19
GM
1513}
1514
2a3192a3
JC
1515static ssize_t
1516qla2x00_serdes_version_show(struct device *dev, struct device_attribute *attr,
1517 char *buf)
1518{
1519 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1520 struct qla_hw_data *ha = vha->hw;
1521
1522 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
1523 return scnprintf(buf, PAGE_SIZE, "\n");
1524
1525 return scnprintf(buf, PAGE_SIZE, "%d.%02d.%02d\n",
1526 ha->serdes_version[0], ha->serdes_version[1],
1527 ha->serdes_version[2]);
1528}
1529
3a03eb79
AV
1530static ssize_t
1531qla2x00_mpi_version_show(struct device *dev, struct device_attribute *attr,
1532 char *buf)
1533{
1534 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1535 struct qla_hw_data *ha = vha->hw;
1536
03aa868c 1537 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha) && !IS_QLA8044(ha) &&
ecc89f25 1538 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
15904d76 1539 return scnprintf(buf, PAGE_SIZE, "\n");
3a03eb79 1540
15904d76 1541 return scnprintf(buf, PAGE_SIZE, "%d.%02d.%02d (%x)\n",
3a03eb79 1542 ha->mpi_version[0], ha->mpi_version[1], ha->mpi_version[2],
55a96158
AV
1543 ha->mpi_capabilities);
1544}
1545
1546static ssize_t
1547qla2x00_phy_version_show(struct device *dev, struct device_attribute *attr,
1548 char *buf)
1549{
1550 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1551 struct qla_hw_data *ha = vha->hw;
1552
f863f603 1553 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
15904d76 1554 return scnprintf(buf, PAGE_SIZE, "\n");
55a96158 1555
15904d76 1556 return scnprintf(buf, PAGE_SIZE, "%d.%02d.%02d\n",
55a96158 1557 ha->phy_version[0], ha->phy_version[1], ha->phy_version[2]);
3a03eb79
AV
1558}
1559
fbcbb5d0
LC
1560static ssize_t
1561qla2x00_flash_block_size_show(struct device *dev,
1562 struct device_attribute *attr, char *buf)
1563{
1564 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1565 struct qla_hw_data *ha = vha->hw;
1566
15904d76 1567 return scnprintf(buf, PAGE_SIZE, "0x%x\n", ha->fdt_block_size);
fbcbb5d0
LC
1568}
1569
bad7001c
AV
1570static ssize_t
1571qla2x00_vlan_id_show(struct device *dev, struct device_attribute *attr,
1572 char *buf)
1573{
1574 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1575
6246b8a1 1576 if (!IS_CNA_CAPABLE(vha->hw))
15904d76 1577 return scnprintf(buf, PAGE_SIZE, "\n");
bad7001c 1578
15904d76 1579 return scnprintf(buf, PAGE_SIZE, "%d\n", vha->fcoe_vlan_id);
bad7001c
AV
1580}
1581
1582static ssize_t
1583qla2x00_vn_port_mac_address_show(struct device *dev,
1584 struct device_attribute *attr, char *buf)
1585{
1586 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1587
6246b8a1 1588 if (!IS_CNA_CAPABLE(vha->hw))
15904d76 1589 return scnprintf(buf, PAGE_SIZE, "\n");
bad7001c 1590
15904d76 1591 return scnprintf(buf, PAGE_SIZE, "%pMR\n", vha->fcoe_vn_port_mac);
bad7001c
AV
1592}
1593
7f774025
AV
1594static ssize_t
1595qla2x00_fabric_param_show(struct device *dev, struct device_attribute *attr,
1596 char *buf)
1597{
1598 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1599
15904d76 1600 return scnprintf(buf, PAGE_SIZE, "%d\n", vha->hw->switch_cap);
7f774025
AV
1601}
1602
794a5691
AV
1603static ssize_t
1604qla2x00_thermal_temp_show(struct device *dev,
1605 struct device_attribute *attr, char *buf)
1606{
1607 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
fe52f6e1 1608 uint16_t temp = 0;
b6faaaf7 1609 int rc;
794a5691 1610
b6faaaf7 1611 mutex_lock(&vha->hw->optrom_mutex);
22ebde16 1612 if (qla2x00_chip_is_down(vha)) {
b6faaaf7 1613 mutex_unlock(&vha->hw->optrom_mutex);
fe52f6e1
JC
1614 ql_log(ql_log_warn, vha, 0x70dc, "ISP reset active.\n");
1615 goto done;
1616 }
1617
1618 if (vha->hw->flags.eeh_busy) {
b6faaaf7 1619 mutex_unlock(&vha->hw->optrom_mutex);
fe52f6e1
JC
1620 ql_log(ql_log_warn, vha, 0x70dd, "PCI EEH busy.\n");
1621 goto done;
1622 }
1623
b6faaaf7
QT
1624 rc = qla2x00_get_thermal_temp(vha, &temp);
1625 mutex_unlock(&vha->hw->optrom_mutex);
1626 if (rc == QLA_SUCCESS)
15904d76 1627 return scnprintf(buf, PAGE_SIZE, "%d\n", temp);
794a5691 1628
fe52f6e1 1629done:
15904d76 1630 return scnprintf(buf, PAGE_SIZE, "\n");
794a5691
AV
1631}
1632
656e8912
AV
1633static ssize_t
1634qla2x00_fw_state_show(struct device *dev, struct device_attribute *attr,
1635 char *buf)
1636{
1637 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
85880801 1638 int rval = QLA_FUNCTION_FAILED;
b5a340dd 1639 uint16_t state[6];
8ae6d9c7
GM
1640 uint32_t pstate;
1641
1642 if (IS_QLAFX00(vha->hw)) {
1643 pstate = qlafx00_fw_state_show(dev, attr, buf);
15904d76 1644 return scnprintf(buf, PAGE_SIZE, "0x%x\n", pstate);
8ae6d9c7 1645 }
656e8912 1646
b6faaaf7
QT
1647 mutex_lock(&vha->hw->optrom_mutex);
1648 if (qla2x00_chip_is_down(vha)) {
1649 mutex_unlock(&vha->hw->optrom_mutex);
7c3df132
SK
1650 ql_log(ql_log_warn, vha, 0x707c,
1651 "ISP reset active.\n");
b6faaaf7
QT
1652 goto out;
1653 } else if (vha->hw->flags.eeh_busy) {
1654 mutex_unlock(&vha->hw->optrom_mutex);
1655 goto out;
1656 }
1657
1658 rval = qla2x00_get_firmware_state(vha, state);
1659 mutex_unlock(&vha->hw->optrom_mutex);
1660out:
1661 if (rval != QLA_SUCCESS) {
656e8912 1662 memset(state, -1, sizeof(state));
b6faaaf7
QT
1663 rval = qla2x00_get_firmware_state(vha, state);
1664 }
656e8912 1665
b5a340dd
JC
1666 return scnprintf(buf, PAGE_SIZE, "0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
1667 state[0], state[1], state[2], state[3], state[4], state[5]);
656e8912
AV
1668}
1669
a9b6f722
SK
1670static ssize_t
1671qla2x00_diag_requests_show(struct device *dev,
1672 struct device_attribute *attr, char *buf)
1673{
1674 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1675
1676 if (!IS_BIDI_CAPABLE(vha->hw))
15904d76 1677 return scnprintf(buf, PAGE_SIZE, "\n");
a9b6f722 1678
15904d76 1679 return scnprintf(buf, PAGE_SIZE, "%llu\n", vha->bidi_stats.io_count);
a9b6f722
SK
1680}
1681
1682static ssize_t
1683qla2x00_diag_megabytes_show(struct device *dev,
1684 struct device_attribute *attr, char *buf)
1685{
1686 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1687
1688 if (!IS_BIDI_CAPABLE(vha->hw))
15904d76 1689 return scnprintf(buf, PAGE_SIZE, "\n");
a9b6f722 1690
15904d76 1691 return scnprintf(buf, PAGE_SIZE, "%llu\n",
a9b6f722
SK
1692 vha->bidi_stats.transfer_bytes >> 20);
1693}
1694
40129a4c
HZ
1695static ssize_t
1696qla2x00_fw_dump_size_show(struct device *dev, struct device_attribute *attr,
1697 char *buf)
1698{
1699 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1700 struct qla_hw_data *ha = vha->hw;
1701 uint32_t size;
1702
1703 if (!ha->fw_dumped)
1704 size = 0;
cf3af76b 1705 else if (IS_P3P_TYPE(ha))
40129a4c
HZ
1706 size = ha->md_template_size + ha->md_dump_size;
1707 else
1708 size = ha->fw_dump_len;
1709
15904d76 1710 return scnprintf(buf, PAGE_SIZE, "%d\n", size);
40129a4c
HZ
1711}
1712
a1b23c5a
CD
1713static ssize_t
1714qla2x00_allow_cna_fw_dump_show(struct device *dev,
1715 struct device_attribute *attr, char *buf)
1716{
1717 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1718
1719 if (!IS_P3P_TYPE(vha->hw))
1720 return scnprintf(buf, PAGE_SIZE, "\n");
1721 else
1722 return scnprintf(buf, PAGE_SIZE, "%s\n",
1723 vha->hw->allow_cna_fw_dump ? "true" : "false");
1724}
1725
1726static ssize_t
1727qla2x00_allow_cna_fw_dump_store(struct device *dev,
1728 struct device_attribute *attr, const char *buf, size_t count)
1729{
1730 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1731 int val = 0;
1732
1733 if (!IS_P3P_TYPE(vha->hw))
1734 return -EINVAL;
1735
1736 if (sscanf(buf, "%d", &val) != 1)
1737 return -EINVAL;
1738
1739 vha->hw->allow_cna_fw_dump = val != 0;
1740
1741 return strlen(buf);
1742}
1743
03aa868c
SC
1744static ssize_t
1745qla2x00_pep_version_show(struct device *dev, struct device_attribute *attr,
1746 char *buf)
1747{
1748 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1749 struct qla_hw_data *ha = vha->hw;
1750
ecc89f25 1751 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
03aa868c
SC
1752 return scnprintf(buf, PAGE_SIZE, "\n");
1753
1754 return scnprintf(buf, PAGE_SIZE, "%d.%02d.%02d\n",
1755 ha->pep_version[0], ha->pep_version[1], ha->pep_version[2]);
1756}
1757
92d4408e 1758static ssize_t
72a92df2
JC
1759qla2x00_min_supported_speed_show(struct device *dev,
1760 struct device_attribute *attr, char *buf)
92d4408e
SC
1761{
1762 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1763 struct qla_hw_data *ha = vha->hw;
1764
ecc89f25 1765 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
92d4408e
SC
1766 return scnprintf(buf, PAGE_SIZE, "\n");
1767
1768 return scnprintf(buf, PAGE_SIZE, "%s\n",
72a92df2
JC
1769 ha->min_supported_speed == 6 ? "64Gps" :
1770 ha->min_supported_speed == 5 ? "32Gps" :
1771 ha->min_supported_speed == 4 ? "16Gps" :
1772 ha->min_supported_speed == 3 ? "8Gps" :
1773 ha->min_supported_speed == 2 ? "4Gps" :
1774 ha->min_supported_speed != 0 ? "unknown" : "");
92d4408e
SC
1775}
1776
1777static ssize_t
72a92df2
JC
1778qla2x00_max_supported_speed_show(struct device *dev,
1779 struct device_attribute *attr, char *buf)
92d4408e
SC
1780{
1781 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1782 struct qla_hw_data *ha = vha->hw;
1783
ecc89f25 1784 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
92d4408e
SC
1785 return scnprintf(buf, PAGE_SIZE, "\n");
1786
1787 return scnprintf(buf, PAGE_SIZE, "%s\n",
72a92df2
JC
1788 ha->max_supported_speed == 2 ? "64Gps" :
1789 ha->max_supported_speed == 1 ? "32Gps" :
1790 ha->max_supported_speed == 0 ? "16Gps" : "unknown");
92d4408e
SC
1791}
1792
4910b524
AG
1793static ssize_t
1794qla2x00_port_speed_store(struct device *dev, struct device_attribute *attr,
1795 const char *buf, size_t count)
1796{
1797 struct scsi_qla_host *vha = shost_priv(dev_to_shost(dev));
1798 ulong type, speed;
1799 int oldspeed, rval;
1800 int mode = QLA_SET_DATA_RATE_LR;
1801 struct qla_hw_data *ha = vha->hw;
1802
ecc89f25 1803 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) {
4910b524
AG
1804 ql_log(ql_log_warn, vha, 0x70d8,
1805 "Speed setting not supported \n");
1806 return -EINVAL;
1807 }
1808
1809 rval = kstrtol(buf, 10, &type);
b8870ec6
DC
1810 if (rval)
1811 return rval;
4910b524
AG
1812 speed = type;
1813 if (type == 40 || type == 80 || type == 160 ||
1814 type == 320) {
1815 ql_dbg(ql_dbg_user, vha, 0x70d9,
1816 "Setting will be affected after a loss of sync\n");
1817 type = type/10;
1818 mode = QLA_SET_DATA_RATE_NOLR;
1819 }
1820
1821 oldspeed = ha->set_data_rate;
1822
1823 switch (type) {
1824 case 0:
1825 ha->set_data_rate = PORT_SPEED_AUTO;
1826 break;
1827 case 4:
1828 ha->set_data_rate = PORT_SPEED_4GB;
1829 break;
1830 case 8:
1831 ha->set_data_rate = PORT_SPEED_8GB;
1832 break;
1833 case 16:
1834 ha->set_data_rate = PORT_SPEED_16GB;
1835 break;
1836 case 32:
1837 ha->set_data_rate = PORT_SPEED_32GB;
1838 break;
1839 default:
1840 ql_log(ql_log_warn, vha, 0x1199,
1841 "Unrecognized speed setting:%lx. Setting Autoneg\n",
1842 speed);
1843 ha->set_data_rate = PORT_SPEED_AUTO;
1844 }
1845
1846 if (qla2x00_chip_is_down(vha) || (oldspeed == ha->set_data_rate))
1847 return -EINVAL;
1848
1849 ql_log(ql_log_info, vha, 0x70da,
1850 "Setting speed to %lx Gbps \n", type);
1851
1852 rval = qla2x00_set_data_rate(vha, mode);
1853 if (rval != QLA_SUCCESS)
1854 return -EIO;
1855
1856 return strlen(buf);
1857}
1858
1859static ssize_t
1860qla2x00_port_speed_show(struct device *dev, struct device_attribute *attr,
1861 char *buf)
1862{
1863 struct scsi_qla_host *vha = shost_priv(dev_to_shost(dev));
1864 struct qla_hw_data *ha = vha->hw;
1865 ssize_t rval;
1866 char *spd[7] = {"0", "0", "0", "4", "8", "16", "32"};
1867
1868 rval = qla2x00_get_data_rate(vha);
1869 if (rval != QLA_SUCCESS) {
1870 ql_log(ql_log_warn, vha, 0x70db,
1871 "Unable to get port speed rval:%zd\n", rval);
1872 return -EINVAL;
1873 }
1874
4910b524
AG
1875 return scnprintf(buf, PAGE_SIZE, "%s\n", spd[ha->link_data_rate]);
1876}
1877
0645cb83
QT
1878/* ----- */
1879
1880static ssize_t
1881qlini_mode_show(struct device *dev, struct device_attribute *attr, char *buf)
1882{
1883 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1884 int len = 0;
1885
1886 len += scnprintf(buf + len, PAGE_SIZE-len,
1887 "Supported options: enabled | disabled | dual | exclusive\n");
1888
1889 /* --- */
1890 len += scnprintf(buf + len, PAGE_SIZE-len, "Current selection: ");
1891
1892 switch (vha->qlini_mode) {
1893 case QLA2XXX_INI_MODE_EXCLUSIVE:
1894 len += scnprintf(buf + len, PAGE_SIZE-len,
1895 QLA2XXX_INI_MODE_STR_EXCLUSIVE);
1896 break;
1897 case QLA2XXX_INI_MODE_DISABLED:
1898 len += scnprintf(buf + len, PAGE_SIZE-len,
1899 QLA2XXX_INI_MODE_STR_DISABLED);
1900 break;
1901 case QLA2XXX_INI_MODE_ENABLED:
1902 len += scnprintf(buf + len, PAGE_SIZE-len,
1903 QLA2XXX_INI_MODE_STR_ENABLED);
1904 break;
1905 case QLA2XXX_INI_MODE_DUAL:
1906 len += scnprintf(buf + len, PAGE_SIZE-len,
1907 QLA2XXX_INI_MODE_STR_DUAL);
1908 break;
1909 }
1910 len += scnprintf(buf + len, PAGE_SIZE-len, "\n");
1911
1912 return len;
1913}
1914
1915static char *mode_to_str[] = {
1916 "exclusive",
1917 "disabled",
1918 "enabled",
1919 "dual",
1920};
1921
1922#define NEED_EXCH_OFFLOAD(_exchg) ((_exchg) > FW_DEF_EXCHANGES_CNT)
1b007f96 1923static void qla_set_ini_mode(scsi_qla_host_t *vha, int op)
0645cb83 1924{
0645cb83
QT
1925 enum {
1926 NO_ACTION,
1927 MODE_CHANGE_ACCEPT,
1928 MODE_CHANGE_NO_ACTION,
1929 TARGET_STILL_ACTIVE,
1930 };
1931 int action = NO_ACTION;
1932 int set_mode = 0;
1933 u8 eo_toggle = 0; /* exchange offload flipped */
1934
1935 switch (vha->qlini_mode) {
1936 case QLA2XXX_INI_MODE_DISABLED:
1937 switch (op) {
1938 case QLA2XXX_INI_MODE_DISABLED:
1939 if (qla_tgt_mode_enabled(vha)) {
1940 if (NEED_EXCH_OFFLOAD(vha->u_ql2xexchoffld) !=
1941 vha->hw->flags.exchoffld_enabled)
1942 eo_toggle = 1;
1943 if (((vha->ql2xexchoffld !=
1944 vha->u_ql2xexchoffld) &&
1945 NEED_EXCH_OFFLOAD(vha->u_ql2xexchoffld)) ||
1946 eo_toggle) {
1947 /*
1948 * The number of exchange to be offload
1949 * was tweaked or offload option was
1950 * flipped
1951 */
1952 action = MODE_CHANGE_ACCEPT;
1953 } else {
1954 action = MODE_CHANGE_NO_ACTION;
1955 }
1956 } else {
1957 action = MODE_CHANGE_NO_ACTION;
1958 }
1959 break;
1960 case QLA2XXX_INI_MODE_EXCLUSIVE:
1961 if (qla_tgt_mode_enabled(vha)) {
1962 if (NEED_EXCH_OFFLOAD(vha->u_ql2xexchoffld) !=
1963 vha->hw->flags.exchoffld_enabled)
1964 eo_toggle = 1;
1965 if (((vha->ql2xexchoffld !=
1966 vha->u_ql2xexchoffld) &&
1967 NEED_EXCH_OFFLOAD(vha->u_ql2xexchoffld)) ||
1968 eo_toggle) {
1969 /*
1970 * The number of exchange to be offload
1971 * was tweaked or offload option was
1972 * flipped
1973 */
1974 action = MODE_CHANGE_ACCEPT;
1975 } else {
1976 action = MODE_CHANGE_NO_ACTION;
1977 }
1978 } else {
1979 action = MODE_CHANGE_ACCEPT;
1980 }
1981 break;
1982 case QLA2XXX_INI_MODE_DUAL:
1983 action = MODE_CHANGE_ACCEPT;
1984 /* active_mode is target only, reset it to dual */
1985 if (qla_tgt_mode_enabled(vha)) {
1986 set_mode = 1;
1987 action = MODE_CHANGE_ACCEPT;
1988 } else {
1989 action = MODE_CHANGE_NO_ACTION;
1990 }
1991 break;
1992
1993 case QLA2XXX_INI_MODE_ENABLED:
1994 if (qla_tgt_mode_enabled(vha))
1995 action = TARGET_STILL_ACTIVE;
1996 else {
1997 action = MODE_CHANGE_ACCEPT;
1998 set_mode = 1;
1999 }
2000 break;
2001 }
2002 break;
2003
2004 case QLA2XXX_INI_MODE_EXCLUSIVE:
2005 switch (op) {
2006 case QLA2XXX_INI_MODE_EXCLUSIVE:
2007 if (qla_tgt_mode_enabled(vha)) {
2008 if (NEED_EXCH_OFFLOAD(vha->u_ql2xexchoffld) !=
2009 vha->hw->flags.exchoffld_enabled)
2010 eo_toggle = 1;
2011 if (((vha->ql2xexchoffld !=
2012 vha->u_ql2xexchoffld) &&
2013 NEED_EXCH_OFFLOAD(vha->u_ql2xexchoffld)) ||
2014 eo_toggle)
2015 /*
2016 * The number of exchange to be offload
2017 * was tweaked or offload option was
2018 * flipped
2019 */
2020 action = MODE_CHANGE_ACCEPT;
2021 else
2022 action = NO_ACTION;
2023 } else
2024 action = NO_ACTION;
2025
2026 break;
2027
2028 case QLA2XXX_INI_MODE_DISABLED:
2029 if (qla_tgt_mode_enabled(vha)) {
2030 if (NEED_EXCH_OFFLOAD(vha->u_ql2xexchoffld) !=
2031 vha->hw->flags.exchoffld_enabled)
2032 eo_toggle = 1;
2033 if (((vha->ql2xexchoffld !=
2034 vha->u_ql2xexchoffld) &&
2035 NEED_EXCH_OFFLOAD(vha->u_ql2xexchoffld)) ||
2036 eo_toggle)
2037 action = MODE_CHANGE_ACCEPT;
2038 else
2039 action = MODE_CHANGE_NO_ACTION;
2040 } else
2041 action = MODE_CHANGE_NO_ACTION;
2042 break;
2043
2044 case QLA2XXX_INI_MODE_DUAL: /* exclusive -> dual */
2045 if (qla_tgt_mode_enabled(vha)) {
2046 action = MODE_CHANGE_ACCEPT;
2047 set_mode = 1;
2048 } else
2049 action = MODE_CHANGE_ACCEPT;
2050 break;
2051
2052 case QLA2XXX_INI_MODE_ENABLED:
2053 if (qla_tgt_mode_enabled(vha))
2054 action = TARGET_STILL_ACTIVE;
2055 else {
2056 if (vha->hw->flags.fw_started)
2057 action = MODE_CHANGE_NO_ACTION;
2058 else
2059 action = MODE_CHANGE_ACCEPT;
2060 }
2061 break;
2062 }
2063 break;
2064
2065 case QLA2XXX_INI_MODE_ENABLED:
2066 switch (op) {
2067 case QLA2XXX_INI_MODE_ENABLED:
2068 if (NEED_EXCH_OFFLOAD(vha->u_ql2xiniexchg) !=
2069 vha->hw->flags.exchoffld_enabled)
2070 eo_toggle = 1;
2071 if (((vha->ql2xiniexchg != vha->u_ql2xiniexchg) &&
2072 NEED_EXCH_OFFLOAD(vha->u_ql2xiniexchg)) ||
2073 eo_toggle)
2074 action = MODE_CHANGE_ACCEPT;
2075 else
2076 action = NO_ACTION;
2077 break;
2078 case QLA2XXX_INI_MODE_DUAL:
2079 case QLA2XXX_INI_MODE_DISABLED:
2080 action = MODE_CHANGE_ACCEPT;
2081 break;
2082 default:
2083 action = MODE_CHANGE_NO_ACTION;
2084 break;
2085 }
2086 break;
2087
2088 case QLA2XXX_INI_MODE_DUAL:
2089 switch (op) {
2090 case QLA2XXX_INI_MODE_DUAL:
2091 if (qla_tgt_mode_enabled(vha) ||
2092 qla_dual_mode_enabled(vha)) {
2093 if (NEED_EXCH_OFFLOAD(vha->u_ql2xexchoffld +
2094 vha->u_ql2xiniexchg) !=
2095 vha->hw->flags.exchoffld_enabled)
2096 eo_toggle = 1;
2097
2098 if ((((vha->ql2xexchoffld +
2099 vha->ql2xiniexchg) !=
2100 (vha->u_ql2xiniexchg +
2101 vha->u_ql2xexchoffld)) &&
2102 NEED_EXCH_OFFLOAD(vha->u_ql2xiniexchg +
2103 vha->u_ql2xexchoffld)) || eo_toggle)
2104 action = MODE_CHANGE_ACCEPT;
2105 else
2106 action = NO_ACTION;
2107 } else {
2108 if (NEED_EXCH_OFFLOAD(vha->u_ql2xexchoffld +
2109 vha->u_ql2xiniexchg) !=
2110 vha->hw->flags.exchoffld_enabled)
2111 eo_toggle = 1;
2112
2113 if ((((vha->ql2xexchoffld + vha->ql2xiniexchg)
2114 != (vha->u_ql2xiniexchg +
2115 vha->u_ql2xexchoffld)) &&
2116 NEED_EXCH_OFFLOAD(vha->u_ql2xiniexchg +
2117 vha->u_ql2xexchoffld)) || eo_toggle)
2118 action = MODE_CHANGE_NO_ACTION;
2119 else
2120 action = NO_ACTION;
2121 }
2122 break;
2123
2124 case QLA2XXX_INI_MODE_DISABLED:
2125 if (qla_tgt_mode_enabled(vha) ||
2126 qla_dual_mode_enabled(vha)) {
2127 /* turning off initiator mode */
2128 set_mode = 1;
2129 action = MODE_CHANGE_ACCEPT;
2130 } else {
2131 action = MODE_CHANGE_NO_ACTION;
2132 }
2133 break;
2134
2135 case QLA2XXX_INI_MODE_EXCLUSIVE:
2136 if (qla_tgt_mode_enabled(vha) ||
2137 qla_dual_mode_enabled(vha)) {
2138 set_mode = 1;
2139 action = MODE_CHANGE_ACCEPT;
2140 } else {
2141 action = MODE_CHANGE_ACCEPT;
2142 }
2143 break;
2144
2145 case QLA2XXX_INI_MODE_ENABLED:
2146 if (qla_tgt_mode_enabled(vha) ||
2147 qla_dual_mode_enabled(vha)) {
2148 action = TARGET_STILL_ACTIVE;
2149 } else {
2150 action = MODE_CHANGE_ACCEPT;
2151 }
2152 }
2153 break;
2154 }
2155
2156 switch (action) {
2157 case MODE_CHANGE_ACCEPT:
2158 ql_log(ql_log_warn, vha, 0xffff,
2159 "Mode change accepted. From %s to %s, Tgt exchg %d|%d. ini exchg %d|%d\n",
2160 mode_to_str[vha->qlini_mode], mode_to_str[op],
2161 vha->ql2xexchoffld, vha->u_ql2xexchoffld,
2162 vha->ql2xiniexchg, vha->u_ql2xiniexchg);
2163
2164 vha->qlini_mode = op;
2165 vha->ql2xexchoffld = vha->u_ql2xexchoffld;
2166 vha->ql2xiniexchg = vha->u_ql2xiniexchg;
2167 if (set_mode)
2168 qlt_set_mode(vha);
2169 vha->flags.online = 1;
2170 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2171 break;
2172
2173 case MODE_CHANGE_NO_ACTION:
2174 ql_log(ql_log_warn, vha, 0xffff,
2175 "Mode is set. No action taken. From %s to %s, Tgt exchg %d|%d. ini exchg %d|%d\n",
2176 mode_to_str[vha->qlini_mode], mode_to_str[op],
2177 vha->ql2xexchoffld, vha->u_ql2xexchoffld,
2178 vha->ql2xiniexchg, vha->u_ql2xiniexchg);
2179 vha->qlini_mode = op;
2180 vha->ql2xexchoffld = vha->u_ql2xexchoffld;
2181 vha->ql2xiniexchg = vha->u_ql2xiniexchg;
2182 break;
2183
2184 case TARGET_STILL_ACTIVE:
2185 ql_log(ql_log_warn, vha, 0xffff,
2186 "Target Mode is active. Unable to change Mode.\n");
2187 break;
2188
2189 case NO_ACTION:
2190 default:
2191 ql_log(ql_log_warn, vha, 0xffff,
2192 "Mode unchange. No action taken. %d|%d pct %d|%d.\n",
2193 vha->qlini_mode, op,
2194 vha->ql2xexchoffld, vha->u_ql2xexchoffld);
2195 break;
2196 }
0645cb83
QT
2197}
2198
2199static ssize_t
2200qlini_mode_store(struct device *dev, struct device_attribute *attr,
2201 const char *buf, size_t count)
2202{
2203 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2204 int ini;
2205
2206 if (!buf)
2207 return -EINVAL;
2208
2209 if (strncasecmp(QLA2XXX_INI_MODE_STR_EXCLUSIVE, buf,
2210 strlen(QLA2XXX_INI_MODE_STR_EXCLUSIVE)) == 0)
2211 ini = QLA2XXX_INI_MODE_EXCLUSIVE;
2212 else if (strncasecmp(QLA2XXX_INI_MODE_STR_DISABLED, buf,
2213 strlen(QLA2XXX_INI_MODE_STR_DISABLED)) == 0)
2214 ini = QLA2XXX_INI_MODE_DISABLED;
2215 else if (strncasecmp(QLA2XXX_INI_MODE_STR_ENABLED, buf,
2216 strlen(QLA2XXX_INI_MODE_STR_ENABLED)) == 0)
2217 ini = QLA2XXX_INI_MODE_ENABLED;
2218 else if (strncasecmp(QLA2XXX_INI_MODE_STR_DUAL, buf,
2219 strlen(QLA2XXX_INI_MODE_STR_DUAL)) == 0)
2220 ini = QLA2XXX_INI_MODE_DUAL;
2221 else
2222 return -EINVAL;
2223
2224 qla_set_ini_mode(vha, ini);
2225 return strlen(buf);
2226}
2227
2228static ssize_t
2229ql2xexchoffld_show(struct device *dev, struct device_attribute *attr,
2230 char *buf)
2231{
2232 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2233 int len = 0;
2234
2235 len += scnprintf(buf + len, PAGE_SIZE-len,
2236 "target exchange: new %d : current: %d\n\n",
2237 vha->u_ql2xexchoffld, vha->ql2xexchoffld);
2238
2239 len += scnprintf(buf + len, PAGE_SIZE-len,
2240 "Please (re)set operating mode via \"/sys/class/scsi_host/host%ld/qlini_mode\" to load new setting.\n",
2241 vha->host_no);
2242
2243 return len;
2244}
2245
2246static ssize_t
2247ql2xexchoffld_store(struct device *dev, struct device_attribute *attr,
2248 const char *buf, size_t count)
2249{
2250 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2251 int val = 0;
2252
2253 if (sscanf(buf, "%d", &val) != 1)
2254 return -EINVAL;
2255
2256 if (val > FW_MAX_EXCHANGES_CNT)
2257 val = FW_MAX_EXCHANGES_CNT;
2258 else if (val < 0)
2259 val = 0;
2260
2261 vha->u_ql2xexchoffld = val;
2262 return strlen(buf);
2263}
2264
2265static ssize_t
2266ql2xiniexchg_show(struct device *dev, struct device_attribute *attr,
2267 char *buf)
2268{
2269 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2270 int len = 0;
2271
2272 len += scnprintf(buf + len, PAGE_SIZE-len,
2273 "target exchange: new %d : current: %d\n\n",
2274 vha->u_ql2xiniexchg, vha->ql2xiniexchg);
2275
2276 len += scnprintf(buf + len, PAGE_SIZE-len,
2277 "Please (re)set operating mode via \"/sys/class/scsi_host/host%ld/qlini_mode\" to load new setting.\n",
2278 vha->host_no);
2279
2280 return len;
2281}
2282
2283static ssize_t
2284ql2xiniexchg_store(struct device *dev, struct device_attribute *attr,
2285 const char *buf, size_t count)
2286{
2287 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2288 int val = 0;
2289
2290 if (sscanf(buf, "%d", &val) != 1)
2291 return -EINVAL;
2292
2293 if (val > FW_MAX_EXCHANGES_CNT)
2294 val = FW_MAX_EXCHANGES_CNT;
2295 else if (val < 0)
2296 val = 0;
2297
2298 vha->u_ql2xiniexchg = val;
2299 return strlen(buf);
2300}
2301
50b81275
GM
2302static ssize_t
2303qla2x00_dif_bundle_statistics_show(struct device *dev,
2304 struct device_attribute *attr, char *buf)
2305{
2306 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2307 struct qla_hw_data *ha = vha->hw;
2308
2309 return scnprintf(buf, PAGE_SIZE,
2310 "cross=%llu read=%llu write=%llu kalloc=%llu dma_alloc=%llu unusable=%u\n",
2311 ha->dif_bundle_crossed_pages, ha->dif_bundle_reads,
2312 ha->dif_bundle_writes, ha->dif_bundle_kallocs,
2313 ha->dif_bundle_dma_allocs, ha->pool.unusable.count);
2314}
2315
df617ffb
JC
2316static ssize_t
2317qla2x00_fw_attr_show(struct device *dev,
2318 struct device_attribute *attr, char *buf)
2319{
2320 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2321 struct qla_hw_data *ha = vha->hw;
2322
ecc89f25 2323 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
df617ffb
JC
2324 return scnprintf(buf, PAGE_SIZE, "\n");
2325
2326 return scnprintf(buf, PAGE_SIZE, "%llx\n",
2327 (uint64_t)ha->fw_attributes_ext[1] << 48 |
2328 (uint64_t)ha->fw_attributes_ext[0] << 32 |
2329 (uint64_t)ha->fw_attributes_h << 16 |
2330 (uint64_t)ha->fw_attributes);
2331}
2332
2333static ssize_t
2334qla2x00_port_no_show(struct device *dev, struct device_attribute *attr,
2335 char *buf)
2336{
2337 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2338
2339 return scnprintf(buf, PAGE_SIZE, "%u\n", vha->hw->port_no);
2340}
2341
e6ad2b79
JC
2342static ssize_t
2343qla2x00_dport_diagnostics_show(struct device *dev,
2344 struct device_attribute *attr, char *buf)
2345{
2346 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2347
2348 if (!IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw) &&
2349 !IS_QLA28XX(vha->hw))
2350 return scnprintf(buf, PAGE_SIZE, "\n");
2351
2352 if (!*vha->dport_data)
2353 return scnprintf(buf, PAGE_SIZE, "\n");
2354
2355 return scnprintf(buf, PAGE_SIZE, "%04x %04x %04x %04x\n",
2356 vha->dport_data[0], vha->dport_data[1],
2357 vha->dport_data[2], vha->dport_data[3]);
2358}
2359static DEVICE_ATTR(dport_diagnostics, 0444,
2360 qla2x00_dport_diagnostics_show, NULL);
2361
50b81275 2362static DEVICE_ATTR(driver_version, S_IRUGO, qla2x00_driver_version_show, NULL);
ee959b00
TJ
2363static DEVICE_ATTR(fw_version, S_IRUGO, qla2x00_fw_version_show, NULL);
2364static DEVICE_ATTR(serial_num, S_IRUGO, qla2x00_serial_num_show, NULL);
2365static DEVICE_ATTR(isp_name, S_IRUGO, qla2x00_isp_name_show, NULL);
2366static DEVICE_ATTR(isp_id, S_IRUGO, qla2x00_isp_id_show, NULL);
2367static DEVICE_ATTR(model_name, S_IRUGO, qla2x00_model_name_show, NULL);
2368static DEVICE_ATTR(model_desc, S_IRUGO, qla2x00_model_desc_show, NULL);
2369static DEVICE_ATTR(pci_info, S_IRUGO, qla2x00_pci_info_show, NULL);
bbd1ae41 2370static DEVICE_ATTR(link_state, S_IRUGO, qla2x00_link_state_show, NULL);
ee959b00
TJ
2371static DEVICE_ATTR(zio, S_IRUGO | S_IWUSR, qla2x00_zio_show, qla2x00_zio_store);
2372static DEVICE_ATTR(zio_timer, S_IRUGO | S_IWUSR, qla2x00_zio_timer_show,
2373 qla2x00_zio_timer_store);
2374static DEVICE_ATTR(beacon, S_IRUGO | S_IWUSR, qla2x00_beacon_show,
2375 qla2x00_beacon_store);
07553b1e
JC
2376static DEVICE_ATTR(beacon_config, 0644, qla2x00_beacon_config_show,
2377 qla2x00_beacon_config_store);
ee959b00
TJ
2378static DEVICE_ATTR(optrom_bios_version, S_IRUGO,
2379 qla2x00_optrom_bios_version_show, NULL);
2380static DEVICE_ATTR(optrom_efi_version, S_IRUGO,
2381 qla2x00_optrom_efi_version_show, NULL);
2382static DEVICE_ATTR(optrom_fcode_version, S_IRUGO,
2383 qla2x00_optrom_fcode_version_show, NULL);
2384static DEVICE_ATTR(optrom_fw_version, S_IRUGO, qla2x00_optrom_fw_version_show,
2385 NULL);
0f2d962f
MI
2386static DEVICE_ATTR(optrom_gold_fw_version, S_IRUGO,
2387 qla2x00_optrom_gold_fw_version_show, NULL);
9a069e19
GM
2388static DEVICE_ATTR(84xx_fw_version, S_IRUGO, qla24xx_84xx_fw_version_show,
2389 NULL);
e5f5f6f7
HZ
2390static DEVICE_ATTR(total_isp_aborts, S_IRUGO, qla2x00_total_isp_aborts_show,
2391 NULL);
2a3192a3 2392static DEVICE_ATTR(serdes_version, 0444, qla2x00_serdes_version_show, NULL);
3a03eb79 2393static DEVICE_ATTR(mpi_version, S_IRUGO, qla2x00_mpi_version_show, NULL);
55a96158 2394static DEVICE_ATTR(phy_version, S_IRUGO, qla2x00_phy_version_show, NULL);
fbcbb5d0
LC
2395static DEVICE_ATTR(flash_block_size, S_IRUGO, qla2x00_flash_block_size_show,
2396 NULL);
bad7001c
AV
2397static DEVICE_ATTR(vlan_id, S_IRUGO, qla2x00_vlan_id_show, NULL);
2398static DEVICE_ATTR(vn_port_mac_address, S_IRUGO,
2399 qla2x00_vn_port_mac_address_show, NULL);
7f774025 2400static DEVICE_ATTR(fabric_param, S_IRUGO, qla2x00_fabric_param_show, NULL);
656e8912 2401static DEVICE_ATTR(fw_state, S_IRUGO, qla2x00_fw_state_show, NULL);
794a5691 2402static DEVICE_ATTR(thermal_temp, S_IRUGO, qla2x00_thermal_temp_show, NULL);
a9b6f722
SK
2403static DEVICE_ATTR(diag_requests, S_IRUGO, qla2x00_diag_requests_show, NULL);
2404static DEVICE_ATTR(diag_megabytes, S_IRUGO, qla2x00_diag_megabytes_show, NULL);
40129a4c 2405static DEVICE_ATTR(fw_dump_size, S_IRUGO, qla2x00_fw_dump_size_show, NULL);
a1b23c5a
CD
2406static DEVICE_ATTR(allow_cna_fw_dump, S_IRUGO | S_IWUSR,
2407 qla2x00_allow_cna_fw_dump_show,
2408 qla2x00_allow_cna_fw_dump_store);
03aa868c 2409static DEVICE_ATTR(pep_version, S_IRUGO, qla2x00_pep_version_show, NULL);
72a92df2
JC
2410static DEVICE_ATTR(min_supported_speed, 0444,
2411 qla2x00_min_supported_speed_show, NULL);
2412static DEVICE_ATTR(max_supported_speed, 0444,
2413 qla2x00_max_supported_speed_show, NULL);
8b4673ba
QT
2414static DEVICE_ATTR(zio_threshold, 0644,
2415 qla_zio_threshold_show,
2416 qla_zio_threshold_store);
0645cb83
QT
2417static DEVICE_ATTR_RW(qlini_mode);
2418static DEVICE_ATTR_RW(ql2xexchoffld);
2419static DEVICE_ATTR_RW(ql2xiniexchg);
50b81275
GM
2420static DEVICE_ATTR(dif_bundle_statistics, 0444,
2421 qla2x00_dif_bundle_statistics_show, NULL);
4910b524
AG
2422static DEVICE_ATTR(port_speed, 0644, qla2x00_port_speed_show,
2423 qla2x00_port_speed_store);
df617ffb
JC
2424static DEVICE_ATTR(port_no, 0444, qla2x00_port_no_show, NULL);
2425static DEVICE_ATTR(fw_attr, 0444, qla2x00_fw_attr_show, NULL);
0645cb83 2426
ee959b00
TJ
2427
2428struct device_attribute *qla2x00_host_attrs[] = {
2429 &dev_attr_driver_version,
2430 &dev_attr_fw_version,
2431 &dev_attr_serial_num,
2432 &dev_attr_isp_name,
2433 &dev_attr_isp_id,
2434 &dev_attr_model_name,
2435 &dev_attr_model_desc,
2436 &dev_attr_pci_info,
bbd1ae41 2437 &dev_attr_link_state,
ee959b00
TJ
2438 &dev_attr_zio,
2439 &dev_attr_zio_timer,
2440 &dev_attr_beacon,
07553b1e 2441 &dev_attr_beacon_config,
ee959b00
TJ
2442 &dev_attr_optrom_bios_version,
2443 &dev_attr_optrom_efi_version,
2444 &dev_attr_optrom_fcode_version,
2445 &dev_attr_optrom_fw_version,
9a069e19 2446 &dev_attr_84xx_fw_version,
e5f5f6f7 2447 &dev_attr_total_isp_aborts,
2a3192a3 2448 &dev_attr_serdes_version,
3a03eb79 2449 &dev_attr_mpi_version,
55a96158 2450 &dev_attr_phy_version,
fbcbb5d0 2451 &dev_attr_flash_block_size,
bad7001c
AV
2452 &dev_attr_vlan_id,
2453 &dev_attr_vn_port_mac_address,
7f774025 2454 &dev_attr_fabric_param,
656e8912 2455 &dev_attr_fw_state,
0f2d962f 2456 &dev_attr_optrom_gold_fw_version,
794a5691 2457 &dev_attr_thermal_temp,
a9b6f722
SK
2458 &dev_attr_diag_requests,
2459 &dev_attr_diag_megabytes,
40129a4c 2460 &dev_attr_fw_dump_size,
a1b23c5a 2461 &dev_attr_allow_cna_fw_dump,
03aa868c 2462 &dev_attr_pep_version,
72a92df2
JC
2463 &dev_attr_min_supported_speed,
2464 &dev_attr_max_supported_speed,
8b4673ba 2465 &dev_attr_zio_threshold,
50b81275 2466 &dev_attr_dif_bundle_statistics,
4910b524 2467 &dev_attr_port_speed,
df617ffb
JC
2468 &dev_attr_port_no,
2469 &dev_attr_fw_attr,
e6ad2b79 2470 &dev_attr_dport_diagnostics,
0645cb83
QT
2471 NULL, /* reserve for qlini_mode */
2472 NULL, /* reserve for ql2xiniexchg */
2473 NULL, /* reserve for ql2xexchoffld */
afb046e2
AV
2474 NULL,
2475};
2476
0645cb83
QT
2477void qla_insert_tgt_attrs(void)
2478{
2479 struct device_attribute **attr;
2480
2481 /* advance to empty slot */
2482 for (attr = &qla2x00_host_attrs[0]; *attr; ++attr)
2483 continue;
2484
2485 *attr = &dev_attr_qlini_mode;
2486 attr++;
2487 *attr = &dev_attr_ql2xiniexchg;
2488 attr++;
2489 *attr = &dev_attr_ql2xexchoffld;
2490}
2491
8482e118
AV
2492/* Host attributes. */
2493
2494static void
2495qla2x00_get_host_port_id(struct Scsi_Host *shost)
2496{
7b867cf7 2497 scsi_qla_host_t *vha = shost_priv(shost);
8482e118 2498
7b867cf7
AC
2499 fc_host_port_id(shost) = vha->d_id.b.domain << 16 |
2500 vha->d_id.b.area << 8 | vha->d_id.b.al_pa;
8482e118
AV
2501}
2502
04414013
AV
2503static void
2504qla2x00_get_host_speed(struct Scsi_Host *shost)
2505{
2a3192a3
JC
2506 scsi_qla_host_t *vha = shost_priv(shost);
2507 u32 speed;
04414013 2508
2a3192a3 2509 if (IS_QLAFX00(vha->hw)) {
8ae6d9c7
GM
2510 qlafx00_get_host_speed(shost);
2511 return;
2512 }
2513
2a3192a3 2514 switch (vha->hw->link_data_rate) {
d8b45213 2515 case PORT_SPEED_1GB:
2ae2b370 2516 speed = FC_PORTSPEED_1GBIT;
04414013 2517 break;
d8b45213 2518 case PORT_SPEED_2GB:
2ae2b370 2519 speed = FC_PORTSPEED_2GBIT;
04414013 2520 break;
d8b45213 2521 case PORT_SPEED_4GB:
2ae2b370 2522 speed = FC_PORTSPEED_4GBIT;
04414013 2523 break;
da4541b6 2524 case PORT_SPEED_8GB:
2ae2b370 2525 speed = FC_PORTSPEED_8GBIT;
da4541b6 2526 break;
3a03eb79
AV
2527 case PORT_SPEED_10GB:
2528 speed = FC_PORTSPEED_10GBIT;
2529 break;
6246b8a1
GM
2530 case PORT_SPEED_16GB:
2531 speed = FC_PORTSPEED_16GBIT;
2532 break;
f73cb695
CD
2533 case PORT_SPEED_32GB:
2534 speed = FC_PORTSPEED_32GBIT;
2535 break;
ecc89f25
JC
2536 case PORT_SPEED_64GB:
2537 speed = FC_PORTSPEED_64GBIT;
2538 break;
2a3192a3
JC
2539 default:
2540 speed = FC_PORTSPEED_UNKNOWN;
2541 break;
04414013 2542 }
2a3192a3 2543
04414013
AV
2544 fc_host_speed(shost) = speed;
2545}
2546
8d067623
AV
2547static void
2548qla2x00_get_host_port_type(struct Scsi_Host *shost)
2549{
7b867cf7 2550 scsi_qla_host_t *vha = shost_priv(shost);
2a3192a3 2551 uint32_t port_type;
8d067623 2552
7b867cf7 2553 if (vha->vp_idx) {
2f2fa13d
SS
2554 fc_host_port_type(shost) = FC_PORTTYPE_NPIV;
2555 return;
2556 }
7b867cf7 2557 switch (vha->hw->current_topology) {
8d067623
AV
2558 case ISP_CFG_NL:
2559 port_type = FC_PORTTYPE_LPORT;
2560 break;
2561 case ISP_CFG_FL:
2562 port_type = FC_PORTTYPE_NLPORT;
2563 break;
2564 case ISP_CFG_N:
2565 port_type = FC_PORTTYPE_PTP;
2566 break;
2567 case ISP_CFG_F:
2568 port_type = FC_PORTTYPE_NPORT;
2569 break;
2a3192a3
JC
2570 default:
2571 port_type = FC_PORTTYPE_UNKNOWN;
2572 break;
8d067623 2573 }
2a3192a3 2574
8d067623
AV
2575 fc_host_port_type(shost) = port_type;
2576}
2577
8482e118
AV
2578static void
2579qla2x00_get_starget_node_name(struct scsi_target *starget)
2580{
2581 struct Scsi_Host *host = dev_to_shost(starget->dev.parent);
7b867cf7 2582 scsi_qla_host_t *vha = shost_priv(host);
bdf79621 2583 fc_port_t *fcport;
f8b02a85 2584 u64 node_name = 0;
8482e118 2585
7b867cf7 2586 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5ab5a4dd
AV
2587 if (fcport->rport &&
2588 starget->id == fcport->rport->scsi_target_id) {
f8b02a85 2589 node_name = wwn_to_u64(fcport->node_name);
bdf79621
AV
2590 break;
2591 }
2592 }
2593
f8b02a85 2594 fc_starget_node_name(starget) = node_name;
8482e118
AV
2595}
2596
2597static void
2598qla2x00_get_starget_port_name(struct scsi_target *starget)
2599{
2600 struct Scsi_Host *host = dev_to_shost(starget->dev.parent);
7b867cf7 2601 scsi_qla_host_t *vha = shost_priv(host);
bdf79621 2602 fc_port_t *fcport;
f8b02a85 2603 u64 port_name = 0;
8482e118 2604
7b867cf7 2605 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5ab5a4dd
AV
2606 if (fcport->rport &&
2607 starget->id == fcport->rport->scsi_target_id) {
f8b02a85 2608 port_name = wwn_to_u64(fcport->port_name);
bdf79621
AV
2609 break;
2610 }
2611 }
2612
f8b02a85 2613 fc_starget_port_name(starget) = port_name;
8482e118
AV
2614}
2615
2616static void
2617qla2x00_get_starget_port_id(struct scsi_target *starget)
2618{
2619 struct Scsi_Host *host = dev_to_shost(starget->dev.parent);
7b867cf7 2620 scsi_qla_host_t *vha = shost_priv(host);
bdf79621
AV
2621 fc_port_t *fcport;
2622 uint32_t port_id = ~0U;
2623
7b867cf7 2624 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5ab5a4dd
AV
2625 if (fcport->rport &&
2626 starget->id == fcport->rport->scsi_target_id) {
bdf79621
AV
2627 port_id = fcport->d_id.b.domain << 16 |
2628 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
2629 break;
2630 }
2631 }
8482e118 2632
8482e118
AV
2633 fc_starget_port_id(starget) = port_id;
2634}
2635
2a3192a3 2636static inline void
8482e118
AV
2637qla2x00_set_rport_loss_tmo(struct fc_rport *rport, uint32_t timeout)
2638{
2a3192a3 2639 rport->dev_loss_tmo = timeout ? timeout : 1;
8482e118
AV
2640}
2641
5f3a9a20
SJ
2642static void
2643qla2x00_dev_loss_tmo_callbk(struct fc_rport *rport)
2644{
2645 struct Scsi_Host *host = rport_to_shost(rport);
2646 fc_port_t *fcport = *(fc_port_t **)rport->dd_data;
044d78e1 2647 unsigned long flags;
5f3a9a20 2648
3c01b4f9
SJ
2649 if (!fcport)
2650 return;
2651
38170fa8
GM
2652 /* Now that the rport has been deleted, set the fcport state to
2653 FCS_DEVICE_DEAD */
ec426e10 2654 qla2x00_set_fcport_state(fcport, FCS_DEVICE_DEAD);
38170fa8 2655
5f3a9a20
SJ
2656 /*
2657 * Transport has effectively 'deleted' the rport, clear
2658 * all local references.
2659 */
044d78e1 2660 spin_lock_irqsave(host->host_lock, flags);
3fadb80b 2661 fcport->rport = fcport->drport = NULL;
5f3a9a20 2662 *((fc_port_t **)rport->dd_data) = NULL;
044d78e1 2663 spin_unlock_irqrestore(host->host_lock, flags);
3fadb80b
GM
2664
2665 if (test_bit(ABORT_ISP_ACTIVE, &fcport->vha->dpc_flags))
2666 return;
2667
2668 if (unlikely(pci_channel_offline(fcport->vha->hw->pdev))) {
2669 qla2x00_abort_all_cmds(fcport->vha, DID_NO_CONNECT << 16);
2670 return;
2671 }
5f3a9a20
SJ
2672}
2673
2674static void
2675qla2x00_terminate_rport_io(struct fc_rport *rport)
2676{
2677 fc_port_t *fcport = *(fc_port_t **)rport->dd_data;
2678
3c01b4f9
SJ
2679 if (!fcport)
2680 return;
2681
a465537a
SC
2682 if (test_bit(UNLOADING, &fcport->vha->dpc_flags))
2683 return;
2684
85880801
AV
2685 if (test_bit(ABORT_ISP_ACTIVE, &fcport->vha->dpc_flags))
2686 return;
2687
b9b12f73
SJ
2688 if (unlikely(pci_channel_offline(fcport->vha->hw->pdev))) {
2689 qla2x00_abort_all_cmds(fcport->vha, DID_NO_CONNECT << 16);
2690 return;
2691 }
6390d1f3
AV
2692 /*
2693 * At this point all fcport's software-states are cleared. Perform any
2694 * final cleanup of firmware resources (PCBs and XCBs).
2695 */
220d36b4 2696 if (fcport->loop_id != FC_NO_LOOP_ID) {
af11f64d
AV
2697 if (IS_FWI2_CAPABLE(fcport->vha->hw))
2698 fcport->vha->hw->isp_ops->fabric_logout(fcport->vha,
2699 fcport->loop_id, fcport->d_id.b.domain,
2700 fcport->d_id.b.area, fcport->d_id.b.al_pa);
2701 else
2702 qla2x00_port_logout(fcport->vha, fcport);
2703 }
5f3a9a20
SJ
2704}
2705
91ca7b01
AV
2706static int
2707qla2x00_issue_lip(struct Scsi_Host *shost)
2708{
7b867cf7 2709 scsi_qla_host_t *vha = shost_priv(shost);
91ca7b01 2710
8ae6d9c7
GM
2711 if (IS_QLAFX00(vha->hw))
2712 return 0;
2713
7b867cf7 2714 qla2x00_loop_reset(vha);
91ca7b01
AV
2715 return 0;
2716}
2717
392e2f65
AV
2718static struct fc_host_statistics *
2719qla2x00_get_fc_host_stats(struct Scsi_Host *shost)
2720{
7b867cf7
AC
2721 scsi_qla_host_t *vha = shost_priv(shost);
2722 struct qla_hw_data *ha = vha->hw;
2723 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
392e2f65 2724 int rval;
43ef0580
AV
2725 struct link_statistics *stats;
2726 dma_addr_t stats_dma;
fc90adaf 2727 struct fc_host_statistics *p = &vha->fc_host_stat;
392e2f65 2728
fc90adaf 2729 memset(p, -1, sizeof(*p));
392e2f65 2730
8ae6d9c7
GM
2731 if (IS_QLAFX00(vha->hw))
2732 goto done;
2733
85880801
AV
2734 if (test_bit(UNLOADING, &vha->dpc_flags))
2735 goto done;
2736
2737 if (unlikely(pci_channel_offline(ha->pdev)))
2738 goto done;
2739
22ebde16 2740 if (qla2x00_chip_is_down(vha))
8fbfe2d2
CD
2741 goto done;
2742
750afb08
LC
2743 stats = dma_alloc_coherent(&ha->pdev->dev, sizeof(*stats), &stats_dma,
2744 GFP_KERNEL);
c6dc9905 2745 if (!stats) {
7c3df132
SK
2746 ql_log(ql_log_warn, vha, 0x707d,
2747 "Failed to allocate memory for stats.\n");
43ef0580
AV
2748 goto done;
2749 }
43ef0580
AV
2750
2751 rval = QLA_FUNCTION_FAILED;
e428924c 2752 if (IS_FWI2_CAPABLE(ha)) {
c6dc9905 2753 rval = qla24xx_get_isp_stats(base_vha, stats, stats_dma, 0);
7b867cf7 2754 } else if (atomic_read(&base_vha->loop_state) == LOOP_READY &&
8fbfe2d2 2755 !ha->dpc_active) {
178779a6 2756 /* Must be in a 'READY' state for statistics retrieval. */
7b867cf7
AC
2757 rval = qla2x00_get_link_status(base_vha, base_vha->loop_id,
2758 stats, stats_dma);
392e2f65 2759 }
178779a6
AV
2760
2761 if (rval != QLA_SUCCESS)
43ef0580
AV
2762 goto done_free;
2763
974c0860
JC
2764 p->link_failure_count = le32_to_cpu(stats->link_fail_cnt);
2765 p->loss_of_sync_count = le32_to_cpu(stats->loss_sync_cnt);
2766 p->loss_of_signal_count = le32_to_cpu(stats->loss_sig_cnt);
2767 p->prim_seq_protocol_err_count = le32_to_cpu(stats->prim_seq_err_cnt);
2768 p->invalid_tx_word_count = le32_to_cpu(stats->inval_xmit_word_cnt);
2769 p->invalid_crc_count = le32_to_cpu(stats->inval_crc_cnt);
43ef0580 2770 if (IS_FWI2_CAPABLE(ha)) {
974c0860
JC
2771 p->lip_count = le32_to_cpu(stats->lip_cnt);
2772 p->tx_frames = le32_to_cpu(stats->tx_frames);
2773 p->rx_frames = le32_to_cpu(stats->rx_frames);
2774 p->dumped_frames = le32_to_cpu(stats->discarded_frames);
2775 p->nos_count = le32_to_cpu(stats->nos_rcvd);
fc90adaf 2776 p->error_frames =
974c0860
JC
2777 le32_to_cpu(stats->dropped_frames) +
2778 le32_to_cpu(stats->discarded_frames);
2779 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
2780 p->rx_words = le64_to_cpu(stats->fpm_recv_word_cnt);
2781 p->tx_words = le64_to_cpu(stats->fpm_xmit_word_cnt);
2782 } else {
2783 p->rx_words = vha->qla_stats.input_bytes;
2784 p->tx_words = vha->qla_stats.output_bytes;
2785 }
43ef0580 2786 }
fc90adaf
JC
2787 p->fcp_control_requests = vha->qla_stats.control_requests;
2788 p->fcp_input_requests = vha->qla_stats.input_requests;
2789 p->fcp_output_requests = vha->qla_stats.output_requests;
2790 p->fcp_input_megabytes = vha->qla_stats.input_bytes >> 20;
2791 p->fcp_output_megabytes = vha->qla_stats.output_bytes >> 20;
2792 p->seconds_since_last_reset =
974c0860 2793 get_jiffies_64() - vha->qla_stats.jiffies_at_last_reset;
fc90adaf 2794 do_div(p->seconds_since_last_reset, HZ);
392e2f65 2795
43ef0580 2796done_free:
243de676
HZ
2797 dma_free_coherent(&ha->pdev->dev, sizeof(struct link_statistics),
2798 stats, stats_dma);
178779a6 2799done:
fc90adaf 2800 return p;
392e2f65
AV
2801}
2802
fabbb8df
JC
2803static void
2804qla2x00_reset_host_stats(struct Scsi_Host *shost)
2805{
2806 scsi_qla_host_t *vha = shost_priv(shost);
c6dc9905
JC
2807 struct qla_hw_data *ha = vha->hw;
2808 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2809 struct link_statistics *stats;
2810 dma_addr_t stats_dma;
fabbb8df 2811
fc90adaf 2812 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
fabbb8df
JC
2813 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
2814
2815 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
c6dc9905
JC
2816
2817 if (IS_FWI2_CAPABLE(ha)) {
2818 stats = dma_alloc_coherent(&ha->pdev->dev,
2819 sizeof(*stats), &stats_dma, GFP_KERNEL);
2820 if (!stats) {
2821 ql_log(ql_log_warn, vha, 0x70d7,
2822 "Failed to allocate memory for stats.\n");
2823 return;
2824 }
2825
2826 /* reset firmware statistics */
2827 qla24xx_get_isp_stats(base_vha, stats, stats_dma, BIT_0);
2828
2829 dma_free_coherent(&ha->pdev->dev, sizeof(*stats),
2830 stats, stats_dma);
2831 }
fabbb8df
JC
2832}
2833
1620f7c2
AV
2834static void
2835qla2x00_get_host_symbolic_name(struct Scsi_Host *shost)
2836{
7b867cf7 2837 scsi_qla_host_t *vha = shost_priv(shost);
1620f7c2 2838
df57caba
HM
2839 qla2x00_get_sym_node_name(vha, fc_host_symbolic_name(shost),
2840 sizeof(fc_host_symbolic_name(shost)));
1620f7c2
AV
2841}
2842
a740a3f0
AV
2843static void
2844qla2x00_set_host_system_hostname(struct Scsi_Host *shost)
2845{
7b867cf7 2846 scsi_qla_host_t *vha = shost_priv(shost);
a740a3f0 2847
7b867cf7 2848 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
a740a3f0
AV
2849}
2850
90991c85
AV
2851static void
2852qla2x00_get_host_fabric_name(struct Scsi_Host *shost)
2853{
7b867cf7 2854 scsi_qla_host_t *vha = shost_priv(shost);
c02ee1e5
BVA
2855 static const uint8_t node_name[WWN_SIZE] = {
2856 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
2857 };
35e0cbd4 2858 u64 fabric_name = wwn_to_u64(node_name);
90991c85 2859
7b867cf7 2860 if (vha->device_flags & SWITCH_FOUND)
35e0cbd4 2861 fabric_name = wwn_to_u64(vha->fabric_node_name);
90991c85 2862
35e0cbd4 2863 fc_host_fabric_name(shost) = fabric_name;
90991c85
AV
2864}
2865
7047fcdd
AV
2866static void
2867qla2x00_get_host_port_state(struct Scsi_Host *shost)
2868{
7b867cf7
AC
2869 scsi_qla_host_t *vha = shost_priv(shost);
2870 struct scsi_qla_host *base_vha = pci_get_drvdata(vha->hw->pdev);
7047fcdd 2871
49e85c23 2872 if (!base_vha->flags.online) {
7047fcdd 2873 fc_host_port_state(shost) = FC_PORTSTATE_OFFLINE;
49e85c23
SK
2874 return;
2875 }
2876
2877 switch (atomic_read(&base_vha->loop_state)) {
2878 case LOOP_UPDATE:
2879 fc_host_port_state(shost) = FC_PORTSTATE_DIAGNOSTICS;
2880 break;
2881 case LOOP_DOWN:
2882 if (test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags))
2883 fc_host_port_state(shost) = FC_PORTSTATE_DIAGNOSTICS;
2884 else
2885 fc_host_port_state(shost) = FC_PORTSTATE_LINKDOWN;
2886 break;
2887 case LOOP_DEAD:
2888 fc_host_port_state(shost) = FC_PORTSTATE_LINKDOWN;
2889 break;
2890 case LOOP_READY:
7047fcdd 2891 fc_host_port_state(shost) = FC_PORTSTATE_ONLINE;
49e85c23
SK
2892 break;
2893 default:
2894 fc_host_port_state(shost) = FC_PORTSTATE_UNKNOWN;
2895 break;
2896 }
7047fcdd
AV
2897}
2898
2c3dfe3f
SJ
2899static int
2900qla24xx_vport_create(struct fc_vport *fc_vport, bool disable)
2901{
2902 int ret = 0;
2afa19a9 2903 uint8_t qos = 0;
7b867cf7
AC
2904 scsi_qla_host_t *base_vha = shost_priv(fc_vport->shost);
2905 scsi_qla_host_t *vha = NULL;
73208dfd 2906 struct qla_hw_data *ha = base_vha->hw;
2afa19a9 2907 int cnt;
59e0b8b0 2908 struct req_que *req = ha->req_q_map[0];
d7459527 2909 struct qla_qpair *qpair;
2c3dfe3f
SJ
2910
2911 ret = qla24xx_vport_create_req_sanity_check(fc_vport);
2912 if (ret) {
7c3df132
SK
2913 ql_log(ql_log_warn, vha, 0x707e,
2914 "Vport sanity check failed, status %x\n", ret);
2c3dfe3f
SJ
2915 return (ret);
2916 }
2917
2918 vha = qla24xx_create_vhost(fc_vport);
2919 if (vha == NULL) {
7c3df132 2920 ql_log(ql_log_warn, vha, 0x707f, "Vport create host failed.\n");
2c3dfe3f
SJ
2921 return FC_VPORT_FAILED;
2922 }
2923 if (disable) {
2924 atomic_set(&vha->vp_state, VP_OFFLINE);
2925 fc_vport_set_state(fc_vport, FC_VPORT_DISABLED);
2926 } else
2927 atomic_set(&vha->vp_state, VP_FAILED);
2928
2929 /* ready to create vport */
7c3df132
SK
2930 ql_log(ql_log_info, vha, 0x7080,
2931 "VP entry id %d assigned.\n", vha->vp_idx);
2c3dfe3f
SJ
2932
2933 /* initialized vport states */
2934 atomic_set(&vha->loop_state, LOOP_DOWN);
58e2753c
BVA
2935 vha->vp_err_state = VP_ERR_PORTDWN;
2936 vha->vp_prev_err_state = VP_ERR_UNKWN;
2c3dfe3f 2937 /* Check if physical ha port is Up */
7b867cf7
AC
2938 if (atomic_read(&base_vha->loop_state) == LOOP_DOWN ||
2939 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
2c3dfe3f 2940 /* Don't retry or attempt login of this virtual port */
7c3df132
SK
2941 ql_dbg(ql_dbg_user, vha, 0x7081,
2942 "Vport loop state is not UP.\n");
2c3dfe3f
SJ
2943 atomic_set(&vha->loop_state, LOOP_DEAD);
2944 if (!disable)
2945 fc_vport_set_state(fc_vport, FC_VPORT_LINKDOWN);
2946 }
2947
e02587d7 2948 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
bad75002 2949 if (ha->fw_attributes & BIT_4) {
9e522cd8 2950 int prot = 0, guard;
bd432bb5 2951
bad75002 2952 vha->flags.difdix_supported = 1;
7c3df132
SK
2953 ql_dbg(ql_dbg_user, vha, 0x7082,
2954 "Registered for DIF/DIX type 1 and 3 protection.\n");
8cb2049c
AE
2955 if (ql2xenabledif == 1)
2956 prot = SHOST_DIX_TYPE0_PROTECTION;
bad75002 2957 scsi_host_set_prot(vha->host,
8cb2049c 2958 prot | SHOST_DIF_TYPE1_PROTECTION
0c470874 2959 | SHOST_DIF_TYPE2_PROTECTION
bad75002
AE
2960 | SHOST_DIF_TYPE3_PROTECTION
2961 | SHOST_DIX_TYPE1_PROTECTION
0c470874 2962 | SHOST_DIX_TYPE2_PROTECTION
bad75002 2963 | SHOST_DIX_TYPE3_PROTECTION);
9e522cd8
AE
2964
2965 guard = SHOST_DIX_GUARD_CRC;
2966
2967 if (IS_PI_IPGUARD_CAPABLE(ha) &&
2968 (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
2969 guard |= SHOST_DIX_GUARD_IP;
2970
2971 scsi_host_set_guard(vha->host, guard);
bad75002
AE
2972 } else
2973 vha->flags.difdix_supported = 0;
2974 }
2975
d139b9bd
JB
2976 if (scsi_add_host_with_dma(vha->host, &fc_vport->dev,
2977 &ha->pdev->dev)) {
7c3df132
SK
2978 ql_dbg(ql_dbg_user, vha, 0x7083,
2979 "scsi_add_host failure for VP[%d].\n", vha->vp_idx);
2c3dfe3f
SJ
2980 goto vport_create_failed_2;
2981 }
2982
2983 /* initialize attributes */
d2b5f10e 2984 fc_host_dev_loss_tmo(vha->host) = ha->port_down_retry_count;
2c3dfe3f
SJ
2985 fc_host_node_name(vha->host) = wwn_to_u64(vha->node_name);
2986 fc_host_port_name(vha->host) = wwn_to_u64(vha->port_name);
2987 fc_host_supported_classes(vha->host) =
7b867cf7 2988 fc_host_supported_classes(base_vha->host);
2c3dfe3f 2989 fc_host_supported_speeds(vha->host) =
7b867cf7 2990 fc_host_supported_speeds(base_vha->host);
2c3dfe3f 2991
2d70c103 2992 qlt_vport_create(vha, ha);
2c3dfe3f
SJ
2993 qla24xx_vport_disable(fc_vport, disable);
2994
d7459527 2995 if (!ql2xmqsupport || !ha->npiv_info)
2afa19a9 2996 goto vport_queue;
d7459527 2997
2afa19a9 2998 /* Create a request queue in QoS mode for the vport */
40859ae5
AC
2999 for (cnt = 0; cnt < ha->nvram_npiv_size; cnt++) {
3000 if (memcmp(ha->npiv_info[cnt].port_name, vha->port_name, 8) == 0
3001 && memcmp(ha->npiv_info[cnt].node_name, vha->node_name,
59e0b8b0 3002 8) == 0) {
2afa19a9
AC
3003 qos = ha->npiv_info[cnt].q_qos;
3004 break;
73208dfd 3005 }
2afa19a9 3006 }
6246b8a1 3007
2afa19a9 3008 if (qos) {
82de802a 3009 qpair = qla2xxx_create_qpair(vha, qos, vha->vp_idx, true);
d7459527 3010 if (!qpair)
7c3df132 3011 ql_log(ql_log_warn, vha, 0x7084,
d7459527 3012 "Can't create qpair for VP[%d]\n",
7c3df132 3013 vha->vp_idx);
59e0b8b0 3014 else {
7c3df132 3015 ql_dbg(ql_dbg_multiq, vha, 0xc001,
d7459527
MH
3016 "Queue pair: %d Qos: %d) created for VP[%d]\n",
3017 qpair->id, qos, vha->vp_idx);
7c3df132 3018 ql_dbg(ql_dbg_user, vha, 0x7085,
d7459527
MH
3019 "Queue Pair: %d Qos: %d) created for VP[%d]\n",
3020 qpair->id, qos, vha->vp_idx);
3021 req = qpair->req;
3022 vha->qpair = qpair;
59e0b8b0 3023 }
73208dfd
AC
3024 }
3025
2afa19a9 3026vport_queue:
59e0b8b0 3027 vha->req = req;
2c3dfe3f 3028 return 0;
2afa19a9 3029
2c3dfe3f
SJ
3030vport_create_failed_2:
3031 qla24xx_disable_vp(vha);
3032 qla24xx_deallocate_vp_id(vha);
2c3dfe3f
SJ
3033 scsi_host_put(vha->host);
3034 return FC_VPORT_FAILED;
3035}
3036
a824ebb3 3037static int
2c3dfe3f
SJ
3038qla24xx_vport_delete(struct fc_vport *fc_vport)
3039{
2c3dfe3f 3040 scsi_qla_host_t *vha = fc_vport->dd_data;
73208dfd
AC
3041 struct qla_hw_data *ha = vha->hw;
3042 uint16_t id = vha->vp_idx;
c9c5ced9 3043
f5187b7d
QT
3044 set_bit(VPORT_DELETE, &vha->dpc_flags);
3045
c9c5ced9 3046 while (test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags) ||
7b867cf7 3047 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags))
c9c5ced9 3048 msleep(1000);
2c3dfe3f 3049
835aa4f2 3050
2c3dfe3f 3051 qla24xx_disable_vp(vha);
efa93f48 3052 qla2x00_wait_for_sess_deletion(vha);
2c3dfe3f 3053
c48f849d 3054 qla_nvme_delete(vha);
feafb7b1
AE
3055 vha->flags.delete_progress = 1;
3056
0e8cd71c
SK
3057 qlt_remove_target(ha, vha);
3058
7b867cf7
AC
3059 fc_remove_host(vha->host);
3060
3061 scsi_remove_host(vha->host);
3062
9f40682e
AE
3063 /* Allow timer to run to drain queued items, when removing vp */
3064 qla24xx_deallocate_vp_id(vha);
3065
feafb7b1
AE
3066 if (vha->timer_active) {
3067 qla2x00_vp_stop_timer(vha);
7c3df132
SK
3068 ql_dbg(ql_dbg_user, vha, 0x7086,
3069 "Timer for the VP[%d] has stopped\n", vha->vp_idx);
feafb7b1 3070 }
7b867cf7 3071
feafb7b1
AE
3072 qla2x00_free_fcports(vha);
3073
0d6e61bc
AV
3074 mutex_lock(&ha->vport_lock);
3075 ha->cur_vport_count--;
3076 clear_bit(vha->vp_idx, ha->vp_idx_map);
3077 mutex_unlock(&ha->vport_lock);
3078
726b8548
QT
3079 dma_free_coherent(&ha->pdev->dev, vha->gnl.size, vha->gnl.l,
3080 vha->gnl.ldma);
3081
26fa656e
BK
3082 vha->gnl.l = NULL;
3083
a4239945
QT
3084 vfree(vha->scan.l);
3085
c4a9b538 3086 if (vha->qpair && vha->qpair->vp_idx == vha->vp_idx) {
d7459527 3087 if (qla2xxx_delete_qpair(vha, vha->qpair) != QLA_SUCCESS)
7c3df132 3088 ql_log(ql_log_warn, vha, 0x7087,
d7459527 3089 "Queue Pair delete failed.\n");
cf5a1631
AC
3090 }
3091
7c3df132 3092 ql_log(ql_log_info, vha, 0x7088, "VP[%d] deleted.\n", id);
cfb0919c 3093 scsi_host_put(vha->host);
2c3dfe3f
SJ
3094 return 0;
3095}
3096
a824ebb3 3097static int
2c3dfe3f
SJ
3098qla24xx_vport_disable(struct fc_vport *fc_vport, bool disable)
3099{
3100 scsi_qla_host_t *vha = fc_vport->dd_data;
3101
3102 if (disable)
3103 qla24xx_disable_vp(vha);
3104 else
3105 qla24xx_enable_vp(vha);
3106
3107 return 0;
3108}
3109
1c97a12a 3110struct fc_function_template qla2xxx_transport_functions = {
8482e118
AV
3111
3112 .show_host_node_name = 1,
3113 .show_host_port_name = 1,
ad3e0eda 3114 .show_host_supported_classes = 1,
2ae2b370 3115 .show_host_supported_speeds = 1,
ad3e0eda 3116
8482e118
AV
3117 .get_host_port_id = qla2x00_get_host_port_id,
3118 .show_host_port_id = 1,
04414013
AV
3119 .get_host_speed = qla2x00_get_host_speed,
3120 .show_host_speed = 1,
8d067623
AV
3121 .get_host_port_type = qla2x00_get_host_port_type,
3122 .show_host_port_type = 1,
1620f7c2
AV
3123 .get_host_symbolic_name = qla2x00_get_host_symbolic_name,
3124 .show_host_symbolic_name = 1,
a740a3f0
AV
3125 .set_host_system_hostname = qla2x00_set_host_system_hostname,
3126 .show_host_system_hostname = 1,
90991c85
AV
3127 .get_host_fabric_name = qla2x00_get_host_fabric_name,
3128 .show_host_fabric_name = 1,
7047fcdd
AV
3129 .get_host_port_state = qla2x00_get_host_port_state,
3130 .show_host_port_state = 1,
8482e118 3131
bdf79621 3132 .dd_fcrport_size = sizeof(struct fc_port *),
ad3e0eda 3133 .show_rport_supported_classes = 1,
8482e118
AV
3134
3135 .get_starget_node_name = qla2x00_get_starget_node_name,
3136 .show_starget_node_name = 1,
3137 .get_starget_port_name = qla2x00_get_starget_port_name,
3138 .show_starget_port_name = 1,
3139 .get_starget_port_id = qla2x00_get_starget_port_id,
3140 .show_starget_port_id = 1,
3141
8482e118
AV
3142 .set_rport_dev_loss_tmo = qla2x00_set_rport_loss_tmo,
3143 .show_rport_dev_loss_tmo = 1,
3144
91ca7b01 3145 .issue_fc_host_lip = qla2x00_issue_lip,
5f3a9a20
SJ
3146 .dev_loss_tmo_callbk = qla2x00_dev_loss_tmo_callbk,
3147 .terminate_rport_io = qla2x00_terminate_rport_io,
392e2f65 3148 .get_fc_host_stats = qla2x00_get_fc_host_stats,
fabbb8df 3149 .reset_fc_host_stats = qla2x00_reset_host_stats,
2c3dfe3f
SJ
3150
3151 .vport_create = qla24xx_vport_create,
3152 .vport_disable = qla24xx_vport_disable,
3153 .vport_delete = qla24xx_vport_delete,
9a069e19
GM
3154 .bsg_request = qla24xx_bsg_request,
3155 .bsg_timeout = qla24xx_bsg_timeout,
2c3dfe3f
SJ
3156};
3157
3158struct fc_function_template qla2xxx_transport_vport_functions = {
3159
3160 .show_host_node_name = 1,
3161 .show_host_port_name = 1,
3162 .show_host_supported_classes = 1,
3163
3164 .get_host_port_id = qla2x00_get_host_port_id,
3165 .show_host_port_id = 1,
3166 .get_host_speed = qla2x00_get_host_speed,
3167 .show_host_speed = 1,
3168 .get_host_port_type = qla2x00_get_host_port_type,
3169 .show_host_port_type = 1,
3170 .get_host_symbolic_name = qla2x00_get_host_symbolic_name,
3171 .show_host_symbolic_name = 1,
3172 .set_host_system_hostname = qla2x00_set_host_system_hostname,
3173 .show_host_system_hostname = 1,
3174 .get_host_fabric_name = qla2x00_get_host_fabric_name,
3175 .show_host_fabric_name = 1,
3176 .get_host_port_state = qla2x00_get_host_port_state,
3177 .show_host_port_state = 1,
3178
3179 .dd_fcrport_size = sizeof(struct fc_port *),
3180 .show_rport_supported_classes = 1,
3181
3182 .get_starget_node_name = qla2x00_get_starget_node_name,
3183 .show_starget_node_name = 1,
3184 .get_starget_port_name = qla2x00_get_starget_port_name,
3185 .show_starget_port_name = 1,
3186 .get_starget_port_id = qla2x00_get_starget_port_id,
3187 .show_starget_port_id = 1,
3188
2c3dfe3f
SJ
3189 .set_rport_dev_loss_tmo = qla2x00_set_rport_loss_tmo,
3190 .show_rport_dev_loss_tmo = 1,
3191
3192 .issue_fc_host_lip = qla2x00_issue_lip,
5f3a9a20
SJ
3193 .dev_loss_tmo_callbk = qla2x00_dev_loss_tmo_callbk,
3194 .terminate_rport_io = qla2x00_terminate_rport_io,
2c3dfe3f 3195 .get_fc_host_stats = qla2x00_get_fc_host_stats,
fabbb8df
JC
3196 .reset_fc_host_stats = qla2x00_reset_host_stats,
3197
9a069e19
GM
3198 .bsg_request = qla24xx_bsg_request,
3199 .bsg_timeout = qla24xx_bsg_timeout,
8482e118
AV
3200};
3201
8482e118 3202void
7b867cf7 3203qla2x00_init_host_attr(scsi_qla_host_t *vha)
8482e118 3204{
7b867cf7 3205 struct qla_hw_data *ha = vha->hw;
72a92df2 3206 u32 speeds = FC_PORTSPEED_UNKNOWN;
2ae2b370 3207
d2b5f10e 3208 fc_host_dev_loss_tmo(vha->host) = ha->port_down_retry_count;
7b867cf7
AC
3209 fc_host_node_name(vha->host) = wwn_to_u64(vha->node_name);
3210 fc_host_port_name(vha->host) = wwn_to_u64(vha->port_name);
7c3f8fd1 3211 fc_host_supported_classes(vha->host) = ha->base_qpair->enable_class_2 ?
2d70c103 3212 (FC_COS_CLASS2|FC_COS_CLASS3) : FC_COS_CLASS3;
7b867cf7
AC
3213 fc_host_max_npiv_vports(vha->host) = ha->max_npiv_vports;
3214 fc_host_npiv_vports_inuse(vha->host) = ha->cur_vport_count;
2ae2b370 3215
6246b8a1 3216 if (IS_CNA_CAPABLE(ha))
72a92df2
JC
3217 speeds = FC_PORTSPEED_10GBIT;
3218 else if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) {
3219 if (ha->max_supported_speed == 2) {
3220 if (ha->min_supported_speed <= 6)
3221 speeds |= FC_PORTSPEED_64GBIT;
3222 }
3223 if (ha->max_supported_speed == 2 ||
3224 ha->max_supported_speed == 1) {
3225 if (ha->min_supported_speed <= 5)
3226 speeds |= FC_PORTSPEED_32GBIT;
3227 }
3228 if (ha->max_supported_speed == 2 ||
3229 ha->max_supported_speed == 1 ||
3230 ha->max_supported_speed == 0) {
3231 if (ha->min_supported_speed <= 4)
3232 speeds |= FC_PORTSPEED_16GBIT;
3233 }
3234 if (ha->max_supported_speed == 1 ||
3235 ha->max_supported_speed == 0) {
3236 if (ha->min_supported_speed <= 3)
3237 speeds |= FC_PORTSPEED_8GBIT;
3238 }
3239 if (ha->max_supported_speed == 0) {
3240 if (ha->min_supported_speed <= 2)
3241 speeds |= FC_PORTSPEED_4GBIT;
3242 }
3243 } else if (IS_QLA2031(ha))
3244 speeds = FC_PORTSPEED_16GBIT|FC_PORTSPEED_8GBIT|
3245 FC_PORTSPEED_4GBIT;
3246 else if (IS_QLA25XX(ha) || IS_QLAFX00(ha))
3247 speeds = FC_PORTSPEED_8GBIT|FC_PORTSPEED_4GBIT|
3248 FC_PORTSPEED_2GBIT|FC_PORTSPEED_1GBIT;
4d4df193 3249 else if (IS_QLA24XX_TYPE(ha))
72a92df2
JC
3250 speeds = FC_PORTSPEED_4GBIT|FC_PORTSPEED_2GBIT|
3251 FC_PORTSPEED_1GBIT;
2ae2b370 3252 else if (IS_QLA23XX(ha))
72a92df2 3253 speeds = FC_PORTSPEED_2GBIT|FC_PORTSPEED_1GBIT;
2ae2b370 3254 else
72a92df2
JC
3255 speeds = FC_PORTSPEED_1GBIT;
3256
3257 fc_host_supported_speeds(vha->host) = speeds;
8482e118 3258}