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Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
fa90c54f | 2 | * QLogic Fibre Channel HBA Driver |
07e264b7 | 3 | * Copyright (c) 2003-2011 QLogic Corporation |
1da177e4 | 4 | * |
fa90c54f | 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
1da177e4 LT |
6 | */ |
7 | #include "qla_def.h" | |
73208dfd | 8 | #include "qla_gbl.h" |
1da177e4 LT |
9 | |
10 | #include <linux/delay.h> | |
5a0e3ad6 | 11 | #include <linux/slab.h> |
0107109e | 12 | #include <linux/vmalloc.h> |
1da177e4 LT |
13 | |
14 | #include "qla_devtbl.h" | |
15 | ||
4e08df3f DM |
16 | #ifdef CONFIG_SPARC |
17 | #include <asm/prom.h> | |
4e08df3f DM |
18 | #endif |
19 | ||
1da177e4 LT |
20 | /* |
21 | * QLogic ISP2x00 Hardware Support Function Prototypes. | |
22 | */ | |
1da177e4 | 23 | static int qla2x00_isp_firmware(scsi_qla_host_t *); |
1da177e4 | 24 | static int qla2x00_setup_chip(scsi_qla_host_t *); |
1da177e4 LT |
25 | static int qla2x00_init_rings(scsi_qla_host_t *); |
26 | static int qla2x00_fw_ready(scsi_qla_host_t *); | |
27 | static int qla2x00_configure_hba(scsi_qla_host_t *); | |
1da177e4 LT |
28 | static int qla2x00_configure_loop(scsi_qla_host_t *); |
29 | static int qla2x00_configure_local_loop(scsi_qla_host_t *); | |
1da177e4 LT |
30 | static int qla2x00_configure_fabric(scsi_qla_host_t *); |
31 | static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *); | |
32 | static int qla2x00_device_resync(scsi_qla_host_t *); | |
33 | static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *, | |
34 | uint16_t *); | |
1da177e4 LT |
35 | |
36 | static int qla2x00_restart_isp(scsi_qla_host_t *); | |
1da177e4 | 37 | |
4d4df193 HK |
38 | static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); |
39 | static int qla84xx_init_chip(scsi_qla_host_t *); | |
73208dfd | 40 | static int qla25xx_init_queues(struct qla_hw_data *); |
4d4df193 | 41 | |
ac280b67 AV |
42 | /* SRB Extensions ---------------------------------------------------------- */ |
43 | ||
44 | static void | |
45 | qla2x00_ctx_sp_timeout(unsigned long __data) | |
46 | { | |
47 | srb_t *sp = (srb_t *)__data; | |
48 | struct srb_ctx *ctx; | |
4916392b | 49 | struct srb_iocb *iocb; |
ac280b67 AV |
50 | fc_port_t *fcport = sp->fcport; |
51 | struct qla_hw_data *ha = fcport->vha->hw; | |
52 | struct req_que *req; | |
53 | unsigned long flags; | |
54 | ||
55 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
56 | req = ha->req_q_map[0]; | |
57 | req->outstanding_cmds[sp->handle] = NULL; | |
58 | ctx = sp->ctx; | |
4916392b MI |
59 | iocb = ctx->u.iocb_cmd; |
60 | iocb->timeout(sp); | |
4916392b | 61 | iocb->free(sp); |
6ac52608 | 62 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
ac280b67 AV |
63 | } |
64 | ||
3dbe756a | 65 | static void |
ac280b67 AV |
66 | qla2x00_ctx_sp_free(srb_t *sp) |
67 | { | |
68 | struct srb_ctx *ctx = sp->ctx; | |
4916392b | 69 | struct srb_iocb *iocb = ctx->u.iocb_cmd; |
feafb7b1 | 70 | struct scsi_qla_host *vha = sp->fcport->vha; |
ac280b67 | 71 | |
4d97cc53 | 72 | del_timer(&iocb->timer); |
4916392b | 73 | kfree(iocb); |
ac280b67 AV |
74 | kfree(ctx); |
75 | mempool_free(sp, sp->fcport->vha->hw->srb_mempool); | |
feafb7b1 AE |
76 | |
77 | QLA_VHA_MARK_NOT_BUSY(vha); | |
ac280b67 AV |
78 | } |
79 | ||
80 | inline srb_t * | |
81 | qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size, | |
82 | unsigned long tmo) | |
83 | { | |
feafb7b1 | 84 | srb_t *sp = NULL; |
ac280b67 AV |
85 | struct qla_hw_data *ha = vha->hw; |
86 | struct srb_ctx *ctx; | |
4916392b | 87 | struct srb_iocb *iocb; |
feafb7b1 AE |
88 | uint8_t bail; |
89 | ||
90 | QLA_VHA_MARK_BUSY(vha, bail); | |
91 | if (bail) | |
92 | return NULL; | |
ac280b67 AV |
93 | |
94 | sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL); | |
95 | if (!sp) | |
96 | goto done; | |
97 | ctx = kzalloc(size, GFP_KERNEL); | |
98 | if (!ctx) { | |
99 | mempool_free(sp, ha->srb_mempool); | |
4916392b MI |
100 | sp = NULL; |
101 | goto done; | |
102 | } | |
103 | iocb = kzalloc(sizeof(struct srb_iocb), GFP_KERNEL); | |
104 | if (!iocb) { | |
105 | mempool_free(sp, ha->srb_mempool); | |
106 | sp = NULL; | |
107 | kfree(ctx); | |
ac280b67 AV |
108 | goto done; |
109 | } | |
110 | ||
111 | memset(sp, 0, sizeof(*sp)); | |
112 | sp->fcport = fcport; | |
113 | sp->ctx = ctx; | |
4916392b MI |
114 | ctx->u.iocb_cmd = iocb; |
115 | iocb->free = qla2x00_ctx_sp_free; | |
ac280b67 | 116 | |
4916392b | 117 | init_timer(&iocb->timer); |
ac280b67 AV |
118 | if (!tmo) |
119 | goto done; | |
4916392b MI |
120 | iocb->timer.expires = jiffies + tmo * HZ; |
121 | iocb->timer.data = (unsigned long)sp; | |
122 | iocb->timer.function = qla2x00_ctx_sp_timeout; | |
123 | add_timer(&iocb->timer); | |
ac280b67 | 124 | done: |
feafb7b1 AE |
125 | if (!sp) |
126 | QLA_VHA_MARK_NOT_BUSY(vha); | |
ac280b67 AV |
127 | return sp; |
128 | } | |
129 | ||
130 | /* Asynchronous Login/Logout Routines -------------------------------------- */ | |
131 | ||
5b91490e AV |
132 | static inline unsigned long |
133 | qla2x00_get_async_timeout(struct scsi_qla_host *vha) | |
134 | { | |
135 | unsigned long tmo; | |
136 | struct qla_hw_data *ha = vha->hw; | |
137 | ||
138 | /* Firmware should use switch negotiated r_a_tov for timeout. */ | |
139 | tmo = ha->r_a_tov / 10 * 2; | |
140 | if (!IS_FWI2_CAPABLE(ha)) { | |
141 | /* | |
142 | * Except for earlier ISPs where the timeout is seeded from the | |
143 | * initialization control block. | |
144 | */ | |
145 | tmo = ha->login_timeout; | |
146 | } | |
147 | return tmo; | |
148 | } | |
ac280b67 AV |
149 | |
150 | static void | |
3822263e | 151 | qla2x00_async_iocb_timeout(srb_t *sp) |
ac280b67 AV |
152 | { |
153 | fc_port_t *fcport = sp->fcport; | |
4916392b | 154 | struct srb_ctx *ctx = sp->ctx; |
ac280b67 | 155 | |
7c3df132 SK |
156 | ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, |
157 | "Async-%s timeout - portid=%02x%02x%02x.\n", | |
158 | ctx->name, fcport->d_id.b.domain, fcport->d_id.b.area, | |
159 | fcport->d_id.b.al_pa); | |
ac280b67 | 160 | |
5ff1d584 | 161 | fcport->flags &= ~FCF_ASYNC_SENT; |
6ac52608 AV |
162 | if (ctx->type == SRB_LOGIN_CMD) { |
163 | struct srb_iocb *lio = ctx->u.iocb_cmd; | |
ac280b67 | 164 | qla2x00_post_async_logout_work(fcport->vha, fcport, NULL); |
6ac52608 AV |
165 | /* Retry as needed. */ |
166 | lio->u.logio.data[0] = MBS_COMMAND_ERROR; | |
167 | lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? | |
168 | QLA_LOGIO_LOGIN_RETRIED : 0; | |
169 | qla2x00_post_async_login_done_work(fcport->vha, fcport, | |
170 | lio->u.logio.data); | |
171 | } | |
ac280b67 AV |
172 | } |
173 | ||
99b0bec7 AV |
174 | static void |
175 | qla2x00_async_login_ctx_done(srb_t *sp) | |
176 | { | |
4916392b MI |
177 | struct srb_ctx *ctx = sp->ctx; |
178 | struct srb_iocb *lio = ctx->u.iocb_cmd; | |
99b0bec7 AV |
179 | |
180 | qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport, | |
4916392b MI |
181 | lio->u.logio.data); |
182 | lio->free(sp); | |
99b0bec7 AV |
183 | } |
184 | ||
ac280b67 AV |
185 | int |
186 | qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, | |
187 | uint16_t *data) | |
188 | { | |
ac280b67 | 189 | srb_t *sp; |
4916392b MI |
190 | struct srb_ctx *ctx; |
191 | struct srb_iocb *lio; | |
ac280b67 AV |
192 | int rval; |
193 | ||
194 | rval = QLA_FUNCTION_FAILED; | |
4916392b | 195 | sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), |
5b91490e | 196 | qla2x00_get_async_timeout(vha) + 2); |
ac280b67 AV |
197 | if (!sp) |
198 | goto done; | |
199 | ||
4916392b MI |
200 | ctx = sp->ctx; |
201 | ctx->type = SRB_LOGIN_CMD; | |
202 | ctx->name = "login"; | |
203 | lio = ctx->u.iocb_cmd; | |
3822263e | 204 | lio->timeout = qla2x00_async_iocb_timeout; |
4916392b MI |
205 | lio->done = qla2x00_async_login_ctx_done; |
206 | lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; | |
ac280b67 | 207 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) |
4916392b | 208 | lio->u.logio.flags |= SRB_LOGIN_RETRIED; |
ac280b67 AV |
209 | rval = qla2x00_start_sp(sp); |
210 | if (rval != QLA_SUCCESS) | |
211 | goto done_free_sp; | |
212 | ||
7c3df132 SK |
213 | ql_dbg(ql_dbg_disc, vha, 0x2072, |
214 | "Async-login - loopid=%x portid=%02x%02x%02x retries=%d.\n", | |
215 | fcport->loop_id, fcport->d_id.b.domain, fcport->d_id.b.area, | |
216 | fcport->d_id.b.al_pa, fcport->login_retry); | |
ac280b67 AV |
217 | return rval; |
218 | ||
219 | done_free_sp: | |
4916392b | 220 | lio->free(sp); |
ac280b67 AV |
221 | done: |
222 | return rval; | |
223 | } | |
224 | ||
99b0bec7 AV |
225 | static void |
226 | qla2x00_async_logout_ctx_done(srb_t *sp) | |
227 | { | |
4916392b MI |
228 | struct srb_ctx *ctx = sp->ctx; |
229 | struct srb_iocb *lio = ctx->u.iocb_cmd; | |
99b0bec7 AV |
230 | |
231 | qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport, | |
4916392b MI |
232 | lio->u.logio.data); |
233 | lio->free(sp); | |
99b0bec7 AV |
234 | } |
235 | ||
ac280b67 AV |
236 | int |
237 | qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) | |
238 | { | |
ac280b67 | 239 | srb_t *sp; |
4916392b MI |
240 | struct srb_ctx *ctx; |
241 | struct srb_iocb *lio; | |
ac280b67 AV |
242 | int rval; |
243 | ||
244 | rval = QLA_FUNCTION_FAILED; | |
4916392b | 245 | sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), |
5b91490e | 246 | qla2x00_get_async_timeout(vha) + 2); |
ac280b67 AV |
247 | if (!sp) |
248 | goto done; | |
249 | ||
4916392b MI |
250 | ctx = sp->ctx; |
251 | ctx->type = SRB_LOGOUT_CMD; | |
252 | ctx->name = "logout"; | |
253 | lio = ctx->u.iocb_cmd; | |
3822263e | 254 | lio->timeout = qla2x00_async_iocb_timeout; |
4916392b | 255 | lio->done = qla2x00_async_logout_ctx_done; |
ac280b67 AV |
256 | rval = qla2x00_start_sp(sp); |
257 | if (rval != QLA_SUCCESS) | |
258 | goto done_free_sp; | |
259 | ||
7c3df132 SK |
260 | ql_dbg(ql_dbg_disc, vha, 0x2070, |
261 | "Async-logout - loop-id=%x portid=%02x%02x%02x.\n", | |
262 | fcport->loop_id, fcport->d_id.b.domain, fcport->d_id.b.area, | |
263 | fcport->d_id.b.al_pa); | |
ac280b67 AV |
264 | return rval; |
265 | ||
266 | done_free_sp: | |
4916392b | 267 | lio->free(sp); |
ac280b67 AV |
268 | done: |
269 | return rval; | |
270 | } | |
271 | ||
5ff1d584 AV |
272 | static void |
273 | qla2x00_async_adisc_ctx_done(srb_t *sp) | |
274 | { | |
4916392b MI |
275 | struct srb_ctx *ctx = sp->ctx; |
276 | struct srb_iocb *lio = ctx->u.iocb_cmd; | |
5ff1d584 AV |
277 | |
278 | qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport, | |
4916392b MI |
279 | lio->u.logio.data); |
280 | lio->free(sp); | |
5ff1d584 AV |
281 | } |
282 | ||
283 | int | |
284 | qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, | |
285 | uint16_t *data) | |
286 | { | |
5ff1d584 | 287 | srb_t *sp; |
4916392b MI |
288 | struct srb_ctx *ctx; |
289 | struct srb_iocb *lio; | |
5ff1d584 AV |
290 | int rval; |
291 | ||
292 | rval = QLA_FUNCTION_FAILED; | |
4916392b | 293 | sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), |
5b91490e | 294 | qla2x00_get_async_timeout(vha) + 2); |
5ff1d584 AV |
295 | if (!sp) |
296 | goto done; | |
297 | ||
4916392b MI |
298 | ctx = sp->ctx; |
299 | ctx->type = SRB_ADISC_CMD; | |
300 | ctx->name = "adisc"; | |
301 | lio = ctx->u.iocb_cmd; | |
3822263e | 302 | lio->timeout = qla2x00_async_iocb_timeout; |
4916392b | 303 | lio->done = qla2x00_async_adisc_ctx_done; |
5ff1d584 | 304 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) |
4916392b | 305 | lio->u.logio.flags |= SRB_LOGIN_RETRIED; |
5ff1d584 AV |
306 | rval = qla2x00_start_sp(sp); |
307 | if (rval != QLA_SUCCESS) | |
308 | goto done_free_sp; | |
309 | ||
7c3df132 SK |
310 | ql_dbg(ql_dbg_disc, vha, 0x206f, |
311 | "Async-adisc - loopid=%x portid=%02x%02x%02x.\n", | |
312 | fcport->loop_id, fcport->d_id.b.domain, fcport->d_id.b.area, | |
313 | fcport->d_id.b.al_pa); | |
5ff1d584 AV |
314 | return rval; |
315 | ||
316 | done_free_sp: | |
4916392b | 317 | lio->free(sp); |
5ff1d584 AV |
318 | done: |
319 | return rval; | |
320 | } | |
321 | ||
3822263e MI |
322 | static void |
323 | qla2x00_async_tm_cmd_ctx_done(srb_t *sp) | |
324 | { | |
325 | struct srb_ctx *ctx = sp->ctx; | |
326 | struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd; | |
327 | ||
328 | qla2x00_async_tm_cmd_done(sp->fcport->vha, sp->fcport, iocb); | |
329 | iocb->free(sp); | |
330 | } | |
331 | ||
332 | int | |
333 | qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, | |
334 | uint32_t tag) | |
335 | { | |
336 | struct scsi_qla_host *vha = fcport->vha; | |
3822263e MI |
337 | srb_t *sp; |
338 | struct srb_ctx *ctx; | |
339 | struct srb_iocb *tcf; | |
340 | int rval; | |
341 | ||
342 | rval = QLA_FUNCTION_FAILED; | |
343 | sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), | |
5b91490e | 344 | qla2x00_get_async_timeout(vha) + 2); |
3822263e MI |
345 | if (!sp) |
346 | goto done; | |
347 | ||
348 | ctx = sp->ctx; | |
349 | ctx->type = SRB_TM_CMD; | |
350 | ctx->name = "tmf"; | |
351 | tcf = ctx->u.iocb_cmd; | |
352 | tcf->u.tmf.flags = flags; | |
353 | tcf->u.tmf.lun = lun; | |
354 | tcf->u.tmf.data = tag; | |
355 | tcf->timeout = qla2x00_async_iocb_timeout; | |
356 | tcf->done = qla2x00_async_tm_cmd_ctx_done; | |
357 | ||
358 | rval = qla2x00_start_sp(sp); | |
359 | if (rval != QLA_SUCCESS) | |
360 | goto done_free_sp; | |
361 | ||
7c3df132 SK |
362 | ql_dbg(ql_dbg_taskm, vha, 0x802f, |
363 | "Async-tmf loop-id=%x portid=%02x%02x%02x.\n", | |
364 | fcport->loop_id, fcport->d_id.b.domain, fcport->d_id.b.area, | |
365 | fcport->d_id.b.al_pa); | |
3822263e MI |
366 | return rval; |
367 | ||
368 | done_free_sp: | |
369 | tcf->free(sp); | |
370 | done: | |
371 | return rval; | |
372 | } | |
373 | ||
4916392b | 374 | void |
ac280b67 AV |
375 | qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport, |
376 | uint16_t *data) | |
377 | { | |
378 | int rval; | |
ac280b67 AV |
379 | |
380 | switch (data[0]) { | |
381 | case MBS_COMMAND_COMPLETE: | |
a4f92a32 AV |
382 | /* |
383 | * Driver must validate login state - If PRLI not complete, | |
384 | * force a relogin attempt via implicit LOGO, PLOGI, and PRLI | |
385 | * requests. | |
386 | */ | |
387 | rval = qla2x00_get_port_database(vha, fcport, 0); | |
388 | if (rval != QLA_SUCCESS) { | |
389 | qla2x00_post_async_logout_work(vha, fcport, NULL); | |
390 | qla2x00_post_async_login_work(vha, fcport, NULL); | |
391 | break; | |
392 | } | |
99b0bec7 | 393 | if (fcport->flags & FCF_FCP2_DEVICE) { |
5ff1d584 AV |
394 | qla2x00_post_async_adisc_work(vha, fcport, data); |
395 | break; | |
99b0bec7 AV |
396 | } |
397 | qla2x00_update_fcport(vha, fcport); | |
ac280b67 AV |
398 | break; |
399 | case MBS_COMMAND_ERROR: | |
5ff1d584 | 400 | fcport->flags &= ~FCF_ASYNC_SENT; |
ac280b67 AV |
401 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) |
402 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
403 | else | |
80d79440 | 404 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
ac280b67 AV |
405 | break; |
406 | case MBS_PORT_ID_USED: | |
407 | fcport->loop_id = data[1]; | |
6ac52608 | 408 | qla2x00_post_async_logout_work(vha, fcport, NULL); |
ac280b67 AV |
409 | qla2x00_post_async_login_work(vha, fcport, NULL); |
410 | break; | |
411 | case MBS_LOOP_ID_USED: | |
412 | fcport->loop_id++; | |
413 | rval = qla2x00_find_new_loop_id(vha, fcport); | |
414 | if (rval != QLA_SUCCESS) { | |
5ff1d584 | 415 | fcport->flags &= ~FCF_ASYNC_SENT; |
80d79440 | 416 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
ac280b67 AV |
417 | break; |
418 | } | |
419 | qla2x00_post_async_login_work(vha, fcport, NULL); | |
420 | break; | |
421 | } | |
4916392b | 422 | return; |
ac280b67 AV |
423 | } |
424 | ||
4916392b | 425 | void |
ac280b67 AV |
426 | qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, |
427 | uint16_t *data) | |
428 | { | |
429 | qla2x00_mark_device_lost(vha, fcport, 1, 0); | |
4916392b | 430 | return; |
ac280b67 AV |
431 | } |
432 | ||
4916392b | 433 | void |
5ff1d584 AV |
434 | qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, |
435 | uint16_t *data) | |
436 | { | |
437 | if (data[0] == MBS_COMMAND_COMPLETE) { | |
438 | qla2x00_update_fcport(vha, fcport); | |
439 | ||
4916392b | 440 | return; |
5ff1d584 AV |
441 | } |
442 | ||
443 | /* Retry login. */ | |
444 | fcport->flags &= ~FCF_ASYNC_SENT; | |
445 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) | |
446 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
447 | else | |
80d79440 | 448 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
5ff1d584 | 449 | |
4916392b | 450 | return; |
5ff1d584 AV |
451 | } |
452 | ||
3822263e MI |
453 | void |
454 | qla2x00_async_tm_cmd_done(struct scsi_qla_host *vha, fc_port_t *fcport, | |
455 | struct srb_iocb *iocb) | |
456 | { | |
457 | int rval; | |
458 | uint32_t flags; | |
459 | uint16_t lun; | |
460 | ||
461 | flags = iocb->u.tmf.flags; | |
462 | lun = (uint16_t)iocb->u.tmf.lun; | |
463 | ||
464 | /* Issue Marker IOCB */ | |
d94d10e7 GM |
465 | rval = qla2x00_marker(vha, vha->hw->req_q_map[0], |
466 | vha->hw->rsp_q_map[0], fcport->loop_id, lun, | |
3822263e MI |
467 | flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); |
468 | ||
469 | if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) { | |
7c3df132 SK |
470 | ql_dbg(ql_dbg_taskm, vha, 0x8030, |
471 | "TM IOCB failed (%x).\n", rval); | |
3822263e MI |
472 | } |
473 | ||
474 | return; | |
475 | } | |
476 | ||
1da177e4 LT |
477 | /****************************************************************************/ |
478 | /* QLogic ISP2x00 Hardware Support Functions. */ | |
479 | /****************************************************************************/ | |
480 | ||
481 | /* | |
482 | * qla2x00_initialize_adapter | |
483 | * Initialize board. | |
484 | * | |
485 | * Input: | |
486 | * ha = adapter block pointer. | |
487 | * | |
488 | * Returns: | |
489 | * 0 = success | |
490 | */ | |
491 | int | |
e315cd28 | 492 | qla2x00_initialize_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
493 | { |
494 | int rval; | |
e315cd28 | 495 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 496 | struct req_que *req = ha->req_q_map[0]; |
2533cf67 | 497 | |
1da177e4 | 498 | /* Clear adapter flags. */ |
e315cd28 | 499 | vha->flags.online = 0; |
2533cf67 | 500 | ha->flags.chip_reset_done = 0; |
e315cd28 | 501 | vha->flags.reset_active = 0; |
85880801 AV |
502 | ha->flags.pci_channel_io_perm_failure = 0; |
503 | ha->flags.eeh_busy = 0; | |
794a5691 | 504 | ha->flags.thermal_supported = 1; |
e315cd28 AC |
505 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); |
506 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
507 | vha->device_flags = DFLG_NO_CABLE; | |
508 | vha->dpc_flags = 0; | |
509 | vha->flags.management_server_logged_in = 0; | |
510 | vha->marker_needed = 0; | |
1da177e4 LT |
511 | ha->isp_abort_cnt = 0; |
512 | ha->beacon_blink_led = 0; | |
513 | ||
73208dfd AC |
514 | set_bit(0, ha->req_qid_map); |
515 | set_bit(0, ha->rsp_qid_map); | |
516 | ||
7c3df132 SK |
517 | ql_log(ql_log_info, vha, 0x0040, |
518 | "Configuring PCI space...\n"); | |
e315cd28 | 519 | rval = ha->isp_ops->pci_config(vha); |
1da177e4 | 520 | if (rval) { |
7c3df132 SK |
521 | ql_log(ql_log_warn, vha, 0x0044, |
522 | "Unable to configure PCI space.\n"); | |
1da177e4 LT |
523 | return (rval); |
524 | } | |
525 | ||
e315cd28 | 526 | ha->isp_ops->reset_chip(vha); |
1da177e4 | 527 | |
e315cd28 | 528 | rval = qla2xxx_get_flash_info(vha); |
c00d8994 | 529 | if (rval) { |
7c3df132 SK |
530 | ql_log(ql_log_fatal, vha, 0x004f, |
531 | "Unable to validate FLASH data.\n"); | |
c00d8994 AV |
532 | return (rval); |
533 | } | |
534 | ||
73208dfd | 535 | ha->isp_ops->get_flash_version(vha, req->ring); |
7c3df132 SK |
536 | ql_log(ql_log_info, vha, 0x0061, |
537 | "Configure NVRAM parameters...\n"); | |
0107109e | 538 | |
e315cd28 | 539 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 540 | |
d4c760c2 AV |
541 | if (ha->flags.disable_serdes) { |
542 | /* Mask HBA via NVRAM settings? */ | |
7c3df132 SK |
543 | ql_log(ql_log_info, vha, 0x0077, |
544 | "Masking HBA WWPN " | |
d4c760c2 | 545 | "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n", |
e315cd28 AC |
546 | vha->port_name[0], vha->port_name[1], |
547 | vha->port_name[2], vha->port_name[3], | |
548 | vha->port_name[4], vha->port_name[5], | |
549 | vha->port_name[6], vha->port_name[7]); | |
d4c760c2 AV |
550 | return QLA_FUNCTION_FAILED; |
551 | } | |
552 | ||
7c3df132 SK |
553 | ql_log(ql_log_info, vha, 0x0078, |
554 | "Verifying loaded RISC code...\n"); | |
1da177e4 | 555 | |
e315cd28 AC |
556 | if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { |
557 | rval = ha->isp_ops->chip_diag(vha); | |
d19044c3 AV |
558 | if (rval) |
559 | return (rval); | |
e315cd28 | 560 | rval = qla2x00_setup_chip(vha); |
d19044c3 AV |
561 | if (rval) |
562 | return (rval); | |
1da177e4 | 563 | } |
a9083016 | 564 | |
4d4df193 | 565 | if (IS_QLA84XX(ha)) { |
e315cd28 | 566 | ha->cs84xx = qla84xx_get_chip(vha); |
4d4df193 | 567 | if (!ha->cs84xx) { |
7c3df132 | 568 | ql_log(ql_log_warn, vha, 0x00d0, |
4d4df193 HK |
569 | "Unable to configure ISP84XX.\n"); |
570 | return QLA_FUNCTION_FAILED; | |
571 | } | |
572 | } | |
e315cd28 | 573 | rval = qla2x00_init_rings(vha); |
2533cf67 | 574 | ha->flags.chip_reset_done = 1; |
1da177e4 | 575 | |
9a069e19 | 576 | if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { |
6c452a45 | 577 | /* Issue verify 84xx FW IOCB to complete 84xx initialization */ |
9a069e19 GM |
578 | rval = qla84xx_init_chip(vha); |
579 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
580 | ql_log(ql_log_warn, vha, 0x00d4, |
581 | "Unable to initialize ISP84XX.\n"); | |
9a069e19 GM |
582 | qla84xx_put_chip(vha); |
583 | } | |
584 | } | |
585 | ||
2f0f3f4f MI |
586 | if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) |
587 | qla24xx_read_fcp_prio_cfg(vha); | |
09ff701a | 588 | |
1da177e4 LT |
589 | return (rval); |
590 | } | |
591 | ||
592 | /** | |
abbd8870 | 593 | * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. |
1da177e4 LT |
594 | * @ha: HA context |
595 | * | |
596 | * Returns 0 on success. | |
597 | */ | |
abbd8870 | 598 | int |
e315cd28 | 599 | qla2100_pci_config(scsi_qla_host_t *vha) |
1da177e4 | 600 | { |
a157b101 | 601 | uint16_t w; |
abbd8870 | 602 | unsigned long flags; |
e315cd28 | 603 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 604 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 605 | |
1da177e4 | 606 | pci_set_master(ha->pdev); |
af6177d8 | 607 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 608 | |
1da177e4 | 609 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 610 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
abbd8870 AV |
611 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
612 | ||
737faece | 613 | pci_disable_rom(ha->pdev); |
1da177e4 LT |
614 | |
615 | /* Get PCI bus information. */ | |
616 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 617 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
1da177e4 LT |
618 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
619 | ||
abbd8870 AV |
620 | return QLA_SUCCESS; |
621 | } | |
1da177e4 | 622 | |
abbd8870 AV |
623 | /** |
624 | * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. | |
625 | * @ha: HA context | |
626 | * | |
627 | * Returns 0 on success. | |
628 | */ | |
629 | int | |
e315cd28 | 630 | qla2300_pci_config(scsi_qla_host_t *vha) |
abbd8870 | 631 | { |
a157b101 | 632 | uint16_t w; |
abbd8870 AV |
633 | unsigned long flags = 0; |
634 | uint32_t cnt; | |
e315cd28 | 635 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 636 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 637 | |
abbd8870 | 638 | pci_set_master(ha->pdev); |
af6177d8 | 639 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 640 | |
abbd8870 | 641 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 642 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
1da177e4 | 643 | |
abbd8870 AV |
644 | if (IS_QLA2322(ha) || IS_QLA6322(ha)) |
645 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
a157b101 | 646 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
1da177e4 | 647 | |
abbd8870 AV |
648 | /* |
649 | * If this is a 2300 card and not 2312, reset the | |
650 | * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, | |
651 | * the 2310 also reports itself as a 2300 so we need to get the | |
652 | * fb revision level -- a 6 indicates it really is a 2300 and | |
653 | * not a 2310. | |
654 | */ | |
655 | if (IS_QLA2300(ha)) { | |
656 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1da177e4 | 657 | |
abbd8870 | 658 | /* Pause RISC. */ |
3d71644c | 659 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); |
abbd8870 | 660 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 661 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) |
abbd8870 | 662 | break; |
1da177e4 | 663 | |
abbd8870 AV |
664 | udelay(10); |
665 | } | |
1da177e4 | 666 | |
abbd8870 | 667 | /* Select FPM registers. */ |
3d71644c AV |
668 | WRT_REG_WORD(®->ctrl_status, 0x20); |
669 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
670 | |
671 | /* Get the fb rev level */ | |
3d71644c | 672 | ha->fb_rev = RD_FB_CMD_REG(ha, reg); |
abbd8870 AV |
673 | |
674 | if (ha->fb_rev == FPM_2300) | |
a157b101 | 675 | pci_clear_mwi(ha->pdev); |
abbd8870 AV |
676 | |
677 | /* Deselect FPM registers. */ | |
3d71644c AV |
678 | WRT_REG_WORD(®->ctrl_status, 0x0); |
679 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
680 | |
681 | /* Release RISC module. */ | |
3d71644c | 682 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); |
abbd8870 | 683 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 684 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) |
abbd8870 AV |
685 | break; |
686 | ||
687 | udelay(10); | |
1da177e4 | 688 | } |
1da177e4 | 689 | |
abbd8870 AV |
690 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
691 | } | |
1da177e4 | 692 | |
abbd8870 AV |
693 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); |
694 | ||
737faece | 695 | pci_disable_rom(ha->pdev); |
1da177e4 | 696 | |
abbd8870 AV |
697 | /* Get PCI bus information. */ |
698 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 699 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
abbd8870 AV |
700 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
701 | ||
702 | return QLA_SUCCESS; | |
1da177e4 LT |
703 | } |
704 | ||
0107109e AV |
705 | /** |
706 | * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. | |
707 | * @ha: HA context | |
708 | * | |
709 | * Returns 0 on success. | |
710 | */ | |
711 | int | |
e315cd28 | 712 | qla24xx_pci_config(scsi_qla_host_t *vha) |
0107109e | 713 | { |
a157b101 | 714 | uint16_t w; |
0107109e | 715 | unsigned long flags = 0; |
e315cd28 | 716 | struct qla_hw_data *ha = vha->hw; |
0107109e | 717 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
0107109e AV |
718 | |
719 | pci_set_master(ha->pdev); | |
af6177d8 | 720 | pci_try_set_mwi(ha->pdev); |
0107109e AV |
721 | |
722 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
a157b101 | 723 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
0107109e AV |
724 | w &= ~PCI_COMMAND_INTX_DISABLE; |
725 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
726 | ||
727 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); | |
728 | ||
729 | /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ | |
f85ec187 AV |
730 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) |
731 | pcix_set_mmrbc(ha->pdev, 2048); | |
0107109e AV |
732 | |
733 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
f85ec187 AV |
734 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) |
735 | pcie_set_readrq(ha->pdev, 2048); | |
0107109e | 736 | |
737faece | 737 | pci_disable_rom(ha->pdev); |
0107109e | 738 | |
44c10138 | 739 | ha->chip_revision = ha->pdev->revision; |
a8488abe | 740 | |
0107109e AV |
741 | /* Get PCI bus information. */ |
742 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
743 | ha->pci_attr = RD_REG_DWORD(®->ctrl_status); | |
744 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
745 | ||
746 | return QLA_SUCCESS; | |
747 | } | |
748 | ||
c3a2f0df AV |
749 | /** |
750 | * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. | |
751 | * @ha: HA context | |
752 | * | |
753 | * Returns 0 on success. | |
754 | */ | |
755 | int | |
e315cd28 | 756 | qla25xx_pci_config(scsi_qla_host_t *vha) |
c3a2f0df AV |
757 | { |
758 | uint16_t w; | |
e315cd28 | 759 | struct qla_hw_data *ha = vha->hw; |
c3a2f0df AV |
760 | |
761 | pci_set_master(ha->pdev); | |
762 | pci_try_set_mwi(ha->pdev); | |
763 | ||
764 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
765 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); | |
766 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
767 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
768 | ||
769 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
770 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) | |
771 | pcie_set_readrq(ha->pdev, 2048); | |
772 | ||
737faece | 773 | pci_disable_rom(ha->pdev); |
c3a2f0df AV |
774 | |
775 | ha->chip_revision = ha->pdev->revision; | |
776 | ||
777 | return QLA_SUCCESS; | |
778 | } | |
779 | ||
1da177e4 LT |
780 | /** |
781 | * qla2x00_isp_firmware() - Choose firmware image. | |
782 | * @ha: HA context | |
783 | * | |
784 | * Returns 0 on success. | |
785 | */ | |
786 | static int | |
e315cd28 | 787 | qla2x00_isp_firmware(scsi_qla_host_t *vha) |
1da177e4 LT |
788 | { |
789 | int rval; | |
42e421b1 AV |
790 | uint16_t loop_id, topo, sw_cap; |
791 | uint8_t domain, area, al_pa; | |
e315cd28 | 792 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
793 | |
794 | /* Assume loading risc code */ | |
fa2a1ce5 | 795 | rval = QLA_FUNCTION_FAILED; |
1da177e4 LT |
796 | |
797 | if (ha->flags.disable_risc_code_load) { | |
7c3df132 | 798 | ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); |
1da177e4 LT |
799 | |
800 | /* Verify checksum of loaded RISC code. */ | |
e315cd28 | 801 | rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); |
42e421b1 AV |
802 | if (rval == QLA_SUCCESS) { |
803 | /* And, verify we are not in ROM code. */ | |
e315cd28 | 804 | rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, |
42e421b1 AV |
805 | &area, &domain, &topo, &sw_cap); |
806 | } | |
1da177e4 LT |
807 | } |
808 | ||
7c3df132 SK |
809 | if (rval) |
810 | ql_dbg(ql_dbg_init, vha, 0x007a, | |
811 | "**** Load RISC code ****.\n"); | |
1da177e4 LT |
812 | |
813 | return (rval); | |
814 | } | |
815 | ||
816 | /** | |
817 | * qla2x00_reset_chip() - Reset ISP chip. | |
818 | * @ha: HA context | |
819 | * | |
820 | * Returns 0 on success. | |
821 | */ | |
abbd8870 | 822 | void |
e315cd28 | 823 | qla2x00_reset_chip(scsi_qla_host_t *vha) |
1da177e4 LT |
824 | { |
825 | unsigned long flags = 0; | |
e315cd28 | 826 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 827 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 828 | uint32_t cnt; |
1da177e4 LT |
829 | uint16_t cmd; |
830 | ||
85880801 AV |
831 | if (unlikely(pci_channel_offline(ha->pdev))) |
832 | return; | |
833 | ||
fd34f556 | 834 | ha->isp_ops->disable_intrs(ha); |
1da177e4 LT |
835 | |
836 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
837 | ||
838 | /* Turn off master enable */ | |
839 | cmd = 0; | |
840 | pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); | |
841 | cmd &= ~PCI_COMMAND_MASTER; | |
842 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
843 | ||
844 | if (!IS_QLA2100(ha)) { | |
845 | /* Pause RISC. */ | |
846 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); | |
847 | if (IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
848 | for (cnt = 0; cnt < 30000; cnt++) { | |
849 | if ((RD_REG_WORD(®->hccr) & | |
850 | HCCR_RISC_PAUSE) != 0) | |
851 | break; | |
852 | udelay(100); | |
853 | } | |
854 | } else { | |
855 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
856 | udelay(10); | |
857 | } | |
858 | ||
859 | /* Select FPM registers. */ | |
860 | WRT_REG_WORD(®->ctrl_status, 0x20); | |
861 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
862 | ||
863 | /* FPM Soft Reset. */ | |
864 | WRT_REG_WORD(®->fpm_diag_config, 0x100); | |
865 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
866 | ||
867 | /* Toggle Fpm Reset. */ | |
868 | if (!IS_QLA2200(ha)) { | |
869 | WRT_REG_WORD(®->fpm_diag_config, 0x0); | |
870 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
871 | } | |
872 | ||
873 | /* Select frame buffer registers. */ | |
874 | WRT_REG_WORD(®->ctrl_status, 0x10); | |
875 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
876 | ||
877 | /* Reset frame buffer FIFOs. */ | |
878 | if (IS_QLA2200(ha)) { | |
879 | WRT_FB_CMD_REG(ha, reg, 0xa000); | |
880 | RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ | |
881 | } else { | |
882 | WRT_FB_CMD_REG(ha, reg, 0x00fc); | |
883 | ||
884 | /* Read back fb_cmd until zero or 3 seconds max */ | |
885 | for (cnt = 0; cnt < 3000; cnt++) { | |
886 | if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) | |
887 | break; | |
888 | udelay(100); | |
889 | } | |
890 | } | |
891 | ||
892 | /* Select RISC module registers. */ | |
893 | WRT_REG_WORD(®->ctrl_status, 0); | |
894 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
895 | ||
896 | /* Reset RISC processor. */ | |
897 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
898 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
899 | ||
900 | /* Release RISC processor. */ | |
901 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
902 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
903 | } | |
904 | ||
905 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
906 | WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); | |
907 | ||
908 | /* Reset ISP chip. */ | |
909 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
910 | ||
911 | /* Wait for RISC to recover from reset. */ | |
912 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
913 | /* | |
914 | * It is necessary to for a delay here since the card doesn't | |
915 | * respond to PCI reads during a reset. On some architectures | |
916 | * this will result in an MCA. | |
917 | */ | |
918 | udelay(20); | |
919 | for (cnt = 30000; cnt; cnt--) { | |
920 | if ((RD_REG_WORD(®->ctrl_status) & | |
921 | CSR_ISP_SOFT_RESET) == 0) | |
922 | break; | |
923 | udelay(100); | |
924 | } | |
925 | } else | |
926 | udelay(10); | |
927 | ||
928 | /* Reset RISC processor. */ | |
929 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
930 | ||
931 | WRT_REG_WORD(®->semaphore, 0); | |
932 | ||
933 | /* Release RISC processor. */ | |
934 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
935 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
936 | ||
937 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
938 | for (cnt = 0; cnt < 30000; cnt++) { | |
ffb39f03 | 939 | if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) |
1da177e4 | 940 | break; |
1da177e4 LT |
941 | |
942 | udelay(100); | |
943 | } | |
944 | } else | |
945 | udelay(100); | |
946 | ||
947 | /* Turn on master enable */ | |
948 | cmd |= PCI_COMMAND_MASTER; | |
949 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
950 | ||
951 | /* Disable RISC pause on FPM parity error. */ | |
952 | if (!IS_QLA2100(ha)) { | |
953 | WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); | |
954 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
955 | } | |
956 | ||
957 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
958 | } | |
959 | ||
b1d46989 MI |
960 | /** |
961 | * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. | |
962 | * | |
963 | * Returns 0 on success. | |
964 | */ | |
965 | int | |
966 | qla81xx_reset_mpi(scsi_qla_host_t *vha) | |
967 | { | |
968 | uint16_t mb[4] = {0x1010, 0, 1, 0}; | |
969 | ||
970 | return qla81xx_write_mpi_register(vha, mb); | |
971 | } | |
972 | ||
0107109e | 973 | /** |
88c26663 | 974 | * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. |
0107109e AV |
975 | * @ha: HA context |
976 | * | |
977 | * Returns 0 on success. | |
978 | */ | |
88c26663 | 979 | static inline void |
e315cd28 | 980 | qla24xx_reset_risc(scsi_qla_host_t *vha) |
0107109e AV |
981 | { |
982 | unsigned long flags = 0; | |
e315cd28 | 983 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
984 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
985 | uint32_t cnt, d2; | |
335a1cc9 | 986 | uint16_t wd; |
b1d46989 | 987 | static int abts_cnt; /* ISP abort retry counts */ |
0107109e | 988 | |
0107109e AV |
989 | spin_lock_irqsave(&ha->hardware_lock, flags); |
990 | ||
991 | /* Reset RISC. */ | |
992 | WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
993 | for (cnt = 0; cnt < 30000; cnt++) { | |
994 | if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) | |
995 | break; | |
996 | ||
997 | udelay(10); | |
998 | } | |
999 | ||
1000 | WRT_REG_DWORD(®->ctrl_status, | |
1001 | CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
335a1cc9 | 1002 | pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); |
88c26663 | 1003 | |
335a1cc9 | 1004 | udelay(100); |
88c26663 | 1005 | /* Wait for firmware to complete NVRAM accesses. */ |
88c26663 AV |
1006 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); |
1007 | for (cnt = 10000 ; cnt && d2; cnt--) { | |
1008 | udelay(5); | |
1009 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
1010 | barrier(); | |
1011 | } | |
1012 | ||
335a1cc9 | 1013 | /* Wait for soft-reset to complete. */ |
0107109e AV |
1014 | d2 = RD_REG_DWORD(®->ctrl_status); |
1015 | for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) { | |
1016 | udelay(5); | |
1017 | d2 = RD_REG_DWORD(®->ctrl_status); | |
1018 | barrier(); | |
1019 | } | |
1020 | ||
b1d46989 MI |
1021 | /* If required, do an MPI FW reset now */ |
1022 | if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { | |
1023 | if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { | |
1024 | if (++abts_cnt < 5) { | |
1025 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1026 | set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); | |
1027 | } else { | |
1028 | /* | |
1029 | * We exhausted the ISP abort retries. We have to | |
1030 | * set the board offline. | |
1031 | */ | |
1032 | abts_cnt = 0; | |
1033 | vha->flags.online = 0; | |
1034 | } | |
1035 | } | |
1036 | } | |
1037 | ||
0107109e AV |
1038 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); |
1039 | RD_REG_DWORD(®->hccr); | |
1040 | ||
1041 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
1042 | RD_REG_DWORD(®->hccr); | |
1043 | ||
1044 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); | |
1045 | RD_REG_DWORD(®->hccr); | |
1046 | ||
1047 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
1048 | for (cnt = 6000000 ; cnt && d2; cnt--) { | |
1049 | udelay(5); | |
1050 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
1051 | barrier(); | |
1052 | } | |
1053 | ||
1054 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
124f85e6 AV |
1055 | |
1056 | if (IS_NOPOLLING_TYPE(ha)) | |
1057 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
1058 | } |
1059 | ||
88c26663 AV |
1060 | /** |
1061 | * qla24xx_reset_chip() - Reset ISP24xx chip. | |
1062 | * @ha: HA context | |
1063 | * | |
1064 | * Returns 0 on success. | |
1065 | */ | |
1066 | void | |
e315cd28 | 1067 | qla24xx_reset_chip(scsi_qla_host_t *vha) |
88c26663 | 1068 | { |
e315cd28 | 1069 | struct qla_hw_data *ha = vha->hw; |
85880801 AV |
1070 | |
1071 | if (pci_channel_offline(ha->pdev) && | |
1072 | ha->flags.pci_channel_io_perm_failure) { | |
1073 | return; | |
1074 | } | |
1075 | ||
fd34f556 | 1076 | ha->isp_ops->disable_intrs(ha); |
88c26663 AV |
1077 | |
1078 | /* Perform RISC reset. */ | |
e315cd28 | 1079 | qla24xx_reset_risc(vha); |
88c26663 AV |
1080 | } |
1081 | ||
1da177e4 LT |
1082 | /** |
1083 | * qla2x00_chip_diag() - Test chip for proper operation. | |
1084 | * @ha: HA context | |
1085 | * | |
1086 | * Returns 0 on success. | |
1087 | */ | |
abbd8870 | 1088 | int |
e315cd28 | 1089 | qla2x00_chip_diag(scsi_qla_host_t *vha) |
1da177e4 LT |
1090 | { |
1091 | int rval; | |
e315cd28 | 1092 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 1093 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 LT |
1094 | unsigned long flags = 0; |
1095 | uint16_t data; | |
1096 | uint32_t cnt; | |
1097 | uint16_t mb[5]; | |
73208dfd | 1098 | struct req_que *req = ha->req_q_map[0]; |
1da177e4 LT |
1099 | |
1100 | /* Assume a failed state */ | |
1101 | rval = QLA_FUNCTION_FAILED; | |
1102 | ||
7c3df132 SK |
1103 | ql_dbg(ql_dbg_init, vha, 0x007b, |
1104 | "Testing device at %lx.\n", (u_long)®->flash_address); | |
1da177e4 LT |
1105 | |
1106 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1107 | ||
1108 | /* Reset ISP chip. */ | |
1109 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
1110 | ||
1111 | /* | |
1112 | * We need to have a delay here since the card will not respond while | |
1113 | * in reset causing an MCA on some architectures. | |
1114 | */ | |
1115 | udelay(20); | |
1116 | data = qla2x00_debounce_register(®->ctrl_status); | |
1117 | for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { | |
1118 | udelay(5); | |
1119 | data = RD_REG_WORD(®->ctrl_status); | |
1120 | barrier(); | |
1121 | } | |
1122 | ||
1123 | if (!cnt) | |
1124 | goto chip_diag_failed; | |
1125 | ||
7c3df132 SK |
1126 | ql_dbg(ql_dbg_init, vha, 0x007c, |
1127 | "Reset register cleared by chip reset.\n"); | |
1da177e4 LT |
1128 | |
1129 | /* Reset RISC processor. */ | |
1130 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
1131 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
1132 | ||
1133 | /* Workaround for QLA2312 PCI parity error */ | |
1134 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
1135 | data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); | |
1136 | for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { | |
1137 | udelay(5); | |
1138 | data = RD_MAILBOX_REG(ha, reg, 0); | |
fa2a1ce5 | 1139 | barrier(); |
1da177e4 LT |
1140 | } |
1141 | } else | |
1142 | udelay(10); | |
1143 | ||
1144 | if (!cnt) | |
1145 | goto chip_diag_failed; | |
1146 | ||
1147 | /* Check product ID of chip */ | |
7c3df132 | 1148 | ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n"); |
1da177e4 LT |
1149 | |
1150 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
1151 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
1152 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
1153 | mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); | |
1154 | if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || | |
1155 | mb[3] != PROD_ID_3) { | |
7c3df132 SK |
1156 | ql_log(ql_log_warn, vha, 0x0062, |
1157 | "Wrong product ID = 0x%x,0x%x,0x%x.\n", | |
1158 | mb[1], mb[2], mb[3]); | |
1da177e4 LT |
1159 | |
1160 | goto chip_diag_failed; | |
1161 | } | |
1162 | ha->product_id[0] = mb[1]; | |
1163 | ha->product_id[1] = mb[2]; | |
1164 | ha->product_id[2] = mb[3]; | |
1165 | ha->product_id[3] = mb[4]; | |
1166 | ||
1167 | /* Adjust fw RISC transfer size */ | |
73208dfd | 1168 | if (req->length > 1024) |
1da177e4 LT |
1169 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; |
1170 | else | |
1171 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * | |
73208dfd | 1172 | req->length; |
1da177e4 LT |
1173 | |
1174 | if (IS_QLA2200(ha) && | |
1175 | RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { | |
1176 | /* Limit firmware transfer size with a 2200A */ | |
7c3df132 | 1177 | ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); |
1da177e4 | 1178 | |
ea5b6382 | 1179 | ha->device_type |= DT_ISP2200A; |
1da177e4 LT |
1180 | ha->fw_transfer_size = 128; |
1181 | } | |
1182 | ||
1183 | /* Wrap Incoming Mailboxes Test. */ | |
1184 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1185 | ||
7c3df132 | 1186 | ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); |
e315cd28 | 1187 | rval = qla2x00_mbx_reg_test(vha); |
7c3df132 SK |
1188 | if (rval) |
1189 | ql_log(ql_log_warn, vha, 0x0080, | |
1190 | "Failed mailbox send register test.\n"); | |
1191 | else | |
1da177e4 LT |
1192 | /* Flag a successful rval */ |
1193 | rval = QLA_SUCCESS; | |
1da177e4 LT |
1194 | spin_lock_irqsave(&ha->hardware_lock, flags); |
1195 | ||
1196 | chip_diag_failed: | |
1197 | if (rval) | |
7c3df132 SK |
1198 | ql_log(ql_log_info, vha, 0x0081, |
1199 | "Chip diagnostics **** FAILED ****.\n"); | |
1da177e4 LT |
1200 | |
1201 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1202 | ||
1203 | return (rval); | |
1204 | } | |
1205 | ||
0107109e AV |
1206 | /** |
1207 | * qla24xx_chip_diag() - Test ISP24xx for proper operation. | |
1208 | * @ha: HA context | |
1209 | * | |
1210 | * Returns 0 on success. | |
1211 | */ | |
1212 | int | |
e315cd28 | 1213 | qla24xx_chip_diag(scsi_qla_host_t *vha) |
0107109e AV |
1214 | { |
1215 | int rval; | |
e315cd28 | 1216 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 1217 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 1218 | |
a9083016 GM |
1219 | if (IS_QLA82XX(ha)) |
1220 | return QLA_SUCCESS; | |
1221 | ||
73208dfd | 1222 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; |
0107109e | 1223 | |
e315cd28 | 1224 | rval = qla2x00_mbx_reg_test(vha); |
0107109e | 1225 | if (rval) { |
7c3df132 SK |
1226 | ql_log(ql_log_warn, vha, 0x0082, |
1227 | "Failed mailbox send register test.\n"); | |
0107109e AV |
1228 | } else { |
1229 | /* Flag a successful rval */ | |
1230 | rval = QLA_SUCCESS; | |
1231 | } | |
1232 | ||
1233 | return rval; | |
1234 | } | |
1235 | ||
a7a167bf | 1236 | void |
e315cd28 | 1237 | qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) |
0107109e | 1238 | { |
a7a167bf AV |
1239 | int rval; |
1240 | uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, | |
73208dfd | 1241 | eft_size, fce_size, mq_size; |
df613b96 AV |
1242 | dma_addr_t tc_dma; |
1243 | void *tc; | |
e315cd28 | 1244 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
1245 | struct req_que *req = ha->req_q_map[0]; |
1246 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
a7a167bf AV |
1247 | |
1248 | if (ha->fw_dump) { | |
7c3df132 SK |
1249 | ql_dbg(ql_dbg_init, vha, 0x00bd, |
1250 | "Firmware dump already allocated.\n"); | |
a7a167bf AV |
1251 | return; |
1252 | } | |
d4e3e04d | 1253 | |
0107109e | 1254 | ha->fw_dumped = 0; |
73208dfd | 1255 | fixed_size = mem_size = eft_size = fce_size = mq_size = 0; |
d4e3e04d | 1256 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { |
a7a167bf | 1257 | fixed_size = sizeof(struct qla2100_fw_dump); |
d4e3e04d | 1258 | } else if (IS_QLA23XX(ha)) { |
a7a167bf AV |
1259 | fixed_size = offsetof(struct qla2300_fw_dump, data_ram); |
1260 | mem_size = (ha->fw_memory_size - 0x11000 + 1) * | |
1261 | sizeof(uint16_t); | |
e428924c | 1262 | } else if (IS_FWI2_CAPABLE(ha)) { |
3a03eb79 AV |
1263 | if (IS_QLA81XX(ha)) |
1264 | fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); | |
1265 | else if (IS_QLA25XX(ha)) | |
1266 | fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); | |
1267 | else | |
1268 | fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); | |
a7a167bf AV |
1269 | mem_size = (ha->fw_memory_size - 0x100000 + 1) * |
1270 | sizeof(uint32_t); | |
73208dfd AC |
1271 | if (ha->mqenable) |
1272 | mq_size = sizeof(struct qla2xxx_mq_chain); | |
df613b96 | 1273 | /* Allocate memory for Fibre Channel Event Buffer. */ |
3a03eb79 | 1274 | if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)) |
436a7b11 | 1275 | goto try_eft; |
df613b96 AV |
1276 | |
1277 | tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, | |
1278 | GFP_KERNEL); | |
1279 | if (!tc) { | |
7c3df132 SK |
1280 | ql_log(ql_log_warn, vha, 0x00be, |
1281 | "Unable to allocate (%d KB) for FCE.\n", | |
1282 | FCE_SIZE / 1024); | |
17d98630 | 1283 | goto try_eft; |
df613b96 AV |
1284 | } |
1285 | ||
1286 | memset(tc, 0, FCE_SIZE); | |
e315cd28 | 1287 | rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, |
df613b96 AV |
1288 | ha->fce_mb, &ha->fce_bufs); |
1289 | if (rval) { | |
7c3df132 SK |
1290 | ql_log(ql_log_warn, vha, 0x00bf, |
1291 | "Unable to initialize FCE (%d).\n", rval); | |
df613b96 AV |
1292 | dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, |
1293 | tc_dma); | |
1294 | ha->flags.fce_enabled = 0; | |
17d98630 | 1295 | goto try_eft; |
df613b96 | 1296 | } |
7c3df132 SK |
1297 | ql_log(ql_log_info, vha, 0x00c0, |
1298 | "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); | |
df613b96 | 1299 | |
7d9dade3 | 1300 | fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; |
df613b96 AV |
1301 | ha->flags.fce_enabled = 1; |
1302 | ha->fce_dma = tc_dma; | |
1303 | ha->fce = tc; | |
436a7b11 AV |
1304 | try_eft: |
1305 | /* Allocate memory for Extended Trace Buffer. */ | |
1306 | tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, | |
1307 | GFP_KERNEL); | |
1308 | if (!tc) { | |
7c3df132 SK |
1309 | ql_log(ql_log_warn, vha, 0x00c1, |
1310 | "Unable to allocate (%d KB) for EFT.\n", | |
1311 | EFT_SIZE / 1024); | |
436a7b11 AV |
1312 | goto cont_alloc; |
1313 | } | |
1314 | ||
1315 | memset(tc, 0, EFT_SIZE); | |
e315cd28 | 1316 | rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); |
436a7b11 | 1317 | if (rval) { |
7c3df132 SK |
1318 | ql_log(ql_log_warn, vha, 0x00c2, |
1319 | "Unable to initialize EFT (%d).\n", rval); | |
436a7b11 AV |
1320 | dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, |
1321 | tc_dma); | |
1322 | goto cont_alloc; | |
1323 | } | |
7c3df132 SK |
1324 | ql_log(ql_log_info, vha, 0x00c3, |
1325 | "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); | |
436a7b11 AV |
1326 | |
1327 | eft_size = EFT_SIZE; | |
1328 | ha->eft_dma = tc_dma; | |
1329 | ha->eft = tc; | |
d4e3e04d | 1330 | } |
a7a167bf | 1331 | cont_alloc: |
73208dfd AC |
1332 | req_q_size = req->length * sizeof(request_t); |
1333 | rsp_q_size = rsp->length * sizeof(response_t); | |
a7a167bf AV |
1334 | |
1335 | dump_size = offsetof(struct qla2xxx_fw_dump, isp); | |
2afa19a9 | 1336 | dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; |
bb99de67 AV |
1337 | ha->chain_offset = dump_size; |
1338 | dump_size += mq_size + fce_size; | |
d4e3e04d AV |
1339 | |
1340 | ha->fw_dump = vmalloc(dump_size); | |
a7a167bf | 1341 | if (!ha->fw_dump) { |
7c3df132 SK |
1342 | ql_log(ql_log_warn, vha, 0x00c4, |
1343 | "Unable to allocate (%d KB) for firmware dump.\n", | |
1344 | dump_size / 1024); | |
a7a167bf | 1345 | |
e30d1756 MI |
1346 | if (ha->fce) { |
1347 | dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce, | |
1348 | ha->fce_dma); | |
1349 | ha->fce = NULL; | |
1350 | ha->fce_dma = 0; | |
1351 | } | |
1352 | ||
a7a167bf AV |
1353 | if (ha->eft) { |
1354 | dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft, | |
1355 | ha->eft_dma); | |
1356 | ha->eft = NULL; | |
1357 | ha->eft_dma = 0; | |
1358 | } | |
1359 | return; | |
1360 | } | |
7c3df132 SK |
1361 | ql_log(ql_log_info, vha, 0x00c5, |
1362 | "Allocated (%d KB) for firmware dump.\n", dump_size / 1024); | |
a7a167bf AV |
1363 | |
1364 | ha->fw_dump_len = dump_size; | |
1365 | ha->fw_dump->signature[0] = 'Q'; | |
1366 | ha->fw_dump->signature[1] = 'L'; | |
1367 | ha->fw_dump->signature[2] = 'G'; | |
1368 | ha->fw_dump->signature[3] = 'C'; | |
1369 | ha->fw_dump->version = __constant_htonl(1); | |
1370 | ||
1371 | ha->fw_dump->fixed_size = htonl(fixed_size); | |
1372 | ha->fw_dump->mem_size = htonl(mem_size); | |
1373 | ha->fw_dump->req_q_size = htonl(req_q_size); | |
1374 | ha->fw_dump->rsp_q_size = htonl(rsp_q_size); | |
1375 | ||
1376 | ha->fw_dump->eft_size = htonl(eft_size); | |
1377 | ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); | |
1378 | ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); | |
1379 | ||
1380 | ha->fw_dump->header_size = | |
1381 | htonl(offsetof(struct qla2xxx_fw_dump, isp)); | |
0107109e AV |
1382 | } |
1383 | ||
18e7555a AV |
1384 | static int |
1385 | qla81xx_mpi_sync(scsi_qla_host_t *vha) | |
1386 | { | |
1387 | #define MPS_MASK 0xe0 | |
1388 | int rval; | |
1389 | uint16_t dc; | |
1390 | uint32_t dw; | |
18e7555a AV |
1391 | |
1392 | if (!IS_QLA81XX(vha->hw)) | |
1393 | return QLA_SUCCESS; | |
1394 | ||
1395 | rval = qla2x00_write_ram_word(vha, 0x7c00, 1); | |
1396 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
1397 | ql_log(ql_log_warn, vha, 0x0105, |
1398 | "Unable to acquire semaphore.\n"); | |
18e7555a AV |
1399 | goto done; |
1400 | } | |
1401 | ||
1402 | pci_read_config_word(vha->hw->pdev, 0x54, &dc); | |
1403 | rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); | |
1404 | if (rval != QLA_SUCCESS) { | |
7c3df132 | 1405 | ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); |
18e7555a AV |
1406 | goto done_release; |
1407 | } | |
1408 | ||
1409 | dc &= MPS_MASK; | |
1410 | if (dc == (dw & MPS_MASK)) | |
1411 | goto done_release; | |
1412 | ||
1413 | dw &= ~MPS_MASK; | |
1414 | dw |= dc; | |
1415 | rval = qla2x00_write_ram_word(vha, 0x7a15, dw); | |
1416 | if (rval != QLA_SUCCESS) { | |
7c3df132 | 1417 | ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); |
18e7555a AV |
1418 | } |
1419 | ||
1420 | done_release: | |
1421 | rval = qla2x00_write_ram_word(vha, 0x7c00, 0); | |
1422 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
1423 | ql_log(ql_log_warn, vha, 0x006d, |
1424 | "Unable to release semaphore.\n"); | |
18e7555a AV |
1425 | } |
1426 | ||
1427 | done: | |
1428 | return rval; | |
1429 | } | |
1430 | ||
1da177e4 LT |
1431 | /** |
1432 | * qla2x00_setup_chip() - Load and start RISC firmware. | |
1433 | * @ha: HA context | |
1434 | * | |
1435 | * Returns 0 on success. | |
1436 | */ | |
1437 | static int | |
e315cd28 | 1438 | qla2x00_setup_chip(scsi_qla_host_t *vha) |
1da177e4 | 1439 | { |
0107109e AV |
1440 | int rval; |
1441 | uint32_t srisc_address = 0; | |
e315cd28 | 1442 | struct qla_hw_data *ha = vha->hw; |
3db0652e AV |
1443 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1444 | unsigned long flags; | |
dda772e8 | 1445 | uint16_t fw_major_version; |
3db0652e | 1446 | |
a9083016 GM |
1447 | if (IS_QLA82XX(ha)) { |
1448 | rval = ha->isp_ops->load_risc(vha, &srisc_address); | |
14e303d9 AV |
1449 | if (rval == QLA_SUCCESS) { |
1450 | qla2x00_stop_firmware(vha); | |
a9083016 | 1451 | goto enable_82xx_npiv; |
14e303d9 | 1452 | } else |
b963752f | 1453 | goto failed; |
a9083016 GM |
1454 | } |
1455 | ||
3db0652e AV |
1456 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { |
1457 | /* Disable SRAM, Instruction RAM and GP RAM parity. */ | |
1458 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1459 | WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); | |
1460 | RD_REG_WORD(®->hccr); | |
1461 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1462 | } | |
1da177e4 | 1463 | |
18e7555a AV |
1464 | qla81xx_mpi_sync(vha); |
1465 | ||
1da177e4 | 1466 | /* Load firmware sequences */ |
e315cd28 | 1467 | rval = ha->isp_ops->load_risc(vha, &srisc_address); |
0107109e | 1468 | if (rval == QLA_SUCCESS) { |
7c3df132 SK |
1469 | ql_dbg(ql_dbg_init, vha, 0x00c9, |
1470 | "Verifying Checksum of loaded RISC code.\n"); | |
1da177e4 | 1471 | |
e315cd28 | 1472 | rval = qla2x00_verify_checksum(vha, srisc_address); |
1da177e4 LT |
1473 | if (rval == QLA_SUCCESS) { |
1474 | /* Start firmware execution. */ | |
7c3df132 SK |
1475 | ql_dbg(ql_dbg_init, vha, 0x00ca, |
1476 | "Starting firmware.\n"); | |
1da177e4 | 1477 | |
e315cd28 | 1478 | rval = qla2x00_execute_fw(vha, srisc_address); |
1da177e4 | 1479 | /* Retrieve firmware information. */ |
dda772e8 | 1480 | if (rval == QLA_SUCCESS) { |
a9083016 | 1481 | enable_82xx_npiv: |
dda772e8 | 1482 | fw_major_version = ha->fw_major_version; |
3173167f GM |
1483 | if (IS_QLA82XX(ha)) |
1484 | qla82xx_check_md_needed(vha); | |
1485 | else { | |
1486 | rval = qla2x00_get_fw_version(vha, | |
1487 | &ha->fw_major_version, | |
1488 | &ha->fw_minor_version, | |
1489 | &ha->fw_subminor_version, | |
1490 | &ha->fw_attributes, | |
1491 | &ha->fw_memory_size, | |
1492 | ha->mpi_version, | |
1493 | &ha->mpi_capabilities, | |
1494 | ha->phy_version); | |
1495 | } | |
ca9e9c3e AV |
1496 | if (rval != QLA_SUCCESS) |
1497 | goto failed; | |
2c3dfe3f | 1498 | ha->flags.npiv_supported = 0; |
e315cd28 | 1499 | if (IS_QLA2XXX_MIDTYPE(ha) && |
946fb891 | 1500 | (ha->fw_attributes & BIT_2)) { |
2c3dfe3f | 1501 | ha->flags.npiv_supported = 1; |
4d0ea247 SJ |
1502 | if ((!ha->max_npiv_vports) || |
1503 | ((ha->max_npiv_vports + 1) % | |
eb66dc60 | 1504 | MIN_MULTI_ID_FABRIC)) |
4d0ea247 | 1505 | ha->max_npiv_vports = |
eb66dc60 | 1506 | MIN_MULTI_ID_FABRIC - 1; |
4d0ea247 | 1507 | } |
24a08138 AV |
1508 | qla2x00_get_resource_cnts(vha, NULL, |
1509 | &ha->fw_xcb_count, NULL, NULL, | |
f3a0a77e | 1510 | &ha->max_npiv_vports, NULL); |
d743de66 | 1511 | |
be5ea3cf SK |
1512 | if (!fw_major_version && ql2xallocfwdump |
1513 | && !IS_QLA82XX(ha)) | |
08de2844 | 1514 | qla2x00_alloc_fw_dump(vha); |
1da177e4 LT |
1515 | } |
1516 | } else { | |
7c3df132 SK |
1517 | ql_log(ql_log_fatal, vha, 0x00cd, |
1518 | "ISP Firmware failed checksum.\n"); | |
1519 | goto failed; | |
1da177e4 LT |
1520 | } |
1521 | } | |
1522 | ||
3db0652e AV |
1523 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { |
1524 | /* Enable proper parity. */ | |
1525 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1526 | if (IS_QLA2300(ha)) | |
1527 | /* SRAM parity */ | |
1528 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); | |
1529 | else | |
1530 | /* SRAM, Instruction RAM and GP RAM parity */ | |
1531 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); | |
1532 | RD_REG_WORD(®->hccr); | |
1533 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1534 | } | |
1535 | ||
1d2874de JC |
1536 | if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { |
1537 | uint32_t size; | |
1538 | ||
1539 | rval = qla81xx_fac_get_sector_size(vha, &size); | |
1540 | if (rval == QLA_SUCCESS) { | |
1541 | ha->flags.fac_supported = 1; | |
1542 | ha->fdt_block_size = size << 2; | |
1543 | } else { | |
7c3df132 | 1544 | ql_log(ql_log_warn, vha, 0x00ce, |
1d2874de JC |
1545 | "Unsupported FAC firmware (%d.%02d.%02d).\n", |
1546 | ha->fw_major_version, ha->fw_minor_version, | |
1547 | ha->fw_subminor_version); | |
1548 | } | |
1549 | } | |
ca9e9c3e | 1550 | failed: |
1da177e4 | 1551 | if (rval) { |
7c3df132 SK |
1552 | ql_log(ql_log_fatal, vha, 0x00cf, |
1553 | "Setup chip ****FAILED****.\n"); | |
1da177e4 LT |
1554 | } |
1555 | ||
1556 | return (rval); | |
1557 | } | |
1558 | ||
1559 | /** | |
1560 | * qla2x00_init_response_q_entries() - Initializes response queue entries. | |
1561 | * @ha: HA context | |
1562 | * | |
1563 | * Beginning of request ring has initialization control block already built | |
1564 | * by nvram config routine. | |
1565 | * | |
1566 | * Returns 0 on success. | |
1567 | */ | |
73208dfd AC |
1568 | void |
1569 | qla2x00_init_response_q_entries(struct rsp_que *rsp) | |
1da177e4 LT |
1570 | { |
1571 | uint16_t cnt; | |
1572 | response_t *pkt; | |
1573 | ||
2afa19a9 AC |
1574 | rsp->ring_ptr = rsp->ring; |
1575 | rsp->ring_index = 0; | |
1576 | rsp->status_srb = NULL; | |
e315cd28 AC |
1577 | pkt = rsp->ring_ptr; |
1578 | for (cnt = 0; cnt < rsp->length; cnt++) { | |
1da177e4 LT |
1579 | pkt->signature = RESPONSE_PROCESSED; |
1580 | pkt++; | |
1581 | } | |
1da177e4 LT |
1582 | } |
1583 | ||
1584 | /** | |
1585 | * qla2x00_update_fw_options() - Read and process firmware options. | |
1586 | * @ha: HA context | |
1587 | * | |
1588 | * Returns 0 on success. | |
1589 | */ | |
abbd8870 | 1590 | void |
e315cd28 | 1591 | qla2x00_update_fw_options(scsi_qla_host_t *vha) |
1da177e4 LT |
1592 | { |
1593 | uint16_t swing, emphasis, tx_sens, rx_sens; | |
e315cd28 | 1594 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1595 | |
1596 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
e315cd28 | 1597 | qla2x00_get_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1598 | |
1599 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) | |
1600 | return; | |
1601 | ||
1602 | /* Serial Link options. */ | |
7c3df132 SK |
1603 | ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, |
1604 | "Serial link options.\n"); | |
1605 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, | |
1606 | (uint8_t *)&ha->fw_seriallink_options, | |
1607 | sizeof(ha->fw_seriallink_options)); | |
1da177e4 LT |
1608 | |
1609 | ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; | |
1610 | if (ha->fw_seriallink_options[3] & BIT_2) { | |
1611 | ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; | |
1612 | ||
1613 | /* 1G settings */ | |
1614 | swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); | |
1615 | emphasis = (ha->fw_seriallink_options[2] & | |
1616 | (BIT_4 | BIT_3)) >> 3; | |
1617 | tx_sens = ha->fw_seriallink_options[0] & | |
fa2a1ce5 | 1618 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1619 | rx_sens = (ha->fw_seriallink_options[0] & |
1620 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1621 | ha->fw_options[10] = (emphasis << 14) | (swing << 8); | |
1622 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1623 | if (rx_sens == 0x0) | |
1624 | rx_sens = 0x3; | |
1625 | ha->fw_options[10] |= (tx_sens << 4) | rx_sens; | |
1626 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1627 | ha->fw_options[10] |= BIT_5 | | |
1628 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1629 | (tx_sens & (BIT_1 | BIT_0)); | |
1630 | ||
1631 | /* 2G settings */ | |
1632 | swing = (ha->fw_seriallink_options[2] & | |
1633 | (BIT_7 | BIT_6 | BIT_5)) >> 5; | |
1634 | emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); | |
1635 | tx_sens = ha->fw_seriallink_options[1] & | |
fa2a1ce5 | 1636 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1637 | rx_sens = (ha->fw_seriallink_options[1] & |
1638 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1639 | ha->fw_options[11] = (emphasis << 14) | (swing << 8); | |
1640 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1641 | if (rx_sens == 0x0) | |
1642 | rx_sens = 0x3; | |
1643 | ha->fw_options[11] |= (tx_sens << 4) | rx_sens; | |
1644 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1645 | ha->fw_options[11] |= BIT_5 | | |
1646 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1647 | (tx_sens & (BIT_1 | BIT_0)); | |
1648 | } | |
1649 | ||
1650 | /* FCP2 options. */ | |
1651 | /* Return command IOCBs without waiting for an ABTS to complete. */ | |
1652 | ha->fw_options[3] |= BIT_13; | |
1653 | ||
1654 | /* LED scheme. */ | |
1655 | if (ha->flags.enable_led_scheme) | |
1656 | ha->fw_options[2] |= BIT_12; | |
1657 | ||
48c02fde AV |
1658 | /* Detect ISP6312. */ |
1659 | if (IS_QLA6312(ha)) | |
1660 | ha->fw_options[2] |= BIT_13; | |
1661 | ||
1da177e4 | 1662 | /* Update firmware options. */ |
e315cd28 | 1663 | qla2x00_set_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1664 | } |
1665 | ||
0107109e | 1666 | void |
e315cd28 | 1667 | qla24xx_update_fw_options(scsi_qla_host_t *vha) |
0107109e AV |
1668 | { |
1669 | int rval; | |
e315cd28 | 1670 | struct qla_hw_data *ha = vha->hw; |
0107109e | 1671 | |
a9083016 GM |
1672 | if (IS_QLA82XX(ha)) |
1673 | return; | |
1674 | ||
0107109e | 1675 | /* Update Serial Link options. */ |
f94097ed | 1676 | if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) |
0107109e AV |
1677 | return; |
1678 | ||
e315cd28 | 1679 | rval = qla2x00_set_serdes_params(vha, |
f94097ed AV |
1680 | le16_to_cpu(ha->fw_seriallink_options24[1]), |
1681 | le16_to_cpu(ha->fw_seriallink_options24[2]), | |
1682 | le16_to_cpu(ha->fw_seriallink_options24[3])); | |
0107109e | 1683 | if (rval != QLA_SUCCESS) { |
7c3df132 | 1684 | ql_log(ql_log_warn, vha, 0x0104, |
0107109e AV |
1685 | "Unable to update Serial Link options (%x).\n", rval); |
1686 | } | |
1687 | } | |
1688 | ||
abbd8870 | 1689 | void |
e315cd28 | 1690 | qla2x00_config_rings(struct scsi_qla_host *vha) |
abbd8870 | 1691 | { |
e315cd28 | 1692 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 1693 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
73208dfd AC |
1694 | struct req_que *req = ha->req_q_map[0]; |
1695 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
abbd8870 AV |
1696 | |
1697 | /* Setup ring parameters in initialization control block. */ | |
1698 | ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1699 | ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1700 | ha->init_cb->request_q_length = cpu_to_le16(req->length); |
1701 | ha->init_cb->response_q_length = cpu_to_le16(rsp->length); | |
1702 | ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1703 | ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1704 | ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1705 | ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
abbd8870 AV |
1706 | |
1707 | WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); | |
1708 | WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); | |
1709 | WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); | |
1710 | WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); | |
1711 | RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ | |
1712 | } | |
1713 | ||
0107109e | 1714 | void |
e315cd28 | 1715 | qla24xx_config_rings(struct scsi_qla_host *vha) |
0107109e | 1716 | { |
e315cd28 | 1717 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
1718 | device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0); |
1719 | struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; | |
1720 | struct qla_msix_entry *msix; | |
0107109e | 1721 | struct init_cb_24xx *icb; |
73208dfd AC |
1722 | uint16_t rid = 0; |
1723 | struct req_que *req = ha->req_q_map[0]; | |
1724 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
0107109e | 1725 | |
73208dfd | 1726 | /* Setup ring parameters in initialization control block. */ |
0107109e AV |
1727 | icb = (struct init_cb_24xx *)ha->init_cb; |
1728 | icb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1729 | icb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1730 | icb->request_q_length = cpu_to_le16(req->length); |
1731 | icb->response_q_length = cpu_to_le16(rsp->length); | |
1732 | icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1733 | icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1734 | icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1735 | icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
0107109e | 1736 | |
73208dfd AC |
1737 | if (ha->mqenable) { |
1738 | icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS); | |
1739 | icb->rid = __constant_cpu_to_le16(rid); | |
1740 | if (ha->flags.msix_enabled) { | |
1741 | msix = &ha->msix_entries[1]; | |
7c3df132 SK |
1742 | ql_dbg(ql_dbg_init, vha, 0x00fd, |
1743 | "Registering vector 0x%x for base que.\n", | |
1744 | msix->entry); | |
73208dfd AC |
1745 | icb->msix = cpu_to_le16(msix->entry); |
1746 | } | |
1747 | /* Use alternate PCI bus number */ | |
1748 | if (MSB(rid)) | |
1749 | icb->firmware_options_2 |= | |
1750 | __constant_cpu_to_le32(BIT_19); | |
1751 | /* Use alternate PCI devfn */ | |
1752 | if (LSB(rid)) | |
1753 | icb->firmware_options_2 |= | |
1754 | __constant_cpu_to_le32(BIT_18); | |
1755 | ||
3155754a AC |
1756 | /* Use Disable MSIX Handshake mode for capable adapters */ |
1757 | if (IS_MSIX_NACK_CAPABLE(ha)) { | |
1758 | icb->firmware_options_2 &= | |
1759 | __constant_cpu_to_le32(~BIT_22); | |
1760 | ha->flags.disable_msix_handshake = 1; | |
7c3df132 SK |
1761 | ql_dbg(ql_dbg_init, vha, 0x00fe, |
1762 | "MSIX Handshake Disable Mode turned on.\n"); | |
3155754a AC |
1763 | } else { |
1764 | icb->firmware_options_2 |= | |
1765 | __constant_cpu_to_le32(BIT_22); | |
1766 | } | |
73208dfd | 1767 | icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23); |
73208dfd AC |
1768 | |
1769 | WRT_REG_DWORD(®->isp25mq.req_q_in, 0); | |
1770 | WRT_REG_DWORD(®->isp25mq.req_q_out, 0); | |
1771 | WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); | |
1772 | WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); | |
1773 | } else { | |
1774 | WRT_REG_DWORD(®->isp24.req_q_in, 0); | |
1775 | WRT_REG_DWORD(®->isp24.req_q_out, 0); | |
1776 | WRT_REG_DWORD(®->isp24.rsp_q_in, 0); | |
1777 | WRT_REG_DWORD(®->isp24.rsp_q_out, 0); | |
1778 | } | |
1779 | /* PCI posting */ | |
1780 | RD_REG_DWORD(&ioreg->hccr); | |
0107109e AV |
1781 | } |
1782 | ||
1da177e4 LT |
1783 | /** |
1784 | * qla2x00_init_rings() - Initializes firmware. | |
1785 | * @ha: HA context | |
1786 | * | |
1787 | * Beginning of request ring has initialization control block already built | |
1788 | * by nvram config routine. | |
1789 | * | |
1790 | * Returns 0 on success. | |
1791 | */ | |
1792 | static int | |
e315cd28 | 1793 | qla2x00_init_rings(scsi_qla_host_t *vha) |
1da177e4 LT |
1794 | { |
1795 | int rval; | |
1796 | unsigned long flags = 0; | |
29bdccbe | 1797 | int cnt, que; |
e315cd28 | 1798 | struct qla_hw_data *ha = vha->hw; |
29bdccbe AC |
1799 | struct req_que *req; |
1800 | struct rsp_que *rsp; | |
1801 | struct scsi_qla_host *vp; | |
2c3dfe3f SJ |
1802 | struct mid_init_cb_24xx *mid_init_cb = |
1803 | (struct mid_init_cb_24xx *) ha->init_cb; | |
1da177e4 LT |
1804 | |
1805 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1806 | ||
1807 | /* Clear outstanding commands array. */ | |
2afa19a9 | 1808 | for (que = 0; que < ha->max_req_queues; que++) { |
29bdccbe AC |
1809 | req = ha->req_q_map[que]; |
1810 | if (!req) | |
1811 | continue; | |
2afa19a9 | 1812 | for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) |
29bdccbe | 1813 | req->outstanding_cmds[cnt] = NULL; |
1da177e4 | 1814 | |
2afa19a9 | 1815 | req->current_outstanding_cmd = 1; |
1da177e4 | 1816 | |
29bdccbe AC |
1817 | /* Initialize firmware. */ |
1818 | req->ring_ptr = req->ring; | |
1819 | req->ring_index = 0; | |
1820 | req->cnt = req->length; | |
1821 | } | |
1da177e4 | 1822 | |
2afa19a9 | 1823 | for (que = 0; que < ha->max_rsp_queues; que++) { |
29bdccbe AC |
1824 | rsp = ha->rsp_q_map[que]; |
1825 | if (!rsp) | |
1826 | continue; | |
29bdccbe AC |
1827 | /* Initialize response queue entries */ |
1828 | qla2x00_init_response_q_entries(rsp); | |
1829 | } | |
1da177e4 | 1830 | |
542bce1f | 1831 | spin_lock(&ha->vport_slock); |
29bdccbe AC |
1832 | /* Clear RSCN queue. */ |
1833 | list_for_each_entry(vp, &ha->vp_list, list) { | |
1834 | vp->rscn_in_ptr = 0; | |
1835 | vp->rscn_out_ptr = 0; | |
1836 | } | |
feafb7b1 | 1837 | |
542bce1f | 1838 | spin_unlock(&ha->vport_slock); |
feafb7b1 | 1839 | |
e315cd28 | 1840 | ha->isp_ops->config_rings(vha); |
1da177e4 LT |
1841 | |
1842 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1843 | ||
1844 | /* Update any ISP specific firmware options before initialization. */ | |
e315cd28 | 1845 | ha->isp_ops->update_fw_options(vha); |
1da177e4 | 1846 | |
7c3df132 | 1847 | ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); |
2c3dfe3f | 1848 | |
605aa2bc LC |
1849 | if (ha->flags.npiv_supported) { |
1850 | if (ha->operating_mode == LOOP) | |
1851 | ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; | |
c48339de | 1852 | mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); |
605aa2bc LC |
1853 | } |
1854 | ||
24a08138 AV |
1855 | if (IS_FWI2_CAPABLE(ha)) { |
1856 | mid_init_cb->options = __constant_cpu_to_le16(BIT_1); | |
1857 | mid_init_cb->init_cb.execution_throttle = | |
1858 | cpu_to_le16(ha->fw_xcb_count); | |
1859 | } | |
2c3dfe3f | 1860 | |
e315cd28 | 1861 | rval = qla2x00_init_firmware(vha, ha->init_cb_size); |
1da177e4 | 1862 | if (rval) { |
7c3df132 SK |
1863 | ql_log(ql_log_fatal, vha, 0x00d2, |
1864 | "Init Firmware **** FAILED ****.\n"); | |
1da177e4 | 1865 | } else { |
7c3df132 SK |
1866 | ql_dbg(ql_dbg_init, vha, 0x00d3, |
1867 | "Init Firmware -- success.\n"); | |
1da177e4 LT |
1868 | } |
1869 | ||
1870 | return (rval); | |
1871 | } | |
1872 | ||
1873 | /** | |
1874 | * qla2x00_fw_ready() - Waits for firmware ready. | |
1875 | * @ha: HA context | |
1876 | * | |
1877 | * Returns 0 on success. | |
1878 | */ | |
1879 | static int | |
e315cd28 | 1880 | qla2x00_fw_ready(scsi_qla_host_t *vha) |
1da177e4 LT |
1881 | { |
1882 | int rval; | |
4d4df193 | 1883 | unsigned long wtime, mtime, cs84xx_time; |
1da177e4 LT |
1884 | uint16_t min_wait; /* Minimum wait time if loop is down */ |
1885 | uint16_t wait_time; /* Wait time if loop is coming ready */ | |
656e8912 | 1886 | uint16_t state[5]; |
e315cd28 | 1887 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1888 | |
1889 | rval = QLA_SUCCESS; | |
1890 | ||
1891 | /* 20 seconds for loop down. */ | |
fa2a1ce5 | 1892 | min_wait = 20; |
1da177e4 LT |
1893 | |
1894 | /* | |
1895 | * Firmware should take at most one RATOV to login, plus 5 seconds for | |
1896 | * our own processing. | |
1897 | */ | |
1898 | if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { | |
1899 | wait_time = min_wait; | |
1900 | } | |
1901 | ||
1902 | /* Min wait time if loop down */ | |
1903 | mtime = jiffies + (min_wait * HZ); | |
1904 | ||
1905 | /* wait time before firmware ready */ | |
1906 | wtime = jiffies + (wait_time * HZ); | |
1907 | ||
1908 | /* Wait for ISP to finish LIP */ | |
e315cd28 | 1909 | if (!vha->flags.init_done) |
7c3df132 SK |
1910 | ql_log(ql_log_info, vha, 0x801e, |
1911 | "Waiting for LIP to complete.\n"); | |
1da177e4 LT |
1912 | |
1913 | do { | |
e315cd28 | 1914 | rval = qla2x00_get_firmware_state(vha, state); |
1da177e4 | 1915 | if (rval == QLA_SUCCESS) { |
4d4df193 | 1916 | if (state[0] < FSTATE_LOSS_OF_SYNC) { |
e315cd28 | 1917 | vha->device_flags &= ~DFLG_NO_CABLE; |
1da177e4 | 1918 | } |
4d4df193 | 1919 | if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { |
7c3df132 SK |
1920 | ql_dbg(ql_dbg_taskm, vha, 0x801f, |
1921 | "fw_state=%x 84xx=%x.\n", state[0], | |
1922 | state[2]); | |
4d4df193 HK |
1923 | if ((state[2] & FSTATE_LOGGED_IN) && |
1924 | (state[2] & FSTATE_WAITING_FOR_VERIFY)) { | |
7c3df132 SK |
1925 | ql_dbg(ql_dbg_taskm, vha, 0x8028, |
1926 | "Sending verify iocb.\n"); | |
4d4df193 HK |
1927 | |
1928 | cs84xx_time = jiffies; | |
e315cd28 | 1929 | rval = qla84xx_init_chip(vha); |
7c3df132 SK |
1930 | if (rval != QLA_SUCCESS) { |
1931 | ql_log(ql_log_warn, | |
08de2844 | 1932 | vha, 0x8026, |
7c3df132 | 1933 | "Init chip failed.\n"); |
4d4df193 | 1934 | break; |
7c3df132 | 1935 | } |
4d4df193 HK |
1936 | |
1937 | /* Add time taken to initialize. */ | |
1938 | cs84xx_time = jiffies - cs84xx_time; | |
1939 | wtime += cs84xx_time; | |
1940 | mtime += cs84xx_time; | |
08de2844 | 1941 | ql_dbg(ql_dbg_taskm, vha, 0x8025, |
7c3df132 SK |
1942 | "Increasing wait time by %ld. " |
1943 | "New time %ld.\n", cs84xx_time, | |
1944 | wtime); | |
4d4df193 HK |
1945 | } |
1946 | } else if (state[0] == FSTATE_READY) { | |
7c3df132 SK |
1947 | ql_dbg(ql_dbg_taskm, vha, 0x8037, |
1948 | "F/W Ready - OK.\n"); | |
1da177e4 | 1949 | |
e315cd28 | 1950 | qla2x00_get_retry_cnt(vha, &ha->retry_count, |
1da177e4 LT |
1951 | &ha->login_timeout, &ha->r_a_tov); |
1952 | ||
1953 | rval = QLA_SUCCESS; | |
1954 | break; | |
1955 | } | |
1956 | ||
1957 | rval = QLA_FUNCTION_FAILED; | |
1958 | ||
e315cd28 | 1959 | if (atomic_read(&vha->loop_down_timer) && |
4d4df193 | 1960 | state[0] != FSTATE_READY) { |
1da177e4 | 1961 | /* Loop down. Timeout on min_wait for states |
fa2a1ce5 AV |
1962 | * other than Wait for Login. |
1963 | */ | |
1da177e4 | 1964 | if (time_after_eq(jiffies, mtime)) { |
7c3df132 | 1965 | ql_log(ql_log_info, vha, 0x8038, |
1da177e4 LT |
1966 | "Cable is unplugged...\n"); |
1967 | ||
e315cd28 | 1968 | vha->device_flags |= DFLG_NO_CABLE; |
1da177e4 LT |
1969 | break; |
1970 | } | |
1971 | } | |
1972 | } else { | |
1973 | /* Mailbox cmd failed. Timeout on min_wait. */ | |
cdbb0a4f | 1974 | if (time_after_eq(jiffies, mtime) || |
7190575f | 1975 | ha->flags.isp82xx_fw_hung) |
1da177e4 LT |
1976 | break; |
1977 | } | |
1978 | ||
1979 | if (time_after_eq(jiffies, wtime)) | |
1980 | break; | |
1981 | ||
1982 | /* Delay for a while */ | |
1983 | msleep(500); | |
1984 | ||
7c3df132 SK |
1985 | ql_dbg(ql_dbg_taskm, vha, 0x8039, |
1986 | "fw_state=%x curr time=%lx.\n", state[0], jiffies); | |
1da177e4 LT |
1987 | } while (1); |
1988 | ||
7c3df132 SK |
1989 | ql_dbg(ql_dbg_taskm, vha, 0x803a, |
1990 | "fw_state=%x (%x, %x, %x, %x) " "curr time=%lx.\n", state[0], | |
1991 | state[1], state[2], state[3], state[4], jiffies); | |
1da177e4 LT |
1992 | |
1993 | if (rval) { | |
7c3df132 SK |
1994 | ql_log(ql_log_warn, vha, 0x803b, |
1995 | "Firmware ready **** FAILED ****.\n"); | |
1da177e4 LT |
1996 | } |
1997 | ||
1998 | return (rval); | |
1999 | } | |
2000 | ||
2001 | /* | |
2002 | * qla2x00_configure_hba | |
2003 | * Setup adapter context. | |
2004 | * | |
2005 | * Input: | |
2006 | * ha = adapter state pointer. | |
2007 | * | |
2008 | * Returns: | |
2009 | * 0 = success | |
2010 | * | |
2011 | * Context: | |
2012 | * Kernel context. | |
2013 | */ | |
2014 | static int | |
e315cd28 | 2015 | qla2x00_configure_hba(scsi_qla_host_t *vha) |
1da177e4 LT |
2016 | { |
2017 | int rval; | |
2018 | uint16_t loop_id; | |
2019 | uint16_t topo; | |
2c3dfe3f | 2020 | uint16_t sw_cap; |
1da177e4 LT |
2021 | uint8_t al_pa; |
2022 | uint8_t area; | |
2023 | uint8_t domain; | |
2024 | char connect_type[22]; | |
e315cd28 | 2025 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2026 | |
2027 | /* Get host addresses. */ | |
e315cd28 | 2028 | rval = qla2x00_get_adapter_id(vha, |
2c3dfe3f | 2029 | &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); |
1da177e4 | 2030 | if (rval != QLA_SUCCESS) { |
e315cd28 | 2031 | if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || |
7a44b86e | 2032 | IS_QLA8XXX_TYPE(ha) || |
33135aa2 | 2033 | (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { |
7c3df132 SK |
2034 | ql_dbg(ql_dbg_disc, vha, 0x2008, |
2035 | "Loop is in a transition state.\n"); | |
33135aa2 | 2036 | } else { |
7c3df132 SK |
2037 | ql_log(ql_log_warn, vha, 0x2009, |
2038 | "Unable to get host loop ID.\n"); | |
e315cd28 | 2039 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
33135aa2 | 2040 | } |
1da177e4 LT |
2041 | return (rval); |
2042 | } | |
2043 | ||
2044 | if (topo == 4) { | |
7c3df132 SK |
2045 | ql_log(ql_log_info, vha, 0x200a, |
2046 | "Cannot get topology - retrying.\n"); | |
1da177e4 LT |
2047 | return (QLA_FUNCTION_FAILED); |
2048 | } | |
2049 | ||
e315cd28 | 2050 | vha->loop_id = loop_id; |
1da177e4 LT |
2051 | |
2052 | /* initialize */ | |
2053 | ha->min_external_loopid = SNS_FIRST_LOOP_ID; | |
2054 | ha->operating_mode = LOOP; | |
2c3dfe3f | 2055 | ha->switch_cap = 0; |
1da177e4 LT |
2056 | |
2057 | switch (topo) { | |
2058 | case 0: | |
7c3df132 | 2059 | ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); |
1da177e4 LT |
2060 | ha->current_topology = ISP_CFG_NL; |
2061 | strcpy(connect_type, "(Loop)"); | |
2062 | break; | |
2063 | ||
2064 | case 1: | |
7c3df132 | 2065 | ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); |
2c3dfe3f | 2066 | ha->switch_cap = sw_cap; |
1da177e4 LT |
2067 | ha->current_topology = ISP_CFG_FL; |
2068 | strcpy(connect_type, "(FL_Port)"); | |
2069 | break; | |
2070 | ||
2071 | case 2: | |
7c3df132 | 2072 | ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); |
1da177e4 LT |
2073 | ha->operating_mode = P2P; |
2074 | ha->current_topology = ISP_CFG_N; | |
2075 | strcpy(connect_type, "(N_Port-to-N_Port)"); | |
2076 | break; | |
2077 | ||
2078 | case 3: | |
7c3df132 | 2079 | ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); |
2c3dfe3f | 2080 | ha->switch_cap = sw_cap; |
1da177e4 LT |
2081 | ha->operating_mode = P2P; |
2082 | ha->current_topology = ISP_CFG_F; | |
2083 | strcpy(connect_type, "(F_Port)"); | |
2084 | break; | |
2085 | ||
2086 | default: | |
7c3df132 SK |
2087 | ql_dbg(ql_dbg_disc, vha, 0x200f, |
2088 | "HBA in unknown topology %x, using NL.\n", topo); | |
1da177e4 LT |
2089 | ha->current_topology = ISP_CFG_NL; |
2090 | strcpy(connect_type, "(Loop)"); | |
2091 | break; | |
2092 | } | |
2093 | ||
2094 | /* Save Host port and loop ID. */ | |
2095 | /* byte order - Big Endian */ | |
e315cd28 AC |
2096 | vha->d_id.b.domain = domain; |
2097 | vha->d_id.b.area = area; | |
2098 | vha->d_id.b.al_pa = al_pa; | |
1da177e4 | 2099 | |
e315cd28 | 2100 | if (!vha->flags.init_done) |
7c3df132 SK |
2101 | ql_log(ql_log_info, vha, 0x2010, |
2102 | "Topology - %s, Host Loop address 0x%x.\n", | |
e315cd28 | 2103 | connect_type, vha->loop_id); |
1da177e4 LT |
2104 | |
2105 | if (rval) { | |
7c3df132 SK |
2106 | ql_log(ql_log_warn, vha, 0x2011, |
2107 | "%s FAILED\n", __func__); | |
1da177e4 | 2108 | } else { |
7c3df132 SK |
2109 | ql_dbg(ql_dbg_disc, vha, 0x2012, |
2110 | "%s success\n", __func__); | |
1da177e4 LT |
2111 | } |
2112 | ||
2113 | return(rval); | |
2114 | } | |
2115 | ||
a9083016 | 2116 | inline void |
e315cd28 AC |
2117 | qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, |
2118 | char *def) | |
9bb9fcf2 AV |
2119 | { |
2120 | char *st, *en; | |
2121 | uint16_t index; | |
e315cd28 | 2122 | struct qla_hw_data *ha = vha->hw; |
ab671149 | 2123 | int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && |
a9083016 | 2124 | !IS_QLA8XXX_TYPE(ha); |
9bb9fcf2 AV |
2125 | |
2126 | if (memcmp(model, BINZERO, len) != 0) { | |
2127 | strncpy(ha->model_number, model, len); | |
2128 | st = en = ha->model_number; | |
2129 | en += len - 1; | |
2130 | while (en > st) { | |
2131 | if (*en != 0x20 && *en != 0x00) | |
2132 | break; | |
2133 | *en-- = '\0'; | |
2134 | } | |
2135 | ||
2136 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
2137 | if (use_tbl && |
2138 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 | 2139 | index < QLA_MODEL_NAMES) |
1ee27146 JC |
2140 | strncpy(ha->model_desc, |
2141 | qla2x00_model_name[index * 2 + 1], | |
2142 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
2143 | } else { |
2144 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
2145 | if (use_tbl && |
2146 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 AV |
2147 | index < QLA_MODEL_NAMES) { |
2148 | strcpy(ha->model_number, | |
2149 | qla2x00_model_name[index * 2]); | |
1ee27146 JC |
2150 | strncpy(ha->model_desc, |
2151 | qla2x00_model_name[index * 2 + 1], | |
2152 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
2153 | } else { |
2154 | strcpy(ha->model_number, def); | |
2155 | } | |
2156 | } | |
1ee27146 | 2157 | if (IS_FWI2_CAPABLE(ha)) |
e315cd28 | 2158 | qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, |
1ee27146 | 2159 | sizeof(ha->model_desc)); |
9bb9fcf2 AV |
2160 | } |
2161 | ||
4e08df3f DM |
2162 | /* On sparc systems, obtain port and node WWN from firmware |
2163 | * properties. | |
2164 | */ | |
e315cd28 | 2165 | static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) |
4e08df3f DM |
2166 | { |
2167 | #ifdef CONFIG_SPARC | |
e315cd28 | 2168 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 2169 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
2170 | struct device_node *dp = pci_device_to_OF_node(pdev); |
2171 | const u8 *val; | |
4e08df3f DM |
2172 | int len; |
2173 | ||
2174 | val = of_get_property(dp, "port-wwn", &len); | |
2175 | if (val && len >= WWN_SIZE) | |
2176 | memcpy(nv->port_name, val, WWN_SIZE); | |
2177 | ||
2178 | val = of_get_property(dp, "node-wwn", &len); | |
2179 | if (val && len >= WWN_SIZE) | |
2180 | memcpy(nv->node_name, val, WWN_SIZE); | |
2181 | #endif | |
2182 | } | |
2183 | ||
1da177e4 LT |
2184 | /* |
2185 | * NVRAM configuration for ISP 2xxx | |
2186 | * | |
2187 | * Input: | |
2188 | * ha = adapter block pointer. | |
2189 | * | |
2190 | * Output: | |
2191 | * initialization control block in response_ring | |
2192 | * host adapters parameters in host adapter block | |
2193 | * | |
2194 | * Returns: | |
2195 | * 0 = success. | |
2196 | */ | |
abbd8870 | 2197 | int |
e315cd28 | 2198 | qla2x00_nvram_config(scsi_qla_host_t *vha) |
1da177e4 | 2199 | { |
4e08df3f | 2200 | int rval; |
0107109e AV |
2201 | uint8_t chksum = 0; |
2202 | uint16_t cnt; | |
2203 | uint8_t *dptr1, *dptr2; | |
e315cd28 | 2204 | struct qla_hw_data *ha = vha->hw; |
0107109e | 2205 | init_cb_t *icb = ha->init_cb; |
281afe19 SJ |
2206 | nvram_t *nv = ha->nvram; |
2207 | uint8_t *ptr = ha->nvram; | |
3d71644c | 2208 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 2209 | |
4e08df3f DM |
2210 | rval = QLA_SUCCESS; |
2211 | ||
1da177e4 | 2212 | /* Determine NVRAM starting address. */ |
0107109e | 2213 | ha->nvram_size = sizeof(nvram_t); |
1da177e4 LT |
2214 | ha->nvram_base = 0; |
2215 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) | |
2216 | if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) | |
2217 | ha->nvram_base = 0x80; | |
2218 | ||
2219 | /* Get NVRAM data and calculate checksum. */ | |
e315cd28 | 2220 | ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); |
0107109e AV |
2221 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) |
2222 | chksum += *ptr++; | |
1da177e4 | 2223 | |
7c3df132 SK |
2224 | ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, |
2225 | "Contents of NVRAM.\n"); | |
2226 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, | |
2227 | (uint8_t *)nv, ha->nvram_size); | |
1da177e4 LT |
2228 | |
2229 | /* Bad NVRAM data, set defaults parameters. */ | |
2230 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || | |
2231 | nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { | |
2232 | /* Reset NVRAM data. */ | |
7c3df132 SK |
2233 | ql_log(ql_log_warn, vha, 0x0064, |
2234 | "Inconisistent NVRAM " | |
2235 | "detected: checksum=0x%x id=%c version=0x%x.\n", | |
2236 | chksum, nv->id[0], nv->nvram_version); | |
2237 | ql_log(ql_log_warn, vha, 0x0065, | |
2238 | "Falling back to " | |
2239 | "functioning (yet invalid -- WWPN) defaults.\n"); | |
4e08df3f DM |
2240 | |
2241 | /* | |
2242 | * Set default initialization control block. | |
2243 | */ | |
2244 | memset(nv, 0, ha->nvram_size); | |
2245 | nv->parameter_block_version = ICB_VERSION; | |
2246 | ||
2247 | if (IS_QLA23XX(ha)) { | |
2248 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
2249 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
2250 | nv->add_firmware_options[0] = BIT_5; | |
2251 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
2252 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
2253 | nv->special_options[1] = BIT_7; | |
2254 | } else if (IS_QLA2200(ha)) { | |
2255 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
2256 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
2257 | nv->add_firmware_options[0] = BIT_5; | |
2258 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
2259 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
2260 | } else if (IS_QLA2100(ha)) { | |
2261 | nv->firmware_options[0] = BIT_3 | BIT_1; | |
2262 | nv->firmware_options[1] = BIT_5; | |
2263 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
2264 | } | |
2265 | ||
2266 | nv->max_iocb_allocation = __constant_cpu_to_le16(256); | |
2267 | nv->execution_throttle = __constant_cpu_to_le16(16); | |
2268 | nv->retry_count = 8; | |
2269 | nv->retry_delay = 1; | |
2270 | ||
2271 | nv->port_name[0] = 33; | |
2272 | nv->port_name[3] = 224; | |
2273 | nv->port_name[4] = 139; | |
2274 | ||
e315cd28 | 2275 | qla2xxx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
2276 | |
2277 | nv->login_timeout = 4; | |
2278 | ||
2279 | /* | |
2280 | * Set default host adapter parameters | |
2281 | */ | |
2282 | nv->host_p[1] = BIT_2; | |
2283 | nv->reset_delay = 5; | |
2284 | nv->port_down_retry_count = 8; | |
2285 | nv->max_luns_per_target = __constant_cpu_to_le16(8); | |
2286 | nv->link_down_timeout = 60; | |
2287 | ||
2288 | rval = 1; | |
1da177e4 LT |
2289 | } |
2290 | ||
2291 | #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) | |
2292 | /* | |
2293 | * The SN2 does not provide BIOS emulation which means you can't change | |
2294 | * potentially bogus BIOS settings. Force the use of default settings | |
2295 | * for link rate and frame size. Hope that the rest of the settings | |
2296 | * are valid. | |
2297 | */ | |
2298 | if (ia64_platform_is("sn2")) { | |
2299 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
2300 | if (IS_QLA23XX(ha)) | |
2301 | nv->special_options[1] = BIT_7; | |
2302 | } | |
2303 | #endif | |
2304 | ||
2305 | /* Reset Initialization control block */ | |
0107109e | 2306 | memset(icb, 0, ha->init_cb_size); |
1da177e4 LT |
2307 | |
2308 | /* | |
2309 | * Setup driver NVRAM options. | |
2310 | */ | |
2311 | nv->firmware_options[0] |= (BIT_6 | BIT_1); | |
2312 | nv->firmware_options[0] &= ~(BIT_5 | BIT_4); | |
2313 | nv->firmware_options[1] |= (BIT_5 | BIT_0); | |
2314 | nv->firmware_options[1] &= ~BIT_4; | |
2315 | ||
2316 | if (IS_QLA23XX(ha)) { | |
2317 | nv->firmware_options[0] |= BIT_2; | |
2318 | nv->firmware_options[0] &= ~BIT_3; | |
5ff1d584 | 2319 | nv->firmware_options[0] &= ~BIT_6; |
0107109e | 2320 | nv->add_firmware_options[1] |= BIT_5 | BIT_4; |
1da177e4 LT |
2321 | |
2322 | if (IS_QLA2300(ha)) { | |
2323 | if (ha->fb_rev == FPM_2310) { | |
2324 | strcpy(ha->model_number, "QLA2310"); | |
2325 | } else { | |
2326 | strcpy(ha->model_number, "QLA2300"); | |
2327 | } | |
2328 | } else { | |
e315cd28 | 2329 | qla2x00_set_model_info(vha, nv->model_number, |
9bb9fcf2 | 2330 | sizeof(nv->model_number), "QLA23xx"); |
1da177e4 LT |
2331 | } |
2332 | } else if (IS_QLA2200(ha)) { | |
2333 | nv->firmware_options[0] |= BIT_2; | |
2334 | /* | |
2335 | * 'Point-to-point preferred, else loop' is not a safe | |
2336 | * connection mode setting. | |
2337 | */ | |
2338 | if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == | |
2339 | (BIT_5 | BIT_4)) { | |
2340 | /* Force 'loop preferred, else point-to-point'. */ | |
2341 | nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); | |
2342 | nv->add_firmware_options[0] |= BIT_5; | |
2343 | } | |
2344 | strcpy(ha->model_number, "QLA22xx"); | |
2345 | } else /*if (IS_QLA2100(ha))*/ { | |
2346 | strcpy(ha->model_number, "QLA2100"); | |
2347 | } | |
2348 | ||
2349 | /* | |
2350 | * Copy over NVRAM RISC parameter block to initialization control block. | |
2351 | */ | |
2352 | dptr1 = (uint8_t *)icb; | |
2353 | dptr2 = (uint8_t *)&nv->parameter_block_version; | |
2354 | cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; | |
2355 | while (cnt--) | |
2356 | *dptr1++ = *dptr2++; | |
2357 | ||
2358 | /* Copy 2nd half. */ | |
2359 | dptr1 = (uint8_t *)icb->add_firmware_options; | |
2360 | cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; | |
2361 | while (cnt--) | |
2362 | *dptr1++ = *dptr2++; | |
2363 | ||
5341e868 AV |
2364 | /* Use alternate WWN? */ |
2365 | if (nv->host_p[1] & BIT_7) { | |
2366 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
2367 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
2368 | } | |
2369 | ||
1da177e4 LT |
2370 | /* Prepare nodename */ |
2371 | if ((icb->firmware_options[1] & BIT_6) == 0) { | |
2372 | /* | |
2373 | * Firmware will apply the following mask if the nodename was | |
2374 | * not provided. | |
2375 | */ | |
2376 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
2377 | icb->node_name[0] &= 0xF0; | |
2378 | } | |
2379 | ||
2380 | /* | |
2381 | * Set host adapter parameters. | |
2382 | */ | |
3ce8866c SK |
2383 | |
2384 | /* | |
2385 | * BIT_7 in the host-parameters section allows for modification to | |
2386 | * internal driver logging. | |
2387 | */ | |
0181944f | 2388 | if (nv->host_p[0] & BIT_7) |
3ce8866c | 2389 | ql2xextended_error_logging = 0x7fffffff; |
1da177e4 LT |
2390 | ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); |
2391 | /* Always load RISC code on non ISP2[12]00 chips. */ | |
2392 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) | |
2393 | ha->flags.disable_risc_code_load = 0; | |
2394 | ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); | |
2395 | ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); | |
2396 | ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); | |
06c22bd1 | 2397 | ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; |
d4c760c2 | 2398 | ha->flags.disable_serdes = 0; |
1da177e4 LT |
2399 | |
2400 | ha->operating_mode = | |
2401 | (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
2402 | ||
2403 | memcpy(ha->fw_seriallink_options, nv->seriallink_options, | |
2404 | sizeof(ha->fw_seriallink_options)); | |
2405 | ||
2406 | /* save HBA serial number */ | |
2407 | ha->serial0 = icb->port_name[5]; | |
2408 | ha->serial1 = icb->port_name[6]; | |
2409 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
2410 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
2411 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
1da177e4 LT |
2412 | |
2413 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
2414 | ||
2415 | ha->retry_count = nv->retry_count; | |
2416 | ||
2417 | /* Set minimum login_timeout to 4 seconds. */ | |
5b91490e | 2418 | if (nv->login_timeout != ql2xlogintimeout) |
1da177e4 LT |
2419 | nv->login_timeout = ql2xlogintimeout; |
2420 | if (nv->login_timeout < 4) | |
2421 | nv->login_timeout = 4; | |
2422 | ha->login_timeout = nv->login_timeout; | |
2423 | icb->login_timeout = nv->login_timeout; | |
2424 | ||
00a537b8 AV |
2425 | /* Set minimum RATOV to 100 tenths of a second. */ |
2426 | ha->r_a_tov = 100; | |
1da177e4 | 2427 | |
1da177e4 LT |
2428 | ha->loop_reset_delay = nv->reset_delay; |
2429 | ||
1da177e4 LT |
2430 | /* Link Down Timeout = 0: |
2431 | * | |
2432 | * When Port Down timer expires we will start returning | |
2433 | * I/O's to OS with "DID_NO_CONNECT". | |
2434 | * | |
2435 | * Link Down Timeout != 0: | |
2436 | * | |
2437 | * The driver waits for the link to come up after link down | |
2438 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
fa2a1ce5 | 2439 | */ |
1da177e4 LT |
2440 | if (nv->link_down_timeout == 0) { |
2441 | ha->loop_down_abort_time = | |
354d6b21 | 2442 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); |
1da177e4 LT |
2443 | } else { |
2444 | ha->link_down_timeout = nv->link_down_timeout; | |
2445 | ha->loop_down_abort_time = | |
2446 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
fa2a1ce5 | 2447 | } |
1da177e4 | 2448 | |
1da177e4 LT |
2449 | /* |
2450 | * Need enough time to try and get the port back. | |
2451 | */ | |
2452 | ha->port_down_retry_count = nv->port_down_retry_count; | |
2453 | if (qlport_down_retry) | |
2454 | ha->port_down_retry_count = qlport_down_retry; | |
2455 | /* Set login_retry_count */ | |
2456 | ha->login_retry_count = nv->retry_count; | |
2457 | if (ha->port_down_retry_count == nv->port_down_retry_count && | |
2458 | ha->port_down_retry_count > 3) | |
2459 | ha->login_retry_count = ha->port_down_retry_count; | |
2460 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
2461 | ha->login_retry_count = ha->port_down_retry_count; | |
2462 | if (ql2xloginretrycount) | |
2463 | ha->login_retry_count = ql2xloginretrycount; | |
2464 | ||
1da177e4 LT |
2465 | icb->lun_enables = __constant_cpu_to_le16(0); |
2466 | icb->command_resource_count = 0; | |
2467 | icb->immediate_notify_resource_count = 0; | |
2468 | icb->timeout = __constant_cpu_to_le16(0); | |
2469 | ||
2470 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { | |
2471 | /* Enable RIO */ | |
2472 | icb->firmware_options[0] &= ~BIT_3; | |
2473 | icb->add_firmware_options[0] &= | |
2474 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
2475 | icb->add_firmware_options[0] |= BIT_2; | |
2476 | icb->response_accumulation_timer = 3; | |
2477 | icb->interrupt_delay_timer = 5; | |
2478 | ||
e315cd28 | 2479 | vha->flags.process_response_queue = 1; |
1da177e4 | 2480 | } else { |
4fdfefe5 | 2481 | /* Enable ZIO. */ |
e315cd28 | 2482 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
2483 | ha->zio_mode = icb->add_firmware_options[0] & |
2484 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
2485 | ha->zio_timer = icb->interrupt_delay_timer ? | |
2486 | icb->interrupt_delay_timer: 2; | |
2487 | } | |
1da177e4 LT |
2488 | icb->add_firmware_options[0] &= |
2489 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
e315cd28 | 2490 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 2491 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d AV |
2492 | ha->zio_mode = QLA_ZIO_MODE_6; |
2493 | ||
7c3df132 | 2494 | ql_log(ql_log_info, vha, 0x0068, |
4fdfefe5 AV |
2495 | "ZIO mode %d enabled; timer delay (%d us).\n", |
2496 | ha->zio_mode, ha->zio_timer * 100); | |
1da177e4 | 2497 | |
4fdfefe5 AV |
2498 | icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; |
2499 | icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; | |
e315cd28 | 2500 | vha->flags.process_response_queue = 1; |
1da177e4 LT |
2501 | } |
2502 | } | |
2503 | ||
4e08df3f | 2504 | if (rval) { |
7c3df132 SK |
2505 | ql_log(ql_log_warn, vha, 0x0069, |
2506 | "NVRAM configuration failed.\n"); | |
4e08df3f DM |
2507 | } |
2508 | return (rval); | |
1da177e4 LT |
2509 | } |
2510 | ||
19a7b4ae JSEC |
2511 | static void |
2512 | qla2x00_rport_del(void *data) | |
2513 | { | |
2514 | fc_port_t *fcport = data; | |
d97994dc | 2515 | struct fc_rport *rport; |
044d78e1 | 2516 | unsigned long flags; |
d97994dc | 2517 | |
044d78e1 | 2518 | spin_lock_irqsave(fcport->vha->host->host_lock, flags); |
ac280b67 | 2519 | rport = fcport->drport ? fcport->drport: fcport->rport; |
d97994dc | 2520 | fcport->drport = NULL; |
044d78e1 | 2521 | spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); |
d97994dc AV |
2522 | if (rport) |
2523 | fc_remote_port_delete(rport); | |
19a7b4ae JSEC |
2524 | } |
2525 | ||
1da177e4 LT |
2526 | /** |
2527 | * qla2x00_alloc_fcport() - Allocate a generic fcport. | |
2528 | * @ha: HA context | |
2529 | * @flags: allocation flags | |
2530 | * | |
2531 | * Returns a pointer to the allocated fcport, or NULL, if none available. | |
2532 | */ | |
9a069e19 | 2533 | fc_port_t * |
e315cd28 | 2534 | qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) |
1da177e4 LT |
2535 | { |
2536 | fc_port_t *fcport; | |
2537 | ||
bbfbbbc1 MK |
2538 | fcport = kzalloc(sizeof(fc_port_t), flags); |
2539 | if (!fcport) | |
2540 | return NULL; | |
1da177e4 LT |
2541 | |
2542 | /* Setup fcport template structure. */ | |
e315cd28 AC |
2543 | fcport->vha = vha; |
2544 | fcport->vp_idx = vha->vp_idx; | |
1da177e4 LT |
2545 | fcport->port_type = FCT_UNKNOWN; |
2546 | fcport->loop_id = FC_NO_LOOP_ID; | |
ec426e10 | 2547 | qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); |
ad3e0eda | 2548 | fcport->supported_classes = FC_COS_UNSPECIFIED; |
1da177e4 | 2549 | |
bbfbbbc1 | 2550 | return fcport; |
1da177e4 LT |
2551 | } |
2552 | ||
2553 | /* | |
2554 | * qla2x00_configure_loop | |
2555 | * Updates Fibre Channel Device Database with what is actually on loop. | |
2556 | * | |
2557 | * Input: | |
2558 | * ha = adapter block pointer. | |
2559 | * | |
2560 | * Returns: | |
2561 | * 0 = success. | |
2562 | * 1 = error. | |
2563 | * 2 = database was full and device was not configured. | |
2564 | */ | |
2565 | static int | |
e315cd28 | 2566 | qla2x00_configure_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
2567 | { |
2568 | int rval; | |
2569 | unsigned long flags, save_flags; | |
e315cd28 | 2570 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2571 | rval = QLA_SUCCESS; |
2572 | ||
2573 | /* Get Initiator ID */ | |
e315cd28 AC |
2574 | if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { |
2575 | rval = qla2x00_configure_hba(vha); | |
1da177e4 | 2576 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
2577 | ql_dbg(ql_dbg_disc, vha, 0x2013, |
2578 | "Unable to configure HBA.\n"); | |
1da177e4 LT |
2579 | return (rval); |
2580 | } | |
2581 | } | |
2582 | ||
e315cd28 | 2583 | save_flags = flags = vha->dpc_flags; |
7c3df132 SK |
2584 | ql_dbg(ql_dbg_disc, vha, 0x2014, |
2585 | "Configure loop -- dpc flags = 0x%lx.\n", flags); | |
1da177e4 LT |
2586 | |
2587 | /* | |
2588 | * If we have both an RSCN and PORT UPDATE pending then handle them | |
2589 | * both at the same time. | |
2590 | */ | |
e315cd28 AC |
2591 | clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
2592 | clear_bit(RSCN_UPDATE, &vha->dpc_flags); | |
1da177e4 | 2593 | |
3064ff39 MH |
2594 | qla2x00_get_data_rate(vha); |
2595 | ||
1da177e4 LT |
2596 | /* Determine what we need to do */ |
2597 | if (ha->current_topology == ISP_CFG_FL && | |
2598 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2599 | ||
e315cd28 | 2600 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2601 | set_bit(RSCN_UPDATE, &flags); |
2602 | ||
2603 | } else if (ha->current_topology == ISP_CFG_F && | |
2604 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2605 | ||
e315cd28 | 2606 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2607 | set_bit(RSCN_UPDATE, &flags); |
2608 | clear_bit(LOCAL_LOOP_UPDATE, &flags); | |
21333b48 AV |
2609 | |
2610 | } else if (ha->current_topology == ISP_CFG_N) { | |
2611 | clear_bit(RSCN_UPDATE, &flags); | |
1da177e4 | 2612 | |
e315cd28 | 2613 | } else if (!vha->flags.online || |
1da177e4 LT |
2614 | (test_bit(ABORT_ISP_ACTIVE, &flags))) { |
2615 | ||
e315cd28 | 2616 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2617 | set_bit(RSCN_UPDATE, &flags); |
2618 | set_bit(LOCAL_LOOP_UPDATE, &flags); | |
2619 | } | |
2620 | ||
2621 | if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { | |
7c3df132 SK |
2622 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { |
2623 | ql_dbg(ql_dbg_disc, vha, 0x2015, | |
2624 | "Loop resync needed, failing.\n"); | |
1da177e4 | 2625 | rval = QLA_FUNCTION_FAILED; |
7c3df132 | 2626 | } |
e315cd28 AC |
2627 | else |
2628 | rval = qla2x00_configure_local_loop(vha); | |
1da177e4 LT |
2629 | } |
2630 | ||
2631 | if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { | |
7c3df132 SK |
2632 | if (LOOP_TRANSITION(vha)) { |
2633 | ql_dbg(ql_dbg_disc, vha, 0x201e, | |
2634 | "Needs RSCN update and loop transition.\n"); | |
1da177e4 | 2635 | rval = QLA_FUNCTION_FAILED; |
7c3df132 | 2636 | } |
e315cd28 AC |
2637 | else |
2638 | rval = qla2x00_configure_fabric(vha); | |
1da177e4 LT |
2639 | } |
2640 | ||
2641 | if (rval == QLA_SUCCESS) { | |
e315cd28 AC |
2642 | if (atomic_read(&vha->loop_down_timer) || |
2643 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { | |
1da177e4 LT |
2644 | rval = QLA_FUNCTION_FAILED; |
2645 | } else { | |
e315cd28 | 2646 | atomic_set(&vha->loop_state, LOOP_READY); |
7c3df132 SK |
2647 | ql_dbg(ql_dbg_disc, vha, 0x2069, |
2648 | "LOOP READY.\n"); | |
1da177e4 LT |
2649 | } |
2650 | } | |
2651 | ||
2652 | if (rval) { | |
7c3df132 SK |
2653 | ql_dbg(ql_dbg_disc, vha, 0x206a, |
2654 | "%s *** FAILED ***.\n", __func__); | |
1da177e4 | 2655 | } else { |
7c3df132 SK |
2656 | ql_dbg(ql_dbg_disc, vha, 0x206b, |
2657 | "%s: exiting normally.\n", __func__); | |
1da177e4 LT |
2658 | } |
2659 | ||
cc3ef7bc | 2660 | /* Restore state if a resync event occurred during processing */ |
e315cd28 | 2661 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { |
1da177e4 | 2662 | if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) |
e315cd28 | 2663 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
f4658b6c | 2664 | if (test_bit(RSCN_UPDATE, &save_flags)) { |
e315cd28 | 2665 | set_bit(RSCN_UPDATE, &vha->dpc_flags); |
3a6478df GM |
2666 | if (!IS_ALOGIO_CAPABLE(ha)) |
2667 | vha->flags.rscn_queue_overflow = 1; | |
f4658b6c | 2668 | } |
1da177e4 LT |
2669 | } |
2670 | ||
2671 | return (rval); | |
2672 | } | |
2673 | ||
2674 | ||
2675 | ||
2676 | /* | |
2677 | * qla2x00_configure_local_loop | |
2678 | * Updates Fibre Channel Device Database with local loop devices. | |
2679 | * | |
2680 | * Input: | |
2681 | * ha = adapter block pointer. | |
2682 | * | |
2683 | * Returns: | |
2684 | * 0 = success. | |
2685 | */ | |
2686 | static int | |
e315cd28 | 2687 | qla2x00_configure_local_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
2688 | { |
2689 | int rval, rval2; | |
2690 | int found_devs; | |
2691 | int found; | |
2692 | fc_port_t *fcport, *new_fcport; | |
2693 | ||
2694 | uint16_t index; | |
2695 | uint16_t entries; | |
2696 | char *id_iter; | |
2697 | uint16_t loop_id; | |
2698 | uint8_t domain, area, al_pa; | |
e315cd28 | 2699 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2700 | |
2701 | found_devs = 0; | |
2702 | new_fcport = NULL; | |
2703 | entries = MAX_FIBRE_DEVICES; | |
2704 | ||
7c3df132 SK |
2705 | ql_dbg(ql_dbg_disc, vha, 0x2016, |
2706 | "Getting FCAL position map.\n"); | |
2707 | if (ql2xextended_error_logging & ql_dbg_disc) | |
2708 | qla2x00_get_fcal_position_map(vha, NULL); | |
1da177e4 LT |
2709 | |
2710 | /* Get list of logged in devices. */ | |
2711 | memset(ha->gid_list, 0, GID_LIST_SIZE); | |
e315cd28 | 2712 | rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, |
1da177e4 LT |
2713 | &entries); |
2714 | if (rval != QLA_SUCCESS) | |
2715 | goto cleanup_allocation; | |
2716 | ||
7c3df132 SK |
2717 | ql_dbg(ql_dbg_disc, vha, 0x2017, |
2718 | "Entries in ID list (%d).\n", entries); | |
2719 | ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, | |
2720 | (uint8_t *)ha->gid_list, | |
2721 | entries * sizeof(struct gid_list_info)); | |
1da177e4 LT |
2722 | |
2723 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 2724 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 2725 | if (new_fcport == NULL) { |
7c3df132 SK |
2726 | ql_log(ql_log_warn, vha, 0x2018, |
2727 | "Memory allocation failed for fcport.\n"); | |
1da177e4 LT |
2728 | rval = QLA_MEMORY_ALLOC_FAILED; |
2729 | goto cleanup_allocation; | |
2730 | } | |
2731 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2732 | ||
2733 | /* | |
2734 | * Mark local devices that were present with FCF_DEVICE_LOST for now. | |
2735 | */ | |
e315cd28 | 2736 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2737 | if (atomic_read(&fcport->state) == FCS_ONLINE && |
2738 | fcport->port_type != FCT_BROADCAST && | |
2739 | (fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
2740 | ||
7c3df132 SK |
2741 | ql_dbg(ql_dbg_disc, vha, 0x2019, |
2742 | "Marking port lost loop_id=0x%04x.\n", | |
2743 | fcport->loop_id); | |
1da177e4 | 2744 | |
ec426e10 | 2745 | qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST); |
1da177e4 LT |
2746 | } |
2747 | } | |
2748 | ||
2749 | /* Add devices to port list. */ | |
2750 | id_iter = (char *)ha->gid_list; | |
2751 | for (index = 0; index < entries; index++) { | |
2752 | domain = ((struct gid_list_info *)id_iter)->domain; | |
2753 | area = ((struct gid_list_info *)id_iter)->area; | |
2754 | al_pa = ((struct gid_list_info *)id_iter)->al_pa; | |
abbd8870 | 2755 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) |
1da177e4 LT |
2756 | loop_id = (uint16_t) |
2757 | ((struct gid_list_info *)id_iter)->loop_id_2100; | |
abbd8870 | 2758 | else |
1da177e4 LT |
2759 | loop_id = le16_to_cpu( |
2760 | ((struct gid_list_info *)id_iter)->loop_id); | |
abbd8870 | 2761 | id_iter += ha->gid_list_info_size; |
1da177e4 LT |
2762 | |
2763 | /* Bypass reserved domain fields. */ | |
2764 | if ((domain & 0xf0) == 0xf0) | |
2765 | continue; | |
2766 | ||
2767 | /* Bypass if not same domain and area of adapter. */ | |
f7d289f6 | 2768 | if (area && domain && |
e315cd28 | 2769 | (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) |
1da177e4 LT |
2770 | continue; |
2771 | ||
2772 | /* Bypass invalid local loop ID. */ | |
2773 | if (loop_id > LAST_LOCAL_LOOP_ID) | |
2774 | continue; | |
2775 | ||
2776 | /* Fill in member data. */ | |
2777 | new_fcport->d_id.b.domain = domain; | |
2778 | new_fcport->d_id.b.area = area; | |
2779 | new_fcport->d_id.b.al_pa = al_pa; | |
2780 | new_fcport->loop_id = loop_id; | |
e315cd28 AC |
2781 | new_fcport->vp_idx = vha->vp_idx; |
2782 | rval2 = qla2x00_get_port_database(vha, new_fcport, 0); | |
1da177e4 | 2783 | if (rval2 != QLA_SUCCESS) { |
7c3df132 SK |
2784 | ql_dbg(ql_dbg_disc, vha, 0x201a, |
2785 | "Failed to retrieve fcport information " | |
2786 | "-- get_port_database=%x, loop_id=0x%04x.\n", | |
2787 | rval2, new_fcport->loop_id); | |
2788 | ql_dbg(ql_dbg_disc, vha, 0x201b, | |
2789 | "Scheduling resync.\n"); | |
e315cd28 | 2790 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
2791 | continue; |
2792 | } | |
2793 | ||
2794 | /* Check for matching device in port list. */ | |
2795 | found = 0; | |
2796 | fcport = NULL; | |
e315cd28 | 2797 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2798 | if (memcmp(new_fcport->port_name, fcport->port_name, |
2799 | WWN_SIZE)) | |
2800 | continue; | |
2801 | ||
ddb9b126 | 2802 | fcport->flags &= ~FCF_FABRIC_DEVICE; |
1da177e4 LT |
2803 | fcport->loop_id = new_fcport->loop_id; |
2804 | fcport->port_type = new_fcport->port_type; | |
2805 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
2806 | memcpy(fcport->node_name, new_fcport->node_name, | |
2807 | WWN_SIZE); | |
2808 | ||
2809 | found++; | |
2810 | break; | |
2811 | } | |
2812 | ||
2813 | if (!found) { | |
2814 | /* New device, add to fcports list. */ | |
e315cd28 AC |
2815 | if (vha->vp_idx) { |
2816 | new_fcport->vha = vha; | |
2817 | new_fcport->vp_idx = vha->vp_idx; | |
2c3dfe3f | 2818 | } |
e315cd28 | 2819 | list_add_tail(&new_fcport->list, &vha->vp_fcports); |
1da177e4 LT |
2820 | |
2821 | /* Allocate a new replacement fcport. */ | |
2822 | fcport = new_fcport; | |
e315cd28 | 2823 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 2824 | if (new_fcport == NULL) { |
7c3df132 SK |
2825 | ql_log(ql_log_warn, vha, 0x201c, |
2826 | "Failed to allocate memory for fcport.\n"); | |
1da177e4 LT |
2827 | rval = QLA_MEMORY_ALLOC_FAILED; |
2828 | goto cleanup_allocation; | |
2829 | } | |
2830 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2831 | } | |
2832 | ||
d8b45213 | 2833 | /* Base iIDMA settings on HBA port speed. */ |
a3cbdfad | 2834 | fcport->fp_speed = ha->link_data_rate; |
d8b45213 | 2835 | |
e315cd28 | 2836 | qla2x00_update_fcport(vha, fcport); |
1da177e4 LT |
2837 | |
2838 | found_devs++; | |
2839 | } | |
2840 | ||
2841 | cleanup_allocation: | |
c9475cb0 | 2842 | kfree(new_fcport); |
1da177e4 LT |
2843 | |
2844 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
2845 | ql_dbg(ql_dbg_disc, vha, 0x201d, |
2846 | "Configure local loop error exit: rval=%x.\n", rval); | |
1da177e4 LT |
2847 | } |
2848 | ||
1da177e4 LT |
2849 | return (rval); |
2850 | } | |
2851 | ||
d8b45213 | 2852 | static void |
e315cd28 | 2853 | qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
d8b45213 AV |
2854 | { |
2855 | #define LS_UNKNOWN 2 | |
9f8fddee AV |
2856 | static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" }; |
2857 | char *link_speed; | |
d8b45213 | 2858 | int rval; |
1bb39548 | 2859 | uint16_t mb[4]; |
e315cd28 | 2860 | struct qla_hw_data *ha = vha->hw; |
d8b45213 | 2861 | |
c76f2c01 | 2862 | if (!IS_IIDMA_CAPABLE(ha)) |
d8b45213 AV |
2863 | return; |
2864 | ||
c9afb9a2 GM |
2865 | if (atomic_read(&fcport->state) != FCS_ONLINE) |
2866 | return; | |
2867 | ||
39bd9622 AV |
2868 | if (fcport->fp_speed == PORT_SPEED_UNKNOWN || |
2869 | fcport->fp_speed > ha->link_data_rate) | |
d8b45213 AV |
2870 | return; |
2871 | ||
e315cd28 | 2872 | rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, |
a3cbdfad | 2873 | mb); |
d8b45213 | 2874 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
2875 | ql_dbg(ql_dbg_disc, vha, 0x2004, |
2876 | "Unable to adjust iIDMA " | |
2877 | "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x " | |
2878 | "%04x.\n", fcport->port_name[0], fcport->port_name[1], | |
d8b45213 AV |
2879 | fcport->port_name[2], fcport->port_name[3], |
2880 | fcport->port_name[4], fcport->port_name[5], | |
2881 | fcport->port_name[6], fcport->port_name[7], rval, | |
7c3df132 | 2882 | fcport->fp_speed, mb[0], mb[1]); |
d8b45213 | 2883 | } else { |
9f8fddee AV |
2884 | link_speed = link_speeds[LS_UNKNOWN]; |
2885 | if (fcport->fp_speed < 5) | |
2886 | link_speed = link_speeds[fcport->fp_speed]; | |
2887 | else if (fcport->fp_speed == 0x13) | |
2888 | link_speed = link_speeds[5]; | |
7c3df132 SK |
2889 | ql_dbg(ql_dbg_disc, vha, 0x2005, |
2890 | "iIDMA adjusted to %s GB/s " | |
2891 | "on %02x%02x%02x%02x%02x%02x%02x%02x.\n", link_speed, | |
2892 | fcport->port_name[0], fcport->port_name[1], | |
2893 | fcport->port_name[2], fcport->port_name[3], | |
2894 | fcport->port_name[4], fcport->port_name[5], | |
2895 | fcport->port_name[6], fcport->port_name[7]); | |
d8b45213 AV |
2896 | } |
2897 | } | |
2898 | ||
23be331d | 2899 | static void |
e315cd28 | 2900 | qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) |
8482e118 AV |
2901 | { |
2902 | struct fc_rport_identifiers rport_ids; | |
bdf79621 | 2903 | struct fc_rport *rport; |
044d78e1 | 2904 | unsigned long flags; |
8482e118 | 2905 | |
ac280b67 | 2906 | qla2x00_rport_del(fcport); |
8482e118 | 2907 | |
f8b02a85 AV |
2908 | rport_ids.node_name = wwn_to_u64(fcport->node_name); |
2909 | rport_ids.port_name = wwn_to_u64(fcport->port_name); | |
8482e118 AV |
2910 | rport_ids.port_id = fcport->d_id.b.domain << 16 | |
2911 | fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; | |
77d74143 | 2912 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
e315cd28 | 2913 | fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); |
77d74143 | 2914 | if (!rport) { |
7c3df132 SK |
2915 | ql_log(ql_log_warn, vha, 0x2006, |
2916 | "Unable to allocate fc remote port.\n"); | |
77d74143 AV |
2917 | return; |
2918 | } | |
044d78e1 | 2919 | spin_lock_irqsave(fcport->vha->host->host_lock, flags); |
19a7b4ae | 2920 | *((fc_port_t **)rport->dd_data) = fcport; |
044d78e1 | 2921 | spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); |
d97994dc | 2922 | |
ad3e0eda | 2923 | rport->supported_classes = fcport->supported_classes; |
77d74143 | 2924 | |
8482e118 AV |
2925 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
2926 | if (fcport->port_type == FCT_INITIATOR) | |
2927 | rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; | |
2928 | if (fcport->port_type == FCT_TARGET) | |
2929 | rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; | |
77d74143 | 2930 | fc_remote_port_rolechg(rport, rport_ids.roles); |
1da177e4 LT |
2931 | } |
2932 | ||
23be331d AB |
2933 | /* |
2934 | * qla2x00_update_fcport | |
2935 | * Updates device on list. | |
2936 | * | |
2937 | * Input: | |
2938 | * ha = adapter block pointer. | |
2939 | * fcport = port structure pointer. | |
2940 | * | |
2941 | * Return: | |
2942 | * 0 - Success | |
2943 | * BIT_0 - error | |
2944 | * | |
2945 | * Context: | |
2946 | * Kernel context. | |
2947 | */ | |
2948 | void | |
e315cd28 | 2949 | qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
23be331d | 2950 | { |
e315cd28 | 2951 | fcport->vha = vha; |
23be331d | 2952 | fcport->login_retry = 0; |
5ff1d584 | 2953 | fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); |
23be331d | 2954 | |
e315cd28 | 2955 | qla2x00_iidma_fcport(vha, fcport); |
21090cbe | 2956 | qla24xx_update_fcport_fcp_prio(vha, fcport); |
e315cd28 | 2957 | qla2x00_reg_remote_port(vha, fcport); |
ec426e10 | 2958 | qla2x00_set_fcport_state(fcport, FCS_ONLINE); |
23be331d AB |
2959 | } |
2960 | ||
1da177e4 LT |
2961 | /* |
2962 | * qla2x00_configure_fabric | |
2963 | * Setup SNS devices with loop ID's. | |
2964 | * | |
2965 | * Input: | |
2966 | * ha = adapter block pointer. | |
2967 | * | |
2968 | * Returns: | |
2969 | * 0 = success. | |
2970 | * BIT_0 = error | |
2971 | */ | |
2972 | static int | |
e315cd28 | 2973 | qla2x00_configure_fabric(scsi_qla_host_t *vha) |
1da177e4 LT |
2974 | { |
2975 | int rval, rval2; | |
2976 | fc_port_t *fcport, *fcptemp; | |
2977 | uint16_t next_loopid; | |
2978 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
0107109e | 2979 | uint16_t loop_id; |
1da177e4 | 2980 | LIST_HEAD(new_fcports); |
e315cd28 AC |
2981 | struct qla_hw_data *ha = vha->hw; |
2982 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
1da177e4 LT |
2983 | |
2984 | /* If FL port exists, then SNS is present */ | |
e428924c | 2985 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2986 | loop_id = NPH_F_PORT; |
2987 | else | |
2988 | loop_id = SNS_FL_PORT; | |
e315cd28 | 2989 | rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); |
1da177e4 | 2990 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
2991 | ql_dbg(ql_dbg_disc, vha, 0x201f, |
2992 | "MBX_GET_PORT_NAME failed, No FL Port.\n"); | |
1da177e4 | 2993 | |
e315cd28 | 2994 | vha->device_flags &= ~SWITCH_FOUND; |
1da177e4 LT |
2995 | return (QLA_SUCCESS); |
2996 | } | |
e315cd28 | 2997 | vha->device_flags |= SWITCH_FOUND; |
1da177e4 LT |
2998 | |
2999 | /* Mark devices that need re-synchronization. */ | |
e315cd28 | 3000 | rval2 = qla2x00_device_resync(vha); |
1da177e4 LT |
3001 | if (rval2 == QLA_RSCNS_HANDLED) { |
3002 | /* No point doing the scan, just continue. */ | |
3003 | return (QLA_SUCCESS); | |
3004 | } | |
3005 | do { | |
cca5335c AV |
3006 | /* FDMI support. */ |
3007 | if (ql2xfdmienable && | |
e315cd28 AC |
3008 | test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) |
3009 | qla2x00_fdmi_register(vha); | |
cca5335c | 3010 | |
1da177e4 | 3011 | /* Ensure we are logged into the SNS. */ |
e428924c | 3012 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
3013 | loop_id = NPH_SNS; |
3014 | else | |
3015 | loop_id = SIMPLE_NAME_SERVER; | |
e315cd28 | 3016 | ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, |
abbd8870 | 3017 | 0xfc, mb, BIT_1 | BIT_0); |
1da177e4 | 3018 | if (mb[0] != MBS_COMMAND_COMPLETE) { |
7c3df132 SK |
3019 | ql_dbg(ql_dbg_disc, vha, 0x2042, |
3020 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x " | |
3021 | "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1], | |
3022 | mb[2], mb[6], mb[7]); | |
1da177e4 LT |
3023 | return (QLA_SUCCESS); |
3024 | } | |
3025 | ||
e315cd28 AC |
3026 | if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { |
3027 | if (qla2x00_rft_id(vha)) { | |
1da177e4 | 3028 | /* EMPTY */ |
7c3df132 SK |
3029 | ql_dbg(ql_dbg_disc, vha, 0x2045, |
3030 | "Register FC-4 TYPE failed.\n"); | |
1da177e4 | 3031 | } |
e315cd28 | 3032 | if (qla2x00_rff_id(vha)) { |
1da177e4 | 3033 | /* EMPTY */ |
7c3df132 SK |
3034 | ql_dbg(ql_dbg_disc, vha, 0x2049, |
3035 | "Register FC-4 Features failed.\n"); | |
1da177e4 | 3036 | } |
e315cd28 | 3037 | if (qla2x00_rnn_id(vha)) { |
1da177e4 | 3038 | /* EMPTY */ |
7c3df132 SK |
3039 | ql_dbg(ql_dbg_disc, vha, 0x204f, |
3040 | "Register Node Name failed.\n"); | |
e315cd28 | 3041 | } else if (qla2x00_rsnn_nn(vha)) { |
1da177e4 | 3042 | /* EMPTY */ |
7c3df132 SK |
3043 | ql_dbg(ql_dbg_disc, vha, 0x2053, |
3044 | "Register Symobilic Node Name failed.\n"); | |
1da177e4 LT |
3045 | } |
3046 | } | |
3047 | ||
e315cd28 | 3048 | rval = qla2x00_find_all_fabric_devs(vha, &new_fcports); |
1da177e4 LT |
3049 | if (rval != QLA_SUCCESS) |
3050 | break; | |
3051 | ||
3052 | /* | |
3053 | * Logout all previous fabric devices marked lost, except | |
f08b7251 | 3054 | * FCP2 devices. |
1da177e4 | 3055 | */ |
e315cd28 AC |
3056 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
3057 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
3058 | break; |
3059 | ||
3060 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) | |
3061 | continue; | |
3062 | ||
3063 | if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) { | |
e315cd28 | 3064 | qla2x00_mark_device_lost(vha, fcport, |
d97994dc | 3065 | ql2xplogiabsentdevice, 0); |
1da177e4 | 3066 | if (fcport->loop_id != FC_NO_LOOP_ID && |
f08b7251 | 3067 | (fcport->flags & FCF_FCP2_DEVICE) == 0 && |
1da177e4 LT |
3068 | fcport->port_type != FCT_INITIATOR && |
3069 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 3070 | ha->isp_ops->fabric_logout(vha, |
1c7c6357 AV |
3071 | fcport->loop_id, |
3072 | fcport->d_id.b.domain, | |
3073 | fcport->d_id.b.area, | |
3074 | fcport->d_id.b.al_pa); | |
1da177e4 LT |
3075 | fcport->loop_id = FC_NO_LOOP_ID; |
3076 | } | |
3077 | } | |
3078 | } | |
3079 | ||
3080 | /* Starting free loop ID. */ | |
e315cd28 | 3081 | next_loopid = ha->min_external_loopid; |
1da177e4 LT |
3082 | |
3083 | /* | |
3084 | * Scan through our port list and login entries that need to be | |
3085 | * logged in. | |
3086 | */ | |
e315cd28 AC |
3087 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
3088 | if (atomic_read(&vha->loop_down_timer) || | |
3089 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
3090 | break; |
3091 | ||
3092 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || | |
3093 | (fcport->flags & FCF_LOGIN_NEEDED) == 0) | |
3094 | continue; | |
3095 | ||
3096 | if (fcport->loop_id == FC_NO_LOOP_ID) { | |
3097 | fcport->loop_id = next_loopid; | |
d4486fd6 | 3098 | rval = qla2x00_find_new_loop_id( |
e315cd28 | 3099 | base_vha, fcport); |
1da177e4 LT |
3100 | if (rval != QLA_SUCCESS) { |
3101 | /* Ran out of IDs to use */ | |
3102 | break; | |
3103 | } | |
3104 | } | |
1da177e4 | 3105 | /* Login and update database */ |
e315cd28 | 3106 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
1da177e4 LT |
3107 | } |
3108 | ||
3109 | /* Exit if out of loop IDs. */ | |
3110 | if (rval != QLA_SUCCESS) { | |
3111 | break; | |
3112 | } | |
3113 | ||
3114 | /* | |
3115 | * Login and add the new devices to our port list. | |
3116 | */ | |
3117 | list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { | |
e315cd28 AC |
3118 | if (atomic_read(&vha->loop_down_timer) || |
3119 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
3120 | break; |
3121 | ||
3122 | /* Find a new loop ID to use. */ | |
3123 | fcport->loop_id = next_loopid; | |
e315cd28 | 3124 | rval = qla2x00_find_new_loop_id(base_vha, fcport); |
1da177e4 LT |
3125 | if (rval != QLA_SUCCESS) { |
3126 | /* Ran out of IDs to use */ | |
3127 | break; | |
3128 | } | |
3129 | ||
bdf79621 | 3130 | /* Login and update database */ |
e315cd28 AC |
3131 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
3132 | ||
3133 | if (vha->vp_idx) { | |
3134 | fcport->vha = vha; | |
3135 | fcport->vp_idx = vha->vp_idx; | |
3136 | } | |
3137 | list_move_tail(&fcport->list, &vha->vp_fcports); | |
1da177e4 LT |
3138 | } |
3139 | } while (0); | |
3140 | ||
3141 | /* Free all new device structures not processed. */ | |
3142 | list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { | |
3143 | list_del(&fcport->list); | |
3144 | kfree(fcport); | |
3145 | } | |
3146 | ||
3147 | if (rval) { | |
7c3df132 SK |
3148 | ql_dbg(ql_dbg_disc, vha, 0x2068, |
3149 | "Configure fabric error exit rval=%d.\n", rval); | |
1da177e4 LT |
3150 | } |
3151 | ||
3152 | return (rval); | |
3153 | } | |
3154 | ||
1da177e4 LT |
3155 | /* |
3156 | * qla2x00_find_all_fabric_devs | |
3157 | * | |
3158 | * Input: | |
3159 | * ha = adapter block pointer. | |
3160 | * dev = database device entry pointer. | |
3161 | * | |
3162 | * Returns: | |
3163 | * 0 = success. | |
3164 | * | |
3165 | * Context: | |
3166 | * Kernel context. | |
3167 | */ | |
3168 | static int | |
e315cd28 AC |
3169 | qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha, |
3170 | struct list_head *new_fcports) | |
1da177e4 LT |
3171 | { |
3172 | int rval; | |
3173 | uint16_t loop_id; | |
3174 | fc_port_t *fcport, *new_fcport, *fcptemp; | |
3175 | int found; | |
3176 | ||
3177 | sw_info_t *swl; | |
3178 | int swl_idx; | |
3179 | int first_dev, last_dev; | |
1516ef44 | 3180 | port_id_t wrap = {}, nxt_d_id; |
e315cd28 AC |
3181 | struct qla_hw_data *ha = vha->hw; |
3182 | struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev); | |
ee546b6e | 3183 | struct scsi_qla_host *tvp; |
1da177e4 LT |
3184 | |
3185 | rval = QLA_SUCCESS; | |
3186 | ||
3187 | /* Try GID_PT to get device list, else GAN. */ | |
4b89258c | 3188 | swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL); |
bbfbbbc1 | 3189 | if (!swl) { |
1da177e4 | 3190 | /*EMPTY*/ |
7c3df132 SK |
3191 | ql_dbg(ql_dbg_disc, vha, 0x2054, |
3192 | "GID_PT allocations failed, fallback on GA_NXT.\n"); | |
1da177e4 | 3193 | } else { |
e315cd28 | 3194 | if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
3195 | kfree(swl); |
3196 | swl = NULL; | |
e315cd28 | 3197 | } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
3198 | kfree(swl); |
3199 | swl = NULL; | |
e315cd28 | 3200 | } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
3201 | kfree(swl); |
3202 | swl = NULL; | |
e5896bd5 | 3203 | } else if (ql2xiidmaenable && |
e315cd28 AC |
3204 | qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) { |
3205 | qla2x00_gpsc(vha, swl); | |
1da177e4 | 3206 | } |
e8c72ba5 CD |
3207 | |
3208 | /* If other queries succeeded probe for FC-4 type */ | |
3209 | if (swl) | |
3210 | qla2x00_gff_id(vha, swl); | |
1da177e4 LT |
3211 | } |
3212 | swl_idx = 0; | |
3213 | ||
3214 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 3215 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 3216 | if (new_fcport == NULL) { |
7c3df132 SK |
3217 | ql_log(ql_log_warn, vha, 0x205e, |
3218 | "Failed to allocate memory for fcport.\n"); | |
c9475cb0 | 3219 | kfree(swl); |
1da177e4 LT |
3220 | return (QLA_MEMORY_ALLOC_FAILED); |
3221 | } | |
3222 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
3223 | /* Set start port ID scan at adapter ID. */ |
3224 | first_dev = 1; | |
3225 | last_dev = 0; | |
3226 | ||
3227 | /* Starting free loop ID. */ | |
e315cd28 AC |
3228 | loop_id = ha->min_external_loopid; |
3229 | for (; loop_id <= ha->max_loop_id; loop_id++) { | |
3230 | if (qla2x00_is_reserved_id(vha, loop_id)) | |
1da177e4 LT |
3231 | continue; |
3232 | ||
3a6478df GM |
3233 | if (ha->current_topology == ISP_CFG_FL && |
3234 | (atomic_read(&vha->loop_down_timer) || | |
3235 | LOOP_TRANSITION(vha))) { | |
bb2d52b2 AV |
3236 | atomic_set(&vha->loop_down_timer, 0); |
3237 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
3238 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
1da177e4 | 3239 | break; |
bb2d52b2 | 3240 | } |
1da177e4 LT |
3241 | |
3242 | if (swl != NULL) { | |
3243 | if (last_dev) { | |
3244 | wrap.b24 = new_fcport->d_id.b24; | |
3245 | } else { | |
3246 | new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; | |
3247 | memcpy(new_fcport->node_name, | |
3248 | swl[swl_idx].node_name, WWN_SIZE); | |
3249 | memcpy(new_fcport->port_name, | |
3250 | swl[swl_idx].port_name, WWN_SIZE); | |
d8b45213 AV |
3251 | memcpy(new_fcport->fabric_port_name, |
3252 | swl[swl_idx].fabric_port_name, WWN_SIZE); | |
3253 | new_fcport->fp_speed = swl[swl_idx].fp_speed; | |
e8c72ba5 | 3254 | new_fcport->fc4_type = swl[swl_idx].fc4_type; |
1da177e4 LT |
3255 | |
3256 | if (swl[swl_idx].d_id.b.rsvd_1 != 0) { | |
3257 | last_dev = 1; | |
3258 | } | |
3259 | swl_idx++; | |
3260 | } | |
3261 | } else { | |
3262 | /* Send GA_NXT to the switch */ | |
e315cd28 | 3263 | rval = qla2x00_ga_nxt(vha, new_fcport); |
1da177e4 | 3264 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
3265 | ql_log(ql_log_warn, vha, 0x2064, |
3266 | "SNS scan failed -- assuming " | |
3267 | "zero-entry result.\n"); | |
1da177e4 LT |
3268 | list_for_each_entry_safe(fcport, fcptemp, |
3269 | new_fcports, list) { | |
3270 | list_del(&fcport->list); | |
3271 | kfree(fcport); | |
3272 | } | |
3273 | rval = QLA_SUCCESS; | |
3274 | break; | |
3275 | } | |
3276 | } | |
3277 | ||
3278 | /* If wrap on switch device list, exit. */ | |
3279 | if (first_dev) { | |
3280 | wrap.b24 = new_fcport->d_id.b24; | |
3281 | first_dev = 0; | |
3282 | } else if (new_fcport->d_id.b24 == wrap.b24) { | |
7c3df132 SK |
3283 | ql_dbg(ql_dbg_disc, vha, 0x2065, |
3284 | "Device wrap (%02x%02x%02x).\n", | |
3285 | new_fcport->d_id.b.domain, | |
3286 | new_fcport->d_id.b.area, | |
3287 | new_fcport->d_id.b.al_pa); | |
1da177e4 LT |
3288 | break; |
3289 | } | |
3290 | ||
2c3dfe3f | 3291 | /* Bypass if same physical adapter. */ |
e315cd28 | 3292 | if (new_fcport->d_id.b24 == base_vha->d_id.b24) |
1da177e4 LT |
3293 | continue; |
3294 | ||
2c3dfe3f | 3295 | /* Bypass virtual ports of the same host. */ |
e315cd28 AC |
3296 | found = 0; |
3297 | if (ha->num_vhosts) { | |
feafb7b1 AE |
3298 | unsigned long flags; |
3299 | ||
3300 | spin_lock_irqsave(&ha->vport_slock, flags); | |
ee546b6e | 3301 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
3302 | if (new_fcport->d_id.b24 == vp->d_id.b24) { |
3303 | found = 1; | |
2c3dfe3f | 3304 | break; |
e315cd28 | 3305 | } |
2c3dfe3f | 3306 | } |
feafb7b1 AE |
3307 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
3308 | ||
e315cd28 | 3309 | if (found) |
2c3dfe3f SJ |
3310 | continue; |
3311 | } | |
3312 | ||
f7d289f6 AV |
3313 | /* Bypass if same domain and area of adapter. */ |
3314 | if (((new_fcport->d_id.b24 & 0xffff00) == | |
e315cd28 | 3315 | (vha->d_id.b24 & 0xffff00)) && ha->current_topology == |
f7d289f6 AV |
3316 | ISP_CFG_FL) |
3317 | continue; | |
3318 | ||
1da177e4 LT |
3319 | /* Bypass reserved domain fields. */ |
3320 | if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) | |
3321 | continue; | |
3322 | ||
e8c72ba5 | 3323 | /* Bypass ports whose FCP-4 type is not FCP_SCSI */ |
4da26e16 CD |
3324 | if (ql2xgffidenable && |
3325 | (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && | |
3326 | new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) | |
e8c72ba5 CD |
3327 | continue; |
3328 | ||
1da177e4 LT |
3329 | /* Locate matching device in database. */ |
3330 | found = 0; | |
e315cd28 | 3331 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
3332 | if (memcmp(new_fcport->port_name, fcport->port_name, |
3333 | WWN_SIZE)) | |
3334 | continue; | |
3335 | ||
3336 | found++; | |
3337 | ||
d8b45213 AV |
3338 | /* Update port state. */ |
3339 | memcpy(fcport->fabric_port_name, | |
3340 | new_fcport->fabric_port_name, WWN_SIZE); | |
3341 | fcport->fp_speed = new_fcport->fp_speed; | |
3342 | ||
1da177e4 LT |
3343 | /* |
3344 | * If address the same and state FCS_ONLINE, nothing | |
3345 | * changed. | |
3346 | */ | |
3347 | if (fcport->d_id.b24 == new_fcport->d_id.b24 && | |
3348 | atomic_read(&fcport->state) == FCS_ONLINE) { | |
3349 | break; | |
3350 | } | |
3351 | ||
3352 | /* | |
3353 | * If device was not a fabric device before. | |
3354 | */ | |
3355 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
3356 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
3357 | fcport->loop_id = FC_NO_LOOP_ID; | |
3358 | fcport->flags |= (FCF_FABRIC_DEVICE | | |
3359 | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
3360 | break; |
3361 | } | |
3362 | ||
3363 | /* | |
3364 | * Port ID changed or device was marked to be updated; | |
3365 | * Log it out if still logged in and mark it for | |
3366 | * relogin later. | |
3367 | */ | |
3368 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
3369 | fcport->flags |= FCF_LOGIN_NEEDED; | |
3370 | if (fcport->loop_id != FC_NO_LOOP_ID && | |
f08b7251 | 3371 | (fcport->flags & FCF_FCP2_DEVICE) == 0 && |
1da177e4 LT |
3372 | fcport->port_type != FCT_INITIATOR && |
3373 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 3374 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3375 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3376 | fcport->d_id.b.al_pa); | |
1da177e4 LT |
3377 | fcport->loop_id = FC_NO_LOOP_ID; |
3378 | } | |
3379 | ||
3380 | break; | |
3381 | } | |
3382 | ||
3383 | if (found) | |
3384 | continue; | |
1da177e4 LT |
3385 | /* If device was not in our fcports list, then add it. */ |
3386 | list_add_tail(&new_fcport->list, new_fcports); | |
3387 | ||
3388 | /* Allocate a new replacement fcport. */ | |
3389 | nxt_d_id.b24 = new_fcport->d_id.b24; | |
e315cd28 | 3390 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 3391 | if (new_fcport == NULL) { |
7c3df132 SK |
3392 | ql_log(ql_log_warn, vha, 0x2066, |
3393 | "Memory allocation failed for fcport.\n"); | |
c9475cb0 | 3394 | kfree(swl); |
1da177e4 LT |
3395 | return (QLA_MEMORY_ALLOC_FAILED); |
3396 | } | |
3397 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
3398 | new_fcport->d_id.b24 = nxt_d_id.b24; | |
3399 | } | |
3400 | ||
c9475cb0 JJ |
3401 | kfree(swl); |
3402 | kfree(new_fcport); | |
1da177e4 | 3403 | |
1da177e4 LT |
3404 | return (rval); |
3405 | } | |
3406 | ||
3407 | /* | |
3408 | * qla2x00_find_new_loop_id | |
3409 | * Scan through our port list and find a new usable loop ID. | |
3410 | * | |
3411 | * Input: | |
3412 | * ha: adapter state pointer. | |
3413 | * dev: port structure pointer. | |
3414 | * | |
3415 | * Returns: | |
3416 | * qla2x00 local function return status code. | |
3417 | * | |
3418 | * Context: | |
3419 | * Kernel context. | |
3420 | */ | |
03bcfb57 | 3421 | int |
e315cd28 | 3422 | qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) |
1da177e4 LT |
3423 | { |
3424 | int rval; | |
3425 | int found; | |
3426 | fc_port_t *fcport; | |
3427 | uint16_t first_loop_id; | |
e315cd28 AC |
3428 | struct qla_hw_data *ha = vha->hw; |
3429 | struct scsi_qla_host *vp; | |
ee546b6e | 3430 | struct scsi_qla_host *tvp; |
feafb7b1 | 3431 | unsigned long flags = 0; |
1da177e4 LT |
3432 | |
3433 | rval = QLA_SUCCESS; | |
3434 | ||
3435 | /* Save starting loop ID. */ | |
3436 | first_loop_id = dev->loop_id; | |
3437 | ||
3438 | for (;;) { | |
3439 | /* Skip loop ID if already used by adapter. */ | |
e315cd28 | 3440 | if (dev->loop_id == vha->loop_id) |
1da177e4 | 3441 | dev->loop_id++; |
1da177e4 LT |
3442 | |
3443 | /* Skip reserved loop IDs. */ | |
e315cd28 | 3444 | while (qla2x00_is_reserved_id(vha, dev->loop_id)) |
1da177e4 | 3445 | dev->loop_id++; |
1da177e4 LT |
3446 | |
3447 | /* Reset loop ID if passed the end. */ | |
e315cd28 | 3448 | if (dev->loop_id > ha->max_loop_id) { |
1da177e4 LT |
3449 | /* first loop ID. */ |
3450 | dev->loop_id = ha->min_external_loopid; | |
3451 | } | |
3452 | ||
3453 | /* Check for loop ID being already in use. */ | |
3454 | found = 0; | |
3455 | fcport = NULL; | |
feafb7b1 AE |
3456 | |
3457 | spin_lock_irqsave(&ha->vport_slock, flags); | |
ee546b6e | 3458 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
3459 | list_for_each_entry(fcport, &vp->vp_fcports, list) { |
3460 | if (fcport->loop_id == dev->loop_id && | |
3461 | fcport != dev) { | |
3462 | /* ID possibly in use */ | |
3463 | found++; | |
3464 | break; | |
3465 | } | |
1da177e4 | 3466 | } |
e315cd28 AC |
3467 | if (found) |
3468 | break; | |
1da177e4 | 3469 | } |
feafb7b1 | 3470 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
1da177e4 LT |
3471 | |
3472 | /* If not in use then it is free to use. */ | |
3473 | if (!found) { | |
3474 | break; | |
3475 | } | |
3476 | ||
3477 | /* ID in use. Try next value. */ | |
3478 | dev->loop_id++; | |
3479 | ||
3480 | /* If wrap around. No free ID to use. */ | |
3481 | if (dev->loop_id == first_loop_id) { | |
3482 | dev->loop_id = FC_NO_LOOP_ID; | |
3483 | rval = QLA_FUNCTION_FAILED; | |
3484 | break; | |
3485 | } | |
3486 | } | |
3487 | ||
3488 | return (rval); | |
3489 | } | |
3490 | ||
3491 | /* | |
3492 | * qla2x00_device_resync | |
3493 | * Marks devices in the database that needs resynchronization. | |
3494 | * | |
3495 | * Input: | |
3496 | * ha = adapter block pointer. | |
3497 | * | |
3498 | * Context: | |
3499 | * Kernel context. | |
3500 | */ | |
3501 | static int | |
e315cd28 | 3502 | qla2x00_device_resync(scsi_qla_host_t *vha) |
1da177e4 LT |
3503 | { |
3504 | int rval; | |
1da177e4 LT |
3505 | uint32_t mask; |
3506 | fc_port_t *fcport; | |
3507 | uint32_t rscn_entry; | |
3508 | uint8_t rscn_out_iter; | |
3509 | uint8_t format; | |
1516ef44 | 3510 | port_id_t d_id = {}; |
1da177e4 LT |
3511 | |
3512 | rval = QLA_RSCNS_HANDLED; | |
3513 | ||
e315cd28 AC |
3514 | while (vha->rscn_out_ptr != vha->rscn_in_ptr || |
3515 | vha->flags.rscn_queue_overflow) { | |
1da177e4 | 3516 | |
e315cd28 | 3517 | rscn_entry = vha->rscn_queue[vha->rscn_out_ptr]; |
1da177e4 LT |
3518 | format = MSB(MSW(rscn_entry)); |
3519 | d_id.b.domain = LSB(MSW(rscn_entry)); | |
3520 | d_id.b.area = MSB(LSW(rscn_entry)); | |
3521 | d_id.b.al_pa = LSB(LSW(rscn_entry)); | |
3522 | ||
7c3df132 SK |
3523 | ql_dbg(ql_dbg_disc, vha, 0x2020, |
3524 | "RSCN queue entry[%d] = [%02x/%02x%02x%02x].\n", | |
3525 | vha->rscn_out_ptr, format, d_id.b.domain, d_id.b.area, | |
3526 | d_id.b.al_pa); | |
1da177e4 | 3527 | |
e315cd28 AC |
3528 | vha->rscn_out_ptr++; |
3529 | if (vha->rscn_out_ptr == MAX_RSCN_COUNT) | |
3530 | vha->rscn_out_ptr = 0; | |
1da177e4 LT |
3531 | |
3532 | /* Skip duplicate entries. */ | |
e315cd28 AC |
3533 | for (rscn_out_iter = vha->rscn_out_ptr; |
3534 | !vha->flags.rscn_queue_overflow && | |
3535 | rscn_out_iter != vha->rscn_in_ptr; | |
1da177e4 LT |
3536 | rscn_out_iter = (rscn_out_iter == |
3537 | (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) { | |
3538 | ||
e315cd28 | 3539 | if (rscn_entry != vha->rscn_queue[rscn_out_iter]) |
1da177e4 LT |
3540 | break; |
3541 | ||
7c3df132 SK |
3542 | ql_dbg(ql_dbg_disc, vha, 0x2021, |
3543 | "Skipping duplicate RSCN queue entry found at " | |
3544 | "[%d].\n", rscn_out_iter); | |
1da177e4 | 3545 | |
e315cd28 | 3546 | vha->rscn_out_ptr = rscn_out_iter; |
1da177e4 LT |
3547 | } |
3548 | ||
3549 | /* Queue overflow, set switch default case. */ | |
e315cd28 | 3550 | if (vha->flags.rscn_queue_overflow) { |
7c3df132 SK |
3551 | ql_dbg(ql_dbg_disc, vha, 0x2022, |
3552 | "device_resync: rscn overflow.\n"); | |
1da177e4 LT |
3553 | |
3554 | format = 3; | |
e315cd28 | 3555 | vha->flags.rscn_queue_overflow = 0; |
1da177e4 LT |
3556 | } |
3557 | ||
3558 | switch (format) { | |
3559 | case 0: | |
1da177e4 LT |
3560 | mask = 0xffffff; |
3561 | break; | |
3562 | case 1: | |
3563 | mask = 0xffff00; | |
3564 | break; | |
3565 | case 2: | |
3566 | mask = 0xff0000; | |
3567 | break; | |
3568 | default: | |
3569 | mask = 0x0; | |
3570 | d_id.b24 = 0; | |
e315cd28 | 3571 | vha->rscn_out_ptr = vha->rscn_in_ptr; |
1da177e4 LT |
3572 | break; |
3573 | } | |
3574 | ||
3575 | rval = QLA_SUCCESS; | |
3576 | ||
e315cd28 | 3577 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
3578 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || |
3579 | (fcport->d_id.b24 & mask) != d_id.b24 || | |
3580 | fcport->port_type == FCT_BROADCAST) | |
3581 | continue; | |
3582 | ||
3583 | if (atomic_read(&fcport->state) == FCS_ONLINE) { | |
3584 | if (format != 3 || | |
3585 | fcport->port_type != FCT_INITIATOR) { | |
e315cd28 | 3586 | qla2x00_mark_device_lost(vha, fcport, |
d97994dc | 3587 | 0, 0); |
1da177e4 LT |
3588 | } |
3589 | } | |
1da177e4 LT |
3590 | } |
3591 | } | |
3592 | return (rval); | |
3593 | } | |
3594 | ||
3595 | /* | |
3596 | * qla2x00_fabric_dev_login | |
3597 | * Login fabric target device and update FC port database. | |
3598 | * | |
3599 | * Input: | |
3600 | * ha: adapter state pointer. | |
3601 | * fcport: port structure list pointer. | |
3602 | * next_loopid: contains value of a new loop ID that can be used | |
3603 | * by the next login attempt. | |
3604 | * | |
3605 | * Returns: | |
3606 | * qla2x00 local function return status code. | |
3607 | * | |
3608 | * Context: | |
3609 | * Kernel context. | |
3610 | */ | |
3611 | static int | |
e315cd28 | 3612 | qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
3613 | uint16_t *next_loopid) |
3614 | { | |
3615 | int rval; | |
3616 | int retry; | |
0107109e | 3617 | uint8_t opts; |
e315cd28 | 3618 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3619 | |
3620 | rval = QLA_SUCCESS; | |
3621 | retry = 0; | |
3622 | ||
ac280b67 | 3623 | if (IS_ALOGIO_CAPABLE(ha)) { |
5ff1d584 AV |
3624 | if (fcport->flags & FCF_ASYNC_SENT) |
3625 | return rval; | |
3626 | fcport->flags |= FCF_ASYNC_SENT; | |
ac280b67 AV |
3627 | rval = qla2x00_post_async_login_work(vha, fcport, NULL); |
3628 | if (!rval) | |
3629 | return rval; | |
3630 | } | |
3631 | ||
5ff1d584 | 3632 | fcport->flags &= ~FCF_ASYNC_SENT; |
e315cd28 | 3633 | rval = qla2x00_fabric_login(vha, fcport, next_loopid); |
1da177e4 | 3634 | if (rval == QLA_SUCCESS) { |
f08b7251 | 3635 | /* Send an ADISC to FCP2 devices.*/ |
0107109e | 3636 | opts = 0; |
f08b7251 | 3637 | if (fcport->flags & FCF_FCP2_DEVICE) |
0107109e | 3638 | opts |= BIT_1; |
e315cd28 | 3639 | rval = qla2x00_get_port_database(vha, fcport, opts); |
1da177e4 | 3640 | if (rval != QLA_SUCCESS) { |
e315cd28 | 3641 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3642 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3643 | fcport->d_id.b.al_pa); | |
e315cd28 | 3644 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 | 3645 | } else { |
e315cd28 | 3646 | qla2x00_update_fcport(vha, fcport); |
1da177e4 LT |
3647 | } |
3648 | } | |
3649 | ||
3650 | return (rval); | |
3651 | } | |
3652 | ||
3653 | /* | |
3654 | * qla2x00_fabric_login | |
3655 | * Issue fabric login command. | |
3656 | * | |
3657 | * Input: | |
3658 | * ha = adapter block pointer. | |
3659 | * device = pointer to FC device type structure. | |
3660 | * | |
3661 | * Returns: | |
3662 | * 0 - Login successfully | |
3663 | * 1 - Login failed | |
3664 | * 2 - Initiator device | |
3665 | * 3 - Fatal error | |
3666 | */ | |
3667 | int | |
e315cd28 | 3668 | qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
3669 | uint16_t *next_loopid) |
3670 | { | |
3671 | int rval; | |
3672 | int retry; | |
3673 | uint16_t tmp_loopid; | |
3674 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
e315cd28 | 3675 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3676 | |
3677 | retry = 0; | |
3678 | tmp_loopid = 0; | |
3679 | ||
3680 | for (;;) { | |
7c3df132 SK |
3681 | ql_dbg(ql_dbg_disc, vha, 0x2000, |
3682 | "Trying Fabric Login w/loop id 0x%04x for port " | |
3683 | "%02x%02x%02x.\n", | |
3684 | fcport->loop_id, fcport->d_id.b.domain, | |
3685 | fcport->d_id.b.area, fcport->d_id.b.al_pa); | |
1da177e4 LT |
3686 | |
3687 | /* Login fcport on switch. */ | |
e315cd28 | 3688 | ha->isp_ops->fabric_login(vha, fcport->loop_id, |
1da177e4 LT |
3689 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3690 | fcport->d_id.b.al_pa, mb, BIT_0); | |
3691 | if (mb[0] == MBS_PORT_ID_USED) { | |
3692 | /* | |
3693 | * Device has another loop ID. The firmware team | |
0107109e AV |
3694 | * recommends the driver perform an implicit login with |
3695 | * the specified ID again. The ID we just used is save | |
3696 | * here so we return with an ID that can be tried by | |
3697 | * the next login. | |
1da177e4 LT |
3698 | */ |
3699 | retry++; | |
3700 | tmp_loopid = fcport->loop_id; | |
3701 | fcport->loop_id = mb[1]; | |
3702 | ||
7c3df132 SK |
3703 | ql_dbg(ql_dbg_disc, vha, 0x2001, |
3704 | "Fabric Login: port in use - next loop " | |
3705 | "id=0x%04x, port id= %02x%02x%02x.\n", | |
1da177e4 | 3706 | fcport->loop_id, fcport->d_id.b.domain, |
7c3df132 | 3707 | fcport->d_id.b.area, fcport->d_id.b.al_pa); |
1da177e4 LT |
3708 | |
3709 | } else if (mb[0] == MBS_COMMAND_COMPLETE) { | |
3710 | /* | |
3711 | * Login succeeded. | |
3712 | */ | |
3713 | if (retry) { | |
3714 | /* A retry occurred before. */ | |
3715 | *next_loopid = tmp_loopid; | |
3716 | } else { | |
3717 | /* | |
3718 | * No retry occurred before. Just increment the | |
3719 | * ID value for next login. | |
3720 | */ | |
3721 | *next_loopid = (fcport->loop_id + 1); | |
3722 | } | |
3723 | ||
3724 | if (mb[1] & BIT_0) { | |
3725 | fcport->port_type = FCT_INITIATOR; | |
3726 | } else { | |
3727 | fcport->port_type = FCT_TARGET; | |
3728 | if (mb[1] & BIT_1) { | |
8474f3a0 | 3729 | fcport->flags |= FCF_FCP2_DEVICE; |
1da177e4 LT |
3730 | } |
3731 | } | |
3732 | ||
ad3e0eda AV |
3733 | if (mb[10] & BIT_0) |
3734 | fcport->supported_classes |= FC_COS_CLASS2; | |
3735 | if (mb[10] & BIT_1) | |
3736 | fcport->supported_classes |= FC_COS_CLASS3; | |
3737 | ||
1da177e4 LT |
3738 | rval = QLA_SUCCESS; |
3739 | break; | |
3740 | } else if (mb[0] == MBS_LOOP_ID_USED) { | |
3741 | /* | |
3742 | * Loop ID already used, try next loop ID. | |
3743 | */ | |
3744 | fcport->loop_id++; | |
e315cd28 | 3745 | rval = qla2x00_find_new_loop_id(vha, fcport); |
1da177e4 LT |
3746 | if (rval != QLA_SUCCESS) { |
3747 | /* Ran out of loop IDs to use */ | |
3748 | break; | |
3749 | } | |
3750 | } else if (mb[0] == MBS_COMMAND_ERROR) { | |
3751 | /* | |
3752 | * Firmware possibly timed out during login. If NO | |
3753 | * retries are left to do then the device is declared | |
3754 | * dead. | |
3755 | */ | |
3756 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3757 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3758 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3759 | fcport->d_id.b.al_pa); | |
e315cd28 | 3760 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 LT |
3761 | |
3762 | rval = 1; | |
3763 | break; | |
3764 | } else { | |
3765 | /* | |
3766 | * unrecoverable / not handled error | |
3767 | */ | |
7c3df132 SK |
3768 | ql_dbg(ql_dbg_disc, vha, 0x2002, |
3769 | "Failed=%x port_id=%02x%02x%02x loop_id=%x " | |
3770 | "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, | |
3771 | fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
3772 | fcport->loop_id, jiffies); | |
1da177e4 LT |
3773 | |
3774 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3775 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3776 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3777 | fcport->d_id.b.al_pa); | |
1da177e4 | 3778 | fcport->loop_id = FC_NO_LOOP_ID; |
0eedfcf0 | 3779 | fcport->login_retry = 0; |
1da177e4 LT |
3780 | |
3781 | rval = 3; | |
3782 | break; | |
3783 | } | |
3784 | } | |
3785 | ||
3786 | return (rval); | |
3787 | } | |
3788 | ||
3789 | /* | |
3790 | * qla2x00_local_device_login | |
3791 | * Issue local device login command. | |
3792 | * | |
3793 | * Input: | |
3794 | * ha = adapter block pointer. | |
3795 | * loop_id = loop id of device to login to. | |
3796 | * | |
3797 | * Returns (Where's the #define!!!!): | |
3798 | * 0 - Login successfully | |
3799 | * 1 - Login failed | |
3800 | * 3 - Fatal error | |
3801 | */ | |
3802 | int | |
e315cd28 | 3803 | qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) |
1da177e4 LT |
3804 | { |
3805 | int rval; | |
3806 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
3807 | ||
3808 | memset(mb, 0, sizeof(mb)); | |
e315cd28 | 3809 | rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); |
1da177e4 LT |
3810 | if (rval == QLA_SUCCESS) { |
3811 | /* Interrogate mailbox registers for any errors */ | |
3812 | if (mb[0] == MBS_COMMAND_ERROR) | |
3813 | rval = 1; | |
3814 | else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) | |
3815 | /* device not in PCB table */ | |
3816 | rval = 3; | |
3817 | } | |
3818 | ||
3819 | return (rval); | |
3820 | } | |
3821 | ||
3822 | /* | |
3823 | * qla2x00_loop_resync | |
3824 | * Resync with fibre channel devices. | |
3825 | * | |
3826 | * Input: | |
3827 | * ha = adapter block pointer. | |
3828 | * | |
3829 | * Returns: | |
3830 | * 0 = success | |
3831 | */ | |
3832 | int | |
e315cd28 | 3833 | qla2x00_loop_resync(scsi_qla_host_t *vha) |
1da177e4 | 3834 | { |
73208dfd | 3835 | int rval = QLA_SUCCESS; |
1da177e4 | 3836 | uint32_t wait_time; |
67c2e93a AC |
3837 | struct req_que *req; |
3838 | struct rsp_que *rsp; | |
3839 | ||
7163ea81 | 3840 | if (vha->hw->flags.cpu_affinity_enabled) |
67c2e93a AC |
3841 | req = vha->hw->req_q_map[0]; |
3842 | else | |
3843 | req = vha->req; | |
3844 | rsp = req->rsp; | |
1da177e4 | 3845 | |
e315cd28 AC |
3846 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
3847 | if (vha->flags.online) { | |
3848 | if (!(rval = qla2x00_fw_ready(vha))) { | |
1da177e4 LT |
3849 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
3850 | wait_time = 256; | |
3851 | do { | |
0107109e | 3852 | /* Issue a marker after FW becomes ready. */ |
73208dfd AC |
3853 | qla2x00_marker(vha, req, rsp, 0, 0, |
3854 | MK_SYNC_ALL); | |
e315cd28 | 3855 | vha->marker_needed = 0; |
1da177e4 LT |
3856 | |
3857 | /* Remap devices on Loop. */ | |
e315cd28 | 3858 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1da177e4 | 3859 | |
e315cd28 | 3860 | qla2x00_configure_loop(vha); |
1da177e4 | 3861 | wait_time--; |
e315cd28 AC |
3862 | } while (!atomic_read(&vha->loop_down_timer) && |
3863 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
3864 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
3865 | &vha->dpc_flags))); | |
1da177e4 | 3866 | } |
1da177e4 LT |
3867 | } |
3868 | ||
e315cd28 | 3869 | if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) |
1da177e4 | 3870 | return (QLA_FUNCTION_FAILED); |
1da177e4 | 3871 | |
e315cd28 | 3872 | if (rval) |
7c3df132 SK |
3873 | ql_dbg(ql_dbg_disc, vha, 0x206c, |
3874 | "%s *** FAILED ***.\n", __func__); | |
1da177e4 LT |
3875 | |
3876 | return (rval); | |
3877 | } | |
3878 | ||
579d12b5 SK |
3879 | /* |
3880 | * qla2x00_perform_loop_resync | |
3881 | * Description: This function will set the appropriate flags and call | |
3882 | * qla2x00_loop_resync. If successful loop will be resynced | |
3883 | * Arguments : scsi_qla_host_t pointer | |
3884 | * returm : Success or Failure | |
3885 | */ | |
3886 | ||
3887 | int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) | |
3888 | { | |
3889 | int32_t rval = 0; | |
3890 | ||
3891 | if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { | |
3892 | /*Configure the flags so that resync happens properly*/ | |
3893 | atomic_set(&ha->loop_down_timer, 0); | |
3894 | if (!(ha->device_flags & DFLG_NO_CABLE)) { | |
3895 | atomic_set(&ha->loop_state, LOOP_UP); | |
3896 | set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); | |
3897 | set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); | |
3898 | set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); | |
3899 | ||
3900 | rval = qla2x00_loop_resync(ha); | |
3901 | } else | |
3902 | atomic_set(&ha->loop_state, LOOP_DEAD); | |
3903 | ||
3904 | clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); | |
3905 | } | |
3906 | ||
3907 | return rval; | |
3908 | } | |
3909 | ||
d97994dc | 3910 | void |
67becc00 | 3911 | qla2x00_update_fcports(scsi_qla_host_t *base_vha) |
d97994dc AV |
3912 | { |
3913 | fc_port_t *fcport; | |
feafb7b1 AE |
3914 | struct scsi_qla_host *vha; |
3915 | struct qla_hw_data *ha = base_vha->hw; | |
3916 | unsigned long flags; | |
d97994dc | 3917 | |
feafb7b1 | 3918 | spin_lock_irqsave(&ha->vport_slock, flags); |
d97994dc | 3919 | /* Go with deferred removal of rport references. */ |
feafb7b1 AE |
3920 | list_for_each_entry(vha, &base_vha->hw->vp_list, list) { |
3921 | atomic_inc(&vha->vref_count); | |
3922 | list_for_each_entry(fcport, &vha->vp_fcports, list) { | |
8ae598d0 | 3923 | if (fcport->drport && |
feafb7b1 AE |
3924 | atomic_read(&fcport->state) != FCS_UNCONFIGURED) { |
3925 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
3926 | ||
67becc00 | 3927 | qla2x00_rport_del(fcport); |
feafb7b1 AE |
3928 | |
3929 | spin_lock_irqsave(&ha->vport_slock, flags); | |
3930 | } | |
3931 | } | |
3932 | atomic_dec(&vha->vref_count); | |
3933 | } | |
3934 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
d97994dc AV |
3935 | } |
3936 | ||
579d12b5 SK |
3937 | /* |
3938 | * qla82xx_quiescent_state_cleanup | |
3939 | * Description: This function will block the new I/Os | |
3940 | * Its not aborting any I/Os as context | |
3941 | * is not destroyed during quiescence | |
3942 | * Arguments: scsi_qla_host_t | |
3943 | * return : void | |
3944 | */ | |
3945 | void | |
3946 | qla82xx_quiescent_state_cleanup(scsi_qla_host_t *vha) | |
3947 | { | |
3948 | struct qla_hw_data *ha = vha->hw; | |
3949 | struct scsi_qla_host *vp; | |
3950 | ||
7c3df132 SK |
3951 | ql_dbg(ql_dbg_p3p, vha, 0xb002, |
3952 | "Performing ISP error recovery - ha=%p.\n", ha); | |
579d12b5 SK |
3953 | |
3954 | atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); | |
3955 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { | |
3956 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
3957 | qla2x00_mark_all_devices_lost(vha, 0); | |
3958 | list_for_each_entry(vp, &ha->vp_list, list) | |
3959 | qla2x00_mark_all_devices_lost(vha, 0); | |
3960 | } else { | |
3961 | if (!atomic_read(&vha->loop_down_timer)) | |
3962 | atomic_set(&vha->loop_down_timer, | |
3963 | LOOP_DOWN_TIME); | |
3964 | } | |
3965 | /* Wait for pending cmds to complete */ | |
3966 | qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); | |
3967 | } | |
3968 | ||
a9083016 GM |
3969 | void |
3970 | qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) | |
3971 | { | |
3972 | struct qla_hw_data *ha = vha->hw; | |
579d12b5 | 3973 | struct scsi_qla_host *vp; |
feafb7b1 | 3974 | unsigned long flags; |
6aef87be | 3975 | fc_port_t *fcport; |
a9083016 | 3976 | |
e46ef004 SK |
3977 | /* For ISP82XX, driver waits for completion of the commands. |
3978 | * online flag should be set. | |
3979 | */ | |
3980 | if (!IS_QLA82XX(ha)) | |
3981 | vha->flags.online = 0; | |
a9083016 GM |
3982 | ha->flags.chip_reset_done = 0; |
3983 | clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
3984 | ha->qla_stats.total_isp_aborts++; | |
3985 | ||
7c3df132 SK |
3986 | ql_log(ql_log_info, vha, 0x00af, |
3987 | "Performing ISP error recovery - ha=%p.\n", ha); | |
a9083016 | 3988 | |
e46ef004 SK |
3989 | /* For ISP82XX, reset_chip is just disabling interrupts. |
3990 | * Driver waits for the completion of the commands. | |
3991 | * the interrupts need to be enabled. | |
3992 | */ | |
a9083016 GM |
3993 | if (!IS_QLA82XX(ha)) |
3994 | ha->isp_ops->reset_chip(vha); | |
3995 | ||
3996 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
3997 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { | |
3998 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
3999 | qla2x00_mark_all_devices_lost(vha, 0); | |
feafb7b1 AE |
4000 | |
4001 | spin_lock_irqsave(&ha->vport_slock, flags); | |
579d12b5 | 4002 | list_for_each_entry(vp, &ha->vp_list, list) { |
feafb7b1 AE |
4003 | atomic_inc(&vp->vref_count); |
4004 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
4005 | ||
a9083016 | 4006 | qla2x00_mark_all_devices_lost(vp, 0); |
feafb7b1 AE |
4007 | |
4008 | spin_lock_irqsave(&ha->vport_slock, flags); | |
4009 | atomic_dec(&vp->vref_count); | |
4010 | } | |
4011 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
a9083016 GM |
4012 | } else { |
4013 | if (!atomic_read(&vha->loop_down_timer)) | |
4014 | atomic_set(&vha->loop_down_timer, | |
4015 | LOOP_DOWN_TIME); | |
4016 | } | |
4017 | ||
6aef87be AV |
4018 | /* Clear all async request states across all VPs. */ |
4019 | list_for_each_entry(fcport, &vha->vp_fcports, list) | |
4020 | fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); | |
4021 | spin_lock_irqsave(&ha->vport_slock, flags); | |
4022 | list_for_each_entry(vp, &ha->vp_list, list) { | |
4023 | atomic_inc(&vp->vref_count); | |
4024 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
4025 | ||
4026 | list_for_each_entry(fcport, &vp->vp_fcports, list) | |
4027 | fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); | |
4028 | ||
4029 | spin_lock_irqsave(&ha->vport_slock, flags); | |
4030 | atomic_dec(&vp->vref_count); | |
4031 | } | |
4032 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
4033 | ||
bddd2d65 LC |
4034 | if (!ha->flags.eeh_busy) { |
4035 | /* Make sure for ISP 82XX IO DMA is complete */ | |
4036 | if (IS_QLA82XX(ha)) { | |
7190575f | 4037 | qla82xx_chip_reset_cleanup(vha); |
7c3df132 SK |
4038 | ql_log(ql_log_info, vha, 0x00b4, |
4039 | "Done chip reset cleanup.\n"); | |
a9083016 | 4040 | |
e46ef004 SK |
4041 | /* Done waiting for pending commands. |
4042 | * Reset the online flag. | |
4043 | */ | |
4044 | vha->flags.online = 0; | |
4d78c973 | 4045 | } |
a9083016 | 4046 | |
bddd2d65 LC |
4047 | /* Requeue all commands in outstanding command list. */ |
4048 | qla2x00_abort_all_cmds(vha, DID_RESET << 16); | |
4049 | } | |
a9083016 GM |
4050 | } |
4051 | ||
1da177e4 LT |
4052 | /* |
4053 | * qla2x00_abort_isp | |
4054 | * Resets ISP and aborts all outstanding commands. | |
4055 | * | |
4056 | * Input: | |
4057 | * ha = adapter block pointer. | |
4058 | * | |
4059 | * Returns: | |
4060 | * 0 = success | |
4061 | */ | |
4062 | int | |
e315cd28 | 4063 | qla2x00_abort_isp(scsi_qla_host_t *vha) |
1da177e4 | 4064 | { |
476e8978 | 4065 | int rval; |
1da177e4 | 4066 | uint8_t status = 0; |
e315cd28 AC |
4067 | struct qla_hw_data *ha = vha->hw; |
4068 | struct scsi_qla_host *vp; | |
73208dfd | 4069 | struct req_que *req = ha->req_q_map[0]; |
feafb7b1 | 4070 | unsigned long flags; |
1da177e4 | 4071 | |
e315cd28 | 4072 | if (vha->flags.online) { |
a9083016 | 4073 | qla2x00_abort_isp_cleanup(vha); |
1da177e4 | 4074 | |
85880801 AV |
4075 | if (unlikely(pci_channel_offline(ha->pdev) && |
4076 | ha->flags.pci_channel_io_perm_failure)) { | |
4077 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
4078 | status = 0; | |
4079 | return status; | |
4080 | } | |
4081 | ||
73208dfd | 4082 | ha->isp_ops->get_flash_version(vha, req->ring); |
30c47662 | 4083 | |
e315cd28 | 4084 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 4085 | |
e315cd28 AC |
4086 | if (!qla2x00_restart_isp(vha)) { |
4087 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
1da177e4 | 4088 | |
e315cd28 | 4089 | if (!atomic_read(&vha->loop_down_timer)) { |
1da177e4 LT |
4090 | /* |
4091 | * Issue marker command only when we are going | |
4092 | * to start the I/O . | |
4093 | */ | |
e315cd28 | 4094 | vha->marker_needed = 1; |
1da177e4 LT |
4095 | } |
4096 | ||
e315cd28 | 4097 | vha->flags.online = 1; |
1da177e4 | 4098 | |
fd34f556 | 4099 | ha->isp_ops->enable_intrs(ha); |
1da177e4 | 4100 | |
fa2a1ce5 | 4101 | ha->isp_abort_cnt = 0; |
e315cd28 | 4102 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
476e8978 | 4103 | |
29c5397f LC |
4104 | if (IS_QLA81XX(ha)) |
4105 | qla2x00_get_fw_version(vha, | |
4106 | &ha->fw_major_version, | |
4107 | &ha->fw_minor_version, | |
4108 | &ha->fw_subminor_version, | |
4109 | &ha->fw_attributes, &ha->fw_memory_size, | |
4110 | ha->mpi_version, &ha->mpi_capabilities, | |
4111 | ha->phy_version); | |
4112 | ||
df613b96 AV |
4113 | if (ha->fce) { |
4114 | ha->flags.fce_enabled = 1; | |
4115 | memset(ha->fce, 0, | |
4116 | fce_calc_size(ha->fce_bufs)); | |
e315cd28 | 4117 | rval = qla2x00_enable_fce_trace(vha, |
df613b96 AV |
4118 | ha->fce_dma, ha->fce_bufs, ha->fce_mb, |
4119 | &ha->fce_bufs); | |
4120 | if (rval) { | |
7c3df132 | 4121 | ql_log(ql_log_warn, vha, 0x8033, |
df613b96 AV |
4122 | "Unable to reinitialize FCE " |
4123 | "(%d).\n", rval); | |
4124 | ha->flags.fce_enabled = 0; | |
4125 | } | |
4126 | } | |
436a7b11 AV |
4127 | |
4128 | if (ha->eft) { | |
4129 | memset(ha->eft, 0, EFT_SIZE); | |
e315cd28 | 4130 | rval = qla2x00_enable_eft_trace(vha, |
436a7b11 AV |
4131 | ha->eft_dma, EFT_NUM_BUFFERS); |
4132 | if (rval) { | |
7c3df132 | 4133 | ql_log(ql_log_warn, vha, 0x8034, |
436a7b11 AV |
4134 | "Unable to reinitialize EFT " |
4135 | "(%d).\n", rval); | |
4136 | } | |
4137 | } | |
1da177e4 | 4138 | } else { /* failed the ISP abort */ |
e315cd28 AC |
4139 | vha->flags.online = 1; |
4140 | if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { | |
1da177e4 | 4141 | if (ha->isp_abort_cnt == 0) { |
7c3df132 SK |
4142 | ql_log(ql_log_fatal, vha, 0x8035, |
4143 | "ISP error recover failed - " | |
4144 | "board disabled.\n"); | |
fa2a1ce5 | 4145 | /* |
1da177e4 LT |
4146 | * The next call disables the board |
4147 | * completely. | |
4148 | */ | |
e315cd28 AC |
4149 | ha->isp_ops->reset_adapter(vha); |
4150 | vha->flags.online = 0; | |
1da177e4 | 4151 | clear_bit(ISP_ABORT_RETRY, |
e315cd28 | 4152 | &vha->dpc_flags); |
1da177e4 LT |
4153 | status = 0; |
4154 | } else { /* schedule another ISP abort */ | |
4155 | ha->isp_abort_cnt--; | |
7c3df132 SK |
4156 | ql_dbg(ql_dbg_taskm, vha, 0x8020, |
4157 | "ISP abort - retry remaining %d.\n", | |
4158 | ha->isp_abort_cnt); | |
1da177e4 LT |
4159 | status = 1; |
4160 | } | |
4161 | } else { | |
4162 | ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; | |
7c3df132 SK |
4163 | ql_dbg(ql_dbg_taskm, vha, 0x8021, |
4164 | "ISP error recovery - retrying (%d) " | |
4165 | "more times.\n", ha->isp_abort_cnt); | |
e315cd28 | 4166 | set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
1da177e4 LT |
4167 | status = 1; |
4168 | } | |
4169 | } | |
fa2a1ce5 | 4170 | |
1da177e4 LT |
4171 | } |
4172 | ||
e315cd28 | 4173 | if (!status) { |
7c3df132 | 4174 | ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); |
feafb7b1 AE |
4175 | |
4176 | spin_lock_irqsave(&ha->vport_slock, flags); | |
4177 | list_for_each_entry(vp, &ha->vp_list, list) { | |
4178 | if (vp->vp_idx) { | |
4179 | atomic_inc(&vp->vref_count); | |
4180 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
4181 | ||
e315cd28 | 4182 | qla2x00_vp_abort_isp(vp); |
feafb7b1 AE |
4183 | |
4184 | spin_lock_irqsave(&ha->vport_slock, flags); | |
4185 | atomic_dec(&vp->vref_count); | |
4186 | } | |
e315cd28 | 4187 | } |
feafb7b1 AE |
4188 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
4189 | ||
e315cd28 | 4190 | } else { |
7c3df132 | 4191 | ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n"); |
1da177e4 LT |
4192 | } |
4193 | ||
4194 | return(status); | |
4195 | } | |
4196 | ||
4197 | /* | |
4198 | * qla2x00_restart_isp | |
4199 | * restarts the ISP after a reset | |
4200 | * | |
4201 | * Input: | |
4202 | * ha = adapter block pointer. | |
4203 | * | |
4204 | * Returns: | |
4205 | * 0 = success | |
4206 | */ | |
4207 | static int | |
e315cd28 | 4208 | qla2x00_restart_isp(scsi_qla_host_t *vha) |
1da177e4 | 4209 | { |
c6b2fca8 | 4210 | int status = 0; |
1da177e4 | 4211 | uint32_t wait_time; |
e315cd28 | 4212 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
4213 | struct req_que *req = ha->req_q_map[0]; |
4214 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
1da177e4 LT |
4215 | |
4216 | /* If firmware needs to be loaded */ | |
e315cd28 AC |
4217 | if (qla2x00_isp_firmware(vha)) { |
4218 | vha->flags.online = 0; | |
4219 | status = ha->isp_ops->chip_diag(vha); | |
4220 | if (!status) | |
4221 | status = qla2x00_setup_chip(vha); | |
1da177e4 LT |
4222 | } |
4223 | ||
e315cd28 AC |
4224 | if (!status && !(status = qla2x00_init_rings(vha))) { |
4225 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
2533cf67 | 4226 | ha->flags.chip_reset_done = 1; |
73208dfd AC |
4227 | /* Initialize the queues in use */ |
4228 | qla25xx_init_queues(ha); | |
4229 | ||
e315cd28 AC |
4230 | status = qla2x00_fw_ready(vha); |
4231 | if (!status) { | |
7c3df132 SK |
4232 | ql_dbg(ql_dbg_taskm, vha, 0x8031, |
4233 | "Start configure loop status = %d.\n", status); | |
0107109e AV |
4234 | |
4235 | /* Issue a marker after FW becomes ready. */ | |
73208dfd | 4236 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
0107109e | 4237 | |
e315cd28 | 4238 | vha->flags.online = 1; |
1da177e4 LT |
4239 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
4240 | wait_time = 256; | |
4241 | do { | |
e315cd28 AC |
4242 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
4243 | qla2x00_configure_loop(vha); | |
1da177e4 | 4244 | wait_time--; |
e315cd28 AC |
4245 | } while (!atomic_read(&vha->loop_down_timer) && |
4246 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
4247 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
4248 | &vha->dpc_flags))); | |
1da177e4 LT |
4249 | } |
4250 | ||
4251 | /* if no cable then assume it's good */ | |
e315cd28 | 4252 | if ((vha->device_flags & DFLG_NO_CABLE)) |
1da177e4 LT |
4253 | status = 0; |
4254 | ||
7c3df132 SK |
4255 | ql_dbg(ql_dbg_taskm, vha, 0x8032, |
4256 | "Configure loop done, status = 0x%x.\n", status); | |
1da177e4 LT |
4257 | } |
4258 | return (status); | |
4259 | } | |
4260 | ||
73208dfd AC |
4261 | static int |
4262 | qla25xx_init_queues(struct qla_hw_data *ha) | |
4263 | { | |
4264 | struct rsp_que *rsp = NULL; | |
4265 | struct req_que *req = NULL; | |
4266 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
4267 | int ret = -1; | |
4268 | int i; | |
4269 | ||
2afa19a9 | 4270 | for (i = 1; i < ha->max_rsp_queues; i++) { |
73208dfd AC |
4271 | rsp = ha->rsp_q_map[i]; |
4272 | if (rsp) { | |
4273 | rsp->options &= ~BIT_0; | |
618a7523 | 4274 | ret = qla25xx_init_rsp_que(base_vha, rsp); |
73208dfd | 4275 | if (ret != QLA_SUCCESS) |
7c3df132 SK |
4276 | ql_dbg(ql_dbg_init, base_vha, 0x00ff, |
4277 | "%s Rsp que: %d init failed.\n", | |
4278 | __func__, rsp->id); | |
73208dfd | 4279 | else |
7c3df132 SK |
4280 | ql_dbg(ql_dbg_init, base_vha, 0x0100, |
4281 | "%s Rsp que: %d inited.\n", | |
4282 | __func__, rsp->id); | |
73208dfd | 4283 | } |
2afa19a9 AC |
4284 | } |
4285 | for (i = 1; i < ha->max_req_queues; i++) { | |
73208dfd AC |
4286 | req = ha->req_q_map[i]; |
4287 | if (req) { | |
29bdccbe | 4288 | /* Clear outstanding commands array. */ |
73208dfd | 4289 | req->options &= ~BIT_0; |
618a7523 | 4290 | ret = qla25xx_init_req_que(base_vha, req); |
73208dfd | 4291 | if (ret != QLA_SUCCESS) |
7c3df132 SK |
4292 | ql_dbg(ql_dbg_init, base_vha, 0x0101, |
4293 | "%s Req que: %d init failed.\n", | |
4294 | __func__, req->id); | |
73208dfd | 4295 | else |
7c3df132 SK |
4296 | ql_dbg(ql_dbg_init, base_vha, 0x0102, |
4297 | "%s Req que: %d inited.\n", | |
4298 | __func__, req->id); | |
73208dfd AC |
4299 | } |
4300 | } | |
4301 | return ret; | |
4302 | } | |
4303 | ||
1da177e4 LT |
4304 | /* |
4305 | * qla2x00_reset_adapter | |
4306 | * Reset adapter. | |
4307 | * | |
4308 | * Input: | |
4309 | * ha = adapter block pointer. | |
4310 | */ | |
abbd8870 | 4311 | void |
e315cd28 | 4312 | qla2x00_reset_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
4313 | { |
4314 | unsigned long flags = 0; | |
e315cd28 | 4315 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 4316 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 4317 | |
e315cd28 | 4318 | vha->flags.online = 0; |
fd34f556 | 4319 | ha->isp_ops->disable_intrs(ha); |
1da177e4 | 4320 | |
1da177e4 LT |
4321 | spin_lock_irqsave(&ha->hardware_lock, flags); |
4322 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
4323 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
4324 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
4325 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
4326 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
4327 | } | |
0107109e AV |
4328 | |
4329 | void | |
e315cd28 | 4330 | qla24xx_reset_adapter(scsi_qla_host_t *vha) |
0107109e AV |
4331 | { |
4332 | unsigned long flags = 0; | |
e315cd28 | 4333 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
4334 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
4335 | ||
a9083016 GM |
4336 | if (IS_QLA82XX(ha)) |
4337 | return; | |
4338 | ||
e315cd28 | 4339 | vha->flags.online = 0; |
fd34f556 | 4340 | ha->isp_ops->disable_intrs(ha); |
0107109e AV |
4341 | |
4342 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
4343 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); | |
4344 | RD_REG_DWORD(®->hccr); | |
4345 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
4346 | RD_REG_DWORD(®->hccr); | |
4347 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
09ff36d3 AV |
4348 | |
4349 | if (IS_NOPOLLING_TYPE(ha)) | |
4350 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
4351 | } |
4352 | ||
4e08df3f DM |
4353 | /* On sparc systems, obtain port and node WWN from firmware |
4354 | * properties. | |
4355 | */ | |
e315cd28 AC |
4356 | static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, |
4357 | struct nvram_24xx *nv) | |
4e08df3f DM |
4358 | { |
4359 | #ifdef CONFIG_SPARC | |
e315cd28 | 4360 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 4361 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
4362 | struct device_node *dp = pci_device_to_OF_node(pdev); |
4363 | const u8 *val; | |
4e08df3f DM |
4364 | int len; |
4365 | ||
4366 | val = of_get_property(dp, "port-wwn", &len); | |
4367 | if (val && len >= WWN_SIZE) | |
4368 | memcpy(nv->port_name, val, WWN_SIZE); | |
4369 | ||
4370 | val = of_get_property(dp, "node-wwn", &len); | |
4371 | if (val && len >= WWN_SIZE) | |
4372 | memcpy(nv->node_name, val, WWN_SIZE); | |
4373 | #endif | |
4374 | } | |
4375 | ||
0107109e | 4376 | int |
e315cd28 | 4377 | qla24xx_nvram_config(scsi_qla_host_t *vha) |
0107109e | 4378 | { |
4e08df3f | 4379 | int rval; |
0107109e AV |
4380 | struct init_cb_24xx *icb; |
4381 | struct nvram_24xx *nv; | |
4382 | uint32_t *dptr; | |
4383 | uint8_t *dptr1, *dptr2; | |
4384 | uint32_t chksum; | |
4385 | uint16_t cnt; | |
e315cd28 | 4386 | struct qla_hw_data *ha = vha->hw; |
0107109e | 4387 | |
4e08df3f | 4388 | rval = QLA_SUCCESS; |
0107109e | 4389 | icb = (struct init_cb_24xx *)ha->init_cb; |
281afe19 | 4390 | nv = ha->nvram; |
0107109e AV |
4391 | |
4392 | /* Determine NVRAM starting address. */ | |
e5b68a61 AC |
4393 | if (ha->flags.port0) { |
4394 | ha->nvram_base = FA_NVRAM_FUNC0_ADDR; | |
4395 | ha->vpd_base = FA_NVRAM_VPD0_ADDR; | |
4396 | } else { | |
0107109e | 4397 | ha->nvram_base = FA_NVRAM_FUNC1_ADDR; |
6f641790 AV |
4398 | ha->vpd_base = FA_NVRAM_VPD1_ADDR; |
4399 | } | |
e5b68a61 AC |
4400 | ha->nvram_size = sizeof(struct nvram_24xx); |
4401 | ha->vpd_size = FA_NVRAM_VPD_SIZE; | |
a9083016 GM |
4402 | if (IS_QLA82XX(ha)) |
4403 | ha->vpd_size = FA_VPD_SIZE_82XX; | |
0107109e | 4404 | |
281afe19 SJ |
4405 | /* Get VPD data into cache */ |
4406 | ha->vpd = ha->nvram + VPD_OFFSET; | |
e315cd28 | 4407 | ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, |
281afe19 SJ |
4408 | ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); |
4409 | ||
4410 | /* Get NVRAM data into cache and calculate checksum. */ | |
0107109e | 4411 | dptr = (uint32_t *)nv; |
e315cd28 | 4412 | ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, |
0107109e AV |
4413 | ha->nvram_size); |
4414 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) | |
4415 | chksum += le32_to_cpu(*dptr++); | |
4416 | ||
7c3df132 SK |
4417 | ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, |
4418 | "Contents of NVRAM\n"); | |
4419 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, | |
4420 | (uint8_t *)nv, ha->nvram_size); | |
0107109e AV |
4421 | |
4422 | /* Bad NVRAM data, set defaults parameters. */ | |
4423 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
4424 | || nv->id[3] != ' ' || | |
4425 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
4426 | /* Reset NVRAM data. */ | |
7c3df132 SK |
4427 | ql_log(ql_log_warn, vha, 0x006b, |
4428 | "Inconisistent NVRAM detected: checksum=0x%x id=%c " | |
4429 | "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); | |
4430 | ql_log(ql_log_warn, vha, 0x006c, | |
4431 | "Falling back to functioning (yet invalid -- WWPN) " | |
4432 | "defaults.\n"); | |
4e08df3f DM |
4433 | |
4434 | /* | |
4435 | * Set default initialization control block. | |
4436 | */ | |
4437 | memset(nv, 0, ha->nvram_size); | |
4438 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
4439 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
4440 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
4441 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
4442 | nv->exchange_count = __constant_cpu_to_le16(0); | |
4443 | nv->hard_address = __constant_cpu_to_le16(124); | |
4444 | nv->port_name[0] = 0x21; | |
e5b68a61 | 4445 | nv->port_name[1] = 0x00 + ha->port_no; |
4e08df3f DM |
4446 | nv->port_name[2] = 0x00; |
4447 | nv->port_name[3] = 0xe0; | |
4448 | nv->port_name[4] = 0x8b; | |
4449 | nv->port_name[5] = 0x1c; | |
4450 | nv->port_name[6] = 0x55; | |
4451 | nv->port_name[7] = 0x86; | |
4452 | nv->node_name[0] = 0x20; | |
4453 | nv->node_name[1] = 0x00; | |
4454 | nv->node_name[2] = 0x00; | |
4455 | nv->node_name[3] = 0xe0; | |
4456 | nv->node_name[4] = 0x8b; | |
4457 | nv->node_name[5] = 0x1c; | |
4458 | nv->node_name[6] = 0x55; | |
4459 | nv->node_name[7] = 0x86; | |
e315cd28 | 4460 | qla24xx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
4461 | nv->login_retry_count = __constant_cpu_to_le16(8); |
4462 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
4463 | nv->login_timeout = __constant_cpu_to_le16(0); | |
4464 | nv->firmware_options_1 = | |
4465 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
4466 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
4467 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
4468 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
4469 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
4470 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
4471 | nv->reset_delay = 5; | |
4472 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
4473 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
4474 | nv->link_down_timeout = __constant_cpu_to_le16(30); | |
4475 | ||
4476 | rval = 1; | |
0107109e AV |
4477 | } |
4478 | ||
4479 | /* Reset Initialization control block */ | |
e315cd28 | 4480 | memset(icb, 0, ha->init_cb_size); |
0107109e AV |
4481 | |
4482 | /* Copy 1st segment. */ | |
4483 | dptr1 = (uint8_t *)icb; | |
4484 | dptr2 = (uint8_t *)&nv->version; | |
4485 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
4486 | while (cnt--) | |
4487 | *dptr1++ = *dptr2++; | |
4488 | ||
4489 | icb->login_retry_count = nv->login_retry_count; | |
3ea66e28 | 4490 | icb->link_down_on_nos = nv->link_down_on_nos; |
0107109e AV |
4491 | |
4492 | /* Copy 2nd segment. */ | |
4493 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
4494 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
4495 | cnt = (uint8_t *)&icb->reserved_3 - | |
4496 | (uint8_t *)&icb->interrupt_delay_timer; | |
4497 | while (cnt--) | |
4498 | *dptr1++ = *dptr2++; | |
4499 | ||
4500 | /* | |
4501 | * Setup driver NVRAM options. | |
4502 | */ | |
e315cd28 | 4503 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), |
9bb9fcf2 | 4504 | "QLA2462"); |
0107109e | 4505 | |
5341e868 AV |
4506 | /* Use alternate WWN? */ |
4507 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
4508 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
4509 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
4510 | } | |
4511 | ||
0107109e | 4512 | /* Prepare nodename */ |
fd0e7e4d | 4513 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { |
0107109e AV |
4514 | /* |
4515 | * Firmware will apply the following mask if the nodename was | |
4516 | * not provided. | |
4517 | */ | |
4518 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
4519 | icb->node_name[0] &= 0xF0; | |
4520 | } | |
4521 | ||
4522 | /* Set host adapter parameters. */ | |
4523 | ha->flags.disable_risc_code_load = 0; | |
0c8c39af AV |
4524 | ha->flags.enable_lip_reset = 0; |
4525 | ha->flags.enable_lip_full_login = | |
4526 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
4527 | ha->flags.enable_target_reset = | |
4528 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
0107109e | 4529 | ha->flags.enable_led_scheme = 0; |
d4c760c2 | 4530 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; |
0107109e | 4531 | |
fd0e7e4d AV |
4532 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & |
4533 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
0107109e AV |
4534 | |
4535 | memcpy(ha->fw_seriallink_options24, nv->seriallink_options, | |
4536 | sizeof(ha->fw_seriallink_options24)); | |
4537 | ||
4538 | /* save HBA serial number */ | |
4539 | ha->serial0 = icb->port_name[5]; | |
4540 | ha->serial1 = icb->port_name[6]; | |
4541 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
4542 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
4543 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
0107109e | 4544 | |
bc8fb3cb AV |
4545 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); |
4546 | ||
0107109e AV |
4547 | ha->retry_count = le16_to_cpu(nv->login_retry_count); |
4548 | ||
4549 | /* Set minimum login_timeout to 4 seconds. */ | |
4550 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
4551 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
4552 | if (le16_to_cpu(nv->login_timeout) < 4) | |
4553 | nv->login_timeout = __constant_cpu_to_le16(4); | |
4554 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
c6852c4c | 4555 | icb->login_timeout = nv->login_timeout; |
0107109e | 4556 | |
00a537b8 AV |
4557 | /* Set minimum RATOV to 100 tenths of a second. */ |
4558 | ha->r_a_tov = 100; | |
0107109e AV |
4559 | |
4560 | ha->loop_reset_delay = nv->reset_delay; | |
4561 | ||
4562 | /* Link Down Timeout = 0: | |
4563 | * | |
4564 | * When Port Down timer expires we will start returning | |
4565 | * I/O's to OS with "DID_NO_CONNECT". | |
4566 | * | |
4567 | * Link Down Timeout != 0: | |
4568 | * | |
4569 | * The driver waits for the link to come up after link down | |
4570 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
4571 | */ | |
4572 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
4573 | ha->loop_down_abort_time = | |
4574 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
4575 | } else { | |
4576 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
4577 | ha->loop_down_abort_time = | |
4578 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
4579 | } | |
4580 | ||
4581 | /* Need enough time to try and get the port back. */ | |
4582 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
4583 | if (qlport_down_retry) | |
4584 | ha->port_down_retry_count = qlport_down_retry; | |
4585 | ||
4586 | /* Set login_retry_count */ | |
4587 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
4588 | if (ha->port_down_retry_count == | |
4589 | le16_to_cpu(nv->port_down_retry_count) && | |
4590 | ha->port_down_retry_count > 3) | |
4591 | ha->login_retry_count = ha->port_down_retry_count; | |
4592 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
4593 | ha->login_retry_count = ha->port_down_retry_count; | |
4594 | if (ql2xloginretrycount) | |
4595 | ha->login_retry_count = ql2xloginretrycount; | |
4596 | ||
4fdfefe5 | 4597 | /* Enable ZIO. */ |
e315cd28 | 4598 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
4599 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & |
4600 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
4601 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
4602 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
4603 | } | |
4604 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
4605 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
e315cd28 | 4606 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 4607 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d AV |
4608 | ha->zio_mode = QLA_ZIO_MODE_6; |
4609 | ||
7c3df132 | 4610 | ql_log(ql_log_info, vha, 0x006f, |
4fdfefe5 AV |
4611 | "ZIO mode %d enabled; timer delay (%d us).\n", |
4612 | ha->zio_mode, ha->zio_timer * 100); | |
4613 | ||
4614 | icb->firmware_options_2 |= cpu_to_le32( | |
4615 | (uint32_t)ha->zio_mode); | |
4616 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
e315cd28 | 4617 | vha->flags.process_response_queue = 1; |
4fdfefe5 AV |
4618 | } |
4619 | ||
4e08df3f | 4620 | if (rval) { |
7c3df132 SK |
4621 | ql_log(ql_log_warn, vha, 0x0070, |
4622 | "NVRAM configuration failed.\n"); | |
4e08df3f DM |
4623 | } |
4624 | return (rval); | |
0107109e AV |
4625 | } |
4626 | ||
413975a0 | 4627 | static int |
cbc8eb67 AV |
4628 | qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, |
4629 | uint32_t faddr) | |
d1c61909 | 4630 | { |
73208dfd | 4631 | int rval = QLA_SUCCESS; |
d1c61909 | 4632 | int segments, fragment; |
d1c61909 AV |
4633 | uint32_t *dcode, dlen; |
4634 | uint32_t risc_addr; | |
4635 | uint32_t risc_size; | |
4636 | uint32_t i; | |
e315cd28 | 4637 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4638 | struct req_que *req = ha->req_q_map[0]; |
eaac30be | 4639 | |
7c3df132 SK |
4640 | ql_dbg(ql_dbg_init, vha, 0x008b, |
4641 | "Loading firmware from flash (%x).\n", faddr); | |
eaac30be | 4642 | |
d1c61909 AV |
4643 | rval = QLA_SUCCESS; |
4644 | ||
4645 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 4646 | dcode = (uint32_t *)req->ring; |
d1c61909 AV |
4647 | *srisc_addr = 0; |
4648 | ||
4649 | /* Validate firmware image by checking version. */ | |
e315cd28 | 4650 | qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); |
d1c61909 AV |
4651 | for (i = 0; i < 4; i++) |
4652 | dcode[i] = be32_to_cpu(dcode[i]); | |
4653 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
4654 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
4655 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
4656 | dcode[3] == 0)) { | |
7c3df132 SK |
4657 | ql_log(ql_log_fatal, vha, 0x008c, |
4658 | "Unable to verify the integrity of flash firmware " | |
4659 | "image.\n"); | |
4660 | ql_log(ql_log_fatal, vha, 0x008d, | |
4661 | "Firmware data: %08x %08x %08x %08x.\n", | |
4662 | dcode[0], dcode[1], dcode[2], dcode[3]); | |
d1c61909 AV |
4663 | |
4664 | return QLA_FUNCTION_FAILED; | |
4665 | } | |
4666 | ||
4667 | while (segments && rval == QLA_SUCCESS) { | |
4668 | /* Read segment's load information. */ | |
e315cd28 | 4669 | qla24xx_read_flash_data(vha, dcode, faddr, 4); |
d1c61909 AV |
4670 | |
4671 | risc_addr = be32_to_cpu(dcode[2]); | |
4672 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
4673 | risc_size = be32_to_cpu(dcode[3]); | |
4674 | ||
4675 | fragment = 0; | |
4676 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4677 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
4678 | if (dlen > risc_size) | |
4679 | dlen = risc_size; | |
4680 | ||
7c3df132 SK |
4681 | ql_dbg(ql_dbg_init, vha, 0x008e, |
4682 | "Loading risc segment@ risc addr %x " | |
4683 | "number of dwords 0x%x offset 0x%x.\n", | |
4684 | risc_addr, dlen, faddr); | |
d1c61909 | 4685 | |
e315cd28 | 4686 | qla24xx_read_flash_data(vha, dcode, faddr, dlen); |
d1c61909 AV |
4687 | for (i = 0; i < dlen; i++) |
4688 | dcode[i] = swab32(dcode[i]); | |
4689 | ||
73208dfd | 4690 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
d1c61909 AV |
4691 | dlen); |
4692 | if (rval) { | |
7c3df132 SK |
4693 | ql_log(ql_log_fatal, vha, 0x008f, |
4694 | "Failed to load segment %d of firmware.\n", | |
4695 | fragment); | |
d1c61909 AV |
4696 | break; |
4697 | } | |
4698 | ||
4699 | faddr += dlen; | |
4700 | risc_addr += dlen; | |
4701 | risc_size -= dlen; | |
4702 | fragment++; | |
4703 | } | |
4704 | ||
4705 | /* Next segment. */ | |
4706 | segments--; | |
4707 | } | |
4708 | ||
4709 | return rval; | |
4710 | } | |
4711 | ||
d1c61909 AV |
4712 | #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/" |
4713 | ||
0107109e | 4714 | int |
e315cd28 | 4715 | qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) |
5433383e AV |
4716 | { |
4717 | int rval; | |
4718 | int i, fragment; | |
4719 | uint16_t *wcode, *fwcode; | |
4720 | uint32_t risc_addr, risc_size, fwclen, wlen, *seg; | |
4721 | struct fw_blob *blob; | |
e315cd28 | 4722 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4723 | struct req_que *req = ha->req_q_map[0]; |
5433383e AV |
4724 | |
4725 | /* Load firmware blob. */ | |
e315cd28 | 4726 | blob = qla2x00_request_firmware(vha); |
5433383e | 4727 | if (!blob) { |
7c3df132 SK |
4728 | ql_log(ql_log_info, vha, 0x0083, |
4729 | "Fimware image unavailable.\n"); | |
4730 | ql_log(ql_log_info, vha, 0x0084, | |
4731 | "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); | |
5433383e AV |
4732 | return QLA_FUNCTION_FAILED; |
4733 | } | |
4734 | ||
4735 | rval = QLA_SUCCESS; | |
4736 | ||
73208dfd | 4737 | wcode = (uint16_t *)req->ring; |
5433383e AV |
4738 | *srisc_addr = 0; |
4739 | fwcode = (uint16_t *)blob->fw->data; | |
4740 | fwclen = 0; | |
4741 | ||
4742 | /* Validate firmware image by checking version. */ | |
4743 | if (blob->fw->size < 8 * sizeof(uint16_t)) { | |
7c3df132 SK |
4744 | ql_log(ql_log_fatal, vha, 0x0085, |
4745 | "Unable to verify integrity of firmware image (%Zd).\n", | |
5433383e AV |
4746 | blob->fw->size); |
4747 | goto fail_fw_integrity; | |
4748 | } | |
4749 | for (i = 0; i < 4; i++) | |
4750 | wcode[i] = be16_to_cpu(fwcode[i + 4]); | |
4751 | if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && | |
4752 | wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && | |
4753 | wcode[2] == 0 && wcode[3] == 0)) { | |
7c3df132 SK |
4754 | ql_log(ql_log_fatal, vha, 0x0086, |
4755 | "Unable to verify integrity of firmware image.\n"); | |
4756 | ql_log(ql_log_fatal, vha, 0x0087, | |
4757 | "Firmware data: %04x %04x %04x %04x.\n", | |
4758 | wcode[0], wcode[1], wcode[2], wcode[3]); | |
5433383e AV |
4759 | goto fail_fw_integrity; |
4760 | } | |
4761 | ||
4762 | seg = blob->segs; | |
4763 | while (*seg && rval == QLA_SUCCESS) { | |
4764 | risc_addr = *seg; | |
4765 | *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; | |
4766 | risc_size = be16_to_cpu(fwcode[3]); | |
4767 | ||
4768 | /* Validate firmware image size. */ | |
4769 | fwclen += risc_size * sizeof(uint16_t); | |
4770 | if (blob->fw->size < fwclen) { | |
7c3df132 | 4771 | ql_log(ql_log_fatal, vha, 0x0088, |
5433383e | 4772 | "Unable to verify integrity of firmware image " |
7c3df132 | 4773 | "(%Zd).\n", blob->fw->size); |
5433383e AV |
4774 | goto fail_fw_integrity; |
4775 | } | |
4776 | ||
4777 | fragment = 0; | |
4778 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4779 | wlen = (uint16_t)(ha->fw_transfer_size >> 1); | |
4780 | if (wlen > risc_size) | |
4781 | wlen = risc_size; | |
7c3df132 SK |
4782 | ql_dbg(ql_dbg_init, vha, 0x0089, |
4783 | "Loading risc segment@ risc addr %x number of " | |
4784 | "words 0x%x.\n", risc_addr, wlen); | |
5433383e AV |
4785 | |
4786 | for (i = 0; i < wlen; i++) | |
4787 | wcode[i] = swab16(fwcode[i]); | |
4788 | ||
73208dfd | 4789 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
5433383e AV |
4790 | wlen); |
4791 | if (rval) { | |
7c3df132 SK |
4792 | ql_log(ql_log_fatal, vha, 0x008a, |
4793 | "Failed to load segment %d of firmware.\n", | |
4794 | fragment); | |
5433383e AV |
4795 | break; |
4796 | } | |
4797 | ||
4798 | fwcode += wlen; | |
4799 | risc_addr += wlen; | |
4800 | risc_size -= wlen; | |
4801 | fragment++; | |
4802 | } | |
4803 | ||
4804 | /* Next segment. */ | |
4805 | seg++; | |
4806 | } | |
4807 | return rval; | |
4808 | ||
4809 | fail_fw_integrity: | |
4810 | return QLA_FUNCTION_FAILED; | |
4811 | } | |
4812 | ||
eaac30be AV |
4813 | static int |
4814 | qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
0107109e AV |
4815 | { |
4816 | int rval; | |
4817 | int segments, fragment; | |
4818 | uint32_t *dcode, dlen; | |
4819 | uint32_t risc_addr; | |
4820 | uint32_t risc_size; | |
4821 | uint32_t i; | |
5433383e | 4822 | struct fw_blob *blob; |
0107109e | 4823 | uint32_t *fwcode, fwclen; |
e315cd28 | 4824 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4825 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 4826 | |
5433383e | 4827 | /* Load firmware blob. */ |
e315cd28 | 4828 | blob = qla2x00_request_firmware(vha); |
5433383e | 4829 | if (!blob) { |
7c3df132 SK |
4830 | ql_log(ql_log_warn, vha, 0x0090, |
4831 | "Fimware image unavailable.\n"); | |
4832 | ql_log(ql_log_warn, vha, 0x0091, | |
4833 | "Firmware images can be retrieved from: " | |
4834 | QLA_FW_URL ".\n"); | |
d1c61909 | 4835 | |
eaac30be | 4836 | return QLA_FUNCTION_FAILED; |
0107109e AV |
4837 | } |
4838 | ||
7c3df132 SK |
4839 | ql_log(ql_log_info, vha, 0x0092, |
4840 | "Loading via request-firmware.\n"); | |
eaac30be | 4841 | |
0107109e AV |
4842 | rval = QLA_SUCCESS; |
4843 | ||
4844 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 4845 | dcode = (uint32_t *)req->ring; |
0107109e | 4846 | *srisc_addr = 0; |
5433383e | 4847 | fwcode = (uint32_t *)blob->fw->data; |
0107109e AV |
4848 | fwclen = 0; |
4849 | ||
4850 | /* Validate firmware image by checking version. */ | |
5433383e | 4851 | if (blob->fw->size < 8 * sizeof(uint32_t)) { |
7c3df132 SK |
4852 | ql_log(ql_log_fatal, vha, 0x0093, |
4853 | "Unable to verify integrity of firmware image (%Zd).\n", | |
5433383e | 4854 | blob->fw->size); |
0107109e AV |
4855 | goto fail_fw_integrity; |
4856 | } | |
4857 | for (i = 0; i < 4; i++) | |
4858 | dcode[i] = be32_to_cpu(fwcode[i + 4]); | |
4859 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
4860 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
4861 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
4862 | dcode[3] == 0)) { | |
7c3df132 SK |
4863 | ql_log(ql_log_fatal, vha, 0x0094, |
4864 | "Unable to verify integrity of firmware image (%Zd).\n", | |
4865 | blob->fw->size); | |
4866 | ql_log(ql_log_fatal, vha, 0x0095, | |
4867 | "Firmware data: %08x %08x %08x %08x.\n", | |
4868 | dcode[0], dcode[1], dcode[2], dcode[3]); | |
0107109e AV |
4869 | goto fail_fw_integrity; |
4870 | } | |
4871 | ||
4872 | while (segments && rval == QLA_SUCCESS) { | |
4873 | risc_addr = be32_to_cpu(fwcode[2]); | |
4874 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
4875 | risc_size = be32_to_cpu(fwcode[3]); | |
4876 | ||
4877 | /* Validate firmware image size. */ | |
4878 | fwclen += risc_size * sizeof(uint32_t); | |
5433383e | 4879 | if (blob->fw->size < fwclen) { |
7c3df132 | 4880 | ql_log(ql_log_fatal, vha, 0x0096, |
5433383e | 4881 | "Unable to verify integrity of firmware image " |
7c3df132 | 4882 | "(%Zd).\n", blob->fw->size); |
5433383e | 4883 | |
0107109e AV |
4884 | goto fail_fw_integrity; |
4885 | } | |
4886 | ||
4887 | fragment = 0; | |
4888 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4889 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
4890 | if (dlen > risc_size) | |
4891 | dlen = risc_size; | |
4892 | ||
7c3df132 SK |
4893 | ql_dbg(ql_dbg_init, vha, 0x0097, |
4894 | "Loading risc segment@ risc addr %x " | |
4895 | "number of dwords 0x%x.\n", risc_addr, dlen); | |
0107109e AV |
4896 | |
4897 | for (i = 0; i < dlen; i++) | |
4898 | dcode[i] = swab32(fwcode[i]); | |
4899 | ||
73208dfd | 4900 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
590f98e5 | 4901 | dlen); |
0107109e | 4902 | if (rval) { |
7c3df132 SK |
4903 | ql_log(ql_log_fatal, vha, 0x0098, |
4904 | "Failed to load segment %d of firmware.\n", | |
4905 | fragment); | |
0107109e AV |
4906 | break; |
4907 | } | |
4908 | ||
4909 | fwcode += dlen; | |
4910 | risc_addr += dlen; | |
4911 | risc_size -= dlen; | |
4912 | fragment++; | |
4913 | } | |
4914 | ||
4915 | /* Next segment. */ | |
4916 | segments--; | |
4917 | } | |
0107109e AV |
4918 | return rval; |
4919 | ||
4920 | fail_fw_integrity: | |
0107109e | 4921 | return QLA_FUNCTION_FAILED; |
0107109e | 4922 | } |
18c6c127 | 4923 | |
eaac30be AV |
4924 | int |
4925 | qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4926 | { | |
4927 | int rval; | |
4928 | ||
e337d907 AV |
4929 | if (ql2xfwloadbin == 1) |
4930 | return qla81xx_load_risc(vha, srisc_addr); | |
4931 | ||
eaac30be AV |
4932 | /* |
4933 | * FW Load priority: | |
4934 | * 1) Firmware via request-firmware interface (.bin file). | |
4935 | * 2) Firmware residing in flash. | |
4936 | */ | |
4937 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4938 | if (rval == QLA_SUCCESS) | |
4939 | return rval; | |
4940 | ||
cbc8eb67 AV |
4941 | return qla24xx_load_risc_flash(vha, srisc_addr, |
4942 | vha->hw->flt_region_fw); | |
eaac30be AV |
4943 | } |
4944 | ||
4945 | int | |
4946 | qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4947 | { | |
4948 | int rval; | |
cbc8eb67 | 4949 | struct qla_hw_data *ha = vha->hw; |
eaac30be | 4950 | |
e337d907 | 4951 | if (ql2xfwloadbin == 2) |
cbc8eb67 | 4952 | goto try_blob_fw; |
e337d907 | 4953 | |
eaac30be AV |
4954 | /* |
4955 | * FW Load priority: | |
4956 | * 1) Firmware residing in flash. | |
4957 | * 2) Firmware via request-firmware interface (.bin file). | |
cbc8eb67 | 4958 | * 3) Golden-Firmware residing in flash -- limited operation. |
eaac30be | 4959 | */ |
cbc8eb67 | 4960 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); |
eaac30be AV |
4961 | if (rval == QLA_SUCCESS) |
4962 | return rval; | |
4963 | ||
cbc8eb67 AV |
4964 | try_blob_fw: |
4965 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4966 | if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) | |
4967 | return rval; | |
4968 | ||
7c3df132 SK |
4969 | ql_log(ql_log_info, vha, 0x0099, |
4970 | "Attempting to fallback to golden firmware.\n"); | |
cbc8eb67 AV |
4971 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); |
4972 | if (rval != QLA_SUCCESS) | |
4973 | return rval; | |
4974 | ||
7c3df132 | 4975 | ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); |
cbc8eb67 AV |
4976 | ha->flags.running_gold_fw = 1; |
4977 | ||
4978 | return rval; | |
eaac30be AV |
4979 | } |
4980 | ||
18c6c127 | 4981 | void |
e315cd28 | 4982 | qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) |
18c6c127 AV |
4983 | { |
4984 | int ret, retries; | |
e315cd28 | 4985 | struct qla_hw_data *ha = vha->hw; |
18c6c127 | 4986 | |
85880801 AV |
4987 | if (ha->flags.pci_channel_io_perm_failure) |
4988 | return; | |
e428924c | 4989 | if (!IS_FWI2_CAPABLE(ha)) |
18c6c127 | 4990 | return; |
75edf81d AV |
4991 | if (!ha->fw_major_version) |
4992 | return; | |
18c6c127 | 4993 | |
e315cd28 | 4994 | ret = qla2x00_stop_firmware(vha); |
7c7f1f29 | 4995 | for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && |
b469a7cb | 4996 | ret != QLA_INVALID_COMMAND && retries ; retries--) { |
e315cd28 AC |
4997 | ha->isp_ops->reset_chip(vha); |
4998 | if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) | |
18c6c127 | 4999 | continue; |
e315cd28 | 5000 | if (qla2x00_setup_chip(vha) != QLA_SUCCESS) |
18c6c127 | 5001 | continue; |
7c3df132 SK |
5002 | ql_log(ql_log_info, vha, 0x8015, |
5003 | "Attempting retry of stop-firmware command.\n"); | |
e315cd28 | 5004 | ret = qla2x00_stop_firmware(vha); |
18c6c127 AV |
5005 | } |
5006 | } | |
2c3dfe3f SJ |
5007 | |
5008 | int | |
e315cd28 | 5009 | qla24xx_configure_vhba(scsi_qla_host_t *vha) |
2c3dfe3f SJ |
5010 | { |
5011 | int rval = QLA_SUCCESS; | |
5012 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
e315cd28 AC |
5013 | struct qla_hw_data *ha = vha->hw; |
5014 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
67c2e93a AC |
5015 | struct req_que *req; |
5016 | struct rsp_que *rsp; | |
2c3dfe3f | 5017 | |
e315cd28 | 5018 | if (!vha->vp_idx) |
2c3dfe3f SJ |
5019 | return -EINVAL; |
5020 | ||
e315cd28 | 5021 | rval = qla2x00_fw_ready(base_vha); |
7163ea81 | 5022 | if (ha->flags.cpu_affinity_enabled) |
67c2e93a AC |
5023 | req = ha->req_q_map[0]; |
5024 | else | |
5025 | req = vha->req; | |
5026 | rsp = req->rsp; | |
5027 | ||
2c3dfe3f | 5028 | if (rval == QLA_SUCCESS) { |
e315cd28 | 5029 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
73208dfd | 5030 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
2c3dfe3f SJ |
5031 | } |
5032 | ||
e315cd28 | 5033 | vha->flags.management_server_logged_in = 0; |
2c3dfe3f SJ |
5034 | |
5035 | /* Login to SNS first */ | |
e315cd28 | 5036 | ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1); |
2c3dfe3f | 5037 | if (mb[0] != MBS_COMMAND_COMPLETE) { |
7c3df132 SK |
5038 | ql_dbg(ql_dbg_init, vha, 0x0103, |
5039 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x " | |
5040 | "mb[6]=%x mb[7]=%x.\n", | |
5041 | NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); | |
2c3dfe3f SJ |
5042 | return (QLA_FUNCTION_FAILED); |
5043 | } | |
5044 | ||
e315cd28 AC |
5045 | atomic_set(&vha->loop_down_timer, 0); |
5046 | atomic_set(&vha->loop_state, LOOP_UP); | |
5047 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
5048 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
5049 | rval = qla2x00_loop_resync(base_vha); | |
2c3dfe3f SJ |
5050 | |
5051 | return rval; | |
5052 | } | |
4d4df193 HK |
5053 | |
5054 | /* 84XX Support **************************************************************/ | |
5055 | ||
5056 | static LIST_HEAD(qla_cs84xx_list); | |
5057 | static DEFINE_MUTEX(qla_cs84xx_mutex); | |
5058 | ||
5059 | static struct qla_chip_state_84xx * | |
e315cd28 | 5060 | qla84xx_get_chip(struct scsi_qla_host *vha) |
4d4df193 HK |
5061 | { |
5062 | struct qla_chip_state_84xx *cs84xx; | |
e315cd28 | 5063 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
5064 | |
5065 | mutex_lock(&qla_cs84xx_mutex); | |
5066 | ||
5067 | /* Find any shared 84xx chip. */ | |
5068 | list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { | |
5069 | if (cs84xx->bus == ha->pdev->bus) { | |
5070 | kref_get(&cs84xx->kref); | |
5071 | goto done; | |
5072 | } | |
5073 | } | |
5074 | ||
5075 | cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); | |
5076 | if (!cs84xx) | |
5077 | goto done; | |
5078 | ||
5079 | kref_init(&cs84xx->kref); | |
5080 | spin_lock_init(&cs84xx->access_lock); | |
5081 | mutex_init(&cs84xx->fw_update_mutex); | |
5082 | cs84xx->bus = ha->pdev->bus; | |
5083 | ||
5084 | list_add_tail(&cs84xx->list, &qla_cs84xx_list); | |
5085 | done: | |
5086 | mutex_unlock(&qla_cs84xx_mutex); | |
5087 | return cs84xx; | |
5088 | } | |
5089 | ||
5090 | static void | |
5091 | __qla84xx_chip_release(struct kref *kref) | |
5092 | { | |
5093 | struct qla_chip_state_84xx *cs84xx = | |
5094 | container_of(kref, struct qla_chip_state_84xx, kref); | |
5095 | ||
5096 | mutex_lock(&qla_cs84xx_mutex); | |
5097 | list_del(&cs84xx->list); | |
5098 | mutex_unlock(&qla_cs84xx_mutex); | |
5099 | kfree(cs84xx); | |
5100 | } | |
5101 | ||
5102 | void | |
e315cd28 | 5103 | qla84xx_put_chip(struct scsi_qla_host *vha) |
4d4df193 | 5104 | { |
e315cd28 | 5105 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
5106 | if (ha->cs84xx) |
5107 | kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); | |
5108 | } | |
5109 | ||
5110 | static int | |
e315cd28 | 5111 | qla84xx_init_chip(scsi_qla_host_t *vha) |
4d4df193 HK |
5112 | { |
5113 | int rval; | |
5114 | uint16_t status[2]; | |
e315cd28 | 5115 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
5116 | |
5117 | mutex_lock(&ha->cs84xx->fw_update_mutex); | |
5118 | ||
e315cd28 | 5119 | rval = qla84xx_verify_chip(vha, status); |
4d4df193 HK |
5120 | |
5121 | mutex_unlock(&ha->cs84xx->fw_update_mutex); | |
5122 | ||
5123 | return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: | |
5124 | QLA_SUCCESS; | |
5125 | } | |
3a03eb79 AV |
5126 | |
5127 | /* 81XX Support **************************************************************/ | |
5128 | ||
5129 | int | |
5130 | qla81xx_nvram_config(scsi_qla_host_t *vha) | |
5131 | { | |
5132 | int rval; | |
5133 | struct init_cb_81xx *icb; | |
5134 | struct nvram_81xx *nv; | |
5135 | uint32_t *dptr; | |
5136 | uint8_t *dptr1, *dptr2; | |
5137 | uint32_t chksum; | |
5138 | uint16_t cnt; | |
5139 | struct qla_hw_data *ha = vha->hw; | |
5140 | ||
5141 | rval = QLA_SUCCESS; | |
5142 | icb = (struct init_cb_81xx *)ha->init_cb; | |
5143 | nv = ha->nvram; | |
5144 | ||
5145 | /* Determine NVRAM starting address. */ | |
5146 | ha->nvram_size = sizeof(struct nvram_81xx); | |
3a03eb79 | 5147 | ha->vpd_size = FA_NVRAM_VPD_SIZE; |
3a03eb79 AV |
5148 | |
5149 | /* Get VPD data into cache */ | |
5150 | ha->vpd = ha->nvram + VPD_OFFSET; | |
3d79038f AV |
5151 | ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, |
5152 | ha->vpd_size); | |
3a03eb79 AV |
5153 | |
5154 | /* Get NVRAM data into cache and calculate checksum. */ | |
3d79038f | 5155 | ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, |
3a03eb79 | 5156 | ha->nvram_size); |
3d79038f | 5157 | dptr = (uint32_t *)nv; |
3a03eb79 AV |
5158 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) |
5159 | chksum += le32_to_cpu(*dptr++); | |
5160 | ||
7c3df132 SK |
5161 | ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, |
5162 | "Contents of NVRAM:\n"); | |
5163 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, | |
5164 | (uint8_t *)nv, ha->nvram_size); | |
3a03eb79 AV |
5165 | |
5166 | /* Bad NVRAM data, set defaults parameters. */ | |
5167 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
5168 | || nv->id[3] != ' ' || | |
5169 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
5170 | /* Reset NVRAM data. */ | |
7c3df132 SK |
5171 | ql_log(ql_log_info, vha, 0x0073, |
5172 | "Inconisistent NVRAM detected: checksum=0x%x id=%c " | |
5173 | "version=0x%x.\n", chksum, nv->id[0], | |
3a03eb79 | 5174 | le16_to_cpu(nv->nvram_version)); |
7c3df132 SK |
5175 | ql_log(ql_log_info, vha, 0x0074, |
5176 | "Falling back to functioning (yet invalid -- WWPN) " | |
5177 | "defaults.\n"); | |
3a03eb79 AV |
5178 | |
5179 | /* | |
5180 | * Set default initialization control block. | |
5181 | */ | |
5182 | memset(nv, 0, ha->nvram_size); | |
5183 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
5184 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
5185 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
5186 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
5187 | nv->exchange_count = __constant_cpu_to_le16(0); | |
5188 | nv->port_name[0] = 0x21; | |
e5b68a61 | 5189 | nv->port_name[1] = 0x00 + ha->port_no; |
3a03eb79 AV |
5190 | nv->port_name[2] = 0x00; |
5191 | nv->port_name[3] = 0xe0; | |
5192 | nv->port_name[4] = 0x8b; | |
5193 | nv->port_name[5] = 0x1c; | |
5194 | nv->port_name[6] = 0x55; | |
5195 | nv->port_name[7] = 0x86; | |
5196 | nv->node_name[0] = 0x20; | |
5197 | nv->node_name[1] = 0x00; | |
5198 | nv->node_name[2] = 0x00; | |
5199 | nv->node_name[3] = 0xe0; | |
5200 | nv->node_name[4] = 0x8b; | |
5201 | nv->node_name[5] = 0x1c; | |
5202 | nv->node_name[6] = 0x55; | |
5203 | nv->node_name[7] = 0x86; | |
5204 | nv->login_retry_count = __constant_cpu_to_le16(8); | |
5205 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
5206 | nv->login_timeout = __constant_cpu_to_le16(0); | |
5207 | nv->firmware_options_1 = | |
5208 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
5209 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
5210 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
5211 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
5212 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
5213 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
5214 | nv->reset_delay = 5; | |
5215 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
5216 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
5217 | nv->link_down_timeout = __constant_cpu_to_le16(30); | |
eeebcc92 | 5218 | nv->enode_mac[0] = 0x00; |
3a03eb79 AV |
5219 | nv->enode_mac[1] = 0x02; |
5220 | nv->enode_mac[2] = 0x03; | |
5221 | nv->enode_mac[3] = 0x04; | |
5222 | nv->enode_mac[4] = 0x05; | |
e5b68a61 | 5223 | nv->enode_mac[5] = 0x06 + ha->port_no; |
3a03eb79 AV |
5224 | |
5225 | rval = 1; | |
5226 | } | |
5227 | ||
5228 | /* Reset Initialization control block */ | |
773120e4 | 5229 | memset(icb, 0, ha->init_cb_size); |
3a03eb79 AV |
5230 | |
5231 | /* Copy 1st segment. */ | |
5232 | dptr1 = (uint8_t *)icb; | |
5233 | dptr2 = (uint8_t *)&nv->version; | |
5234 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
5235 | while (cnt--) | |
5236 | *dptr1++ = *dptr2++; | |
5237 | ||
5238 | icb->login_retry_count = nv->login_retry_count; | |
5239 | ||
5240 | /* Copy 2nd segment. */ | |
5241 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
5242 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
5243 | cnt = (uint8_t *)&icb->reserved_5 - | |
5244 | (uint8_t *)&icb->interrupt_delay_timer; | |
5245 | while (cnt--) | |
5246 | *dptr1++ = *dptr2++; | |
5247 | ||
5248 | memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); | |
5249 | /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ | |
5250 | if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { | |
5251 | icb->enode_mac[0] = 0x01; | |
5252 | icb->enode_mac[1] = 0x02; | |
5253 | icb->enode_mac[2] = 0x03; | |
5254 | icb->enode_mac[3] = 0x04; | |
5255 | icb->enode_mac[4] = 0x05; | |
e5b68a61 | 5256 | icb->enode_mac[5] = 0x06 + ha->port_no; |
3a03eb79 AV |
5257 | } |
5258 | ||
b64b0e8f AV |
5259 | /* Use extended-initialization control block. */ |
5260 | memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); | |
5261 | ||
3a03eb79 AV |
5262 | /* |
5263 | * Setup driver NVRAM options. | |
5264 | */ | |
5265 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), | |
a9083016 | 5266 | "QLE8XXX"); |
3a03eb79 AV |
5267 | |
5268 | /* Use alternate WWN? */ | |
5269 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
5270 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
5271 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
5272 | } | |
5273 | ||
5274 | /* Prepare nodename */ | |
5275 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { | |
5276 | /* | |
5277 | * Firmware will apply the following mask if the nodename was | |
5278 | * not provided. | |
5279 | */ | |
5280 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
5281 | icb->node_name[0] &= 0xF0; | |
5282 | } | |
5283 | ||
5284 | /* Set host adapter parameters. */ | |
5285 | ha->flags.disable_risc_code_load = 0; | |
5286 | ha->flags.enable_lip_reset = 0; | |
5287 | ha->flags.enable_lip_full_login = | |
5288 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
5289 | ha->flags.enable_target_reset = | |
5290 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
5291 | ha->flags.enable_led_scheme = 0; | |
5292 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; | |
5293 | ||
5294 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & | |
5295 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
5296 | ||
5297 | /* save HBA serial number */ | |
5298 | ha->serial0 = icb->port_name[5]; | |
5299 | ha->serial1 = icb->port_name[6]; | |
5300 | ha->serial2 = icb->port_name[7]; | |
5301 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); | |
5302 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
5303 | ||
5304 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
5305 | ||
5306 | ha->retry_count = le16_to_cpu(nv->login_retry_count); | |
5307 | ||
5308 | /* Set minimum login_timeout to 4 seconds. */ | |
5309 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
5310 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
5311 | if (le16_to_cpu(nv->login_timeout) < 4) | |
5312 | nv->login_timeout = __constant_cpu_to_le16(4); | |
5313 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
5314 | icb->login_timeout = nv->login_timeout; | |
5315 | ||
5316 | /* Set minimum RATOV to 100 tenths of a second. */ | |
5317 | ha->r_a_tov = 100; | |
5318 | ||
5319 | ha->loop_reset_delay = nv->reset_delay; | |
5320 | ||
5321 | /* Link Down Timeout = 0: | |
5322 | * | |
5323 | * When Port Down timer expires we will start returning | |
5324 | * I/O's to OS with "DID_NO_CONNECT". | |
5325 | * | |
5326 | * Link Down Timeout != 0: | |
5327 | * | |
5328 | * The driver waits for the link to come up after link down | |
5329 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
5330 | */ | |
5331 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
5332 | ha->loop_down_abort_time = | |
5333 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
5334 | } else { | |
5335 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
5336 | ha->loop_down_abort_time = | |
5337 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
5338 | } | |
5339 | ||
5340 | /* Need enough time to try and get the port back. */ | |
5341 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
5342 | if (qlport_down_retry) | |
5343 | ha->port_down_retry_count = qlport_down_retry; | |
5344 | ||
5345 | /* Set login_retry_count */ | |
5346 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
5347 | if (ha->port_down_retry_count == | |
5348 | le16_to_cpu(nv->port_down_retry_count) && | |
5349 | ha->port_down_retry_count > 3) | |
5350 | ha->login_retry_count = ha->port_down_retry_count; | |
5351 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
5352 | ha->login_retry_count = ha->port_down_retry_count; | |
5353 | if (ql2xloginretrycount) | |
5354 | ha->login_retry_count = ql2xloginretrycount; | |
5355 | ||
5356 | /* Enable ZIO. */ | |
5357 | if (!vha->flags.init_done) { | |
5358 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & | |
5359 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
5360 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
5361 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
5362 | } | |
5363 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
5364 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
5365 | vha->flags.process_response_queue = 0; | |
5366 | if (ha->zio_mode != QLA_ZIO_DISABLED) { | |
5367 | ha->zio_mode = QLA_ZIO_MODE_6; | |
5368 | ||
7c3df132 | 5369 | ql_log(ql_log_info, vha, 0x0075, |
3a03eb79 | 5370 | "ZIO mode %d enabled; timer delay (%d us).\n", |
7c3df132 SK |
5371 | ha->zio_mode, |
5372 | ha->zio_timer * 100); | |
3a03eb79 AV |
5373 | |
5374 | icb->firmware_options_2 |= cpu_to_le32( | |
5375 | (uint32_t)ha->zio_mode); | |
5376 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
5377 | vha->flags.process_response_queue = 1; | |
5378 | } | |
5379 | ||
5380 | if (rval) { | |
7c3df132 SK |
5381 | ql_log(ql_log_warn, vha, 0x0076, |
5382 | "NVRAM configuration failed.\n"); | |
3a03eb79 AV |
5383 | } |
5384 | return (rval); | |
5385 | } | |
5386 | ||
a9083016 GM |
5387 | int |
5388 | qla82xx_restart_isp(scsi_qla_host_t *vha) | |
5389 | { | |
5390 | int status, rval; | |
5391 | uint32_t wait_time; | |
5392 | struct qla_hw_data *ha = vha->hw; | |
5393 | struct req_que *req = ha->req_q_map[0]; | |
5394 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
5395 | struct scsi_qla_host *vp; | |
feafb7b1 | 5396 | unsigned long flags; |
a9083016 GM |
5397 | |
5398 | status = qla2x00_init_rings(vha); | |
5399 | if (!status) { | |
5400 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
5401 | ha->flags.chip_reset_done = 1; | |
5402 | ||
5403 | status = qla2x00_fw_ready(vha); | |
5404 | if (!status) { | |
7c3df132 SK |
5405 | ql_log(ql_log_info, vha, 0x803c, |
5406 | "Start configure loop, status =%d.\n", status); | |
a9083016 GM |
5407 | |
5408 | /* Issue a marker after FW becomes ready. */ | |
5409 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); | |
5410 | ||
5411 | vha->flags.online = 1; | |
5412 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ | |
5413 | wait_time = 256; | |
5414 | do { | |
5415 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
5416 | qla2x00_configure_loop(vha); | |
5417 | wait_time--; | |
5418 | } while (!atomic_read(&vha->loop_down_timer) && | |
5419 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) && | |
5420 | wait_time && | |
5421 | (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))); | |
5422 | } | |
5423 | ||
5424 | /* if no cable then assume it's good */ | |
5425 | if ((vha->device_flags & DFLG_NO_CABLE)) | |
5426 | status = 0; | |
5427 | ||
7c3df132 SK |
5428 | ql_log(ql_log_info, vha, 0x803d, |
5429 | "Configure loop done, status = 0x%x.\n", status); | |
a9083016 GM |
5430 | } |
5431 | ||
5432 | if (!status) { | |
5433 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
5434 | ||
5435 | if (!atomic_read(&vha->loop_down_timer)) { | |
5436 | /* | |
5437 | * Issue marker command only when we are going | |
5438 | * to start the I/O . | |
5439 | */ | |
5440 | vha->marker_needed = 1; | |
5441 | } | |
5442 | ||
5443 | vha->flags.online = 1; | |
5444 | ||
5445 | ha->isp_ops->enable_intrs(ha); | |
5446 | ||
5447 | ha->isp_abort_cnt = 0; | |
5448 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
5449 | ||
53296788 | 5450 | /* Update the firmware version */ |
3173167f | 5451 | status = qla82xx_check_md_needed(vha); |
53296788 | 5452 | |
a9083016 GM |
5453 | if (ha->fce) { |
5454 | ha->flags.fce_enabled = 1; | |
5455 | memset(ha->fce, 0, | |
5456 | fce_calc_size(ha->fce_bufs)); | |
5457 | rval = qla2x00_enable_fce_trace(vha, | |
5458 | ha->fce_dma, ha->fce_bufs, ha->fce_mb, | |
5459 | &ha->fce_bufs); | |
5460 | if (rval) { | |
7c3df132 SK |
5461 | ql_log(ql_log_warn, vha, 0x803e, |
5462 | "Unable to reinitialize FCE (%d).\n", | |
5463 | rval); | |
a9083016 GM |
5464 | ha->flags.fce_enabled = 0; |
5465 | } | |
5466 | } | |
5467 | ||
5468 | if (ha->eft) { | |
5469 | memset(ha->eft, 0, EFT_SIZE); | |
5470 | rval = qla2x00_enable_eft_trace(vha, | |
5471 | ha->eft_dma, EFT_NUM_BUFFERS); | |
5472 | if (rval) { | |
7c3df132 SK |
5473 | ql_log(ql_log_warn, vha, 0x803f, |
5474 | "Unable to reinitialize EFT (%d).\n", | |
5475 | rval); | |
a9083016 GM |
5476 | } |
5477 | } | |
a9083016 GM |
5478 | } |
5479 | ||
5480 | if (!status) { | |
7c3df132 SK |
5481 | ql_dbg(ql_dbg_taskm, vha, 0x8040, |
5482 | "qla82xx_restart_isp succeeded.\n"); | |
feafb7b1 AE |
5483 | |
5484 | spin_lock_irqsave(&ha->vport_slock, flags); | |
5485 | list_for_each_entry(vp, &ha->vp_list, list) { | |
5486 | if (vp->vp_idx) { | |
5487 | atomic_inc(&vp->vref_count); | |
5488 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
5489 | ||
a9083016 | 5490 | qla2x00_vp_abort_isp(vp); |
feafb7b1 AE |
5491 | |
5492 | spin_lock_irqsave(&ha->vport_slock, flags); | |
5493 | atomic_dec(&vp->vref_count); | |
5494 | } | |
a9083016 | 5495 | } |
feafb7b1 AE |
5496 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
5497 | ||
a9083016 | 5498 | } else { |
7c3df132 SK |
5499 | ql_log(ql_log_warn, vha, 0x8041, |
5500 | "qla82xx_restart_isp **** FAILED ****.\n"); | |
a9083016 GM |
5501 | } |
5502 | ||
5503 | return status; | |
5504 | } | |
5505 | ||
3a03eb79 | 5506 | void |
ae97c91e | 5507 | qla81xx_update_fw_options(scsi_qla_host_t *vha) |
3a03eb79 | 5508 | { |
ae97c91e AV |
5509 | struct qla_hw_data *ha = vha->hw; |
5510 | ||
5511 | if (!ql2xetsenable) | |
5512 | return; | |
5513 | ||
5514 | /* Enable ETS Burst. */ | |
5515 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
5516 | ha->fw_options[2] |= BIT_9; | |
5517 | qla2x00_set_fw_options(vha, ha->fw_options); | |
3a03eb79 | 5518 | } |
09ff701a SR |
5519 | |
5520 | /* | |
5521 | * qla24xx_get_fcp_prio | |
5522 | * Gets the fcp cmd priority value for the logged in port. | |
5523 | * Looks for a match of the port descriptors within | |
5524 | * each of the fcp prio config entries. If a match is found, | |
5525 | * the tag (priority) value is returned. | |
5526 | * | |
5527 | * Input: | |
21090cbe | 5528 | * vha = scsi host structure pointer. |
09ff701a SR |
5529 | * fcport = port structure pointer. |
5530 | * | |
5531 | * Return: | |
6c452a45 | 5532 | * non-zero (if found) |
f28a0a96 | 5533 | * -1 (if not found) |
09ff701a SR |
5534 | * |
5535 | * Context: | |
5536 | * Kernel context | |
5537 | */ | |
f28a0a96 | 5538 | static int |
09ff701a SR |
5539 | qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) |
5540 | { | |
5541 | int i, entries; | |
5542 | uint8_t pid_match, wwn_match; | |
f28a0a96 | 5543 | int priority; |
09ff701a SR |
5544 | uint32_t pid1, pid2; |
5545 | uint64_t wwn1, wwn2; | |
5546 | struct qla_fcp_prio_entry *pri_entry; | |
5547 | struct qla_hw_data *ha = vha->hw; | |
5548 | ||
5549 | if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) | |
f28a0a96 | 5550 | return -1; |
09ff701a | 5551 | |
f28a0a96 | 5552 | priority = -1; |
09ff701a SR |
5553 | entries = ha->fcp_prio_cfg->num_entries; |
5554 | pri_entry = &ha->fcp_prio_cfg->entry[0]; | |
5555 | ||
5556 | for (i = 0; i < entries; i++) { | |
5557 | pid_match = wwn_match = 0; | |
5558 | ||
5559 | if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { | |
5560 | pri_entry++; | |
5561 | continue; | |
5562 | } | |
5563 | ||
5564 | /* check source pid for a match */ | |
5565 | if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { | |
5566 | pid1 = pri_entry->src_pid & INVALID_PORT_ID; | |
5567 | pid2 = vha->d_id.b24 & INVALID_PORT_ID; | |
5568 | if (pid1 == INVALID_PORT_ID) | |
5569 | pid_match++; | |
5570 | else if (pid1 == pid2) | |
5571 | pid_match++; | |
5572 | } | |
5573 | ||
5574 | /* check destination pid for a match */ | |
5575 | if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { | |
5576 | pid1 = pri_entry->dst_pid & INVALID_PORT_ID; | |
5577 | pid2 = fcport->d_id.b24 & INVALID_PORT_ID; | |
5578 | if (pid1 == INVALID_PORT_ID) | |
5579 | pid_match++; | |
5580 | else if (pid1 == pid2) | |
5581 | pid_match++; | |
5582 | } | |
5583 | ||
5584 | /* check source WWN for a match */ | |
5585 | if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { | |
5586 | wwn1 = wwn_to_u64(vha->port_name); | |
5587 | wwn2 = wwn_to_u64(pri_entry->src_wwpn); | |
5588 | if (wwn2 == (uint64_t)-1) | |
5589 | wwn_match++; | |
5590 | else if (wwn1 == wwn2) | |
5591 | wwn_match++; | |
5592 | } | |
5593 | ||
5594 | /* check destination WWN for a match */ | |
5595 | if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { | |
5596 | wwn1 = wwn_to_u64(fcport->port_name); | |
5597 | wwn2 = wwn_to_u64(pri_entry->dst_wwpn); | |
5598 | if (wwn2 == (uint64_t)-1) | |
5599 | wwn_match++; | |
5600 | else if (wwn1 == wwn2) | |
5601 | wwn_match++; | |
5602 | } | |
5603 | ||
5604 | if (pid_match == 2 || wwn_match == 2) { | |
5605 | /* Found a matching entry */ | |
5606 | if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) | |
5607 | priority = pri_entry->tag; | |
5608 | break; | |
5609 | } | |
5610 | ||
5611 | pri_entry++; | |
5612 | } | |
5613 | ||
5614 | return priority; | |
5615 | } | |
5616 | ||
5617 | /* | |
5618 | * qla24xx_update_fcport_fcp_prio | |
5619 | * Activates fcp priority for the logged in fc port | |
5620 | * | |
5621 | * Input: | |
21090cbe | 5622 | * vha = scsi host structure pointer. |
09ff701a SR |
5623 | * fcp = port structure pointer. |
5624 | * | |
5625 | * Return: | |
5626 | * QLA_SUCCESS or QLA_FUNCTION_FAILED | |
5627 | * | |
5628 | * Context: | |
5629 | * Kernel context. | |
5630 | */ | |
5631 | int | |
21090cbe | 5632 | qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) |
09ff701a SR |
5633 | { |
5634 | int ret; | |
f28a0a96 | 5635 | int priority; |
09ff701a SR |
5636 | uint16_t mb[5]; |
5637 | ||
21090cbe MI |
5638 | if (fcport->port_type != FCT_TARGET || |
5639 | fcport->loop_id == FC_NO_LOOP_ID) | |
09ff701a SR |
5640 | return QLA_FUNCTION_FAILED; |
5641 | ||
21090cbe | 5642 | priority = qla24xx_get_fcp_prio(vha, fcport); |
f28a0a96 AV |
5643 | if (priority < 0) |
5644 | return QLA_FUNCTION_FAILED; | |
5645 | ||
21090cbe | 5646 | ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); |
09ff701a SR |
5647 | if (ret == QLA_SUCCESS) |
5648 | fcport->fcp_prio = priority; | |
5649 | else | |
7c3df132 SK |
5650 | ql_dbg(ql_dbg_user, vha, 0x704f, |
5651 | "Unable to activate fcp priority, ret=0x%x.\n", ret); | |
09ff701a SR |
5652 | |
5653 | return ret; | |
5654 | } | |
5655 | ||
5656 | /* | |
5657 | * qla24xx_update_all_fcp_prio | |
5658 | * Activates fcp priority for all the logged in ports | |
5659 | * | |
5660 | * Input: | |
5661 | * ha = adapter block pointer. | |
5662 | * | |
5663 | * Return: | |
5664 | * QLA_SUCCESS or QLA_FUNCTION_FAILED | |
5665 | * | |
5666 | * Context: | |
5667 | * Kernel context. | |
5668 | */ | |
5669 | int | |
5670 | qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) | |
5671 | { | |
5672 | int ret; | |
5673 | fc_port_t *fcport; | |
5674 | ||
5675 | ret = QLA_FUNCTION_FAILED; | |
5676 | /* We need to set priority for all logged in ports */ | |
5677 | list_for_each_entry(fcport, &vha->vp_fcports, list) | |
5678 | ret = qla24xx_update_fcport_fcp_prio(vha, fcport); | |
5679 | ||
5680 | return ret; | |
5681 | } |