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Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
fa90c54f | 2 | * QLogic Fibre Channel HBA Driver |
07e264b7 | 3 | * Copyright (c) 2003-2011 QLogic Corporation |
1da177e4 | 4 | * |
fa90c54f | 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
1da177e4 LT |
6 | */ |
7 | #include "qla_def.h" | |
73208dfd | 8 | #include "qla_gbl.h" |
1da177e4 LT |
9 | |
10 | #include <linux/delay.h> | |
5a0e3ad6 | 11 | #include <linux/slab.h> |
0107109e | 12 | #include <linux/vmalloc.h> |
1da177e4 LT |
13 | |
14 | #include "qla_devtbl.h" | |
15 | ||
4e08df3f DM |
16 | #ifdef CONFIG_SPARC |
17 | #include <asm/prom.h> | |
4e08df3f DM |
18 | #endif |
19 | ||
2d70c103 NB |
20 | #include <target/target_core_base.h> |
21 | #include "qla_target.h" | |
22 | ||
1da177e4 LT |
23 | /* |
24 | * QLogic ISP2x00 Hardware Support Function Prototypes. | |
25 | */ | |
1da177e4 | 26 | static int qla2x00_isp_firmware(scsi_qla_host_t *); |
1da177e4 | 27 | static int qla2x00_setup_chip(scsi_qla_host_t *); |
1da177e4 LT |
28 | static int qla2x00_init_rings(scsi_qla_host_t *); |
29 | static int qla2x00_fw_ready(scsi_qla_host_t *); | |
30 | static int qla2x00_configure_hba(scsi_qla_host_t *); | |
1da177e4 LT |
31 | static int qla2x00_configure_loop(scsi_qla_host_t *); |
32 | static int qla2x00_configure_local_loop(scsi_qla_host_t *); | |
1da177e4 LT |
33 | static int qla2x00_configure_fabric(scsi_qla_host_t *); |
34 | static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *); | |
1da177e4 LT |
35 | static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *, |
36 | uint16_t *); | |
1da177e4 LT |
37 | |
38 | static int qla2x00_restart_isp(scsi_qla_host_t *); | |
1da177e4 | 39 | |
4d4df193 HK |
40 | static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); |
41 | static int qla84xx_init_chip(scsi_qla_host_t *); | |
73208dfd | 42 | static int qla25xx_init_queues(struct qla_hw_data *); |
4d4df193 | 43 | |
ac280b67 AV |
44 | /* SRB Extensions ---------------------------------------------------------- */ |
45 | ||
9ba56b95 GM |
46 | void |
47 | qla2x00_sp_timeout(unsigned long __data) | |
ac280b67 AV |
48 | { |
49 | srb_t *sp = (srb_t *)__data; | |
4916392b | 50 | struct srb_iocb *iocb; |
ac280b67 AV |
51 | fc_port_t *fcport = sp->fcport; |
52 | struct qla_hw_data *ha = fcport->vha->hw; | |
53 | struct req_que *req; | |
54 | unsigned long flags; | |
55 | ||
56 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
57 | req = ha->req_q_map[0]; | |
58 | req->outstanding_cmds[sp->handle] = NULL; | |
9ba56b95 | 59 | iocb = &sp->u.iocb_cmd; |
4916392b | 60 | iocb->timeout(sp); |
9ba56b95 | 61 | sp->free(fcport->vha, sp); |
6ac52608 | 62 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
ac280b67 AV |
63 | } |
64 | ||
9ba56b95 GM |
65 | void |
66 | qla2x00_sp_free(void *data, void *ptr) | |
ac280b67 | 67 | { |
9ba56b95 GM |
68 | srb_t *sp = (srb_t *)ptr; |
69 | struct srb_iocb *iocb = &sp->u.iocb_cmd; | |
70 | struct scsi_qla_host *vha = (scsi_qla_host_t *)data; | |
ac280b67 | 71 | |
4d97cc53 | 72 | del_timer(&iocb->timer); |
9ba56b95 | 73 | mempool_free(sp, vha->hw->srb_mempool); |
feafb7b1 AE |
74 | |
75 | QLA_VHA_MARK_NOT_BUSY(vha); | |
ac280b67 AV |
76 | } |
77 | ||
ac280b67 AV |
78 | /* Asynchronous Login/Logout Routines -------------------------------------- */ |
79 | ||
a9b6f722 | 80 | unsigned long |
5b91490e AV |
81 | qla2x00_get_async_timeout(struct scsi_qla_host *vha) |
82 | { | |
83 | unsigned long tmo; | |
84 | struct qla_hw_data *ha = vha->hw; | |
85 | ||
86 | /* Firmware should use switch negotiated r_a_tov for timeout. */ | |
87 | tmo = ha->r_a_tov / 10 * 2; | |
88 | if (!IS_FWI2_CAPABLE(ha)) { | |
89 | /* | |
90 | * Except for earlier ISPs where the timeout is seeded from the | |
91 | * initialization control block. | |
92 | */ | |
93 | tmo = ha->login_timeout; | |
94 | } | |
95 | return tmo; | |
96 | } | |
ac280b67 AV |
97 | |
98 | static void | |
9ba56b95 | 99 | qla2x00_async_iocb_timeout(void *data) |
ac280b67 | 100 | { |
9ba56b95 | 101 | srb_t *sp = (srb_t *)data; |
ac280b67 | 102 | fc_port_t *fcport = sp->fcport; |
ac280b67 | 103 | |
7c3df132 | 104 | ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, |
cfb0919c | 105 | "Async-%s timeout - hdl=%x portid=%02x%02x%02x.\n", |
9ba56b95 | 106 | sp->name, sp->handle, fcport->d_id.b.domain, fcport->d_id.b.area, |
7c3df132 | 107 | fcport->d_id.b.al_pa); |
ac280b67 | 108 | |
5ff1d584 | 109 | fcport->flags &= ~FCF_ASYNC_SENT; |
9ba56b95 GM |
110 | if (sp->type == SRB_LOGIN_CMD) { |
111 | struct srb_iocb *lio = &sp->u.iocb_cmd; | |
ac280b67 | 112 | qla2x00_post_async_logout_work(fcport->vha, fcport, NULL); |
6ac52608 AV |
113 | /* Retry as needed. */ |
114 | lio->u.logio.data[0] = MBS_COMMAND_ERROR; | |
115 | lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? | |
116 | QLA_LOGIO_LOGIN_RETRIED : 0; | |
117 | qla2x00_post_async_login_done_work(fcport->vha, fcport, | |
118 | lio->u.logio.data); | |
119 | } | |
ac280b67 AV |
120 | } |
121 | ||
99b0bec7 | 122 | static void |
9ba56b95 | 123 | qla2x00_async_login_sp_done(void *data, void *ptr, int res) |
99b0bec7 | 124 | { |
9ba56b95 GM |
125 | srb_t *sp = (srb_t *)ptr; |
126 | struct srb_iocb *lio = &sp->u.iocb_cmd; | |
127 | struct scsi_qla_host *vha = (scsi_qla_host_t *)data; | |
128 | ||
129 | if (!test_bit(UNLOADING, &vha->dpc_flags)) | |
130 | qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport, | |
131 | lio->u.logio.data); | |
132 | sp->free(sp->fcport->vha, sp); | |
99b0bec7 AV |
133 | } |
134 | ||
ac280b67 AV |
135 | int |
136 | qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, | |
137 | uint16_t *data) | |
138 | { | |
ac280b67 | 139 | srb_t *sp; |
4916392b | 140 | struct srb_iocb *lio; |
ac280b67 AV |
141 | int rval; |
142 | ||
143 | rval = QLA_FUNCTION_FAILED; | |
9ba56b95 | 144 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); |
ac280b67 AV |
145 | if (!sp) |
146 | goto done; | |
147 | ||
9ba56b95 GM |
148 | sp->type = SRB_LOGIN_CMD; |
149 | sp->name = "login"; | |
150 | qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); | |
151 | ||
152 | lio = &sp->u.iocb_cmd; | |
3822263e | 153 | lio->timeout = qla2x00_async_iocb_timeout; |
9ba56b95 | 154 | sp->done = qla2x00_async_login_sp_done; |
4916392b | 155 | lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; |
ac280b67 | 156 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) |
4916392b | 157 | lio->u.logio.flags |= SRB_LOGIN_RETRIED; |
ac280b67 AV |
158 | rval = qla2x00_start_sp(sp); |
159 | if (rval != QLA_SUCCESS) | |
160 | goto done_free_sp; | |
161 | ||
7c3df132 | 162 | ql_dbg(ql_dbg_disc, vha, 0x2072, |
cfb0919c CD |
163 | "Async-login - hdl=%x, loopid=%x portid=%02x%02x%02x " |
164 | "retries=%d.\n", sp->handle, fcport->loop_id, | |
165 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
166 | fcport->login_retry); | |
ac280b67 AV |
167 | return rval; |
168 | ||
169 | done_free_sp: | |
9ba56b95 | 170 | sp->free(fcport->vha, sp); |
ac280b67 AV |
171 | done: |
172 | return rval; | |
173 | } | |
174 | ||
99b0bec7 | 175 | static void |
9ba56b95 | 176 | qla2x00_async_logout_sp_done(void *data, void *ptr, int res) |
99b0bec7 | 177 | { |
9ba56b95 GM |
178 | srb_t *sp = (srb_t *)ptr; |
179 | struct srb_iocb *lio = &sp->u.iocb_cmd; | |
180 | struct scsi_qla_host *vha = (scsi_qla_host_t *)data; | |
181 | ||
182 | if (!test_bit(UNLOADING, &vha->dpc_flags)) | |
183 | qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport, | |
184 | lio->u.logio.data); | |
185 | sp->free(sp->fcport->vha, sp); | |
99b0bec7 AV |
186 | } |
187 | ||
ac280b67 AV |
188 | int |
189 | qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) | |
190 | { | |
ac280b67 | 191 | srb_t *sp; |
4916392b | 192 | struct srb_iocb *lio; |
ac280b67 AV |
193 | int rval; |
194 | ||
195 | rval = QLA_FUNCTION_FAILED; | |
9ba56b95 | 196 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); |
ac280b67 AV |
197 | if (!sp) |
198 | goto done; | |
199 | ||
9ba56b95 GM |
200 | sp->type = SRB_LOGOUT_CMD; |
201 | sp->name = "logout"; | |
202 | qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); | |
203 | ||
204 | lio = &sp->u.iocb_cmd; | |
3822263e | 205 | lio->timeout = qla2x00_async_iocb_timeout; |
9ba56b95 | 206 | sp->done = qla2x00_async_logout_sp_done; |
ac280b67 AV |
207 | rval = qla2x00_start_sp(sp); |
208 | if (rval != QLA_SUCCESS) | |
209 | goto done_free_sp; | |
210 | ||
7c3df132 | 211 | ql_dbg(ql_dbg_disc, vha, 0x2070, |
cfb0919c CD |
212 | "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", |
213 | sp->handle, fcport->loop_id, fcport->d_id.b.domain, | |
214 | fcport->d_id.b.area, fcport->d_id.b.al_pa); | |
ac280b67 AV |
215 | return rval; |
216 | ||
217 | done_free_sp: | |
9ba56b95 | 218 | sp->free(fcport->vha, sp); |
ac280b67 AV |
219 | done: |
220 | return rval; | |
221 | } | |
222 | ||
5ff1d584 | 223 | static void |
9ba56b95 | 224 | qla2x00_async_adisc_sp_done(void *data, void *ptr, int res) |
5ff1d584 | 225 | { |
9ba56b95 GM |
226 | srb_t *sp = (srb_t *)ptr; |
227 | struct srb_iocb *lio = &sp->u.iocb_cmd; | |
228 | struct scsi_qla_host *vha = (scsi_qla_host_t *)data; | |
229 | ||
230 | if (!test_bit(UNLOADING, &vha->dpc_flags)) | |
231 | qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport, | |
232 | lio->u.logio.data); | |
233 | sp->free(sp->fcport->vha, sp); | |
5ff1d584 AV |
234 | } |
235 | ||
236 | int | |
237 | qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, | |
238 | uint16_t *data) | |
239 | { | |
5ff1d584 | 240 | srb_t *sp; |
4916392b | 241 | struct srb_iocb *lio; |
5ff1d584 AV |
242 | int rval; |
243 | ||
244 | rval = QLA_FUNCTION_FAILED; | |
9ba56b95 | 245 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); |
5ff1d584 AV |
246 | if (!sp) |
247 | goto done; | |
248 | ||
9ba56b95 GM |
249 | sp->type = SRB_ADISC_CMD; |
250 | sp->name = "adisc"; | |
251 | qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); | |
252 | ||
253 | lio = &sp->u.iocb_cmd; | |
3822263e | 254 | lio->timeout = qla2x00_async_iocb_timeout; |
9ba56b95 | 255 | sp->done = qla2x00_async_adisc_sp_done; |
5ff1d584 | 256 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) |
4916392b | 257 | lio->u.logio.flags |= SRB_LOGIN_RETRIED; |
5ff1d584 AV |
258 | rval = qla2x00_start_sp(sp); |
259 | if (rval != QLA_SUCCESS) | |
260 | goto done_free_sp; | |
261 | ||
7c3df132 | 262 | ql_dbg(ql_dbg_disc, vha, 0x206f, |
cfb0919c CD |
263 | "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n", |
264 | sp->handle, fcport->loop_id, fcport->d_id.b.domain, | |
265 | fcport->d_id.b.area, fcport->d_id.b.al_pa); | |
5ff1d584 AV |
266 | return rval; |
267 | ||
268 | done_free_sp: | |
9ba56b95 | 269 | sp->free(fcport->vha, sp); |
5ff1d584 AV |
270 | done: |
271 | return rval; | |
272 | } | |
273 | ||
3822263e | 274 | static void |
9ba56b95 | 275 | qla2x00_async_tm_cmd_done(void *data, void *ptr, int res) |
3822263e | 276 | { |
9ba56b95 GM |
277 | srb_t *sp = (srb_t *)ptr; |
278 | struct srb_iocb *iocb = &sp->u.iocb_cmd; | |
279 | struct scsi_qla_host *vha = (scsi_qla_host_t *)data; | |
280 | uint32_t flags; | |
281 | uint16_t lun; | |
282 | int rval; | |
3822263e | 283 | |
9ba56b95 GM |
284 | if (!test_bit(UNLOADING, &vha->dpc_flags)) { |
285 | flags = iocb->u.tmf.flags; | |
286 | lun = (uint16_t)iocb->u.tmf.lun; | |
287 | ||
288 | /* Issue Marker IOCB */ | |
289 | rval = qla2x00_marker(vha, vha->hw->req_q_map[0], | |
290 | vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun, | |
291 | flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); | |
292 | ||
293 | if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) { | |
294 | ql_dbg(ql_dbg_taskm, vha, 0x8030, | |
295 | "TM IOCB failed (%x).\n", rval); | |
296 | } | |
297 | } | |
298 | sp->free(sp->fcport->vha, sp); | |
3822263e MI |
299 | } |
300 | ||
301 | int | |
9ba56b95 | 302 | qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t tm_flags, uint32_t lun, |
3822263e MI |
303 | uint32_t tag) |
304 | { | |
305 | struct scsi_qla_host *vha = fcport->vha; | |
3822263e | 306 | srb_t *sp; |
3822263e MI |
307 | struct srb_iocb *tcf; |
308 | int rval; | |
309 | ||
310 | rval = QLA_FUNCTION_FAILED; | |
9ba56b95 | 311 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); |
3822263e MI |
312 | if (!sp) |
313 | goto done; | |
314 | ||
9ba56b95 GM |
315 | sp->type = SRB_TM_CMD; |
316 | sp->name = "tmf"; | |
317 | qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); | |
318 | ||
319 | tcf = &sp->u.iocb_cmd; | |
320 | tcf->u.tmf.flags = tm_flags; | |
3822263e MI |
321 | tcf->u.tmf.lun = lun; |
322 | tcf->u.tmf.data = tag; | |
323 | tcf->timeout = qla2x00_async_iocb_timeout; | |
9ba56b95 | 324 | sp->done = qla2x00_async_tm_cmd_done; |
3822263e MI |
325 | |
326 | rval = qla2x00_start_sp(sp); | |
327 | if (rval != QLA_SUCCESS) | |
328 | goto done_free_sp; | |
329 | ||
7c3df132 | 330 | ql_dbg(ql_dbg_taskm, vha, 0x802f, |
cfb0919c CD |
331 | "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", |
332 | sp->handle, fcport->loop_id, fcport->d_id.b.domain, | |
333 | fcport->d_id.b.area, fcport->d_id.b.al_pa); | |
3822263e MI |
334 | return rval; |
335 | ||
336 | done_free_sp: | |
9ba56b95 | 337 | sp->free(fcport->vha, sp); |
3822263e MI |
338 | done: |
339 | return rval; | |
340 | } | |
341 | ||
4916392b | 342 | void |
ac280b67 AV |
343 | qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport, |
344 | uint16_t *data) | |
345 | { | |
346 | int rval; | |
ac280b67 AV |
347 | |
348 | switch (data[0]) { | |
349 | case MBS_COMMAND_COMPLETE: | |
a4f92a32 AV |
350 | /* |
351 | * Driver must validate login state - If PRLI not complete, | |
352 | * force a relogin attempt via implicit LOGO, PLOGI, and PRLI | |
353 | * requests. | |
354 | */ | |
355 | rval = qla2x00_get_port_database(vha, fcport, 0); | |
0eba25df AE |
356 | if (rval == QLA_NOT_LOGGED_IN) { |
357 | fcport->flags &= ~FCF_ASYNC_SENT; | |
358 | fcport->flags |= FCF_LOGIN_NEEDED; | |
359 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
360 | break; | |
361 | } | |
362 | ||
a4f92a32 AV |
363 | if (rval != QLA_SUCCESS) { |
364 | qla2x00_post_async_logout_work(vha, fcport, NULL); | |
365 | qla2x00_post_async_login_work(vha, fcport, NULL); | |
366 | break; | |
367 | } | |
99b0bec7 | 368 | if (fcport->flags & FCF_FCP2_DEVICE) { |
5ff1d584 AV |
369 | qla2x00_post_async_adisc_work(vha, fcport, data); |
370 | break; | |
99b0bec7 AV |
371 | } |
372 | qla2x00_update_fcport(vha, fcport); | |
ac280b67 AV |
373 | break; |
374 | case MBS_COMMAND_ERROR: | |
5ff1d584 | 375 | fcport->flags &= ~FCF_ASYNC_SENT; |
ac280b67 AV |
376 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) |
377 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
378 | else | |
80d79440 | 379 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
ac280b67 AV |
380 | break; |
381 | case MBS_PORT_ID_USED: | |
382 | fcport->loop_id = data[1]; | |
6ac52608 | 383 | qla2x00_post_async_logout_work(vha, fcport, NULL); |
ac280b67 AV |
384 | qla2x00_post_async_login_work(vha, fcport, NULL); |
385 | break; | |
386 | case MBS_LOOP_ID_USED: | |
387 | fcport->loop_id++; | |
388 | rval = qla2x00_find_new_loop_id(vha, fcport); | |
389 | if (rval != QLA_SUCCESS) { | |
5ff1d584 | 390 | fcport->flags &= ~FCF_ASYNC_SENT; |
80d79440 | 391 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
ac280b67 AV |
392 | break; |
393 | } | |
394 | qla2x00_post_async_login_work(vha, fcport, NULL); | |
395 | break; | |
396 | } | |
4916392b | 397 | return; |
ac280b67 AV |
398 | } |
399 | ||
4916392b | 400 | void |
ac280b67 AV |
401 | qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, |
402 | uint16_t *data) | |
403 | { | |
404 | qla2x00_mark_device_lost(vha, fcport, 1, 0); | |
4916392b | 405 | return; |
ac280b67 AV |
406 | } |
407 | ||
4916392b | 408 | void |
5ff1d584 AV |
409 | qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, |
410 | uint16_t *data) | |
411 | { | |
412 | if (data[0] == MBS_COMMAND_COMPLETE) { | |
413 | qla2x00_update_fcport(vha, fcport); | |
414 | ||
4916392b | 415 | return; |
5ff1d584 AV |
416 | } |
417 | ||
418 | /* Retry login. */ | |
419 | fcport->flags &= ~FCF_ASYNC_SENT; | |
420 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) | |
421 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
422 | else | |
80d79440 | 423 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
5ff1d584 | 424 | |
4916392b | 425 | return; |
5ff1d584 AV |
426 | } |
427 | ||
1da177e4 LT |
428 | /****************************************************************************/ |
429 | /* QLogic ISP2x00 Hardware Support Functions. */ | |
430 | /****************************************************************************/ | |
431 | ||
432 | /* | |
433 | * qla2x00_initialize_adapter | |
434 | * Initialize board. | |
435 | * | |
436 | * Input: | |
437 | * ha = adapter block pointer. | |
438 | * | |
439 | * Returns: | |
440 | * 0 = success | |
441 | */ | |
442 | int | |
e315cd28 | 443 | qla2x00_initialize_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
444 | { |
445 | int rval; | |
e315cd28 | 446 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 447 | struct req_que *req = ha->req_q_map[0]; |
2533cf67 | 448 | |
1da177e4 | 449 | /* Clear adapter flags. */ |
e315cd28 | 450 | vha->flags.online = 0; |
2533cf67 | 451 | ha->flags.chip_reset_done = 0; |
e315cd28 | 452 | vha->flags.reset_active = 0; |
85880801 AV |
453 | ha->flags.pci_channel_io_perm_failure = 0; |
454 | ha->flags.eeh_busy = 0; | |
794a5691 | 455 | ha->flags.thermal_supported = 1; |
e315cd28 AC |
456 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); |
457 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
458 | vha->device_flags = DFLG_NO_CABLE; | |
459 | vha->dpc_flags = 0; | |
460 | vha->flags.management_server_logged_in = 0; | |
461 | vha->marker_needed = 0; | |
1da177e4 LT |
462 | ha->isp_abort_cnt = 0; |
463 | ha->beacon_blink_led = 0; | |
464 | ||
73208dfd AC |
465 | set_bit(0, ha->req_qid_map); |
466 | set_bit(0, ha->rsp_qid_map); | |
467 | ||
cfb0919c | 468 | ql_dbg(ql_dbg_init, vha, 0x0040, |
7c3df132 | 469 | "Configuring PCI space...\n"); |
e315cd28 | 470 | rval = ha->isp_ops->pci_config(vha); |
1da177e4 | 471 | if (rval) { |
7c3df132 SK |
472 | ql_log(ql_log_warn, vha, 0x0044, |
473 | "Unable to configure PCI space.\n"); | |
1da177e4 LT |
474 | return (rval); |
475 | } | |
476 | ||
e315cd28 | 477 | ha->isp_ops->reset_chip(vha); |
1da177e4 | 478 | |
e315cd28 | 479 | rval = qla2xxx_get_flash_info(vha); |
c00d8994 | 480 | if (rval) { |
7c3df132 SK |
481 | ql_log(ql_log_fatal, vha, 0x004f, |
482 | "Unable to validate FLASH data.\n"); | |
c00d8994 AV |
483 | return (rval); |
484 | } | |
485 | ||
73208dfd | 486 | ha->isp_ops->get_flash_version(vha, req->ring); |
cfb0919c | 487 | ql_dbg(ql_dbg_init, vha, 0x0061, |
7c3df132 | 488 | "Configure NVRAM parameters...\n"); |
0107109e | 489 | |
e315cd28 | 490 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 491 | |
d4c760c2 AV |
492 | if (ha->flags.disable_serdes) { |
493 | /* Mask HBA via NVRAM settings? */ | |
7c3df132 SK |
494 | ql_log(ql_log_info, vha, 0x0077, |
495 | "Masking HBA WWPN " | |
d4c760c2 | 496 | "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n", |
e315cd28 AC |
497 | vha->port_name[0], vha->port_name[1], |
498 | vha->port_name[2], vha->port_name[3], | |
499 | vha->port_name[4], vha->port_name[5], | |
500 | vha->port_name[6], vha->port_name[7]); | |
d4c760c2 AV |
501 | return QLA_FUNCTION_FAILED; |
502 | } | |
503 | ||
cfb0919c | 504 | ql_dbg(ql_dbg_init, vha, 0x0078, |
7c3df132 | 505 | "Verifying loaded RISC code...\n"); |
1da177e4 | 506 | |
e315cd28 AC |
507 | if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { |
508 | rval = ha->isp_ops->chip_diag(vha); | |
d19044c3 AV |
509 | if (rval) |
510 | return (rval); | |
e315cd28 | 511 | rval = qla2x00_setup_chip(vha); |
d19044c3 AV |
512 | if (rval) |
513 | return (rval); | |
1da177e4 | 514 | } |
a9083016 | 515 | |
4d4df193 | 516 | if (IS_QLA84XX(ha)) { |
e315cd28 | 517 | ha->cs84xx = qla84xx_get_chip(vha); |
4d4df193 | 518 | if (!ha->cs84xx) { |
7c3df132 | 519 | ql_log(ql_log_warn, vha, 0x00d0, |
4d4df193 HK |
520 | "Unable to configure ISP84XX.\n"); |
521 | return QLA_FUNCTION_FAILED; | |
522 | } | |
523 | } | |
2d70c103 NB |
524 | |
525 | if (qla_ini_mode_enabled(vha)) | |
526 | rval = qla2x00_init_rings(vha); | |
527 | ||
2533cf67 | 528 | ha->flags.chip_reset_done = 1; |
1da177e4 | 529 | |
9a069e19 | 530 | if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { |
6c452a45 | 531 | /* Issue verify 84xx FW IOCB to complete 84xx initialization */ |
9a069e19 GM |
532 | rval = qla84xx_init_chip(vha); |
533 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
534 | ql_log(ql_log_warn, vha, 0x00d4, |
535 | "Unable to initialize ISP84XX.\n"); | |
9a069e19 GM |
536 | qla84xx_put_chip(vha); |
537 | } | |
538 | } | |
539 | ||
2f0f3f4f MI |
540 | if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) |
541 | qla24xx_read_fcp_prio_cfg(vha); | |
09ff701a | 542 | |
1da177e4 LT |
543 | return (rval); |
544 | } | |
545 | ||
546 | /** | |
abbd8870 | 547 | * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. |
1da177e4 LT |
548 | * @ha: HA context |
549 | * | |
550 | * Returns 0 on success. | |
551 | */ | |
abbd8870 | 552 | int |
e315cd28 | 553 | qla2100_pci_config(scsi_qla_host_t *vha) |
1da177e4 | 554 | { |
a157b101 | 555 | uint16_t w; |
abbd8870 | 556 | unsigned long flags; |
e315cd28 | 557 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 558 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 559 | |
1da177e4 | 560 | pci_set_master(ha->pdev); |
af6177d8 | 561 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 562 | |
1da177e4 | 563 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 564 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
abbd8870 AV |
565 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
566 | ||
737faece | 567 | pci_disable_rom(ha->pdev); |
1da177e4 LT |
568 | |
569 | /* Get PCI bus information. */ | |
570 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 571 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
1da177e4 LT |
572 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
573 | ||
abbd8870 AV |
574 | return QLA_SUCCESS; |
575 | } | |
1da177e4 | 576 | |
abbd8870 AV |
577 | /** |
578 | * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. | |
579 | * @ha: HA context | |
580 | * | |
581 | * Returns 0 on success. | |
582 | */ | |
583 | int | |
e315cd28 | 584 | qla2300_pci_config(scsi_qla_host_t *vha) |
abbd8870 | 585 | { |
a157b101 | 586 | uint16_t w; |
abbd8870 AV |
587 | unsigned long flags = 0; |
588 | uint32_t cnt; | |
e315cd28 | 589 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 590 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 591 | |
abbd8870 | 592 | pci_set_master(ha->pdev); |
af6177d8 | 593 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 594 | |
abbd8870 | 595 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 596 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
1da177e4 | 597 | |
abbd8870 AV |
598 | if (IS_QLA2322(ha) || IS_QLA6322(ha)) |
599 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
a157b101 | 600 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
1da177e4 | 601 | |
abbd8870 AV |
602 | /* |
603 | * If this is a 2300 card and not 2312, reset the | |
604 | * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, | |
605 | * the 2310 also reports itself as a 2300 so we need to get the | |
606 | * fb revision level -- a 6 indicates it really is a 2300 and | |
607 | * not a 2310. | |
608 | */ | |
609 | if (IS_QLA2300(ha)) { | |
610 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1da177e4 | 611 | |
abbd8870 | 612 | /* Pause RISC. */ |
3d71644c | 613 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); |
abbd8870 | 614 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 615 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) |
abbd8870 | 616 | break; |
1da177e4 | 617 | |
abbd8870 AV |
618 | udelay(10); |
619 | } | |
1da177e4 | 620 | |
abbd8870 | 621 | /* Select FPM registers. */ |
3d71644c AV |
622 | WRT_REG_WORD(®->ctrl_status, 0x20); |
623 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
624 | |
625 | /* Get the fb rev level */ | |
3d71644c | 626 | ha->fb_rev = RD_FB_CMD_REG(ha, reg); |
abbd8870 AV |
627 | |
628 | if (ha->fb_rev == FPM_2300) | |
a157b101 | 629 | pci_clear_mwi(ha->pdev); |
abbd8870 AV |
630 | |
631 | /* Deselect FPM registers. */ | |
3d71644c AV |
632 | WRT_REG_WORD(®->ctrl_status, 0x0); |
633 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
634 | |
635 | /* Release RISC module. */ | |
3d71644c | 636 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); |
abbd8870 | 637 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 638 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) |
abbd8870 AV |
639 | break; |
640 | ||
641 | udelay(10); | |
1da177e4 | 642 | } |
1da177e4 | 643 | |
abbd8870 AV |
644 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
645 | } | |
1da177e4 | 646 | |
abbd8870 AV |
647 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); |
648 | ||
737faece | 649 | pci_disable_rom(ha->pdev); |
1da177e4 | 650 | |
abbd8870 AV |
651 | /* Get PCI bus information. */ |
652 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 653 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
abbd8870 AV |
654 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
655 | ||
656 | return QLA_SUCCESS; | |
1da177e4 LT |
657 | } |
658 | ||
0107109e AV |
659 | /** |
660 | * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. | |
661 | * @ha: HA context | |
662 | * | |
663 | * Returns 0 on success. | |
664 | */ | |
665 | int | |
e315cd28 | 666 | qla24xx_pci_config(scsi_qla_host_t *vha) |
0107109e | 667 | { |
a157b101 | 668 | uint16_t w; |
0107109e | 669 | unsigned long flags = 0; |
e315cd28 | 670 | struct qla_hw_data *ha = vha->hw; |
0107109e | 671 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
0107109e AV |
672 | |
673 | pci_set_master(ha->pdev); | |
af6177d8 | 674 | pci_try_set_mwi(ha->pdev); |
0107109e AV |
675 | |
676 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
a157b101 | 677 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
0107109e AV |
678 | w &= ~PCI_COMMAND_INTX_DISABLE; |
679 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
680 | ||
681 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); | |
682 | ||
683 | /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ | |
f85ec187 AV |
684 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) |
685 | pcix_set_mmrbc(ha->pdev, 2048); | |
0107109e AV |
686 | |
687 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
e67f1321 | 688 | if (pci_is_pcie(ha->pdev)) |
f85ec187 | 689 | pcie_set_readrq(ha->pdev, 2048); |
0107109e | 690 | |
737faece | 691 | pci_disable_rom(ha->pdev); |
0107109e | 692 | |
44c10138 | 693 | ha->chip_revision = ha->pdev->revision; |
a8488abe | 694 | |
0107109e AV |
695 | /* Get PCI bus information. */ |
696 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
697 | ha->pci_attr = RD_REG_DWORD(®->ctrl_status); | |
698 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
699 | ||
700 | return QLA_SUCCESS; | |
701 | } | |
702 | ||
c3a2f0df AV |
703 | /** |
704 | * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. | |
705 | * @ha: HA context | |
706 | * | |
707 | * Returns 0 on success. | |
708 | */ | |
709 | int | |
e315cd28 | 710 | qla25xx_pci_config(scsi_qla_host_t *vha) |
c3a2f0df AV |
711 | { |
712 | uint16_t w; | |
e315cd28 | 713 | struct qla_hw_data *ha = vha->hw; |
c3a2f0df AV |
714 | |
715 | pci_set_master(ha->pdev); | |
716 | pci_try_set_mwi(ha->pdev); | |
717 | ||
718 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
719 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); | |
720 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
721 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
722 | ||
723 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
e67f1321 | 724 | if (pci_is_pcie(ha->pdev)) |
c3a2f0df AV |
725 | pcie_set_readrq(ha->pdev, 2048); |
726 | ||
737faece | 727 | pci_disable_rom(ha->pdev); |
c3a2f0df AV |
728 | |
729 | ha->chip_revision = ha->pdev->revision; | |
730 | ||
731 | return QLA_SUCCESS; | |
732 | } | |
733 | ||
1da177e4 LT |
734 | /** |
735 | * qla2x00_isp_firmware() - Choose firmware image. | |
736 | * @ha: HA context | |
737 | * | |
738 | * Returns 0 on success. | |
739 | */ | |
740 | static int | |
e315cd28 | 741 | qla2x00_isp_firmware(scsi_qla_host_t *vha) |
1da177e4 LT |
742 | { |
743 | int rval; | |
42e421b1 AV |
744 | uint16_t loop_id, topo, sw_cap; |
745 | uint8_t domain, area, al_pa; | |
e315cd28 | 746 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
747 | |
748 | /* Assume loading risc code */ | |
fa2a1ce5 | 749 | rval = QLA_FUNCTION_FAILED; |
1da177e4 LT |
750 | |
751 | if (ha->flags.disable_risc_code_load) { | |
7c3df132 | 752 | ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); |
1da177e4 LT |
753 | |
754 | /* Verify checksum of loaded RISC code. */ | |
e315cd28 | 755 | rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); |
42e421b1 AV |
756 | if (rval == QLA_SUCCESS) { |
757 | /* And, verify we are not in ROM code. */ | |
e315cd28 | 758 | rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, |
42e421b1 AV |
759 | &area, &domain, &topo, &sw_cap); |
760 | } | |
1da177e4 LT |
761 | } |
762 | ||
7c3df132 SK |
763 | if (rval) |
764 | ql_dbg(ql_dbg_init, vha, 0x007a, | |
765 | "**** Load RISC code ****.\n"); | |
1da177e4 LT |
766 | |
767 | return (rval); | |
768 | } | |
769 | ||
770 | /** | |
771 | * qla2x00_reset_chip() - Reset ISP chip. | |
772 | * @ha: HA context | |
773 | * | |
774 | * Returns 0 on success. | |
775 | */ | |
abbd8870 | 776 | void |
e315cd28 | 777 | qla2x00_reset_chip(scsi_qla_host_t *vha) |
1da177e4 LT |
778 | { |
779 | unsigned long flags = 0; | |
e315cd28 | 780 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 781 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 782 | uint32_t cnt; |
1da177e4 LT |
783 | uint16_t cmd; |
784 | ||
85880801 AV |
785 | if (unlikely(pci_channel_offline(ha->pdev))) |
786 | return; | |
787 | ||
fd34f556 | 788 | ha->isp_ops->disable_intrs(ha); |
1da177e4 LT |
789 | |
790 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
791 | ||
792 | /* Turn off master enable */ | |
793 | cmd = 0; | |
794 | pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); | |
795 | cmd &= ~PCI_COMMAND_MASTER; | |
796 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
797 | ||
798 | if (!IS_QLA2100(ha)) { | |
799 | /* Pause RISC. */ | |
800 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); | |
801 | if (IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
802 | for (cnt = 0; cnt < 30000; cnt++) { | |
803 | if ((RD_REG_WORD(®->hccr) & | |
804 | HCCR_RISC_PAUSE) != 0) | |
805 | break; | |
806 | udelay(100); | |
807 | } | |
808 | } else { | |
809 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
810 | udelay(10); | |
811 | } | |
812 | ||
813 | /* Select FPM registers. */ | |
814 | WRT_REG_WORD(®->ctrl_status, 0x20); | |
815 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
816 | ||
817 | /* FPM Soft Reset. */ | |
818 | WRT_REG_WORD(®->fpm_diag_config, 0x100); | |
819 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
820 | ||
821 | /* Toggle Fpm Reset. */ | |
822 | if (!IS_QLA2200(ha)) { | |
823 | WRT_REG_WORD(®->fpm_diag_config, 0x0); | |
824 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
825 | } | |
826 | ||
827 | /* Select frame buffer registers. */ | |
828 | WRT_REG_WORD(®->ctrl_status, 0x10); | |
829 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
830 | ||
831 | /* Reset frame buffer FIFOs. */ | |
832 | if (IS_QLA2200(ha)) { | |
833 | WRT_FB_CMD_REG(ha, reg, 0xa000); | |
834 | RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ | |
835 | } else { | |
836 | WRT_FB_CMD_REG(ha, reg, 0x00fc); | |
837 | ||
838 | /* Read back fb_cmd until zero or 3 seconds max */ | |
839 | for (cnt = 0; cnt < 3000; cnt++) { | |
840 | if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) | |
841 | break; | |
842 | udelay(100); | |
843 | } | |
844 | } | |
845 | ||
846 | /* Select RISC module registers. */ | |
847 | WRT_REG_WORD(®->ctrl_status, 0); | |
848 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
849 | ||
850 | /* Reset RISC processor. */ | |
851 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
852 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
853 | ||
854 | /* Release RISC processor. */ | |
855 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
856 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
857 | } | |
858 | ||
859 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
860 | WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); | |
861 | ||
862 | /* Reset ISP chip. */ | |
863 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
864 | ||
865 | /* Wait for RISC to recover from reset. */ | |
866 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
867 | /* | |
868 | * It is necessary to for a delay here since the card doesn't | |
869 | * respond to PCI reads during a reset. On some architectures | |
870 | * this will result in an MCA. | |
871 | */ | |
872 | udelay(20); | |
873 | for (cnt = 30000; cnt; cnt--) { | |
874 | if ((RD_REG_WORD(®->ctrl_status) & | |
875 | CSR_ISP_SOFT_RESET) == 0) | |
876 | break; | |
877 | udelay(100); | |
878 | } | |
879 | } else | |
880 | udelay(10); | |
881 | ||
882 | /* Reset RISC processor. */ | |
883 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
884 | ||
885 | WRT_REG_WORD(®->semaphore, 0); | |
886 | ||
887 | /* Release RISC processor. */ | |
888 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
889 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
890 | ||
891 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
892 | for (cnt = 0; cnt < 30000; cnt++) { | |
ffb39f03 | 893 | if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) |
1da177e4 | 894 | break; |
1da177e4 LT |
895 | |
896 | udelay(100); | |
897 | } | |
898 | } else | |
899 | udelay(100); | |
900 | ||
901 | /* Turn on master enable */ | |
902 | cmd |= PCI_COMMAND_MASTER; | |
903 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
904 | ||
905 | /* Disable RISC pause on FPM parity error. */ | |
906 | if (!IS_QLA2100(ha)) { | |
907 | WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); | |
908 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
909 | } | |
910 | ||
911 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
912 | } | |
913 | ||
b1d46989 MI |
914 | /** |
915 | * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. | |
916 | * | |
917 | * Returns 0 on success. | |
918 | */ | |
919 | int | |
920 | qla81xx_reset_mpi(scsi_qla_host_t *vha) | |
921 | { | |
922 | uint16_t mb[4] = {0x1010, 0, 1, 0}; | |
923 | ||
6246b8a1 GM |
924 | if (!IS_QLA81XX(vha->hw)) |
925 | return QLA_SUCCESS; | |
926 | ||
b1d46989 MI |
927 | return qla81xx_write_mpi_register(vha, mb); |
928 | } | |
929 | ||
0107109e | 930 | /** |
88c26663 | 931 | * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. |
0107109e AV |
932 | * @ha: HA context |
933 | * | |
934 | * Returns 0 on success. | |
935 | */ | |
88c26663 | 936 | static inline void |
e315cd28 | 937 | qla24xx_reset_risc(scsi_qla_host_t *vha) |
0107109e AV |
938 | { |
939 | unsigned long flags = 0; | |
e315cd28 | 940 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
941 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
942 | uint32_t cnt, d2; | |
335a1cc9 | 943 | uint16_t wd; |
b1d46989 | 944 | static int abts_cnt; /* ISP abort retry counts */ |
0107109e | 945 | |
0107109e AV |
946 | spin_lock_irqsave(&ha->hardware_lock, flags); |
947 | ||
948 | /* Reset RISC. */ | |
949 | WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
950 | for (cnt = 0; cnt < 30000; cnt++) { | |
951 | if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) | |
952 | break; | |
953 | ||
954 | udelay(10); | |
955 | } | |
956 | ||
957 | WRT_REG_DWORD(®->ctrl_status, | |
958 | CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
335a1cc9 | 959 | pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); |
88c26663 | 960 | |
335a1cc9 | 961 | udelay(100); |
88c26663 | 962 | /* Wait for firmware to complete NVRAM accesses. */ |
88c26663 AV |
963 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); |
964 | for (cnt = 10000 ; cnt && d2; cnt--) { | |
965 | udelay(5); | |
966 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
967 | barrier(); | |
968 | } | |
969 | ||
335a1cc9 | 970 | /* Wait for soft-reset to complete. */ |
0107109e AV |
971 | d2 = RD_REG_DWORD(®->ctrl_status); |
972 | for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) { | |
973 | udelay(5); | |
974 | d2 = RD_REG_DWORD(®->ctrl_status); | |
975 | barrier(); | |
976 | } | |
977 | ||
b1d46989 MI |
978 | /* If required, do an MPI FW reset now */ |
979 | if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { | |
980 | if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { | |
981 | if (++abts_cnt < 5) { | |
982 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
983 | set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); | |
984 | } else { | |
985 | /* | |
986 | * We exhausted the ISP abort retries. We have to | |
987 | * set the board offline. | |
988 | */ | |
989 | abts_cnt = 0; | |
990 | vha->flags.online = 0; | |
991 | } | |
992 | } | |
993 | } | |
994 | ||
0107109e AV |
995 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); |
996 | RD_REG_DWORD(®->hccr); | |
997 | ||
998 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
999 | RD_REG_DWORD(®->hccr); | |
1000 | ||
1001 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); | |
1002 | RD_REG_DWORD(®->hccr); | |
1003 | ||
1004 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
1005 | for (cnt = 6000000 ; cnt && d2; cnt--) { | |
1006 | udelay(5); | |
1007 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
1008 | barrier(); | |
1009 | } | |
1010 | ||
1011 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
124f85e6 AV |
1012 | |
1013 | if (IS_NOPOLLING_TYPE(ha)) | |
1014 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
1015 | } |
1016 | ||
88c26663 AV |
1017 | /** |
1018 | * qla24xx_reset_chip() - Reset ISP24xx chip. | |
1019 | * @ha: HA context | |
1020 | * | |
1021 | * Returns 0 on success. | |
1022 | */ | |
1023 | void | |
e315cd28 | 1024 | qla24xx_reset_chip(scsi_qla_host_t *vha) |
88c26663 | 1025 | { |
e315cd28 | 1026 | struct qla_hw_data *ha = vha->hw; |
85880801 AV |
1027 | |
1028 | if (pci_channel_offline(ha->pdev) && | |
1029 | ha->flags.pci_channel_io_perm_failure) { | |
1030 | return; | |
1031 | } | |
1032 | ||
fd34f556 | 1033 | ha->isp_ops->disable_intrs(ha); |
88c26663 AV |
1034 | |
1035 | /* Perform RISC reset. */ | |
e315cd28 | 1036 | qla24xx_reset_risc(vha); |
88c26663 AV |
1037 | } |
1038 | ||
1da177e4 LT |
1039 | /** |
1040 | * qla2x00_chip_diag() - Test chip for proper operation. | |
1041 | * @ha: HA context | |
1042 | * | |
1043 | * Returns 0 on success. | |
1044 | */ | |
abbd8870 | 1045 | int |
e315cd28 | 1046 | qla2x00_chip_diag(scsi_qla_host_t *vha) |
1da177e4 LT |
1047 | { |
1048 | int rval; | |
e315cd28 | 1049 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 1050 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 LT |
1051 | unsigned long flags = 0; |
1052 | uint16_t data; | |
1053 | uint32_t cnt; | |
1054 | uint16_t mb[5]; | |
73208dfd | 1055 | struct req_que *req = ha->req_q_map[0]; |
1da177e4 LT |
1056 | |
1057 | /* Assume a failed state */ | |
1058 | rval = QLA_FUNCTION_FAILED; | |
1059 | ||
7c3df132 SK |
1060 | ql_dbg(ql_dbg_init, vha, 0x007b, |
1061 | "Testing device at %lx.\n", (u_long)®->flash_address); | |
1da177e4 LT |
1062 | |
1063 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1064 | ||
1065 | /* Reset ISP chip. */ | |
1066 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
1067 | ||
1068 | /* | |
1069 | * We need to have a delay here since the card will not respond while | |
1070 | * in reset causing an MCA on some architectures. | |
1071 | */ | |
1072 | udelay(20); | |
1073 | data = qla2x00_debounce_register(®->ctrl_status); | |
1074 | for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { | |
1075 | udelay(5); | |
1076 | data = RD_REG_WORD(®->ctrl_status); | |
1077 | barrier(); | |
1078 | } | |
1079 | ||
1080 | if (!cnt) | |
1081 | goto chip_diag_failed; | |
1082 | ||
7c3df132 SK |
1083 | ql_dbg(ql_dbg_init, vha, 0x007c, |
1084 | "Reset register cleared by chip reset.\n"); | |
1da177e4 LT |
1085 | |
1086 | /* Reset RISC processor. */ | |
1087 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
1088 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
1089 | ||
1090 | /* Workaround for QLA2312 PCI parity error */ | |
1091 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
1092 | data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); | |
1093 | for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { | |
1094 | udelay(5); | |
1095 | data = RD_MAILBOX_REG(ha, reg, 0); | |
fa2a1ce5 | 1096 | barrier(); |
1da177e4 LT |
1097 | } |
1098 | } else | |
1099 | udelay(10); | |
1100 | ||
1101 | if (!cnt) | |
1102 | goto chip_diag_failed; | |
1103 | ||
1104 | /* Check product ID of chip */ | |
7c3df132 | 1105 | ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n"); |
1da177e4 LT |
1106 | |
1107 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
1108 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
1109 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
1110 | mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); | |
1111 | if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || | |
1112 | mb[3] != PROD_ID_3) { | |
7c3df132 SK |
1113 | ql_log(ql_log_warn, vha, 0x0062, |
1114 | "Wrong product ID = 0x%x,0x%x,0x%x.\n", | |
1115 | mb[1], mb[2], mb[3]); | |
1da177e4 LT |
1116 | |
1117 | goto chip_diag_failed; | |
1118 | } | |
1119 | ha->product_id[0] = mb[1]; | |
1120 | ha->product_id[1] = mb[2]; | |
1121 | ha->product_id[2] = mb[3]; | |
1122 | ha->product_id[3] = mb[4]; | |
1123 | ||
1124 | /* Adjust fw RISC transfer size */ | |
73208dfd | 1125 | if (req->length > 1024) |
1da177e4 LT |
1126 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; |
1127 | else | |
1128 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * | |
73208dfd | 1129 | req->length; |
1da177e4 LT |
1130 | |
1131 | if (IS_QLA2200(ha) && | |
1132 | RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { | |
1133 | /* Limit firmware transfer size with a 2200A */ | |
7c3df132 | 1134 | ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); |
1da177e4 | 1135 | |
ea5b6382 | 1136 | ha->device_type |= DT_ISP2200A; |
1da177e4 LT |
1137 | ha->fw_transfer_size = 128; |
1138 | } | |
1139 | ||
1140 | /* Wrap Incoming Mailboxes Test. */ | |
1141 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1142 | ||
7c3df132 | 1143 | ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); |
e315cd28 | 1144 | rval = qla2x00_mbx_reg_test(vha); |
7c3df132 SK |
1145 | if (rval) |
1146 | ql_log(ql_log_warn, vha, 0x0080, | |
1147 | "Failed mailbox send register test.\n"); | |
1148 | else | |
1da177e4 LT |
1149 | /* Flag a successful rval */ |
1150 | rval = QLA_SUCCESS; | |
1da177e4 LT |
1151 | spin_lock_irqsave(&ha->hardware_lock, flags); |
1152 | ||
1153 | chip_diag_failed: | |
1154 | if (rval) | |
7c3df132 SK |
1155 | ql_log(ql_log_info, vha, 0x0081, |
1156 | "Chip diagnostics **** FAILED ****.\n"); | |
1da177e4 LT |
1157 | |
1158 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1159 | ||
1160 | return (rval); | |
1161 | } | |
1162 | ||
0107109e AV |
1163 | /** |
1164 | * qla24xx_chip_diag() - Test ISP24xx for proper operation. | |
1165 | * @ha: HA context | |
1166 | * | |
1167 | * Returns 0 on success. | |
1168 | */ | |
1169 | int | |
e315cd28 | 1170 | qla24xx_chip_diag(scsi_qla_host_t *vha) |
0107109e AV |
1171 | { |
1172 | int rval; | |
e315cd28 | 1173 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 1174 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 1175 | |
a9083016 GM |
1176 | if (IS_QLA82XX(ha)) |
1177 | return QLA_SUCCESS; | |
1178 | ||
73208dfd | 1179 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; |
0107109e | 1180 | |
e315cd28 | 1181 | rval = qla2x00_mbx_reg_test(vha); |
0107109e | 1182 | if (rval) { |
7c3df132 SK |
1183 | ql_log(ql_log_warn, vha, 0x0082, |
1184 | "Failed mailbox send register test.\n"); | |
0107109e AV |
1185 | } else { |
1186 | /* Flag a successful rval */ | |
1187 | rval = QLA_SUCCESS; | |
1188 | } | |
1189 | ||
1190 | return rval; | |
1191 | } | |
1192 | ||
a7a167bf | 1193 | void |
e315cd28 | 1194 | qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) |
0107109e | 1195 | { |
a7a167bf AV |
1196 | int rval; |
1197 | uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, | |
73208dfd | 1198 | eft_size, fce_size, mq_size; |
df613b96 AV |
1199 | dma_addr_t tc_dma; |
1200 | void *tc; | |
e315cd28 | 1201 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
1202 | struct req_que *req = ha->req_q_map[0]; |
1203 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
a7a167bf AV |
1204 | |
1205 | if (ha->fw_dump) { | |
7c3df132 SK |
1206 | ql_dbg(ql_dbg_init, vha, 0x00bd, |
1207 | "Firmware dump already allocated.\n"); | |
a7a167bf AV |
1208 | return; |
1209 | } | |
d4e3e04d | 1210 | |
0107109e | 1211 | ha->fw_dumped = 0; |
73208dfd | 1212 | fixed_size = mem_size = eft_size = fce_size = mq_size = 0; |
d4e3e04d | 1213 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { |
a7a167bf | 1214 | fixed_size = sizeof(struct qla2100_fw_dump); |
d4e3e04d | 1215 | } else if (IS_QLA23XX(ha)) { |
a7a167bf AV |
1216 | fixed_size = offsetof(struct qla2300_fw_dump, data_ram); |
1217 | mem_size = (ha->fw_memory_size - 0x11000 + 1) * | |
1218 | sizeof(uint16_t); | |
e428924c | 1219 | } else if (IS_FWI2_CAPABLE(ha)) { |
6246b8a1 GM |
1220 | if (IS_QLA83XX(ha)) |
1221 | fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); | |
1222 | else if (IS_QLA81XX(ha)) | |
3a03eb79 AV |
1223 | fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); |
1224 | else if (IS_QLA25XX(ha)) | |
1225 | fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); | |
1226 | else | |
1227 | fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); | |
a7a167bf AV |
1228 | mem_size = (ha->fw_memory_size - 0x100000 + 1) * |
1229 | sizeof(uint32_t); | |
050c9bb1 | 1230 | if (ha->mqenable) { |
6246b8a1 GM |
1231 | if (!IS_QLA83XX(ha)) |
1232 | mq_size = sizeof(struct qla2xxx_mq_chain); | |
050c9bb1 GM |
1233 | /* |
1234 | * Allocate maximum buffer size for all queues. | |
1235 | * Resizing must be done at end-of-dump processing. | |
1236 | */ | |
1237 | mq_size += ha->max_req_queues * | |
1238 | (req->length * sizeof(request_t)); | |
1239 | mq_size += ha->max_rsp_queues * | |
1240 | (rsp->length * sizeof(response_t)); | |
1241 | } | |
2d70c103 NB |
1242 | if (ha->tgt.atio_q_length) |
1243 | mq_size += ha->tgt.atio_q_length * sizeof(request_t); | |
df613b96 | 1244 | /* Allocate memory for Fibre Channel Event Buffer. */ |
6246b8a1 | 1245 | if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha)) |
436a7b11 | 1246 | goto try_eft; |
df613b96 AV |
1247 | |
1248 | tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, | |
1249 | GFP_KERNEL); | |
1250 | if (!tc) { | |
7c3df132 SK |
1251 | ql_log(ql_log_warn, vha, 0x00be, |
1252 | "Unable to allocate (%d KB) for FCE.\n", | |
1253 | FCE_SIZE / 1024); | |
17d98630 | 1254 | goto try_eft; |
df613b96 AV |
1255 | } |
1256 | ||
1257 | memset(tc, 0, FCE_SIZE); | |
e315cd28 | 1258 | rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, |
df613b96 AV |
1259 | ha->fce_mb, &ha->fce_bufs); |
1260 | if (rval) { | |
7c3df132 SK |
1261 | ql_log(ql_log_warn, vha, 0x00bf, |
1262 | "Unable to initialize FCE (%d).\n", rval); | |
df613b96 AV |
1263 | dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, |
1264 | tc_dma); | |
1265 | ha->flags.fce_enabled = 0; | |
17d98630 | 1266 | goto try_eft; |
df613b96 | 1267 | } |
cfb0919c | 1268 | ql_dbg(ql_dbg_init, vha, 0x00c0, |
7c3df132 | 1269 | "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); |
df613b96 | 1270 | |
7d9dade3 | 1271 | fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; |
df613b96 AV |
1272 | ha->flags.fce_enabled = 1; |
1273 | ha->fce_dma = tc_dma; | |
1274 | ha->fce = tc; | |
436a7b11 AV |
1275 | try_eft: |
1276 | /* Allocate memory for Extended Trace Buffer. */ | |
1277 | tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, | |
1278 | GFP_KERNEL); | |
1279 | if (!tc) { | |
7c3df132 SK |
1280 | ql_log(ql_log_warn, vha, 0x00c1, |
1281 | "Unable to allocate (%d KB) for EFT.\n", | |
1282 | EFT_SIZE / 1024); | |
436a7b11 AV |
1283 | goto cont_alloc; |
1284 | } | |
1285 | ||
1286 | memset(tc, 0, EFT_SIZE); | |
e315cd28 | 1287 | rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); |
436a7b11 | 1288 | if (rval) { |
7c3df132 SK |
1289 | ql_log(ql_log_warn, vha, 0x00c2, |
1290 | "Unable to initialize EFT (%d).\n", rval); | |
436a7b11 AV |
1291 | dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, |
1292 | tc_dma); | |
1293 | goto cont_alloc; | |
1294 | } | |
cfb0919c | 1295 | ql_dbg(ql_dbg_init, vha, 0x00c3, |
7c3df132 | 1296 | "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); |
436a7b11 AV |
1297 | |
1298 | eft_size = EFT_SIZE; | |
1299 | ha->eft_dma = tc_dma; | |
1300 | ha->eft = tc; | |
d4e3e04d | 1301 | } |
a7a167bf | 1302 | cont_alloc: |
73208dfd AC |
1303 | req_q_size = req->length * sizeof(request_t); |
1304 | rsp_q_size = rsp->length * sizeof(response_t); | |
a7a167bf AV |
1305 | |
1306 | dump_size = offsetof(struct qla2xxx_fw_dump, isp); | |
2afa19a9 | 1307 | dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; |
bb99de67 AV |
1308 | ha->chain_offset = dump_size; |
1309 | dump_size += mq_size + fce_size; | |
d4e3e04d AV |
1310 | |
1311 | ha->fw_dump = vmalloc(dump_size); | |
a7a167bf | 1312 | if (!ha->fw_dump) { |
7c3df132 SK |
1313 | ql_log(ql_log_warn, vha, 0x00c4, |
1314 | "Unable to allocate (%d KB) for firmware dump.\n", | |
1315 | dump_size / 1024); | |
a7a167bf | 1316 | |
e30d1756 MI |
1317 | if (ha->fce) { |
1318 | dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce, | |
1319 | ha->fce_dma); | |
1320 | ha->fce = NULL; | |
1321 | ha->fce_dma = 0; | |
1322 | } | |
1323 | ||
a7a167bf AV |
1324 | if (ha->eft) { |
1325 | dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft, | |
1326 | ha->eft_dma); | |
1327 | ha->eft = NULL; | |
1328 | ha->eft_dma = 0; | |
1329 | } | |
1330 | return; | |
1331 | } | |
cfb0919c | 1332 | ql_dbg(ql_dbg_init, vha, 0x00c5, |
7c3df132 | 1333 | "Allocated (%d KB) for firmware dump.\n", dump_size / 1024); |
a7a167bf AV |
1334 | |
1335 | ha->fw_dump_len = dump_size; | |
1336 | ha->fw_dump->signature[0] = 'Q'; | |
1337 | ha->fw_dump->signature[1] = 'L'; | |
1338 | ha->fw_dump->signature[2] = 'G'; | |
1339 | ha->fw_dump->signature[3] = 'C'; | |
1340 | ha->fw_dump->version = __constant_htonl(1); | |
1341 | ||
1342 | ha->fw_dump->fixed_size = htonl(fixed_size); | |
1343 | ha->fw_dump->mem_size = htonl(mem_size); | |
1344 | ha->fw_dump->req_q_size = htonl(req_q_size); | |
1345 | ha->fw_dump->rsp_q_size = htonl(rsp_q_size); | |
1346 | ||
1347 | ha->fw_dump->eft_size = htonl(eft_size); | |
1348 | ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); | |
1349 | ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); | |
1350 | ||
1351 | ha->fw_dump->header_size = | |
1352 | htonl(offsetof(struct qla2xxx_fw_dump, isp)); | |
0107109e AV |
1353 | } |
1354 | ||
18e7555a AV |
1355 | static int |
1356 | qla81xx_mpi_sync(scsi_qla_host_t *vha) | |
1357 | { | |
1358 | #define MPS_MASK 0xe0 | |
1359 | int rval; | |
1360 | uint16_t dc; | |
1361 | uint32_t dw; | |
18e7555a AV |
1362 | |
1363 | if (!IS_QLA81XX(vha->hw)) | |
1364 | return QLA_SUCCESS; | |
1365 | ||
1366 | rval = qla2x00_write_ram_word(vha, 0x7c00, 1); | |
1367 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
1368 | ql_log(ql_log_warn, vha, 0x0105, |
1369 | "Unable to acquire semaphore.\n"); | |
18e7555a AV |
1370 | goto done; |
1371 | } | |
1372 | ||
1373 | pci_read_config_word(vha->hw->pdev, 0x54, &dc); | |
1374 | rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); | |
1375 | if (rval != QLA_SUCCESS) { | |
7c3df132 | 1376 | ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); |
18e7555a AV |
1377 | goto done_release; |
1378 | } | |
1379 | ||
1380 | dc &= MPS_MASK; | |
1381 | if (dc == (dw & MPS_MASK)) | |
1382 | goto done_release; | |
1383 | ||
1384 | dw &= ~MPS_MASK; | |
1385 | dw |= dc; | |
1386 | rval = qla2x00_write_ram_word(vha, 0x7a15, dw); | |
1387 | if (rval != QLA_SUCCESS) { | |
7c3df132 | 1388 | ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); |
18e7555a AV |
1389 | } |
1390 | ||
1391 | done_release: | |
1392 | rval = qla2x00_write_ram_word(vha, 0x7c00, 0); | |
1393 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
1394 | ql_log(ql_log_warn, vha, 0x006d, |
1395 | "Unable to release semaphore.\n"); | |
18e7555a AV |
1396 | } |
1397 | ||
1398 | done: | |
1399 | return rval; | |
1400 | } | |
1401 | ||
1da177e4 LT |
1402 | /** |
1403 | * qla2x00_setup_chip() - Load and start RISC firmware. | |
1404 | * @ha: HA context | |
1405 | * | |
1406 | * Returns 0 on success. | |
1407 | */ | |
1408 | static int | |
e315cd28 | 1409 | qla2x00_setup_chip(scsi_qla_host_t *vha) |
1da177e4 | 1410 | { |
0107109e AV |
1411 | int rval; |
1412 | uint32_t srisc_address = 0; | |
e315cd28 | 1413 | struct qla_hw_data *ha = vha->hw; |
3db0652e AV |
1414 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1415 | unsigned long flags; | |
dda772e8 | 1416 | uint16_t fw_major_version; |
3db0652e | 1417 | |
a9083016 GM |
1418 | if (IS_QLA82XX(ha)) { |
1419 | rval = ha->isp_ops->load_risc(vha, &srisc_address); | |
14e303d9 AV |
1420 | if (rval == QLA_SUCCESS) { |
1421 | qla2x00_stop_firmware(vha); | |
a9083016 | 1422 | goto enable_82xx_npiv; |
14e303d9 | 1423 | } else |
b963752f | 1424 | goto failed; |
a9083016 GM |
1425 | } |
1426 | ||
3db0652e AV |
1427 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { |
1428 | /* Disable SRAM, Instruction RAM and GP RAM parity. */ | |
1429 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1430 | WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); | |
1431 | RD_REG_WORD(®->hccr); | |
1432 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1433 | } | |
1da177e4 | 1434 | |
18e7555a AV |
1435 | qla81xx_mpi_sync(vha); |
1436 | ||
1da177e4 | 1437 | /* Load firmware sequences */ |
e315cd28 | 1438 | rval = ha->isp_ops->load_risc(vha, &srisc_address); |
0107109e | 1439 | if (rval == QLA_SUCCESS) { |
7c3df132 SK |
1440 | ql_dbg(ql_dbg_init, vha, 0x00c9, |
1441 | "Verifying Checksum of loaded RISC code.\n"); | |
1da177e4 | 1442 | |
e315cd28 | 1443 | rval = qla2x00_verify_checksum(vha, srisc_address); |
1da177e4 LT |
1444 | if (rval == QLA_SUCCESS) { |
1445 | /* Start firmware execution. */ | |
7c3df132 SK |
1446 | ql_dbg(ql_dbg_init, vha, 0x00ca, |
1447 | "Starting firmware.\n"); | |
1da177e4 | 1448 | |
e315cd28 | 1449 | rval = qla2x00_execute_fw(vha, srisc_address); |
1da177e4 | 1450 | /* Retrieve firmware information. */ |
dda772e8 | 1451 | if (rval == QLA_SUCCESS) { |
a9083016 | 1452 | enable_82xx_npiv: |
dda772e8 | 1453 | fw_major_version = ha->fw_major_version; |
3173167f GM |
1454 | if (IS_QLA82XX(ha)) |
1455 | qla82xx_check_md_needed(vha); | |
6246b8a1 GM |
1456 | else |
1457 | rval = qla2x00_get_fw_version(vha); | |
ca9e9c3e AV |
1458 | if (rval != QLA_SUCCESS) |
1459 | goto failed; | |
2c3dfe3f | 1460 | ha->flags.npiv_supported = 0; |
e315cd28 | 1461 | if (IS_QLA2XXX_MIDTYPE(ha) && |
946fb891 | 1462 | (ha->fw_attributes & BIT_2)) { |
2c3dfe3f | 1463 | ha->flags.npiv_supported = 1; |
4d0ea247 SJ |
1464 | if ((!ha->max_npiv_vports) || |
1465 | ((ha->max_npiv_vports + 1) % | |
eb66dc60 | 1466 | MIN_MULTI_ID_FABRIC)) |
4d0ea247 | 1467 | ha->max_npiv_vports = |
eb66dc60 | 1468 | MIN_MULTI_ID_FABRIC - 1; |
4d0ea247 | 1469 | } |
24a08138 AV |
1470 | qla2x00_get_resource_cnts(vha, NULL, |
1471 | &ha->fw_xcb_count, NULL, NULL, | |
f3a0a77e | 1472 | &ha->max_npiv_vports, NULL); |
d743de66 | 1473 | |
be5ea3cf SK |
1474 | if (!fw_major_version && ql2xallocfwdump |
1475 | && !IS_QLA82XX(ha)) | |
08de2844 | 1476 | qla2x00_alloc_fw_dump(vha); |
1da177e4 LT |
1477 | } |
1478 | } else { | |
7c3df132 SK |
1479 | ql_log(ql_log_fatal, vha, 0x00cd, |
1480 | "ISP Firmware failed checksum.\n"); | |
1481 | goto failed; | |
1da177e4 LT |
1482 | } |
1483 | } | |
1484 | ||
3db0652e AV |
1485 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { |
1486 | /* Enable proper parity. */ | |
1487 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1488 | if (IS_QLA2300(ha)) | |
1489 | /* SRAM parity */ | |
1490 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); | |
1491 | else | |
1492 | /* SRAM, Instruction RAM and GP RAM parity */ | |
1493 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); | |
1494 | RD_REG_WORD(®->hccr); | |
1495 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1496 | } | |
1497 | ||
6246b8a1 GM |
1498 | if (IS_QLA83XX(ha)) |
1499 | goto skip_fac_check; | |
1500 | ||
1d2874de JC |
1501 | if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { |
1502 | uint32_t size; | |
1503 | ||
1504 | rval = qla81xx_fac_get_sector_size(vha, &size); | |
1505 | if (rval == QLA_SUCCESS) { | |
1506 | ha->flags.fac_supported = 1; | |
1507 | ha->fdt_block_size = size << 2; | |
1508 | } else { | |
7c3df132 | 1509 | ql_log(ql_log_warn, vha, 0x00ce, |
1d2874de JC |
1510 | "Unsupported FAC firmware (%d.%02d.%02d).\n", |
1511 | ha->fw_major_version, ha->fw_minor_version, | |
1512 | ha->fw_subminor_version); | |
6246b8a1 GM |
1513 | skip_fac_check: |
1514 | if (IS_QLA83XX(ha)) { | |
1515 | ha->flags.fac_supported = 0; | |
1516 | rval = QLA_SUCCESS; | |
1517 | } | |
1d2874de JC |
1518 | } |
1519 | } | |
ca9e9c3e | 1520 | failed: |
1da177e4 | 1521 | if (rval) { |
7c3df132 SK |
1522 | ql_log(ql_log_fatal, vha, 0x00cf, |
1523 | "Setup chip ****FAILED****.\n"); | |
1da177e4 LT |
1524 | } |
1525 | ||
1526 | return (rval); | |
1527 | } | |
1528 | ||
1529 | /** | |
1530 | * qla2x00_init_response_q_entries() - Initializes response queue entries. | |
1531 | * @ha: HA context | |
1532 | * | |
1533 | * Beginning of request ring has initialization control block already built | |
1534 | * by nvram config routine. | |
1535 | * | |
1536 | * Returns 0 on success. | |
1537 | */ | |
73208dfd AC |
1538 | void |
1539 | qla2x00_init_response_q_entries(struct rsp_que *rsp) | |
1da177e4 LT |
1540 | { |
1541 | uint16_t cnt; | |
1542 | response_t *pkt; | |
1543 | ||
2afa19a9 AC |
1544 | rsp->ring_ptr = rsp->ring; |
1545 | rsp->ring_index = 0; | |
1546 | rsp->status_srb = NULL; | |
e315cd28 AC |
1547 | pkt = rsp->ring_ptr; |
1548 | for (cnt = 0; cnt < rsp->length; cnt++) { | |
1da177e4 LT |
1549 | pkt->signature = RESPONSE_PROCESSED; |
1550 | pkt++; | |
1551 | } | |
1da177e4 LT |
1552 | } |
1553 | ||
1554 | /** | |
1555 | * qla2x00_update_fw_options() - Read and process firmware options. | |
1556 | * @ha: HA context | |
1557 | * | |
1558 | * Returns 0 on success. | |
1559 | */ | |
abbd8870 | 1560 | void |
e315cd28 | 1561 | qla2x00_update_fw_options(scsi_qla_host_t *vha) |
1da177e4 LT |
1562 | { |
1563 | uint16_t swing, emphasis, tx_sens, rx_sens; | |
e315cd28 | 1564 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1565 | |
1566 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
e315cd28 | 1567 | qla2x00_get_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1568 | |
1569 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) | |
1570 | return; | |
1571 | ||
1572 | /* Serial Link options. */ | |
7c3df132 SK |
1573 | ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, |
1574 | "Serial link options.\n"); | |
1575 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, | |
1576 | (uint8_t *)&ha->fw_seriallink_options, | |
1577 | sizeof(ha->fw_seriallink_options)); | |
1da177e4 LT |
1578 | |
1579 | ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; | |
1580 | if (ha->fw_seriallink_options[3] & BIT_2) { | |
1581 | ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; | |
1582 | ||
1583 | /* 1G settings */ | |
1584 | swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); | |
1585 | emphasis = (ha->fw_seriallink_options[2] & | |
1586 | (BIT_4 | BIT_3)) >> 3; | |
1587 | tx_sens = ha->fw_seriallink_options[0] & | |
fa2a1ce5 | 1588 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1589 | rx_sens = (ha->fw_seriallink_options[0] & |
1590 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1591 | ha->fw_options[10] = (emphasis << 14) | (swing << 8); | |
1592 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1593 | if (rx_sens == 0x0) | |
1594 | rx_sens = 0x3; | |
1595 | ha->fw_options[10] |= (tx_sens << 4) | rx_sens; | |
1596 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1597 | ha->fw_options[10] |= BIT_5 | | |
1598 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1599 | (tx_sens & (BIT_1 | BIT_0)); | |
1600 | ||
1601 | /* 2G settings */ | |
1602 | swing = (ha->fw_seriallink_options[2] & | |
1603 | (BIT_7 | BIT_6 | BIT_5)) >> 5; | |
1604 | emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); | |
1605 | tx_sens = ha->fw_seriallink_options[1] & | |
fa2a1ce5 | 1606 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1607 | rx_sens = (ha->fw_seriallink_options[1] & |
1608 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1609 | ha->fw_options[11] = (emphasis << 14) | (swing << 8); | |
1610 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1611 | if (rx_sens == 0x0) | |
1612 | rx_sens = 0x3; | |
1613 | ha->fw_options[11] |= (tx_sens << 4) | rx_sens; | |
1614 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1615 | ha->fw_options[11] |= BIT_5 | | |
1616 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1617 | (tx_sens & (BIT_1 | BIT_0)); | |
1618 | } | |
1619 | ||
1620 | /* FCP2 options. */ | |
1621 | /* Return command IOCBs without waiting for an ABTS to complete. */ | |
1622 | ha->fw_options[3] |= BIT_13; | |
1623 | ||
1624 | /* LED scheme. */ | |
1625 | if (ha->flags.enable_led_scheme) | |
1626 | ha->fw_options[2] |= BIT_12; | |
1627 | ||
48c02fde AV |
1628 | /* Detect ISP6312. */ |
1629 | if (IS_QLA6312(ha)) | |
1630 | ha->fw_options[2] |= BIT_13; | |
1631 | ||
1da177e4 | 1632 | /* Update firmware options. */ |
e315cd28 | 1633 | qla2x00_set_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1634 | } |
1635 | ||
0107109e | 1636 | void |
e315cd28 | 1637 | qla24xx_update_fw_options(scsi_qla_host_t *vha) |
0107109e AV |
1638 | { |
1639 | int rval; | |
e315cd28 | 1640 | struct qla_hw_data *ha = vha->hw; |
0107109e | 1641 | |
a9083016 GM |
1642 | if (IS_QLA82XX(ha)) |
1643 | return; | |
1644 | ||
0107109e | 1645 | /* Update Serial Link options. */ |
f94097ed | 1646 | if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) |
0107109e AV |
1647 | return; |
1648 | ||
e315cd28 | 1649 | rval = qla2x00_set_serdes_params(vha, |
f94097ed AV |
1650 | le16_to_cpu(ha->fw_seriallink_options24[1]), |
1651 | le16_to_cpu(ha->fw_seriallink_options24[2]), | |
1652 | le16_to_cpu(ha->fw_seriallink_options24[3])); | |
0107109e | 1653 | if (rval != QLA_SUCCESS) { |
7c3df132 | 1654 | ql_log(ql_log_warn, vha, 0x0104, |
0107109e AV |
1655 | "Unable to update Serial Link options (%x).\n", rval); |
1656 | } | |
1657 | } | |
1658 | ||
abbd8870 | 1659 | void |
e315cd28 | 1660 | qla2x00_config_rings(struct scsi_qla_host *vha) |
abbd8870 | 1661 | { |
e315cd28 | 1662 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 1663 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
73208dfd AC |
1664 | struct req_que *req = ha->req_q_map[0]; |
1665 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
abbd8870 AV |
1666 | |
1667 | /* Setup ring parameters in initialization control block. */ | |
1668 | ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1669 | ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1670 | ha->init_cb->request_q_length = cpu_to_le16(req->length); |
1671 | ha->init_cb->response_q_length = cpu_to_le16(rsp->length); | |
1672 | ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1673 | ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1674 | ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1675 | ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
abbd8870 AV |
1676 | |
1677 | WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); | |
1678 | WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); | |
1679 | WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); | |
1680 | WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); | |
1681 | RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ | |
1682 | } | |
1683 | ||
0107109e | 1684 | void |
e315cd28 | 1685 | qla24xx_config_rings(struct scsi_qla_host *vha) |
0107109e | 1686 | { |
e315cd28 | 1687 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
1688 | device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0); |
1689 | struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; | |
1690 | struct qla_msix_entry *msix; | |
0107109e | 1691 | struct init_cb_24xx *icb; |
73208dfd AC |
1692 | uint16_t rid = 0; |
1693 | struct req_que *req = ha->req_q_map[0]; | |
1694 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
0107109e | 1695 | |
6246b8a1 | 1696 | /* Setup ring parameters in initialization control block. */ |
0107109e AV |
1697 | icb = (struct init_cb_24xx *)ha->init_cb; |
1698 | icb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1699 | icb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1700 | icb->request_q_length = cpu_to_le16(req->length); |
1701 | icb->response_q_length = cpu_to_le16(rsp->length); | |
1702 | icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1703 | icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1704 | icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1705 | icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
0107109e | 1706 | |
2d70c103 NB |
1707 | /* Setup ATIO queue dma pointers for target mode */ |
1708 | icb->atio_q_inpointer = __constant_cpu_to_le16(0); | |
1709 | icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); | |
1710 | icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma)); | |
1711 | icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma)); | |
1712 | ||
6246b8a1 | 1713 | if (ha->mqenable || IS_QLA83XX(ha)) { |
73208dfd AC |
1714 | icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS); |
1715 | icb->rid = __constant_cpu_to_le16(rid); | |
1716 | if (ha->flags.msix_enabled) { | |
1717 | msix = &ha->msix_entries[1]; | |
7c3df132 SK |
1718 | ql_dbg(ql_dbg_init, vha, 0x00fd, |
1719 | "Registering vector 0x%x for base que.\n", | |
1720 | msix->entry); | |
73208dfd AC |
1721 | icb->msix = cpu_to_le16(msix->entry); |
1722 | } | |
1723 | /* Use alternate PCI bus number */ | |
1724 | if (MSB(rid)) | |
1725 | icb->firmware_options_2 |= | |
1726 | __constant_cpu_to_le32(BIT_19); | |
1727 | /* Use alternate PCI devfn */ | |
1728 | if (LSB(rid)) | |
1729 | icb->firmware_options_2 |= | |
1730 | __constant_cpu_to_le32(BIT_18); | |
1731 | ||
3155754a | 1732 | /* Use Disable MSIX Handshake mode for capable adapters */ |
6246b8a1 GM |
1733 | if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && |
1734 | (ha->flags.msix_enabled)) { | |
3155754a AC |
1735 | icb->firmware_options_2 &= |
1736 | __constant_cpu_to_le32(~BIT_22); | |
1737 | ha->flags.disable_msix_handshake = 1; | |
7c3df132 SK |
1738 | ql_dbg(ql_dbg_init, vha, 0x00fe, |
1739 | "MSIX Handshake Disable Mode turned on.\n"); | |
3155754a AC |
1740 | } else { |
1741 | icb->firmware_options_2 |= | |
1742 | __constant_cpu_to_le32(BIT_22); | |
1743 | } | |
73208dfd | 1744 | icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23); |
73208dfd AC |
1745 | |
1746 | WRT_REG_DWORD(®->isp25mq.req_q_in, 0); | |
1747 | WRT_REG_DWORD(®->isp25mq.req_q_out, 0); | |
1748 | WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); | |
1749 | WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); | |
1750 | } else { | |
1751 | WRT_REG_DWORD(®->isp24.req_q_in, 0); | |
1752 | WRT_REG_DWORD(®->isp24.req_q_out, 0); | |
1753 | WRT_REG_DWORD(®->isp24.rsp_q_in, 0); | |
1754 | WRT_REG_DWORD(®->isp24.rsp_q_out, 0); | |
1755 | } | |
2d70c103 NB |
1756 | qlt_24xx_config_rings(vha, reg); |
1757 | ||
73208dfd AC |
1758 | /* PCI posting */ |
1759 | RD_REG_DWORD(&ioreg->hccr); | |
0107109e AV |
1760 | } |
1761 | ||
1da177e4 LT |
1762 | /** |
1763 | * qla2x00_init_rings() - Initializes firmware. | |
1764 | * @ha: HA context | |
1765 | * | |
1766 | * Beginning of request ring has initialization control block already built | |
1767 | * by nvram config routine. | |
1768 | * | |
1769 | * Returns 0 on success. | |
1770 | */ | |
1771 | static int | |
e315cd28 | 1772 | qla2x00_init_rings(scsi_qla_host_t *vha) |
1da177e4 LT |
1773 | { |
1774 | int rval; | |
1775 | unsigned long flags = 0; | |
29bdccbe | 1776 | int cnt, que; |
e315cd28 | 1777 | struct qla_hw_data *ha = vha->hw; |
29bdccbe AC |
1778 | struct req_que *req; |
1779 | struct rsp_que *rsp; | |
2c3dfe3f SJ |
1780 | struct mid_init_cb_24xx *mid_init_cb = |
1781 | (struct mid_init_cb_24xx *) ha->init_cb; | |
1da177e4 LT |
1782 | |
1783 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1784 | ||
1785 | /* Clear outstanding commands array. */ | |
2afa19a9 | 1786 | for (que = 0; que < ha->max_req_queues; que++) { |
29bdccbe AC |
1787 | req = ha->req_q_map[que]; |
1788 | if (!req) | |
1789 | continue; | |
2afa19a9 | 1790 | for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) |
29bdccbe | 1791 | req->outstanding_cmds[cnt] = NULL; |
1da177e4 | 1792 | |
2afa19a9 | 1793 | req->current_outstanding_cmd = 1; |
1da177e4 | 1794 | |
29bdccbe AC |
1795 | /* Initialize firmware. */ |
1796 | req->ring_ptr = req->ring; | |
1797 | req->ring_index = 0; | |
1798 | req->cnt = req->length; | |
1799 | } | |
1da177e4 | 1800 | |
2afa19a9 | 1801 | for (que = 0; que < ha->max_rsp_queues; que++) { |
29bdccbe AC |
1802 | rsp = ha->rsp_q_map[que]; |
1803 | if (!rsp) | |
1804 | continue; | |
29bdccbe AC |
1805 | /* Initialize response queue entries */ |
1806 | qla2x00_init_response_q_entries(rsp); | |
1807 | } | |
1da177e4 | 1808 | |
542bce1f | 1809 | spin_lock(&ha->vport_slock); |
feafb7b1 | 1810 | |
542bce1f | 1811 | spin_unlock(&ha->vport_slock); |
feafb7b1 | 1812 | |
2d70c103 NB |
1813 | ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; |
1814 | ha->tgt.atio_ring_index = 0; | |
1815 | /* Initialize ATIO queue entries */ | |
1816 | qlt_init_atio_q_entries(vha); | |
1817 | ||
e315cd28 | 1818 | ha->isp_ops->config_rings(vha); |
1da177e4 LT |
1819 | |
1820 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1821 | ||
1822 | /* Update any ISP specific firmware options before initialization. */ | |
e315cd28 | 1823 | ha->isp_ops->update_fw_options(vha); |
1da177e4 | 1824 | |
7c3df132 | 1825 | ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); |
2c3dfe3f | 1826 | |
605aa2bc LC |
1827 | if (ha->flags.npiv_supported) { |
1828 | if (ha->operating_mode == LOOP) | |
1829 | ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; | |
c48339de | 1830 | mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); |
605aa2bc LC |
1831 | } |
1832 | ||
24a08138 AV |
1833 | if (IS_FWI2_CAPABLE(ha)) { |
1834 | mid_init_cb->options = __constant_cpu_to_le16(BIT_1); | |
1835 | mid_init_cb->init_cb.execution_throttle = | |
1836 | cpu_to_le16(ha->fw_xcb_count); | |
1837 | } | |
2c3dfe3f | 1838 | |
e315cd28 | 1839 | rval = qla2x00_init_firmware(vha, ha->init_cb_size); |
1da177e4 | 1840 | if (rval) { |
7c3df132 SK |
1841 | ql_log(ql_log_fatal, vha, 0x00d2, |
1842 | "Init Firmware **** FAILED ****.\n"); | |
1da177e4 | 1843 | } else { |
7c3df132 SK |
1844 | ql_dbg(ql_dbg_init, vha, 0x00d3, |
1845 | "Init Firmware -- success.\n"); | |
1da177e4 LT |
1846 | } |
1847 | ||
1848 | return (rval); | |
1849 | } | |
1850 | ||
1851 | /** | |
1852 | * qla2x00_fw_ready() - Waits for firmware ready. | |
1853 | * @ha: HA context | |
1854 | * | |
1855 | * Returns 0 on success. | |
1856 | */ | |
1857 | static int | |
e315cd28 | 1858 | qla2x00_fw_ready(scsi_qla_host_t *vha) |
1da177e4 LT |
1859 | { |
1860 | int rval; | |
4d4df193 | 1861 | unsigned long wtime, mtime, cs84xx_time; |
1da177e4 LT |
1862 | uint16_t min_wait; /* Minimum wait time if loop is down */ |
1863 | uint16_t wait_time; /* Wait time if loop is coming ready */ | |
656e8912 | 1864 | uint16_t state[5]; |
e315cd28 | 1865 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1866 | |
1867 | rval = QLA_SUCCESS; | |
1868 | ||
1869 | /* 20 seconds for loop down. */ | |
fa2a1ce5 | 1870 | min_wait = 20; |
1da177e4 LT |
1871 | |
1872 | /* | |
1873 | * Firmware should take at most one RATOV to login, plus 5 seconds for | |
1874 | * our own processing. | |
1875 | */ | |
1876 | if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { | |
1877 | wait_time = min_wait; | |
1878 | } | |
1879 | ||
1880 | /* Min wait time if loop down */ | |
1881 | mtime = jiffies + (min_wait * HZ); | |
1882 | ||
1883 | /* wait time before firmware ready */ | |
1884 | wtime = jiffies + (wait_time * HZ); | |
1885 | ||
1886 | /* Wait for ISP to finish LIP */ | |
e315cd28 | 1887 | if (!vha->flags.init_done) |
7c3df132 SK |
1888 | ql_log(ql_log_info, vha, 0x801e, |
1889 | "Waiting for LIP to complete.\n"); | |
1da177e4 LT |
1890 | |
1891 | do { | |
e315cd28 | 1892 | rval = qla2x00_get_firmware_state(vha, state); |
1da177e4 | 1893 | if (rval == QLA_SUCCESS) { |
4d4df193 | 1894 | if (state[0] < FSTATE_LOSS_OF_SYNC) { |
e315cd28 | 1895 | vha->device_flags &= ~DFLG_NO_CABLE; |
1da177e4 | 1896 | } |
4d4df193 | 1897 | if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { |
7c3df132 SK |
1898 | ql_dbg(ql_dbg_taskm, vha, 0x801f, |
1899 | "fw_state=%x 84xx=%x.\n", state[0], | |
1900 | state[2]); | |
4d4df193 HK |
1901 | if ((state[2] & FSTATE_LOGGED_IN) && |
1902 | (state[2] & FSTATE_WAITING_FOR_VERIFY)) { | |
7c3df132 SK |
1903 | ql_dbg(ql_dbg_taskm, vha, 0x8028, |
1904 | "Sending verify iocb.\n"); | |
4d4df193 HK |
1905 | |
1906 | cs84xx_time = jiffies; | |
e315cd28 | 1907 | rval = qla84xx_init_chip(vha); |
7c3df132 SK |
1908 | if (rval != QLA_SUCCESS) { |
1909 | ql_log(ql_log_warn, | |
cfb0919c | 1910 | vha, 0x8007, |
7c3df132 | 1911 | "Init chip failed.\n"); |
4d4df193 | 1912 | break; |
7c3df132 | 1913 | } |
4d4df193 HK |
1914 | |
1915 | /* Add time taken to initialize. */ | |
1916 | cs84xx_time = jiffies - cs84xx_time; | |
1917 | wtime += cs84xx_time; | |
1918 | mtime += cs84xx_time; | |
cfb0919c | 1919 | ql_dbg(ql_dbg_taskm, vha, 0x8008, |
7c3df132 SK |
1920 | "Increasing wait time by %ld. " |
1921 | "New time %ld.\n", cs84xx_time, | |
1922 | wtime); | |
4d4df193 HK |
1923 | } |
1924 | } else if (state[0] == FSTATE_READY) { | |
7c3df132 SK |
1925 | ql_dbg(ql_dbg_taskm, vha, 0x8037, |
1926 | "F/W Ready - OK.\n"); | |
1da177e4 | 1927 | |
e315cd28 | 1928 | qla2x00_get_retry_cnt(vha, &ha->retry_count, |
1da177e4 LT |
1929 | &ha->login_timeout, &ha->r_a_tov); |
1930 | ||
1931 | rval = QLA_SUCCESS; | |
1932 | break; | |
1933 | } | |
1934 | ||
1935 | rval = QLA_FUNCTION_FAILED; | |
1936 | ||
e315cd28 | 1937 | if (atomic_read(&vha->loop_down_timer) && |
4d4df193 | 1938 | state[0] != FSTATE_READY) { |
1da177e4 | 1939 | /* Loop down. Timeout on min_wait for states |
fa2a1ce5 AV |
1940 | * other than Wait for Login. |
1941 | */ | |
1da177e4 | 1942 | if (time_after_eq(jiffies, mtime)) { |
7c3df132 | 1943 | ql_log(ql_log_info, vha, 0x8038, |
1da177e4 LT |
1944 | "Cable is unplugged...\n"); |
1945 | ||
e315cd28 | 1946 | vha->device_flags |= DFLG_NO_CABLE; |
1da177e4 LT |
1947 | break; |
1948 | } | |
1949 | } | |
1950 | } else { | |
1951 | /* Mailbox cmd failed. Timeout on min_wait. */ | |
cdbb0a4f | 1952 | if (time_after_eq(jiffies, mtime) || |
7190575f | 1953 | ha->flags.isp82xx_fw_hung) |
1da177e4 LT |
1954 | break; |
1955 | } | |
1956 | ||
1957 | if (time_after_eq(jiffies, wtime)) | |
1958 | break; | |
1959 | ||
1960 | /* Delay for a while */ | |
1961 | msleep(500); | |
1da177e4 LT |
1962 | } while (1); |
1963 | ||
7c3df132 SK |
1964 | ql_dbg(ql_dbg_taskm, vha, 0x803a, |
1965 | "fw_state=%x (%x, %x, %x, %x) " "curr time=%lx.\n", state[0], | |
1966 | state[1], state[2], state[3], state[4], jiffies); | |
1da177e4 | 1967 | |
cfb0919c | 1968 | if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { |
7c3df132 SK |
1969 | ql_log(ql_log_warn, vha, 0x803b, |
1970 | "Firmware ready **** FAILED ****.\n"); | |
1da177e4 LT |
1971 | } |
1972 | ||
1973 | return (rval); | |
1974 | } | |
1975 | ||
1976 | /* | |
1977 | * qla2x00_configure_hba | |
1978 | * Setup adapter context. | |
1979 | * | |
1980 | * Input: | |
1981 | * ha = adapter state pointer. | |
1982 | * | |
1983 | * Returns: | |
1984 | * 0 = success | |
1985 | * | |
1986 | * Context: | |
1987 | * Kernel context. | |
1988 | */ | |
1989 | static int | |
e315cd28 | 1990 | qla2x00_configure_hba(scsi_qla_host_t *vha) |
1da177e4 LT |
1991 | { |
1992 | int rval; | |
1993 | uint16_t loop_id; | |
1994 | uint16_t topo; | |
2c3dfe3f | 1995 | uint16_t sw_cap; |
1da177e4 LT |
1996 | uint8_t al_pa; |
1997 | uint8_t area; | |
1998 | uint8_t domain; | |
1999 | char connect_type[22]; | |
e315cd28 | 2000 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2001 | |
2002 | /* Get host addresses. */ | |
e315cd28 | 2003 | rval = qla2x00_get_adapter_id(vha, |
2c3dfe3f | 2004 | &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); |
1da177e4 | 2005 | if (rval != QLA_SUCCESS) { |
e315cd28 | 2006 | if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || |
6246b8a1 | 2007 | IS_CNA_CAPABLE(ha) || |
33135aa2 | 2008 | (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { |
7c3df132 SK |
2009 | ql_dbg(ql_dbg_disc, vha, 0x2008, |
2010 | "Loop is in a transition state.\n"); | |
33135aa2 | 2011 | } else { |
7c3df132 SK |
2012 | ql_log(ql_log_warn, vha, 0x2009, |
2013 | "Unable to get host loop ID.\n"); | |
e315cd28 | 2014 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
33135aa2 | 2015 | } |
1da177e4 LT |
2016 | return (rval); |
2017 | } | |
2018 | ||
2019 | if (topo == 4) { | |
7c3df132 SK |
2020 | ql_log(ql_log_info, vha, 0x200a, |
2021 | "Cannot get topology - retrying.\n"); | |
1da177e4 LT |
2022 | return (QLA_FUNCTION_FAILED); |
2023 | } | |
2024 | ||
e315cd28 | 2025 | vha->loop_id = loop_id; |
1da177e4 LT |
2026 | |
2027 | /* initialize */ | |
2028 | ha->min_external_loopid = SNS_FIRST_LOOP_ID; | |
2029 | ha->operating_mode = LOOP; | |
2c3dfe3f | 2030 | ha->switch_cap = 0; |
1da177e4 LT |
2031 | |
2032 | switch (topo) { | |
2033 | case 0: | |
7c3df132 | 2034 | ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); |
1da177e4 LT |
2035 | ha->current_topology = ISP_CFG_NL; |
2036 | strcpy(connect_type, "(Loop)"); | |
2037 | break; | |
2038 | ||
2039 | case 1: | |
7c3df132 | 2040 | ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); |
2c3dfe3f | 2041 | ha->switch_cap = sw_cap; |
1da177e4 LT |
2042 | ha->current_topology = ISP_CFG_FL; |
2043 | strcpy(connect_type, "(FL_Port)"); | |
2044 | break; | |
2045 | ||
2046 | case 2: | |
7c3df132 | 2047 | ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); |
1da177e4 LT |
2048 | ha->operating_mode = P2P; |
2049 | ha->current_topology = ISP_CFG_N; | |
2050 | strcpy(connect_type, "(N_Port-to-N_Port)"); | |
2051 | break; | |
2052 | ||
2053 | case 3: | |
7c3df132 | 2054 | ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); |
2c3dfe3f | 2055 | ha->switch_cap = sw_cap; |
1da177e4 LT |
2056 | ha->operating_mode = P2P; |
2057 | ha->current_topology = ISP_CFG_F; | |
2058 | strcpy(connect_type, "(F_Port)"); | |
2059 | break; | |
2060 | ||
2061 | default: | |
7c3df132 SK |
2062 | ql_dbg(ql_dbg_disc, vha, 0x200f, |
2063 | "HBA in unknown topology %x, using NL.\n", topo); | |
1da177e4 LT |
2064 | ha->current_topology = ISP_CFG_NL; |
2065 | strcpy(connect_type, "(Loop)"); | |
2066 | break; | |
2067 | } | |
2068 | ||
2069 | /* Save Host port and loop ID. */ | |
2070 | /* byte order - Big Endian */ | |
e315cd28 AC |
2071 | vha->d_id.b.domain = domain; |
2072 | vha->d_id.b.area = area; | |
2073 | vha->d_id.b.al_pa = al_pa; | |
1da177e4 | 2074 | |
2d70c103 NB |
2075 | spin_lock(&ha->vport_slock); |
2076 | qlt_update_vp_map(vha, SET_AL_PA); | |
2077 | spin_unlock(&ha->vport_slock); | |
2078 | ||
e315cd28 | 2079 | if (!vha->flags.init_done) |
7c3df132 SK |
2080 | ql_log(ql_log_info, vha, 0x2010, |
2081 | "Topology - %s, Host Loop address 0x%x.\n", | |
e315cd28 | 2082 | connect_type, vha->loop_id); |
1da177e4 LT |
2083 | |
2084 | if (rval) { | |
7c3df132 SK |
2085 | ql_log(ql_log_warn, vha, 0x2011, |
2086 | "%s FAILED\n", __func__); | |
1da177e4 | 2087 | } else { |
7c3df132 SK |
2088 | ql_dbg(ql_dbg_disc, vha, 0x2012, |
2089 | "%s success\n", __func__); | |
1da177e4 LT |
2090 | } |
2091 | ||
2092 | return(rval); | |
2093 | } | |
2094 | ||
a9083016 | 2095 | inline void |
e315cd28 AC |
2096 | qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, |
2097 | char *def) | |
9bb9fcf2 AV |
2098 | { |
2099 | char *st, *en; | |
2100 | uint16_t index; | |
e315cd28 | 2101 | struct qla_hw_data *ha = vha->hw; |
ab671149 | 2102 | int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && |
6246b8a1 | 2103 | !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); |
9bb9fcf2 AV |
2104 | |
2105 | if (memcmp(model, BINZERO, len) != 0) { | |
2106 | strncpy(ha->model_number, model, len); | |
2107 | st = en = ha->model_number; | |
2108 | en += len - 1; | |
2109 | while (en > st) { | |
2110 | if (*en != 0x20 && *en != 0x00) | |
2111 | break; | |
2112 | *en-- = '\0'; | |
2113 | } | |
2114 | ||
2115 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
2116 | if (use_tbl && |
2117 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 | 2118 | index < QLA_MODEL_NAMES) |
1ee27146 JC |
2119 | strncpy(ha->model_desc, |
2120 | qla2x00_model_name[index * 2 + 1], | |
2121 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
2122 | } else { |
2123 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
2124 | if (use_tbl && |
2125 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 AV |
2126 | index < QLA_MODEL_NAMES) { |
2127 | strcpy(ha->model_number, | |
2128 | qla2x00_model_name[index * 2]); | |
1ee27146 JC |
2129 | strncpy(ha->model_desc, |
2130 | qla2x00_model_name[index * 2 + 1], | |
2131 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
2132 | } else { |
2133 | strcpy(ha->model_number, def); | |
2134 | } | |
2135 | } | |
1ee27146 | 2136 | if (IS_FWI2_CAPABLE(ha)) |
e315cd28 | 2137 | qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, |
1ee27146 | 2138 | sizeof(ha->model_desc)); |
9bb9fcf2 AV |
2139 | } |
2140 | ||
4e08df3f DM |
2141 | /* On sparc systems, obtain port and node WWN from firmware |
2142 | * properties. | |
2143 | */ | |
e315cd28 | 2144 | static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) |
4e08df3f DM |
2145 | { |
2146 | #ifdef CONFIG_SPARC | |
e315cd28 | 2147 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 2148 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
2149 | struct device_node *dp = pci_device_to_OF_node(pdev); |
2150 | const u8 *val; | |
4e08df3f DM |
2151 | int len; |
2152 | ||
2153 | val = of_get_property(dp, "port-wwn", &len); | |
2154 | if (val && len >= WWN_SIZE) | |
2155 | memcpy(nv->port_name, val, WWN_SIZE); | |
2156 | ||
2157 | val = of_get_property(dp, "node-wwn", &len); | |
2158 | if (val && len >= WWN_SIZE) | |
2159 | memcpy(nv->node_name, val, WWN_SIZE); | |
2160 | #endif | |
2161 | } | |
2162 | ||
1da177e4 LT |
2163 | /* |
2164 | * NVRAM configuration for ISP 2xxx | |
2165 | * | |
2166 | * Input: | |
2167 | * ha = adapter block pointer. | |
2168 | * | |
2169 | * Output: | |
2170 | * initialization control block in response_ring | |
2171 | * host adapters parameters in host adapter block | |
2172 | * | |
2173 | * Returns: | |
2174 | * 0 = success. | |
2175 | */ | |
abbd8870 | 2176 | int |
e315cd28 | 2177 | qla2x00_nvram_config(scsi_qla_host_t *vha) |
1da177e4 | 2178 | { |
4e08df3f | 2179 | int rval; |
0107109e AV |
2180 | uint8_t chksum = 0; |
2181 | uint16_t cnt; | |
2182 | uint8_t *dptr1, *dptr2; | |
e315cd28 | 2183 | struct qla_hw_data *ha = vha->hw; |
0107109e | 2184 | init_cb_t *icb = ha->init_cb; |
281afe19 SJ |
2185 | nvram_t *nv = ha->nvram; |
2186 | uint8_t *ptr = ha->nvram; | |
3d71644c | 2187 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 2188 | |
4e08df3f DM |
2189 | rval = QLA_SUCCESS; |
2190 | ||
1da177e4 | 2191 | /* Determine NVRAM starting address. */ |
0107109e | 2192 | ha->nvram_size = sizeof(nvram_t); |
1da177e4 LT |
2193 | ha->nvram_base = 0; |
2194 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) | |
2195 | if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) | |
2196 | ha->nvram_base = 0x80; | |
2197 | ||
2198 | /* Get NVRAM data and calculate checksum. */ | |
e315cd28 | 2199 | ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); |
0107109e AV |
2200 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) |
2201 | chksum += *ptr++; | |
1da177e4 | 2202 | |
7c3df132 SK |
2203 | ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, |
2204 | "Contents of NVRAM.\n"); | |
2205 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, | |
2206 | (uint8_t *)nv, ha->nvram_size); | |
1da177e4 LT |
2207 | |
2208 | /* Bad NVRAM data, set defaults parameters. */ | |
2209 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || | |
2210 | nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { | |
2211 | /* Reset NVRAM data. */ | |
7c3df132 | 2212 | ql_log(ql_log_warn, vha, 0x0064, |
9e336520 | 2213 | "Inconsistent NVRAM " |
7c3df132 SK |
2214 | "detected: checksum=0x%x id=%c version=0x%x.\n", |
2215 | chksum, nv->id[0], nv->nvram_version); | |
2216 | ql_log(ql_log_warn, vha, 0x0065, | |
2217 | "Falling back to " | |
2218 | "functioning (yet invalid -- WWPN) defaults.\n"); | |
4e08df3f DM |
2219 | |
2220 | /* | |
2221 | * Set default initialization control block. | |
2222 | */ | |
2223 | memset(nv, 0, ha->nvram_size); | |
2224 | nv->parameter_block_version = ICB_VERSION; | |
2225 | ||
2226 | if (IS_QLA23XX(ha)) { | |
2227 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
2228 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
2229 | nv->add_firmware_options[0] = BIT_5; | |
2230 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
2231 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
2232 | nv->special_options[1] = BIT_7; | |
2233 | } else if (IS_QLA2200(ha)) { | |
2234 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
2235 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
2236 | nv->add_firmware_options[0] = BIT_5; | |
2237 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
2238 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
2239 | } else if (IS_QLA2100(ha)) { | |
2240 | nv->firmware_options[0] = BIT_3 | BIT_1; | |
2241 | nv->firmware_options[1] = BIT_5; | |
2242 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
2243 | } | |
2244 | ||
2245 | nv->max_iocb_allocation = __constant_cpu_to_le16(256); | |
2246 | nv->execution_throttle = __constant_cpu_to_le16(16); | |
2247 | nv->retry_count = 8; | |
2248 | nv->retry_delay = 1; | |
2249 | ||
2250 | nv->port_name[0] = 33; | |
2251 | nv->port_name[3] = 224; | |
2252 | nv->port_name[4] = 139; | |
2253 | ||
e315cd28 | 2254 | qla2xxx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
2255 | |
2256 | nv->login_timeout = 4; | |
2257 | ||
2258 | /* | |
2259 | * Set default host adapter parameters | |
2260 | */ | |
2261 | nv->host_p[1] = BIT_2; | |
2262 | nv->reset_delay = 5; | |
2263 | nv->port_down_retry_count = 8; | |
2264 | nv->max_luns_per_target = __constant_cpu_to_le16(8); | |
2265 | nv->link_down_timeout = 60; | |
2266 | ||
2267 | rval = 1; | |
1da177e4 LT |
2268 | } |
2269 | ||
2270 | #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) | |
2271 | /* | |
2272 | * The SN2 does not provide BIOS emulation which means you can't change | |
2273 | * potentially bogus BIOS settings. Force the use of default settings | |
2274 | * for link rate and frame size. Hope that the rest of the settings | |
2275 | * are valid. | |
2276 | */ | |
2277 | if (ia64_platform_is("sn2")) { | |
2278 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
2279 | if (IS_QLA23XX(ha)) | |
2280 | nv->special_options[1] = BIT_7; | |
2281 | } | |
2282 | #endif | |
2283 | ||
2284 | /* Reset Initialization control block */ | |
0107109e | 2285 | memset(icb, 0, ha->init_cb_size); |
1da177e4 LT |
2286 | |
2287 | /* | |
2288 | * Setup driver NVRAM options. | |
2289 | */ | |
2290 | nv->firmware_options[0] |= (BIT_6 | BIT_1); | |
2291 | nv->firmware_options[0] &= ~(BIT_5 | BIT_4); | |
2292 | nv->firmware_options[1] |= (BIT_5 | BIT_0); | |
2293 | nv->firmware_options[1] &= ~BIT_4; | |
2294 | ||
2295 | if (IS_QLA23XX(ha)) { | |
2296 | nv->firmware_options[0] |= BIT_2; | |
2297 | nv->firmware_options[0] &= ~BIT_3; | |
2d70c103 | 2298 | nv->special_options[0] &= ~BIT_6; |
0107109e | 2299 | nv->add_firmware_options[1] |= BIT_5 | BIT_4; |
1da177e4 LT |
2300 | |
2301 | if (IS_QLA2300(ha)) { | |
2302 | if (ha->fb_rev == FPM_2310) { | |
2303 | strcpy(ha->model_number, "QLA2310"); | |
2304 | } else { | |
2305 | strcpy(ha->model_number, "QLA2300"); | |
2306 | } | |
2307 | } else { | |
e315cd28 | 2308 | qla2x00_set_model_info(vha, nv->model_number, |
9bb9fcf2 | 2309 | sizeof(nv->model_number), "QLA23xx"); |
1da177e4 LT |
2310 | } |
2311 | } else if (IS_QLA2200(ha)) { | |
2312 | nv->firmware_options[0] |= BIT_2; | |
2313 | /* | |
2314 | * 'Point-to-point preferred, else loop' is not a safe | |
2315 | * connection mode setting. | |
2316 | */ | |
2317 | if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == | |
2318 | (BIT_5 | BIT_4)) { | |
2319 | /* Force 'loop preferred, else point-to-point'. */ | |
2320 | nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); | |
2321 | nv->add_firmware_options[0] |= BIT_5; | |
2322 | } | |
2323 | strcpy(ha->model_number, "QLA22xx"); | |
2324 | } else /*if (IS_QLA2100(ha))*/ { | |
2325 | strcpy(ha->model_number, "QLA2100"); | |
2326 | } | |
2327 | ||
2328 | /* | |
2329 | * Copy over NVRAM RISC parameter block to initialization control block. | |
2330 | */ | |
2331 | dptr1 = (uint8_t *)icb; | |
2332 | dptr2 = (uint8_t *)&nv->parameter_block_version; | |
2333 | cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; | |
2334 | while (cnt--) | |
2335 | *dptr1++ = *dptr2++; | |
2336 | ||
2337 | /* Copy 2nd half. */ | |
2338 | dptr1 = (uint8_t *)icb->add_firmware_options; | |
2339 | cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; | |
2340 | while (cnt--) | |
2341 | *dptr1++ = *dptr2++; | |
2342 | ||
5341e868 AV |
2343 | /* Use alternate WWN? */ |
2344 | if (nv->host_p[1] & BIT_7) { | |
2345 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
2346 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
2347 | } | |
2348 | ||
1da177e4 LT |
2349 | /* Prepare nodename */ |
2350 | if ((icb->firmware_options[1] & BIT_6) == 0) { | |
2351 | /* | |
2352 | * Firmware will apply the following mask if the nodename was | |
2353 | * not provided. | |
2354 | */ | |
2355 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
2356 | icb->node_name[0] &= 0xF0; | |
2357 | } | |
2358 | ||
2359 | /* | |
2360 | * Set host adapter parameters. | |
2361 | */ | |
3ce8866c SK |
2362 | |
2363 | /* | |
2364 | * BIT_7 in the host-parameters section allows for modification to | |
2365 | * internal driver logging. | |
2366 | */ | |
0181944f | 2367 | if (nv->host_p[0] & BIT_7) |
cfb0919c | 2368 | ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; |
1da177e4 LT |
2369 | ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); |
2370 | /* Always load RISC code on non ISP2[12]00 chips. */ | |
2371 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) | |
2372 | ha->flags.disable_risc_code_load = 0; | |
2373 | ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); | |
2374 | ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); | |
2375 | ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); | |
06c22bd1 | 2376 | ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; |
d4c760c2 | 2377 | ha->flags.disable_serdes = 0; |
1da177e4 LT |
2378 | |
2379 | ha->operating_mode = | |
2380 | (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
2381 | ||
2382 | memcpy(ha->fw_seriallink_options, nv->seriallink_options, | |
2383 | sizeof(ha->fw_seriallink_options)); | |
2384 | ||
2385 | /* save HBA serial number */ | |
2386 | ha->serial0 = icb->port_name[5]; | |
2387 | ha->serial1 = icb->port_name[6]; | |
2388 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
2389 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
2390 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
1da177e4 LT |
2391 | |
2392 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
2393 | ||
2394 | ha->retry_count = nv->retry_count; | |
2395 | ||
2396 | /* Set minimum login_timeout to 4 seconds. */ | |
5b91490e | 2397 | if (nv->login_timeout != ql2xlogintimeout) |
1da177e4 LT |
2398 | nv->login_timeout = ql2xlogintimeout; |
2399 | if (nv->login_timeout < 4) | |
2400 | nv->login_timeout = 4; | |
2401 | ha->login_timeout = nv->login_timeout; | |
2402 | icb->login_timeout = nv->login_timeout; | |
2403 | ||
00a537b8 AV |
2404 | /* Set minimum RATOV to 100 tenths of a second. */ |
2405 | ha->r_a_tov = 100; | |
1da177e4 | 2406 | |
1da177e4 LT |
2407 | ha->loop_reset_delay = nv->reset_delay; |
2408 | ||
1da177e4 LT |
2409 | /* Link Down Timeout = 0: |
2410 | * | |
2411 | * When Port Down timer expires we will start returning | |
2412 | * I/O's to OS with "DID_NO_CONNECT". | |
2413 | * | |
2414 | * Link Down Timeout != 0: | |
2415 | * | |
2416 | * The driver waits for the link to come up after link down | |
2417 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
fa2a1ce5 | 2418 | */ |
1da177e4 LT |
2419 | if (nv->link_down_timeout == 0) { |
2420 | ha->loop_down_abort_time = | |
354d6b21 | 2421 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); |
1da177e4 LT |
2422 | } else { |
2423 | ha->link_down_timeout = nv->link_down_timeout; | |
2424 | ha->loop_down_abort_time = | |
2425 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
fa2a1ce5 | 2426 | } |
1da177e4 | 2427 | |
1da177e4 LT |
2428 | /* |
2429 | * Need enough time to try and get the port back. | |
2430 | */ | |
2431 | ha->port_down_retry_count = nv->port_down_retry_count; | |
2432 | if (qlport_down_retry) | |
2433 | ha->port_down_retry_count = qlport_down_retry; | |
2434 | /* Set login_retry_count */ | |
2435 | ha->login_retry_count = nv->retry_count; | |
2436 | if (ha->port_down_retry_count == nv->port_down_retry_count && | |
2437 | ha->port_down_retry_count > 3) | |
2438 | ha->login_retry_count = ha->port_down_retry_count; | |
2439 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
2440 | ha->login_retry_count = ha->port_down_retry_count; | |
2441 | if (ql2xloginretrycount) | |
2442 | ha->login_retry_count = ql2xloginretrycount; | |
2443 | ||
1da177e4 LT |
2444 | icb->lun_enables = __constant_cpu_to_le16(0); |
2445 | icb->command_resource_count = 0; | |
2446 | icb->immediate_notify_resource_count = 0; | |
2447 | icb->timeout = __constant_cpu_to_le16(0); | |
2448 | ||
2449 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { | |
2450 | /* Enable RIO */ | |
2451 | icb->firmware_options[0] &= ~BIT_3; | |
2452 | icb->add_firmware_options[0] &= | |
2453 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
2454 | icb->add_firmware_options[0] |= BIT_2; | |
2455 | icb->response_accumulation_timer = 3; | |
2456 | icb->interrupt_delay_timer = 5; | |
2457 | ||
e315cd28 | 2458 | vha->flags.process_response_queue = 1; |
1da177e4 | 2459 | } else { |
4fdfefe5 | 2460 | /* Enable ZIO. */ |
e315cd28 | 2461 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
2462 | ha->zio_mode = icb->add_firmware_options[0] & |
2463 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
2464 | ha->zio_timer = icb->interrupt_delay_timer ? | |
2465 | icb->interrupt_delay_timer: 2; | |
2466 | } | |
1da177e4 LT |
2467 | icb->add_firmware_options[0] &= |
2468 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
e315cd28 | 2469 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 2470 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d AV |
2471 | ha->zio_mode = QLA_ZIO_MODE_6; |
2472 | ||
7c3df132 | 2473 | ql_log(ql_log_info, vha, 0x0068, |
4fdfefe5 AV |
2474 | "ZIO mode %d enabled; timer delay (%d us).\n", |
2475 | ha->zio_mode, ha->zio_timer * 100); | |
1da177e4 | 2476 | |
4fdfefe5 AV |
2477 | icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; |
2478 | icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; | |
e315cd28 | 2479 | vha->flags.process_response_queue = 1; |
1da177e4 LT |
2480 | } |
2481 | } | |
2482 | ||
4e08df3f | 2483 | if (rval) { |
7c3df132 SK |
2484 | ql_log(ql_log_warn, vha, 0x0069, |
2485 | "NVRAM configuration failed.\n"); | |
4e08df3f DM |
2486 | } |
2487 | return (rval); | |
1da177e4 LT |
2488 | } |
2489 | ||
19a7b4ae JSEC |
2490 | static void |
2491 | qla2x00_rport_del(void *data) | |
2492 | { | |
2493 | fc_port_t *fcport = data; | |
d97994dc | 2494 | struct fc_rport *rport; |
2d70c103 | 2495 | scsi_qla_host_t *vha = fcport->vha; |
044d78e1 | 2496 | unsigned long flags; |
d97994dc | 2497 | |
044d78e1 | 2498 | spin_lock_irqsave(fcport->vha->host->host_lock, flags); |
ac280b67 | 2499 | rport = fcport->drport ? fcport->drport: fcport->rport; |
d97994dc | 2500 | fcport->drport = NULL; |
044d78e1 | 2501 | spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); |
2d70c103 | 2502 | if (rport) { |
d97994dc | 2503 | fc_remote_port_delete(rport); |
2d70c103 NB |
2504 | /* |
2505 | * Release the target mode FC NEXUS in qla_target.c code | |
2506 | * if target mod is enabled. | |
2507 | */ | |
2508 | qlt_fc_port_deleted(vha, fcport); | |
2509 | } | |
19a7b4ae JSEC |
2510 | } |
2511 | ||
1da177e4 LT |
2512 | /** |
2513 | * qla2x00_alloc_fcport() - Allocate a generic fcport. | |
2514 | * @ha: HA context | |
2515 | * @flags: allocation flags | |
2516 | * | |
2517 | * Returns a pointer to the allocated fcport, or NULL, if none available. | |
2518 | */ | |
9a069e19 | 2519 | fc_port_t * |
e315cd28 | 2520 | qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) |
1da177e4 LT |
2521 | { |
2522 | fc_port_t *fcport; | |
2523 | ||
bbfbbbc1 MK |
2524 | fcport = kzalloc(sizeof(fc_port_t), flags); |
2525 | if (!fcport) | |
2526 | return NULL; | |
1da177e4 LT |
2527 | |
2528 | /* Setup fcport template structure. */ | |
e315cd28 | 2529 | fcport->vha = vha; |
1da177e4 LT |
2530 | fcport->port_type = FCT_UNKNOWN; |
2531 | fcport->loop_id = FC_NO_LOOP_ID; | |
ec426e10 | 2532 | qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); |
ad3e0eda | 2533 | fcport->supported_classes = FC_COS_UNSPECIFIED; |
c0822b63 | 2534 | fcport->scan_state = QLA_FCPORT_SCAN_NONE; |
1da177e4 | 2535 | |
bbfbbbc1 | 2536 | return fcport; |
1da177e4 LT |
2537 | } |
2538 | ||
2539 | /* | |
2540 | * qla2x00_configure_loop | |
2541 | * Updates Fibre Channel Device Database with what is actually on loop. | |
2542 | * | |
2543 | * Input: | |
2544 | * ha = adapter block pointer. | |
2545 | * | |
2546 | * Returns: | |
2547 | * 0 = success. | |
2548 | * 1 = error. | |
2549 | * 2 = database was full and device was not configured. | |
2550 | */ | |
2551 | static int | |
e315cd28 | 2552 | qla2x00_configure_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
2553 | { |
2554 | int rval; | |
2555 | unsigned long flags, save_flags; | |
e315cd28 | 2556 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2557 | rval = QLA_SUCCESS; |
2558 | ||
2559 | /* Get Initiator ID */ | |
e315cd28 AC |
2560 | if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { |
2561 | rval = qla2x00_configure_hba(vha); | |
1da177e4 | 2562 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
2563 | ql_dbg(ql_dbg_disc, vha, 0x2013, |
2564 | "Unable to configure HBA.\n"); | |
1da177e4 LT |
2565 | return (rval); |
2566 | } | |
2567 | } | |
2568 | ||
e315cd28 | 2569 | save_flags = flags = vha->dpc_flags; |
7c3df132 SK |
2570 | ql_dbg(ql_dbg_disc, vha, 0x2014, |
2571 | "Configure loop -- dpc flags = 0x%lx.\n", flags); | |
1da177e4 LT |
2572 | |
2573 | /* | |
2574 | * If we have both an RSCN and PORT UPDATE pending then handle them | |
2575 | * both at the same time. | |
2576 | */ | |
e315cd28 AC |
2577 | clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
2578 | clear_bit(RSCN_UPDATE, &vha->dpc_flags); | |
1da177e4 | 2579 | |
3064ff39 MH |
2580 | qla2x00_get_data_rate(vha); |
2581 | ||
1da177e4 LT |
2582 | /* Determine what we need to do */ |
2583 | if (ha->current_topology == ISP_CFG_FL && | |
2584 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2585 | ||
1da177e4 LT |
2586 | set_bit(RSCN_UPDATE, &flags); |
2587 | ||
2588 | } else if (ha->current_topology == ISP_CFG_F && | |
2589 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2590 | ||
1da177e4 LT |
2591 | set_bit(RSCN_UPDATE, &flags); |
2592 | clear_bit(LOCAL_LOOP_UPDATE, &flags); | |
21333b48 AV |
2593 | |
2594 | } else if (ha->current_topology == ISP_CFG_N) { | |
2595 | clear_bit(RSCN_UPDATE, &flags); | |
1da177e4 | 2596 | |
e315cd28 | 2597 | } else if (!vha->flags.online || |
1da177e4 LT |
2598 | (test_bit(ABORT_ISP_ACTIVE, &flags))) { |
2599 | ||
1da177e4 LT |
2600 | set_bit(RSCN_UPDATE, &flags); |
2601 | set_bit(LOCAL_LOOP_UPDATE, &flags); | |
2602 | } | |
2603 | ||
2604 | if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { | |
7c3df132 SK |
2605 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { |
2606 | ql_dbg(ql_dbg_disc, vha, 0x2015, | |
2607 | "Loop resync needed, failing.\n"); | |
1da177e4 | 2608 | rval = QLA_FUNCTION_FAILED; |
642ef983 | 2609 | } else |
e315cd28 | 2610 | rval = qla2x00_configure_local_loop(vha); |
1da177e4 LT |
2611 | } |
2612 | ||
2613 | if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { | |
7c3df132 SK |
2614 | if (LOOP_TRANSITION(vha)) { |
2615 | ql_dbg(ql_dbg_disc, vha, 0x201e, | |
2616 | "Needs RSCN update and loop transition.\n"); | |
1da177e4 | 2617 | rval = QLA_FUNCTION_FAILED; |
7c3df132 | 2618 | } |
e315cd28 AC |
2619 | else |
2620 | rval = qla2x00_configure_fabric(vha); | |
1da177e4 LT |
2621 | } |
2622 | ||
2623 | if (rval == QLA_SUCCESS) { | |
e315cd28 AC |
2624 | if (atomic_read(&vha->loop_down_timer) || |
2625 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { | |
1da177e4 LT |
2626 | rval = QLA_FUNCTION_FAILED; |
2627 | } else { | |
e315cd28 | 2628 | atomic_set(&vha->loop_state, LOOP_READY); |
7c3df132 SK |
2629 | ql_dbg(ql_dbg_disc, vha, 0x2069, |
2630 | "LOOP READY.\n"); | |
1da177e4 LT |
2631 | } |
2632 | } | |
2633 | ||
2634 | if (rval) { | |
7c3df132 SK |
2635 | ql_dbg(ql_dbg_disc, vha, 0x206a, |
2636 | "%s *** FAILED ***.\n", __func__); | |
1da177e4 | 2637 | } else { |
7c3df132 SK |
2638 | ql_dbg(ql_dbg_disc, vha, 0x206b, |
2639 | "%s: exiting normally.\n", __func__); | |
1da177e4 LT |
2640 | } |
2641 | ||
cc3ef7bc | 2642 | /* Restore state if a resync event occurred during processing */ |
e315cd28 | 2643 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { |
1da177e4 | 2644 | if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) |
e315cd28 | 2645 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
f4658b6c | 2646 | if (test_bit(RSCN_UPDATE, &save_flags)) { |
e315cd28 | 2647 | set_bit(RSCN_UPDATE, &vha->dpc_flags); |
f4658b6c | 2648 | } |
1da177e4 LT |
2649 | } |
2650 | ||
2651 | return (rval); | |
2652 | } | |
2653 | ||
2654 | ||
2655 | ||
2656 | /* | |
2657 | * qla2x00_configure_local_loop | |
2658 | * Updates Fibre Channel Device Database with local loop devices. | |
2659 | * | |
2660 | * Input: | |
2661 | * ha = adapter block pointer. | |
2662 | * | |
2663 | * Returns: | |
2664 | * 0 = success. | |
2665 | */ | |
2666 | static int | |
e315cd28 | 2667 | qla2x00_configure_local_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
2668 | { |
2669 | int rval, rval2; | |
2670 | int found_devs; | |
2671 | int found; | |
2672 | fc_port_t *fcport, *new_fcport; | |
2673 | ||
2674 | uint16_t index; | |
2675 | uint16_t entries; | |
2676 | char *id_iter; | |
2677 | uint16_t loop_id; | |
2678 | uint8_t domain, area, al_pa; | |
e315cd28 | 2679 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2680 | |
2681 | found_devs = 0; | |
2682 | new_fcport = NULL; | |
642ef983 | 2683 | entries = MAX_FIBRE_DEVICES_LOOP; |
1da177e4 | 2684 | |
7c3df132 SK |
2685 | ql_dbg(ql_dbg_disc, vha, 0x2016, |
2686 | "Getting FCAL position map.\n"); | |
2687 | if (ql2xextended_error_logging & ql_dbg_disc) | |
2688 | qla2x00_get_fcal_position_map(vha, NULL); | |
1da177e4 LT |
2689 | |
2690 | /* Get list of logged in devices. */ | |
642ef983 | 2691 | memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); |
e315cd28 | 2692 | rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, |
1da177e4 LT |
2693 | &entries); |
2694 | if (rval != QLA_SUCCESS) | |
2695 | goto cleanup_allocation; | |
2696 | ||
7c3df132 SK |
2697 | ql_dbg(ql_dbg_disc, vha, 0x2017, |
2698 | "Entries in ID list (%d).\n", entries); | |
2699 | ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, | |
2700 | (uint8_t *)ha->gid_list, | |
2701 | entries * sizeof(struct gid_list_info)); | |
1da177e4 LT |
2702 | |
2703 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 2704 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 2705 | if (new_fcport == NULL) { |
7c3df132 SK |
2706 | ql_log(ql_log_warn, vha, 0x2018, |
2707 | "Memory allocation failed for fcport.\n"); | |
1da177e4 LT |
2708 | rval = QLA_MEMORY_ALLOC_FAILED; |
2709 | goto cleanup_allocation; | |
2710 | } | |
2711 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2712 | ||
2713 | /* | |
2714 | * Mark local devices that were present with FCF_DEVICE_LOST for now. | |
2715 | */ | |
e315cd28 | 2716 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2717 | if (atomic_read(&fcport->state) == FCS_ONLINE && |
2718 | fcport->port_type != FCT_BROADCAST && | |
2719 | (fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
2720 | ||
7c3df132 SK |
2721 | ql_dbg(ql_dbg_disc, vha, 0x2019, |
2722 | "Marking port lost loop_id=0x%04x.\n", | |
2723 | fcport->loop_id); | |
1da177e4 | 2724 | |
ec426e10 | 2725 | qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST); |
1da177e4 LT |
2726 | } |
2727 | } | |
2728 | ||
2729 | /* Add devices to port list. */ | |
2730 | id_iter = (char *)ha->gid_list; | |
2731 | for (index = 0; index < entries; index++) { | |
2732 | domain = ((struct gid_list_info *)id_iter)->domain; | |
2733 | area = ((struct gid_list_info *)id_iter)->area; | |
2734 | al_pa = ((struct gid_list_info *)id_iter)->al_pa; | |
abbd8870 | 2735 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) |
1da177e4 LT |
2736 | loop_id = (uint16_t) |
2737 | ((struct gid_list_info *)id_iter)->loop_id_2100; | |
abbd8870 | 2738 | else |
1da177e4 LT |
2739 | loop_id = le16_to_cpu( |
2740 | ((struct gid_list_info *)id_iter)->loop_id); | |
abbd8870 | 2741 | id_iter += ha->gid_list_info_size; |
1da177e4 LT |
2742 | |
2743 | /* Bypass reserved domain fields. */ | |
2744 | if ((domain & 0xf0) == 0xf0) | |
2745 | continue; | |
2746 | ||
2747 | /* Bypass if not same domain and area of adapter. */ | |
f7d289f6 | 2748 | if (area && domain && |
e315cd28 | 2749 | (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) |
1da177e4 LT |
2750 | continue; |
2751 | ||
2752 | /* Bypass invalid local loop ID. */ | |
2753 | if (loop_id > LAST_LOCAL_LOOP_ID) | |
2754 | continue; | |
2755 | ||
2756 | /* Fill in member data. */ | |
2757 | new_fcport->d_id.b.domain = domain; | |
2758 | new_fcport->d_id.b.area = area; | |
2759 | new_fcport->d_id.b.al_pa = al_pa; | |
2760 | new_fcport->loop_id = loop_id; | |
e315cd28 | 2761 | rval2 = qla2x00_get_port_database(vha, new_fcport, 0); |
1da177e4 | 2762 | if (rval2 != QLA_SUCCESS) { |
7c3df132 SK |
2763 | ql_dbg(ql_dbg_disc, vha, 0x201a, |
2764 | "Failed to retrieve fcport information " | |
2765 | "-- get_port_database=%x, loop_id=0x%04x.\n", | |
2766 | rval2, new_fcport->loop_id); | |
2767 | ql_dbg(ql_dbg_disc, vha, 0x201b, | |
2768 | "Scheduling resync.\n"); | |
e315cd28 | 2769 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
2770 | continue; |
2771 | } | |
2772 | ||
2773 | /* Check for matching device in port list. */ | |
2774 | found = 0; | |
2775 | fcport = NULL; | |
e315cd28 | 2776 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2777 | if (memcmp(new_fcport->port_name, fcport->port_name, |
2778 | WWN_SIZE)) | |
2779 | continue; | |
2780 | ||
ddb9b126 | 2781 | fcport->flags &= ~FCF_FABRIC_DEVICE; |
1da177e4 LT |
2782 | fcport->loop_id = new_fcport->loop_id; |
2783 | fcport->port_type = new_fcport->port_type; | |
2784 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
2785 | memcpy(fcport->node_name, new_fcport->node_name, | |
2786 | WWN_SIZE); | |
2787 | ||
2788 | found++; | |
2789 | break; | |
2790 | } | |
2791 | ||
2792 | if (!found) { | |
2793 | /* New device, add to fcports list. */ | |
e315cd28 | 2794 | list_add_tail(&new_fcport->list, &vha->vp_fcports); |
1da177e4 LT |
2795 | |
2796 | /* Allocate a new replacement fcport. */ | |
2797 | fcport = new_fcport; | |
e315cd28 | 2798 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 2799 | if (new_fcport == NULL) { |
7c3df132 SK |
2800 | ql_log(ql_log_warn, vha, 0x201c, |
2801 | "Failed to allocate memory for fcport.\n"); | |
1da177e4 LT |
2802 | rval = QLA_MEMORY_ALLOC_FAILED; |
2803 | goto cleanup_allocation; | |
2804 | } | |
2805 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2806 | } | |
2807 | ||
d8b45213 | 2808 | /* Base iIDMA settings on HBA port speed. */ |
a3cbdfad | 2809 | fcport->fp_speed = ha->link_data_rate; |
d8b45213 | 2810 | |
e315cd28 | 2811 | qla2x00_update_fcport(vha, fcport); |
1da177e4 LT |
2812 | |
2813 | found_devs++; | |
2814 | } | |
2815 | ||
2816 | cleanup_allocation: | |
c9475cb0 | 2817 | kfree(new_fcport); |
1da177e4 LT |
2818 | |
2819 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
2820 | ql_dbg(ql_dbg_disc, vha, 0x201d, |
2821 | "Configure local loop error exit: rval=%x.\n", rval); | |
1da177e4 LT |
2822 | } |
2823 | ||
1da177e4 LT |
2824 | return (rval); |
2825 | } | |
2826 | ||
d8b45213 | 2827 | static void |
e315cd28 | 2828 | qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
d8b45213 | 2829 | { |
9f8fddee | 2830 | char *link_speed; |
d8b45213 | 2831 | int rval; |
1bb39548 | 2832 | uint16_t mb[4]; |
e315cd28 | 2833 | struct qla_hw_data *ha = vha->hw; |
d8b45213 | 2834 | |
c76f2c01 | 2835 | if (!IS_IIDMA_CAPABLE(ha)) |
d8b45213 AV |
2836 | return; |
2837 | ||
c9afb9a2 GM |
2838 | if (atomic_read(&fcport->state) != FCS_ONLINE) |
2839 | return; | |
2840 | ||
39bd9622 AV |
2841 | if (fcport->fp_speed == PORT_SPEED_UNKNOWN || |
2842 | fcport->fp_speed > ha->link_data_rate) | |
d8b45213 AV |
2843 | return; |
2844 | ||
e315cd28 | 2845 | rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, |
a3cbdfad | 2846 | mb); |
d8b45213 | 2847 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
2848 | ql_dbg(ql_dbg_disc, vha, 0x2004, |
2849 | "Unable to adjust iIDMA " | |
2850 | "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x " | |
2851 | "%04x.\n", fcport->port_name[0], fcport->port_name[1], | |
d8b45213 AV |
2852 | fcport->port_name[2], fcport->port_name[3], |
2853 | fcport->port_name[4], fcport->port_name[5], | |
2854 | fcport->port_name[6], fcport->port_name[7], rval, | |
7c3df132 | 2855 | fcport->fp_speed, mb[0], mb[1]); |
d8b45213 | 2856 | } else { |
daae62a3 | 2857 | link_speed = qla2x00_get_link_speed_str(ha); |
7c3df132 SK |
2858 | ql_dbg(ql_dbg_disc, vha, 0x2005, |
2859 | "iIDMA adjusted to %s GB/s " | |
2860 | "on %02x%02x%02x%02x%02x%02x%02x%02x.\n", link_speed, | |
2861 | fcport->port_name[0], fcport->port_name[1], | |
2862 | fcport->port_name[2], fcport->port_name[3], | |
2863 | fcport->port_name[4], fcport->port_name[5], | |
2864 | fcport->port_name[6], fcport->port_name[7]); | |
d8b45213 AV |
2865 | } |
2866 | } | |
2867 | ||
23be331d | 2868 | static void |
e315cd28 | 2869 | qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) |
8482e118 AV |
2870 | { |
2871 | struct fc_rport_identifiers rport_ids; | |
bdf79621 | 2872 | struct fc_rport *rport; |
044d78e1 | 2873 | unsigned long flags; |
8482e118 | 2874 | |
ac280b67 | 2875 | qla2x00_rport_del(fcport); |
8482e118 | 2876 | |
f8b02a85 AV |
2877 | rport_ids.node_name = wwn_to_u64(fcport->node_name); |
2878 | rport_ids.port_name = wwn_to_u64(fcport->port_name); | |
8482e118 AV |
2879 | rport_ids.port_id = fcport->d_id.b.domain << 16 | |
2880 | fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; | |
77d74143 | 2881 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
e315cd28 | 2882 | fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); |
77d74143 | 2883 | if (!rport) { |
7c3df132 SK |
2884 | ql_log(ql_log_warn, vha, 0x2006, |
2885 | "Unable to allocate fc remote port.\n"); | |
77d74143 AV |
2886 | return; |
2887 | } | |
2d70c103 NB |
2888 | /* |
2889 | * Create target mode FC NEXUS in qla_target.c if target mode is | |
2890 | * enabled.. | |
2891 | */ | |
2892 | qlt_fc_port_added(vha, fcport); | |
2893 | ||
044d78e1 | 2894 | spin_lock_irqsave(fcport->vha->host->host_lock, flags); |
19a7b4ae | 2895 | *((fc_port_t **)rport->dd_data) = fcport; |
044d78e1 | 2896 | spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); |
d97994dc | 2897 | |
ad3e0eda | 2898 | rport->supported_classes = fcport->supported_classes; |
77d74143 | 2899 | |
8482e118 AV |
2900 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
2901 | if (fcport->port_type == FCT_INITIATOR) | |
2902 | rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; | |
2903 | if (fcport->port_type == FCT_TARGET) | |
2904 | rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; | |
77d74143 | 2905 | fc_remote_port_rolechg(rport, rport_ids.roles); |
1da177e4 LT |
2906 | } |
2907 | ||
23be331d AB |
2908 | /* |
2909 | * qla2x00_update_fcport | |
2910 | * Updates device on list. | |
2911 | * | |
2912 | * Input: | |
2913 | * ha = adapter block pointer. | |
2914 | * fcport = port structure pointer. | |
2915 | * | |
2916 | * Return: | |
2917 | * 0 - Success | |
2918 | * BIT_0 - error | |
2919 | * | |
2920 | * Context: | |
2921 | * Kernel context. | |
2922 | */ | |
2923 | void | |
e315cd28 | 2924 | qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
23be331d | 2925 | { |
e315cd28 | 2926 | fcport->vha = vha; |
23be331d | 2927 | fcport->login_retry = 0; |
5ff1d584 | 2928 | fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); |
23be331d | 2929 | |
e315cd28 | 2930 | qla2x00_iidma_fcport(vha, fcport); |
21090cbe | 2931 | qla24xx_update_fcport_fcp_prio(vha, fcport); |
e315cd28 | 2932 | qla2x00_reg_remote_port(vha, fcport); |
ec426e10 | 2933 | qla2x00_set_fcport_state(fcport, FCS_ONLINE); |
23be331d AB |
2934 | } |
2935 | ||
1da177e4 LT |
2936 | /* |
2937 | * qla2x00_configure_fabric | |
2938 | * Setup SNS devices with loop ID's. | |
2939 | * | |
2940 | * Input: | |
2941 | * ha = adapter block pointer. | |
2942 | * | |
2943 | * Returns: | |
2944 | * 0 = success. | |
2945 | * BIT_0 = error | |
2946 | */ | |
2947 | static int | |
e315cd28 | 2948 | qla2x00_configure_fabric(scsi_qla_host_t *vha) |
1da177e4 | 2949 | { |
b3b02e6e | 2950 | int rval; |
4dc77c36 | 2951 | fc_port_t *fcport; |
1da177e4 LT |
2952 | uint16_t next_loopid; |
2953 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
0107109e | 2954 | uint16_t loop_id; |
1da177e4 | 2955 | LIST_HEAD(new_fcports); |
e315cd28 AC |
2956 | struct qla_hw_data *ha = vha->hw; |
2957 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
1da177e4 LT |
2958 | |
2959 | /* If FL port exists, then SNS is present */ | |
e428924c | 2960 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2961 | loop_id = NPH_F_PORT; |
2962 | else | |
2963 | loop_id = SNS_FL_PORT; | |
e315cd28 | 2964 | rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); |
1da177e4 | 2965 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
2966 | ql_dbg(ql_dbg_disc, vha, 0x201f, |
2967 | "MBX_GET_PORT_NAME failed, No FL Port.\n"); | |
1da177e4 | 2968 | |
e315cd28 | 2969 | vha->device_flags &= ~SWITCH_FOUND; |
1da177e4 LT |
2970 | return (QLA_SUCCESS); |
2971 | } | |
e315cd28 | 2972 | vha->device_flags |= SWITCH_FOUND; |
1da177e4 | 2973 | |
1da177e4 | 2974 | do { |
cca5335c AV |
2975 | /* FDMI support. */ |
2976 | if (ql2xfdmienable && | |
e315cd28 AC |
2977 | test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) |
2978 | qla2x00_fdmi_register(vha); | |
cca5335c | 2979 | |
1da177e4 | 2980 | /* Ensure we are logged into the SNS. */ |
e428924c | 2981 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2982 | loop_id = NPH_SNS; |
2983 | else | |
2984 | loop_id = SIMPLE_NAME_SERVER; | |
0b91d116 CD |
2985 | rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, |
2986 | 0xfc, mb, BIT_1|BIT_0); | |
2987 | if (rval != QLA_SUCCESS) { | |
2988 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
4dc77c36 | 2989 | break; |
0b91d116 | 2990 | } |
1da177e4 | 2991 | if (mb[0] != MBS_COMMAND_COMPLETE) { |
7c3df132 SK |
2992 | ql_dbg(ql_dbg_disc, vha, 0x2042, |
2993 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x " | |
2994 | "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1], | |
2995 | mb[2], mb[6], mb[7]); | |
1da177e4 LT |
2996 | return (QLA_SUCCESS); |
2997 | } | |
2998 | ||
e315cd28 AC |
2999 | if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { |
3000 | if (qla2x00_rft_id(vha)) { | |
1da177e4 | 3001 | /* EMPTY */ |
7c3df132 SK |
3002 | ql_dbg(ql_dbg_disc, vha, 0x2045, |
3003 | "Register FC-4 TYPE failed.\n"); | |
1da177e4 | 3004 | } |
e315cd28 | 3005 | if (qla2x00_rff_id(vha)) { |
1da177e4 | 3006 | /* EMPTY */ |
7c3df132 SK |
3007 | ql_dbg(ql_dbg_disc, vha, 0x2049, |
3008 | "Register FC-4 Features failed.\n"); | |
1da177e4 | 3009 | } |
e315cd28 | 3010 | if (qla2x00_rnn_id(vha)) { |
1da177e4 | 3011 | /* EMPTY */ |
7c3df132 SK |
3012 | ql_dbg(ql_dbg_disc, vha, 0x204f, |
3013 | "Register Node Name failed.\n"); | |
e315cd28 | 3014 | } else if (qla2x00_rsnn_nn(vha)) { |
1da177e4 | 3015 | /* EMPTY */ |
7c3df132 SK |
3016 | ql_dbg(ql_dbg_disc, vha, 0x2053, |
3017 | "Register Symobilic Node Name failed.\n"); | |
1da177e4 LT |
3018 | } |
3019 | } | |
3020 | ||
e315cd28 | 3021 | rval = qla2x00_find_all_fabric_devs(vha, &new_fcports); |
1da177e4 LT |
3022 | if (rval != QLA_SUCCESS) |
3023 | break; | |
3024 | ||
4dc77c36 JC |
3025 | /* Add new ports to existing port list */ |
3026 | list_splice_tail_init(&new_fcports, &vha->vp_fcports); | |
3027 | ||
3028 | /* Starting free loop ID. */ | |
3029 | next_loopid = ha->min_external_loopid; | |
3030 | ||
e315cd28 AC |
3031 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
3032 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
3033 | break; |
3034 | ||
3035 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) | |
3036 | continue; | |
3037 | ||
4dc77c36 | 3038 | /* Logout lost/gone fabric devices (non-FCP2) */ |
c0822b63 | 3039 | if (fcport->scan_state != QLA_FCPORT_SCAN_FOUND && |
b3b02e6e | 3040 | atomic_read(&fcport->state) == FCS_ONLINE) { |
e315cd28 | 3041 | qla2x00_mark_device_lost(vha, fcport, |
d97994dc | 3042 | ql2xplogiabsentdevice, 0); |
1da177e4 | 3043 | if (fcport->loop_id != FC_NO_LOOP_ID && |
f08b7251 | 3044 | (fcport->flags & FCF_FCP2_DEVICE) == 0 && |
1da177e4 LT |
3045 | fcport->port_type != FCT_INITIATOR && |
3046 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 3047 | ha->isp_ops->fabric_logout(vha, |
1c7c6357 AV |
3048 | fcport->loop_id, |
3049 | fcport->d_id.b.domain, | |
3050 | fcport->d_id.b.area, | |
3051 | fcport->d_id.b.al_pa); | |
1da177e4 | 3052 | } |
c0822b63 | 3053 | continue; |
1da177e4 | 3054 | } |
c0822b63 | 3055 | fcport->scan_state = QLA_FCPORT_SCAN_NONE; |
1da177e4 | 3056 | |
4dc77c36 JC |
3057 | /* Login fabric devices that need a login */ |
3058 | if ((fcport->flags & FCF_LOGIN_NEEDED) != 0 && | |
3059 | atomic_read(&vha->loop_down_timer) == 0) { | |
3060 | if (fcport->loop_id == FC_NO_LOOP_ID) { | |
3061 | fcport->loop_id = next_loopid; | |
3062 | rval = qla2x00_find_new_loop_id( | |
3063 | base_vha, fcport); | |
3064 | if (rval != QLA_SUCCESS) { | |
3065 | /* Ran out of IDs to use */ | |
3066 | continue; | |
3067 | } | |
1da177e4 LT |
3068 | } |
3069 | } | |
1da177e4 | 3070 | |
bdf79621 | 3071 | /* Login and update database */ |
e315cd28 | 3072 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
1da177e4 LT |
3073 | } |
3074 | } while (0); | |
3075 | ||
1da177e4 | 3076 | if (rval) { |
7c3df132 SK |
3077 | ql_dbg(ql_dbg_disc, vha, 0x2068, |
3078 | "Configure fabric error exit rval=%d.\n", rval); | |
1da177e4 LT |
3079 | } |
3080 | ||
3081 | return (rval); | |
3082 | } | |
3083 | ||
1da177e4 LT |
3084 | /* |
3085 | * qla2x00_find_all_fabric_devs | |
3086 | * | |
3087 | * Input: | |
3088 | * ha = adapter block pointer. | |
3089 | * dev = database device entry pointer. | |
3090 | * | |
3091 | * Returns: | |
3092 | * 0 = success. | |
3093 | * | |
3094 | * Context: | |
3095 | * Kernel context. | |
3096 | */ | |
3097 | static int | |
e315cd28 AC |
3098 | qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha, |
3099 | struct list_head *new_fcports) | |
1da177e4 LT |
3100 | { |
3101 | int rval; | |
3102 | uint16_t loop_id; | |
3103 | fc_port_t *fcport, *new_fcport, *fcptemp; | |
3104 | int found; | |
3105 | ||
3106 | sw_info_t *swl; | |
3107 | int swl_idx; | |
3108 | int first_dev, last_dev; | |
1516ef44 | 3109 | port_id_t wrap = {}, nxt_d_id; |
e315cd28 AC |
3110 | struct qla_hw_data *ha = vha->hw; |
3111 | struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev); | |
ee546b6e | 3112 | struct scsi_qla_host *tvp; |
1da177e4 LT |
3113 | |
3114 | rval = QLA_SUCCESS; | |
3115 | ||
3116 | /* Try GID_PT to get device list, else GAN. */ | |
7a67735b | 3117 | if (!ha->swl) |
642ef983 | 3118 | ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), |
7a67735b AV |
3119 | GFP_KERNEL); |
3120 | swl = ha->swl; | |
bbfbbbc1 | 3121 | if (!swl) { |
1da177e4 | 3122 | /*EMPTY*/ |
7c3df132 SK |
3123 | ql_dbg(ql_dbg_disc, vha, 0x2054, |
3124 | "GID_PT allocations failed, fallback on GA_NXT.\n"); | |
1da177e4 | 3125 | } else { |
642ef983 | 3126 | memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); |
e315cd28 | 3127 | if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { |
1da177e4 | 3128 | swl = NULL; |
e315cd28 | 3129 | } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 | 3130 | swl = NULL; |
e315cd28 | 3131 | } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 | 3132 | swl = NULL; |
e5896bd5 | 3133 | } else if (ql2xiidmaenable && |
e315cd28 AC |
3134 | qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) { |
3135 | qla2x00_gpsc(vha, swl); | |
1da177e4 | 3136 | } |
e8c72ba5 CD |
3137 | |
3138 | /* If other queries succeeded probe for FC-4 type */ | |
3139 | if (swl) | |
3140 | qla2x00_gff_id(vha, swl); | |
1da177e4 LT |
3141 | } |
3142 | swl_idx = 0; | |
3143 | ||
3144 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 3145 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 3146 | if (new_fcport == NULL) { |
7c3df132 SK |
3147 | ql_log(ql_log_warn, vha, 0x205e, |
3148 | "Failed to allocate memory for fcport.\n"); | |
1da177e4 LT |
3149 | return (QLA_MEMORY_ALLOC_FAILED); |
3150 | } | |
3151 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
3152 | /* Set start port ID scan at adapter ID. */ |
3153 | first_dev = 1; | |
3154 | last_dev = 0; | |
3155 | ||
3156 | /* Starting free loop ID. */ | |
e315cd28 AC |
3157 | loop_id = ha->min_external_loopid; |
3158 | for (; loop_id <= ha->max_loop_id; loop_id++) { | |
3159 | if (qla2x00_is_reserved_id(vha, loop_id)) | |
1da177e4 LT |
3160 | continue; |
3161 | ||
3a6478df GM |
3162 | if (ha->current_topology == ISP_CFG_FL && |
3163 | (atomic_read(&vha->loop_down_timer) || | |
3164 | LOOP_TRANSITION(vha))) { | |
bb2d52b2 AV |
3165 | atomic_set(&vha->loop_down_timer, 0); |
3166 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
3167 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
1da177e4 | 3168 | break; |
bb2d52b2 | 3169 | } |
1da177e4 LT |
3170 | |
3171 | if (swl != NULL) { | |
3172 | if (last_dev) { | |
3173 | wrap.b24 = new_fcport->d_id.b24; | |
3174 | } else { | |
3175 | new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; | |
3176 | memcpy(new_fcport->node_name, | |
3177 | swl[swl_idx].node_name, WWN_SIZE); | |
3178 | memcpy(new_fcport->port_name, | |
3179 | swl[swl_idx].port_name, WWN_SIZE); | |
d8b45213 AV |
3180 | memcpy(new_fcport->fabric_port_name, |
3181 | swl[swl_idx].fabric_port_name, WWN_SIZE); | |
3182 | new_fcport->fp_speed = swl[swl_idx].fp_speed; | |
e8c72ba5 | 3183 | new_fcport->fc4_type = swl[swl_idx].fc4_type; |
1da177e4 LT |
3184 | |
3185 | if (swl[swl_idx].d_id.b.rsvd_1 != 0) { | |
3186 | last_dev = 1; | |
3187 | } | |
3188 | swl_idx++; | |
3189 | } | |
3190 | } else { | |
3191 | /* Send GA_NXT to the switch */ | |
e315cd28 | 3192 | rval = qla2x00_ga_nxt(vha, new_fcport); |
1da177e4 | 3193 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
3194 | ql_log(ql_log_warn, vha, 0x2064, |
3195 | "SNS scan failed -- assuming " | |
3196 | "zero-entry result.\n"); | |
1da177e4 LT |
3197 | list_for_each_entry_safe(fcport, fcptemp, |
3198 | new_fcports, list) { | |
3199 | list_del(&fcport->list); | |
3200 | kfree(fcport); | |
3201 | } | |
3202 | rval = QLA_SUCCESS; | |
3203 | break; | |
3204 | } | |
3205 | } | |
3206 | ||
3207 | /* If wrap on switch device list, exit. */ | |
3208 | if (first_dev) { | |
3209 | wrap.b24 = new_fcport->d_id.b24; | |
3210 | first_dev = 0; | |
3211 | } else if (new_fcport->d_id.b24 == wrap.b24) { | |
7c3df132 SK |
3212 | ql_dbg(ql_dbg_disc, vha, 0x2065, |
3213 | "Device wrap (%02x%02x%02x).\n", | |
3214 | new_fcport->d_id.b.domain, | |
3215 | new_fcport->d_id.b.area, | |
3216 | new_fcport->d_id.b.al_pa); | |
1da177e4 LT |
3217 | break; |
3218 | } | |
3219 | ||
2c3dfe3f | 3220 | /* Bypass if same physical adapter. */ |
e315cd28 | 3221 | if (new_fcport->d_id.b24 == base_vha->d_id.b24) |
1da177e4 LT |
3222 | continue; |
3223 | ||
2c3dfe3f | 3224 | /* Bypass virtual ports of the same host. */ |
e315cd28 AC |
3225 | found = 0; |
3226 | if (ha->num_vhosts) { | |
feafb7b1 AE |
3227 | unsigned long flags; |
3228 | ||
3229 | spin_lock_irqsave(&ha->vport_slock, flags); | |
ee546b6e | 3230 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
3231 | if (new_fcport->d_id.b24 == vp->d_id.b24) { |
3232 | found = 1; | |
2c3dfe3f | 3233 | break; |
e315cd28 | 3234 | } |
2c3dfe3f | 3235 | } |
feafb7b1 AE |
3236 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
3237 | ||
e315cd28 | 3238 | if (found) |
2c3dfe3f SJ |
3239 | continue; |
3240 | } | |
3241 | ||
f7d289f6 AV |
3242 | /* Bypass if same domain and area of adapter. */ |
3243 | if (((new_fcport->d_id.b24 & 0xffff00) == | |
e315cd28 | 3244 | (vha->d_id.b24 & 0xffff00)) && ha->current_topology == |
f7d289f6 AV |
3245 | ISP_CFG_FL) |
3246 | continue; | |
3247 | ||
1da177e4 LT |
3248 | /* Bypass reserved domain fields. */ |
3249 | if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) | |
3250 | continue; | |
3251 | ||
e8c72ba5 | 3252 | /* Bypass ports whose FCP-4 type is not FCP_SCSI */ |
4da26e16 CD |
3253 | if (ql2xgffidenable && |
3254 | (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && | |
3255 | new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) | |
e8c72ba5 CD |
3256 | continue; |
3257 | ||
1da177e4 LT |
3258 | /* Locate matching device in database. */ |
3259 | found = 0; | |
e315cd28 | 3260 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
3261 | if (memcmp(new_fcport->port_name, fcport->port_name, |
3262 | WWN_SIZE)) | |
3263 | continue; | |
3264 | ||
c0822b63 | 3265 | fcport->scan_state = QLA_FCPORT_SCAN_FOUND; |
b3b02e6e | 3266 | |
1da177e4 LT |
3267 | found++; |
3268 | ||
d8b45213 AV |
3269 | /* Update port state. */ |
3270 | memcpy(fcport->fabric_port_name, | |
3271 | new_fcport->fabric_port_name, WWN_SIZE); | |
3272 | fcport->fp_speed = new_fcport->fp_speed; | |
3273 | ||
1da177e4 LT |
3274 | /* |
3275 | * If address the same and state FCS_ONLINE, nothing | |
3276 | * changed. | |
3277 | */ | |
3278 | if (fcport->d_id.b24 == new_fcport->d_id.b24 && | |
3279 | atomic_read(&fcport->state) == FCS_ONLINE) { | |
3280 | break; | |
3281 | } | |
3282 | ||
3283 | /* | |
3284 | * If device was not a fabric device before. | |
3285 | */ | |
3286 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
3287 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
5f16b331 | 3288 | qla2x00_clear_loop_id(fcport); |
1da177e4 LT |
3289 | fcport->flags |= (FCF_FABRIC_DEVICE | |
3290 | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
3291 | break; |
3292 | } | |
3293 | ||
3294 | /* | |
3295 | * Port ID changed or device was marked to be updated; | |
3296 | * Log it out if still logged in and mark it for | |
3297 | * relogin later. | |
3298 | */ | |
3299 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
3300 | fcport->flags |= FCF_LOGIN_NEEDED; | |
3301 | if (fcport->loop_id != FC_NO_LOOP_ID && | |
f08b7251 | 3302 | (fcport->flags & FCF_FCP2_DEVICE) == 0 && |
0eba25df | 3303 | (fcport->flags & FCF_ASYNC_SENT) == 0 && |
1da177e4 LT |
3304 | fcport->port_type != FCT_INITIATOR && |
3305 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 3306 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3307 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3308 | fcport->d_id.b.al_pa); | |
5f16b331 | 3309 | qla2x00_clear_loop_id(fcport); |
1da177e4 LT |
3310 | } |
3311 | ||
3312 | break; | |
3313 | } | |
3314 | ||
3315 | if (found) | |
3316 | continue; | |
1da177e4 LT |
3317 | /* If device was not in our fcports list, then add it. */ |
3318 | list_add_tail(&new_fcport->list, new_fcports); | |
3319 | ||
3320 | /* Allocate a new replacement fcport. */ | |
3321 | nxt_d_id.b24 = new_fcport->d_id.b24; | |
e315cd28 | 3322 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 3323 | if (new_fcport == NULL) { |
7c3df132 SK |
3324 | ql_log(ql_log_warn, vha, 0x2066, |
3325 | "Memory allocation failed for fcport.\n"); | |
1da177e4 LT |
3326 | return (QLA_MEMORY_ALLOC_FAILED); |
3327 | } | |
3328 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
3329 | new_fcport->d_id.b24 = nxt_d_id.b24; | |
3330 | } | |
3331 | ||
c9475cb0 | 3332 | kfree(new_fcport); |
1da177e4 | 3333 | |
1da177e4 LT |
3334 | return (rval); |
3335 | } | |
3336 | ||
3337 | /* | |
3338 | * qla2x00_find_new_loop_id | |
3339 | * Scan through our port list and find a new usable loop ID. | |
3340 | * | |
3341 | * Input: | |
3342 | * ha: adapter state pointer. | |
3343 | * dev: port structure pointer. | |
3344 | * | |
3345 | * Returns: | |
3346 | * qla2x00 local function return status code. | |
3347 | * | |
3348 | * Context: | |
3349 | * Kernel context. | |
3350 | */ | |
03bcfb57 | 3351 | int |
e315cd28 | 3352 | qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) |
1da177e4 LT |
3353 | { |
3354 | int rval; | |
e315cd28 | 3355 | struct qla_hw_data *ha = vha->hw; |
feafb7b1 | 3356 | unsigned long flags = 0; |
1da177e4 LT |
3357 | |
3358 | rval = QLA_SUCCESS; | |
3359 | ||
5f16b331 | 3360 | spin_lock_irqsave(&ha->vport_slock, flags); |
1da177e4 | 3361 | |
5f16b331 CD |
3362 | dev->loop_id = find_first_zero_bit(ha->loop_id_map, |
3363 | LOOPID_MAP_SIZE); | |
3364 | if (dev->loop_id >= LOOPID_MAP_SIZE || | |
3365 | qla2x00_is_reserved_id(vha, dev->loop_id)) { | |
3366 | dev->loop_id = FC_NO_LOOP_ID; | |
3367 | rval = QLA_FUNCTION_FAILED; | |
3368 | } else | |
3369 | set_bit(dev->loop_id, ha->loop_id_map); | |
1da177e4 | 3370 | |
5f16b331 | 3371 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
1da177e4 | 3372 | |
5f16b331 CD |
3373 | if (rval == QLA_SUCCESS) |
3374 | ql_dbg(ql_dbg_disc, dev->vha, 0x2086, | |
3375 | "Assigning new loopid=%x, portid=%x.\n", | |
3376 | dev->loop_id, dev->d_id.b24); | |
3377 | else | |
3378 | ql_log(ql_log_warn, dev->vha, 0x2087, | |
3379 | "No loop_id's available, portid=%x.\n", | |
3380 | dev->d_id.b24); | |
1da177e4 LT |
3381 | |
3382 | return (rval); | |
3383 | } | |
3384 | ||
1da177e4 LT |
3385 | /* |
3386 | * qla2x00_fabric_dev_login | |
3387 | * Login fabric target device and update FC port database. | |
3388 | * | |
3389 | * Input: | |
3390 | * ha: adapter state pointer. | |
3391 | * fcport: port structure list pointer. | |
3392 | * next_loopid: contains value of a new loop ID that can be used | |
3393 | * by the next login attempt. | |
3394 | * | |
3395 | * Returns: | |
3396 | * qla2x00 local function return status code. | |
3397 | * | |
3398 | * Context: | |
3399 | * Kernel context. | |
3400 | */ | |
3401 | static int | |
e315cd28 | 3402 | qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
3403 | uint16_t *next_loopid) |
3404 | { | |
3405 | int rval; | |
3406 | int retry; | |
0107109e | 3407 | uint8_t opts; |
e315cd28 | 3408 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3409 | |
3410 | rval = QLA_SUCCESS; | |
3411 | retry = 0; | |
3412 | ||
ac280b67 | 3413 | if (IS_ALOGIO_CAPABLE(ha)) { |
5ff1d584 AV |
3414 | if (fcport->flags & FCF_ASYNC_SENT) |
3415 | return rval; | |
3416 | fcport->flags |= FCF_ASYNC_SENT; | |
ac280b67 AV |
3417 | rval = qla2x00_post_async_login_work(vha, fcport, NULL); |
3418 | if (!rval) | |
3419 | return rval; | |
3420 | } | |
3421 | ||
5ff1d584 | 3422 | fcport->flags &= ~FCF_ASYNC_SENT; |
e315cd28 | 3423 | rval = qla2x00_fabric_login(vha, fcport, next_loopid); |
1da177e4 | 3424 | if (rval == QLA_SUCCESS) { |
f08b7251 | 3425 | /* Send an ADISC to FCP2 devices.*/ |
0107109e | 3426 | opts = 0; |
f08b7251 | 3427 | if (fcport->flags & FCF_FCP2_DEVICE) |
0107109e | 3428 | opts |= BIT_1; |
e315cd28 | 3429 | rval = qla2x00_get_port_database(vha, fcport, opts); |
1da177e4 | 3430 | if (rval != QLA_SUCCESS) { |
e315cd28 | 3431 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3432 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3433 | fcport->d_id.b.al_pa); | |
e315cd28 | 3434 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 | 3435 | } else { |
e315cd28 | 3436 | qla2x00_update_fcport(vha, fcport); |
1da177e4 | 3437 | } |
0b91d116 CD |
3438 | } else { |
3439 | /* Retry Login. */ | |
3440 | qla2x00_mark_device_lost(vha, fcport, 1, 0); | |
1da177e4 LT |
3441 | } |
3442 | ||
3443 | return (rval); | |
3444 | } | |
3445 | ||
3446 | /* | |
3447 | * qla2x00_fabric_login | |
3448 | * Issue fabric login command. | |
3449 | * | |
3450 | * Input: | |
3451 | * ha = adapter block pointer. | |
3452 | * device = pointer to FC device type structure. | |
3453 | * | |
3454 | * Returns: | |
3455 | * 0 - Login successfully | |
3456 | * 1 - Login failed | |
3457 | * 2 - Initiator device | |
3458 | * 3 - Fatal error | |
3459 | */ | |
3460 | int | |
e315cd28 | 3461 | qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
3462 | uint16_t *next_loopid) |
3463 | { | |
3464 | int rval; | |
3465 | int retry; | |
3466 | uint16_t tmp_loopid; | |
3467 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
e315cd28 | 3468 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3469 | |
3470 | retry = 0; | |
3471 | tmp_loopid = 0; | |
3472 | ||
3473 | for (;;) { | |
7c3df132 SK |
3474 | ql_dbg(ql_dbg_disc, vha, 0x2000, |
3475 | "Trying Fabric Login w/loop id 0x%04x for port " | |
3476 | "%02x%02x%02x.\n", | |
3477 | fcport->loop_id, fcport->d_id.b.domain, | |
3478 | fcport->d_id.b.area, fcport->d_id.b.al_pa); | |
1da177e4 LT |
3479 | |
3480 | /* Login fcport on switch. */ | |
0b91d116 | 3481 | rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, |
1da177e4 LT |
3482 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3483 | fcport->d_id.b.al_pa, mb, BIT_0); | |
0b91d116 CD |
3484 | if (rval != QLA_SUCCESS) { |
3485 | return rval; | |
3486 | } | |
1da177e4 LT |
3487 | if (mb[0] == MBS_PORT_ID_USED) { |
3488 | /* | |
3489 | * Device has another loop ID. The firmware team | |
0107109e AV |
3490 | * recommends the driver perform an implicit login with |
3491 | * the specified ID again. The ID we just used is save | |
3492 | * here so we return with an ID that can be tried by | |
3493 | * the next login. | |
1da177e4 LT |
3494 | */ |
3495 | retry++; | |
3496 | tmp_loopid = fcport->loop_id; | |
3497 | fcport->loop_id = mb[1]; | |
3498 | ||
7c3df132 SK |
3499 | ql_dbg(ql_dbg_disc, vha, 0x2001, |
3500 | "Fabric Login: port in use - next loop " | |
3501 | "id=0x%04x, port id= %02x%02x%02x.\n", | |
1da177e4 | 3502 | fcport->loop_id, fcport->d_id.b.domain, |
7c3df132 | 3503 | fcport->d_id.b.area, fcport->d_id.b.al_pa); |
1da177e4 LT |
3504 | |
3505 | } else if (mb[0] == MBS_COMMAND_COMPLETE) { | |
3506 | /* | |
3507 | * Login succeeded. | |
3508 | */ | |
3509 | if (retry) { | |
3510 | /* A retry occurred before. */ | |
3511 | *next_loopid = tmp_loopid; | |
3512 | } else { | |
3513 | /* | |
3514 | * No retry occurred before. Just increment the | |
3515 | * ID value for next login. | |
3516 | */ | |
3517 | *next_loopid = (fcport->loop_id + 1); | |
3518 | } | |
3519 | ||
3520 | if (mb[1] & BIT_0) { | |
3521 | fcport->port_type = FCT_INITIATOR; | |
3522 | } else { | |
3523 | fcport->port_type = FCT_TARGET; | |
3524 | if (mb[1] & BIT_1) { | |
8474f3a0 | 3525 | fcport->flags |= FCF_FCP2_DEVICE; |
1da177e4 LT |
3526 | } |
3527 | } | |
3528 | ||
ad3e0eda AV |
3529 | if (mb[10] & BIT_0) |
3530 | fcport->supported_classes |= FC_COS_CLASS2; | |
3531 | if (mb[10] & BIT_1) | |
3532 | fcport->supported_classes |= FC_COS_CLASS3; | |
3533 | ||
2d70c103 NB |
3534 | if (IS_FWI2_CAPABLE(ha)) { |
3535 | if (mb[10] & BIT_7) | |
3536 | fcport->flags |= | |
3537 | FCF_CONF_COMP_SUPPORTED; | |
3538 | } | |
3539 | ||
1da177e4 LT |
3540 | rval = QLA_SUCCESS; |
3541 | break; | |
3542 | } else if (mb[0] == MBS_LOOP_ID_USED) { | |
3543 | /* | |
3544 | * Loop ID already used, try next loop ID. | |
3545 | */ | |
3546 | fcport->loop_id++; | |
e315cd28 | 3547 | rval = qla2x00_find_new_loop_id(vha, fcport); |
1da177e4 LT |
3548 | if (rval != QLA_SUCCESS) { |
3549 | /* Ran out of loop IDs to use */ | |
3550 | break; | |
3551 | } | |
3552 | } else if (mb[0] == MBS_COMMAND_ERROR) { | |
3553 | /* | |
3554 | * Firmware possibly timed out during login. If NO | |
3555 | * retries are left to do then the device is declared | |
3556 | * dead. | |
3557 | */ | |
3558 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3559 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3560 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3561 | fcport->d_id.b.al_pa); | |
e315cd28 | 3562 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 LT |
3563 | |
3564 | rval = 1; | |
3565 | break; | |
3566 | } else { | |
3567 | /* | |
3568 | * unrecoverable / not handled error | |
3569 | */ | |
7c3df132 SK |
3570 | ql_dbg(ql_dbg_disc, vha, 0x2002, |
3571 | "Failed=%x port_id=%02x%02x%02x loop_id=%x " | |
3572 | "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, | |
3573 | fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
3574 | fcport->loop_id, jiffies); | |
1da177e4 LT |
3575 | |
3576 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3577 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3578 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3579 | fcport->d_id.b.al_pa); | |
5f16b331 | 3580 | qla2x00_clear_loop_id(fcport); |
0eedfcf0 | 3581 | fcport->login_retry = 0; |
1da177e4 LT |
3582 | |
3583 | rval = 3; | |
3584 | break; | |
3585 | } | |
3586 | } | |
3587 | ||
3588 | return (rval); | |
3589 | } | |
3590 | ||
3591 | /* | |
3592 | * qla2x00_local_device_login | |
3593 | * Issue local device login command. | |
3594 | * | |
3595 | * Input: | |
3596 | * ha = adapter block pointer. | |
3597 | * loop_id = loop id of device to login to. | |
3598 | * | |
3599 | * Returns (Where's the #define!!!!): | |
3600 | * 0 - Login successfully | |
3601 | * 1 - Login failed | |
3602 | * 3 - Fatal error | |
3603 | */ | |
3604 | int | |
e315cd28 | 3605 | qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) |
1da177e4 LT |
3606 | { |
3607 | int rval; | |
3608 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
3609 | ||
3610 | memset(mb, 0, sizeof(mb)); | |
e315cd28 | 3611 | rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); |
1da177e4 LT |
3612 | if (rval == QLA_SUCCESS) { |
3613 | /* Interrogate mailbox registers for any errors */ | |
3614 | if (mb[0] == MBS_COMMAND_ERROR) | |
3615 | rval = 1; | |
3616 | else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) | |
3617 | /* device not in PCB table */ | |
3618 | rval = 3; | |
3619 | } | |
3620 | ||
3621 | return (rval); | |
3622 | } | |
3623 | ||
3624 | /* | |
3625 | * qla2x00_loop_resync | |
3626 | * Resync with fibre channel devices. | |
3627 | * | |
3628 | * Input: | |
3629 | * ha = adapter block pointer. | |
3630 | * | |
3631 | * Returns: | |
3632 | * 0 = success | |
3633 | */ | |
3634 | int | |
e315cd28 | 3635 | qla2x00_loop_resync(scsi_qla_host_t *vha) |
1da177e4 | 3636 | { |
73208dfd | 3637 | int rval = QLA_SUCCESS; |
1da177e4 | 3638 | uint32_t wait_time; |
67c2e93a AC |
3639 | struct req_que *req; |
3640 | struct rsp_que *rsp; | |
3641 | ||
7163ea81 | 3642 | if (vha->hw->flags.cpu_affinity_enabled) |
67c2e93a AC |
3643 | req = vha->hw->req_q_map[0]; |
3644 | else | |
3645 | req = vha->req; | |
3646 | rsp = req->rsp; | |
1da177e4 | 3647 | |
e315cd28 AC |
3648 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
3649 | if (vha->flags.online) { | |
3650 | if (!(rval = qla2x00_fw_ready(vha))) { | |
1da177e4 LT |
3651 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
3652 | wait_time = 256; | |
3653 | do { | |
0107109e | 3654 | /* Issue a marker after FW becomes ready. */ |
73208dfd AC |
3655 | qla2x00_marker(vha, req, rsp, 0, 0, |
3656 | MK_SYNC_ALL); | |
e315cd28 | 3657 | vha->marker_needed = 0; |
1da177e4 LT |
3658 | |
3659 | /* Remap devices on Loop. */ | |
e315cd28 | 3660 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1da177e4 | 3661 | |
e315cd28 | 3662 | qla2x00_configure_loop(vha); |
1da177e4 | 3663 | wait_time--; |
e315cd28 AC |
3664 | } while (!atomic_read(&vha->loop_down_timer) && |
3665 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
3666 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
3667 | &vha->dpc_flags))); | |
1da177e4 | 3668 | } |
1da177e4 LT |
3669 | } |
3670 | ||
e315cd28 | 3671 | if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) |
1da177e4 | 3672 | return (QLA_FUNCTION_FAILED); |
1da177e4 | 3673 | |
e315cd28 | 3674 | if (rval) |
7c3df132 SK |
3675 | ql_dbg(ql_dbg_disc, vha, 0x206c, |
3676 | "%s *** FAILED ***.\n", __func__); | |
1da177e4 LT |
3677 | |
3678 | return (rval); | |
3679 | } | |
3680 | ||
579d12b5 SK |
3681 | /* |
3682 | * qla2x00_perform_loop_resync | |
3683 | * Description: This function will set the appropriate flags and call | |
3684 | * qla2x00_loop_resync. If successful loop will be resynced | |
3685 | * Arguments : scsi_qla_host_t pointer | |
3686 | * returm : Success or Failure | |
3687 | */ | |
3688 | ||
3689 | int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) | |
3690 | { | |
3691 | int32_t rval = 0; | |
3692 | ||
3693 | if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { | |
3694 | /*Configure the flags so that resync happens properly*/ | |
3695 | atomic_set(&ha->loop_down_timer, 0); | |
3696 | if (!(ha->device_flags & DFLG_NO_CABLE)) { | |
3697 | atomic_set(&ha->loop_state, LOOP_UP); | |
3698 | set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); | |
3699 | set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); | |
3700 | set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); | |
3701 | ||
3702 | rval = qla2x00_loop_resync(ha); | |
3703 | } else | |
3704 | atomic_set(&ha->loop_state, LOOP_DEAD); | |
3705 | ||
3706 | clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); | |
3707 | } | |
3708 | ||
3709 | return rval; | |
3710 | } | |
3711 | ||
d97994dc | 3712 | void |
67becc00 | 3713 | qla2x00_update_fcports(scsi_qla_host_t *base_vha) |
d97994dc AV |
3714 | { |
3715 | fc_port_t *fcport; | |
feafb7b1 AE |
3716 | struct scsi_qla_host *vha; |
3717 | struct qla_hw_data *ha = base_vha->hw; | |
3718 | unsigned long flags; | |
d97994dc | 3719 | |
feafb7b1 | 3720 | spin_lock_irqsave(&ha->vport_slock, flags); |
d97994dc | 3721 | /* Go with deferred removal of rport references. */ |
feafb7b1 AE |
3722 | list_for_each_entry(vha, &base_vha->hw->vp_list, list) { |
3723 | atomic_inc(&vha->vref_count); | |
3724 | list_for_each_entry(fcport, &vha->vp_fcports, list) { | |
8ae598d0 | 3725 | if (fcport->drport && |
feafb7b1 AE |
3726 | atomic_read(&fcport->state) != FCS_UNCONFIGURED) { |
3727 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
3728 | ||
67becc00 | 3729 | qla2x00_rport_del(fcport); |
feafb7b1 AE |
3730 | |
3731 | spin_lock_irqsave(&ha->vport_slock, flags); | |
3732 | } | |
3733 | } | |
3734 | atomic_dec(&vha->vref_count); | |
3735 | } | |
3736 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
d97994dc AV |
3737 | } |
3738 | ||
579d12b5 SK |
3739 | /* |
3740 | * qla82xx_quiescent_state_cleanup | |
3741 | * Description: This function will block the new I/Os | |
3742 | * Its not aborting any I/Os as context | |
3743 | * is not destroyed during quiescence | |
3744 | * Arguments: scsi_qla_host_t | |
3745 | * return : void | |
3746 | */ | |
3747 | void | |
3748 | qla82xx_quiescent_state_cleanup(scsi_qla_host_t *vha) | |
3749 | { | |
3750 | struct qla_hw_data *ha = vha->hw; | |
3751 | struct scsi_qla_host *vp; | |
3752 | ||
7c3df132 SK |
3753 | ql_dbg(ql_dbg_p3p, vha, 0xb002, |
3754 | "Performing ISP error recovery - ha=%p.\n", ha); | |
579d12b5 SK |
3755 | |
3756 | atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); | |
3757 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { | |
3758 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
3759 | qla2x00_mark_all_devices_lost(vha, 0); | |
3760 | list_for_each_entry(vp, &ha->vp_list, list) | |
3761 | qla2x00_mark_all_devices_lost(vha, 0); | |
3762 | } else { | |
3763 | if (!atomic_read(&vha->loop_down_timer)) | |
3764 | atomic_set(&vha->loop_down_timer, | |
3765 | LOOP_DOWN_TIME); | |
3766 | } | |
3767 | /* Wait for pending cmds to complete */ | |
3768 | qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); | |
3769 | } | |
3770 | ||
a9083016 GM |
3771 | void |
3772 | qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) | |
3773 | { | |
3774 | struct qla_hw_data *ha = vha->hw; | |
579d12b5 | 3775 | struct scsi_qla_host *vp; |
feafb7b1 | 3776 | unsigned long flags; |
6aef87be | 3777 | fc_port_t *fcport; |
a9083016 | 3778 | |
e46ef004 SK |
3779 | /* For ISP82XX, driver waits for completion of the commands. |
3780 | * online flag should be set. | |
3781 | */ | |
3782 | if (!IS_QLA82XX(ha)) | |
3783 | vha->flags.online = 0; | |
a9083016 GM |
3784 | ha->flags.chip_reset_done = 0; |
3785 | clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
2be21fa2 | 3786 | vha->qla_stats.total_isp_aborts++; |
a9083016 | 3787 | |
7c3df132 SK |
3788 | ql_log(ql_log_info, vha, 0x00af, |
3789 | "Performing ISP error recovery - ha=%p.\n", ha); | |
a9083016 | 3790 | |
e46ef004 SK |
3791 | /* For ISP82XX, reset_chip is just disabling interrupts. |
3792 | * Driver waits for the completion of the commands. | |
3793 | * the interrupts need to be enabled. | |
3794 | */ | |
a9083016 GM |
3795 | if (!IS_QLA82XX(ha)) |
3796 | ha->isp_ops->reset_chip(vha); | |
3797 | ||
3798 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
3799 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { | |
3800 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
3801 | qla2x00_mark_all_devices_lost(vha, 0); | |
feafb7b1 AE |
3802 | |
3803 | spin_lock_irqsave(&ha->vport_slock, flags); | |
579d12b5 | 3804 | list_for_each_entry(vp, &ha->vp_list, list) { |
feafb7b1 AE |
3805 | atomic_inc(&vp->vref_count); |
3806 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
3807 | ||
a9083016 | 3808 | qla2x00_mark_all_devices_lost(vp, 0); |
feafb7b1 AE |
3809 | |
3810 | spin_lock_irqsave(&ha->vport_slock, flags); | |
3811 | atomic_dec(&vp->vref_count); | |
3812 | } | |
3813 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
a9083016 GM |
3814 | } else { |
3815 | if (!atomic_read(&vha->loop_down_timer)) | |
3816 | atomic_set(&vha->loop_down_timer, | |
3817 | LOOP_DOWN_TIME); | |
3818 | } | |
3819 | ||
6aef87be AV |
3820 | /* Clear all async request states across all VPs. */ |
3821 | list_for_each_entry(fcport, &vha->vp_fcports, list) | |
3822 | fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); | |
3823 | spin_lock_irqsave(&ha->vport_slock, flags); | |
3824 | list_for_each_entry(vp, &ha->vp_list, list) { | |
3825 | atomic_inc(&vp->vref_count); | |
3826 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
3827 | ||
3828 | list_for_each_entry(fcport, &vp->vp_fcports, list) | |
3829 | fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); | |
3830 | ||
3831 | spin_lock_irqsave(&ha->vport_slock, flags); | |
3832 | atomic_dec(&vp->vref_count); | |
3833 | } | |
3834 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
3835 | ||
bddd2d65 LC |
3836 | if (!ha->flags.eeh_busy) { |
3837 | /* Make sure for ISP 82XX IO DMA is complete */ | |
3838 | if (IS_QLA82XX(ha)) { | |
7190575f | 3839 | qla82xx_chip_reset_cleanup(vha); |
7c3df132 SK |
3840 | ql_log(ql_log_info, vha, 0x00b4, |
3841 | "Done chip reset cleanup.\n"); | |
a9083016 | 3842 | |
e46ef004 SK |
3843 | /* Done waiting for pending commands. |
3844 | * Reset the online flag. | |
3845 | */ | |
3846 | vha->flags.online = 0; | |
4d78c973 | 3847 | } |
a9083016 | 3848 | |
bddd2d65 LC |
3849 | /* Requeue all commands in outstanding command list. */ |
3850 | qla2x00_abort_all_cmds(vha, DID_RESET << 16); | |
3851 | } | |
a9083016 GM |
3852 | } |
3853 | ||
1da177e4 LT |
3854 | /* |
3855 | * qla2x00_abort_isp | |
3856 | * Resets ISP and aborts all outstanding commands. | |
3857 | * | |
3858 | * Input: | |
3859 | * ha = adapter block pointer. | |
3860 | * | |
3861 | * Returns: | |
3862 | * 0 = success | |
3863 | */ | |
3864 | int | |
e315cd28 | 3865 | qla2x00_abort_isp(scsi_qla_host_t *vha) |
1da177e4 | 3866 | { |
476e8978 | 3867 | int rval; |
1da177e4 | 3868 | uint8_t status = 0; |
e315cd28 AC |
3869 | struct qla_hw_data *ha = vha->hw; |
3870 | struct scsi_qla_host *vp; | |
73208dfd | 3871 | struct req_que *req = ha->req_q_map[0]; |
feafb7b1 | 3872 | unsigned long flags; |
1da177e4 | 3873 | |
e315cd28 | 3874 | if (vha->flags.online) { |
a9083016 | 3875 | qla2x00_abort_isp_cleanup(vha); |
1da177e4 | 3876 | |
85880801 AV |
3877 | if (unlikely(pci_channel_offline(ha->pdev) && |
3878 | ha->flags.pci_channel_io_perm_failure)) { | |
3879 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
3880 | status = 0; | |
3881 | return status; | |
3882 | } | |
3883 | ||
73208dfd | 3884 | ha->isp_ops->get_flash_version(vha, req->ring); |
30c47662 | 3885 | |
e315cd28 | 3886 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 3887 | |
e315cd28 AC |
3888 | if (!qla2x00_restart_isp(vha)) { |
3889 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
1da177e4 | 3890 | |
e315cd28 | 3891 | if (!atomic_read(&vha->loop_down_timer)) { |
1da177e4 LT |
3892 | /* |
3893 | * Issue marker command only when we are going | |
3894 | * to start the I/O . | |
3895 | */ | |
e315cd28 | 3896 | vha->marker_needed = 1; |
1da177e4 LT |
3897 | } |
3898 | ||
e315cd28 | 3899 | vha->flags.online = 1; |
1da177e4 | 3900 | |
fd34f556 | 3901 | ha->isp_ops->enable_intrs(ha); |
1da177e4 | 3902 | |
fa2a1ce5 | 3903 | ha->isp_abort_cnt = 0; |
e315cd28 | 3904 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
476e8978 | 3905 | |
6246b8a1 GM |
3906 | if (IS_QLA81XX(ha) || IS_QLA8031(ha)) |
3907 | qla2x00_get_fw_version(vha); | |
df613b96 AV |
3908 | if (ha->fce) { |
3909 | ha->flags.fce_enabled = 1; | |
3910 | memset(ha->fce, 0, | |
3911 | fce_calc_size(ha->fce_bufs)); | |
e315cd28 | 3912 | rval = qla2x00_enable_fce_trace(vha, |
df613b96 AV |
3913 | ha->fce_dma, ha->fce_bufs, ha->fce_mb, |
3914 | &ha->fce_bufs); | |
3915 | if (rval) { | |
7c3df132 | 3916 | ql_log(ql_log_warn, vha, 0x8033, |
df613b96 AV |
3917 | "Unable to reinitialize FCE " |
3918 | "(%d).\n", rval); | |
3919 | ha->flags.fce_enabled = 0; | |
3920 | } | |
3921 | } | |
436a7b11 AV |
3922 | |
3923 | if (ha->eft) { | |
3924 | memset(ha->eft, 0, EFT_SIZE); | |
e315cd28 | 3925 | rval = qla2x00_enable_eft_trace(vha, |
436a7b11 AV |
3926 | ha->eft_dma, EFT_NUM_BUFFERS); |
3927 | if (rval) { | |
7c3df132 | 3928 | ql_log(ql_log_warn, vha, 0x8034, |
436a7b11 AV |
3929 | "Unable to reinitialize EFT " |
3930 | "(%d).\n", rval); | |
3931 | } | |
3932 | } | |
1da177e4 | 3933 | } else { /* failed the ISP abort */ |
e315cd28 AC |
3934 | vha->flags.online = 1; |
3935 | if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { | |
1da177e4 | 3936 | if (ha->isp_abort_cnt == 0) { |
7c3df132 SK |
3937 | ql_log(ql_log_fatal, vha, 0x8035, |
3938 | "ISP error recover failed - " | |
3939 | "board disabled.\n"); | |
fa2a1ce5 | 3940 | /* |
1da177e4 LT |
3941 | * The next call disables the board |
3942 | * completely. | |
3943 | */ | |
e315cd28 AC |
3944 | ha->isp_ops->reset_adapter(vha); |
3945 | vha->flags.online = 0; | |
1da177e4 | 3946 | clear_bit(ISP_ABORT_RETRY, |
e315cd28 | 3947 | &vha->dpc_flags); |
1da177e4 LT |
3948 | status = 0; |
3949 | } else { /* schedule another ISP abort */ | |
3950 | ha->isp_abort_cnt--; | |
7c3df132 SK |
3951 | ql_dbg(ql_dbg_taskm, vha, 0x8020, |
3952 | "ISP abort - retry remaining %d.\n", | |
3953 | ha->isp_abort_cnt); | |
1da177e4 LT |
3954 | status = 1; |
3955 | } | |
3956 | } else { | |
3957 | ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; | |
7c3df132 SK |
3958 | ql_dbg(ql_dbg_taskm, vha, 0x8021, |
3959 | "ISP error recovery - retrying (%d) " | |
3960 | "more times.\n", ha->isp_abort_cnt); | |
e315cd28 | 3961 | set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
1da177e4 LT |
3962 | status = 1; |
3963 | } | |
3964 | } | |
fa2a1ce5 | 3965 | |
1da177e4 LT |
3966 | } |
3967 | ||
e315cd28 | 3968 | if (!status) { |
7c3df132 | 3969 | ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); |
feafb7b1 AE |
3970 | |
3971 | spin_lock_irqsave(&ha->vport_slock, flags); | |
3972 | list_for_each_entry(vp, &ha->vp_list, list) { | |
3973 | if (vp->vp_idx) { | |
3974 | atomic_inc(&vp->vref_count); | |
3975 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
3976 | ||
e315cd28 | 3977 | qla2x00_vp_abort_isp(vp); |
feafb7b1 AE |
3978 | |
3979 | spin_lock_irqsave(&ha->vport_slock, flags); | |
3980 | atomic_dec(&vp->vref_count); | |
3981 | } | |
e315cd28 | 3982 | } |
feafb7b1 AE |
3983 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
3984 | ||
e315cd28 | 3985 | } else { |
d8424f68 JP |
3986 | ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", |
3987 | __func__); | |
1da177e4 LT |
3988 | } |
3989 | ||
3990 | return(status); | |
3991 | } | |
3992 | ||
3993 | /* | |
3994 | * qla2x00_restart_isp | |
3995 | * restarts the ISP after a reset | |
3996 | * | |
3997 | * Input: | |
3998 | * ha = adapter block pointer. | |
3999 | * | |
4000 | * Returns: | |
4001 | * 0 = success | |
4002 | */ | |
4003 | static int | |
e315cd28 | 4004 | qla2x00_restart_isp(scsi_qla_host_t *vha) |
1da177e4 | 4005 | { |
c6b2fca8 | 4006 | int status = 0; |
1da177e4 | 4007 | uint32_t wait_time; |
e315cd28 | 4008 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
4009 | struct req_que *req = ha->req_q_map[0]; |
4010 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
2d70c103 | 4011 | unsigned long flags; |
1da177e4 LT |
4012 | |
4013 | /* If firmware needs to be loaded */ | |
e315cd28 AC |
4014 | if (qla2x00_isp_firmware(vha)) { |
4015 | vha->flags.online = 0; | |
4016 | status = ha->isp_ops->chip_diag(vha); | |
4017 | if (!status) | |
4018 | status = qla2x00_setup_chip(vha); | |
1da177e4 LT |
4019 | } |
4020 | ||
e315cd28 AC |
4021 | if (!status && !(status = qla2x00_init_rings(vha))) { |
4022 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
2533cf67 | 4023 | ha->flags.chip_reset_done = 1; |
73208dfd AC |
4024 | /* Initialize the queues in use */ |
4025 | qla25xx_init_queues(ha); | |
4026 | ||
e315cd28 AC |
4027 | status = qla2x00_fw_ready(vha); |
4028 | if (!status) { | |
7c3df132 SK |
4029 | ql_dbg(ql_dbg_taskm, vha, 0x8031, |
4030 | "Start configure loop status = %d.\n", status); | |
0107109e AV |
4031 | |
4032 | /* Issue a marker after FW becomes ready. */ | |
73208dfd | 4033 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
0107109e | 4034 | |
e315cd28 | 4035 | vha->flags.online = 1; |
2d70c103 NB |
4036 | |
4037 | /* | |
4038 | * Process any ATIO queue entries that came in | |
4039 | * while we weren't online. | |
4040 | */ | |
4041 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
4042 | if (qla_tgt_mode_enabled(vha)) | |
4043 | qlt_24xx_process_atio_queue(vha); | |
4044 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
4045 | ||
1da177e4 LT |
4046 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
4047 | wait_time = 256; | |
4048 | do { | |
e315cd28 AC |
4049 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
4050 | qla2x00_configure_loop(vha); | |
1da177e4 | 4051 | wait_time--; |
e315cd28 AC |
4052 | } while (!atomic_read(&vha->loop_down_timer) && |
4053 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
4054 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
4055 | &vha->dpc_flags))); | |
1da177e4 LT |
4056 | } |
4057 | ||
4058 | /* if no cable then assume it's good */ | |
e315cd28 | 4059 | if ((vha->device_flags & DFLG_NO_CABLE)) |
1da177e4 LT |
4060 | status = 0; |
4061 | ||
7c3df132 SK |
4062 | ql_dbg(ql_dbg_taskm, vha, 0x8032, |
4063 | "Configure loop done, status = 0x%x.\n", status); | |
1da177e4 LT |
4064 | } |
4065 | return (status); | |
4066 | } | |
4067 | ||
73208dfd AC |
4068 | static int |
4069 | qla25xx_init_queues(struct qla_hw_data *ha) | |
4070 | { | |
4071 | struct rsp_que *rsp = NULL; | |
4072 | struct req_que *req = NULL; | |
4073 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
4074 | int ret = -1; | |
4075 | int i; | |
4076 | ||
2afa19a9 | 4077 | for (i = 1; i < ha->max_rsp_queues; i++) { |
73208dfd AC |
4078 | rsp = ha->rsp_q_map[i]; |
4079 | if (rsp) { | |
4080 | rsp->options &= ~BIT_0; | |
618a7523 | 4081 | ret = qla25xx_init_rsp_que(base_vha, rsp); |
73208dfd | 4082 | if (ret != QLA_SUCCESS) |
7c3df132 SK |
4083 | ql_dbg(ql_dbg_init, base_vha, 0x00ff, |
4084 | "%s Rsp que: %d init failed.\n", | |
4085 | __func__, rsp->id); | |
73208dfd | 4086 | else |
7c3df132 SK |
4087 | ql_dbg(ql_dbg_init, base_vha, 0x0100, |
4088 | "%s Rsp que: %d inited.\n", | |
4089 | __func__, rsp->id); | |
73208dfd | 4090 | } |
2afa19a9 AC |
4091 | } |
4092 | for (i = 1; i < ha->max_req_queues; i++) { | |
73208dfd AC |
4093 | req = ha->req_q_map[i]; |
4094 | if (req) { | |
29bdccbe | 4095 | /* Clear outstanding commands array. */ |
73208dfd | 4096 | req->options &= ~BIT_0; |
618a7523 | 4097 | ret = qla25xx_init_req_que(base_vha, req); |
73208dfd | 4098 | if (ret != QLA_SUCCESS) |
7c3df132 SK |
4099 | ql_dbg(ql_dbg_init, base_vha, 0x0101, |
4100 | "%s Req que: %d init failed.\n", | |
4101 | __func__, req->id); | |
73208dfd | 4102 | else |
7c3df132 SK |
4103 | ql_dbg(ql_dbg_init, base_vha, 0x0102, |
4104 | "%s Req que: %d inited.\n", | |
4105 | __func__, req->id); | |
73208dfd AC |
4106 | } |
4107 | } | |
4108 | return ret; | |
4109 | } | |
4110 | ||
1da177e4 LT |
4111 | /* |
4112 | * qla2x00_reset_adapter | |
4113 | * Reset adapter. | |
4114 | * | |
4115 | * Input: | |
4116 | * ha = adapter block pointer. | |
4117 | */ | |
abbd8870 | 4118 | void |
e315cd28 | 4119 | qla2x00_reset_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
4120 | { |
4121 | unsigned long flags = 0; | |
e315cd28 | 4122 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 4123 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 4124 | |
e315cd28 | 4125 | vha->flags.online = 0; |
fd34f556 | 4126 | ha->isp_ops->disable_intrs(ha); |
1da177e4 | 4127 | |
1da177e4 LT |
4128 | spin_lock_irqsave(&ha->hardware_lock, flags); |
4129 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
4130 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
4131 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
4132 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
4133 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
4134 | } | |
0107109e AV |
4135 | |
4136 | void | |
e315cd28 | 4137 | qla24xx_reset_adapter(scsi_qla_host_t *vha) |
0107109e AV |
4138 | { |
4139 | unsigned long flags = 0; | |
e315cd28 | 4140 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
4141 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
4142 | ||
a9083016 GM |
4143 | if (IS_QLA82XX(ha)) |
4144 | return; | |
4145 | ||
e315cd28 | 4146 | vha->flags.online = 0; |
fd34f556 | 4147 | ha->isp_ops->disable_intrs(ha); |
0107109e AV |
4148 | |
4149 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
4150 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); | |
4151 | RD_REG_DWORD(®->hccr); | |
4152 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
4153 | RD_REG_DWORD(®->hccr); | |
4154 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
09ff36d3 AV |
4155 | |
4156 | if (IS_NOPOLLING_TYPE(ha)) | |
4157 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
4158 | } |
4159 | ||
4e08df3f DM |
4160 | /* On sparc systems, obtain port and node WWN from firmware |
4161 | * properties. | |
4162 | */ | |
e315cd28 AC |
4163 | static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, |
4164 | struct nvram_24xx *nv) | |
4e08df3f DM |
4165 | { |
4166 | #ifdef CONFIG_SPARC | |
e315cd28 | 4167 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 4168 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
4169 | struct device_node *dp = pci_device_to_OF_node(pdev); |
4170 | const u8 *val; | |
4e08df3f DM |
4171 | int len; |
4172 | ||
4173 | val = of_get_property(dp, "port-wwn", &len); | |
4174 | if (val && len >= WWN_SIZE) | |
4175 | memcpy(nv->port_name, val, WWN_SIZE); | |
4176 | ||
4177 | val = of_get_property(dp, "node-wwn", &len); | |
4178 | if (val && len >= WWN_SIZE) | |
4179 | memcpy(nv->node_name, val, WWN_SIZE); | |
4180 | #endif | |
4181 | } | |
4182 | ||
0107109e | 4183 | int |
e315cd28 | 4184 | qla24xx_nvram_config(scsi_qla_host_t *vha) |
0107109e | 4185 | { |
4e08df3f | 4186 | int rval; |
0107109e AV |
4187 | struct init_cb_24xx *icb; |
4188 | struct nvram_24xx *nv; | |
4189 | uint32_t *dptr; | |
4190 | uint8_t *dptr1, *dptr2; | |
4191 | uint32_t chksum; | |
4192 | uint16_t cnt; | |
e315cd28 | 4193 | struct qla_hw_data *ha = vha->hw; |
0107109e | 4194 | |
4e08df3f | 4195 | rval = QLA_SUCCESS; |
0107109e | 4196 | icb = (struct init_cb_24xx *)ha->init_cb; |
281afe19 | 4197 | nv = ha->nvram; |
0107109e AV |
4198 | |
4199 | /* Determine NVRAM starting address. */ | |
e5b68a61 AC |
4200 | if (ha->flags.port0) { |
4201 | ha->nvram_base = FA_NVRAM_FUNC0_ADDR; | |
4202 | ha->vpd_base = FA_NVRAM_VPD0_ADDR; | |
4203 | } else { | |
0107109e | 4204 | ha->nvram_base = FA_NVRAM_FUNC1_ADDR; |
6f641790 AV |
4205 | ha->vpd_base = FA_NVRAM_VPD1_ADDR; |
4206 | } | |
e5b68a61 AC |
4207 | ha->nvram_size = sizeof(struct nvram_24xx); |
4208 | ha->vpd_size = FA_NVRAM_VPD_SIZE; | |
a9083016 GM |
4209 | if (IS_QLA82XX(ha)) |
4210 | ha->vpd_size = FA_VPD_SIZE_82XX; | |
0107109e | 4211 | |
281afe19 SJ |
4212 | /* Get VPD data into cache */ |
4213 | ha->vpd = ha->nvram + VPD_OFFSET; | |
e315cd28 | 4214 | ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, |
281afe19 SJ |
4215 | ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); |
4216 | ||
4217 | /* Get NVRAM data into cache and calculate checksum. */ | |
0107109e | 4218 | dptr = (uint32_t *)nv; |
e315cd28 | 4219 | ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, |
0107109e AV |
4220 | ha->nvram_size); |
4221 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) | |
4222 | chksum += le32_to_cpu(*dptr++); | |
4223 | ||
7c3df132 SK |
4224 | ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, |
4225 | "Contents of NVRAM\n"); | |
4226 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, | |
4227 | (uint8_t *)nv, ha->nvram_size); | |
0107109e AV |
4228 | |
4229 | /* Bad NVRAM data, set defaults parameters. */ | |
4230 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
4231 | || nv->id[3] != ' ' || | |
4232 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
4233 | /* Reset NVRAM data. */ | |
7c3df132 | 4234 | ql_log(ql_log_warn, vha, 0x006b, |
9e336520 | 4235 | "Inconsistent NVRAM detected: checksum=0x%x id=%c " |
7c3df132 SK |
4236 | "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); |
4237 | ql_log(ql_log_warn, vha, 0x006c, | |
4238 | "Falling back to functioning (yet invalid -- WWPN) " | |
4239 | "defaults.\n"); | |
4e08df3f DM |
4240 | |
4241 | /* | |
4242 | * Set default initialization control block. | |
4243 | */ | |
4244 | memset(nv, 0, ha->nvram_size); | |
4245 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
4246 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
4247 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
4248 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
4249 | nv->exchange_count = __constant_cpu_to_le16(0); | |
4250 | nv->hard_address = __constant_cpu_to_le16(124); | |
4251 | nv->port_name[0] = 0x21; | |
e5b68a61 | 4252 | nv->port_name[1] = 0x00 + ha->port_no; |
4e08df3f DM |
4253 | nv->port_name[2] = 0x00; |
4254 | nv->port_name[3] = 0xe0; | |
4255 | nv->port_name[4] = 0x8b; | |
4256 | nv->port_name[5] = 0x1c; | |
4257 | nv->port_name[6] = 0x55; | |
4258 | nv->port_name[7] = 0x86; | |
4259 | nv->node_name[0] = 0x20; | |
4260 | nv->node_name[1] = 0x00; | |
4261 | nv->node_name[2] = 0x00; | |
4262 | nv->node_name[3] = 0xe0; | |
4263 | nv->node_name[4] = 0x8b; | |
4264 | nv->node_name[5] = 0x1c; | |
4265 | nv->node_name[6] = 0x55; | |
4266 | nv->node_name[7] = 0x86; | |
e315cd28 | 4267 | qla24xx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
4268 | nv->login_retry_count = __constant_cpu_to_le16(8); |
4269 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
4270 | nv->login_timeout = __constant_cpu_to_le16(0); | |
4271 | nv->firmware_options_1 = | |
4272 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
4273 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
4274 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
4275 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
4276 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
4277 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
4278 | nv->reset_delay = 5; | |
4279 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
4280 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
4281 | nv->link_down_timeout = __constant_cpu_to_le16(30); | |
4282 | ||
4283 | rval = 1; | |
0107109e AV |
4284 | } |
4285 | ||
2d70c103 NB |
4286 | if (!qla_ini_mode_enabled(vha)) { |
4287 | /* Don't enable full login after initial LIP */ | |
4288 | nv->firmware_options_1 &= __constant_cpu_to_le32(~BIT_13); | |
4289 | /* Don't enable LIP full login for initiator */ | |
4290 | nv->host_p &= __constant_cpu_to_le32(~BIT_10); | |
4291 | } | |
4292 | ||
4293 | qlt_24xx_config_nvram_stage1(vha, nv); | |
4294 | ||
0107109e | 4295 | /* Reset Initialization control block */ |
e315cd28 | 4296 | memset(icb, 0, ha->init_cb_size); |
0107109e AV |
4297 | |
4298 | /* Copy 1st segment. */ | |
4299 | dptr1 = (uint8_t *)icb; | |
4300 | dptr2 = (uint8_t *)&nv->version; | |
4301 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
4302 | while (cnt--) | |
4303 | *dptr1++ = *dptr2++; | |
4304 | ||
4305 | icb->login_retry_count = nv->login_retry_count; | |
3ea66e28 | 4306 | icb->link_down_on_nos = nv->link_down_on_nos; |
0107109e AV |
4307 | |
4308 | /* Copy 2nd segment. */ | |
4309 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
4310 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
4311 | cnt = (uint8_t *)&icb->reserved_3 - | |
4312 | (uint8_t *)&icb->interrupt_delay_timer; | |
4313 | while (cnt--) | |
4314 | *dptr1++ = *dptr2++; | |
4315 | ||
4316 | /* | |
4317 | * Setup driver NVRAM options. | |
4318 | */ | |
e315cd28 | 4319 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), |
9bb9fcf2 | 4320 | "QLA2462"); |
0107109e | 4321 | |
2d70c103 NB |
4322 | qlt_24xx_config_nvram_stage2(vha, icb); |
4323 | ||
5341e868 | 4324 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { |
2d70c103 | 4325 | /* Use alternate WWN? */ |
5341e868 AV |
4326 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); |
4327 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
4328 | } | |
4329 | ||
0107109e | 4330 | /* Prepare nodename */ |
fd0e7e4d | 4331 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { |
0107109e AV |
4332 | /* |
4333 | * Firmware will apply the following mask if the nodename was | |
4334 | * not provided. | |
4335 | */ | |
4336 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
4337 | icb->node_name[0] &= 0xF0; | |
4338 | } | |
4339 | ||
4340 | /* Set host adapter parameters. */ | |
4341 | ha->flags.disable_risc_code_load = 0; | |
0c8c39af AV |
4342 | ha->flags.enable_lip_reset = 0; |
4343 | ha->flags.enable_lip_full_login = | |
4344 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
4345 | ha->flags.enable_target_reset = | |
4346 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
0107109e | 4347 | ha->flags.enable_led_scheme = 0; |
d4c760c2 | 4348 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; |
0107109e | 4349 | |
fd0e7e4d AV |
4350 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & |
4351 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
0107109e AV |
4352 | |
4353 | memcpy(ha->fw_seriallink_options24, nv->seriallink_options, | |
4354 | sizeof(ha->fw_seriallink_options24)); | |
4355 | ||
4356 | /* save HBA serial number */ | |
4357 | ha->serial0 = icb->port_name[5]; | |
4358 | ha->serial1 = icb->port_name[6]; | |
4359 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
4360 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
4361 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
0107109e | 4362 | |
bc8fb3cb AV |
4363 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); |
4364 | ||
0107109e AV |
4365 | ha->retry_count = le16_to_cpu(nv->login_retry_count); |
4366 | ||
4367 | /* Set minimum login_timeout to 4 seconds. */ | |
4368 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
4369 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
4370 | if (le16_to_cpu(nv->login_timeout) < 4) | |
4371 | nv->login_timeout = __constant_cpu_to_le16(4); | |
4372 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
c6852c4c | 4373 | icb->login_timeout = nv->login_timeout; |
0107109e | 4374 | |
00a537b8 AV |
4375 | /* Set minimum RATOV to 100 tenths of a second. */ |
4376 | ha->r_a_tov = 100; | |
0107109e AV |
4377 | |
4378 | ha->loop_reset_delay = nv->reset_delay; | |
4379 | ||
4380 | /* Link Down Timeout = 0: | |
4381 | * | |
4382 | * When Port Down timer expires we will start returning | |
4383 | * I/O's to OS with "DID_NO_CONNECT". | |
4384 | * | |
4385 | * Link Down Timeout != 0: | |
4386 | * | |
4387 | * The driver waits for the link to come up after link down | |
4388 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
4389 | */ | |
4390 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
4391 | ha->loop_down_abort_time = | |
4392 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
4393 | } else { | |
4394 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
4395 | ha->loop_down_abort_time = | |
4396 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
4397 | } | |
4398 | ||
4399 | /* Need enough time to try and get the port back. */ | |
4400 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
4401 | if (qlport_down_retry) | |
4402 | ha->port_down_retry_count = qlport_down_retry; | |
4403 | ||
4404 | /* Set login_retry_count */ | |
4405 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
4406 | if (ha->port_down_retry_count == | |
4407 | le16_to_cpu(nv->port_down_retry_count) && | |
4408 | ha->port_down_retry_count > 3) | |
4409 | ha->login_retry_count = ha->port_down_retry_count; | |
4410 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
4411 | ha->login_retry_count = ha->port_down_retry_count; | |
4412 | if (ql2xloginretrycount) | |
4413 | ha->login_retry_count = ql2xloginretrycount; | |
4414 | ||
4fdfefe5 | 4415 | /* Enable ZIO. */ |
e315cd28 | 4416 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
4417 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & |
4418 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
4419 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
4420 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
4421 | } | |
4422 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
4423 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
e315cd28 | 4424 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 4425 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d AV |
4426 | ha->zio_mode = QLA_ZIO_MODE_6; |
4427 | ||
7c3df132 | 4428 | ql_log(ql_log_info, vha, 0x006f, |
4fdfefe5 AV |
4429 | "ZIO mode %d enabled; timer delay (%d us).\n", |
4430 | ha->zio_mode, ha->zio_timer * 100); | |
4431 | ||
4432 | icb->firmware_options_2 |= cpu_to_le32( | |
4433 | (uint32_t)ha->zio_mode); | |
4434 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
e315cd28 | 4435 | vha->flags.process_response_queue = 1; |
4fdfefe5 AV |
4436 | } |
4437 | ||
4e08df3f | 4438 | if (rval) { |
7c3df132 SK |
4439 | ql_log(ql_log_warn, vha, 0x0070, |
4440 | "NVRAM configuration failed.\n"); | |
4e08df3f DM |
4441 | } |
4442 | return (rval); | |
0107109e AV |
4443 | } |
4444 | ||
413975a0 | 4445 | static int |
cbc8eb67 AV |
4446 | qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, |
4447 | uint32_t faddr) | |
d1c61909 | 4448 | { |
73208dfd | 4449 | int rval = QLA_SUCCESS; |
d1c61909 | 4450 | int segments, fragment; |
d1c61909 AV |
4451 | uint32_t *dcode, dlen; |
4452 | uint32_t risc_addr; | |
4453 | uint32_t risc_size; | |
4454 | uint32_t i; | |
e315cd28 | 4455 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4456 | struct req_que *req = ha->req_q_map[0]; |
eaac30be | 4457 | |
7c3df132 | 4458 | ql_dbg(ql_dbg_init, vha, 0x008b, |
cfb0919c | 4459 | "FW: Loading firmware from flash (%x).\n", faddr); |
eaac30be | 4460 | |
d1c61909 AV |
4461 | rval = QLA_SUCCESS; |
4462 | ||
4463 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 4464 | dcode = (uint32_t *)req->ring; |
d1c61909 AV |
4465 | *srisc_addr = 0; |
4466 | ||
4467 | /* Validate firmware image by checking version. */ | |
e315cd28 | 4468 | qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); |
d1c61909 AV |
4469 | for (i = 0; i < 4; i++) |
4470 | dcode[i] = be32_to_cpu(dcode[i]); | |
4471 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
4472 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
4473 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
4474 | dcode[3] == 0)) { | |
7c3df132 SK |
4475 | ql_log(ql_log_fatal, vha, 0x008c, |
4476 | "Unable to verify the integrity of flash firmware " | |
4477 | "image.\n"); | |
4478 | ql_log(ql_log_fatal, vha, 0x008d, | |
4479 | "Firmware data: %08x %08x %08x %08x.\n", | |
4480 | dcode[0], dcode[1], dcode[2], dcode[3]); | |
d1c61909 AV |
4481 | |
4482 | return QLA_FUNCTION_FAILED; | |
4483 | } | |
4484 | ||
4485 | while (segments && rval == QLA_SUCCESS) { | |
4486 | /* Read segment's load information. */ | |
e315cd28 | 4487 | qla24xx_read_flash_data(vha, dcode, faddr, 4); |
d1c61909 AV |
4488 | |
4489 | risc_addr = be32_to_cpu(dcode[2]); | |
4490 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
4491 | risc_size = be32_to_cpu(dcode[3]); | |
4492 | ||
4493 | fragment = 0; | |
4494 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4495 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
4496 | if (dlen > risc_size) | |
4497 | dlen = risc_size; | |
4498 | ||
7c3df132 SK |
4499 | ql_dbg(ql_dbg_init, vha, 0x008e, |
4500 | "Loading risc segment@ risc addr %x " | |
4501 | "number of dwords 0x%x offset 0x%x.\n", | |
4502 | risc_addr, dlen, faddr); | |
d1c61909 | 4503 | |
e315cd28 | 4504 | qla24xx_read_flash_data(vha, dcode, faddr, dlen); |
d1c61909 AV |
4505 | for (i = 0; i < dlen; i++) |
4506 | dcode[i] = swab32(dcode[i]); | |
4507 | ||
73208dfd | 4508 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
d1c61909 AV |
4509 | dlen); |
4510 | if (rval) { | |
7c3df132 SK |
4511 | ql_log(ql_log_fatal, vha, 0x008f, |
4512 | "Failed to load segment %d of firmware.\n", | |
4513 | fragment); | |
d1c61909 AV |
4514 | break; |
4515 | } | |
4516 | ||
4517 | faddr += dlen; | |
4518 | risc_addr += dlen; | |
4519 | risc_size -= dlen; | |
4520 | fragment++; | |
4521 | } | |
4522 | ||
4523 | /* Next segment. */ | |
4524 | segments--; | |
4525 | } | |
4526 | ||
4527 | return rval; | |
4528 | } | |
4529 | ||
d1c61909 AV |
4530 | #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/" |
4531 | ||
0107109e | 4532 | int |
e315cd28 | 4533 | qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) |
5433383e AV |
4534 | { |
4535 | int rval; | |
4536 | int i, fragment; | |
4537 | uint16_t *wcode, *fwcode; | |
4538 | uint32_t risc_addr, risc_size, fwclen, wlen, *seg; | |
4539 | struct fw_blob *blob; | |
e315cd28 | 4540 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4541 | struct req_que *req = ha->req_q_map[0]; |
5433383e AV |
4542 | |
4543 | /* Load firmware blob. */ | |
e315cd28 | 4544 | blob = qla2x00_request_firmware(vha); |
5433383e | 4545 | if (!blob) { |
7c3df132 SK |
4546 | ql_log(ql_log_info, vha, 0x0083, |
4547 | "Fimware image unavailable.\n"); | |
4548 | ql_log(ql_log_info, vha, 0x0084, | |
4549 | "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); | |
5433383e AV |
4550 | return QLA_FUNCTION_FAILED; |
4551 | } | |
4552 | ||
4553 | rval = QLA_SUCCESS; | |
4554 | ||
73208dfd | 4555 | wcode = (uint16_t *)req->ring; |
5433383e AV |
4556 | *srisc_addr = 0; |
4557 | fwcode = (uint16_t *)blob->fw->data; | |
4558 | fwclen = 0; | |
4559 | ||
4560 | /* Validate firmware image by checking version. */ | |
4561 | if (blob->fw->size < 8 * sizeof(uint16_t)) { | |
7c3df132 SK |
4562 | ql_log(ql_log_fatal, vha, 0x0085, |
4563 | "Unable to verify integrity of firmware image (%Zd).\n", | |
5433383e AV |
4564 | blob->fw->size); |
4565 | goto fail_fw_integrity; | |
4566 | } | |
4567 | for (i = 0; i < 4; i++) | |
4568 | wcode[i] = be16_to_cpu(fwcode[i + 4]); | |
4569 | if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && | |
4570 | wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && | |
4571 | wcode[2] == 0 && wcode[3] == 0)) { | |
7c3df132 SK |
4572 | ql_log(ql_log_fatal, vha, 0x0086, |
4573 | "Unable to verify integrity of firmware image.\n"); | |
4574 | ql_log(ql_log_fatal, vha, 0x0087, | |
4575 | "Firmware data: %04x %04x %04x %04x.\n", | |
4576 | wcode[0], wcode[1], wcode[2], wcode[3]); | |
5433383e AV |
4577 | goto fail_fw_integrity; |
4578 | } | |
4579 | ||
4580 | seg = blob->segs; | |
4581 | while (*seg && rval == QLA_SUCCESS) { | |
4582 | risc_addr = *seg; | |
4583 | *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; | |
4584 | risc_size = be16_to_cpu(fwcode[3]); | |
4585 | ||
4586 | /* Validate firmware image size. */ | |
4587 | fwclen += risc_size * sizeof(uint16_t); | |
4588 | if (blob->fw->size < fwclen) { | |
7c3df132 | 4589 | ql_log(ql_log_fatal, vha, 0x0088, |
5433383e | 4590 | "Unable to verify integrity of firmware image " |
7c3df132 | 4591 | "(%Zd).\n", blob->fw->size); |
5433383e AV |
4592 | goto fail_fw_integrity; |
4593 | } | |
4594 | ||
4595 | fragment = 0; | |
4596 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4597 | wlen = (uint16_t)(ha->fw_transfer_size >> 1); | |
4598 | if (wlen > risc_size) | |
4599 | wlen = risc_size; | |
7c3df132 SK |
4600 | ql_dbg(ql_dbg_init, vha, 0x0089, |
4601 | "Loading risc segment@ risc addr %x number of " | |
4602 | "words 0x%x.\n", risc_addr, wlen); | |
5433383e AV |
4603 | |
4604 | for (i = 0; i < wlen; i++) | |
4605 | wcode[i] = swab16(fwcode[i]); | |
4606 | ||
73208dfd | 4607 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
5433383e AV |
4608 | wlen); |
4609 | if (rval) { | |
7c3df132 SK |
4610 | ql_log(ql_log_fatal, vha, 0x008a, |
4611 | "Failed to load segment %d of firmware.\n", | |
4612 | fragment); | |
5433383e AV |
4613 | break; |
4614 | } | |
4615 | ||
4616 | fwcode += wlen; | |
4617 | risc_addr += wlen; | |
4618 | risc_size -= wlen; | |
4619 | fragment++; | |
4620 | } | |
4621 | ||
4622 | /* Next segment. */ | |
4623 | seg++; | |
4624 | } | |
4625 | return rval; | |
4626 | ||
4627 | fail_fw_integrity: | |
4628 | return QLA_FUNCTION_FAILED; | |
4629 | } | |
4630 | ||
eaac30be AV |
4631 | static int |
4632 | qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
0107109e AV |
4633 | { |
4634 | int rval; | |
4635 | int segments, fragment; | |
4636 | uint32_t *dcode, dlen; | |
4637 | uint32_t risc_addr; | |
4638 | uint32_t risc_size; | |
4639 | uint32_t i; | |
5433383e | 4640 | struct fw_blob *blob; |
0107109e | 4641 | uint32_t *fwcode, fwclen; |
e315cd28 | 4642 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4643 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 4644 | |
5433383e | 4645 | /* Load firmware blob. */ |
e315cd28 | 4646 | blob = qla2x00_request_firmware(vha); |
5433383e | 4647 | if (!blob) { |
7c3df132 SK |
4648 | ql_log(ql_log_warn, vha, 0x0090, |
4649 | "Fimware image unavailable.\n"); | |
4650 | ql_log(ql_log_warn, vha, 0x0091, | |
4651 | "Firmware images can be retrieved from: " | |
4652 | QLA_FW_URL ".\n"); | |
d1c61909 | 4653 | |
eaac30be | 4654 | return QLA_FUNCTION_FAILED; |
0107109e AV |
4655 | } |
4656 | ||
cfb0919c CD |
4657 | ql_dbg(ql_dbg_init, vha, 0x0092, |
4658 | "FW: Loading via request-firmware.\n"); | |
eaac30be | 4659 | |
0107109e AV |
4660 | rval = QLA_SUCCESS; |
4661 | ||
4662 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 4663 | dcode = (uint32_t *)req->ring; |
0107109e | 4664 | *srisc_addr = 0; |
5433383e | 4665 | fwcode = (uint32_t *)blob->fw->data; |
0107109e AV |
4666 | fwclen = 0; |
4667 | ||
4668 | /* Validate firmware image by checking version. */ | |
5433383e | 4669 | if (blob->fw->size < 8 * sizeof(uint32_t)) { |
7c3df132 SK |
4670 | ql_log(ql_log_fatal, vha, 0x0093, |
4671 | "Unable to verify integrity of firmware image (%Zd).\n", | |
5433383e | 4672 | blob->fw->size); |
0107109e AV |
4673 | goto fail_fw_integrity; |
4674 | } | |
4675 | for (i = 0; i < 4; i++) | |
4676 | dcode[i] = be32_to_cpu(fwcode[i + 4]); | |
4677 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
4678 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
4679 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
4680 | dcode[3] == 0)) { | |
7c3df132 SK |
4681 | ql_log(ql_log_fatal, vha, 0x0094, |
4682 | "Unable to verify integrity of firmware image (%Zd).\n", | |
4683 | blob->fw->size); | |
4684 | ql_log(ql_log_fatal, vha, 0x0095, | |
4685 | "Firmware data: %08x %08x %08x %08x.\n", | |
4686 | dcode[0], dcode[1], dcode[2], dcode[3]); | |
0107109e AV |
4687 | goto fail_fw_integrity; |
4688 | } | |
4689 | ||
4690 | while (segments && rval == QLA_SUCCESS) { | |
4691 | risc_addr = be32_to_cpu(fwcode[2]); | |
4692 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
4693 | risc_size = be32_to_cpu(fwcode[3]); | |
4694 | ||
4695 | /* Validate firmware image size. */ | |
4696 | fwclen += risc_size * sizeof(uint32_t); | |
5433383e | 4697 | if (blob->fw->size < fwclen) { |
7c3df132 | 4698 | ql_log(ql_log_fatal, vha, 0x0096, |
5433383e | 4699 | "Unable to verify integrity of firmware image " |
7c3df132 | 4700 | "(%Zd).\n", blob->fw->size); |
5433383e | 4701 | |
0107109e AV |
4702 | goto fail_fw_integrity; |
4703 | } | |
4704 | ||
4705 | fragment = 0; | |
4706 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4707 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
4708 | if (dlen > risc_size) | |
4709 | dlen = risc_size; | |
4710 | ||
7c3df132 SK |
4711 | ql_dbg(ql_dbg_init, vha, 0x0097, |
4712 | "Loading risc segment@ risc addr %x " | |
4713 | "number of dwords 0x%x.\n", risc_addr, dlen); | |
0107109e AV |
4714 | |
4715 | for (i = 0; i < dlen; i++) | |
4716 | dcode[i] = swab32(fwcode[i]); | |
4717 | ||
73208dfd | 4718 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
590f98e5 | 4719 | dlen); |
0107109e | 4720 | if (rval) { |
7c3df132 SK |
4721 | ql_log(ql_log_fatal, vha, 0x0098, |
4722 | "Failed to load segment %d of firmware.\n", | |
4723 | fragment); | |
0107109e AV |
4724 | break; |
4725 | } | |
4726 | ||
4727 | fwcode += dlen; | |
4728 | risc_addr += dlen; | |
4729 | risc_size -= dlen; | |
4730 | fragment++; | |
4731 | } | |
4732 | ||
4733 | /* Next segment. */ | |
4734 | segments--; | |
4735 | } | |
0107109e AV |
4736 | return rval; |
4737 | ||
4738 | fail_fw_integrity: | |
0107109e | 4739 | return QLA_FUNCTION_FAILED; |
0107109e | 4740 | } |
18c6c127 | 4741 | |
eaac30be AV |
4742 | int |
4743 | qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4744 | { | |
4745 | int rval; | |
4746 | ||
e337d907 AV |
4747 | if (ql2xfwloadbin == 1) |
4748 | return qla81xx_load_risc(vha, srisc_addr); | |
4749 | ||
eaac30be AV |
4750 | /* |
4751 | * FW Load priority: | |
4752 | * 1) Firmware via request-firmware interface (.bin file). | |
4753 | * 2) Firmware residing in flash. | |
4754 | */ | |
4755 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4756 | if (rval == QLA_SUCCESS) | |
4757 | return rval; | |
4758 | ||
cbc8eb67 AV |
4759 | return qla24xx_load_risc_flash(vha, srisc_addr, |
4760 | vha->hw->flt_region_fw); | |
eaac30be AV |
4761 | } |
4762 | ||
4763 | int | |
4764 | qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4765 | { | |
4766 | int rval; | |
cbc8eb67 | 4767 | struct qla_hw_data *ha = vha->hw; |
eaac30be | 4768 | |
e337d907 | 4769 | if (ql2xfwloadbin == 2) |
cbc8eb67 | 4770 | goto try_blob_fw; |
e337d907 | 4771 | |
eaac30be AV |
4772 | /* |
4773 | * FW Load priority: | |
4774 | * 1) Firmware residing in flash. | |
4775 | * 2) Firmware via request-firmware interface (.bin file). | |
cbc8eb67 | 4776 | * 3) Golden-Firmware residing in flash -- limited operation. |
eaac30be | 4777 | */ |
cbc8eb67 | 4778 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); |
eaac30be AV |
4779 | if (rval == QLA_SUCCESS) |
4780 | return rval; | |
4781 | ||
cbc8eb67 AV |
4782 | try_blob_fw: |
4783 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4784 | if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) | |
4785 | return rval; | |
4786 | ||
7c3df132 SK |
4787 | ql_log(ql_log_info, vha, 0x0099, |
4788 | "Attempting to fallback to golden firmware.\n"); | |
cbc8eb67 AV |
4789 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); |
4790 | if (rval != QLA_SUCCESS) | |
4791 | return rval; | |
4792 | ||
7c3df132 | 4793 | ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); |
cbc8eb67 | 4794 | ha->flags.running_gold_fw = 1; |
cbc8eb67 | 4795 | return rval; |
eaac30be AV |
4796 | } |
4797 | ||
18c6c127 | 4798 | void |
e315cd28 | 4799 | qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) |
18c6c127 AV |
4800 | { |
4801 | int ret, retries; | |
e315cd28 | 4802 | struct qla_hw_data *ha = vha->hw; |
18c6c127 | 4803 | |
85880801 AV |
4804 | if (ha->flags.pci_channel_io_perm_failure) |
4805 | return; | |
e428924c | 4806 | if (!IS_FWI2_CAPABLE(ha)) |
18c6c127 | 4807 | return; |
75edf81d AV |
4808 | if (!ha->fw_major_version) |
4809 | return; | |
18c6c127 | 4810 | |
e315cd28 | 4811 | ret = qla2x00_stop_firmware(vha); |
7c7f1f29 | 4812 | for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && |
b469a7cb | 4813 | ret != QLA_INVALID_COMMAND && retries ; retries--) { |
e315cd28 AC |
4814 | ha->isp_ops->reset_chip(vha); |
4815 | if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) | |
18c6c127 | 4816 | continue; |
e315cd28 | 4817 | if (qla2x00_setup_chip(vha) != QLA_SUCCESS) |
18c6c127 | 4818 | continue; |
7c3df132 SK |
4819 | ql_log(ql_log_info, vha, 0x8015, |
4820 | "Attempting retry of stop-firmware command.\n"); | |
e315cd28 | 4821 | ret = qla2x00_stop_firmware(vha); |
18c6c127 AV |
4822 | } |
4823 | } | |
2c3dfe3f SJ |
4824 | |
4825 | int | |
e315cd28 | 4826 | qla24xx_configure_vhba(scsi_qla_host_t *vha) |
2c3dfe3f SJ |
4827 | { |
4828 | int rval = QLA_SUCCESS; | |
0b91d116 | 4829 | int rval2; |
2c3dfe3f | 4830 | uint16_t mb[MAILBOX_REGISTER_COUNT]; |
e315cd28 AC |
4831 | struct qla_hw_data *ha = vha->hw; |
4832 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
67c2e93a AC |
4833 | struct req_que *req; |
4834 | struct rsp_que *rsp; | |
2c3dfe3f | 4835 | |
e315cd28 | 4836 | if (!vha->vp_idx) |
2c3dfe3f SJ |
4837 | return -EINVAL; |
4838 | ||
e315cd28 | 4839 | rval = qla2x00_fw_ready(base_vha); |
7163ea81 | 4840 | if (ha->flags.cpu_affinity_enabled) |
67c2e93a AC |
4841 | req = ha->req_q_map[0]; |
4842 | else | |
4843 | req = vha->req; | |
4844 | rsp = req->rsp; | |
4845 | ||
2c3dfe3f | 4846 | if (rval == QLA_SUCCESS) { |
e315cd28 | 4847 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
73208dfd | 4848 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
2c3dfe3f SJ |
4849 | } |
4850 | ||
e315cd28 | 4851 | vha->flags.management_server_logged_in = 0; |
2c3dfe3f SJ |
4852 | |
4853 | /* Login to SNS first */ | |
0b91d116 CD |
4854 | rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, |
4855 | BIT_1); | |
4856 | if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { | |
4857 | if (rval2 == QLA_MEMORY_ALLOC_FAILED) | |
4858 | ql_dbg(ql_dbg_init, vha, 0x0120, | |
4859 | "Failed SNS login: loop_id=%x, rval2=%d\n", | |
4860 | NPH_SNS, rval2); | |
4861 | else | |
4862 | ql_dbg(ql_dbg_init, vha, 0x0103, | |
4863 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " | |
4864 | "mb[2]=%x mb[6]=%x mb[7]=%x.\n", | |
4865 | NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); | |
2c3dfe3f SJ |
4866 | return (QLA_FUNCTION_FAILED); |
4867 | } | |
4868 | ||
e315cd28 AC |
4869 | atomic_set(&vha->loop_down_timer, 0); |
4870 | atomic_set(&vha->loop_state, LOOP_UP); | |
4871 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
4872 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
4873 | rval = qla2x00_loop_resync(base_vha); | |
2c3dfe3f SJ |
4874 | |
4875 | return rval; | |
4876 | } | |
4d4df193 HK |
4877 | |
4878 | /* 84XX Support **************************************************************/ | |
4879 | ||
4880 | static LIST_HEAD(qla_cs84xx_list); | |
4881 | static DEFINE_MUTEX(qla_cs84xx_mutex); | |
4882 | ||
4883 | static struct qla_chip_state_84xx * | |
e315cd28 | 4884 | qla84xx_get_chip(struct scsi_qla_host *vha) |
4d4df193 HK |
4885 | { |
4886 | struct qla_chip_state_84xx *cs84xx; | |
e315cd28 | 4887 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4888 | |
4889 | mutex_lock(&qla_cs84xx_mutex); | |
4890 | ||
4891 | /* Find any shared 84xx chip. */ | |
4892 | list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { | |
4893 | if (cs84xx->bus == ha->pdev->bus) { | |
4894 | kref_get(&cs84xx->kref); | |
4895 | goto done; | |
4896 | } | |
4897 | } | |
4898 | ||
4899 | cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); | |
4900 | if (!cs84xx) | |
4901 | goto done; | |
4902 | ||
4903 | kref_init(&cs84xx->kref); | |
4904 | spin_lock_init(&cs84xx->access_lock); | |
4905 | mutex_init(&cs84xx->fw_update_mutex); | |
4906 | cs84xx->bus = ha->pdev->bus; | |
4907 | ||
4908 | list_add_tail(&cs84xx->list, &qla_cs84xx_list); | |
4909 | done: | |
4910 | mutex_unlock(&qla_cs84xx_mutex); | |
4911 | return cs84xx; | |
4912 | } | |
4913 | ||
4914 | static void | |
4915 | __qla84xx_chip_release(struct kref *kref) | |
4916 | { | |
4917 | struct qla_chip_state_84xx *cs84xx = | |
4918 | container_of(kref, struct qla_chip_state_84xx, kref); | |
4919 | ||
4920 | mutex_lock(&qla_cs84xx_mutex); | |
4921 | list_del(&cs84xx->list); | |
4922 | mutex_unlock(&qla_cs84xx_mutex); | |
4923 | kfree(cs84xx); | |
4924 | } | |
4925 | ||
4926 | void | |
e315cd28 | 4927 | qla84xx_put_chip(struct scsi_qla_host *vha) |
4d4df193 | 4928 | { |
e315cd28 | 4929 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4930 | if (ha->cs84xx) |
4931 | kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); | |
4932 | } | |
4933 | ||
4934 | static int | |
e315cd28 | 4935 | qla84xx_init_chip(scsi_qla_host_t *vha) |
4d4df193 HK |
4936 | { |
4937 | int rval; | |
4938 | uint16_t status[2]; | |
e315cd28 | 4939 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4940 | |
4941 | mutex_lock(&ha->cs84xx->fw_update_mutex); | |
4942 | ||
e315cd28 | 4943 | rval = qla84xx_verify_chip(vha, status); |
4d4df193 HK |
4944 | |
4945 | mutex_unlock(&ha->cs84xx->fw_update_mutex); | |
4946 | ||
4947 | return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: | |
4948 | QLA_SUCCESS; | |
4949 | } | |
3a03eb79 AV |
4950 | |
4951 | /* 81XX Support **************************************************************/ | |
4952 | ||
4953 | int | |
4954 | qla81xx_nvram_config(scsi_qla_host_t *vha) | |
4955 | { | |
4956 | int rval; | |
4957 | struct init_cb_81xx *icb; | |
4958 | struct nvram_81xx *nv; | |
4959 | uint32_t *dptr; | |
4960 | uint8_t *dptr1, *dptr2; | |
4961 | uint32_t chksum; | |
4962 | uint16_t cnt; | |
4963 | struct qla_hw_data *ha = vha->hw; | |
4964 | ||
4965 | rval = QLA_SUCCESS; | |
4966 | icb = (struct init_cb_81xx *)ha->init_cb; | |
4967 | nv = ha->nvram; | |
4968 | ||
4969 | /* Determine NVRAM starting address. */ | |
4970 | ha->nvram_size = sizeof(struct nvram_81xx); | |
3a03eb79 | 4971 | ha->vpd_size = FA_NVRAM_VPD_SIZE; |
3a03eb79 AV |
4972 | |
4973 | /* Get VPD data into cache */ | |
4974 | ha->vpd = ha->nvram + VPD_OFFSET; | |
3d79038f AV |
4975 | ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, |
4976 | ha->vpd_size); | |
3a03eb79 AV |
4977 | |
4978 | /* Get NVRAM data into cache and calculate checksum. */ | |
3d79038f | 4979 | ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, |
3a03eb79 | 4980 | ha->nvram_size); |
3d79038f | 4981 | dptr = (uint32_t *)nv; |
3a03eb79 AV |
4982 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) |
4983 | chksum += le32_to_cpu(*dptr++); | |
4984 | ||
7c3df132 SK |
4985 | ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, |
4986 | "Contents of NVRAM:\n"); | |
4987 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, | |
4988 | (uint8_t *)nv, ha->nvram_size); | |
3a03eb79 AV |
4989 | |
4990 | /* Bad NVRAM data, set defaults parameters. */ | |
4991 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
4992 | || nv->id[3] != ' ' || | |
4993 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
4994 | /* Reset NVRAM data. */ | |
7c3df132 | 4995 | ql_log(ql_log_info, vha, 0x0073, |
9e336520 | 4996 | "Inconsistent NVRAM detected: checksum=0x%x id=%c " |
7c3df132 | 4997 | "version=0x%x.\n", chksum, nv->id[0], |
3a03eb79 | 4998 | le16_to_cpu(nv->nvram_version)); |
7c3df132 SK |
4999 | ql_log(ql_log_info, vha, 0x0074, |
5000 | "Falling back to functioning (yet invalid -- WWPN) " | |
5001 | "defaults.\n"); | |
3a03eb79 AV |
5002 | |
5003 | /* | |
5004 | * Set default initialization control block. | |
5005 | */ | |
5006 | memset(nv, 0, ha->nvram_size); | |
5007 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
5008 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
5009 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
5010 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
5011 | nv->exchange_count = __constant_cpu_to_le16(0); | |
5012 | nv->port_name[0] = 0x21; | |
e5b68a61 | 5013 | nv->port_name[1] = 0x00 + ha->port_no; |
3a03eb79 AV |
5014 | nv->port_name[2] = 0x00; |
5015 | nv->port_name[3] = 0xe0; | |
5016 | nv->port_name[4] = 0x8b; | |
5017 | nv->port_name[5] = 0x1c; | |
5018 | nv->port_name[6] = 0x55; | |
5019 | nv->port_name[7] = 0x86; | |
5020 | nv->node_name[0] = 0x20; | |
5021 | nv->node_name[1] = 0x00; | |
5022 | nv->node_name[2] = 0x00; | |
5023 | nv->node_name[3] = 0xe0; | |
5024 | nv->node_name[4] = 0x8b; | |
5025 | nv->node_name[5] = 0x1c; | |
5026 | nv->node_name[6] = 0x55; | |
5027 | nv->node_name[7] = 0x86; | |
5028 | nv->login_retry_count = __constant_cpu_to_le16(8); | |
5029 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
5030 | nv->login_timeout = __constant_cpu_to_le16(0); | |
5031 | nv->firmware_options_1 = | |
5032 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
5033 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
5034 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
5035 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
5036 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
5037 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
5038 | nv->reset_delay = 5; | |
5039 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
5040 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
6246b8a1 | 5041 | nv->link_down_timeout = __constant_cpu_to_le16(180); |
eeebcc92 | 5042 | nv->enode_mac[0] = 0x00; |
6246b8a1 GM |
5043 | nv->enode_mac[1] = 0xC0; |
5044 | nv->enode_mac[2] = 0xDD; | |
3a03eb79 AV |
5045 | nv->enode_mac[3] = 0x04; |
5046 | nv->enode_mac[4] = 0x05; | |
e5b68a61 | 5047 | nv->enode_mac[5] = 0x06 + ha->port_no; |
3a03eb79 AV |
5048 | |
5049 | rval = 1; | |
5050 | } | |
5051 | ||
5052 | /* Reset Initialization control block */ | |
773120e4 | 5053 | memset(icb, 0, ha->init_cb_size); |
3a03eb79 AV |
5054 | |
5055 | /* Copy 1st segment. */ | |
5056 | dptr1 = (uint8_t *)icb; | |
5057 | dptr2 = (uint8_t *)&nv->version; | |
5058 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
5059 | while (cnt--) | |
5060 | *dptr1++ = *dptr2++; | |
5061 | ||
5062 | icb->login_retry_count = nv->login_retry_count; | |
5063 | ||
5064 | /* Copy 2nd segment. */ | |
5065 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
5066 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
5067 | cnt = (uint8_t *)&icb->reserved_5 - | |
5068 | (uint8_t *)&icb->interrupt_delay_timer; | |
5069 | while (cnt--) | |
5070 | *dptr1++ = *dptr2++; | |
5071 | ||
5072 | memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); | |
5073 | /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ | |
5074 | if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { | |
69e5f1ea AV |
5075 | icb->enode_mac[0] = 0x00; |
5076 | icb->enode_mac[1] = 0xC0; | |
5077 | icb->enode_mac[2] = 0xDD; | |
3a03eb79 AV |
5078 | icb->enode_mac[3] = 0x04; |
5079 | icb->enode_mac[4] = 0x05; | |
e5b68a61 | 5080 | icb->enode_mac[5] = 0x06 + ha->port_no; |
3a03eb79 AV |
5081 | } |
5082 | ||
b64b0e8f AV |
5083 | /* Use extended-initialization control block. */ |
5084 | memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); | |
5085 | ||
3a03eb79 AV |
5086 | /* |
5087 | * Setup driver NVRAM options. | |
5088 | */ | |
5089 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), | |
a9083016 | 5090 | "QLE8XXX"); |
3a03eb79 AV |
5091 | |
5092 | /* Use alternate WWN? */ | |
5093 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
5094 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
5095 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
5096 | } | |
5097 | ||
5098 | /* Prepare nodename */ | |
5099 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { | |
5100 | /* | |
5101 | * Firmware will apply the following mask if the nodename was | |
5102 | * not provided. | |
5103 | */ | |
5104 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
5105 | icb->node_name[0] &= 0xF0; | |
5106 | } | |
5107 | ||
5108 | /* Set host adapter parameters. */ | |
5109 | ha->flags.disable_risc_code_load = 0; | |
5110 | ha->flags.enable_lip_reset = 0; | |
5111 | ha->flags.enable_lip_full_login = | |
5112 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
5113 | ha->flags.enable_target_reset = | |
5114 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
5115 | ha->flags.enable_led_scheme = 0; | |
5116 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; | |
5117 | ||
5118 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & | |
5119 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
5120 | ||
5121 | /* save HBA serial number */ | |
5122 | ha->serial0 = icb->port_name[5]; | |
5123 | ha->serial1 = icb->port_name[6]; | |
5124 | ha->serial2 = icb->port_name[7]; | |
5125 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); | |
5126 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
5127 | ||
5128 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
5129 | ||
5130 | ha->retry_count = le16_to_cpu(nv->login_retry_count); | |
5131 | ||
5132 | /* Set minimum login_timeout to 4 seconds. */ | |
5133 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
5134 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
5135 | if (le16_to_cpu(nv->login_timeout) < 4) | |
5136 | nv->login_timeout = __constant_cpu_to_le16(4); | |
5137 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
5138 | icb->login_timeout = nv->login_timeout; | |
5139 | ||
5140 | /* Set minimum RATOV to 100 tenths of a second. */ | |
5141 | ha->r_a_tov = 100; | |
5142 | ||
5143 | ha->loop_reset_delay = nv->reset_delay; | |
5144 | ||
5145 | /* Link Down Timeout = 0: | |
5146 | * | |
5147 | * When Port Down timer expires we will start returning | |
5148 | * I/O's to OS with "DID_NO_CONNECT". | |
5149 | * | |
5150 | * Link Down Timeout != 0: | |
5151 | * | |
5152 | * The driver waits for the link to come up after link down | |
5153 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
5154 | */ | |
5155 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
5156 | ha->loop_down_abort_time = | |
5157 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
5158 | } else { | |
5159 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
5160 | ha->loop_down_abort_time = | |
5161 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
5162 | } | |
5163 | ||
5164 | /* Need enough time to try and get the port back. */ | |
5165 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
5166 | if (qlport_down_retry) | |
5167 | ha->port_down_retry_count = qlport_down_retry; | |
5168 | ||
5169 | /* Set login_retry_count */ | |
5170 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
5171 | if (ha->port_down_retry_count == | |
5172 | le16_to_cpu(nv->port_down_retry_count) && | |
5173 | ha->port_down_retry_count > 3) | |
5174 | ha->login_retry_count = ha->port_down_retry_count; | |
5175 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
5176 | ha->login_retry_count = ha->port_down_retry_count; | |
5177 | if (ql2xloginretrycount) | |
5178 | ha->login_retry_count = ql2xloginretrycount; | |
5179 | ||
6246b8a1 GM |
5180 | /* if not running MSI-X we need handshaking on interrupts */ |
5181 | if (!vha->hw->flags.msix_enabled && IS_QLA83XX(ha)) | |
5182 | icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_22); | |
5183 | ||
3a03eb79 AV |
5184 | /* Enable ZIO. */ |
5185 | if (!vha->flags.init_done) { | |
5186 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & | |
5187 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
5188 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
5189 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
5190 | } | |
5191 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
5192 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
5193 | vha->flags.process_response_queue = 0; | |
5194 | if (ha->zio_mode != QLA_ZIO_DISABLED) { | |
5195 | ha->zio_mode = QLA_ZIO_MODE_6; | |
5196 | ||
7c3df132 | 5197 | ql_log(ql_log_info, vha, 0x0075, |
3a03eb79 | 5198 | "ZIO mode %d enabled; timer delay (%d us).\n", |
7c3df132 SK |
5199 | ha->zio_mode, |
5200 | ha->zio_timer * 100); | |
3a03eb79 AV |
5201 | |
5202 | icb->firmware_options_2 |= cpu_to_le32( | |
5203 | (uint32_t)ha->zio_mode); | |
5204 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
5205 | vha->flags.process_response_queue = 1; | |
5206 | } | |
5207 | ||
5208 | if (rval) { | |
7c3df132 SK |
5209 | ql_log(ql_log_warn, vha, 0x0076, |
5210 | "NVRAM configuration failed.\n"); | |
3a03eb79 AV |
5211 | } |
5212 | return (rval); | |
5213 | } | |
5214 | ||
a9083016 GM |
5215 | int |
5216 | qla82xx_restart_isp(scsi_qla_host_t *vha) | |
5217 | { | |
5218 | int status, rval; | |
5219 | uint32_t wait_time; | |
5220 | struct qla_hw_data *ha = vha->hw; | |
5221 | struct req_que *req = ha->req_q_map[0]; | |
5222 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
5223 | struct scsi_qla_host *vp; | |
feafb7b1 | 5224 | unsigned long flags; |
a9083016 GM |
5225 | |
5226 | status = qla2x00_init_rings(vha); | |
5227 | if (!status) { | |
5228 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
5229 | ha->flags.chip_reset_done = 1; | |
5230 | ||
5231 | status = qla2x00_fw_ready(vha); | |
5232 | if (!status) { | |
7c3df132 SK |
5233 | ql_log(ql_log_info, vha, 0x803c, |
5234 | "Start configure loop, status =%d.\n", status); | |
a9083016 GM |
5235 | |
5236 | /* Issue a marker after FW becomes ready. */ | |
5237 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); | |
5238 | ||
5239 | vha->flags.online = 1; | |
5240 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ | |
5241 | wait_time = 256; | |
5242 | do { | |
5243 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
5244 | qla2x00_configure_loop(vha); | |
5245 | wait_time--; | |
5246 | } while (!atomic_read(&vha->loop_down_timer) && | |
5247 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) && | |
5248 | wait_time && | |
5249 | (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))); | |
5250 | } | |
5251 | ||
5252 | /* if no cable then assume it's good */ | |
5253 | if ((vha->device_flags & DFLG_NO_CABLE)) | |
5254 | status = 0; | |
5255 | ||
cfb0919c | 5256 | ql_log(ql_log_info, vha, 0x8000, |
7c3df132 | 5257 | "Configure loop done, status = 0x%x.\n", status); |
a9083016 GM |
5258 | } |
5259 | ||
5260 | if (!status) { | |
5261 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
5262 | ||
5263 | if (!atomic_read(&vha->loop_down_timer)) { | |
5264 | /* | |
5265 | * Issue marker command only when we are going | |
5266 | * to start the I/O . | |
5267 | */ | |
5268 | vha->marker_needed = 1; | |
5269 | } | |
5270 | ||
5271 | vha->flags.online = 1; | |
5272 | ||
5273 | ha->isp_ops->enable_intrs(ha); | |
5274 | ||
5275 | ha->isp_abort_cnt = 0; | |
5276 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
5277 | ||
53296788 | 5278 | /* Update the firmware version */ |
3173167f | 5279 | status = qla82xx_check_md_needed(vha); |
53296788 | 5280 | |
a9083016 GM |
5281 | if (ha->fce) { |
5282 | ha->flags.fce_enabled = 1; | |
5283 | memset(ha->fce, 0, | |
5284 | fce_calc_size(ha->fce_bufs)); | |
5285 | rval = qla2x00_enable_fce_trace(vha, | |
5286 | ha->fce_dma, ha->fce_bufs, ha->fce_mb, | |
5287 | &ha->fce_bufs); | |
5288 | if (rval) { | |
cfb0919c | 5289 | ql_log(ql_log_warn, vha, 0x8001, |
7c3df132 SK |
5290 | "Unable to reinitialize FCE (%d).\n", |
5291 | rval); | |
a9083016 GM |
5292 | ha->flags.fce_enabled = 0; |
5293 | } | |
5294 | } | |
5295 | ||
5296 | if (ha->eft) { | |
5297 | memset(ha->eft, 0, EFT_SIZE); | |
5298 | rval = qla2x00_enable_eft_trace(vha, | |
5299 | ha->eft_dma, EFT_NUM_BUFFERS); | |
5300 | if (rval) { | |
cfb0919c | 5301 | ql_log(ql_log_warn, vha, 0x8010, |
7c3df132 SK |
5302 | "Unable to reinitialize EFT (%d).\n", |
5303 | rval); | |
a9083016 GM |
5304 | } |
5305 | } | |
a9083016 GM |
5306 | } |
5307 | ||
5308 | if (!status) { | |
cfb0919c | 5309 | ql_dbg(ql_dbg_taskm, vha, 0x8011, |
7c3df132 | 5310 | "qla82xx_restart_isp succeeded.\n"); |
feafb7b1 AE |
5311 | |
5312 | spin_lock_irqsave(&ha->vport_slock, flags); | |
5313 | list_for_each_entry(vp, &ha->vp_list, list) { | |
5314 | if (vp->vp_idx) { | |
5315 | atomic_inc(&vp->vref_count); | |
5316 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
5317 | ||
a9083016 | 5318 | qla2x00_vp_abort_isp(vp); |
feafb7b1 AE |
5319 | |
5320 | spin_lock_irqsave(&ha->vport_slock, flags); | |
5321 | atomic_dec(&vp->vref_count); | |
5322 | } | |
a9083016 | 5323 | } |
feafb7b1 AE |
5324 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
5325 | ||
a9083016 | 5326 | } else { |
cfb0919c | 5327 | ql_log(ql_log_warn, vha, 0x8016, |
7c3df132 | 5328 | "qla82xx_restart_isp **** FAILED ****.\n"); |
a9083016 GM |
5329 | } |
5330 | ||
5331 | return status; | |
5332 | } | |
5333 | ||
3a03eb79 | 5334 | void |
ae97c91e | 5335 | qla81xx_update_fw_options(scsi_qla_host_t *vha) |
3a03eb79 | 5336 | { |
ae97c91e AV |
5337 | struct qla_hw_data *ha = vha->hw; |
5338 | ||
5339 | if (!ql2xetsenable) | |
5340 | return; | |
5341 | ||
5342 | /* Enable ETS Burst. */ | |
5343 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
5344 | ha->fw_options[2] |= BIT_9; | |
5345 | qla2x00_set_fw_options(vha, ha->fw_options); | |
3a03eb79 | 5346 | } |
09ff701a SR |
5347 | |
5348 | /* | |
5349 | * qla24xx_get_fcp_prio | |
5350 | * Gets the fcp cmd priority value for the logged in port. | |
5351 | * Looks for a match of the port descriptors within | |
5352 | * each of the fcp prio config entries. If a match is found, | |
5353 | * the tag (priority) value is returned. | |
5354 | * | |
5355 | * Input: | |
21090cbe | 5356 | * vha = scsi host structure pointer. |
09ff701a SR |
5357 | * fcport = port structure pointer. |
5358 | * | |
5359 | * Return: | |
6c452a45 | 5360 | * non-zero (if found) |
f28a0a96 | 5361 | * -1 (if not found) |
09ff701a SR |
5362 | * |
5363 | * Context: | |
5364 | * Kernel context | |
5365 | */ | |
f28a0a96 | 5366 | static int |
09ff701a SR |
5367 | qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) |
5368 | { | |
5369 | int i, entries; | |
5370 | uint8_t pid_match, wwn_match; | |
f28a0a96 | 5371 | int priority; |
09ff701a SR |
5372 | uint32_t pid1, pid2; |
5373 | uint64_t wwn1, wwn2; | |
5374 | struct qla_fcp_prio_entry *pri_entry; | |
5375 | struct qla_hw_data *ha = vha->hw; | |
5376 | ||
5377 | if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) | |
f28a0a96 | 5378 | return -1; |
09ff701a | 5379 | |
f28a0a96 | 5380 | priority = -1; |
09ff701a SR |
5381 | entries = ha->fcp_prio_cfg->num_entries; |
5382 | pri_entry = &ha->fcp_prio_cfg->entry[0]; | |
5383 | ||
5384 | for (i = 0; i < entries; i++) { | |
5385 | pid_match = wwn_match = 0; | |
5386 | ||
5387 | if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { | |
5388 | pri_entry++; | |
5389 | continue; | |
5390 | } | |
5391 | ||
5392 | /* check source pid for a match */ | |
5393 | if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { | |
5394 | pid1 = pri_entry->src_pid & INVALID_PORT_ID; | |
5395 | pid2 = vha->d_id.b24 & INVALID_PORT_ID; | |
5396 | if (pid1 == INVALID_PORT_ID) | |
5397 | pid_match++; | |
5398 | else if (pid1 == pid2) | |
5399 | pid_match++; | |
5400 | } | |
5401 | ||
5402 | /* check destination pid for a match */ | |
5403 | if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { | |
5404 | pid1 = pri_entry->dst_pid & INVALID_PORT_ID; | |
5405 | pid2 = fcport->d_id.b24 & INVALID_PORT_ID; | |
5406 | if (pid1 == INVALID_PORT_ID) | |
5407 | pid_match++; | |
5408 | else if (pid1 == pid2) | |
5409 | pid_match++; | |
5410 | } | |
5411 | ||
5412 | /* check source WWN for a match */ | |
5413 | if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { | |
5414 | wwn1 = wwn_to_u64(vha->port_name); | |
5415 | wwn2 = wwn_to_u64(pri_entry->src_wwpn); | |
5416 | if (wwn2 == (uint64_t)-1) | |
5417 | wwn_match++; | |
5418 | else if (wwn1 == wwn2) | |
5419 | wwn_match++; | |
5420 | } | |
5421 | ||
5422 | /* check destination WWN for a match */ | |
5423 | if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { | |
5424 | wwn1 = wwn_to_u64(fcport->port_name); | |
5425 | wwn2 = wwn_to_u64(pri_entry->dst_wwpn); | |
5426 | if (wwn2 == (uint64_t)-1) | |
5427 | wwn_match++; | |
5428 | else if (wwn1 == wwn2) | |
5429 | wwn_match++; | |
5430 | } | |
5431 | ||
5432 | if (pid_match == 2 || wwn_match == 2) { | |
5433 | /* Found a matching entry */ | |
5434 | if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) | |
5435 | priority = pri_entry->tag; | |
5436 | break; | |
5437 | } | |
5438 | ||
5439 | pri_entry++; | |
5440 | } | |
5441 | ||
5442 | return priority; | |
5443 | } | |
5444 | ||
5445 | /* | |
5446 | * qla24xx_update_fcport_fcp_prio | |
5447 | * Activates fcp priority for the logged in fc port | |
5448 | * | |
5449 | * Input: | |
21090cbe | 5450 | * vha = scsi host structure pointer. |
09ff701a SR |
5451 | * fcp = port structure pointer. |
5452 | * | |
5453 | * Return: | |
5454 | * QLA_SUCCESS or QLA_FUNCTION_FAILED | |
5455 | * | |
5456 | * Context: | |
5457 | * Kernel context. | |
5458 | */ | |
5459 | int | |
21090cbe | 5460 | qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) |
09ff701a SR |
5461 | { |
5462 | int ret; | |
f28a0a96 | 5463 | int priority; |
09ff701a SR |
5464 | uint16_t mb[5]; |
5465 | ||
21090cbe MI |
5466 | if (fcport->port_type != FCT_TARGET || |
5467 | fcport->loop_id == FC_NO_LOOP_ID) | |
09ff701a SR |
5468 | return QLA_FUNCTION_FAILED; |
5469 | ||
21090cbe | 5470 | priority = qla24xx_get_fcp_prio(vha, fcport); |
f28a0a96 AV |
5471 | if (priority < 0) |
5472 | return QLA_FUNCTION_FAILED; | |
5473 | ||
a00f6296 SK |
5474 | if (IS_QLA82XX(vha->hw)) { |
5475 | fcport->fcp_prio = priority & 0xf; | |
5476 | return QLA_SUCCESS; | |
5477 | } | |
5478 | ||
21090cbe | 5479 | ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); |
cfb0919c CD |
5480 | if (ret == QLA_SUCCESS) { |
5481 | if (fcport->fcp_prio != priority) | |
5482 | ql_dbg(ql_dbg_user, vha, 0x709e, | |
5483 | "Updated FCP_CMND priority - value=%d loop_id=%d " | |
5484 | "port_id=%02x%02x%02x.\n", priority, | |
5485 | fcport->loop_id, fcport->d_id.b.domain, | |
5486 | fcport->d_id.b.area, fcport->d_id.b.al_pa); | |
a00f6296 | 5487 | fcport->fcp_prio = priority & 0xf; |
cfb0919c | 5488 | } else |
7c3df132 | 5489 | ql_dbg(ql_dbg_user, vha, 0x704f, |
cfb0919c CD |
5490 | "Unable to update FCP_CMND priority - ret=0x%x for " |
5491 | "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, | |
5492 | fcport->d_id.b.domain, fcport->d_id.b.area, | |
5493 | fcport->d_id.b.al_pa); | |
09ff701a SR |
5494 | return ret; |
5495 | } | |
5496 | ||
5497 | /* | |
5498 | * qla24xx_update_all_fcp_prio | |
5499 | * Activates fcp priority for all the logged in ports | |
5500 | * | |
5501 | * Input: | |
5502 | * ha = adapter block pointer. | |
5503 | * | |
5504 | * Return: | |
5505 | * QLA_SUCCESS or QLA_FUNCTION_FAILED | |
5506 | * | |
5507 | * Context: | |
5508 | * Kernel context. | |
5509 | */ | |
5510 | int | |
5511 | qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) | |
5512 | { | |
5513 | int ret; | |
5514 | fc_port_t *fcport; | |
5515 | ||
5516 | ret = QLA_FUNCTION_FAILED; | |
5517 | /* We need to set priority for all logged in ports */ | |
5518 | list_for_each_entry(fcport, &vha->vp_fcports, list) | |
5519 | ret = qla24xx_update_fcport_fcp_prio(vha, fcport); | |
5520 | ||
5521 | return ret; | |
5522 | } |