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[SCSI] qla2xxx: Enhancements to support ISP83xx.
[mirror_ubuntu-bionic-kernel.git] / drivers / scsi / qla2xxx / qla_init.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
07e264b7 3 * Copyright (c) 2003-2011 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
73208dfd 8#include "qla_gbl.h"
1da177e4
LT		 9
10#include <linux/delay.h>
5a0e3ad6 11#include <linux/slab.h>
0107109e 12#include <linux/vmalloc.h>
1da177e4
LT		 13
14#include "qla_devtbl.h"
15
4e08df3f
DM		 16#ifdef CONFIG_SPARC
17#include <asm/prom.h>
4e08df3f
DM		 18#endif
19
1da177e4
LT		 20/*
21* QLogic ISP2x00 Hardware Support Function Prototypes.
22*/
1da177e4 23static int qla2x00_isp_firmware(scsi_qla_host_t *);
1da177e4 24static int qla2x00_setup_chip(scsi_qla_host_t *);
1da177e4
LT		 25static int qla2x00_init_rings(scsi_qla_host_t *);
26static int qla2x00_fw_ready(scsi_qla_host_t *);
27static int qla2x00_configure_hba(scsi_qla_host_t *);
1da177e4
LT		 28static int qla2x00_configure_loop(scsi_qla_host_t *);
29static int qla2x00_configure_local_loop(scsi_qla_host_t *);
1da177e4
LT		 30static int qla2x00_configure_fabric(scsi_qla_host_t *);
31static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
32static int qla2x00_device_resync(scsi_qla_host_t *);
33static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
34 uint16_t *);
1da177e4
LT		 35
36static int qla2x00_restart_isp(scsi_qla_host_t *);
1da177e4 37
4d4df193
HK		 38static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
39static int qla84xx_init_chip(scsi_qla_host_t *);
73208dfd 40static int qla25xx_init_queues(struct qla_hw_data *);
4d4df193 41
ac280b67
AV		 42/* SRB Extensions ---------------------------------------------------------- */
43
44static void
45qla2x00_ctx_sp_timeout(unsigned long __data)
46{
47 srb_t *sp = (srb_t *)__data;
48 struct srb_ctx *ctx;
4916392b 49 struct srb_iocb *iocb;
ac280b67
AV		 50 fc_port_t *fcport = sp->fcport;
51 struct qla_hw_data *ha = fcport->vha->hw;
52 struct req_que *req;
53 unsigned long flags;
54
55 spin_lock_irqsave(&ha->hardware_lock, flags);
56 req = ha->req_q_map[0];
57 req->outstanding_cmds[sp->handle] = NULL;
58 ctx = sp->ctx;
4916392b
MI		 59 iocb = ctx->u.iocb_cmd;
60 iocb->timeout(sp);
4916392b 61 iocb->free(sp);
6ac52608 62 spin_unlock_irqrestore(&ha->hardware_lock, flags);
ac280b67
AV		 63}
64
3dbe756a 65static void
ac280b67
AV		 66qla2x00_ctx_sp_free(srb_t *sp)
67{
68 struct srb_ctx *ctx = sp->ctx;
4916392b 69 struct srb_iocb *iocb = ctx->u.iocb_cmd;
feafb7b1 70 struct scsi_qla_host *vha = sp->fcport->vha;
ac280b67 71
4d97cc53 72 del_timer(&iocb->timer);
4916392b 73 kfree(iocb);
ac280b67
AV		 74 kfree(ctx);
75 mempool_free(sp, sp->fcport->vha->hw->srb_mempool);
feafb7b1
AE		 76
77 QLA_VHA_MARK_NOT_BUSY(vha);
ac280b67
AV		 78}
79
80inline srb_t *
81qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size,
82 unsigned long tmo)
83{
feafb7b1 84 srb_t *sp = NULL;
ac280b67
AV		 85 struct qla_hw_data *ha = vha->hw;
86 struct srb_ctx *ctx;
4916392b 87 struct srb_iocb *iocb;
feafb7b1
AE		 88 uint8_t bail;
89
90 QLA_VHA_MARK_BUSY(vha, bail);
91 if (bail)
92 return NULL;
ac280b67
AV		 93
94 sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL);
95 if (!sp)
96 goto done;
97 ctx = kzalloc(size, GFP_KERNEL);
98 if (!ctx) {
99 mempool_free(sp, ha->srb_mempool);
4916392b
MI		 100 sp = NULL;
101 goto done;
102 }
103 iocb = kzalloc(sizeof(struct srb_iocb), GFP_KERNEL);
104 if (!iocb) {
105 mempool_free(sp, ha->srb_mempool);
106 sp = NULL;
107 kfree(ctx);
ac280b67
AV		 108 goto done;
109 }
110
111 memset(sp, 0, sizeof(*sp));
112 sp->fcport = fcport;
113 sp->ctx = ctx;
5780790e 114 ctx->iocbs = 1;
4916392b
MI		 115 ctx->u.iocb_cmd = iocb;
116 iocb->free = qla2x00_ctx_sp_free;
ac280b67 117
4916392b 118 init_timer(&iocb->timer);
ac280b67
AV		 119 if (!tmo)
120 goto done;
4916392b
MI		 121 iocb->timer.expires = jiffies + tmo * HZ;
122 iocb->timer.data = (unsigned long)sp;
123 iocb->timer.function = qla2x00_ctx_sp_timeout;
124 add_timer(&iocb->timer);
ac280b67 125done:
feafb7b1
AE		 126 if (!sp)
127 QLA_VHA_MARK_NOT_BUSY(vha);
ac280b67
AV		 128 return sp;
129}
130
131/* Asynchronous Login/Logout Routines -------------------------------------- */
132
5b91490e
AV		 133static inline unsigned long
134qla2x00_get_async_timeout(struct scsi_qla_host *vha)
135{
136 unsigned long tmo;
137 struct qla_hw_data *ha = vha->hw;
138
139 /* Firmware should use switch negotiated r_a_tov for timeout. */
140 tmo = ha->r_a_tov / 10 * 2;
141 if (!IS_FWI2_CAPABLE(ha)) {
142 /*
143 * Except for earlier ISPs where the timeout is seeded from the
144 * initialization control block.
145 */
146 tmo = ha->login_timeout;
147 }
148 return tmo;
149}
ac280b67
AV		 150
151static void
3822263e 152qla2x00_async_iocb_timeout(srb_t *sp)
ac280b67
AV		 153{
154 fc_port_t *fcport = sp->fcport;
4916392b 155 struct srb_ctx *ctx = sp->ctx;
ac280b67 156
7c3df132 157 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
cfb0919c
CD		 158 "Async-%s timeout - hdl=%x portid=%02x%02x%02x.\n",
159 ctx->name, sp->handle, fcport->d_id.b.domain, fcport->d_id.b.area,
7c3df132 160 fcport->d_id.b.al_pa);
ac280b67 161
5ff1d584 162 fcport->flags &= ~FCF_ASYNC_SENT;
6ac52608
AV		 163 if (ctx->type == SRB_LOGIN_CMD) {
164 struct srb_iocb *lio = ctx->u.iocb_cmd;
ac280b67 165 qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
6ac52608
AV		 166 /* Retry as needed. */
167 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
168 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
169 QLA_LOGIO_LOGIN_RETRIED : 0;
170 qla2x00_post_async_login_done_work(fcport->vha, fcport,
171 lio->u.logio.data);
172 }
ac280b67
AV		 173}
174
99b0bec7
AV		 175static void
176qla2x00_async_login_ctx_done(srb_t *sp)
177{
4916392b
MI		 178 struct srb_ctx *ctx = sp->ctx;
179 struct srb_iocb *lio = ctx->u.iocb_cmd;
99b0bec7
AV		 180
181 qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
4916392b
MI		 182 lio->u.logio.data);
183 lio->free(sp);
99b0bec7
AV		 184}
185
ac280b67
AV		 186int
187qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
188 uint16_t *data)
189{
ac280b67 190 srb_t *sp;
4916392b
MI		 191 struct srb_ctx *ctx;
192 struct srb_iocb *lio;
ac280b67
AV		 193 int rval;
194
195 rval = QLA_FUNCTION_FAILED;
4916392b 196 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
5b91490e 197 qla2x00_get_async_timeout(vha) + 2);
ac280b67
AV		 198 if (!sp)
199 goto done;
200
4916392b
MI		 201 ctx = sp->ctx;
202 ctx->type = SRB_LOGIN_CMD;
203 ctx->name = "login";
204 lio = ctx->u.iocb_cmd;
3822263e 205 lio->timeout = qla2x00_async_iocb_timeout;
4916392b
MI		 206 lio->done = qla2x00_async_login_ctx_done;
207 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
ac280b67 208 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
4916392b 209 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
ac280b67
AV		 210 rval = qla2x00_start_sp(sp);
211 if (rval != QLA_SUCCESS)
212 goto done_free_sp;
213
7c3df132 214 ql_dbg(ql_dbg_disc, vha, 0x2072,
cfb0919c
CD		 215 "Async-login - hdl=%x, loopid=%x portid=%02x%02x%02x "
216 "retries=%d.\n", sp->handle, fcport->loop_id,
217 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
218 fcport->login_retry);
ac280b67
AV		 219 return rval;
220
221done_free_sp:
4916392b 222 lio->free(sp);
ac280b67
AV		 223done:
224 return rval;
225}
226
99b0bec7
AV		 227static void
228qla2x00_async_logout_ctx_done(srb_t *sp)
229{
4916392b
MI		 230 struct srb_ctx *ctx = sp->ctx;
231 struct srb_iocb *lio = ctx->u.iocb_cmd;
99b0bec7
AV		 232
233 qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
4916392b
MI		 234 lio->u.logio.data);
235 lio->free(sp);
99b0bec7
AV		 236}
237
ac280b67
AV		 238int
239qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
240{
ac280b67 241 srb_t *sp;
4916392b
MI		 242 struct srb_ctx *ctx;
243 struct srb_iocb *lio;
ac280b67
AV		 244 int rval;
245
246 rval = QLA_FUNCTION_FAILED;
4916392b 247 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
5b91490e 248 qla2x00_get_async_timeout(vha) + 2);
ac280b67
AV		 249 if (!sp)
250 goto done;
251
4916392b
MI		 252 ctx = sp->ctx;
253 ctx->type = SRB_LOGOUT_CMD;
254 ctx->name = "logout";
255 lio = ctx->u.iocb_cmd;
3822263e 256 lio->timeout = qla2x00_async_iocb_timeout;
4916392b 257 lio->done = qla2x00_async_logout_ctx_done;
ac280b67
AV		 258 rval = qla2x00_start_sp(sp);
259 if (rval != QLA_SUCCESS)
260 goto done_free_sp;
261
7c3df132 262 ql_dbg(ql_dbg_disc, vha, 0x2070,
cfb0919c
CD		 263 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
264 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
265 fcport->d_id.b.area, fcport->d_id.b.al_pa);
ac280b67
AV		 266 return rval;
267
268done_free_sp:
4916392b 269 lio->free(sp);
ac280b67
AV		 270done:
271 return rval;
272}
273
5ff1d584
AV		 274static void
275qla2x00_async_adisc_ctx_done(srb_t *sp)
276{
4916392b
MI		 277 struct srb_ctx *ctx = sp->ctx;
278 struct srb_iocb *lio = ctx->u.iocb_cmd;
5ff1d584
AV		 279
280 qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
4916392b
MI		 281 lio->u.logio.data);
282 lio->free(sp);
5ff1d584
AV		 283}
284
285int
286qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
287 uint16_t *data)
288{
5ff1d584 289 srb_t *sp;
4916392b
MI		 290 struct srb_ctx *ctx;
291 struct srb_iocb *lio;
5ff1d584
AV		 292 int rval;
293
294 rval = QLA_FUNCTION_FAILED;
4916392b 295 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
5b91490e 296 qla2x00_get_async_timeout(vha) + 2);
5ff1d584
AV		 297 if (!sp)
298 goto done;
299
4916392b
MI		 300 ctx = sp->ctx;
301 ctx->type = SRB_ADISC_CMD;
302 ctx->name = "adisc";
303 lio = ctx->u.iocb_cmd;
3822263e 304 lio->timeout = qla2x00_async_iocb_timeout;
4916392b 305 lio->done = qla2x00_async_adisc_ctx_done;
5ff1d584 306 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
4916392b 307 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
5ff1d584
AV		 308 rval = qla2x00_start_sp(sp);
309 if (rval != QLA_SUCCESS)
310 goto done_free_sp;
311
7c3df132 312 ql_dbg(ql_dbg_disc, vha, 0x206f,
cfb0919c
CD		 313 "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n",
314 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
315 fcport->d_id.b.area, fcport->d_id.b.al_pa);
5ff1d584
AV		 316 return rval;
317
318done_free_sp:
4916392b 319 lio->free(sp);
5ff1d584
AV		 320done:
321 return rval;
322}
323
3822263e
MI		 324static void
325qla2x00_async_tm_cmd_ctx_done(srb_t *sp)
326{
327 struct srb_ctx *ctx = sp->ctx;
328 struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd;
329
330 qla2x00_async_tm_cmd_done(sp->fcport->vha, sp->fcport, iocb);
331 iocb->free(sp);
332}
333
334int
335qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
336 uint32_t tag)
337{
338 struct scsi_qla_host *vha = fcport->vha;
3822263e
MI		 339 srb_t *sp;
340 struct srb_ctx *ctx;
341 struct srb_iocb *tcf;
342 int rval;
343
344 rval = QLA_FUNCTION_FAILED;
345 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
5b91490e 346 qla2x00_get_async_timeout(vha) + 2);
3822263e
MI		 347 if (!sp)
348 goto done;
349
350 ctx = sp->ctx;
351 ctx->type = SRB_TM_CMD;
352 ctx->name = "tmf";
353 tcf = ctx->u.iocb_cmd;
354 tcf->u.tmf.flags = flags;
355 tcf->u.tmf.lun = lun;
356 tcf->u.tmf.data = tag;
357 tcf->timeout = qla2x00_async_iocb_timeout;
358 tcf->done = qla2x00_async_tm_cmd_ctx_done;
359
360 rval = qla2x00_start_sp(sp);
361 if (rval != QLA_SUCCESS)
362 goto done_free_sp;
363
7c3df132 364 ql_dbg(ql_dbg_taskm, vha, 0x802f,
cfb0919c
CD		 365 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
366 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
367 fcport->d_id.b.area, fcport->d_id.b.al_pa);
3822263e
MI		 368 return rval;
369
370done_free_sp:
371 tcf->free(sp);
372done:
373 return rval;
374}
375
4916392b 376void
ac280b67
AV		 377qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
378 uint16_t *data)
379{
380 int rval;
ac280b67
AV		 381
382 switch (data[0]) {
383 case MBS_COMMAND_COMPLETE:
a4f92a32
AV		 384 /*
385 * Driver must validate login state - If PRLI not complete,
386 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
387 * requests.
388 */
389 rval = qla2x00_get_port_database(vha, fcport, 0);
390 if (rval != QLA_SUCCESS) {
391 qla2x00_post_async_logout_work(vha, fcport, NULL);
392 qla2x00_post_async_login_work(vha, fcport, NULL);
393 break;
394 }
99b0bec7 395 if (fcport->flags & FCF_FCP2_DEVICE) {
5ff1d584
AV		 396 qla2x00_post_async_adisc_work(vha, fcport, data);
397 break;
99b0bec7
AV		 398 }
399 qla2x00_update_fcport(vha, fcport);
ac280b67
AV		 400 break;
401 case MBS_COMMAND_ERROR:
5ff1d584 402 fcport->flags &= ~FCF_ASYNC_SENT;
ac280b67
AV		 403 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
404 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
405 else
80d79440 406 qla2x00_mark_device_lost(vha, fcport, 1, 0);
ac280b67
AV		 407 break;
408 case MBS_PORT_ID_USED:
409 fcport->loop_id = data[1];
6ac52608 410 qla2x00_post_async_logout_work(vha, fcport, NULL);
ac280b67
AV		 411 qla2x00_post_async_login_work(vha, fcport, NULL);
412 break;
413 case MBS_LOOP_ID_USED:
414 fcport->loop_id++;
415 rval = qla2x00_find_new_loop_id(vha, fcport);
416 if (rval != QLA_SUCCESS) {
5ff1d584 417 fcport->flags &= ~FCF_ASYNC_SENT;
80d79440 418 qla2x00_mark_device_lost(vha, fcport, 1, 0);
ac280b67
AV		 419 break;
420 }
421 qla2x00_post_async_login_work(vha, fcport, NULL);
422 break;
423 }
4916392b 424 return;
ac280b67
AV		 425}
426
4916392b 427void
ac280b67
AV		 428qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
429 uint16_t *data)
430{
431 qla2x00_mark_device_lost(vha, fcport, 1, 0);
4916392b 432 return;
ac280b67
AV		 433}
434
4916392b 435void
5ff1d584
AV		 436qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
437 uint16_t *data)
438{
439 if (data[0] == MBS_COMMAND_COMPLETE) {
440 qla2x00_update_fcport(vha, fcport);
441
4916392b 442 return;
5ff1d584
AV		 443 }
444
445 /* Retry login. */
446 fcport->flags &= ~FCF_ASYNC_SENT;
447 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
448 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
449 else
80d79440 450 qla2x00_mark_device_lost(vha, fcport, 1, 0);
5ff1d584 451
4916392b 452 return;
5ff1d584
AV		 453}
454
3822263e
MI		 455void
456qla2x00_async_tm_cmd_done(struct scsi_qla_host *vha, fc_port_t *fcport,
457 struct srb_iocb *iocb)
458{
459 int rval;
460 uint32_t flags;
461 uint16_t lun;
462
463 flags = iocb->u.tmf.flags;
464 lun = (uint16_t)iocb->u.tmf.lun;
465
466 /* Issue Marker IOCB */
d94d10e7
GM		 467 rval = qla2x00_marker(vha, vha->hw->req_q_map[0],
468 vha->hw->rsp_q_map[0], fcport->loop_id, lun,
3822263e
MI		 469 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
470
471 if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) {
7c3df132
SK		 472 ql_dbg(ql_dbg_taskm, vha, 0x8030,
473 "TM IOCB failed (%x).\n", rval);
3822263e
MI		 474 }
475
476 return;
477}
478
1da177e4
LT		 479/****************************************************************************/
480/* QLogic ISP2x00 Hardware Support Functions. */
481/****************************************************************************/
482
483/*
484* qla2x00_initialize_adapter
485* Initialize board.
486*
487* Input:
488* ha = adapter block pointer.
489*
490* Returns:
491* 0 = success
492*/
493int
e315cd28 494qla2x00_initialize_adapter(scsi_qla_host_t *vha)
1da177e4
LT		 495{
496 int rval;
e315cd28 497 struct qla_hw_data *ha = vha->hw;
73208dfd 498 struct req_que *req = ha->req_q_map[0];
2533cf67 499
1da177e4 500 /* Clear adapter flags. */
e315cd28 501 vha->flags.online = 0;
2533cf67 502 ha->flags.chip_reset_done = 0;
e315cd28 503 vha->flags.reset_active = 0;
85880801
AV		 504 ha->flags.pci_channel_io_perm_failure = 0;
505 ha->flags.eeh_busy = 0;
794a5691 506 ha->flags.thermal_supported = 1;
e315cd28
AC		 507 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
508 atomic_set(&vha->loop_state, LOOP_DOWN);
509 vha->device_flags = DFLG_NO_CABLE;
510 vha->dpc_flags = 0;
511 vha->flags.management_server_logged_in = 0;
512 vha->marker_needed = 0;
1da177e4
LT		 513 ha->isp_abort_cnt = 0;
514 ha->beacon_blink_led = 0;
515
73208dfd
AC		 516 set_bit(0, ha->req_qid_map);
517 set_bit(0, ha->rsp_qid_map);
518
cfb0919c 519 ql_dbg(ql_dbg_init, vha, 0x0040,
7c3df132 520 "Configuring PCI space...\n");
e315cd28 521 rval = ha->isp_ops->pci_config(vha);
1da177e4 522 if (rval) {
7c3df132
SK		 523 ql_log(ql_log_warn, vha, 0x0044,
524 "Unable to configure PCI space.\n");
1da177e4
LT		 525 return (rval);
526 }
527
e315cd28 528 ha->isp_ops->reset_chip(vha);
1da177e4 529
e315cd28 530 rval = qla2xxx_get_flash_info(vha);
c00d8994 531 if (rval) {
7c3df132
SK		 532 ql_log(ql_log_fatal, vha, 0x004f,
533 "Unable to validate FLASH data.\n");
c00d8994
AV		 534 return (rval);
535 }
536
73208dfd 537 ha->isp_ops->get_flash_version(vha, req->ring);
cfb0919c 538 ql_dbg(ql_dbg_init, vha, 0x0061,
7c3df132 539 "Configure NVRAM parameters...\n");
0107109e 540
e315cd28 541 ha->isp_ops->nvram_config(vha);
1da177e4 542
d4c760c2
AV		 543 if (ha->flags.disable_serdes) {
544 /* Mask HBA via NVRAM settings? */
7c3df132
SK		 545 ql_log(ql_log_info, vha, 0x0077,
546 "Masking HBA WWPN "
d4c760c2 547 "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
e315cd28
AC		 548 vha->port_name[0], vha->port_name[1],
549 vha->port_name[2], vha->port_name[3],
550 vha->port_name[4], vha->port_name[5],
551 vha->port_name[6], vha->port_name[7]);
d4c760c2
AV		 552 return QLA_FUNCTION_FAILED;
553 }
554
cfb0919c 555 ql_dbg(ql_dbg_init, vha, 0x0078,
7c3df132 556 "Verifying loaded RISC code...\n");
1da177e4 557
e315cd28
AC		 558 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
559 rval = ha->isp_ops->chip_diag(vha);
d19044c3
AV		 560 if (rval)
561 return (rval);
e315cd28 562 rval = qla2x00_setup_chip(vha);
d19044c3
AV		 563 if (rval)
564 return (rval);
1da177e4 565 }
a9083016 566
4d4df193 567 if (IS_QLA84XX(ha)) {
e315cd28 568 ha->cs84xx = qla84xx_get_chip(vha);
4d4df193 569 if (!ha->cs84xx) {
7c3df132 570 ql_log(ql_log_warn, vha, 0x00d0,
4d4df193
HK		 571 "Unable to configure ISP84XX.\n");
572 return QLA_FUNCTION_FAILED;
573 }
574 }
e315cd28 575 rval = qla2x00_init_rings(vha);
2533cf67 576 ha->flags.chip_reset_done = 1;
1da177e4 577
9a069e19 578 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
6c452a45 579 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
9a069e19
GM		 580 rval = qla84xx_init_chip(vha);
581 if (rval != QLA_SUCCESS) {
7c3df132
SK		 582 ql_log(ql_log_warn, vha, 0x00d4,
583 "Unable to initialize ISP84XX.\n");
9a069e19
GM		 584 qla84xx_put_chip(vha);
585 }
586 }
587
2f0f3f4f
MI		 588 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
589 qla24xx_read_fcp_prio_cfg(vha);
09ff701a 590
1da177e4
LT		 591 return (rval);
592}
593
594/**
abbd8870 595 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
1da177e4
LT		 596 * @ha: HA context
597 *
598 * Returns 0 on success.
599 */
abbd8870 600int
e315cd28 601qla2100_pci_config(scsi_qla_host_t *vha)
1da177e4 602{
a157b101 603 uint16_t w;
abbd8870 604 unsigned long flags;
e315cd28 605 struct qla_hw_data *ha = vha->hw;
3d71644c 606 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 607
1da177e4 608 pci_set_master(ha->pdev);
af6177d8 609 pci_try_set_mwi(ha->pdev);
1da177e4 610
1da177e4 611 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 612 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
abbd8870
AV		 613 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
614
737faece 615 pci_disable_rom(ha->pdev);
1da177e4
LT		 616
617 /* Get PCI bus information. */
618 spin_lock_irqsave(&ha->hardware_lock, flags);
3d71644c 619 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
1da177e4
LT		 620 spin_unlock_irqrestore(&ha->hardware_lock, flags);
621
abbd8870
AV		 622 return QLA_SUCCESS;
623}
1da177e4 624
abbd8870
AV		 625/**
626 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
627 * @ha: HA context
628 *
629 * Returns 0 on success.
630 */
631int
e315cd28 632qla2300_pci_config(scsi_qla_host_t *vha)
abbd8870 633{
a157b101 634 uint16_t w;
abbd8870
AV		 635 unsigned long flags = 0;
636 uint32_t cnt;
e315cd28 637 struct qla_hw_data *ha = vha->hw;
3d71644c 638 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 639
abbd8870 640 pci_set_master(ha->pdev);
af6177d8 641 pci_try_set_mwi(ha->pdev);
1da177e4 642
abbd8870 643 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 644 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
1da177e4 645
abbd8870
AV		 646 if (IS_QLA2322(ha) || IS_QLA6322(ha))
647 w &= ~PCI_COMMAND_INTX_DISABLE;
a157b101 648 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
1da177e4 649
abbd8870
AV		 650 /*
651 * If this is a 2300 card and not 2312, reset the
652 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
653 * the 2310 also reports itself as a 2300 so we need to get the
654 * fb revision level -- a 6 indicates it really is a 2300 and
655 * not a 2310.
656 */
657 if (IS_QLA2300(ha)) {
658 spin_lock_irqsave(&ha->hardware_lock, flags);
1da177e4 659
abbd8870 660 /* Pause RISC. */
3d71644c 661 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
abbd8870 662 for (cnt = 0; cnt < 30000; cnt++) {
3d71644c 663 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
abbd8870 664 break;
1da177e4 665
abbd8870
AV		 666 udelay(10);
667 }
1da177e4 668
abbd8870 669 /* Select FPM registers. */
3d71644c
AV		 670 WRT_REG_WORD(&reg->ctrl_status, 0x20);
671 RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 672
673 /* Get the fb rev level */
3d71644c 674 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
abbd8870
AV		 675
676 if (ha->fb_rev == FPM_2300)
a157b101 677 pci_clear_mwi(ha->pdev);
abbd8870
AV		 678
679 /* Deselect FPM registers. */
3d71644c
AV		 680 WRT_REG_WORD(&reg->ctrl_status, 0x0);
681 RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 682
683 /* Release RISC module. */
3d71644c 684 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
abbd8870 685 for (cnt = 0; cnt < 30000; cnt++) {
3d71644c 686 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
abbd8870
AV		 687 break;
688
689 udelay(10);
1da177e4 690 }
1da177e4 691
abbd8870
AV		 692 spin_unlock_irqrestore(&ha->hardware_lock, flags);
693 }
1da177e4 694
abbd8870
AV		 695 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
696
737faece 697 pci_disable_rom(ha->pdev);
1da177e4 698
abbd8870
AV		 699 /* Get PCI bus information. */
700 spin_lock_irqsave(&ha->hardware_lock, flags);
3d71644c 701 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 702 spin_unlock_irqrestore(&ha->hardware_lock, flags);
703
704 return QLA_SUCCESS;
1da177e4
LT		 705}
706
0107109e
AV		 707/**
708 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
709 * @ha: HA context
710 *
711 * Returns 0 on success.
712 */
713int
e315cd28 714qla24xx_pci_config(scsi_qla_host_t *vha)
0107109e 715{
a157b101 716 uint16_t w;
0107109e 717 unsigned long flags = 0;
e315cd28 718 struct qla_hw_data *ha = vha->hw;
0107109e 719 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
0107109e
AV		 720
721 pci_set_master(ha->pdev);
af6177d8 722 pci_try_set_mwi(ha->pdev);
0107109e
AV		 723
724 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 725 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
0107109e
AV		 726 w &= ~PCI_COMMAND_INTX_DISABLE;
727 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
728
729 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
730
731 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
f85ec187
AV		 732 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
733 pcix_set_mmrbc(ha->pdev, 2048);
0107109e
AV		 734
735 /* PCIe -- adjust Maximum Read Request Size (2048). */
f85ec187
AV		 736 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
737 pcie_set_readrq(ha->pdev, 2048);
0107109e 738
737faece 739 pci_disable_rom(ha->pdev);
0107109e 740
44c10138 741 ha->chip_revision = ha->pdev->revision;
a8488abe 742
0107109e
AV		 743 /* Get PCI bus information. */
744 spin_lock_irqsave(&ha->hardware_lock, flags);
745 ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
746 spin_unlock_irqrestore(&ha->hardware_lock, flags);
747
748 return QLA_SUCCESS;
749}
750
c3a2f0df
AV		 751/**
752 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
753 * @ha: HA context
754 *
755 * Returns 0 on success.
756 */
757int
e315cd28 758qla25xx_pci_config(scsi_qla_host_t *vha)
c3a2f0df
AV		 759{
760 uint16_t w;
e315cd28 761 struct qla_hw_data *ha = vha->hw;
c3a2f0df
AV		 762
763 pci_set_master(ha->pdev);
764 pci_try_set_mwi(ha->pdev);
765
766 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
767 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
768 w &= ~PCI_COMMAND_INTX_DISABLE;
769 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
770
771 /* PCIe -- adjust Maximum Read Request Size (2048). */
772 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
773 pcie_set_readrq(ha->pdev, 2048);
774
737faece 775 pci_disable_rom(ha->pdev);
c3a2f0df
AV		 776
777 ha->chip_revision = ha->pdev->revision;
778
779 return QLA_SUCCESS;
780}
781
1da177e4
LT		 782/**
783 * qla2x00_isp_firmware() - Choose firmware image.
784 * @ha: HA context
785 *
786 * Returns 0 on success.
787 */
788static int
e315cd28 789qla2x00_isp_firmware(scsi_qla_host_t *vha)
1da177e4
LT		 790{
791 int rval;
42e421b1
AV		 792 uint16_t loop_id, topo, sw_cap;
793 uint8_t domain, area, al_pa;
e315cd28 794 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 795
796 /* Assume loading risc code */
fa2a1ce5 797 rval = QLA_FUNCTION_FAILED;
1da177e4
LT		 798
799 if (ha->flags.disable_risc_code_load) {
7c3df132 800 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
1da177e4
LT		 801
802 /* Verify checksum of loaded RISC code. */
e315cd28 803 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
42e421b1
AV		 804 if (rval == QLA_SUCCESS) {
805 /* And, verify we are not in ROM code. */
e315cd28 806 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
42e421b1
AV		 807 &area, &domain, &topo, &sw_cap);
808 }
1da177e4
LT		 809 }
810
7c3df132
SK		 811 if (rval)
812 ql_dbg(ql_dbg_init, vha, 0x007a,
813 "**** Load RISC code ****.\n");
1da177e4
LT		 814
815 return (rval);
816}
817
818/**
819 * qla2x00_reset_chip() - Reset ISP chip.
820 * @ha: HA context
821 *
822 * Returns 0 on success.
823 */
abbd8870 824void
e315cd28 825qla2x00_reset_chip(scsi_qla_host_t *vha)
1da177e4
LT		 826{
827 unsigned long flags = 0;
e315cd28 828 struct qla_hw_data *ha = vha->hw;
3d71644c 829 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 830 uint32_t cnt;
1da177e4
LT		 831 uint16_t cmd;
832
85880801
AV		 833 if (unlikely(pci_channel_offline(ha->pdev)))
834 return;
835
fd34f556 836 ha->isp_ops->disable_intrs(ha);
1da177e4
LT		 837
838 spin_lock_irqsave(&ha->hardware_lock, flags);
839
840 /* Turn off master enable */
841 cmd = 0;
842 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
843 cmd &= ~PCI_COMMAND_MASTER;
844 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
845
846 if (!IS_QLA2100(ha)) {
847 /* Pause RISC. */
848 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
849 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
850 for (cnt = 0; cnt < 30000; cnt++) {
851 if ((RD_REG_WORD(&reg->hccr) &
852 HCCR_RISC_PAUSE) != 0)
853 break;
854 udelay(100);
855 }
856 } else {
857 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
858 udelay(10);
859 }
860
861 /* Select FPM registers. */
862 WRT_REG_WORD(&reg->ctrl_status, 0x20);
863 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
864
865 /* FPM Soft Reset. */
866 WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
867 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
868
869 /* Toggle Fpm Reset. */
870 if (!IS_QLA2200(ha)) {
871 WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
872 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
873 }
874
875 /* Select frame buffer registers. */
876 WRT_REG_WORD(&reg->ctrl_status, 0x10);
877 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
878
879 /* Reset frame buffer FIFOs. */
880 if (IS_QLA2200(ha)) {
881 WRT_FB_CMD_REG(ha, reg, 0xa000);
882 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
883 } else {
884 WRT_FB_CMD_REG(ha, reg, 0x00fc);
885
886 /* Read back fb_cmd until zero or 3 seconds max */
887 for (cnt = 0; cnt < 3000; cnt++) {
888 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
889 break;
890 udelay(100);
891 }
892 }
893
894 /* Select RISC module registers. */
895 WRT_REG_WORD(&reg->ctrl_status, 0);
896 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
897
898 /* Reset RISC processor. */
899 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
900 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
901
902 /* Release RISC processor. */
903 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
904 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
905 }
906
907 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
908 WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
909
910 /* Reset ISP chip. */
911 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
912
913 /* Wait for RISC to recover from reset. */
914 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
915 /*
916 * It is necessary to for a delay here since the card doesn't
917 * respond to PCI reads during a reset. On some architectures
918 * this will result in an MCA.
919 */
920 udelay(20);
921 for (cnt = 30000; cnt; cnt--) {
922 if ((RD_REG_WORD(&reg->ctrl_status) &
923 CSR_ISP_SOFT_RESET) == 0)
924 break;
925 udelay(100);
926 }
927 } else
928 udelay(10);
929
930 /* Reset RISC processor. */
931 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
932
933 WRT_REG_WORD(&reg->semaphore, 0);
934
935 /* Release RISC processor. */
936 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
937 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
938
939 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
940 for (cnt = 0; cnt < 30000; cnt++) {
ffb39f03 941 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
1da177e4 942 break;
1da177e4
LT		 943
944 udelay(100);
945 }
946 } else
947 udelay(100);
948
949 /* Turn on master enable */
950 cmd |= PCI_COMMAND_MASTER;
951 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
952
953 /* Disable RISC pause on FPM parity error. */
954 if (!IS_QLA2100(ha)) {
955 WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
956 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
957 }
958
959 spin_unlock_irqrestore(&ha->hardware_lock, flags);
960}
961
b1d46989
MI		 962/**
963 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
964 *
965 * Returns 0 on success.
966 */
967int
968qla81xx_reset_mpi(scsi_qla_host_t *vha)
969{
970 uint16_t mb[4] = {0x1010, 0, 1, 0};
971
6246b8a1
GM		 972 if (!IS_QLA81XX(vha->hw))
973 return QLA_SUCCESS;
974
b1d46989
MI		 975 return qla81xx_write_mpi_register(vha, mb);
976}
977
0107109e 978/**
88c26663 979 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
0107109e
AV		 980 * @ha: HA context
981 *
982 * Returns 0 on success.
983 */
88c26663 984static inline void
e315cd28 985qla24xx_reset_risc(scsi_qla_host_t *vha)
0107109e
AV		 986{
987 unsigned long flags = 0;
e315cd28 988 struct qla_hw_data *ha = vha->hw;
0107109e
AV		 989 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
990 uint32_t cnt, d2;
335a1cc9 991 uint16_t wd;
b1d46989 992 static int abts_cnt; /* ISP abort retry counts */
0107109e 993
0107109e
AV		 994 spin_lock_irqsave(&ha->hardware_lock, flags);
995
996 /* Reset RISC. */
997 WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
998 for (cnt = 0; cnt < 30000; cnt++) {
999 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
1000 break;
1001
1002 udelay(10);
1003 }
1004
1005 WRT_REG_DWORD(&reg->ctrl_status,
1006 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
335a1cc9 1007 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
88c26663 1008
335a1cc9 1009 udelay(100);
88c26663 1010 /* Wait for firmware to complete NVRAM accesses. */
88c26663
AV		 1011 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1012 for (cnt = 10000 ; cnt && d2; cnt--) {
1013 udelay(5);
1014 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1015 barrier();
1016 }
1017
335a1cc9 1018 /* Wait for soft-reset to complete. */
0107109e
AV		 1019 d2 = RD_REG_DWORD(&reg->ctrl_status);
1020 for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
1021 udelay(5);
1022 d2 = RD_REG_DWORD(&reg->ctrl_status);
1023 barrier();
1024 }
1025
b1d46989
MI		 1026 /* If required, do an MPI FW reset now */
1027 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
1028 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
1029 if (++abts_cnt < 5) {
1030 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1031 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
1032 } else {
1033 /*
1034 * We exhausted the ISP abort retries. We have to
1035 * set the board offline.
1036 */
1037 abts_cnt = 0;
1038 vha->flags.online = 0;
1039 }
1040 }
1041 }
1042
0107109e
AV		 1043 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
1044 RD_REG_DWORD(&reg->hccr);
1045
1046 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
1047 RD_REG_DWORD(&reg->hccr);
1048
1049 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
1050 RD_REG_DWORD(&reg->hccr);
1051
1052 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1053 for (cnt = 6000000 ; cnt && d2; cnt--) {
1054 udelay(5);
1055 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1056 barrier();
1057 }
1058
1059 spin_unlock_irqrestore(&ha->hardware_lock, flags);
124f85e6
AV		 1060
1061 if (IS_NOPOLLING_TYPE(ha))
1062 ha->isp_ops->enable_intrs(ha);
0107109e
AV		 1063}
1064
88c26663
AV		 1065/**
1066 * qla24xx_reset_chip() - Reset ISP24xx chip.
1067 * @ha: HA context
1068 *
1069 * Returns 0 on success.
1070 */
1071void
e315cd28 1072qla24xx_reset_chip(scsi_qla_host_t *vha)
88c26663 1073{
e315cd28 1074 struct qla_hw_data *ha = vha->hw;
85880801
AV		 1075
1076 if (pci_channel_offline(ha->pdev) &&
1077 ha->flags.pci_channel_io_perm_failure) {
1078 return;
1079 }
1080
fd34f556 1081 ha->isp_ops->disable_intrs(ha);
88c26663
AV		 1082
1083 /* Perform RISC reset. */
e315cd28 1084 qla24xx_reset_risc(vha);
88c26663
AV		 1085}
1086
1da177e4
LT		 1087/**
1088 * qla2x00_chip_diag() - Test chip for proper operation.
1089 * @ha: HA context
1090 *
1091 * Returns 0 on success.
1092 */
abbd8870 1093int
e315cd28 1094qla2x00_chip_diag(scsi_qla_host_t *vha)
1da177e4
LT		 1095{
1096 int rval;
e315cd28 1097 struct qla_hw_data *ha = vha->hw;
3d71644c 1098 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4
LT		 1099 unsigned long flags = 0;
1100 uint16_t data;
1101 uint32_t cnt;
1102 uint16_t mb[5];
73208dfd 1103 struct req_que *req = ha->req_q_map[0];
1da177e4
LT		 1104
1105 /* Assume a failed state */
1106 rval = QLA_FUNCTION_FAILED;
1107
7c3df132
SK		 1108 ql_dbg(ql_dbg_init, vha, 0x007b,
1109 "Testing device at %lx.\n", (u_long)&reg->flash_address);
1da177e4
LT		 1110
1111 spin_lock_irqsave(&ha->hardware_lock, flags);
1112
1113 /* Reset ISP chip. */
1114 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
1115
1116 /*
1117 * We need to have a delay here since the card will not respond while
1118 * in reset causing an MCA on some architectures.
1119 */
1120 udelay(20);
1121 data = qla2x00_debounce_register(&reg->ctrl_status);
1122 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
1123 udelay(5);
1124 data = RD_REG_WORD(&reg->ctrl_status);
1125 barrier();
1126 }
1127
1128 if (!cnt)
1129 goto chip_diag_failed;
1130
7c3df132
SK		 1131 ql_dbg(ql_dbg_init, vha, 0x007c,
1132 "Reset register cleared by chip reset.\n");
1da177e4
LT		 1133
1134 /* Reset RISC processor. */
1135 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
1136 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
1137
1138 /* Workaround for QLA2312 PCI parity error */
1139 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
1140 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
1141 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
1142 udelay(5);
1143 data = RD_MAILBOX_REG(ha, reg, 0);
fa2a1ce5 1144 barrier();
1da177e4
LT		 1145 }
1146 } else
1147 udelay(10);
1148
1149 if (!cnt)
1150 goto chip_diag_failed;
1151
1152 /* Check product ID of chip */
7c3df132 1153 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n");
1da177e4
LT		 1154
1155 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
1156 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
1157 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
1158 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
1159 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
1160 mb[3] != PROD_ID_3) {
7c3df132
SK		 1161 ql_log(ql_log_warn, vha, 0x0062,
1162 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
1163 mb[1], mb[2], mb[3]);
1da177e4
LT		 1164
1165 goto chip_diag_failed;
1166 }
1167 ha->product_id[0] = mb[1];
1168 ha->product_id[1] = mb[2];
1169 ha->product_id[2] = mb[3];
1170 ha->product_id[3] = mb[4];
1171
1172 /* Adjust fw RISC transfer size */
73208dfd 1173 if (req->length > 1024)
1da177e4
LT		 1174 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
1175 else
1176 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
73208dfd 1177 req->length;
1da177e4
LT		 1178
1179 if (IS_QLA2200(ha) &&
1180 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
1181 /* Limit firmware transfer size with a 2200A */
7c3df132 1182 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
1da177e4 1183
ea5b6382 1184 ha->device_type |= DT_ISP2200A;
1da177e4
LT		 1185 ha->fw_transfer_size = 128;
1186 }
1187
1188 /* Wrap Incoming Mailboxes Test. */
1189 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1190
7c3df132 1191 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
e315cd28 1192 rval = qla2x00_mbx_reg_test(vha);
7c3df132
SK		 1193 if (rval)
1194 ql_log(ql_log_warn, vha, 0x0080,
1195 "Failed mailbox send register test.\n");
1196 else
1da177e4
LT		 1197 /* Flag a successful rval */
1198 rval = QLA_SUCCESS;
1da177e4
LT		 1199 spin_lock_irqsave(&ha->hardware_lock, flags);
1200
1201chip_diag_failed:
1202 if (rval)
7c3df132
SK		 1203 ql_log(ql_log_info, vha, 0x0081,
1204 "Chip diagnostics **** FAILED ****.\n");
1da177e4
LT		 1205
1206 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1207
1208 return (rval);
1209}
1210
0107109e
AV		 1211/**
1212 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
1213 * @ha: HA context
1214 *
1215 * Returns 0 on success.
1216 */
1217int
e315cd28 1218qla24xx_chip_diag(scsi_qla_host_t *vha)
0107109e
AV		 1219{
1220 int rval;
e315cd28 1221 struct qla_hw_data *ha = vha->hw;
73208dfd 1222 struct req_que *req = ha->req_q_map[0];
0107109e 1223
a9083016
GM		 1224 if (IS_QLA82XX(ha))
1225 return QLA_SUCCESS;
1226
73208dfd 1227 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
0107109e 1228
e315cd28 1229 rval = qla2x00_mbx_reg_test(vha);
0107109e 1230 if (rval) {
7c3df132
SK		 1231 ql_log(ql_log_warn, vha, 0x0082,
1232 "Failed mailbox send register test.\n");
0107109e
AV		 1233 } else {
1234 /* Flag a successful rval */
1235 rval = QLA_SUCCESS;
1236 }
1237
1238 return rval;
1239}
1240
a7a167bf 1241void
e315cd28 1242qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
0107109e 1243{
a7a167bf
AV		 1244 int rval;
1245 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
73208dfd 1246 eft_size, fce_size, mq_size;
df613b96
AV		 1247 dma_addr_t tc_dma;
1248 void *tc;
e315cd28 1249 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 1250 struct req_que *req = ha->req_q_map[0];
1251 struct rsp_que *rsp = ha->rsp_q_map[0];
a7a167bf
AV		 1252
1253 if (ha->fw_dump) {
7c3df132
SK		 1254 ql_dbg(ql_dbg_init, vha, 0x00bd,
1255 "Firmware dump already allocated.\n");
a7a167bf
AV		 1256 return;
1257 }
d4e3e04d 1258
0107109e 1259 ha->fw_dumped = 0;
73208dfd 1260 fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
d4e3e04d 1261 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
a7a167bf 1262 fixed_size = sizeof(struct qla2100_fw_dump);
d4e3e04d 1263 } else if (IS_QLA23XX(ha)) {
a7a167bf
AV		 1264 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
1265 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
1266 sizeof(uint16_t);
e428924c 1267 } else if (IS_FWI2_CAPABLE(ha)) {
6246b8a1
GM		 1268 if (IS_QLA83XX(ha))
1269 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
1270 else if (IS_QLA81XX(ha))
3a03eb79
AV		 1271 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
1272 else if (IS_QLA25XX(ha))
1273 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
1274 else
1275 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
a7a167bf
AV		 1276 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
1277 sizeof(uint32_t);
050c9bb1 1278 if (ha->mqenable) {
6246b8a1
GM		 1279 if (!IS_QLA83XX(ha))
1280 mq_size = sizeof(struct qla2xxx_mq_chain);
050c9bb1
GM		 1281 /*
1282 * Allocate maximum buffer size for all queues.
1283 * Resizing must be done at end-of-dump processing.
1284 */
1285 mq_size += ha->max_req_queues *
1286 (req->length * sizeof(request_t));
1287 mq_size += ha->max_rsp_queues *
1288 (rsp->length * sizeof(response_t));
1289 }
df613b96 1290 /* Allocate memory for Fibre Channel Event Buffer. */
6246b8a1 1291 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha))
436a7b11 1292 goto try_eft;
df613b96
AV		 1293
1294 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
1295 GFP_KERNEL);
1296 if (!tc) {
7c3df132
SK		 1297 ql_log(ql_log_warn, vha, 0x00be,
1298 "Unable to allocate (%d KB) for FCE.\n",
1299 FCE_SIZE / 1024);
17d98630 1300 goto try_eft;
df613b96
AV		 1301 }
1302
1303 memset(tc, 0, FCE_SIZE);
e315cd28 1304 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
df613b96
AV		 1305 ha->fce_mb, &ha->fce_bufs);
1306 if (rval) {
7c3df132
SK		 1307 ql_log(ql_log_warn, vha, 0x00bf,
1308 "Unable to initialize FCE (%d).\n", rval);
df613b96
AV		 1309 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
1310 tc_dma);
1311 ha->flags.fce_enabled = 0;
17d98630 1312 goto try_eft;
df613b96 1313 }
cfb0919c 1314 ql_dbg(ql_dbg_init, vha, 0x00c0,
7c3df132 1315 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
df613b96 1316
7d9dade3 1317 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
df613b96
AV		 1318 ha->flags.fce_enabled = 1;
1319 ha->fce_dma = tc_dma;
1320 ha->fce = tc;
436a7b11
AV		 1321try_eft:
1322 /* Allocate memory for Extended Trace Buffer. */
1323 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
1324 GFP_KERNEL);
1325 if (!tc) {
7c3df132
SK		 1326 ql_log(ql_log_warn, vha, 0x00c1,
1327 "Unable to allocate (%d KB) for EFT.\n",
1328 EFT_SIZE / 1024);
436a7b11
AV		 1329 goto cont_alloc;
1330 }
1331
1332 memset(tc, 0, EFT_SIZE);
e315cd28 1333 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
436a7b11 1334 if (rval) {
7c3df132
SK		 1335 ql_log(ql_log_warn, vha, 0x00c2,
1336 "Unable to initialize EFT (%d).\n", rval);
436a7b11
AV		 1337 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
1338 tc_dma);
1339 goto cont_alloc;
1340 }
cfb0919c 1341 ql_dbg(ql_dbg_init, vha, 0x00c3,
7c3df132 1342 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
436a7b11
AV		 1343
1344 eft_size = EFT_SIZE;
1345 ha->eft_dma = tc_dma;
1346 ha->eft = tc;
d4e3e04d 1347 }
a7a167bf 1348cont_alloc:
73208dfd
AC		 1349 req_q_size = req->length * sizeof(request_t);
1350 rsp_q_size = rsp->length * sizeof(response_t);
a7a167bf
AV		 1351
1352 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
2afa19a9 1353 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
bb99de67
AV		 1354 ha->chain_offset = dump_size;
1355 dump_size += mq_size + fce_size;
d4e3e04d
AV		 1356
1357 ha->fw_dump = vmalloc(dump_size);
a7a167bf 1358 if (!ha->fw_dump) {
7c3df132
SK		 1359 ql_log(ql_log_warn, vha, 0x00c4,
1360 "Unable to allocate (%d KB) for firmware dump.\n",
1361 dump_size / 1024);
a7a167bf 1362
e30d1756
MI		 1363 if (ha->fce) {
1364 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
1365 ha->fce_dma);
1366 ha->fce = NULL;
1367 ha->fce_dma = 0;
1368 }
1369
a7a167bf
AV		 1370 if (ha->eft) {
1371 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
1372 ha->eft_dma);
1373 ha->eft = NULL;
1374 ha->eft_dma = 0;
1375 }
1376 return;
1377 }
cfb0919c 1378 ql_dbg(ql_dbg_init, vha, 0x00c5,
7c3df132 1379 "Allocated (%d KB) for firmware dump.\n", dump_size / 1024);
a7a167bf
AV		 1380
1381 ha->fw_dump_len = dump_size;
1382 ha->fw_dump->signature[0] = 'Q';
1383 ha->fw_dump->signature[1] = 'L';
1384 ha->fw_dump->signature[2] = 'G';
1385 ha->fw_dump->signature[3] = 'C';
1386 ha->fw_dump->version = __constant_htonl(1);
1387
1388 ha->fw_dump->fixed_size = htonl(fixed_size);
1389 ha->fw_dump->mem_size = htonl(mem_size);
1390 ha->fw_dump->req_q_size = htonl(req_q_size);
1391 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
1392
1393 ha->fw_dump->eft_size = htonl(eft_size);
1394 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
1395 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
1396
1397 ha->fw_dump->header_size =
1398 htonl(offsetof(struct qla2xxx_fw_dump, isp));
0107109e
AV		 1399}
1400
18e7555a
AV		 1401static int
1402qla81xx_mpi_sync(scsi_qla_host_t *vha)
1403{
1404#define MPS_MASK 0xe0
1405 int rval;
1406 uint16_t dc;
1407 uint32_t dw;
18e7555a
AV		 1408
1409 if (!IS_QLA81XX(vha->hw))
1410 return QLA_SUCCESS;
1411
1412 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
1413 if (rval != QLA_SUCCESS) {
7c3df132
SK		 1414 ql_log(ql_log_warn, vha, 0x0105,
1415 "Unable to acquire semaphore.\n");
18e7555a
AV		 1416 goto done;
1417 }
1418
1419 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
1420 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
1421 if (rval != QLA_SUCCESS) {
7c3df132 1422 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
18e7555a
AV		 1423 goto done_release;
1424 }
1425
1426 dc &= MPS_MASK;
1427 if (dc == (dw & MPS_MASK))
1428 goto done_release;
1429
1430 dw &= ~MPS_MASK;
1431 dw |= dc;
1432 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
1433 if (rval != QLA_SUCCESS) {
7c3df132 1434 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
18e7555a
AV		 1435 }
1436
1437done_release:
1438 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
1439 if (rval != QLA_SUCCESS) {
7c3df132
SK		 1440 ql_log(ql_log_warn, vha, 0x006d,
1441 "Unable to release semaphore.\n");
18e7555a
AV		 1442 }
1443
1444done:
1445 return rval;
1446}
1447
1da177e4
LT		 1448/**
1449 * qla2x00_setup_chip() - Load and start RISC firmware.
1450 * @ha: HA context
1451 *
1452 * Returns 0 on success.
1453 */
1454static int
e315cd28 1455qla2x00_setup_chip(scsi_qla_host_t *vha)
1da177e4 1456{
0107109e
AV		 1457 int rval;
1458 uint32_t srisc_address = 0;
e315cd28 1459 struct qla_hw_data *ha = vha->hw;
3db0652e
AV		 1460 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1461 unsigned long flags;
dda772e8 1462 uint16_t fw_major_version;
3db0652e 1463
a9083016
GM		 1464 if (IS_QLA82XX(ha)) {
1465 rval = ha->isp_ops->load_risc(vha, &srisc_address);
14e303d9
AV		 1466 if (rval == QLA_SUCCESS) {
1467 qla2x00_stop_firmware(vha);
a9083016 1468 goto enable_82xx_npiv;
14e303d9 1469 } else
b963752f 1470 goto failed;
a9083016
GM		 1471 }
1472
3db0652e
AV		 1473 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1474 /* Disable SRAM, Instruction RAM and GP RAM parity. */
1475 spin_lock_irqsave(&ha->hardware_lock, flags);
1476 WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
1477 RD_REG_WORD(&reg->hccr);
1478 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1479 }
1da177e4 1480
18e7555a
AV		 1481 qla81xx_mpi_sync(vha);
1482
1da177e4 1483 /* Load firmware sequences */
e315cd28 1484 rval = ha->isp_ops->load_risc(vha, &srisc_address);
0107109e 1485 if (rval == QLA_SUCCESS) {
7c3df132
SK		 1486 ql_dbg(ql_dbg_init, vha, 0x00c9,
1487 "Verifying Checksum of loaded RISC code.\n");
1da177e4 1488
e315cd28 1489 rval = qla2x00_verify_checksum(vha, srisc_address);
1da177e4
LT		 1490 if (rval == QLA_SUCCESS) {
1491 /* Start firmware execution. */
7c3df132
SK		 1492 ql_dbg(ql_dbg_init, vha, 0x00ca,
1493 "Starting firmware.\n");
1da177e4 1494
e315cd28 1495 rval = qla2x00_execute_fw(vha, srisc_address);
1da177e4 1496 /* Retrieve firmware information. */
dda772e8 1497 if (rval == QLA_SUCCESS) {
a9083016 1498enable_82xx_npiv:
dda772e8 1499 fw_major_version = ha->fw_major_version;
3173167f
GM		 1500 if (IS_QLA82XX(ha))
1501 qla82xx_check_md_needed(vha);
6246b8a1
GM		 1502 else
1503 rval = qla2x00_get_fw_version(vha);
ca9e9c3e
AV		 1504 if (rval != QLA_SUCCESS)
1505 goto failed;
2c3dfe3f 1506 ha->flags.npiv_supported = 0;
e315cd28 1507 if (IS_QLA2XXX_MIDTYPE(ha) &&
946fb891 1508 (ha->fw_attributes & BIT_2)) {
2c3dfe3f 1509 ha->flags.npiv_supported = 1;
4d0ea247
SJ		 1510 if ((!ha->max_npiv_vports) ||
1511 ((ha->max_npiv_vports + 1) %
eb66dc60 1512 MIN_MULTI_ID_FABRIC))
4d0ea247 1513 ha->max_npiv_vports =
eb66dc60 1514 MIN_MULTI_ID_FABRIC - 1;
4d0ea247 1515 }
24a08138
AV		 1516 qla2x00_get_resource_cnts(vha, NULL,
1517 &ha->fw_xcb_count, NULL, NULL,
f3a0a77e 1518 &ha->max_npiv_vports, NULL);
d743de66 1519
be5ea3cf
SK		 1520 if (!fw_major_version && ql2xallocfwdump
1521 && !IS_QLA82XX(ha))
08de2844 1522 qla2x00_alloc_fw_dump(vha);
1da177e4
LT		 1523 }
1524 } else {
7c3df132
SK		 1525 ql_log(ql_log_fatal, vha, 0x00cd,
1526 "ISP Firmware failed checksum.\n");
1527 goto failed;
1da177e4
LT		 1528 }
1529 }
1530
3db0652e
AV		 1531 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1532 /* Enable proper parity. */
1533 spin_lock_irqsave(&ha->hardware_lock, flags);
1534 if (IS_QLA2300(ha))
1535 /* SRAM parity */
1536 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
1537 else
1538 /* SRAM, Instruction RAM and GP RAM parity */
1539 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
1540 RD_REG_WORD(&reg->hccr);
1541 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1542 }
1543
6246b8a1
GM		 1544 if (IS_QLA83XX(ha))
1545 goto skip_fac_check;
1546
1d2874de
JC		 1547 if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
1548 uint32_t size;
1549
1550 rval = qla81xx_fac_get_sector_size(vha, &size);
1551 if (rval == QLA_SUCCESS) {
1552 ha->flags.fac_supported = 1;
1553 ha->fdt_block_size = size << 2;
1554 } else {
7c3df132 1555 ql_log(ql_log_warn, vha, 0x00ce,
1d2874de
JC		 1556 "Unsupported FAC firmware (%d.%02d.%02d).\n",
1557 ha->fw_major_version, ha->fw_minor_version,
1558 ha->fw_subminor_version);
6246b8a1
GM		 1559skip_fac_check:
1560 if (IS_QLA83XX(ha)) {
1561 ha->flags.fac_supported = 0;
1562 rval = QLA_SUCCESS;
1563 }
1d2874de
JC		 1564 }
1565 }
ca9e9c3e 1566failed:
1da177e4 1567 if (rval) {
7c3df132
SK		 1568 ql_log(ql_log_fatal, vha, 0x00cf,
1569 "Setup chip ****FAILED****.\n");
1da177e4
LT		 1570 }
1571
1572 return (rval);
1573}
1574
1575/**
1576 * qla2x00_init_response_q_entries() - Initializes response queue entries.
1577 * @ha: HA context
1578 *
1579 * Beginning of request ring has initialization control block already built
1580 * by nvram config routine.
1581 *
1582 * Returns 0 on success.
1583 */
73208dfd
AC		 1584void
1585qla2x00_init_response_q_entries(struct rsp_que *rsp)
1da177e4
LT		 1586{
1587 uint16_t cnt;
1588 response_t *pkt;
1589
2afa19a9
AC		 1590 rsp->ring_ptr = rsp->ring;
1591 rsp->ring_index = 0;
1592 rsp->status_srb = NULL;
e315cd28
AC		 1593 pkt = rsp->ring_ptr;
1594 for (cnt = 0; cnt < rsp->length; cnt++) {
1da177e4
LT		 1595 pkt->signature = RESPONSE_PROCESSED;
1596 pkt++;
1597 }
1da177e4
LT		 1598}
1599
1600/**
1601 * qla2x00_update_fw_options() - Read and process firmware options.
1602 * @ha: HA context
1603 *
1604 * Returns 0 on success.
1605 */
abbd8870 1606void
e315cd28 1607qla2x00_update_fw_options(scsi_qla_host_t *vha)
1da177e4
LT		 1608{
1609 uint16_t swing, emphasis, tx_sens, rx_sens;
e315cd28 1610 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 1611
1612 memset(ha->fw_options, 0, sizeof(ha->fw_options));
e315cd28 1613 qla2x00_get_fw_options(vha, ha->fw_options);
1da177e4
LT		 1614
1615 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1616 return;
1617
1618 /* Serial Link options. */
7c3df132
SK		 1619 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
1620 "Serial link options.\n");
1621 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
1622 (uint8_t *)&ha->fw_seriallink_options,
1623 sizeof(ha->fw_seriallink_options));
1da177e4
LT		 1624
1625 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
1626 if (ha->fw_seriallink_options[3] & BIT_2) {
1627 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
1628
1629 /* 1G settings */
1630 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
1631 emphasis = (ha->fw_seriallink_options[2] &
1632 (BIT_4 | BIT_3)) >> 3;
1633 tx_sens = ha->fw_seriallink_options[0] &
fa2a1ce5 1634 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1da177e4
LT		 1635 rx_sens = (ha->fw_seriallink_options[0] &
1636 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1637 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
1638 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
1639 if (rx_sens == 0x0)
1640 rx_sens = 0x3;
1641 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
1642 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
1643 ha->fw_options[10] |= BIT_5 |
1644 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
1645 (tx_sens & (BIT_1 | BIT_0));
1646
1647 /* 2G settings */
1648 swing = (ha->fw_seriallink_options[2] &
1649 (BIT_7 | BIT_6 | BIT_5)) >> 5;
1650 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
1651 tx_sens = ha->fw_seriallink_options[1] &
fa2a1ce5 1652 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1da177e4
LT		 1653 rx_sens = (ha->fw_seriallink_options[1] &
1654 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1655 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
1656 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
1657 if (rx_sens == 0x0)
1658 rx_sens = 0x3;
1659 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
1660 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
1661 ha->fw_options[11] |= BIT_5 |
1662 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
1663 (tx_sens & (BIT_1 | BIT_0));
1664 }
1665
1666 /* FCP2 options. */
1667 /* Return command IOCBs without waiting for an ABTS to complete. */
1668 ha->fw_options[3] |= BIT_13;
1669
1670 /* LED scheme. */
1671 if (ha->flags.enable_led_scheme)
1672 ha->fw_options[2] |= BIT_12;
1673
48c02fde
AV		 1674 /* Detect ISP6312. */
1675 if (IS_QLA6312(ha))
1676 ha->fw_options[2] |= BIT_13;
1677
1da177e4 1678 /* Update firmware options. */
e315cd28 1679 qla2x00_set_fw_options(vha, ha->fw_options);
1da177e4
LT		 1680}
1681
0107109e 1682void
e315cd28 1683qla24xx_update_fw_options(scsi_qla_host_t *vha)
0107109e
AV		 1684{
1685 int rval;
e315cd28 1686 struct qla_hw_data *ha = vha->hw;
0107109e 1687
a9083016
GM		 1688 if (IS_QLA82XX(ha))
1689 return;
1690
0107109e 1691 /* Update Serial Link options. */
f94097ed 1692 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
0107109e
AV		 1693 return;
1694
e315cd28 1695 rval = qla2x00_set_serdes_params(vha,
f94097ed
AV		 1696 le16_to_cpu(ha->fw_seriallink_options24[1]),
1697 le16_to_cpu(ha->fw_seriallink_options24[2]),
1698 le16_to_cpu(ha->fw_seriallink_options24[3]));
0107109e 1699 if (rval != QLA_SUCCESS) {
7c3df132 1700 ql_log(ql_log_warn, vha, 0x0104,
0107109e
AV		 1701 "Unable to update Serial Link options (%x).\n", rval);
1702 }
1703}
1704
abbd8870 1705void
e315cd28 1706qla2x00_config_rings(struct scsi_qla_host *vha)
abbd8870 1707{
e315cd28 1708 struct qla_hw_data *ha = vha->hw;
3d71644c 1709 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
73208dfd
AC		 1710 struct req_que *req = ha->req_q_map[0];
1711 struct rsp_que *rsp = ha->rsp_q_map[0];
abbd8870
AV		 1712
1713 /* Setup ring parameters in initialization control block. */
1714 ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
1715 ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
e315cd28
AC		 1716 ha->init_cb->request_q_length = cpu_to_le16(req->length);
1717 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
1718 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
1719 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
1720 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
1721 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
abbd8870
AV		 1722
1723 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
1724 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
1725 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
1726 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
1727 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
1728}
1729
0107109e 1730void
e315cd28 1731qla24xx_config_rings(struct scsi_qla_host *vha)
0107109e 1732{
e315cd28 1733 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 1734 device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
1735 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
1736 struct qla_msix_entry *msix;
0107109e 1737 struct init_cb_24xx *icb;
73208dfd
AC		 1738 uint16_t rid = 0;
1739 struct req_que *req = ha->req_q_map[0];
1740 struct rsp_que *rsp = ha->rsp_q_map[0];
0107109e 1741
6246b8a1 1742 /* Setup ring parameters in initialization control block. */
0107109e
AV		 1743 icb = (struct init_cb_24xx *)ha->init_cb;
1744 icb->request_q_outpointer = __constant_cpu_to_le16(0);
1745 icb->response_q_inpointer = __constant_cpu_to_le16(0);
e315cd28
AC		 1746 icb->request_q_length = cpu_to_le16(req->length);
1747 icb->response_q_length = cpu_to_le16(rsp->length);
1748 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
1749 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
1750 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
1751 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
0107109e 1752
6246b8a1 1753 if (ha->mqenable || IS_QLA83XX(ha)) {
73208dfd
AC		 1754 icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
1755 icb->rid = __constant_cpu_to_le16(rid);
1756 if (ha->flags.msix_enabled) {
1757 msix = &ha->msix_entries[1];
7c3df132
SK		 1758 ql_dbg(ql_dbg_init, vha, 0x00fd,
1759 "Registering vector 0x%x for base que.\n",
1760 msix->entry);
73208dfd
AC		 1761 icb->msix = cpu_to_le16(msix->entry);
1762 }
1763 /* Use alternate PCI bus number */
1764 if (MSB(rid))
1765 icb->firmware_options_2 |=
1766 __constant_cpu_to_le32(BIT_19);
1767 /* Use alternate PCI devfn */
1768 if (LSB(rid))
1769 icb->firmware_options_2 |=
1770 __constant_cpu_to_le32(BIT_18);
1771
3155754a 1772 /* Use Disable MSIX Handshake mode for capable adapters */
6246b8a1
GM		 1773 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
1774 (ha->flags.msix_enabled)) {
3155754a
AC		 1775 icb->firmware_options_2 &=
1776 __constant_cpu_to_le32(~BIT_22);
1777 ha->flags.disable_msix_handshake = 1;
7c3df132
SK		 1778 ql_dbg(ql_dbg_init, vha, 0x00fe,
1779 "MSIX Handshake Disable Mode turned on.\n");
3155754a
AC		 1780 } else {
1781 icb->firmware_options_2 |=
1782 __constant_cpu_to_le32(BIT_22);
1783 }
73208dfd 1784 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
73208dfd
AC		 1785
1786 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
1787 WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
1788 WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
1789 WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
1790 } else {
1791 WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
1792 WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
1793 WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
1794 WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
1795 }
1796 /* PCI posting */
1797 RD_REG_DWORD(&ioreg->hccr);
0107109e
AV		 1798}
1799
1da177e4
LT		 1800/**
1801 * qla2x00_init_rings() - Initializes firmware.
1802 * @ha: HA context
1803 *
1804 * Beginning of request ring has initialization control block already built
1805 * by nvram config routine.
1806 *
1807 * Returns 0 on success.
1808 */
1809static int
e315cd28 1810qla2x00_init_rings(scsi_qla_host_t *vha)
1da177e4
LT		 1811{
1812 int rval;
1813 unsigned long flags = 0;
29bdccbe 1814 int cnt, que;
e315cd28 1815 struct qla_hw_data *ha = vha->hw;
29bdccbe
AC		 1816 struct req_que *req;
1817 struct rsp_que *rsp;
1818 struct scsi_qla_host *vp;
2c3dfe3f
SJ		 1819 struct mid_init_cb_24xx *mid_init_cb =
1820 (struct mid_init_cb_24xx *) ha->init_cb;
1da177e4
LT		 1821
1822 spin_lock_irqsave(&ha->hardware_lock, flags);
1823
1824 /* Clear outstanding commands array. */
2afa19a9 1825 for (que = 0; que < ha->max_req_queues; que++) {
29bdccbe
AC		 1826 req = ha->req_q_map[que];
1827 if (!req)
1828 continue;
2afa19a9 1829 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
29bdccbe 1830 req->outstanding_cmds[cnt] = NULL;
1da177e4 1831
2afa19a9 1832 req->current_outstanding_cmd = 1;
1da177e4 1833
29bdccbe
AC		 1834 /* Initialize firmware. */
1835 req->ring_ptr = req->ring;
1836 req->ring_index = 0;
1837 req->cnt = req->length;
1838 }
1da177e4 1839
2afa19a9 1840 for (que = 0; que < ha->max_rsp_queues; que++) {
29bdccbe
AC		 1841 rsp = ha->rsp_q_map[que];
1842 if (!rsp)
1843 continue;
29bdccbe
AC		 1844 /* Initialize response queue entries */
1845 qla2x00_init_response_q_entries(rsp);
1846 }
1da177e4 1847
542bce1f 1848 spin_lock(&ha->vport_slock);
29bdccbe
AC		 1849 /* Clear RSCN queue. */
1850 list_for_each_entry(vp, &ha->vp_list, list) {
1851 vp->rscn_in_ptr = 0;
1852 vp->rscn_out_ptr = 0;
1853 }
feafb7b1 1854
542bce1f 1855 spin_unlock(&ha->vport_slock);
feafb7b1 1856
e315cd28 1857 ha->isp_ops->config_rings(vha);
1da177e4
LT		 1858
1859 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1860
1861 /* Update any ISP specific firmware options before initialization. */
e315cd28 1862 ha->isp_ops->update_fw_options(vha);
1da177e4 1863
7c3df132 1864 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
2c3dfe3f 1865
605aa2bc
LC		 1866 if (ha->flags.npiv_supported) {
1867 if (ha->operating_mode == LOOP)
1868 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
c48339de 1869 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
605aa2bc
LC		 1870 }
1871
24a08138
AV		 1872 if (IS_FWI2_CAPABLE(ha)) {
1873 mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
1874 mid_init_cb->init_cb.execution_throttle =
1875 cpu_to_le16(ha->fw_xcb_count);
1876 }
2c3dfe3f 1877
e315cd28 1878 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
1da177e4 1879 if (rval) {
7c3df132
SK		 1880 ql_log(ql_log_fatal, vha, 0x00d2,
1881 "Init Firmware **** FAILED ****.\n");
1da177e4 1882 } else {
7c3df132
SK		 1883 ql_dbg(ql_dbg_init, vha, 0x00d3,
1884 "Init Firmware -- success.\n");
1da177e4
LT		 1885 }
1886
1887 return (rval);
1888}
1889
1890/**
1891 * qla2x00_fw_ready() - Waits for firmware ready.
1892 * @ha: HA context
1893 *
1894 * Returns 0 on success.
1895 */
1896static int
e315cd28 1897qla2x00_fw_ready(scsi_qla_host_t *vha)
1da177e4
LT		 1898{
1899 int rval;
4d4df193 1900 unsigned long wtime, mtime, cs84xx_time;
1da177e4
LT		 1901 uint16_t min_wait; /* Minimum wait time if loop is down */
1902 uint16_t wait_time; /* Wait time if loop is coming ready */
656e8912 1903 uint16_t state[5];
e315cd28 1904 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 1905
1906 rval = QLA_SUCCESS;
1907
1908 /* 20 seconds for loop down. */
fa2a1ce5 1909 min_wait = 20;
1da177e4
LT		 1910
1911 /*
1912 * Firmware should take at most one RATOV to login, plus 5 seconds for
1913 * our own processing.
1914 */
1915 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
1916 wait_time = min_wait;
1917 }
1918
1919 /* Min wait time if loop down */
1920 mtime = jiffies + (min_wait * HZ);
1921
1922 /* wait time before firmware ready */
1923 wtime = jiffies + (wait_time * HZ);
1924
1925 /* Wait for ISP to finish LIP */
e315cd28 1926 if (!vha->flags.init_done)
7c3df132
SK		 1927 ql_log(ql_log_info, vha, 0x801e,
1928 "Waiting for LIP to complete.\n");
1da177e4
LT		 1929
1930 do {
e315cd28 1931 rval = qla2x00_get_firmware_state(vha, state);
1da177e4 1932 if (rval == QLA_SUCCESS) {
4d4df193 1933 if (state[0] < FSTATE_LOSS_OF_SYNC) {
e315cd28 1934 vha->device_flags &= ~DFLG_NO_CABLE;
1da177e4 1935 }
4d4df193 1936 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
7c3df132
SK		 1937 ql_dbg(ql_dbg_taskm, vha, 0x801f,
1938 "fw_state=%x 84xx=%x.\n", state[0],
1939 state[2]);
4d4df193
HK		 1940 if ((state[2] & FSTATE_LOGGED_IN) &&
1941 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
7c3df132
SK		 1942 ql_dbg(ql_dbg_taskm, vha, 0x8028,
1943 "Sending verify iocb.\n");
4d4df193
HK		 1944
1945 cs84xx_time = jiffies;
e315cd28 1946 rval = qla84xx_init_chip(vha);
7c3df132
SK		 1947 if (rval != QLA_SUCCESS) {
1948 ql_log(ql_log_warn,
cfb0919c 1949 vha, 0x8007,
7c3df132 1950 "Init chip failed.\n");
4d4df193 1951 break;
7c3df132 1952 }
4d4df193
HK		 1953
1954 /* Add time taken to initialize. */
1955 cs84xx_time = jiffies - cs84xx_time;
1956 wtime += cs84xx_time;
1957 mtime += cs84xx_time;
cfb0919c 1958 ql_dbg(ql_dbg_taskm, vha, 0x8008,
7c3df132
SK		 1959 "Increasing wait time by %ld. "
1960 "New time %ld.\n", cs84xx_time,
1961 wtime);
4d4df193
HK		 1962 }
1963 } else if (state[0] == FSTATE_READY) {
7c3df132
SK		 1964 ql_dbg(ql_dbg_taskm, vha, 0x8037,
1965 "F/W Ready - OK.\n");
1da177e4 1966
e315cd28 1967 qla2x00_get_retry_cnt(vha, &ha->retry_count,
1da177e4
LT		 1968 &ha->login_timeout, &ha->r_a_tov);
1969
1970 rval = QLA_SUCCESS;
1971 break;
1972 }
1973
1974 rval = QLA_FUNCTION_FAILED;
1975
e315cd28 1976 if (atomic_read(&vha->loop_down_timer) &&
4d4df193 1977 state[0] != FSTATE_READY) {
1da177e4 1978 /* Loop down. Timeout on min_wait for states
fa2a1ce5
AV		 1979 * other than Wait for Login.
1980 */
1da177e4 1981 if (time_after_eq(jiffies, mtime)) {
7c3df132 1982 ql_log(ql_log_info, vha, 0x8038,
1da177e4
LT		 1983 "Cable is unplugged...\n");
1984
e315cd28 1985 vha->device_flags |= DFLG_NO_CABLE;
1da177e4
LT		 1986 break;
1987 }
1988 }
1989 } else {
1990 /* Mailbox cmd failed. Timeout on min_wait. */
cdbb0a4f 1991 if (time_after_eq(jiffies, mtime) ||
7190575f 1992 ha->flags.isp82xx_fw_hung)
1da177e4
LT		 1993 break;
1994 }
1995
1996 if (time_after_eq(jiffies, wtime))
1997 break;
1998
1999 /* Delay for a while */
2000 msleep(500);
1da177e4
LT		 2001 } while (1);
2002
7c3df132
SK		 2003 ql_dbg(ql_dbg_taskm, vha, 0x803a,
2004 "fw_state=%x (%x, %x, %x, %x) " "curr time=%lx.\n", state[0],
2005 state[1], state[2], state[3], state[4], jiffies);
1da177e4 2006
cfb0919c 2007 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
7c3df132
SK		 2008 ql_log(ql_log_warn, vha, 0x803b,
2009 "Firmware ready **** FAILED ****.\n");
1da177e4
LT		 2010 }
2011
2012 return (rval);
2013}
2014
2015/*
2016* qla2x00_configure_hba
2017* Setup adapter context.
2018*
2019* Input:
2020* ha = adapter state pointer.
2021*
2022* Returns:
2023* 0 = success
2024*
2025* Context:
2026* Kernel context.
2027*/
2028static int
e315cd28 2029qla2x00_configure_hba(scsi_qla_host_t *vha)
1da177e4
LT		 2030{
2031 int rval;
2032 uint16_t loop_id;
2033 uint16_t topo;
2c3dfe3f 2034 uint16_t sw_cap;
1da177e4
LT		 2035 uint8_t al_pa;
2036 uint8_t area;
2037 uint8_t domain;
2038 char connect_type[22];
e315cd28 2039 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 2040
2041 /* Get host addresses. */
e315cd28 2042 rval = qla2x00_get_adapter_id(vha,
2c3dfe3f 2043 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
1da177e4 2044 if (rval != QLA_SUCCESS) {
e315cd28 2045 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
6246b8a1 2046 IS_CNA_CAPABLE(ha) ||
33135aa2 2047 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
7c3df132
SK		 2048 ql_dbg(ql_dbg_disc, vha, 0x2008,
2049 "Loop is in a transition state.\n");
33135aa2 2050 } else {
7c3df132
SK		 2051 ql_log(ql_log_warn, vha, 0x2009,
2052 "Unable to get host loop ID.\n");
e315cd28 2053 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
33135aa2 2054 }
1da177e4
LT		 2055 return (rval);
2056 }
2057
2058 if (topo == 4) {
7c3df132
SK		 2059 ql_log(ql_log_info, vha, 0x200a,
2060 "Cannot get topology - retrying.\n");
1da177e4
LT		 2061 return (QLA_FUNCTION_FAILED);
2062 }
2063
e315cd28 2064 vha->loop_id = loop_id;
1da177e4
LT		 2065
2066 /* initialize */
2067 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
2068 ha->operating_mode = LOOP;
2c3dfe3f 2069 ha->switch_cap = 0;
1da177e4
LT		 2070
2071 switch (topo) {
2072 case 0:
7c3df132 2073 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
1da177e4
LT		 2074 ha->current_topology = ISP_CFG_NL;
2075 strcpy(connect_type, "(Loop)");
2076 break;
2077
2078 case 1:
7c3df132 2079 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
2c3dfe3f 2080 ha->switch_cap = sw_cap;
1da177e4
LT		 2081 ha->current_topology = ISP_CFG_FL;
2082 strcpy(connect_type, "(FL_Port)");
2083 break;
2084
2085 case 2:
7c3df132 2086 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
1da177e4
LT		 2087 ha->operating_mode = P2P;
2088 ha->current_topology = ISP_CFG_N;
2089 strcpy(connect_type, "(N_Port-to-N_Port)");
2090 break;
2091
2092 case 3:
7c3df132 2093 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
2c3dfe3f 2094 ha->switch_cap = sw_cap;
1da177e4
LT		 2095 ha->operating_mode = P2P;
2096 ha->current_topology = ISP_CFG_F;
2097 strcpy(connect_type, "(F_Port)");
2098 break;
2099
2100 default:
7c3df132
SK		 2101 ql_dbg(ql_dbg_disc, vha, 0x200f,
2102 "HBA in unknown topology %x, using NL.\n", topo);
1da177e4
LT		 2103 ha->current_topology = ISP_CFG_NL;
2104 strcpy(connect_type, "(Loop)");
2105 break;
2106 }
2107
2108 /* Save Host port and loop ID. */
2109 /* byte order - Big Endian */
e315cd28
AC		 2110 vha->d_id.b.domain = domain;
2111 vha->d_id.b.area = area;
2112 vha->d_id.b.al_pa = al_pa;
1da177e4 2113
e315cd28 2114 if (!vha->flags.init_done)
7c3df132
SK		 2115 ql_log(ql_log_info, vha, 0x2010,
2116 "Topology - %s, Host Loop address 0x%x.\n",
e315cd28 2117 connect_type, vha->loop_id);
1da177e4
LT		 2118
2119 if (rval) {
7c3df132
SK		 2120 ql_log(ql_log_warn, vha, 0x2011,
2121 "%s FAILED\n", __func__);
1da177e4 2122 } else {
7c3df132
SK		 2123 ql_dbg(ql_dbg_disc, vha, 0x2012,
2124 "%s success\n", __func__);
1da177e4
LT		 2125 }
2126
2127 return(rval);
2128}
2129
a9083016 2130inline void
e315cd28
AC		 2131qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
2132 char *def)
9bb9fcf2
AV		 2133{
2134 char *st, *en;
2135 uint16_t index;
e315cd28 2136 struct qla_hw_data *ha = vha->hw;
ab671149 2137 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
6246b8a1 2138 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
9bb9fcf2
AV		 2139
2140 if (memcmp(model, BINZERO, len) != 0) {
2141 strncpy(ha->model_number, model, len);
2142 st = en = ha->model_number;
2143 en += len - 1;
2144 while (en > st) {
2145 if (*en != 0x20 && *en != 0x00)
2146 break;
2147 *en-- = '\0';
2148 }
2149
2150 index = (ha->pdev->subsystem_device & 0xff);
7d0dba17
AV		 2151 if (use_tbl &&
2152 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
9bb9fcf2 2153 index < QLA_MODEL_NAMES)
1ee27146
JC		 2154 strncpy(ha->model_desc,
2155 qla2x00_model_name[index * 2 + 1],
2156 sizeof(ha->model_desc) - 1);
9bb9fcf2
AV		 2157 } else {
2158 index = (ha->pdev->subsystem_device & 0xff);
7d0dba17
AV		 2159 if (use_tbl &&
2160 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
9bb9fcf2
AV		 2161 index < QLA_MODEL_NAMES) {
2162 strcpy(ha->model_number,
2163 qla2x00_model_name[index * 2]);
1ee27146
JC		 2164 strncpy(ha->model_desc,
2165 qla2x00_model_name[index * 2 + 1],
2166 sizeof(ha->model_desc) - 1);
9bb9fcf2
AV		 2167 } else {
2168 strcpy(ha->model_number, def);
2169 }
2170 }
1ee27146 2171 if (IS_FWI2_CAPABLE(ha))
e315cd28 2172 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
1ee27146 2173 sizeof(ha->model_desc));
9bb9fcf2
AV		 2174}
2175
4e08df3f
DM		 2176/* On sparc systems, obtain port and node WWN from firmware
2177 * properties.
2178 */
e315cd28 2179static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4e08df3f
DM		 2180{
2181#ifdef CONFIG_SPARC
e315cd28 2182 struct qla_hw_data *ha = vha->hw;
4e08df3f 2183 struct pci_dev *pdev = ha->pdev;
15576bc8
DM		 2184 struct device_node *dp = pci_device_to_OF_node(pdev);
2185 const u8 *val;
4e08df3f
DM		 2186 int len;
2187
2188 val = of_get_property(dp, "port-wwn", &len);
2189 if (val && len >= WWN_SIZE)
2190 memcpy(nv->port_name, val, WWN_SIZE);
2191
2192 val = of_get_property(dp, "node-wwn", &len);
2193 if (val && len >= WWN_SIZE)
2194 memcpy(nv->node_name, val, WWN_SIZE);
2195#endif
2196}
2197
1da177e4
LT		 2198/*
2199* NVRAM configuration for ISP 2xxx
2200*
2201* Input:
2202* ha = adapter block pointer.
2203*
2204* Output:
2205* initialization control block in response_ring
2206* host adapters parameters in host adapter block
2207*
2208* Returns:
2209* 0 = success.
2210*/
abbd8870 2211int
e315cd28 2212qla2x00_nvram_config(scsi_qla_host_t *vha)
1da177e4 2213{
4e08df3f 2214 int rval;
0107109e
AV		 2215 uint8_t chksum = 0;
2216 uint16_t cnt;
2217 uint8_t *dptr1, *dptr2;
e315cd28 2218 struct qla_hw_data *ha = vha->hw;
0107109e 2219 init_cb_t *icb = ha->init_cb;
281afe19
SJ		 2220 nvram_t *nv = ha->nvram;
2221 uint8_t *ptr = ha->nvram;
3d71644c 2222 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 2223
4e08df3f
DM		 2224 rval = QLA_SUCCESS;
2225
1da177e4 2226 /* Determine NVRAM starting address. */
0107109e 2227 ha->nvram_size = sizeof(nvram_t);
1da177e4
LT		 2228 ha->nvram_base = 0;
2229 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
2230 if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
2231 ha->nvram_base = 0x80;
2232
2233 /* Get NVRAM data and calculate checksum. */
e315cd28 2234 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
0107109e
AV		 2235 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
2236 chksum += *ptr++;
1da177e4 2237
7c3df132
SK		 2238 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
2239 "Contents of NVRAM.\n");
2240 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
2241 (uint8_t *)nv, ha->nvram_size);
1da177e4
LT		 2242
2243 /* Bad NVRAM data, set defaults parameters. */
2244 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
2245 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
2246 /* Reset NVRAM data. */
7c3df132
SK		 2247 ql_log(ql_log_warn, vha, 0x0064,
2248 "Inconisistent NVRAM "
2249 "detected: checksum=0x%x id=%c version=0x%x.\n",
2250 chksum, nv->id[0], nv->nvram_version);
2251 ql_log(ql_log_warn, vha, 0x0065,
2252 "Falling back to "
2253 "functioning (yet invalid -- WWPN) defaults.\n");
4e08df3f
DM		 2254
2255 /*
2256 * Set default initialization control block.
2257 */
2258 memset(nv, 0, ha->nvram_size);
2259 nv->parameter_block_version = ICB_VERSION;
2260
2261 if (IS_QLA23XX(ha)) {
2262 nv->firmware_options[0] = BIT_2 | BIT_1;
2263 nv->firmware_options[1] = BIT_7 | BIT_5;
2264 nv->add_firmware_options[0] = BIT_5;
2265 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2266 nv->frame_payload_size = __constant_cpu_to_le16(2048);
2267 nv->special_options[1] = BIT_7;
2268 } else if (IS_QLA2200(ha)) {
2269 nv->firmware_options[0] = BIT_2 | BIT_1;
2270 nv->firmware_options[1] = BIT_7 | BIT_5;
2271 nv->add_firmware_options[0] = BIT_5;
2272 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2273 nv->frame_payload_size = __constant_cpu_to_le16(1024);
2274 } else if (IS_QLA2100(ha)) {
2275 nv->firmware_options[0] = BIT_3 | BIT_1;
2276 nv->firmware_options[1] = BIT_5;
2277 nv->frame_payload_size = __constant_cpu_to_le16(1024);
2278 }
2279
2280 nv->max_iocb_allocation = __constant_cpu_to_le16(256);
2281 nv->execution_throttle = __constant_cpu_to_le16(16);
2282 nv->retry_count = 8;
2283 nv->retry_delay = 1;
2284
2285 nv->port_name[0] = 33;
2286 nv->port_name[3] = 224;
2287 nv->port_name[4] = 139;
2288
e315cd28 2289 qla2xxx_nvram_wwn_from_ofw(vha, nv);
4e08df3f
DM		 2290
2291 nv->login_timeout = 4;
2292
2293 /*
2294 * Set default host adapter parameters
2295 */
2296 nv->host_p[1] = BIT_2;
2297 nv->reset_delay = 5;
2298 nv->port_down_retry_count = 8;
2299 nv->max_luns_per_target = __constant_cpu_to_le16(8);
2300 nv->link_down_timeout = 60;
2301
2302 rval = 1;
1da177e4
LT		 2303 }
2304
2305#if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
2306 /*
2307 * The SN2 does not provide BIOS emulation which means you can't change
2308 * potentially bogus BIOS settings. Force the use of default settings
2309 * for link rate and frame size. Hope that the rest of the settings
2310 * are valid.
2311 */
2312 if (ia64_platform_is("sn2")) {
2313 nv->frame_payload_size = __constant_cpu_to_le16(2048);
2314 if (IS_QLA23XX(ha))
2315 nv->special_options[1] = BIT_7;
2316 }
2317#endif
2318
2319 /* Reset Initialization control block */
0107109e 2320 memset(icb, 0, ha->init_cb_size);
1da177e4
LT		 2321
2322 /*
2323 * Setup driver NVRAM options.
2324 */
2325 nv->firmware_options[0] |= (BIT_6 | BIT_1);
2326 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
2327 nv->firmware_options[1] |= (BIT_5 | BIT_0);
2328 nv->firmware_options[1] &= ~BIT_4;
2329
2330 if (IS_QLA23XX(ha)) {
2331 nv->firmware_options[0] |= BIT_2;
2332 nv->firmware_options[0] &= ~BIT_3;
5ff1d584 2333 nv->firmware_options[0] &= ~BIT_6;
0107109e 2334 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
1da177e4
LT		 2335
2336 if (IS_QLA2300(ha)) {
2337 if (ha->fb_rev == FPM_2310) {
2338 strcpy(ha->model_number, "QLA2310");
2339 } else {
2340 strcpy(ha->model_number, "QLA2300");
2341 }
2342 } else {
e315cd28 2343 qla2x00_set_model_info(vha, nv->model_number,
9bb9fcf2 2344 sizeof(nv->model_number), "QLA23xx");
1da177e4
LT		 2345 }
2346 } else if (IS_QLA2200(ha)) {
2347 nv->firmware_options[0] |= BIT_2;
2348 /*
2349 * 'Point-to-point preferred, else loop' is not a safe
2350 * connection mode setting.
2351 */
2352 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
2353 (BIT_5 | BIT_4)) {
2354 /* Force 'loop preferred, else point-to-point'. */
2355 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
2356 nv->add_firmware_options[0] |= BIT_5;
2357 }
2358 strcpy(ha->model_number, "QLA22xx");
2359 } else /*if (IS_QLA2100(ha))*/ {
2360 strcpy(ha->model_number, "QLA2100");
2361 }
2362
2363 /*
2364 * Copy over NVRAM RISC parameter block to initialization control block.
2365 */
2366 dptr1 = (uint8_t *)icb;
2367 dptr2 = (uint8_t *)&nv->parameter_block_version;
2368 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
2369 while (cnt--)
2370 *dptr1++ = *dptr2++;
2371
2372 /* Copy 2nd half. */
2373 dptr1 = (uint8_t *)icb->add_firmware_options;
2374 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
2375 while (cnt--)
2376 *dptr1++ = *dptr2++;
2377
5341e868
AV		 2378 /* Use alternate WWN? */
2379 if (nv->host_p[1] & BIT_7) {
2380 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
2381 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
2382 }
2383
1da177e4
LT		 2384 /* Prepare nodename */
2385 if ((icb->firmware_options[1] & BIT_6) == 0) {
2386 /*
2387 * Firmware will apply the following mask if the nodename was
2388 * not provided.
2389 */
2390 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
2391 icb->node_name[0] &= 0xF0;
2392 }
2393
2394 /*
2395 * Set host adapter parameters.
2396 */
3ce8866c
SK		 2397
2398 /*
2399 * BIT_7 in the host-parameters section allows for modification to
2400 * internal driver logging.
2401 */
0181944f 2402 if (nv->host_p[0] & BIT_7)
cfb0919c 2403 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
1da177e4
LT		 2404 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
2405 /* Always load RISC code on non ISP2[12]00 chips. */
2406 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
2407 ha->flags.disable_risc_code_load = 0;
2408 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
2409 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
2410 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
06c22bd1 2411 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
d4c760c2 2412 ha->flags.disable_serdes = 0;
1da177e4
LT		 2413
2414 ha->operating_mode =
2415 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
2416
2417 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
2418 sizeof(ha->fw_seriallink_options));
2419
2420 /* save HBA serial number */
2421 ha->serial0 = icb->port_name[5];
2422 ha->serial1 = icb->port_name[6];
2423 ha->serial2 = icb->port_name[7];
e315cd28
AC		 2424 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
2425 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
1da177e4
LT		 2426
2427 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
2428
2429 ha->retry_count = nv->retry_count;
2430
2431 /* Set minimum login_timeout to 4 seconds. */
5b91490e 2432 if (nv->login_timeout != ql2xlogintimeout)
1da177e4
LT		 2433 nv->login_timeout = ql2xlogintimeout;
2434 if (nv->login_timeout < 4)
2435 nv->login_timeout = 4;
2436 ha->login_timeout = nv->login_timeout;
2437 icb->login_timeout = nv->login_timeout;
2438
00a537b8
AV		 2439 /* Set minimum RATOV to 100 tenths of a second. */
2440 ha->r_a_tov = 100;
1da177e4 2441
1da177e4
LT		 2442 ha->loop_reset_delay = nv->reset_delay;
2443
1da177e4
LT		 2444 /* Link Down Timeout = 0:
2445 *
2446 * When Port Down timer expires we will start returning
2447 * I/O's to OS with "DID_NO_CONNECT".
2448 *
2449 * Link Down Timeout != 0:
2450 *
2451 * The driver waits for the link to come up after link down
2452 * before returning I/Os to OS with "DID_NO_CONNECT".
fa2a1ce5 2453 */
1da177e4
LT		 2454 if (nv->link_down_timeout == 0) {
2455 ha->loop_down_abort_time =
354d6b21 2456 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
1da177e4
LT		 2457 } else {
2458 ha->link_down_timeout = nv->link_down_timeout;
2459 ha->loop_down_abort_time =
2460 (LOOP_DOWN_TIME - ha->link_down_timeout);
fa2a1ce5 2461 }
1da177e4 2462
1da177e4
LT		 2463 /*
2464 * Need enough time to try and get the port back.
2465 */
2466 ha->port_down_retry_count = nv->port_down_retry_count;
2467 if (qlport_down_retry)
2468 ha->port_down_retry_count = qlport_down_retry;
2469 /* Set login_retry_count */
2470 ha->login_retry_count = nv->retry_count;
2471 if (ha->port_down_retry_count == nv->port_down_retry_count &&
2472 ha->port_down_retry_count > 3)
2473 ha->login_retry_count = ha->port_down_retry_count;
2474 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
2475 ha->login_retry_count = ha->port_down_retry_count;
2476 if (ql2xloginretrycount)
2477 ha->login_retry_count = ql2xloginretrycount;
2478
1da177e4
LT		 2479 icb->lun_enables = __constant_cpu_to_le16(0);
2480 icb->command_resource_count = 0;
2481 icb->immediate_notify_resource_count = 0;
2482 icb->timeout = __constant_cpu_to_le16(0);
2483
2484 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
2485 /* Enable RIO */
2486 icb->firmware_options[0] &= ~BIT_3;
2487 icb->add_firmware_options[0] &=
2488 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
2489 icb->add_firmware_options[0] |= BIT_2;
2490 icb->response_accumulation_timer = 3;
2491 icb->interrupt_delay_timer = 5;
2492
e315cd28 2493 vha->flags.process_response_queue = 1;
1da177e4 2494 } else {
4fdfefe5 2495 /* Enable ZIO. */
e315cd28 2496 if (!vha->flags.init_done) {
4fdfefe5
AV		 2497 ha->zio_mode = icb->add_firmware_options[0] &
2498 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
2499 ha->zio_timer = icb->interrupt_delay_timer ?
2500 icb->interrupt_delay_timer: 2;
2501 }
1da177e4
LT		 2502 icb->add_firmware_options[0] &=
2503 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
e315cd28 2504 vha->flags.process_response_queue = 0;
4fdfefe5 2505 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4a59f71d
AV		 2506 ha->zio_mode = QLA_ZIO_MODE_6;
2507
7c3df132 2508 ql_log(ql_log_info, vha, 0x0068,
4fdfefe5
AV		 2509 "ZIO mode %d enabled; timer delay (%d us).\n",
2510 ha->zio_mode, ha->zio_timer * 100);
1da177e4 2511
4fdfefe5
AV		 2512 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
2513 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
e315cd28 2514 vha->flags.process_response_queue = 1;
1da177e4
LT		 2515 }
2516 }
2517
4e08df3f 2518 if (rval) {
7c3df132
SK		 2519 ql_log(ql_log_warn, vha, 0x0069,
2520 "NVRAM configuration failed.\n");
4e08df3f
DM		 2521 }
2522 return (rval);
1da177e4
LT		 2523}
2524
19a7b4ae
JSEC		 2525static void
2526qla2x00_rport_del(void *data)
2527{
2528 fc_port_t *fcport = data;
d97994dc 2529 struct fc_rport *rport;
044d78e1 2530 unsigned long flags;
d97994dc 2531
044d78e1 2532 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
ac280b67 2533 rport = fcport->drport ? fcport->drport: fcport->rport;
d97994dc 2534 fcport->drport = NULL;
044d78e1 2535 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
d97994dc
AV		 2536 if (rport)
2537 fc_remote_port_delete(rport);
19a7b4ae
JSEC		 2538}
2539
1da177e4
LT		 2540/**
2541 * qla2x00_alloc_fcport() - Allocate a generic fcport.
2542 * @ha: HA context
2543 * @flags: allocation flags
2544 *
2545 * Returns a pointer to the allocated fcport, or NULL, if none available.
2546 */
9a069e19 2547fc_port_t *
e315cd28 2548qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
1da177e4
LT		 2549{
2550 fc_port_t *fcport;
2551
bbfbbbc1
MK		 2552 fcport = kzalloc(sizeof(fc_port_t), flags);
2553 if (!fcport)
2554 return NULL;
1da177e4
LT		 2555
2556 /* Setup fcport template structure. */
e315cd28
AC		 2557 fcport->vha = vha;
2558 fcport->vp_idx = vha->vp_idx;
1da177e4
LT		 2559 fcport->port_type = FCT_UNKNOWN;
2560 fcport->loop_id = FC_NO_LOOP_ID;
ec426e10 2561 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
ad3e0eda 2562 fcport->supported_classes = FC_COS_UNSPECIFIED;
1da177e4 2563
bbfbbbc1 2564 return fcport;
1da177e4
LT		 2565}
2566
2567/*
2568 * qla2x00_configure_loop
2569 * Updates Fibre Channel Device Database with what is actually on loop.
2570 *
2571 * Input:
2572 * ha = adapter block pointer.
2573 *
2574 * Returns:
2575 * 0 = success.
2576 * 1 = error.
2577 * 2 = database was full and device was not configured.
2578 */
2579static int
e315cd28 2580qla2x00_configure_loop(scsi_qla_host_t *vha)
1da177e4
LT		 2581{
2582 int rval;
2583 unsigned long flags, save_flags;
e315cd28 2584 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 2585 rval = QLA_SUCCESS;
2586
2587 /* Get Initiator ID */
e315cd28
AC		 2588 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
2589 rval = qla2x00_configure_hba(vha);
1da177e4 2590 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2591 ql_dbg(ql_dbg_disc, vha, 0x2013,
2592 "Unable to configure HBA.\n");
1da177e4
LT		 2593 return (rval);
2594 }
2595 }
2596
e315cd28 2597 save_flags = flags = vha->dpc_flags;
7c3df132
SK		 2598 ql_dbg(ql_dbg_disc, vha, 0x2014,
2599 "Configure loop -- dpc flags = 0x%lx.\n", flags);
1da177e4
LT		 2600
2601 /*
2602 * If we have both an RSCN and PORT UPDATE pending then handle them
2603 * both at the same time.
2604 */
e315cd28
AC		 2605 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2606 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
1da177e4 2607
3064ff39
MH		 2608 qla2x00_get_data_rate(vha);
2609
1da177e4
LT		 2610 /* Determine what we need to do */
2611 if (ha->current_topology == ISP_CFG_FL &&
2612 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
2613
e315cd28 2614 vha->flags.rscn_queue_overflow = 1;
1da177e4
LT		 2615 set_bit(RSCN_UPDATE, &flags);
2616
2617 } else if (ha->current_topology == ISP_CFG_F &&
2618 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
2619
e315cd28 2620 vha->flags.rscn_queue_overflow = 1;
1da177e4
LT		 2621 set_bit(RSCN_UPDATE, &flags);
2622 clear_bit(LOCAL_LOOP_UPDATE, &flags);
21333b48
AV		 2623
2624 } else if (ha->current_topology == ISP_CFG_N) {
2625 clear_bit(RSCN_UPDATE, &flags);
1da177e4 2626
e315cd28 2627 } else if (!vha->flags.online ||
1da177e4
LT		 2628 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
2629
e315cd28 2630 vha->flags.rscn_queue_overflow = 1;
1da177e4
LT		 2631 set_bit(RSCN_UPDATE, &flags);
2632 set_bit(LOCAL_LOOP_UPDATE, &flags);
2633 }
2634
2635 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
7c3df132
SK		 2636 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
2637 ql_dbg(ql_dbg_disc, vha, 0x2015,
2638 "Loop resync needed, failing.\n");
1da177e4 2639 rval = QLA_FUNCTION_FAILED;
7c3df132 2640 }
e315cd28
AC		 2641 else
2642 rval = qla2x00_configure_local_loop(vha);
1da177e4
LT		 2643 }
2644
2645 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
7c3df132
SK		 2646 if (LOOP_TRANSITION(vha)) {
2647 ql_dbg(ql_dbg_disc, vha, 0x201e,
2648 "Needs RSCN update and loop transition.\n");
1da177e4 2649 rval = QLA_FUNCTION_FAILED;
7c3df132 2650 }
e315cd28
AC		 2651 else
2652 rval = qla2x00_configure_fabric(vha);
1da177e4
LT		 2653 }
2654
2655 if (rval == QLA_SUCCESS) {
e315cd28
AC		 2656 if (atomic_read(&vha->loop_down_timer) ||
2657 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1da177e4
LT		 2658 rval = QLA_FUNCTION_FAILED;
2659 } else {
e315cd28 2660 atomic_set(&vha->loop_state, LOOP_READY);
7c3df132
SK		 2661 ql_dbg(ql_dbg_disc, vha, 0x2069,
2662 "LOOP READY.\n");
1da177e4
LT		 2663 }
2664 }
2665
2666 if (rval) {
7c3df132
SK		 2667 ql_dbg(ql_dbg_disc, vha, 0x206a,
2668 "%s *** FAILED ***.\n", __func__);
1da177e4 2669 } else {
7c3df132
SK		 2670 ql_dbg(ql_dbg_disc, vha, 0x206b,
2671 "%s: exiting normally.\n", __func__);
1da177e4
LT		 2672 }
2673
cc3ef7bc 2674 /* Restore state if a resync event occurred during processing */
e315cd28 2675 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1da177e4 2676 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
e315cd28 2677 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
f4658b6c 2678 if (test_bit(RSCN_UPDATE, &save_flags)) {
e315cd28 2679 set_bit(RSCN_UPDATE, &vha->dpc_flags);
3a6478df
GM		 2680 if (!IS_ALOGIO_CAPABLE(ha))
2681 vha->flags.rscn_queue_overflow = 1;
f4658b6c 2682 }
1da177e4
LT		 2683 }
2684
2685 return (rval);
2686}
2687
2688
2689
2690/*
2691 * qla2x00_configure_local_loop
2692 * Updates Fibre Channel Device Database with local loop devices.
2693 *
2694 * Input:
2695 * ha = adapter block pointer.
2696 *
2697 * Returns:
2698 * 0 = success.
2699 */
2700static int
e315cd28 2701qla2x00_configure_local_loop(scsi_qla_host_t *vha)
1da177e4
LT		 2702{
2703 int rval, rval2;
2704 int found_devs;
2705 int found;
2706 fc_port_t *fcport, *new_fcport;
2707
2708 uint16_t index;
2709 uint16_t entries;
2710 char *id_iter;
2711 uint16_t loop_id;
2712 uint8_t domain, area, al_pa;
e315cd28 2713 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 2714
2715 found_devs = 0;
2716 new_fcport = NULL;
2717 entries = MAX_FIBRE_DEVICES;
2718
7c3df132
SK		 2719 ql_dbg(ql_dbg_disc, vha, 0x2016,
2720 "Getting FCAL position map.\n");
2721 if (ql2xextended_error_logging & ql_dbg_disc)
2722 qla2x00_get_fcal_position_map(vha, NULL);
1da177e4
LT		 2723
2724 /* Get list of logged in devices. */
2725 memset(ha->gid_list, 0, GID_LIST_SIZE);
e315cd28 2726 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
1da177e4
LT		 2727 &entries);
2728 if (rval != QLA_SUCCESS)
2729 goto cleanup_allocation;
2730
7c3df132
SK		 2731 ql_dbg(ql_dbg_disc, vha, 0x2017,
2732 "Entries in ID list (%d).\n", entries);
2733 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
2734 (uint8_t *)ha->gid_list,
2735 entries * sizeof(struct gid_list_info));
1da177e4
LT		 2736
2737 /* Allocate temporary fcport for any new fcports discovered. */
e315cd28 2738 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 2739 if (new_fcport == NULL) {
7c3df132
SK		 2740 ql_log(ql_log_warn, vha, 0x2018,
2741 "Memory allocation failed for fcport.\n");
1da177e4
LT		 2742 rval = QLA_MEMORY_ALLOC_FAILED;
2743 goto cleanup_allocation;
2744 }
2745 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
2746
2747 /*
2748 * Mark local devices that were present with FCF_DEVICE_LOST for now.
2749 */
e315cd28 2750 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 2751 if (atomic_read(&fcport->state) == FCS_ONLINE &&
2752 fcport->port_type != FCT_BROADCAST &&
2753 (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
2754
7c3df132
SK		 2755 ql_dbg(ql_dbg_disc, vha, 0x2019,
2756 "Marking port lost loop_id=0x%04x.\n",
2757 fcport->loop_id);
1da177e4 2758
ec426e10 2759 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
1da177e4
LT		 2760 }
2761 }
2762
2763 /* Add devices to port list. */
2764 id_iter = (char *)ha->gid_list;
2765 for (index = 0; index < entries; index++) {
2766 domain = ((struct gid_list_info *)id_iter)->domain;
2767 area = ((struct gid_list_info *)id_iter)->area;
2768 al_pa = ((struct gid_list_info *)id_iter)->al_pa;
abbd8870 2769 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1da177e4
LT		 2770 loop_id = (uint16_t)
2771 ((struct gid_list_info *)id_iter)->loop_id_2100;
abbd8870 2772 else
1da177e4
LT		 2773 loop_id = le16_to_cpu(
2774 ((struct gid_list_info *)id_iter)->loop_id);
abbd8870 2775 id_iter += ha->gid_list_info_size;
1da177e4
LT		 2776
2777 /* Bypass reserved domain fields. */
2778 if ((domain & 0xf0) == 0xf0)
2779 continue;
2780
2781 /* Bypass if not same domain and area of adapter. */
f7d289f6 2782 if (area && domain &&
e315cd28 2783 (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
1da177e4
LT		 2784 continue;
2785
2786 /* Bypass invalid local loop ID. */
2787 if (loop_id > LAST_LOCAL_LOOP_ID)
2788 continue;
2789
2790 /* Fill in member data. */
2791 new_fcport->d_id.b.domain = domain;
2792 new_fcport->d_id.b.area = area;
2793 new_fcport->d_id.b.al_pa = al_pa;
2794 new_fcport->loop_id = loop_id;
e315cd28
AC		 2795 new_fcport->vp_idx = vha->vp_idx;
2796 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
1da177e4 2797 if (rval2 != QLA_SUCCESS) {
7c3df132
SK		 2798 ql_dbg(ql_dbg_disc, vha, 0x201a,
2799 "Failed to retrieve fcport information "
2800 "-- get_port_database=%x, loop_id=0x%04x.\n",
2801 rval2, new_fcport->loop_id);
2802 ql_dbg(ql_dbg_disc, vha, 0x201b,
2803 "Scheduling resync.\n");
e315cd28 2804 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1da177e4
LT		 2805 continue;
2806 }
2807
2808 /* Check for matching device in port list. */
2809 found = 0;
2810 fcport = NULL;
e315cd28 2811 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 2812 if (memcmp(new_fcport->port_name, fcport->port_name,
2813 WWN_SIZE))
2814 continue;
2815
ddb9b126 2816 fcport->flags &= ~FCF_FABRIC_DEVICE;
1da177e4
LT		 2817 fcport->loop_id = new_fcport->loop_id;
2818 fcport->port_type = new_fcport->port_type;
2819 fcport->d_id.b24 = new_fcport->d_id.b24;
2820 memcpy(fcport->node_name, new_fcport->node_name,
2821 WWN_SIZE);
2822
2823 found++;
2824 break;
2825 }
2826
2827 if (!found) {
2828 /* New device, add to fcports list. */
e315cd28
AC		 2829 if (vha->vp_idx) {
2830 new_fcport->vha = vha;
2831 new_fcport->vp_idx = vha->vp_idx;
2c3dfe3f 2832 }
e315cd28 2833 list_add_tail(&new_fcport->list, &vha->vp_fcports);
1da177e4
LT		 2834
2835 /* Allocate a new replacement fcport. */
2836 fcport = new_fcport;
e315cd28 2837 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 2838 if (new_fcport == NULL) {
7c3df132
SK		 2839 ql_log(ql_log_warn, vha, 0x201c,
2840 "Failed to allocate memory for fcport.\n");
1da177e4
LT		 2841 rval = QLA_MEMORY_ALLOC_FAILED;
2842 goto cleanup_allocation;
2843 }
2844 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
2845 }
2846
d8b45213 2847 /* Base iIDMA settings on HBA port speed. */
a3cbdfad 2848 fcport->fp_speed = ha->link_data_rate;
d8b45213 2849
e315cd28 2850 qla2x00_update_fcport(vha, fcport);
1da177e4
LT		 2851
2852 found_devs++;
2853 }
2854
2855cleanup_allocation:
c9475cb0 2856 kfree(new_fcport);
1da177e4
LT		 2857
2858 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2859 ql_dbg(ql_dbg_disc, vha, 0x201d,
2860 "Configure local loop error exit: rval=%x.\n", rval);
1da177e4
LT		 2861 }
2862
1da177e4
LT		 2863 return (rval);
2864}
2865
d8b45213 2866static void
e315cd28 2867qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
d8b45213
AV		 2868{
2869#define LS_UNKNOWN 2
9f8fddee
AV		 2870 static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
2871 char *link_speed;
d8b45213 2872 int rval;
1bb39548 2873 uint16_t mb[4];
e315cd28 2874 struct qla_hw_data *ha = vha->hw;
d8b45213 2875
c76f2c01 2876 if (!IS_IIDMA_CAPABLE(ha))
d8b45213
AV		 2877 return;
2878
c9afb9a2
GM		 2879 if (atomic_read(&fcport->state) != FCS_ONLINE)
2880 return;
2881
39bd9622
AV		 2882 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
2883 fcport->fp_speed > ha->link_data_rate)
d8b45213
AV		 2884 return;
2885
e315cd28 2886 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
a3cbdfad 2887 mb);
d8b45213 2888 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2889 ql_dbg(ql_dbg_disc, vha, 0x2004,
2890 "Unable to adjust iIDMA "
2891 "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x "
2892 "%04x.\n", fcport->port_name[0], fcport->port_name[1],
d8b45213
AV		 2893 fcport->port_name[2], fcport->port_name[3],
2894 fcport->port_name[4], fcport->port_name[5],
2895 fcport->port_name[6], fcport->port_name[7], rval,
7c3df132 2896 fcport->fp_speed, mb[0], mb[1]);
d8b45213 2897 } else {
9f8fddee
AV		 2898 link_speed = link_speeds[LS_UNKNOWN];
2899 if (fcport->fp_speed < 5)
2900 link_speed = link_speeds[fcport->fp_speed];
2901 else if (fcport->fp_speed == 0x13)
2902 link_speed = link_speeds[5];
7c3df132
SK		 2903 ql_dbg(ql_dbg_disc, vha, 0x2005,
2904 "iIDMA adjusted to %s GB/s "
2905 "on %02x%02x%02x%02x%02x%02x%02x%02x.\n", link_speed,
2906 fcport->port_name[0], fcport->port_name[1],
2907 fcport->port_name[2], fcport->port_name[3],
2908 fcport->port_name[4], fcport->port_name[5],
2909 fcport->port_name[6], fcport->port_name[7]);
d8b45213
AV		 2910 }
2911}
2912
23be331d 2913static void
e315cd28 2914qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
8482e118
AV		 2915{
2916 struct fc_rport_identifiers rport_ids;
bdf79621 2917 struct fc_rport *rport;
044d78e1 2918 unsigned long flags;
8482e118 2919
ac280b67 2920 qla2x00_rport_del(fcport);
8482e118 2921
f8b02a85
AV		 2922 rport_ids.node_name = wwn_to_u64(fcport->node_name);
2923 rport_ids.port_name = wwn_to_u64(fcport->port_name);
8482e118
AV		 2924 rport_ids.port_id = fcport->d_id.b.domain << 16 |
2925 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
77d74143 2926 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
e315cd28 2927 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
77d74143 2928 if (!rport) {
7c3df132
SK		 2929 ql_log(ql_log_warn, vha, 0x2006,
2930 "Unable to allocate fc remote port.\n");
77d74143
AV		 2931 return;
2932 }
044d78e1 2933 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
19a7b4ae 2934 *((fc_port_t **)rport->dd_data) = fcport;
044d78e1 2935 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
d97994dc 2936
ad3e0eda 2937 rport->supported_classes = fcport->supported_classes;
77d74143 2938
8482e118
AV		 2939 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
2940 if (fcport->port_type == FCT_INITIATOR)
2941 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
2942 if (fcport->port_type == FCT_TARGET)
2943 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
77d74143 2944 fc_remote_port_rolechg(rport, rport_ids.roles);
1da177e4
LT		 2945}
2946
23be331d
AB		 2947/*
2948 * qla2x00_update_fcport
2949 * Updates device on list.
2950 *
2951 * Input:
2952 * ha = adapter block pointer.
2953 * fcport = port structure pointer.
2954 *
2955 * Return:
2956 * 0 - Success
2957 * BIT_0 - error
2958 *
2959 * Context:
2960 * Kernel context.
2961 */
2962void
e315cd28 2963qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
23be331d 2964{
e315cd28 2965 fcport->vha = vha;
23be331d 2966 fcport->login_retry = 0;
5ff1d584 2967 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
23be331d 2968
e315cd28 2969 qla2x00_iidma_fcport(vha, fcport);
21090cbe 2970 qla24xx_update_fcport_fcp_prio(vha, fcport);
e315cd28 2971 qla2x00_reg_remote_port(vha, fcport);
ec426e10 2972 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
23be331d
AB		 2973}
2974
1da177e4
LT		 2975/*
2976 * qla2x00_configure_fabric
2977 * Setup SNS devices with loop ID's.
2978 *
2979 * Input:
2980 * ha = adapter block pointer.
2981 *
2982 * Returns:
2983 * 0 = success.
2984 * BIT_0 = error
2985 */
2986static int
e315cd28 2987qla2x00_configure_fabric(scsi_qla_host_t *vha)
1da177e4
LT		 2988{
2989 int rval, rval2;
2990 fc_port_t *fcport, *fcptemp;
2991 uint16_t next_loopid;
2992 uint16_t mb[MAILBOX_REGISTER_COUNT];
0107109e 2993 uint16_t loop_id;
1da177e4 2994 LIST_HEAD(new_fcports);
e315cd28
AC		 2995 struct qla_hw_data *ha = vha->hw;
2996 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
1da177e4
LT		 2997
2998 /* If FL port exists, then SNS is present */
e428924c 2999 if (IS_FWI2_CAPABLE(ha))
0107109e
AV		 3000 loop_id = NPH_F_PORT;
3001 else
3002 loop_id = SNS_FL_PORT;
e315cd28 3003 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
1da177e4 3004 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3005 ql_dbg(ql_dbg_disc, vha, 0x201f,
3006 "MBX_GET_PORT_NAME failed, No FL Port.\n");
1da177e4 3007
e315cd28 3008 vha->device_flags &= ~SWITCH_FOUND;
1da177e4
LT		 3009 return (QLA_SUCCESS);
3010 }
e315cd28 3011 vha->device_flags |= SWITCH_FOUND;
1da177e4
LT		 3012
3013 /* Mark devices that need re-synchronization. */
e315cd28 3014 rval2 = qla2x00_device_resync(vha);
1da177e4
LT		 3015 if (rval2 == QLA_RSCNS_HANDLED) {
3016 /* No point doing the scan, just continue. */
3017 return (QLA_SUCCESS);
3018 }
3019 do {
cca5335c
AV		 3020 /* FDMI support. */
3021 if (ql2xfdmienable &&
e315cd28
AC		 3022 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
3023 qla2x00_fdmi_register(vha);
cca5335c 3024
1da177e4 3025 /* Ensure we are logged into the SNS. */
e428924c 3026 if (IS_FWI2_CAPABLE(ha))
0107109e
AV		 3027 loop_id = NPH_SNS;
3028 else
3029 loop_id = SIMPLE_NAME_SERVER;
e315cd28 3030 ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
abbd8870 3031 0xfc, mb, BIT_1 | BIT_0);
1da177e4 3032 if (mb[0] != MBS_COMMAND_COMPLETE) {
7c3df132
SK		 3033 ql_dbg(ql_dbg_disc, vha, 0x2042,
3034 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x "
3035 "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1],
3036 mb[2], mb[6], mb[7]);
1da177e4
LT		 3037 return (QLA_SUCCESS);
3038 }
3039
e315cd28
AC		 3040 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
3041 if (qla2x00_rft_id(vha)) {
1da177e4 3042 /* EMPTY */
7c3df132
SK		 3043 ql_dbg(ql_dbg_disc, vha, 0x2045,
3044 "Register FC-4 TYPE failed.\n");
1da177e4 3045 }
e315cd28 3046 if (qla2x00_rff_id(vha)) {
1da177e4 3047 /* EMPTY */
7c3df132
SK		 3048 ql_dbg(ql_dbg_disc, vha, 0x2049,
3049 "Register FC-4 Features failed.\n");
1da177e4 3050 }
e315cd28 3051 if (qla2x00_rnn_id(vha)) {
1da177e4 3052 /* EMPTY */
7c3df132
SK		 3053 ql_dbg(ql_dbg_disc, vha, 0x204f,
3054 "Register Node Name failed.\n");
e315cd28 3055 } else if (qla2x00_rsnn_nn(vha)) {
1da177e4 3056 /* EMPTY */
7c3df132
SK		 3057 ql_dbg(ql_dbg_disc, vha, 0x2053,
3058 "Register Symobilic Node Name failed.\n");
1da177e4
LT		 3059 }
3060 }
3061
e315cd28 3062 rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
1da177e4
LT		 3063 if (rval != QLA_SUCCESS)
3064 break;
3065
3066 /*
3067 * Logout all previous fabric devices marked lost, except
f08b7251 3068 * FCP2 devices.
1da177e4 3069 */
e315cd28
AC		 3070 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3071 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1da177e4
LT		 3072 break;
3073
3074 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
3075 continue;
3076
3077 if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
e315cd28 3078 qla2x00_mark_device_lost(vha, fcport,
d97994dc 3079 ql2xplogiabsentdevice, 0);
1da177e4 3080 if (fcport->loop_id != FC_NO_LOOP_ID &&
f08b7251 3081 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
1da177e4
LT		 3082 fcport->port_type != FCT_INITIATOR &&
3083 fcport->port_type != FCT_BROADCAST) {
e315cd28 3084 ha->isp_ops->fabric_logout(vha,
1c7c6357
AV		 3085 fcport->loop_id,
3086 fcport->d_id.b.domain,
3087 fcport->d_id.b.area,
3088 fcport->d_id.b.al_pa);
1da177e4
LT		 3089 fcport->loop_id = FC_NO_LOOP_ID;
3090 }
3091 }
3092 }
3093
3094 /* Starting free loop ID. */
e315cd28 3095 next_loopid = ha->min_external_loopid;
1da177e4
LT		 3096
3097 /*
3098 * Scan through our port list and login entries that need to be
3099 * logged in.
3100 */
e315cd28
AC		 3101 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3102 if (atomic_read(&vha->loop_down_timer) ||
3103 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1da177e4
LT		 3104 break;
3105
3106 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
3107 (fcport->flags & FCF_LOGIN_NEEDED) == 0)
3108 continue;
3109
3110 if (fcport->loop_id == FC_NO_LOOP_ID) {
3111 fcport->loop_id = next_loopid;
d4486fd6 3112 rval = qla2x00_find_new_loop_id(
e315cd28 3113 base_vha, fcport);
1da177e4
LT		 3114 if (rval != QLA_SUCCESS) {
3115 /* Ran out of IDs to use */
3116 break;
3117 }
3118 }
1da177e4 3119 /* Login and update database */
e315cd28 3120 qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
1da177e4
LT		 3121 }
3122
3123 /* Exit if out of loop IDs. */
3124 if (rval != QLA_SUCCESS) {
3125 break;
3126 }
3127
3128 /*
3129 * Login and add the new devices to our port list.
3130 */
3131 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
e315cd28
AC		 3132 if (atomic_read(&vha->loop_down_timer) ||
3133 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1da177e4
LT		 3134 break;
3135
3136 /* Find a new loop ID to use. */
3137 fcport->loop_id = next_loopid;
e315cd28 3138 rval = qla2x00_find_new_loop_id(base_vha, fcport);
1da177e4
LT		 3139 if (rval != QLA_SUCCESS) {
3140 /* Ran out of IDs to use */
3141 break;
3142 }
3143
bdf79621 3144 /* Login and update database */
e315cd28
AC		 3145 qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
3146
3147 if (vha->vp_idx) {
3148 fcport->vha = vha;
3149 fcport->vp_idx = vha->vp_idx;
3150 }
3151 list_move_tail(&fcport->list, &vha->vp_fcports);
1da177e4
LT		 3152 }
3153 } while (0);
3154
3155 /* Free all new device structures not processed. */
3156 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
3157 list_del(&fcport->list);
3158 kfree(fcport);
3159 }
3160
3161 if (rval) {
7c3df132
SK		 3162 ql_dbg(ql_dbg_disc, vha, 0x2068,
3163 "Configure fabric error exit rval=%d.\n", rval);
1da177e4
LT		 3164 }
3165
3166 return (rval);
3167}
3168
1da177e4
LT		 3169/*
3170 * qla2x00_find_all_fabric_devs
3171 *
3172 * Input:
3173 * ha = adapter block pointer.
3174 * dev = database device entry pointer.
3175 *
3176 * Returns:
3177 * 0 = success.
3178 *
3179 * Context:
3180 * Kernel context.
3181 */
3182static int
e315cd28
AC		 3183qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
3184 struct list_head *new_fcports)
1da177e4
LT		 3185{
3186 int rval;
3187 uint16_t loop_id;
3188 fc_port_t *fcport, *new_fcport, *fcptemp;
3189 int found;
3190
3191 sw_info_t *swl;
3192 int swl_idx;
3193 int first_dev, last_dev;
1516ef44 3194 port_id_t wrap = {}, nxt_d_id;
e315cd28
AC		 3195 struct qla_hw_data *ha = vha->hw;
3196 struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
ee546b6e 3197 struct scsi_qla_host *tvp;
1da177e4
LT		 3198
3199 rval = QLA_SUCCESS;
3200
3201 /* Try GID_PT to get device list, else GAN. */
4b89258c 3202 swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
bbfbbbc1 3203 if (!swl) {
1da177e4 3204 /*EMPTY*/
7c3df132
SK		 3205 ql_dbg(ql_dbg_disc, vha, 0x2054,
3206 "GID_PT allocations failed, fallback on GA_NXT.\n");
1da177e4 3207 } else {
e315cd28 3208 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
1da177e4
LT		 3209 kfree(swl);
3210 swl = NULL;
e315cd28 3211 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
1da177e4
LT		 3212 kfree(swl);
3213 swl = NULL;
e315cd28 3214 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
1da177e4
LT		 3215 kfree(swl);
3216 swl = NULL;
e5896bd5 3217 } else if (ql2xiidmaenable &&
e315cd28
AC		 3218 qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
3219 qla2x00_gpsc(vha, swl);
1da177e4 3220 }
e8c72ba5
CD		 3221
3222 /* If other queries succeeded probe for FC-4 type */
3223 if (swl)
3224 qla2x00_gff_id(vha, swl);
1da177e4
LT		 3225 }
3226 swl_idx = 0;
3227
3228 /* Allocate temporary fcport for any new fcports discovered. */
e315cd28 3229 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 3230 if (new_fcport == NULL) {
7c3df132
SK		 3231 ql_log(ql_log_warn, vha, 0x205e,
3232 "Failed to allocate memory for fcport.\n");
c9475cb0 3233 kfree(swl);
1da177e4
LT		 3234 return (QLA_MEMORY_ALLOC_FAILED);
3235 }
3236 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
1da177e4
LT		 3237 /* Set start port ID scan at adapter ID. */
3238 first_dev = 1;
3239 last_dev = 0;
3240
3241 /* Starting free loop ID. */
e315cd28
AC		 3242 loop_id = ha->min_external_loopid;
3243 for (; loop_id <= ha->max_loop_id; loop_id++) {
3244 if (qla2x00_is_reserved_id(vha, loop_id))
1da177e4
LT		 3245 continue;
3246
3a6478df
GM		 3247 if (ha->current_topology == ISP_CFG_FL &&
3248 (atomic_read(&vha->loop_down_timer) ||
3249 LOOP_TRANSITION(vha))) {
bb2d52b2
AV		 3250 atomic_set(&vha->loop_down_timer, 0);
3251 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3252 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1da177e4 3253 break;
bb2d52b2 3254 }
1da177e4
LT		 3255
3256 if (swl != NULL) {
3257 if (last_dev) {
3258 wrap.b24 = new_fcport->d_id.b24;
3259 } else {
3260 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
3261 memcpy(new_fcport->node_name,
3262 swl[swl_idx].node_name, WWN_SIZE);
3263 memcpy(new_fcport->port_name,
3264 swl[swl_idx].port_name, WWN_SIZE);
d8b45213
AV		 3265 memcpy(new_fcport->fabric_port_name,
3266 swl[swl_idx].fabric_port_name, WWN_SIZE);
3267 new_fcport->fp_speed = swl[swl_idx].fp_speed;
e8c72ba5 3268 new_fcport->fc4_type = swl[swl_idx].fc4_type;
1da177e4
LT		 3269
3270 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
3271 last_dev = 1;
3272 }
3273 swl_idx++;
3274 }
3275 } else {
3276 /* Send GA_NXT to the switch */
e315cd28 3277 rval = qla2x00_ga_nxt(vha, new_fcport);
1da177e4 3278 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3279 ql_log(ql_log_warn, vha, 0x2064,
3280 "SNS scan failed -- assuming "
3281 "zero-entry result.\n");
1da177e4
LT		 3282 list_for_each_entry_safe(fcport, fcptemp,
3283 new_fcports, list) {
3284 list_del(&fcport->list);
3285 kfree(fcport);
3286 }
3287 rval = QLA_SUCCESS;
3288 break;
3289 }
3290 }
3291
3292 /* If wrap on switch device list, exit. */
3293 if (first_dev) {
3294 wrap.b24 = new_fcport->d_id.b24;
3295 first_dev = 0;
3296 } else if (new_fcport->d_id.b24 == wrap.b24) {
7c3df132
SK		 3297 ql_dbg(ql_dbg_disc, vha, 0x2065,
3298 "Device wrap (%02x%02x%02x).\n",
3299 new_fcport->d_id.b.domain,
3300 new_fcport->d_id.b.area,
3301 new_fcport->d_id.b.al_pa);
1da177e4
LT		 3302 break;
3303 }
3304
2c3dfe3f 3305 /* Bypass if same physical adapter. */
e315cd28 3306 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
1da177e4
LT		 3307 continue;
3308
2c3dfe3f 3309 /* Bypass virtual ports of the same host. */
e315cd28
AC		 3310 found = 0;
3311 if (ha->num_vhosts) {
feafb7b1
AE		 3312 unsigned long flags;
3313
3314 spin_lock_irqsave(&ha->vport_slock, flags);
ee546b6e 3315 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
e315cd28
AC		 3316 if (new_fcport->d_id.b24 == vp->d_id.b24) {
3317 found = 1;
2c3dfe3f 3318 break;
e315cd28 3319 }
2c3dfe3f 3320 }
feafb7b1
AE		 3321 spin_unlock_irqrestore(&ha->vport_slock, flags);
3322
e315cd28 3323 if (found)
2c3dfe3f
SJ		 3324 continue;
3325 }
3326
f7d289f6
AV		 3327 /* Bypass if same domain and area of adapter. */
3328 if (((new_fcport->d_id.b24 & 0xffff00) ==
e315cd28 3329 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
f7d289f6
AV		 3330 ISP_CFG_FL)
3331 continue;
3332
1da177e4
LT		 3333 /* Bypass reserved domain fields. */
3334 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
3335 continue;
3336
e8c72ba5 3337 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
4da26e16
CD		 3338 if (ql2xgffidenable &&
3339 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
3340 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
e8c72ba5
CD		 3341 continue;
3342
1da177e4
LT		 3343 /* Locate matching device in database. */
3344 found = 0;
e315cd28 3345 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 3346 if (memcmp(new_fcport->port_name, fcport->port_name,
3347 WWN_SIZE))
3348 continue;
3349
3350 found++;
3351
d8b45213
AV		 3352 /* Update port state. */
3353 memcpy(fcport->fabric_port_name,
3354 new_fcport->fabric_port_name, WWN_SIZE);
3355 fcport->fp_speed = new_fcport->fp_speed;
3356
1da177e4
LT		 3357 /*
3358 * If address the same and state FCS_ONLINE, nothing
3359 * changed.
3360 */
3361 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
3362 atomic_read(&fcport->state) == FCS_ONLINE) {
3363 break;
3364 }
3365
3366 /*
3367 * If device was not a fabric device before.
3368 */
3369 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
3370 fcport->d_id.b24 = new_fcport->d_id.b24;
3371 fcport->loop_id = FC_NO_LOOP_ID;
3372 fcport->flags |= (FCF_FABRIC_DEVICE |
3373 FCF_LOGIN_NEEDED);
1da177e4
LT		 3374 break;
3375 }
3376
3377 /*
3378 * Port ID changed or device was marked to be updated;
3379 * Log it out if still logged in and mark it for
3380 * relogin later.
3381 */
3382 fcport->d_id.b24 = new_fcport->d_id.b24;
3383 fcport->flags |= FCF_LOGIN_NEEDED;
3384 if (fcport->loop_id != FC_NO_LOOP_ID &&
f08b7251 3385 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
1da177e4
LT		 3386 fcport->port_type != FCT_INITIATOR &&
3387 fcport->port_type != FCT_BROADCAST) {
e315cd28 3388 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 3389 fcport->d_id.b.domain, fcport->d_id.b.area,
3390 fcport->d_id.b.al_pa);
1da177e4
LT		 3391 fcport->loop_id = FC_NO_LOOP_ID;
3392 }
3393
3394 break;
3395 }
3396
3397 if (found)
3398 continue;
1da177e4
LT		 3399 /* If device was not in our fcports list, then add it. */
3400 list_add_tail(&new_fcport->list, new_fcports);
3401
3402 /* Allocate a new replacement fcport. */
3403 nxt_d_id.b24 = new_fcport->d_id.b24;
e315cd28 3404 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 3405 if (new_fcport == NULL) {
7c3df132
SK		 3406 ql_log(ql_log_warn, vha, 0x2066,
3407 "Memory allocation failed for fcport.\n");
c9475cb0 3408 kfree(swl);
1da177e4
LT		 3409 return (QLA_MEMORY_ALLOC_FAILED);
3410 }
3411 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
3412 new_fcport->d_id.b24 = nxt_d_id.b24;
3413 }
3414
c9475cb0
JJ		 3415 kfree(swl);
3416 kfree(new_fcport);
1da177e4 3417
1da177e4
LT		 3418 return (rval);
3419}
3420
3421/*
3422 * qla2x00_find_new_loop_id
3423 * Scan through our port list and find a new usable loop ID.
3424 *
3425 * Input:
3426 * ha: adapter state pointer.
3427 * dev: port structure pointer.
3428 *
3429 * Returns:
3430 * qla2x00 local function return status code.
3431 *
3432 * Context:
3433 * Kernel context.
3434 */
03bcfb57 3435int
e315cd28 3436qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
1da177e4
LT		 3437{
3438 int rval;
3439 int found;
3440 fc_port_t *fcport;
3441 uint16_t first_loop_id;
e315cd28
AC		 3442 struct qla_hw_data *ha = vha->hw;
3443 struct scsi_qla_host *vp;
ee546b6e 3444 struct scsi_qla_host *tvp;
feafb7b1 3445 unsigned long flags = 0;
1da177e4
LT		 3446
3447 rval = QLA_SUCCESS;
3448
3449 /* Save starting loop ID. */
3450 first_loop_id = dev->loop_id;
3451
3452 for (;;) {
3453 /* Skip loop ID if already used by adapter. */
e315cd28 3454 if (dev->loop_id == vha->loop_id)
1da177e4 3455 dev->loop_id++;
1da177e4
LT		 3456
3457 /* Skip reserved loop IDs. */
e315cd28 3458 while (qla2x00_is_reserved_id(vha, dev->loop_id))
1da177e4 3459 dev->loop_id++;
1da177e4
LT		 3460
3461 /* Reset loop ID if passed the end. */
e315cd28 3462 if (dev->loop_id > ha->max_loop_id) {
1da177e4
LT		 3463 /* first loop ID. */
3464 dev->loop_id = ha->min_external_loopid;
3465 }
3466
3467 /* Check for loop ID being already in use. */
3468 found = 0;
3469 fcport = NULL;
feafb7b1
AE		 3470
3471 spin_lock_irqsave(&ha->vport_slock, flags);
ee546b6e 3472 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
e315cd28
AC		 3473 list_for_each_entry(fcport, &vp->vp_fcports, list) {
3474 if (fcport->loop_id == dev->loop_id &&
3475 fcport != dev) {
3476 /* ID possibly in use */
3477 found++;
3478 break;
3479 }
1da177e4 3480 }
e315cd28
AC		 3481 if (found)
3482 break;
1da177e4 3483 }
feafb7b1 3484 spin_unlock_irqrestore(&ha->vport_slock, flags);
1da177e4
LT		 3485
3486 /* If not in use then it is free to use. */
3487 if (!found) {
3488 break;
3489 }
3490
3491 /* ID in use. Try next value. */
3492 dev->loop_id++;
3493
3494 /* If wrap around. No free ID to use. */
3495 if (dev->loop_id == first_loop_id) {
3496 dev->loop_id = FC_NO_LOOP_ID;
3497 rval = QLA_FUNCTION_FAILED;
3498 break;
3499 }
3500 }
3501
3502 return (rval);
3503}
3504
3505/*
3506 * qla2x00_device_resync
3507 * Marks devices in the database that needs resynchronization.
3508 *
3509 * Input:
3510 * ha = adapter block pointer.
3511 *
3512 * Context:
3513 * Kernel context.
3514 */
3515static int
e315cd28 3516qla2x00_device_resync(scsi_qla_host_t *vha)
1da177e4
LT		 3517{
3518 int rval;
1da177e4
LT		 3519 uint32_t mask;
3520 fc_port_t *fcport;
3521 uint32_t rscn_entry;
3522 uint8_t rscn_out_iter;
3523 uint8_t format;
1516ef44 3524 port_id_t d_id = {};
1da177e4
LT		 3525
3526 rval = QLA_RSCNS_HANDLED;
3527
e315cd28
AC		 3528 while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
3529 vha->flags.rscn_queue_overflow) {
1da177e4 3530
e315cd28 3531 rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
1da177e4
LT		 3532 format = MSB(MSW(rscn_entry));
3533 d_id.b.domain = LSB(MSW(rscn_entry));
3534 d_id.b.area = MSB(LSW(rscn_entry));
3535 d_id.b.al_pa = LSB(LSW(rscn_entry));
3536
7c3df132
SK		 3537 ql_dbg(ql_dbg_disc, vha, 0x2020,
3538 "RSCN queue entry[%d] = [%02x/%02x%02x%02x].\n",
3539 vha->rscn_out_ptr, format, d_id.b.domain, d_id.b.area,
3540 d_id.b.al_pa);
1da177e4 3541
e315cd28
AC		 3542 vha->rscn_out_ptr++;
3543 if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
3544 vha->rscn_out_ptr = 0;
1da177e4
LT		 3545
3546 /* Skip duplicate entries. */
e315cd28
AC		 3547 for (rscn_out_iter = vha->rscn_out_ptr;
3548 !vha->flags.rscn_queue_overflow &&
3549 rscn_out_iter != vha->rscn_in_ptr;
1da177e4
LT		 3550 rscn_out_iter = (rscn_out_iter ==
3551 (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
3552
e315cd28 3553 if (rscn_entry != vha->rscn_queue[rscn_out_iter])
1da177e4
LT		 3554 break;
3555
7c3df132
SK		 3556 ql_dbg(ql_dbg_disc, vha, 0x2021,
3557 "Skipping duplicate RSCN queue entry found at "
3558 "[%d].\n", rscn_out_iter);
1da177e4 3559
e315cd28 3560 vha->rscn_out_ptr = rscn_out_iter;
1da177e4
LT		 3561 }
3562
3563 /* Queue overflow, set switch default case. */
e315cd28 3564 if (vha->flags.rscn_queue_overflow) {
7c3df132
SK		 3565 ql_dbg(ql_dbg_disc, vha, 0x2022,
3566 "device_resync: rscn overflow.\n");
1da177e4
LT		 3567
3568 format = 3;
e315cd28 3569 vha->flags.rscn_queue_overflow = 0;
1da177e4
LT		 3570 }
3571
3572 switch (format) {
3573 case 0:
1da177e4
LT		 3574 mask = 0xffffff;
3575 break;
3576 case 1:
3577 mask = 0xffff00;
3578 break;
3579 case 2:
3580 mask = 0xff0000;
3581 break;
3582 default:
3583 mask = 0x0;
3584 d_id.b24 = 0;
e315cd28 3585 vha->rscn_out_ptr = vha->rscn_in_ptr;
1da177e4
LT		 3586 break;
3587 }
3588
3589 rval = QLA_SUCCESS;
3590
e315cd28 3591 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 3592 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
3593 (fcport->d_id.b24 & mask) != d_id.b24 ||
3594 fcport->port_type == FCT_BROADCAST)
3595 continue;
3596
3597 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3598 if (format != 3 ||
3599 fcport->port_type != FCT_INITIATOR) {
e315cd28 3600 qla2x00_mark_device_lost(vha, fcport,
d97994dc 3601 0, 0);
1da177e4
LT		 3602 }
3603 }
1da177e4
LT		 3604 }
3605 }
3606 return (rval);
3607}
3608
3609/*
3610 * qla2x00_fabric_dev_login
3611 * Login fabric target device and update FC port database.
3612 *
3613 * Input:
3614 * ha: adapter state pointer.
3615 * fcport: port structure list pointer.
3616 * next_loopid: contains value of a new loop ID that can be used
3617 * by the next login attempt.
3618 *
3619 * Returns:
3620 * qla2x00 local function return status code.
3621 *
3622 * Context:
3623 * Kernel context.
3624 */
3625static int
e315cd28 3626qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
1da177e4
LT		 3627 uint16_t *next_loopid)
3628{
3629 int rval;
3630 int retry;
0107109e 3631 uint8_t opts;
e315cd28 3632 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 3633
3634 rval = QLA_SUCCESS;
3635 retry = 0;
3636
ac280b67 3637 if (IS_ALOGIO_CAPABLE(ha)) {
5ff1d584
AV		 3638 if (fcport->flags & FCF_ASYNC_SENT)
3639 return rval;
3640 fcport->flags |= FCF_ASYNC_SENT;
ac280b67
AV		 3641 rval = qla2x00_post_async_login_work(vha, fcport, NULL);
3642 if (!rval)
3643 return rval;
3644 }
3645
5ff1d584 3646 fcport->flags &= ~FCF_ASYNC_SENT;
e315cd28 3647 rval = qla2x00_fabric_login(vha, fcport, next_loopid);
1da177e4 3648 if (rval == QLA_SUCCESS) {
f08b7251 3649 /* Send an ADISC to FCP2 devices.*/
0107109e 3650 opts = 0;
f08b7251 3651 if (fcport->flags & FCF_FCP2_DEVICE)
0107109e 3652 opts |= BIT_1;
e315cd28 3653 rval = qla2x00_get_port_database(vha, fcport, opts);
1da177e4 3654 if (rval != QLA_SUCCESS) {
e315cd28 3655 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 3656 fcport->d_id.b.domain, fcport->d_id.b.area,
3657 fcport->d_id.b.al_pa);
e315cd28 3658 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1da177e4 3659 } else {
e315cd28 3660 qla2x00_update_fcport(vha, fcport);
1da177e4
LT		 3661 }
3662 }
3663
3664 return (rval);
3665}
3666
3667/*
3668 * qla2x00_fabric_login
3669 * Issue fabric login command.
3670 *
3671 * Input:
3672 * ha = adapter block pointer.
3673 * device = pointer to FC device type structure.
3674 *
3675 * Returns:
3676 * 0 - Login successfully
3677 * 1 - Login failed
3678 * 2 - Initiator device
3679 * 3 - Fatal error
3680 */
3681int
e315cd28 3682qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
1da177e4
LT		 3683 uint16_t *next_loopid)
3684{
3685 int rval;
3686 int retry;
3687 uint16_t tmp_loopid;
3688 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28 3689 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 3690
3691 retry = 0;
3692 tmp_loopid = 0;
3693
3694 for (;;) {
7c3df132
SK		 3695 ql_dbg(ql_dbg_disc, vha, 0x2000,
3696 "Trying Fabric Login w/loop id 0x%04x for port "
3697 "%02x%02x%02x.\n",
3698 fcport->loop_id, fcport->d_id.b.domain,
3699 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1da177e4
LT		 3700
3701 /* Login fcport on switch. */
e315cd28 3702 ha->isp_ops->fabric_login(vha, fcport->loop_id,
1da177e4
LT		 3703 fcport->d_id.b.domain, fcport->d_id.b.area,
3704 fcport->d_id.b.al_pa, mb, BIT_0);
3705 if (mb[0] == MBS_PORT_ID_USED) {
3706 /*
3707 * Device has another loop ID. The firmware team
0107109e
AV		 3708 * recommends the driver perform an implicit login with
3709 * the specified ID again. The ID we just used is save
3710 * here so we return with an ID that can be tried by
3711 * the next login.
1da177e4
LT		 3712 */
3713 retry++;
3714 tmp_loopid = fcport->loop_id;
3715 fcport->loop_id = mb[1];
3716
7c3df132
SK		 3717 ql_dbg(ql_dbg_disc, vha, 0x2001,
3718 "Fabric Login: port in use - next loop "
3719 "id=0x%04x, port id= %02x%02x%02x.\n",
1da177e4 3720 fcport->loop_id, fcport->d_id.b.domain,
7c3df132 3721 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1da177e4
LT		 3722
3723 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
3724 /*
3725 * Login succeeded.
3726 */
3727 if (retry) {
3728 /* A retry occurred before. */
3729 *next_loopid = tmp_loopid;
3730 } else {
3731 /*
3732 * No retry occurred before. Just increment the
3733 * ID value for next login.
3734 */
3735 *next_loopid = (fcport->loop_id + 1);
3736 }
3737
3738 if (mb[1] & BIT_0) {
3739 fcport->port_type = FCT_INITIATOR;
3740 } else {
3741 fcport->port_type = FCT_TARGET;
3742 if (mb[1] & BIT_1) {
8474f3a0 3743 fcport->flags |= FCF_FCP2_DEVICE;
1da177e4
LT		 3744 }
3745 }
3746
ad3e0eda
AV		 3747 if (mb[10] & BIT_0)
3748 fcport->supported_classes |= FC_COS_CLASS2;
3749 if (mb[10] & BIT_1)
3750 fcport->supported_classes |= FC_COS_CLASS3;
3751
1da177e4
LT		 3752 rval = QLA_SUCCESS;
3753 break;
3754 } else if (mb[0] == MBS_LOOP_ID_USED) {
3755 /*
3756 * Loop ID already used, try next loop ID.
3757 */
3758 fcport->loop_id++;
e315cd28 3759 rval = qla2x00_find_new_loop_id(vha, fcport);
1da177e4
LT		 3760 if (rval != QLA_SUCCESS) {
3761 /* Ran out of loop IDs to use */
3762 break;
3763 }
3764 } else if (mb[0] == MBS_COMMAND_ERROR) {
3765 /*
3766 * Firmware possibly timed out during login. If NO
3767 * retries are left to do then the device is declared
3768 * dead.
3769 */
3770 *next_loopid = fcport->loop_id;
e315cd28 3771 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 3772 fcport->d_id.b.domain, fcport->d_id.b.area,
3773 fcport->d_id.b.al_pa);
e315cd28 3774 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1da177e4
LT		 3775
3776 rval = 1;
3777 break;
3778 } else {
3779 /*
3780 * unrecoverable / not handled error
3781 */
7c3df132
SK		 3782 ql_dbg(ql_dbg_disc, vha, 0x2002,
3783 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
3784 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
3785 fcport->d_id.b.area, fcport->d_id.b.al_pa,
3786 fcport->loop_id, jiffies);
1da177e4
LT		 3787
3788 *next_loopid = fcport->loop_id;
e315cd28 3789 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 3790 fcport->d_id.b.domain, fcport->d_id.b.area,
3791 fcport->d_id.b.al_pa);
1da177e4 3792 fcport->loop_id = FC_NO_LOOP_ID;
0eedfcf0 3793 fcport->login_retry = 0;
1da177e4
LT		 3794
3795 rval = 3;
3796 break;
3797 }
3798 }
3799
3800 return (rval);
3801}
3802
3803/*
3804 * qla2x00_local_device_login
3805 * Issue local device login command.
3806 *
3807 * Input:
3808 * ha = adapter block pointer.
3809 * loop_id = loop id of device to login to.
3810 *
3811 * Returns (Where's the #define!!!!):
3812 * 0 - Login successfully
3813 * 1 - Login failed
3814 * 3 - Fatal error
3815 */
3816int
e315cd28 3817qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
1da177e4
LT		 3818{
3819 int rval;
3820 uint16_t mb[MAILBOX_REGISTER_COUNT];
3821
3822 memset(mb, 0, sizeof(mb));
e315cd28 3823 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
1da177e4
LT		 3824 if (rval == QLA_SUCCESS) {
3825 /* Interrogate mailbox registers for any errors */
3826 if (mb[0] == MBS_COMMAND_ERROR)
3827 rval = 1;
3828 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
3829 /* device not in PCB table */
3830 rval = 3;
3831 }
3832
3833 return (rval);
3834}
3835
3836/*
3837 * qla2x00_loop_resync
3838 * Resync with fibre channel devices.
3839 *
3840 * Input:
3841 * ha = adapter block pointer.
3842 *
3843 * Returns:
3844 * 0 = success
3845 */
3846int
e315cd28 3847qla2x00_loop_resync(scsi_qla_host_t *vha)
1da177e4 3848{
73208dfd 3849 int rval = QLA_SUCCESS;
1da177e4 3850 uint32_t wait_time;
67c2e93a
AC		 3851 struct req_que *req;
3852 struct rsp_que *rsp;
3853
7163ea81 3854 if (vha->hw->flags.cpu_affinity_enabled)
67c2e93a
AC		 3855 req = vha->hw->req_q_map[0];
3856 else
3857 req = vha->req;
3858 rsp = req->rsp;
1da177e4 3859
e315cd28
AC		 3860 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
3861 if (vha->flags.online) {
3862 if (!(rval = qla2x00_fw_ready(vha))) {
1da177e4
LT		 3863 /* Wait at most MAX_TARGET RSCNs for a stable link. */
3864 wait_time = 256;
3865 do {
0107109e 3866 /* Issue a marker after FW becomes ready. */
73208dfd
AC		 3867 qla2x00_marker(vha, req, rsp, 0, 0,
3868 MK_SYNC_ALL);
e315cd28 3869 vha->marker_needed = 0;
1da177e4
LT		 3870
3871 /* Remap devices on Loop. */
e315cd28 3872 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1da177e4 3873
e315cd28 3874 qla2x00_configure_loop(vha);
1da177e4 3875 wait_time--;
e315cd28
AC		 3876 } while (!atomic_read(&vha->loop_down_timer) &&
3877 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
3878 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
3879 &vha->dpc_flags)));
1da177e4 3880 }
1da177e4
LT		 3881 }
3882
e315cd28 3883 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
1da177e4 3884 return (QLA_FUNCTION_FAILED);
1da177e4 3885
e315cd28 3886 if (rval)
7c3df132
SK		 3887 ql_dbg(ql_dbg_disc, vha, 0x206c,
3888 "%s *** FAILED ***.\n", __func__);
1da177e4
LT		 3889
3890 return (rval);
3891}
3892
579d12b5
SK		 3893/*
3894* qla2x00_perform_loop_resync
3895* Description: This function will set the appropriate flags and call
3896* qla2x00_loop_resync. If successful loop will be resynced
3897* Arguments : scsi_qla_host_t pointer
3898* returm : Success or Failure
3899*/
3900
3901int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
3902{
3903 int32_t rval = 0;
3904
3905 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
3906 /*Configure the flags so that resync happens properly*/
3907 atomic_set(&ha->loop_down_timer, 0);
3908 if (!(ha->device_flags & DFLG_NO_CABLE)) {
3909 atomic_set(&ha->loop_state, LOOP_UP);
3910 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
3911 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
3912 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
3913
3914 rval = qla2x00_loop_resync(ha);
3915 } else
3916 atomic_set(&ha->loop_state, LOOP_DEAD);
3917
3918 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
3919 }
3920
3921 return rval;
3922}
3923
d97994dc 3924void
67becc00 3925qla2x00_update_fcports(scsi_qla_host_t *base_vha)
d97994dc
AV		 3926{
3927 fc_port_t *fcport;
feafb7b1
AE		 3928 struct scsi_qla_host *vha;
3929 struct qla_hw_data *ha = base_vha->hw;
3930 unsigned long flags;
d97994dc 3931
feafb7b1 3932 spin_lock_irqsave(&ha->vport_slock, flags);
d97994dc 3933 /* Go with deferred removal of rport references. */
feafb7b1
AE		 3934 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
3935 atomic_inc(&vha->vref_count);
3936 list_for_each_entry(fcport, &vha->vp_fcports, list) {
8ae598d0 3937 if (fcport->drport &&
feafb7b1
AE		 3938 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
3939 spin_unlock_irqrestore(&ha->vport_slock, flags);
3940
67becc00 3941 qla2x00_rport_del(fcport);
feafb7b1
AE		 3942
3943 spin_lock_irqsave(&ha->vport_slock, flags);
3944 }
3945 }
3946 atomic_dec(&vha->vref_count);
3947 }
3948 spin_unlock_irqrestore(&ha->vport_slock, flags);
d97994dc
AV		 3949}
3950
579d12b5
SK		 3951/*
3952* qla82xx_quiescent_state_cleanup
3953* Description: This function will block the new I/Os
3954* Its not aborting any I/Os as context
3955* is not destroyed during quiescence
3956* Arguments: scsi_qla_host_t
3957* return : void
3958*/
3959void
3960qla82xx_quiescent_state_cleanup(scsi_qla_host_t *vha)
3961{
3962 struct qla_hw_data *ha = vha->hw;
3963 struct scsi_qla_host *vp;
3964
7c3df132
SK		 3965 ql_dbg(ql_dbg_p3p, vha, 0xb002,
3966 "Performing ISP error recovery - ha=%p.\n", ha);
579d12b5
SK		 3967
3968 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
3969 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
3970 atomic_set(&vha->loop_state, LOOP_DOWN);
3971 qla2x00_mark_all_devices_lost(vha, 0);
3972 list_for_each_entry(vp, &ha->vp_list, list)
3973 qla2x00_mark_all_devices_lost(vha, 0);
3974 } else {
3975 if (!atomic_read(&vha->loop_down_timer))
3976 atomic_set(&vha->loop_down_timer,
3977 LOOP_DOWN_TIME);
3978 }
3979 /* Wait for pending cmds to complete */
3980 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
3981}
3982
a9083016
GM		 3983void
3984qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
3985{
3986 struct qla_hw_data *ha = vha->hw;
579d12b5 3987 struct scsi_qla_host *vp;
feafb7b1 3988 unsigned long flags;
6aef87be 3989 fc_port_t *fcport;
a9083016 3990
e46ef004
SK		 3991 /* For ISP82XX, driver waits for completion of the commands.
3992 * online flag should be set.
3993 */
3994 if (!IS_QLA82XX(ha))
3995 vha->flags.online = 0;
a9083016
GM		 3996 ha->flags.chip_reset_done = 0;
3997 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
3998 ha->qla_stats.total_isp_aborts++;
3999
7c3df132
SK		 4000 ql_log(ql_log_info, vha, 0x00af,
4001 "Performing ISP error recovery - ha=%p.\n", ha);
a9083016 4002
e46ef004
SK		 4003 /* For ISP82XX, reset_chip is just disabling interrupts.
4004 * Driver waits for the completion of the commands.
4005 * the interrupts need to be enabled.
4006 */
a9083016
GM		 4007 if (!IS_QLA82XX(ha))
4008 ha->isp_ops->reset_chip(vha);
4009
4010 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
4011 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
4012 atomic_set(&vha->loop_state, LOOP_DOWN);
4013 qla2x00_mark_all_devices_lost(vha, 0);
feafb7b1
AE		 4014
4015 spin_lock_irqsave(&ha->vport_slock, flags);
579d12b5 4016 list_for_each_entry(vp, &ha->vp_list, list) {
feafb7b1
AE		 4017 atomic_inc(&vp->vref_count);
4018 spin_unlock_irqrestore(&ha->vport_slock, flags);
4019
a9083016 4020 qla2x00_mark_all_devices_lost(vp, 0);
feafb7b1
AE		 4021
4022 spin_lock_irqsave(&ha->vport_slock, flags);
4023 atomic_dec(&vp->vref_count);
4024 }
4025 spin_unlock_irqrestore(&ha->vport_slock, flags);
a9083016
GM		 4026 } else {
4027 if (!atomic_read(&vha->loop_down_timer))
4028 atomic_set(&vha->loop_down_timer,
4029 LOOP_DOWN_TIME);
4030 }
4031
6aef87be
AV		 4032 /* Clear all async request states across all VPs. */
4033 list_for_each_entry(fcport, &vha->vp_fcports, list)
4034 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
4035 spin_lock_irqsave(&ha->vport_slock, flags);
4036 list_for_each_entry(vp, &ha->vp_list, list) {
4037 atomic_inc(&vp->vref_count);
4038 spin_unlock_irqrestore(&ha->vport_slock, flags);
4039
4040 list_for_each_entry(fcport, &vp->vp_fcports, list)
4041 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
4042
4043 spin_lock_irqsave(&ha->vport_slock, flags);
4044 atomic_dec(&vp->vref_count);
4045 }
4046 spin_unlock_irqrestore(&ha->vport_slock, flags);
4047
bddd2d65
LC		 4048 if (!ha->flags.eeh_busy) {
4049 /* Make sure for ISP 82XX IO DMA is complete */
4050 if (IS_QLA82XX(ha)) {
7190575f 4051 qla82xx_chip_reset_cleanup(vha);
7c3df132
SK		 4052 ql_log(ql_log_info, vha, 0x00b4,
4053 "Done chip reset cleanup.\n");
a9083016 4054
e46ef004
SK		 4055 /* Done waiting for pending commands.
4056 * Reset the online flag.
4057 */
4058 vha->flags.online = 0;
4d78c973 4059 }
a9083016 4060
bddd2d65
LC		 4061 /* Requeue all commands in outstanding command list. */
4062 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
4063 }
a9083016
GM		 4064}
4065
1da177e4
LT		 4066/*
4067* qla2x00_abort_isp
4068* Resets ISP and aborts all outstanding commands.
4069*
4070* Input:
4071* ha = adapter block pointer.
4072*
4073* Returns:
4074* 0 = success
4075*/
4076int
e315cd28 4077qla2x00_abort_isp(scsi_qla_host_t *vha)
1da177e4 4078{
476e8978 4079 int rval;
1da177e4 4080 uint8_t status = 0;
e315cd28
AC		 4081 struct qla_hw_data *ha = vha->hw;
4082 struct scsi_qla_host *vp;
73208dfd 4083 struct req_que *req = ha->req_q_map[0];
feafb7b1 4084 unsigned long flags;
1da177e4 4085
e315cd28 4086 if (vha->flags.online) {
a9083016 4087 qla2x00_abort_isp_cleanup(vha);
1da177e4 4088
85880801
AV		 4089 if (unlikely(pci_channel_offline(ha->pdev) &&
4090 ha->flags.pci_channel_io_perm_failure)) {
4091 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4092 status = 0;
4093 return status;
4094 }
4095
73208dfd 4096 ha->isp_ops->get_flash_version(vha, req->ring);
30c47662 4097
e315cd28 4098 ha->isp_ops->nvram_config(vha);
1da177e4 4099
e315cd28
AC		 4100 if (!qla2x00_restart_isp(vha)) {
4101 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4 4102
e315cd28 4103 if (!atomic_read(&vha->loop_down_timer)) {
1da177e4
LT		 4104 /*
4105 * Issue marker command only when we are going
4106 * to start the I/O .
4107 */
e315cd28 4108 vha->marker_needed = 1;
1da177e4
LT		 4109 }
4110
e315cd28 4111 vha->flags.online = 1;
1da177e4 4112
fd34f556 4113 ha->isp_ops->enable_intrs(ha);
1da177e4 4114
fa2a1ce5 4115 ha->isp_abort_cnt = 0;
e315cd28 4116 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
476e8978 4117
6246b8a1
GM		 4118 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
4119 qla2x00_get_fw_version(vha);
df613b96
AV		 4120 if (ha->fce) {
4121 ha->flags.fce_enabled = 1;
4122 memset(ha->fce, 0,
4123 fce_calc_size(ha->fce_bufs));
e315cd28 4124 rval = qla2x00_enable_fce_trace(vha,
df613b96
AV		 4125 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
4126 &ha->fce_bufs);
4127 if (rval) {
7c3df132 4128 ql_log(ql_log_warn, vha, 0x8033,
df613b96
AV		 4129 "Unable to reinitialize FCE "
4130 "(%d).\n", rval);
4131 ha->flags.fce_enabled = 0;
4132 }
4133 }
436a7b11
AV		 4134
4135 if (ha->eft) {
4136 memset(ha->eft, 0, EFT_SIZE);
e315cd28 4137 rval = qla2x00_enable_eft_trace(vha,
436a7b11
AV		 4138 ha->eft_dma, EFT_NUM_BUFFERS);
4139 if (rval) {
7c3df132 4140 ql_log(ql_log_warn, vha, 0x8034,
436a7b11
AV		 4141 "Unable to reinitialize EFT "
4142 "(%d).\n", rval);
4143 }
4144 }
1da177e4 4145 } else { /* failed the ISP abort */
e315cd28
AC		 4146 vha->flags.online = 1;
4147 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
1da177e4 4148 if (ha->isp_abort_cnt == 0) {
7c3df132
SK		 4149 ql_log(ql_log_fatal, vha, 0x8035,
4150 "ISP error recover failed - "
4151 "board disabled.\n");
fa2a1ce5 4152 /*
1da177e4
LT		 4153 * The next call disables the board
4154 * completely.
4155 */
e315cd28
AC		 4156 ha->isp_ops->reset_adapter(vha);
4157 vha->flags.online = 0;
1da177e4 4158 clear_bit(ISP_ABORT_RETRY,
e315cd28 4159 &vha->dpc_flags);
1da177e4
LT		 4160 status = 0;
4161 } else { /* schedule another ISP abort */
4162 ha->isp_abort_cnt--;
7c3df132
SK		 4163 ql_dbg(ql_dbg_taskm, vha, 0x8020,
4164 "ISP abort - retry remaining %d.\n",
4165 ha->isp_abort_cnt);
1da177e4
LT		 4166 status = 1;
4167 }
4168 } else {
4169 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
7c3df132
SK		 4170 ql_dbg(ql_dbg_taskm, vha, 0x8021,
4171 "ISP error recovery - retrying (%d) "
4172 "more times.\n", ha->isp_abort_cnt);
e315cd28 4173 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
1da177e4
LT		 4174 status = 1;
4175 }
4176 }
fa2a1ce5 4177
1da177e4
LT		 4178 }
4179
e315cd28 4180 if (!status) {
7c3df132 4181 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
feafb7b1
AE		 4182
4183 spin_lock_irqsave(&ha->vport_slock, flags);
4184 list_for_each_entry(vp, &ha->vp_list, list) {
4185 if (vp->vp_idx) {
4186 atomic_inc(&vp->vref_count);
4187 spin_unlock_irqrestore(&ha->vport_slock, flags);
4188
e315cd28 4189 qla2x00_vp_abort_isp(vp);
feafb7b1
AE		 4190
4191 spin_lock_irqsave(&ha->vport_slock, flags);
4192 atomic_dec(&vp->vref_count);
4193 }
e315cd28 4194 }
feafb7b1
AE		 4195 spin_unlock_irqrestore(&ha->vport_slock, flags);
4196
e315cd28 4197 } else {
d8424f68
JP		 4198 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
4199 __func__);
1da177e4
LT		 4200 }
4201
4202 return(status);
4203}
4204
4205/*
4206* qla2x00_restart_isp
4207* restarts the ISP after a reset
4208*
4209* Input:
4210* ha = adapter block pointer.
4211*
4212* Returns:
4213* 0 = success
4214*/
4215static int
e315cd28 4216qla2x00_restart_isp(scsi_qla_host_t *vha)
1da177e4 4217{
c6b2fca8 4218 int status = 0;
1da177e4 4219 uint32_t wait_time;
e315cd28 4220 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 4221 struct req_que *req = ha->req_q_map[0];
4222 struct rsp_que *rsp = ha->rsp_q_map[0];
1da177e4
LT		 4223
4224 /* If firmware needs to be loaded */
e315cd28
AC		 4225 if (qla2x00_isp_firmware(vha)) {
4226 vha->flags.online = 0;
4227 status = ha->isp_ops->chip_diag(vha);
4228 if (!status)
4229 status = qla2x00_setup_chip(vha);
1da177e4
LT		 4230 }
4231
e315cd28
AC		 4232 if (!status && !(status = qla2x00_init_rings(vha))) {
4233 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
2533cf67 4234 ha->flags.chip_reset_done = 1;
73208dfd
AC		 4235 /* Initialize the queues in use */
4236 qla25xx_init_queues(ha);
4237
e315cd28
AC		 4238 status = qla2x00_fw_ready(vha);
4239 if (!status) {
7c3df132
SK		 4240 ql_dbg(ql_dbg_taskm, vha, 0x8031,
4241 "Start configure loop status = %d.\n", status);
0107109e
AV		 4242
4243 /* Issue a marker after FW becomes ready. */
73208dfd 4244 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
0107109e 4245
e315cd28 4246 vha->flags.online = 1;
1da177e4
LT		 4247 /* Wait at most MAX_TARGET RSCNs for a stable link. */
4248 wait_time = 256;
4249 do {
e315cd28
AC		 4250 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
4251 qla2x00_configure_loop(vha);
1da177e4 4252 wait_time--;
e315cd28
AC		 4253 } while (!atomic_read(&vha->loop_down_timer) &&
4254 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
4255 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
4256 &vha->dpc_flags)));
1da177e4
LT		 4257 }
4258
4259 /* if no cable then assume it's good */
e315cd28 4260 if ((vha->device_flags & DFLG_NO_CABLE))
1da177e4
LT		 4261 status = 0;
4262
7c3df132
SK		 4263 ql_dbg(ql_dbg_taskm, vha, 0x8032,
4264 "Configure loop done, status = 0x%x.\n", status);
1da177e4
LT		 4265 }
4266 return (status);
4267}
4268
73208dfd
AC		 4269static int
4270qla25xx_init_queues(struct qla_hw_data *ha)
4271{
4272 struct rsp_que *rsp = NULL;
4273 struct req_que *req = NULL;
4274 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
4275 int ret = -1;
4276 int i;
4277
2afa19a9 4278 for (i = 1; i < ha->max_rsp_queues; i++) {
73208dfd
AC		 4279 rsp = ha->rsp_q_map[i];
4280 if (rsp) {
4281 rsp->options &= ~BIT_0;
618a7523 4282 ret = qla25xx_init_rsp_que(base_vha, rsp);
73208dfd 4283 if (ret != QLA_SUCCESS)
7c3df132
SK		 4284 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
4285 "%s Rsp que: %d init failed.\n",
4286 __func__, rsp->id);
73208dfd 4287 else
7c3df132
SK		 4288 ql_dbg(ql_dbg_init, base_vha, 0x0100,
4289 "%s Rsp que: %d inited.\n",
4290 __func__, rsp->id);
73208dfd 4291 }
2afa19a9
AC		 4292 }
4293 for (i = 1; i < ha->max_req_queues; i++) {
73208dfd
AC		 4294 req = ha->req_q_map[i];
4295 if (req) {
29bdccbe 4296 /* Clear outstanding commands array. */
73208dfd 4297 req->options &= ~BIT_0;
618a7523 4298 ret = qla25xx_init_req_que(base_vha, req);
73208dfd 4299 if (ret != QLA_SUCCESS)
7c3df132
SK		 4300 ql_dbg(ql_dbg_init, base_vha, 0x0101,
4301 "%s Req que: %d init failed.\n",
4302 __func__, req->id);
73208dfd 4303 else
7c3df132
SK		 4304 ql_dbg(ql_dbg_init, base_vha, 0x0102,
4305 "%s Req que: %d inited.\n",
4306 __func__, req->id);
73208dfd
AC		 4307 }
4308 }
4309 return ret;
4310}
4311
1da177e4
LT		 4312/*
4313* qla2x00_reset_adapter
4314* Reset adapter.
4315*
4316* Input:
4317* ha = adapter block pointer.
4318*/
abbd8870 4319void
e315cd28 4320qla2x00_reset_adapter(scsi_qla_host_t *vha)
1da177e4
LT		 4321{
4322 unsigned long flags = 0;
e315cd28 4323 struct qla_hw_data *ha = vha->hw;
3d71644c 4324 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 4325
e315cd28 4326 vha->flags.online = 0;
fd34f556 4327 ha->isp_ops->disable_intrs(ha);
1da177e4 4328
1da177e4
LT		 4329 spin_lock_irqsave(&ha->hardware_lock, flags);
4330 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
4331 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
4332 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
4333 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
4334 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4335}
0107109e
AV		 4336
4337void
e315cd28 4338qla24xx_reset_adapter(scsi_qla_host_t *vha)
0107109e
AV		 4339{
4340 unsigned long flags = 0;
e315cd28 4341 struct qla_hw_data *ha = vha->hw;
0107109e
AV		 4342 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
4343
a9083016
GM		 4344 if (IS_QLA82XX(ha))
4345 return;
4346
e315cd28 4347 vha->flags.online = 0;
fd34f556 4348 ha->isp_ops->disable_intrs(ha);
0107109e
AV		 4349
4350 spin_lock_irqsave(&ha->hardware_lock, flags);
4351 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
4352 RD_REG_DWORD(&reg->hccr);
4353 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
4354 RD_REG_DWORD(&reg->hccr);
4355 spin_unlock_irqrestore(&ha->hardware_lock, flags);
09ff36d3
AV		 4356
4357 if (IS_NOPOLLING_TYPE(ha))
4358 ha->isp_ops->enable_intrs(ha);
0107109e
AV		 4359}
4360
4e08df3f
DM		 4361/* On sparc systems, obtain port and node WWN from firmware
4362 * properties.
4363 */
e315cd28
AC		 4364static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
4365 struct nvram_24xx *nv)
4e08df3f
DM		 4366{
4367#ifdef CONFIG_SPARC
e315cd28 4368 struct qla_hw_data *ha = vha->hw;
4e08df3f 4369 struct pci_dev *pdev = ha->pdev;
15576bc8
DM		 4370 struct device_node *dp = pci_device_to_OF_node(pdev);
4371 const u8 *val;
4e08df3f
DM		 4372 int len;
4373
4374 val = of_get_property(dp, "port-wwn", &len);
4375 if (val && len >= WWN_SIZE)
4376 memcpy(nv->port_name, val, WWN_SIZE);
4377
4378 val = of_get_property(dp, "node-wwn", &len);
4379 if (val && len >= WWN_SIZE)
4380 memcpy(nv->node_name, val, WWN_SIZE);
4381#endif
4382}
4383
0107109e 4384int
e315cd28 4385qla24xx_nvram_config(scsi_qla_host_t *vha)
0107109e 4386{
4e08df3f 4387 int rval;
0107109e
AV		 4388 struct init_cb_24xx *icb;
4389 struct nvram_24xx *nv;
4390 uint32_t *dptr;
4391 uint8_t *dptr1, *dptr2;
4392 uint32_t chksum;
4393 uint16_t cnt;
e315cd28 4394 struct qla_hw_data *ha = vha->hw;
0107109e 4395
4e08df3f 4396 rval = QLA_SUCCESS;
0107109e 4397 icb = (struct init_cb_24xx *)ha->init_cb;
281afe19 4398 nv = ha->nvram;
0107109e
AV		 4399
4400 /* Determine NVRAM starting address. */
e5b68a61
AC		 4401 if (ha->flags.port0) {
4402 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
4403 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
4404 } else {
0107109e 4405 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
6f641790
AV		 4406 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
4407 }
e5b68a61
AC		 4408 ha->nvram_size = sizeof(struct nvram_24xx);
4409 ha->vpd_size = FA_NVRAM_VPD_SIZE;
a9083016
GM		 4410 if (IS_QLA82XX(ha))
4411 ha->vpd_size = FA_VPD_SIZE_82XX;
0107109e 4412
281afe19
SJ		 4413 /* Get VPD data into cache */
4414 ha->vpd = ha->nvram + VPD_OFFSET;
e315cd28 4415 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
281afe19
SJ		 4416 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
4417
4418 /* Get NVRAM data into cache and calculate checksum. */
0107109e 4419 dptr = (uint32_t *)nv;
e315cd28 4420 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
0107109e
AV		 4421 ha->nvram_size);
4422 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
4423 chksum += le32_to_cpu(*dptr++);
4424
7c3df132
SK		 4425 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
4426 "Contents of NVRAM\n");
4427 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
4428 (uint8_t *)nv, ha->nvram_size);
0107109e
AV		 4429
4430 /* Bad NVRAM data, set defaults parameters. */
4431 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
4432 || nv->id[3] != ' ' ||
4433 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
4434 /* Reset NVRAM data. */
7c3df132
SK		 4435 ql_log(ql_log_warn, vha, 0x006b,
4436 "Inconisistent NVRAM detected: checksum=0x%x id=%c "
4437 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version);
4438 ql_log(ql_log_warn, vha, 0x006c,
4439 "Falling back to functioning (yet invalid -- WWPN) "
4440 "defaults.\n");
4e08df3f
DM		 4441
4442 /*
4443 * Set default initialization control block.
4444 */
4445 memset(nv, 0, ha->nvram_size);
4446 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
4447 nv->version = __constant_cpu_to_le16(ICB_VERSION);
4448 nv->frame_payload_size = __constant_cpu_to_le16(2048);
4449 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
4450 nv->exchange_count = __constant_cpu_to_le16(0);
4451 nv->hard_address = __constant_cpu_to_le16(124);
4452 nv->port_name[0] = 0x21;
e5b68a61 4453 nv->port_name[1] = 0x00 + ha->port_no;
4e08df3f
DM		 4454 nv->port_name[2] = 0x00;
4455 nv->port_name[3] = 0xe0;
4456 nv->port_name[4] = 0x8b;
4457 nv->port_name[5] = 0x1c;
4458 nv->port_name[6] = 0x55;
4459 nv->port_name[7] = 0x86;
4460 nv->node_name[0] = 0x20;
4461 nv->node_name[1] = 0x00;
4462 nv->node_name[2] = 0x00;
4463 nv->node_name[3] = 0xe0;
4464 nv->node_name[4] = 0x8b;
4465 nv->node_name[5] = 0x1c;
4466 nv->node_name[6] = 0x55;
4467 nv->node_name[7] = 0x86;
e315cd28 4468 qla24xx_nvram_wwn_from_ofw(vha, nv);
4e08df3f
DM		 4469 nv->login_retry_count = __constant_cpu_to_le16(8);
4470 nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
4471 nv->login_timeout = __constant_cpu_to_le16(0);
4472 nv->firmware_options_1 =
4473 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
4474 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
4475 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
4476 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
4477 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
4478 nv->efi_parameters = __constant_cpu_to_le32(0);
4479 nv->reset_delay = 5;
4480 nv->max_luns_per_target = __constant_cpu_to_le16(128);
4481 nv->port_down_retry_count = __constant_cpu_to_le16(30);
4482 nv->link_down_timeout = __constant_cpu_to_le16(30);
4483
4484 rval = 1;
0107109e
AV		 4485 }
4486
4487 /* Reset Initialization control block */
e315cd28 4488 memset(icb, 0, ha->init_cb_size);
0107109e
AV		 4489
4490 /* Copy 1st segment. */
4491 dptr1 = (uint8_t *)icb;
4492 dptr2 = (uint8_t *)&nv->version;
4493 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
4494 while (cnt--)
4495 *dptr1++ = *dptr2++;
4496
4497 icb->login_retry_count = nv->login_retry_count;
3ea66e28 4498 icb->link_down_on_nos = nv->link_down_on_nos;
0107109e
AV		 4499
4500 /* Copy 2nd segment. */
4501 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
4502 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
4503 cnt = (uint8_t *)&icb->reserved_3 -
4504 (uint8_t *)&icb->interrupt_delay_timer;
4505 while (cnt--)
4506 *dptr1++ = *dptr2++;
4507
4508 /*
4509 * Setup driver NVRAM options.
4510 */
e315cd28 4511 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
9bb9fcf2 4512 "QLA2462");
0107109e 4513
5341e868
AV		 4514 /* Use alternate WWN? */
4515 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
4516 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4517 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4518 }
4519
0107109e 4520 /* Prepare nodename */
fd0e7e4d 4521 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
0107109e
AV		 4522 /*
4523 * Firmware will apply the following mask if the nodename was
4524 * not provided.
4525 */
4526 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4527 icb->node_name[0] &= 0xF0;
4528 }
4529
4530 /* Set host adapter parameters. */
4531 ha->flags.disable_risc_code_load = 0;
0c8c39af
AV		 4532 ha->flags.enable_lip_reset = 0;
4533 ha->flags.enable_lip_full_login =
4534 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
4535 ha->flags.enable_target_reset =
4536 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
0107109e 4537 ha->flags.enable_led_scheme = 0;
d4c760c2 4538 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
0107109e 4539
fd0e7e4d
AV		 4540 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
4541 (BIT_6 | BIT_5 | BIT_4)) >> 4;
0107109e
AV		 4542
4543 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
4544 sizeof(ha->fw_seriallink_options24));
4545
4546 /* save HBA serial number */
4547 ha->serial0 = icb->port_name[5];
4548 ha->serial1 = icb->port_name[6];
4549 ha->serial2 = icb->port_name[7];
e315cd28
AC		 4550 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4551 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
0107109e 4552
bc8fb3cb
AV		 4553 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
4554
0107109e
AV		 4555 ha->retry_count = le16_to_cpu(nv->login_retry_count);
4556
4557 /* Set minimum login_timeout to 4 seconds. */
4558 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
4559 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
4560 if (le16_to_cpu(nv->login_timeout) < 4)
4561 nv->login_timeout = __constant_cpu_to_le16(4);
4562 ha->login_timeout = le16_to_cpu(nv->login_timeout);
c6852c4c 4563 icb->login_timeout = nv->login_timeout;
0107109e 4564
00a537b8
AV		 4565 /* Set minimum RATOV to 100 tenths of a second. */
4566 ha->r_a_tov = 100;
0107109e
AV		 4567
4568 ha->loop_reset_delay = nv->reset_delay;
4569
4570 /* Link Down Timeout = 0:
4571 *
4572 * When Port Down timer expires we will start returning
4573 * I/O's to OS with "DID_NO_CONNECT".
4574 *
4575 * Link Down Timeout != 0:
4576 *
4577 * The driver waits for the link to come up after link down
4578 * before returning I/Os to OS with "DID_NO_CONNECT".
4579 */
4580 if (le16_to_cpu(nv->link_down_timeout) == 0) {
4581 ha->loop_down_abort_time =
4582 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
4583 } else {
4584 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
4585 ha->loop_down_abort_time =
4586 (LOOP_DOWN_TIME - ha->link_down_timeout);
4587 }
4588
4589 /* Need enough time to try and get the port back. */
4590 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
4591 if (qlport_down_retry)
4592 ha->port_down_retry_count = qlport_down_retry;
4593
4594 /* Set login_retry_count */
4595 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
4596 if (ha->port_down_retry_count ==
4597 le16_to_cpu(nv->port_down_retry_count) &&
4598 ha->port_down_retry_count > 3)
4599 ha->login_retry_count = ha->port_down_retry_count;
4600 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4601 ha->login_retry_count = ha->port_down_retry_count;
4602 if (ql2xloginretrycount)
4603 ha->login_retry_count = ql2xloginretrycount;
4604
4fdfefe5 4605 /* Enable ZIO. */
e315cd28 4606 if (!vha->flags.init_done) {
4fdfefe5
AV		 4607 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
4608 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4609 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
4610 le16_to_cpu(icb->interrupt_delay_timer): 2;
4611 }
4612 icb->firmware_options_2 &= __constant_cpu_to_le32(
4613 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
e315cd28 4614 vha->flags.process_response_queue = 0;
4fdfefe5 4615 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4a59f71d
AV		 4616 ha->zio_mode = QLA_ZIO_MODE_6;
4617
7c3df132 4618 ql_log(ql_log_info, vha, 0x006f,
4fdfefe5
AV		 4619 "ZIO mode %d enabled; timer delay (%d us).\n",
4620 ha->zio_mode, ha->zio_timer * 100);
4621
4622 icb->firmware_options_2 |= cpu_to_le32(
4623 (uint32_t)ha->zio_mode);
4624 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
e315cd28 4625 vha->flags.process_response_queue = 1;
4fdfefe5
AV		 4626 }
4627
4e08df3f 4628 if (rval) {
7c3df132
SK		 4629 ql_log(ql_log_warn, vha, 0x0070,
4630 "NVRAM configuration failed.\n");
4e08df3f
DM		 4631 }
4632 return (rval);
0107109e
AV		 4633}
4634
413975a0 4635static int
cbc8eb67
AV		 4636qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
4637 uint32_t faddr)
d1c61909 4638{
73208dfd 4639 int rval = QLA_SUCCESS;
d1c61909 4640 int segments, fragment;
d1c61909
AV		 4641 uint32_t *dcode, dlen;
4642 uint32_t risc_addr;
4643 uint32_t risc_size;
4644 uint32_t i;
e315cd28 4645 struct qla_hw_data *ha = vha->hw;
73208dfd 4646 struct req_que *req = ha->req_q_map[0];
eaac30be 4647
7c3df132 4648 ql_dbg(ql_dbg_init, vha, 0x008b,
cfb0919c 4649 "FW: Loading firmware from flash (%x).\n", faddr);
eaac30be 4650
d1c61909
AV		 4651 rval = QLA_SUCCESS;
4652
4653 segments = FA_RISC_CODE_SEGMENTS;
73208dfd 4654 dcode = (uint32_t *)req->ring;
d1c61909
AV		 4655 *srisc_addr = 0;
4656
4657 /* Validate firmware image by checking version. */
e315cd28 4658 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
d1c61909
AV		 4659 for (i = 0; i < 4; i++)
4660 dcode[i] = be32_to_cpu(dcode[i]);
4661 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
4662 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
4663 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
4664 dcode[3] == 0)) {
7c3df132
SK		 4665 ql_log(ql_log_fatal, vha, 0x008c,
4666 "Unable to verify the integrity of flash firmware "
4667 "image.\n");
4668 ql_log(ql_log_fatal, vha, 0x008d,
4669 "Firmware data: %08x %08x %08x %08x.\n",
4670 dcode[0], dcode[1], dcode[2], dcode[3]);
d1c61909
AV		 4671
4672 return QLA_FUNCTION_FAILED;
4673 }
4674
4675 while (segments && rval == QLA_SUCCESS) {
4676 /* Read segment's load information. */
e315cd28 4677 qla24xx_read_flash_data(vha, dcode, faddr, 4);
d1c61909
AV		 4678
4679 risc_addr = be32_to_cpu(dcode[2]);
4680 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
4681 risc_size = be32_to_cpu(dcode[3]);
4682
4683 fragment = 0;
4684 while (risc_size > 0 && rval == QLA_SUCCESS) {
4685 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
4686 if (dlen > risc_size)
4687 dlen = risc_size;
4688
7c3df132
SK		 4689 ql_dbg(ql_dbg_init, vha, 0x008e,
4690 "Loading risc segment@ risc addr %x "
4691 "number of dwords 0x%x offset 0x%x.\n",
4692 risc_addr, dlen, faddr);
d1c61909 4693
e315cd28 4694 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
d1c61909
AV		 4695 for (i = 0; i < dlen; i++)
4696 dcode[i] = swab32(dcode[i]);
4697
73208dfd 4698 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
d1c61909
AV		 4699 dlen);
4700 if (rval) {
7c3df132
SK		 4701 ql_log(ql_log_fatal, vha, 0x008f,
4702 "Failed to load segment %d of firmware.\n",
4703 fragment);
d1c61909
AV		 4704 break;
4705 }
4706
4707 faddr += dlen;
4708 risc_addr += dlen;
4709 risc_size -= dlen;
4710 fragment++;
4711 }
4712
4713 /* Next segment. */
4714 segments--;
4715 }
4716
4717 return rval;
4718}
4719
d1c61909
AV		 4720#define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
4721
0107109e 4722int
e315cd28 4723qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5433383e
AV		 4724{
4725 int rval;
4726 int i, fragment;
4727 uint16_t *wcode, *fwcode;
4728 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
4729 struct fw_blob *blob;
e315cd28 4730 struct qla_hw_data *ha = vha->hw;
73208dfd 4731 struct req_que *req = ha->req_q_map[0];
5433383e
AV		 4732
4733 /* Load firmware blob. */
e315cd28 4734 blob = qla2x00_request_firmware(vha);
5433383e 4735 if (!blob) {
7c3df132
SK		 4736 ql_log(ql_log_info, vha, 0x0083,
4737 "Fimware image unavailable.\n");
4738 ql_log(ql_log_info, vha, 0x0084,
4739 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
5433383e
AV		 4740 return QLA_FUNCTION_FAILED;
4741 }
4742
4743 rval = QLA_SUCCESS;
4744
73208dfd 4745 wcode = (uint16_t *)req->ring;
5433383e
AV		 4746 *srisc_addr = 0;
4747 fwcode = (uint16_t *)blob->fw->data;
4748 fwclen = 0;
4749
4750 /* Validate firmware image by checking version. */
4751 if (blob->fw->size < 8 * sizeof(uint16_t)) {
7c3df132
SK		 4752 ql_log(ql_log_fatal, vha, 0x0085,
4753 "Unable to verify integrity of firmware image (%Zd).\n",
5433383e
AV		 4754 blob->fw->size);
4755 goto fail_fw_integrity;
4756 }
4757 for (i = 0; i < 4; i++)
4758 wcode[i] = be16_to_cpu(fwcode[i + 4]);
4759 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
4760 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
4761 wcode[2] == 0 && wcode[3] == 0)) {
7c3df132
SK		 4762 ql_log(ql_log_fatal, vha, 0x0086,
4763 "Unable to verify integrity of firmware image.\n");
4764 ql_log(ql_log_fatal, vha, 0x0087,
4765 "Firmware data: %04x %04x %04x %04x.\n",
4766 wcode[0], wcode[1], wcode[2], wcode[3]);
5433383e
AV		 4767 goto fail_fw_integrity;
4768 }
4769
4770 seg = blob->segs;
4771 while (*seg && rval == QLA_SUCCESS) {
4772 risc_addr = *seg;
4773 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
4774 risc_size = be16_to_cpu(fwcode[3]);
4775
4776 /* Validate firmware image size. */
4777 fwclen += risc_size * sizeof(uint16_t);
4778 if (blob->fw->size < fwclen) {
7c3df132 4779 ql_log(ql_log_fatal, vha, 0x0088,
5433383e 4780 "Unable to verify integrity of firmware image "
7c3df132 4781 "(%Zd).\n", blob->fw->size);
5433383e
AV		 4782 goto fail_fw_integrity;
4783 }
4784
4785 fragment = 0;
4786 while (risc_size > 0 && rval == QLA_SUCCESS) {
4787 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
4788 if (wlen > risc_size)
4789 wlen = risc_size;
7c3df132
SK		 4790 ql_dbg(ql_dbg_init, vha, 0x0089,
4791 "Loading risc segment@ risc addr %x number of "
4792 "words 0x%x.\n", risc_addr, wlen);
5433383e
AV		 4793
4794 for (i = 0; i < wlen; i++)
4795 wcode[i] = swab16(fwcode[i]);
4796
73208dfd 4797 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5433383e
AV		 4798 wlen);
4799 if (rval) {
7c3df132
SK		 4800 ql_log(ql_log_fatal, vha, 0x008a,
4801 "Failed to load segment %d of firmware.\n",
4802 fragment);
5433383e
AV		 4803 break;
4804 }
4805
4806 fwcode += wlen;
4807 risc_addr += wlen;
4808 risc_size -= wlen;
4809 fragment++;
4810 }
4811
4812 /* Next segment. */
4813 seg++;
4814 }
4815 return rval;
4816
4817fail_fw_integrity:
4818 return QLA_FUNCTION_FAILED;
4819}
4820
eaac30be
AV		 4821static int
4822qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
0107109e
AV		 4823{
4824 int rval;
4825 int segments, fragment;
4826 uint32_t *dcode, dlen;
4827 uint32_t risc_addr;
4828 uint32_t risc_size;
4829 uint32_t i;
5433383e 4830 struct fw_blob *blob;
0107109e 4831 uint32_t *fwcode, fwclen;
e315cd28 4832 struct qla_hw_data *ha = vha->hw;
73208dfd 4833 struct req_que *req = ha->req_q_map[0];
0107109e 4834
5433383e 4835 /* Load firmware blob. */
e315cd28 4836 blob = qla2x00_request_firmware(vha);
5433383e 4837 if (!blob) {
7c3df132
SK		 4838 ql_log(ql_log_warn, vha, 0x0090,
4839 "Fimware image unavailable.\n");
4840 ql_log(ql_log_warn, vha, 0x0091,
4841 "Firmware images can be retrieved from: "
4842 QLA_FW_URL ".\n");
d1c61909 4843
eaac30be 4844 return QLA_FUNCTION_FAILED;
0107109e
AV		 4845 }
4846
cfb0919c
CD		 4847 ql_dbg(ql_dbg_init, vha, 0x0092,
4848 "FW: Loading via request-firmware.\n");
eaac30be 4849
0107109e
AV		 4850 rval = QLA_SUCCESS;
4851
4852 segments = FA_RISC_CODE_SEGMENTS;
73208dfd 4853 dcode = (uint32_t *)req->ring;
0107109e 4854 *srisc_addr = 0;
5433383e 4855 fwcode = (uint32_t *)blob->fw->data;
0107109e
AV		 4856 fwclen = 0;
4857
4858 /* Validate firmware image by checking version. */
5433383e 4859 if (blob->fw->size < 8 * sizeof(uint32_t)) {
7c3df132
SK		 4860 ql_log(ql_log_fatal, vha, 0x0093,
4861 "Unable to verify integrity of firmware image (%Zd).\n",
5433383e 4862 blob->fw->size);
0107109e
AV		 4863 goto fail_fw_integrity;
4864 }
4865 for (i = 0; i < 4; i++)
4866 dcode[i] = be32_to_cpu(fwcode[i + 4]);
4867 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
4868 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
4869 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
4870 dcode[3] == 0)) {
7c3df132
SK		 4871 ql_log(ql_log_fatal, vha, 0x0094,
4872 "Unable to verify integrity of firmware image (%Zd).\n",
4873 blob->fw->size);
4874 ql_log(ql_log_fatal, vha, 0x0095,
4875 "Firmware data: %08x %08x %08x %08x.\n",
4876 dcode[0], dcode[1], dcode[2], dcode[3]);
0107109e
AV		 4877 goto fail_fw_integrity;
4878 }
4879
4880 while (segments && rval == QLA_SUCCESS) {
4881 risc_addr = be32_to_cpu(fwcode[2]);
4882 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
4883 risc_size = be32_to_cpu(fwcode[3]);
4884
4885 /* Validate firmware image size. */
4886 fwclen += risc_size * sizeof(uint32_t);
5433383e 4887 if (blob->fw->size < fwclen) {
7c3df132 4888 ql_log(ql_log_fatal, vha, 0x0096,
5433383e 4889 "Unable to verify integrity of firmware image "
7c3df132 4890 "(%Zd).\n", blob->fw->size);
5433383e 4891
0107109e
AV		 4892 goto fail_fw_integrity;
4893 }
4894
4895 fragment = 0;
4896 while (risc_size > 0 && rval == QLA_SUCCESS) {
4897 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
4898 if (dlen > risc_size)
4899 dlen = risc_size;
4900
7c3df132
SK		 4901 ql_dbg(ql_dbg_init, vha, 0x0097,
4902 "Loading risc segment@ risc addr %x "
4903 "number of dwords 0x%x.\n", risc_addr, dlen);
0107109e
AV		 4904
4905 for (i = 0; i < dlen; i++)
4906 dcode[i] = swab32(fwcode[i]);
4907
73208dfd 4908 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
590f98e5 4909 dlen);
0107109e 4910 if (rval) {
7c3df132
SK		 4911 ql_log(ql_log_fatal, vha, 0x0098,
4912 "Failed to load segment %d of firmware.\n",
4913 fragment);
0107109e
AV		 4914 break;
4915 }
4916
4917 fwcode += dlen;
4918 risc_addr += dlen;
4919 risc_size -= dlen;
4920 fragment++;
4921 }
4922
4923 /* Next segment. */
4924 segments--;
4925 }
0107109e
AV		 4926 return rval;
4927
4928fail_fw_integrity:
0107109e 4929 return QLA_FUNCTION_FAILED;
0107109e 4930}
18c6c127 4931
eaac30be
AV		 4932int
4933qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
4934{
4935 int rval;
4936
e337d907
AV		 4937 if (ql2xfwloadbin == 1)
4938 return qla81xx_load_risc(vha, srisc_addr);
4939
eaac30be
AV		 4940 /*
4941 * FW Load priority:
4942 * 1) Firmware via request-firmware interface (.bin file).
4943 * 2) Firmware residing in flash.
4944 */
4945 rval = qla24xx_load_risc_blob(vha, srisc_addr);
4946 if (rval == QLA_SUCCESS)
4947 return rval;
4948
cbc8eb67
AV		 4949 return qla24xx_load_risc_flash(vha, srisc_addr,
4950 vha->hw->flt_region_fw);
eaac30be
AV		 4951}
4952
4953int
4954qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
4955{
4956 int rval;
cbc8eb67 4957 struct qla_hw_data *ha = vha->hw;
eaac30be 4958
e337d907 4959 if (ql2xfwloadbin == 2)
cbc8eb67 4960 goto try_blob_fw;
e337d907 4961
eaac30be
AV		 4962 /*
4963 * FW Load priority:
4964 * 1) Firmware residing in flash.
4965 * 2) Firmware via request-firmware interface (.bin file).
cbc8eb67 4966 * 3) Golden-Firmware residing in flash -- limited operation.
eaac30be 4967 */
cbc8eb67 4968 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
eaac30be
AV		 4969 if (rval == QLA_SUCCESS)
4970 return rval;
4971
cbc8eb67
AV		 4972try_blob_fw:
4973 rval = qla24xx_load_risc_blob(vha, srisc_addr);
4974 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
4975 return rval;
4976
7c3df132
SK		 4977 ql_log(ql_log_info, vha, 0x0099,
4978 "Attempting to fallback to golden firmware.\n");
cbc8eb67
AV		 4979 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
4980 if (rval != QLA_SUCCESS)
4981 return rval;
4982
7c3df132 4983 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n");
cbc8eb67 4984 ha->flags.running_gold_fw = 1;
cbc8eb67 4985 return rval;
eaac30be
AV		 4986}
4987
18c6c127 4988void
e315cd28 4989qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
18c6c127
AV		 4990{
4991 int ret, retries;
e315cd28 4992 struct qla_hw_data *ha = vha->hw;
18c6c127 4993
85880801
AV		 4994 if (ha->flags.pci_channel_io_perm_failure)
4995 return;
e428924c 4996 if (!IS_FWI2_CAPABLE(ha))
18c6c127 4997 return;
75edf81d
AV		 4998 if (!ha->fw_major_version)
4999 return;
18c6c127 5000
e315cd28 5001 ret = qla2x00_stop_firmware(vha);
7c7f1f29 5002 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
b469a7cb 5003 ret != QLA_INVALID_COMMAND && retries ; retries--) {
e315cd28
AC		 5004 ha->isp_ops->reset_chip(vha);
5005 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
18c6c127 5006 continue;
e315cd28 5007 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
18c6c127 5008 continue;
7c3df132
SK		 5009 ql_log(ql_log_info, vha, 0x8015,
5010 "Attempting retry of stop-firmware command.\n");
e315cd28 5011 ret = qla2x00_stop_firmware(vha);
18c6c127
AV		 5012 }
5013}
2c3dfe3f
SJ		 5014
5015int
e315cd28 5016qla24xx_configure_vhba(scsi_qla_host_t *vha)
2c3dfe3f
SJ		 5017{
5018 int rval = QLA_SUCCESS;
5019 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28
AC		 5020 struct qla_hw_data *ha = vha->hw;
5021 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
67c2e93a
AC		 5022 struct req_que *req;
5023 struct rsp_que *rsp;
2c3dfe3f 5024
e315cd28 5025 if (!vha->vp_idx)
2c3dfe3f
SJ		 5026 return -EINVAL;
5027
e315cd28 5028 rval = qla2x00_fw_ready(base_vha);
7163ea81 5029 if (ha->flags.cpu_affinity_enabled)
67c2e93a
AC		 5030 req = ha->req_q_map[0];
5031 else
5032 req = vha->req;
5033 rsp = req->rsp;
5034
2c3dfe3f 5035 if (rval == QLA_SUCCESS) {
e315cd28 5036 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
73208dfd 5037 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
2c3dfe3f
SJ		 5038 }
5039
e315cd28 5040 vha->flags.management_server_logged_in = 0;
2c3dfe3f
SJ		 5041
5042 /* Login to SNS first */
e315cd28 5043 ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
2c3dfe3f 5044 if (mb[0] != MBS_COMMAND_COMPLETE) {
7c3df132
SK		 5045 ql_dbg(ql_dbg_init, vha, 0x0103,
5046 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x "
5047 "mb[6]=%x mb[7]=%x.\n",
5048 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
2c3dfe3f
SJ		 5049 return (QLA_FUNCTION_FAILED);
5050 }
5051
e315cd28
AC		 5052 atomic_set(&vha->loop_down_timer, 0);
5053 atomic_set(&vha->loop_state, LOOP_UP);
5054 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5055 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5056 rval = qla2x00_loop_resync(base_vha);
2c3dfe3f
SJ		 5057
5058 return rval;
5059}
4d4df193
HK		 5060
5061/* 84XX Support **************************************************************/
5062
5063static LIST_HEAD(qla_cs84xx_list);
5064static DEFINE_MUTEX(qla_cs84xx_mutex);
5065
5066static struct qla_chip_state_84xx *
e315cd28 5067qla84xx_get_chip(struct scsi_qla_host *vha)
4d4df193
HK		 5068{
5069 struct qla_chip_state_84xx *cs84xx;
e315cd28 5070 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 5071
5072 mutex_lock(&qla_cs84xx_mutex);
5073
5074 /* Find any shared 84xx chip. */
5075 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
5076 if (cs84xx->bus == ha->pdev->bus) {
5077 kref_get(&cs84xx->kref);
5078 goto done;
5079 }
5080 }
5081
5082 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
5083 if (!cs84xx)
5084 goto done;
5085
5086 kref_init(&cs84xx->kref);
5087 spin_lock_init(&cs84xx->access_lock);
5088 mutex_init(&cs84xx->fw_update_mutex);
5089 cs84xx->bus = ha->pdev->bus;
5090
5091 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
5092done:
5093 mutex_unlock(&qla_cs84xx_mutex);
5094 return cs84xx;
5095}
5096
5097static void
5098__qla84xx_chip_release(struct kref *kref)
5099{
5100 struct qla_chip_state_84xx *cs84xx =
5101 container_of(kref, struct qla_chip_state_84xx, kref);
5102
5103 mutex_lock(&qla_cs84xx_mutex);
5104 list_del(&cs84xx->list);
5105 mutex_unlock(&qla_cs84xx_mutex);
5106 kfree(cs84xx);
5107}
5108
5109void
e315cd28 5110qla84xx_put_chip(struct scsi_qla_host *vha)
4d4df193 5111{
e315cd28 5112 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 5113 if (ha->cs84xx)
5114 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
5115}
5116
5117static int
e315cd28 5118qla84xx_init_chip(scsi_qla_host_t *vha)
4d4df193
HK		 5119{
5120 int rval;
5121 uint16_t status[2];
e315cd28 5122 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 5123
5124 mutex_lock(&ha->cs84xx->fw_update_mutex);
5125
e315cd28 5126 rval = qla84xx_verify_chip(vha, status);
4d4df193
HK		 5127
5128 mutex_unlock(&ha->cs84xx->fw_update_mutex);
5129
5130 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
5131 QLA_SUCCESS;
5132}
3a03eb79
AV		 5133
5134/* 81XX Support **************************************************************/
5135
5136int
5137qla81xx_nvram_config(scsi_qla_host_t *vha)
5138{
5139 int rval;
5140 struct init_cb_81xx *icb;
5141 struct nvram_81xx *nv;
5142 uint32_t *dptr;
5143 uint8_t *dptr1, *dptr2;
5144 uint32_t chksum;
5145 uint16_t cnt;
5146 struct qla_hw_data *ha = vha->hw;
5147
5148 rval = QLA_SUCCESS;
5149 icb = (struct init_cb_81xx *)ha->init_cb;
5150 nv = ha->nvram;
5151
5152 /* Determine NVRAM starting address. */
5153 ha->nvram_size = sizeof(struct nvram_81xx);
3a03eb79 5154 ha->vpd_size = FA_NVRAM_VPD_SIZE;
3a03eb79
AV		 5155
5156 /* Get VPD data into cache */
5157 ha->vpd = ha->nvram + VPD_OFFSET;
3d79038f
AV		 5158 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
5159 ha->vpd_size);
3a03eb79
AV		 5160
5161 /* Get NVRAM data into cache and calculate checksum. */
3d79038f 5162 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
3a03eb79 5163 ha->nvram_size);
3d79038f 5164 dptr = (uint32_t *)nv;
3a03eb79
AV		 5165 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
5166 chksum += le32_to_cpu(*dptr++);
5167
7c3df132
SK		 5168 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
5169 "Contents of NVRAM:\n");
5170 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
5171 (uint8_t *)nv, ha->nvram_size);
3a03eb79
AV		 5172
5173 /* Bad NVRAM data, set defaults parameters. */
5174 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
5175 || nv->id[3] != ' ' ||
5176 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
5177 /* Reset NVRAM data. */
7c3df132
SK		 5178 ql_log(ql_log_info, vha, 0x0073,
5179 "Inconisistent NVRAM detected: checksum=0x%x id=%c "
5180 "version=0x%x.\n", chksum, nv->id[0],
3a03eb79 5181 le16_to_cpu(nv->nvram_version));
7c3df132
SK		 5182 ql_log(ql_log_info, vha, 0x0074,
5183 "Falling back to functioning (yet invalid -- WWPN) "
5184 "defaults.\n");
3a03eb79
AV		 5185
5186 /*
5187 * Set default initialization control block.
5188 */
5189 memset(nv, 0, ha->nvram_size);
5190 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
5191 nv->version = __constant_cpu_to_le16(ICB_VERSION);
5192 nv->frame_payload_size = __constant_cpu_to_le16(2048);
5193 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
5194 nv->exchange_count = __constant_cpu_to_le16(0);
5195 nv->port_name[0] = 0x21;
e5b68a61 5196 nv->port_name[1] = 0x00 + ha->port_no;
3a03eb79
AV		 5197 nv->port_name[2] = 0x00;
5198 nv->port_name[3] = 0xe0;
5199 nv->port_name[4] = 0x8b;
5200 nv->port_name[5] = 0x1c;
5201 nv->port_name[6] = 0x55;
5202 nv->port_name[7] = 0x86;
5203 nv->node_name[0] = 0x20;
5204 nv->node_name[1] = 0x00;
5205 nv->node_name[2] = 0x00;
5206 nv->node_name[3] = 0xe0;
5207 nv->node_name[4] = 0x8b;
5208 nv->node_name[5] = 0x1c;
5209 nv->node_name[6] = 0x55;
5210 nv->node_name[7] = 0x86;
5211 nv->login_retry_count = __constant_cpu_to_le16(8);
5212 nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
5213 nv->login_timeout = __constant_cpu_to_le16(0);
5214 nv->firmware_options_1 =
5215 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
5216 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
5217 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
5218 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
5219 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
5220 nv->efi_parameters = __constant_cpu_to_le32(0);
5221 nv->reset_delay = 5;
5222 nv->max_luns_per_target = __constant_cpu_to_le16(128);
5223 nv->port_down_retry_count = __constant_cpu_to_le16(30);
6246b8a1 5224 nv->link_down_timeout = __constant_cpu_to_le16(180);
eeebcc92 5225 nv->enode_mac[0] = 0x00;
6246b8a1
GM		 5226 nv->enode_mac[1] = 0xC0;
5227 nv->enode_mac[2] = 0xDD;
3a03eb79
AV		 5228 nv->enode_mac[3] = 0x04;
5229 nv->enode_mac[4] = 0x05;
e5b68a61 5230 nv->enode_mac[5] = 0x06 + ha->port_no;
3a03eb79
AV		 5231
5232 rval = 1;
5233 }
5234
5235 /* Reset Initialization control block */
773120e4 5236 memset(icb, 0, ha->init_cb_size);
3a03eb79
AV		 5237
5238 /* Copy 1st segment. */
5239 dptr1 = (uint8_t *)icb;
5240 dptr2 = (uint8_t *)&nv->version;
5241 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
5242 while (cnt--)
5243 *dptr1++ = *dptr2++;
5244
5245 icb->login_retry_count = nv->login_retry_count;
5246
5247 /* Copy 2nd segment. */
5248 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
5249 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
5250 cnt = (uint8_t *)&icb->reserved_5 -
5251 (uint8_t *)&icb->interrupt_delay_timer;
5252 while (cnt--)
5253 *dptr1++ = *dptr2++;
5254
5255 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
5256 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
5257 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
5258 icb->enode_mac[0] = 0x01;
5259 icb->enode_mac[1] = 0x02;
5260 icb->enode_mac[2] = 0x03;
5261 icb->enode_mac[3] = 0x04;
5262 icb->enode_mac[4] = 0x05;
e5b68a61 5263 icb->enode_mac[5] = 0x06 + ha->port_no;
3a03eb79
AV		 5264 }
5265
b64b0e8f
AV		 5266 /* Use extended-initialization control block. */
5267 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
5268
3a03eb79
AV		 5269 /*
5270 * Setup driver NVRAM options.
5271 */
5272 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
a9083016 5273 "QLE8XXX");
3a03eb79
AV		 5274
5275 /* Use alternate WWN? */
5276 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
5277 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
5278 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
5279 }
5280
5281 /* Prepare nodename */
5282 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
5283 /*
5284 * Firmware will apply the following mask if the nodename was
5285 * not provided.
5286 */
5287 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
5288 icb->node_name[0] &= 0xF0;
5289 }
5290
5291 /* Set host adapter parameters. */
5292 ha->flags.disable_risc_code_load = 0;
5293 ha->flags.enable_lip_reset = 0;
5294 ha->flags.enable_lip_full_login =
5295 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
5296 ha->flags.enable_target_reset =
5297 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
5298 ha->flags.enable_led_scheme = 0;
5299 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
5300
5301 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
5302 (BIT_6 | BIT_5 | BIT_4)) >> 4;
5303
5304 /* save HBA serial number */
5305 ha->serial0 = icb->port_name[5];
5306 ha->serial1 = icb->port_name[6];
5307 ha->serial2 = icb->port_name[7];
5308 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
5309 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
5310
5311 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
5312
5313 ha->retry_count = le16_to_cpu(nv->login_retry_count);
5314
5315 /* Set minimum login_timeout to 4 seconds. */
5316 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
5317 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
5318 if (le16_to_cpu(nv->login_timeout) < 4)
5319 nv->login_timeout = __constant_cpu_to_le16(4);
5320 ha->login_timeout = le16_to_cpu(nv->login_timeout);
5321 icb->login_timeout = nv->login_timeout;
5322
5323 /* Set minimum RATOV to 100 tenths of a second. */
5324 ha->r_a_tov = 100;
5325
5326 ha->loop_reset_delay = nv->reset_delay;
5327
5328 /* Link Down Timeout = 0:
5329 *
5330 * When Port Down timer expires we will start returning
5331 * I/O's to OS with "DID_NO_CONNECT".
5332 *
5333 * Link Down Timeout != 0:
5334 *
5335 * The driver waits for the link to come up after link down
5336 * before returning I/Os to OS with "DID_NO_CONNECT".
5337 */
5338 if (le16_to_cpu(nv->link_down_timeout) == 0) {
5339 ha->loop_down_abort_time =
5340 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
5341 } else {
5342 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
5343 ha->loop_down_abort_time =
5344 (LOOP_DOWN_TIME - ha->link_down_timeout);
5345 }
5346
5347 /* Need enough time to try and get the port back. */
5348 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
5349 if (qlport_down_retry)
5350 ha->port_down_retry_count = qlport_down_retry;
5351
5352 /* Set login_retry_count */
5353 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
5354 if (ha->port_down_retry_count ==
5355 le16_to_cpu(nv->port_down_retry_count) &&
5356 ha->port_down_retry_count > 3)
5357 ha->login_retry_count = ha->port_down_retry_count;
5358 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
5359 ha->login_retry_count = ha->port_down_retry_count;
5360 if (ql2xloginretrycount)
5361 ha->login_retry_count = ql2xloginretrycount;
5362
6246b8a1
GM		 5363 /* if not running MSI-X we need handshaking on interrupts */
5364 if (!vha->hw->flags.msix_enabled && IS_QLA83XX(ha))
5365 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_22);
5366
3a03eb79
AV		 5367 /* Enable ZIO. */
5368 if (!vha->flags.init_done) {
5369 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
5370 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
5371 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
5372 le16_to_cpu(icb->interrupt_delay_timer): 2;
5373 }
5374 icb->firmware_options_2 &= __constant_cpu_to_le32(
5375 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
5376 vha->flags.process_response_queue = 0;
5377 if (ha->zio_mode != QLA_ZIO_DISABLED) {
5378 ha->zio_mode = QLA_ZIO_MODE_6;
5379
7c3df132 5380 ql_log(ql_log_info, vha, 0x0075,
3a03eb79 5381 "ZIO mode %d enabled; timer delay (%d us).\n",
7c3df132
SK		 5382 ha->zio_mode,
5383 ha->zio_timer * 100);
3a03eb79
AV		 5384
5385 icb->firmware_options_2 |= cpu_to_le32(
5386 (uint32_t)ha->zio_mode);
5387 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
5388 vha->flags.process_response_queue = 1;
5389 }
5390
5391 if (rval) {
7c3df132
SK		 5392 ql_log(ql_log_warn, vha, 0x0076,
5393 "NVRAM configuration failed.\n");
3a03eb79
AV		 5394 }
5395 return (rval);
5396}
5397
a9083016
GM		 5398int
5399qla82xx_restart_isp(scsi_qla_host_t *vha)
5400{
5401 int status, rval;
5402 uint32_t wait_time;
5403 struct qla_hw_data *ha = vha->hw;
5404 struct req_que *req = ha->req_q_map[0];
5405 struct rsp_que *rsp = ha->rsp_q_map[0];
5406 struct scsi_qla_host *vp;
feafb7b1 5407 unsigned long flags;
a9083016
GM		 5408
5409 status = qla2x00_init_rings(vha);
5410 if (!status) {
5411 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5412 ha->flags.chip_reset_done = 1;
5413
5414 status = qla2x00_fw_ready(vha);
5415 if (!status) {
7c3df132
SK		 5416 ql_log(ql_log_info, vha, 0x803c,
5417 "Start configure loop, status =%d.\n", status);
a9083016
GM		 5418
5419 /* Issue a marker after FW becomes ready. */
5420 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
5421
5422 vha->flags.online = 1;
5423 /* Wait at most MAX_TARGET RSCNs for a stable link. */
5424 wait_time = 256;
5425 do {
5426 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5427 qla2x00_configure_loop(vha);
5428 wait_time--;
5429 } while (!atomic_read(&vha->loop_down_timer) &&
5430 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) &&
5431 wait_time &&
5432 (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)));
5433 }
5434
5435 /* if no cable then assume it's good */
5436 if ((vha->device_flags & DFLG_NO_CABLE))
5437 status = 0;
5438
cfb0919c 5439 ql_log(ql_log_info, vha, 0x8000,
7c3df132 5440 "Configure loop done, status = 0x%x.\n", status);
a9083016
GM		 5441 }
5442
5443 if (!status) {
5444 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5445
5446 if (!atomic_read(&vha->loop_down_timer)) {
5447 /*
5448 * Issue marker command only when we are going
5449 * to start the I/O .
5450 */
5451 vha->marker_needed = 1;
5452 }
5453
5454 vha->flags.online = 1;
5455
5456 ha->isp_ops->enable_intrs(ha);
5457
5458 ha->isp_abort_cnt = 0;
5459 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
5460
53296788 5461 /* Update the firmware version */
3173167f 5462 status = qla82xx_check_md_needed(vha);
53296788 5463
a9083016
GM		 5464 if (ha->fce) {
5465 ha->flags.fce_enabled = 1;
5466 memset(ha->fce, 0,
5467 fce_calc_size(ha->fce_bufs));
5468 rval = qla2x00_enable_fce_trace(vha,
5469 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
5470 &ha->fce_bufs);
5471 if (rval) {
cfb0919c 5472 ql_log(ql_log_warn, vha, 0x8001,
7c3df132
SK		 5473 "Unable to reinitialize FCE (%d).\n",
5474 rval);
a9083016
GM		 5475 ha->flags.fce_enabled = 0;
5476 }
5477 }
5478
5479 if (ha->eft) {
5480 memset(ha->eft, 0, EFT_SIZE);
5481 rval = qla2x00_enable_eft_trace(vha,
5482 ha->eft_dma, EFT_NUM_BUFFERS);
5483 if (rval) {
cfb0919c 5484 ql_log(ql_log_warn, vha, 0x8010,
7c3df132
SK		 5485 "Unable to reinitialize EFT (%d).\n",
5486 rval);
a9083016
GM		 5487 }
5488 }
a9083016
GM		 5489 }
5490
5491 if (!status) {
cfb0919c 5492 ql_dbg(ql_dbg_taskm, vha, 0x8011,
7c3df132 5493 "qla82xx_restart_isp succeeded.\n");
feafb7b1
AE		 5494
5495 spin_lock_irqsave(&ha->vport_slock, flags);
5496 list_for_each_entry(vp, &ha->vp_list, list) {
5497 if (vp->vp_idx) {
5498 atomic_inc(&vp->vref_count);
5499 spin_unlock_irqrestore(&ha->vport_slock, flags);
5500
a9083016 5501 qla2x00_vp_abort_isp(vp);
feafb7b1
AE		 5502
5503 spin_lock_irqsave(&ha->vport_slock, flags);
5504 atomic_dec(&vp->vref_count);
5505 }
a9083016 5506 }
feafb7b1
AE		 5507 spin_unlock_irqrestore(&ha->vport_slock, flags);
5508
a9083016 5509 } else {
cfb0919c 5510 ql_log(ql_log_warn, vha, 0x8016,
7c3df132 5511 "qla82xx_restart_isp **** FAILED ****.\n");
a9083016
GM		 5512 }
5513
5514 return status;
5515}
5516
3a03eb79 5517void
ae97c91e 5518qla81xx_update_fw_options(scsi_qla_host_t *vha)
3a03eb79 5519{
ae97c91e
AV		 5520 struct qla_hw_data *ha = vha->hw;
5521
5522 if (!ql2xetsenable)
5523 return;
5524
5525 /* Enable ETS Burst. */
5526 memset(ha->fw_options, 0, sizeof(ha->fw_options));
5527 ha->fw_options[2] |= BIT_9;
5528 qla2x00_set_fw_options(vha, ha->fw_options);
3a03eb79 5529}
09ff701a
SR		 5530
5531/*
5532 * qla24xx_get_fcp_prio
5533 * Gets the fcp cmd priority value for the logged in port.
5534 * Looks for a match of the port descriptors within
5535 * each of the fcp prio config entries. If a match is found,
5536 * the tag (priority) value is returned.
5537 *
5538 * Input:
21090cbe 5539 * vha = scsi host structure pointer.
09ff701a
SR		 5540 * fcport = port structure pointer.
5541 *
5542 * Return:
6c452a45 5543 * non-zero (if found)
f28a0a96 5544 * -1 (if not found)
09ff701a
SR		 5545 *
5546 * Context:
5547 * Kernel context
5548 */
f28a0a96 5549static int
09ff701a
SR		 5550qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
5551{
5552 int i, entries;
5553 uint8_t pid_match, wwn_match;
f28a0a96 5554 int priority;
09ff701a
SR		 5555 uint32_t pid1, pid2;
5556 uint64_t wwn1, wwn2;
5557 struct qla_fcp_prio_entry *pri_entry;
5558 struct qla_hw_data *ha = vha->hw;
5559
5560 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
f28a0a96 5561 return -1;
09ff701a 5562
f28a0a96 5563 priority = -1;
09ff701a
SR		 5564 entries = ha->fcp_prio_cfg->num_entries;
5565 pri_entry = &ha->fcp_prio_cfg->entry[0];
5566
5567 for (i = 0; i < entries; i++) {
5568 pid_match = wwn_match = 0;
5569
5570 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
5571 pri_entry++;
5572 continue;
5573 }
5574
5575 /* check source pid for a match */
5576 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
5577 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
5578 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
5579 if (pid1 == INVALID_PORT_ID)
5580 pid_match++;
5581 else if (pid1 == pid2)
5582 pid_match++;
5583 }
5584
5585 /* check destination pid for a match */
5586 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
5587 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
5588 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
5589 if (pid1 == INVALID_PORT_ID)
5590 pid_match++;
5591 else if (pid1 == pid2)
5592 pid_match++;
5593 }
5594
5595 /* check source WWN for a match */
5596 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
5597 wwn1 = wwn_to_u64(vha->port_name);
5598 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
5599 if (wwn2 == (uint64_t)-1)
5600 wwn_match++;
5601 else if (wwn1 == wwn2)
5602 wwn_match++;
5603 }
5604
5605 /* check destination WWN for a match */
5606 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
5607 wwn1 = wwn_to_u64(fcport->port_name);
5608 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
5609 if (wwn2 == (uint64_t)-1)
5610 wwn_match++;
5611 else if (wwn1 == wwn2)
5612 wwn_match++;
5613 }
5614
5615 if (pid_match == 2 || wwn_match == 2) {
5616 /* Found a matching entry */
5617 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
5618 priority = pri_entry->tag;
5619 break;
5620 }
5621
5622 pri_entry++;
5623 }
5624
5625 return priority;
5626}
5627
5628/*
5629 * qla24xx_update_fcport_fcp_prio
5630 * Activates fcp priority for the logged in fc port
5631 *
5632 * Input:
21090cbe 5633 * vha = scsi host structure pointer.
09ff701a
SR		 5634 * fcp = port structure pointer.
5635 *
5636 * Return:
5637 * QLA_SUCCESS or QLA_FUNCTION_FAILED
5638 *
5639 * Context:
5640 * Kernel context.
5641 */
5642int
21090cbe 5643qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
09ff701a
SR		 5644{
5645 int ret;
f28a0a96 5646 int priority;
09ff701a
SR		 5647 uint16_t mb[5];
5648
21090cbe
MI		 5649 if (fcport->port_type != FCT_TARGET ||
5650 fcport->loop_id == FC_NO_LOOP_ID)
09ff701a
SR		 5651 return QLA_FUNCTION_FAILED;
5652
21090cbe 5653 priority = qla24xx_get_fcp_prio(vha, fcport);
f28a0a96
AV		 5654 if (priority < 0)
5655 return QLA_FUNCTION_FAILED;
5656
a00f6296
SK		 5657 if (IS_QLA82XX(vha->hw)) {
5658 fcport->fcp_prio = priority & 0xf;
5659 return QLA_SUCCESS;
5660 }
5661
21090cbe 5662 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
cfb0919c
CD		 5663 if (ret == QLA_SUCCESS) {
5664 if (fcport->fcp_prio != priority)
5665 ql_dbg(ql_dbg_user, vha, 0x709e,
5666 "Updated FCP_CMND priority - value=%d loop_id=%d "
5667 "port_id=%02x%02x%02x.\n", priority,
5668 fcport->loop_id, fcport->d_id.b.domain,
5669 fcport->d_id.b.area, fcport->d_id.b.al_pa);
a00f6296 5670 fcport->fcp_prio = priority & 0xf;
cfb0919c 5671 } else
7c3df132 5672 ql_dbg(ql_dbg_user, vha, 0x704f,
cfb0919c
CD		 5673 "Unable to update FCP_CMND priority - ret=0x%x for "
5674 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
5675 fcport->d_id.b.domain, fcport->d_id.b.area,
5676 fcport->d_id.b.al_pa);
09ff701a
SR		 5677 return ret;
5678}
5679
5680/*
5681 * qla24xx_update_all_fcp_prio
5682 * Activates fcp priority for all the logged in ports
5683 *
5684 * Input:
5685 * ha = adapter block pointer.
5686 *
5687 * Return:
5688 * QLA_SUCCESS or QLA_FUNCTION_FAILED
5689 *
5690 * Context:
5691 * Kernel context.
5692 */
5693int
5694qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
5695{
5696 int ret;
5697 fc_port_t *fcport;
5698
5699 ret = QLA_FUNCTION_FAILED;
5700 /* We need to set priority for all logged in ports */
5701 list_for_each_entry(fcport, &vha->vp_fcports, list)
5702 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
5703
5704 return ret;
5705}
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