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Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
fa90c54f | 2 | * QLogic Fibre Channel HBA Driver |
07e264b7 | 3 | * Copyright (c) 2003-2011 QLogic Corporation |
1da177e4 | 4 | * |
fa90c54f | 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
1da177e4 LT |
6 | */ |
7 | #include "qla_def.h" | |
73208dfd | 8 | #include "qla_gbl.h" |
1da177e4 LT |
9 | |
10 | #include <linux/delay.h> | |
5a0e3ad6 | 11 | #include <linux/slab.h> |
0107109e | 12 | #include <linux/vmalloc.h> |
1da177e4 LT |
13 | |
14 | #include "qla_devtbl.h" | |
15 | ||
4e08df3f DM |
16 | #ifdef CONFIG_SPARC |
17 | #include <asm/prom.h> | |
4e08df3f DM |
18 | #endif |
19 | ||
1da177e4 LT |
20 | /* |
21 | * QLogic ISP2x00 Hardware Support Function Prototypes. | |
22 | */ | |
1da177e4 | 23 | static int qla2x00_isp_firmware(scsi_qla_host_t *); |
1da177e4 | 24 | static int qla2x00_setup_chip(scsi_qla_host_t *); |
1da177e4 LT |
25 | static int qla2x00_init_rings(scsi_qla_host_t *); |
26 | static int qla2x00_fw_ready(scsi_qla_host_t *); | |
27 | static int qla2x00_configure_hba(scsi_qla_host_t *); | |
1da177e4 LT |
28 | static int qla2x00_configure_loop(scsi_qla_host_t *); |
29 | static int qla2x00_configure_local_loop(scsi_qla_host_t *); | |
1da177e4 LT |
30 | static int qla2x00_configure_fabric(scsi_qla_host_t *); |
31 | static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *); | |
1da177e4 LT |
32 | static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *, |
33 | uint16_t *); | |
1da177e4 LT |
34 | |
35 | static int qla2x00_restart_isp(scsi_qla_host_t *); | |
1da177e4 | 36 | |
4d4df193 HK |
37 | static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); |
38 | static int qla84xx_init_chip(scsi_qla_host_t *); | |
73208dfd | 39 | static int qla25xx_init_queues(struct qla_hw_data *); |
4d4df193 | 40 | |
ac280b67 AV |
41 | /* SRB Extensions ---------------------------------------------------------- */ |
42 | ||
9ba56b95 GM |
43 | void |
44 | qla2x00_sp_timeout(unsigned long __data) | |
ac280b67 AV |
45 | { |
46 | srb_t *sp = (srb_t *)__data; | |
4916392b | 47 | struct srb_iocb *iocb; |
ac280b67 AV |
48 | fc_port_t *fcport = sp->fcport; |
49 | struct qla_hw_data *ha = fcport->vha->hw; | |
50 | struct req_que *req; | |
51 | unsigned long flags; | |
52 | ||
53 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
54 | req = ha->req_q_map[0]; | |
55 | req->outstanding_cmds[sp->handle] = NULL; | |
9ba56b95 | 56 | iocb = &sp->u.iocb_cmd; |
4916392b | 57 | iocb->timeout(sp); |
9ba56b95 | 58 | sp->free(fcport->vha, sp); |
6ac52608 | 59 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
ac280b67 AV |
60 | } |
61 | ||
9ba56b95 GM |
62 | void |
63 | qla2x00_sp_free(void *data, void *ptr) | |
ac280b67 | 64 | { |
9ba56b95 GM |
65 | srb_t *sp = (srb_t *)ptr; |
66 | struct srb_iocb *iocb = &sp->u.iocb_cmd; | |
67 | struct scsi_qla_host *vha = (scsi_qla_host_t *)data; | |
ac280b67 | 68 | |
4d97cc53 | 69 | del_timer(&iocb->timer); |
9ba56b95 | 70 | mempool_free(sp, vha->hw->srb_mempool); |
feafb7b1 AE |
71 | |
72 | QLA_VHA_MARK_NOT_BUSY(vha); | |
ac280b67 AV |
73 | } |
74 | ||
ac280b67 AV |
75 | /* Asynchronous Login/Logout Routines -------------------------------------- */ |
76 | ||
5b91490e AV |
77 | static inline unsigned long |
78 | qla2x00_get_async_timeout(struct scsi_qla_host *vha) | |
79 | { | |
80 | unsigned long tmo; | |
81 | struct qla_hw_data *ha = vha->hw; | |
82 | ||
83 | /* Firmware should use switch negotiated r_a_tov for timeout. */ | |
84 | tmo = ha->r_a_tov / 10 * 2; | |
85 | if (!IS_FWI2_CAPABLE(ha)) { | |
86 | /* | |
87 | * Except for earlier ISPs where the timeout is seeded from the | |
88 | * initialization control block. | |
89 | */ | |
90 | tmo = ha->login_timeout; | |
91 | } | |
92 | return tmo; | |
93 | } | |
ac280b67 AV |
94 | |
95 | static void | |
9ba56b95 | 96 | qla2x00_async_iocb_timeout(void *data) |
ac280b67 | 97 | { |
9ba56b95 | 98 | srb_t *sp = (srb_t *)data; |
ac280b67 | 99 | fc_port_t *fcport = sp->fcport; |
ac280b67 | 100 | |
7c3df132 | 101 | ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, |
cfb0919c | 102 | "Async-%s timeout - hdl=%x portid=%02x%02x%02x.\n", |
9ba56b95 | 103 | sp->name, sp->handle, fcport->d_id.b.domain, fcport->d_id.b.area, |
7c3df132 | 104 | fcport->d_id.b.al_pa); |
ac280b67 | 105 | |
5ff1d584 | 106 | fcport->flags &= ~FCF_ASYNC_SENT; |
9ba56b95 GM |
107 | if (sp->type == SRB_LOGIN_CMD) { |
108 | struct srb_iocb *lio = &sp->u.iocb_cmd; | |
ac280b67 | 109 | qla2x00_post_async_logout_work(fcport->vha, fcport, NULL); |
6ac52608 AV |
110 | /* Retry as needed. */ |
111 | lio->u.logio.data[0] = MBS_COMMAND_ERROR; | |
112 | lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? | |
113 | QLA_LOGIO_LOGIN_RETRIED : 0; | |
114 | qla2x00_post_async_login_done_work(fcport->vha, fcport, | |
115 | lio->u.logio.data); | |
116 | } | |
ac280b67 AV |
117 | } |
118 | ||
99b0bec7 | 119 | static void |
9ba56b95 | 120 | qla2x00_async_login_sp_done(void *data, void *ptr, int res) |
99b0bec7 | 121 | { |
9ba56b95 GM |
122 | srb_t *sp = (srb_t *)ptr; |
123 | struct srb_iocb *lio = &sp->u.iocb_cmd; | |
124 | struct scsi_qla_host *vha = (scsi_qla_host_t *)data; | |
125 | ||
126 | if (!test_bit(UNLOADING, &vha->dpc_flags)) | |
127 | qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport, | |
128 | lio->u.logio.data); | |
129 | sp->free(sp->fcport->vha, sp); | |
99b0bec7 AV |
130 | } |
131 | ||
ac280b67 AV |
132 | int |
133 | qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, | |
134 | uint16_t *data) | |
135 | { | |
ac280b67 | 136 | srb_t *sp; |
4916392b | 137 | struct srb_iocb *lio; |
ac280b67 AV |
138 | int rval; |
139 | ||
140 | rval = QLA_FUNCTION_FAILED; | |
9ba56b95 | 141 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); |
ac280b67 AV |
142 | if (!sp) |
143 | goto done; | |
144 | ||
9ba56b95 GM |
145 | sp->type = SRB_LOGIN_CMD; |
146 | sp->name = "login"; | |
147 | qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); | |
148 | ||
149 | lio = &sp->u.iocb_cmd; | |
3822263e | 150 | lio->timeout = qla2x00_async_iocb_timeout; |
9ba56b95 | 151 | sp->done = qla2x00_async_login_sp_done; |
4916392b | 152 | lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; |
ac280b67 | 153 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) |
4916392b | 154 | lio->u.logio.flags |= SRB_LOGIN_RETRIED; |
ac280b67 AV |
155 | rval = qla2x00_start_sp(sp); |
156 | if (rval != QLA_SUCCESS) | |
157 | goto done_free_sp; | |
158 | ||
7c3df132 | 159 | ql_dbg(ql_dbg_disc, vha, 0x2072, |
cfb0919c CD |
160 | "Async-login - hdl=%x, loopid=%x portid=%02x%02x%02x " |
161 | "retries=%d.\n", sp->handle, fcport->loop_id, | |
162 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
163 | fcport->login_retry); | |
ac280b67 AV |
164 | return rval; |
165 | ||
166 | done_free_sp: | |
9ba56b95 | 167 | sp->free(fcport->vha, sp); |
ac280b67 AV |
168 | done: |
169 | return rval; | |
170 | } | |
171 | ||
99b0bec7 | 172 | static void |
9ba56b95 | 173 | qla2x00_async_logout_sp_done(void *data, void *ptr, int res) |
99b0bec7 | 174 | { |
9ba56b95 GM |
175 | srb_t *sp = (srb_t *)ptr; |
176 | struct srb_iocb *lio = &sp->u.iocb_cmd; | |
177 | struct scsi_qla_host *vha = (scsi_qla_host_t *)data; | |
178 | ||
179 | if (!test_bit(UNLOADING, &vha->dpc_flags)) | |
180 | qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport, | |
181 | lio->u.logio.data); | |
182 | sp->free(sp->fcport->vha, sp); | |
99b0bec7 AV |
183 | } |
184 | ||
ac280b67 AV |
185 | int |
186 | qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) | |
187 | { | |
ac280b67 | 188 | srb_t *sp; |
4916392b | 189 | struct srb_iocb *lio; |
ac280b67 AV |
190 | int rval; |
191 | ||
192 | rval = QLA_FUNCTION_FAILED; | |
9ba56b95 | 193 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); |
ac280b67 AV |
194 | if (!sp) |
195 | goto done; | |
196 | ||
9ba56b95 GM |
197 | sp->type = SRB_LOGOUT_CMD; |
198 | sp->name = "logout"; | |
199 | qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); | |
200 | ||
201 | lio = &sp->u.iocb_cmd; | |
3822263e | 202 | lio->timeout = qla2x00_async_iocb_timeout; |
9ba56b95 | 203 | sp->done = qla2x00_async_logout_sp_done; |
ac280b67 AV |
204 | rval = qla2x00_start_sp(sp); |
205 | if (rval != QLA_SUCCESS) | |
206 | goto done_free_sp; | |
207 | ||
7c3df132 | 208 | ql_dbg(ql_dbg_disc, vha, 0x2070, |
cfb0919c CD |
209 | "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", |
210 | sp->handle, fcport->loop_id, fcport->d_id.b.domain, | |
211 | fcport->d_id.b.area, fcport->d_id.b.al_pa); | |
ac280b67 AV |
212 | return rval; |
213 | ||
214 | done_free_sp: | |
9ba56b95 | 215 | sp->free(fcport->vha, sp); |
ac280b67 AV |
216 | done: |
217 | return rval; | |
218 | } | |
219 | ||
5ff1d584 | 220 | static void |
9ba56b95 | 221 | qla2x00_async_adisc_sp_done(void *data, void *ptr, int res) |
5ff1d584 | 222 | { |
9ba56b95 GM |
223 | srb_t *sp = (srb_t *)ptr; |
224 | struct srb_iocb *lio = &sp->u.iocb_cmd; | |
225 | struct scsi_qla_host *vha = (scsi_qla_host_t *)data; | |
226 | ||
227 | if (!test_bit(UNLOADING, &vha->dpc_flags)) | |
228 | qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport, | |
229 | lio->u.logio.data); | |
230 | sp->free(sp->fcport->vha, sp); | |
5ff1d584 AV |
231 | } |
232 | ||
233 | int | |
234 | qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, | |
235 | uint16_t *data) | |
236 | { | |
5ff1d584 | 237 | srb_t *sp; |
4916392b | 238 | struct srb_iocb *lio; |
5ff1d584 AV |
239 | int rval; |
240 | ||
241 | rval = QLA_FUNCTION_FAILED; | |
9ba56b95 | 242 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); |
5ff1d584 AV |
243 | if (!sp) |
244 | goto done; | |
245 | ||
9ba56b95 GM |
246 | sp->type = SRB_ADISC_CMD; |
247 | sp->name = "adisc"; | |
248 | qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); | |
249 | ||
250 | lio = &sp->u.iocb_cmd; | |
3822263e | 251 | lio->timeout = qla2x00_async_iocb_timeout; |
9ba56b95 | 252 | sp->done = qla2x00_async_adisc_sp_done; |
5ff1d584 | 253 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) |
4916392b | 254 | lio->u.logio.flags |= SRB_LOGIN_RETRIED; |
5ff1d584 AV |
255 | rval = qla2x00_start_sp(sp); |
256 | if (rval != QLA_SUCCESS) | |
257 | goto done_free_sp; | |
258 | ||
7c3df132 | 259 | ql_dbg(ql_dbg_disc, vha, 0x206f, |
cfb0919c CD |
260 | "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n", |
261 | sp->handle, fcport->loop_id, fcport->d_id.b.domain, | |
262 | fcport->d_id.b.area, fcport->d_id.b.al_pa); | |
5ff1d584 AV |
263 | return rval; |
264 | ||
265 | done_free_sp: | |
9ba56b95 | 266 | sp->free(fcport->vha, sp); |
5ff1d584 AV |
267 | done: |
268 | return rval; | |
269 | } | |
270 | ||
3822263e | 271 | static void |
9ba56b95 | 272 | qla2x00_async_tm_cmd_done(void *data, void *ptr, int res) |
3822263e | 273 | { |
9ba56b95 GM |
274 | srb_t *sp = (srb_t *)ptr; |
275 | struct srb_iocb *iocb = &sp->u.iocb_cmd; | |
276 | struct scsi_qla_host *vha = (scsi_qla_host_t *)data; | |
277 | uint32_t flags; | |
278 | uint16_t lun; | |
279 | int rval; | |
3822263e | 280 | |
9ba56b95 GM |
281 | if (!test_bit(UNLOADING, &vha->dpc_flags)) { |
282 | flags = iocb->u.tmf.flags; | |
283 | lun = (uint16_t)iocb->u.tmf.lun; | |
284 | ||
285 | /* Issue Marker IOCB */ | |
286 | rval = qla2x00_marker(vha, vha->hw->req_q_map[0], | |
287 | vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun, | |
288 | flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); | |
289 | ||
290 | if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) { | |
291 | ql_dbg(ql_dbg_taskm, vha, 0x8030, | |
292 | "TM IOCB failed (%x).\n", rval); | |
293 | } | |
294 | } | |
295 | sp->free(sp->fcport->vha, sp); | |
3822263e MI |
296 | } |
297 | ||
298 | int | |
9ba56b95 | 299 | qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t tm_flags, uint32_t lun, |
3822263e MI |
300 | uint32_t tag) |
301 | { | |
302 | struct scsi_qla_host *vha = fcport->vha; | |
3822263e | 303 | srb_t *sp; |
3822263e MI |
304 | struct srb_iocb *tcf; |
305 | int rval; | |
306 | ||
307 | rval = QLA_FUNCTION_FAILED; | |
9ba56b95 | 308 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); |
3822263e MI |
309 | if (!sp) |
310 | goto done; | |
311 | ||
9ba56b95 GM |
312 | sp->type = SRB_TM_CMD; |
313 | sp->name = "tmf"; | |
314 | qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); | |
315 | ||
316 | tcf = &sp->u.iocb_cmd; | |
317 | tcf->u.tmf.flags = tm_flags; | |
3822263e MI |
318 | tcf->u.tmf.lun = lun; |
319 | tcf->u.tmf.data = tag; | |
320 | tcf->timeout = qla2x00_async_iocb_timeout; | |
9ba56b95 | 321 | sp->done = qla2x00_async_tm_cmd_done; |
3822263e MI |
322 | |
323 | rval = qla2x00_start_sp(sp); | |
324 | if (rval != QLA_SUCCESS) | |
325 | goto done_free_sp; | |
326 | ||
7c3df132 | 327 | ql_dbg(ql_dbg_taskm, vha, 0x802f, |
cfb0919c CD |
328 | "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", |
329 | sp->handle, fcport->loop_id, fcport->d_id.b.domain, | |
330 | fcport->d_id.b.area, fcport->d_id.b.al_pa); | |
3822263e MI |
331 | return rval; |
332 | ||
333 | done_free_sp: | |
9ba56b95 | 334 | sp->free(fcport->vha, sp); |
3822263e MI |
335 | done: |
336 | return rval; | |
337 | } | |
338 | ||
4916392b | 339 | void |
ac280b67 AV |
340 | qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport, |
341 | uint16_t *data) | |
342 | { | |
343 | int rval; | |
ac280b67 AV |
344 | |
345 | switch (data[0]) { | |
346 | case MBS_COMMAND_COMPLETE: | |
a4f92a32 AV |
347 | /* |
348 | * Driver must validate login state - If PRLI not complete, | |
349 | * force a relogin attempt via implicit LOGO, PLOGI, and PRLI | |
350 | * requests. | |
351 | */ | |
352 | rval = qla2x00_get_port_database(vha, fcport, 0); | |
353 | if (rval != QLA_SUCCESS) { | |
354 | qla2x00_post_async_logout_work(vha, fcport, NULL); | |
355 | qla2x00_post_async_login_work(vha, fcport, NULL); | |
356 | break; | |
357 | } | |
99b0bec7 | 358 | if (fcport->flags & FCF_FCP2_DEVICE) { |
5ff1d584 AV |
359 | qla2x00_post_async_adisc_work(vha, fcport, data); |
360 | break; | |
99b0bec7 AV |
361 | } |
362 | qla2x00_update_fcport(vha, fcport); | |
ac280b67 AV |
363 | break; |
364 | case MBS_COMMAND_ERROR: | |
5ff1d584 | 365 | fcport->flags &= ~FCF_ASYNC_SENT; |
ac280b67 AV |
366 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) |
367 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
368 | else | |
80d79440 | 369 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
ac280b67 AV |
370 | break; |
371 | case MBS_PORT_ID_USED: | |
372 | fcport->loop_id = data[1]; | |
6ac52608 | 373 | qla2x00_post_async_logout_work(vha, fcport, NULL); |
ac280b67 AV |
374 | qla2x00_post_async_login_work(vha, fcport, NULL); |
375 | break; | |
376 | case MBS_LOOP_ID_USED: | |
377 | fcport->loop_id++; | |
378 | rval = qla2x00_find_new_loop_id(vha, fcport); | |
379 | if (rval != QLA_SUCCESS) { | |
5ff1d584 | 380 | fcport->flags &= ~FCF_ASYNC_SENT; |
80d79440 | 381 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
ac280b67 AV |
382 | break; |
383 | } | |
384 | qla2x00_post_async_login_work(vha, fcport, NULL); | |
385 | break; | |
386 | } | |
4916392b | 387 | return; |
ac280b67 AV |
388 | } |
389 | ||
4916392b | 390 | void |
ac280b67 AV |
391 | qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, |
392 | uint16_t *data) | |
393 | { | |
394 | qla2x00_mark_device_lost(vha, fcport, 1, 0); | |
4916392b | 395 | return; |
ac280b67 AV |
396 | } |
397 | ||
4916392b | 398 | void |
5ff1d584 AV |
399 | qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, |
400 | uint16_t *data) | |
401 | { | |
402 | if (data[0] == MBS_COMMAND_COMPLETE) { | |
403 | qla2x00_update_fcport(vha, fcport); | |
404 | ||
4916392b | 405 | return; |
5ff1d584 AV |
406 | } |
407 | ||
408 | /* Retry login. */ | |
409 | fcport->flags &= ~FCF_ASYNC_SENT; | |
410 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) | |
411 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
412 | else | |
80d79440 | 413 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
5ff1d584 | 414 | |
4916392b | 415 | return; |
5ff1d584 AV |
416 | } |
417 | ||
1da177e4 LT |
418 | /****************************************************************************/ |
419 | /* QLogic ISP2x00 Hardware Support Functions. */ | |
420 | /****************************************************************************/ | |
421 | ||
422 | /* | |
423 | * qla2x00_initialize_adapter | |
424 | * Initialize board. | |
425 | * | |
426 | * Input: | |
427 | * ha = adapter block pointer. | |
428 | * | |
429 | * Returns: | |
430 | * 0 = success | |
431 | */ | |
432 | int | |
e315cd28 | 433 | qla2x00_initialize_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
434 | { |
435 | int rval; | |
e315cd28 | 436 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 437 | struct req_que *req = ha->req_q_map[0]; |
2533cf67 | 438 | |
1da177e4 | 439 | /* Clear adapter flags. */ |
e315cd28 | 440 | vha->flags.online = 0; |
2533cf67 | 441 | ha->flags.chip_reset_done = 0; |
e315cd28 | 442 | vha->flags.reset_active = 0; |
85880801 AV |
443 | ha->flags.pci_channel_io_perm_failure = 0; |
444 | ha->flags.eeh_busy = 0; | |
794a5691 | 445 | ha->flags.thermal_supported = 1; |
e315cd28 AC |
446 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); |
447 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
448 | vha->device_flags = DFLG_NO_CABLE; | |
449 | vha->dpc_flags = 0; | |
450 | vha->flags.management_server_logged_in = 0; | |
451 | vha->marker_needed = 0; | |
1da177e4 LT |
452 | ha->isp_abort_cnt = 0; |
453 | ha->beacon_blink_led = 0; | |
454 | ||
73208dfd AC |
455 | set_bit(0, ha->req_qid_map); |
456 | set_bit(0, ha->rsp_qid_map); | |
457 | ||
cfb0919c | 458 | ql_dbg(ql_dbg_init, vha, 0x0040, |
7c3df132 | 459 | "Configuring PCI space...\n"); |
e315cd28 | 460 | rval = ha->isp_ops->pci_config(vha); |
1da177e4 | 461 | if (rval) { |
7c3df132 SK |
462 | ql_log(ql_log_warn, vha, 0x0044, |
463 | "Unable to configure PCI space.\n"); | |
1da177e4 LT |
464 | return (rval); |
465 | } | |
466 | ||
e315cd28 | 467 | ha->isp_ops->reset_chip(vha); |
1da177e4 | 468 | |
e315cd28 | 469 | rval = qla2xxx_get_flash_info(vha); |
c00d8994 | 470 | if (rval) { |
7c3df132 SK |
471 | ql_log(ql_log_fatal, vha, 0x004f, |
472 | "Unable to validate FLASH data.\n"); | |
c00d8994 AV |
473 | return (rval); |
474 | } | |
475 | ||
73208dfd | 476 | ha->isp_ops->get_flash_version(vha, req->ring); |
cfb0919c | 477 | ql_dbg(ql_dbg_init, vha, 0x0061, |
7c3df132 | 478 | "Configure NVRAM parameters...\n"); |
0107109e | 479 | |
e315cd28 | 480 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 481 | |
d4c760c2 AV |
482 | if (ha->flags.disable_serdes) { |
483 | /* Mask HBA via NVRAM settings? */ | |
7c3df132 SK |
484 | ql_log(ql_log_info, vha, 0x0077, |
485 | "Masking HBA WWPN " | |
d4c760c2 | 486 | "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n", |
e315cd28 AC |
487 | vha->port_name[0], vha->port_name[1], |
488 | vha->port_name[2], vha->port_name[3], | |
489 | vha->port_name[4], vha->port_name[5], | |
490 | vha->port_name[6], vha->port_name[7]); | |
d4c760c2 AV |
491 | return QLA_FUNCTION_FAILED; |
492 | } | |
493 | ||
cfb0919c | 494 | ql_dbg(ql_dbg_init, vha, 0x0078, |
7c3df132 | 495 | "Verifying loaded RISC code...\n"); |
1da177e4 | 496 | |
e315cd28 AC |
497 | if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { |
498 | rval = ha->isp_ops->chip_diag(vha); | |
d19044c3 AV |
499 | if (rval) |
500 | return (rval); | |
e315cd28 | 501 | rval = qla2x00_setup_chip(vha); |
d19044c3 AV |
502 | if (rval) |
503 | return (rval); | |
1da177e4 | 504 | } |
a9083016 | 505 | |
4d4df193 | 506 | if (IS_QLA84XX(ha)) { |
e315cd28 | 507 | ha->cs84xx = qla84xx_get_chip(vha); |
4d4df193 | 508 | if (!ha->cs84xx) { |
7c3df132 | 509 | ql_log(ql_log_warn, vha, 0x00d0, |
4d4df193 HK |
510 | "Unable to configure ISP84XX.\n"); |
511 | return QLA_FUNCTION_FAILED; | |
512 | } | |
513 | } | |
e315cd28 | 514 | rval = qla2x00_init_rings(vha); |
2533cf67 | 515 | ha->flags.chip_reset_done = 1; |
1da177e4 | 516 | |
9a069e19 | 517 | if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { |
6c452a45 | 518 | /* Issue verify 84xx FW IOCB to complete 84xx initialization */ |
9a069e19 GM |
519 | rval = qla84xx_init_chip(vha); |
520 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
521 | ql_log(ql_log_warn, vha, 0x00d4, |
522 | "Unable to initialize ISP84XX.\n"); | |
9a069e19 GM |
523 | qla84xx_put_chip(vha); |
524 | } | |
525 | } | |
526 | ||
2f0f3f4f MI |
527 | if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) |
528 | qla24xx_read_fcp_prio_cfg(vha); | |
09ff701a | 529 | |
1da177e4 LT |
530 | return (rval); |
531 | } | |
532 | ||
533 | /** | |
abbd8870 | 534 | * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. |
1da177e4 LT |
535 | * @ha: HA context |
536 | * | |
537 | * Returns 0 on success. | |
538 | */ | |
abbd8870 | 539 | int |
e315cd28 | 540 | qla2100_pci_config(scsi_qla_host_t *vha) |
1da177e4 | 541 | { |
a157b101 | 542 | uint16_t w; |
abbd8870 | 543 | unsigned long flags; |
e315cd28 | 544 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 545 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 546 | |
1da177e4 | 547 | pci_set_master(ha->pdev); |
af6177d8 | 548 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 549 | |
1da177e4 | 550 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 551 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
abbd8870 AV |
552 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
553 | ||
737faece | 554 | pci_disable_rom(ha->pdev); |
1da177e4 LT |
555 | |
556 | /* Get PCI bus information. */ | |
557 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 558 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
1da177e4 LT |
559 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
560 | ||
abbd8870 AV |
561 | return QLA_SUCCESS; |
562 | } | |
1da177e4 | 563 | |
abbd8870 AV |
564 | /** |
565 | * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. | |
566 | * @ha: HA context | |
567 | * | |
568 | * Returns 0 on success. | |
569 | */ | |
570 | int | |
e315cd28 | 571 | qla2300_pci_config(scsi_qla_host_t *vha) |
abbd8870 | 572 | { |
a157b101 | 573 | uint16_t w; |
abbd8870 AV |
574 | unsigned long flags = 0; |
575 | uint32_t cnt; | |
e315cd28 | 576 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 577 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 578 | |
abbd8870 | 579 | pci_set_master(ha->pdev); |
af6177d8 | 580 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 581 | |
abbd8870 | 582 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 583 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
1da177e4 | 584 | |
abbd8870 AV |
585 | if (IS_QLA2322(ha) || IS_QLA6322(ha)) |
586 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
a157b101 | 587 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
1da177e4 | 588 | |
abbd8870 AV |
589 | /* |
590 | * If this is a 2300 card and not 2312, reset the | |
591 | * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, | |
592 | * the 2310 also reports itself as a 2300 so we need to get the | |
593 | * fb revision level -- a 6 indicates it really is a 2300 and | |
594 | * not a 2310. | |
595 | */ | |
596 | if (IS_QLA2300(ha)) { | |
597 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1da177e4 | 598 | |
abbd8870 | 599 | /* Pause RISC. */ |
3d71644c | 600 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); |
abbd8870 | 601 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 602 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) |
abbd8870 | 603 | break; |
1da177e4 | 604 | |
abbd8870 AV |
605 | udelay(10); |
606 | } | |
1da177e4 | 607 | |
abbd8870 | 608 | /* Select FPM registers. */ |
3d71644c AV |
609 | WRT_REG_WORD(®->ctrl_status, 0x20); |
610 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
611 | |
612 | /* Get the fb rev level */ | |
3d71644c | 613 | ha->fb_rev = RD_FB_CMD_REG(ha, reg); |
abbd8870 AV |
614 | |
615 | if (ha->fb_rev == FPM_2300) | |
a157b101 | 616 | pci_clear_mwi(ha->pdev); |
abbd8870 AV |
617 | |
618 | /* Deselect FPM registers. */ | |
3d71644c AV |
619 | WRT_REG_WORD(®->ctrl_status, 0x0); |
620 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
621 | |
622 | /* Release RISC module. */ | |
3d71644c | 623 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); |
abbd8870 | 624 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 625 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) |
abbd8870 AV |
626 | break; |
627 | ||
628 | udelay(10); | |
1da177e4 | 629 | } |
1da177e4 | 630 | |
abbd8870 AV |
631 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
632 | } | |
1da177e4 | 633 | |
abbd8870 AV |
634 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); |
635 | ||
737faece | 636 | pci_disable_rom(ha->pdev); |
1da177e4 | 637 | |
abbd8870 AV |
638 | /* Get PCI bus information. */ |
639 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 640 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
abbd8870 AV |
641 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
642 | ||
643 | return QLA_SUCCESS; | |
1da177e4 LT |
644 | } |
645 | ||
0107109e AV |
646 | /** |
647 | * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. | |
648 | * @ha: HA context | |
649 | * | |
650 | * Returns 0 on success. | |
651 | */ | |
652 | int | |
e315cd28 | 653 | qla24xx_pci_config(scsi_qla_host_t *vha) |
0107109e | 654 | { |
a157b101 | 655 | uint16_t w; |
0107109e | 656 | unsigned long flags = 0; |
e315cd28 | 657 | struct qla_hw_data *ha = vha->hw; |
0107109e | 658 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
0107109e AV |
659 | |
660 | pci_set_master(ha->pdev); | |
af6177d8 | 661 | pci_try_set_mwi(ha->pdev); |
0107109e AV |
662 | |
663 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
a157b101 | 664 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
0107109e AV |
665 | w &= ~PCI_COMMAND_INTX_DISABLE; |
666 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
667 | ||
668 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); | |
669 | ||
670 | /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ | |
f85ec187 AV |
671 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) |
672 | pcix_set_mmrbc(ha->pdev, 2048); | |
0107109e AV |
673 | |
674 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
f85ec187 AV |
675 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) |
676 | pcie_set_readrq(ha->pdev, 2048); | |
0107109e | 677 | |
737faece | 678 | pci_disable_rom(ha->pdev); |
0107109e | 679 | |
44c10138 | 680 | ha->chip_revision = ha->pdev->revision; |
a8488abe | 681 | |
0107109e AV |
682 | /* Get PCI bus information. */ |
683 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
684 | ha->pci_attr = RD_REG_DWORD(®->ctrl_status); | |
685 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
686 | ||
687 | return QLA_SUCCESS; | |
688 | } | |
689 | ||
c3a2f0df AV |
690 | /** |
691 | * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. | |
692 | * @ha: HA context | |
693 | * | |
694 | * Returns 0 on success. | |
695 | */ | |
696 | int | |
e315cd28 | 697 | qla25xx_pci_config(scsi_qla_host_t *vha) |
c3a2f0df AV |
698 | { |
699 | uint16_t w; | |
e315cd28 | 700 | struct qla_hw_data *ha = vha->hw; |
c3a2f0df AV |
701 | |
702 | pci_set_master(ha->pdev); | |
703 | pci_try_set_mwi(ha->pdev); | |
704 | ||
705 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
706 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); | |
707 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
708 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
709 | ||
710 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
711 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) | |
712 | pcie_set_readrq(ha->pdev, 2048); | |
713 | ||
737faece | 714 | pci_disable_rom(ha->pdev); |
c3a2f0df AV |
715 | |
716 | ha->chip_revision = ha->pdev->revision; | |
717 | ||
718 | return QLA_SUCCESS; | |
719 | } | |
720 | ||
1da177e4 LT |
721 | /** |
722 | * qla2x00_isp_firmware() - Choose firmware image. | |
723 | * @ha: HA context | |
724 | * | |
725 | * Returns 0 on success. | |
726 | */ | |
727 | static int | |
e315cd28 | 728 | qla2x00_isp_firmware(scsi_qla_host_t *vha) |
1da177e4 LT |
729 | { |
730 | int rval; | |
42e421b1 AV |
731 | uint16_t loop_id, topo, sw_cap; |
732 | uint8_t domain, area, al_pa; | |
e315cd28 | 733 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
734 | |
735 | /* Assume loading risc code */ | |
fa2a1ce5 | 736 | rval = QLA_FUNCTION_FAILED; |
1da177e4 LT |
737 | |
738 | if (ha->flags.disable_risc_code_load) { | |
7c3df132 | 739 | ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); |
1da177e4 LT |
740 | |
741 | /* Verify checksum of loaded RISC code. */ | |
e315cd28 | 742 | rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); |
42e421b1 AV |
743 | if (rval == QLA_SUCCESS) { |
744 | /* And, verify we are not in ROM code. */ | |
e315cd28 | 745 | rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, |
42e421b1 AV |
746 | &area, &domain, &topo, &sw_cap); |
747 | } | |
1da177e4 LT |
748 | } |
749 | ||
7c3df132 SK |
750 | if (rval) |
751 | ql_dbg(ql_dbg_init, vha, 0x007a, | |
752 | "**** Load RISC code ****.\n"); | |
1da177e4 LT |
753 | |
754 | return (rval); | |
755 | } | |
756 | ||
757 | /** | |
758 | * qla2x00_reset_chip() - Reset ISP chip. | |
759 | * @ha: HA context | |
760 | * | |
761 | * Returns 0 on success. | |
762 | */ | |
abbd8870 | 763 | void |
e315cd28 | 764 | qla2x00_reset_chip(scsi_qla_host_t *vha) |
1da177e4 LT |
765 | { |
766 | unsigned long flags = 0; | |
e315cd28 | 767 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 768 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 769 | uint32_t cnt; |
1da177e4 LT |
770 | uint16_t cmd; |
771 | ||
85880801 AV |
772 | if (unlikely(pci_channel_offline(ha->pdev))) |
773 | return; | |
774 | ||
fd34f556 | 775 | ha->isp_ops->disable_intrs(ha); |
1da177e4 LT |
776 | |
777 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
778 | ||
779 | /* Turn off master enable */ | |
780 | cmd = 0; | |
781 | pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); | |
782 | cmd &= ~PCI_COMMAND_MASTER; | |
783 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
784 | ||
785 | if (!IS_QLA2100(ha)) { | |
786 | /* Pause RISC. */ | |
787 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); | |
788 | if (IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
789 | for (cnt = 0; cnt < 30000; cnt++) { | |
790 | if ((RD_REG_WORD(®->hccr) & | |
791 | HCCR_RISC_PAUSE) != 0) | |
792 | break; | |
793 | udelay(100); | |
794 | } | |
795 | } else { | |
796 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
797 | udelay(10); | |
798 | } | |
799 | ||
800 | /* Select FPM registers. */ | |
801 | WRT_REG_WORD(®->ctrl_status, 0x20); | |
802 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
803 | ||
804 | /* FPM Soft Reset. */ | |
805 | WRT_REG_WORD(®->fpm_diag_config, 0x100); | |
806 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
807 | ||
808 | /* Toggle Fpm Reset. */ | |
809 | if (!IS_QLA2200(ha)) { | |
810 | WRT_REG_WORD(®->fpm_diag_config, 0x0); | |
811 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
812 | } | |
813 | ||
814 | /* Select frame buffer registers. */ | |
815 | WRT_REG_WORD(®->ctrl_status, 0x10); | |
816 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
817 | ||
818 | /* Reset frame buffer FIFOs. */ | |
819 | if (IS_QLA2200(ha)) { | |
820 | WRT_FB_CMD_REG(ha, reg, 0xa000); | |
821 | RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ | |
822 | } else { | |
823 | WRT_FB_CMD_REG(ha, reg, 0x00fc); | |
824 | ||
825 | /* Read back fb_cmd until zero or 3 seconds max */ | |
826 | for (cnt = 0; cnt < 3000; cnt++) { | |
827 | if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) | |
828 | break; | |
829 | udelay(100); | |
830 | } | |
831 | } | |
832 | ||
833 | /* Select RISC module registers. */ | |
834 | WRT_REG_WORD(®->ctrl_status, 0); | |
835 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
836 | ||
837 | /* Reset RISC processor. */ | |
838 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
839 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
840 | ||
841 | /* Release RISC processor. */ | |
842 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
843 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
844 | } | |
845 | ||
846 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
847 | WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); | |
848 | ||
849 | /* Reset ISP chip. */ | |
850 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
851 | ||
852 | /* Wait for RISC to recover from reset. */ | |
853 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
854 | /* | |
855 | * It is necessary to for a delay here since the card doesn't | |
856 | * respond to PCI reads during a reset. On some architectures | |
857 | * this will result in an MCA. | |
858 | */ | |
859 | udelay(20); | |
860 | for (cnt = 30000; cnt; cnt--) { | |
861 | if ((RD_REG_WORD(®->ctrl_status) & | |
862 | CSR_ISP_SOFT_RESET) == 0) | |
863 | break; | |
864 | udelay(100); | |
865 | } | |
866 | } else | |
867 | udelay(10); | |
868 | ||
869 | /* Reset RISC processor. */ | |
870 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
871 | ||
872 | WRT_REG_WORD(®->semaphore, 0); | |
873 | ||
874 | /* Release RISC processor. */ | |
875 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
876 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
877 | ||
878 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
879 | for (cnt = 0; cnt < 30000; cnt++) { | |
ffb39f03 | 880 | if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) |
1da177e4 | 881 | break; |
1da177e4 LT |
882 | |
883 | udelay(100); | |
884 | } | |
885 | } else | |
886 | udelay(100); | |
887 | ||
888 | /* Turn on master enable */ | |
889 | cmd |= PCI_COMMAND_MASTER; | |
890 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
891 | ||
892 | /* Disable RISC pause on FPM parity error. */ | |
893 | if (!IS_QLA2100(ha)) { | |
894 | WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); | |
895 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
896 | } | |
897 | ||
898 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
899 | } | |
900 | ||
b1d46989 MI |
901 | /** |
902 | * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. | |
903 | * | |
904 | * Returns 0 on success. | |
905 | */ | |
906 | int | |
907 | qla81xx_reset_mpi(scsi_qla_host_t *vha) | |
908 | { | |
909 | uint16_t mb[4] = {0x1010, 0, 1, 0}; | |
910 | ||
6246b8a1 GM |
911 | if (!IS_QLA81XX(vha->hw)) |
912 | return QLA_SUCCESS; | |
913 | ||
b1d46989 MI |
914 | return qla81xx_write_mpi_register(vha, mb); |
915 | } | |
916 | ||
0107109e | 917 | /** |
88c26663 | 918 | * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. |
0107109e AV |
919 | * @ha: HA context |
920 | * | |
921 | * Returns 0 on success. | |
922 | */ | |
88c26663 | 923 | static inline void |
e315cd28 | 924 | qla24xx_reset_risc(scsi_qla_host_t *vha) |
0107109e AV |
925 | { |
926 | unsigned long flags = 0; | |
e315cd28 | 927 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
928 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
929 | uint32_t cnt, d2; | |
335a1cc9 | 930 | uint16_t wd; |
b1d46989 | 931 | static int abts_cnt; /* ISP abort retry counts */ |
0107109e | 932 | |
0107109e AV |
933 | spin_lock_irqsave(&ha->hardware_lock, flags); |
934 | ||
935 | /* Reset RISC. */ | |
936 | WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
937 | for (cnt = 0; cnt < 30000; cnt++) { | |
938 | if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) | |
939 | break; | |
940 | ||
941 | udelay(10); | |
942 | } | |
943 | ||
944 | WRT_REG_DWORD(®->ctrl_status, | |
945 | CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
335a1cc9 | 946 | pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); |
88c26663 | 947 | |
335a1cc9 | 948 | udelay(100); |
88c26663 | 949 | /* Wait for firmware to complete NVRAM accesses. */ |
88c26663 AV |
950 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); |
951 | for (cnt = 10000 ; cnt && d2; cnt--) { | |
952 | udelay(5); | |
953 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
954 | barrier(); | |
955 | } | |
956 | ||
335a1cc9 | 957 | /* Wait for soft-reset to complete. */ |
0107109e AV |
958 | d2 = RD_REG_DWORD(®->ctrl_status); |
959 | for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) { | |
960 | udelay(5); | |
961 | d2 = RD_REG_DWORD(®->ctrl_status); | |
962 | barrier(); | |
963 | } | |
964 | ||
b1d46989 MI |
965 | /* If required, do an MPI FW reset now */ |
966 | if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { | |
967 | if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { | |
968 | if (++abts_cnt < 5) { | |
969 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
970 | set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); | |
971 | } else { | |
972 | /* | |
973 | * We exhausted the ISP abort retries. We have to | |
974 | * set the board offline. | |
975 | */ | |
976 | abts_cnt = 0; | |
977 | vha->flags.online = 0; | |
978 | } | |
979 | } | |
980 | } | |
981 | ||
0107109e AV |
982 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); |
983 | RD_REG_DWORD(®->hccr); | |
984 | ||
985 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
986 | RD_REG_DWORD(®->hccr); | |
987 | ||
988 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); | |
989 | RD_REG_DWORD(®->hccr); | |
990 | ||
991 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
992 | for (cnt = 6000000 ; cnt && d2; cnt--) { | |
993 | udelay(5); | |
994 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
995 | barrier(); | |
996 | } | |
997 | ||
998 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
124f85e6 AV |
999 | |
1000 | if (IS_NOPOLLING_TYPE(ha)) | |
1001 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
1002 | } |
1003 | ||
88c26663 AV |
1004 | /** |
1005 | * qla24xx_reset_chip() - Reset ISP24xx chip. | |
1006 | * @ha: HA context | |
1007 | * | |
1008 | * Returns 0 on success. | |
1009 | */ | |
1010 | void | |
e315cd28 | 1011 | qla24xx_reset_chip(scsi_qla_host_t *vha) |
88c26663 | 1012 | { |
e315cd28 | 1013 | struct qla_hw_data *ha = vha->hw; |
85880801 AV |
1014 | |
1015 | if (pci_channel_offline(ha->pdev) && | |
1016 | ha->flags.pci_channel_io_perm_failure) { | |
1017 | return; | |
1018 | } | |
1019 | ||
fd34f556 | 1020 | ha->isp_ops->disable_intrs(ha); |
88c26663 AV |
1021 | |
1022 | /* Perform RISC reset. */ | |
e315cd28 | 1023 | qla24xx_reset_risc(vha); |
88c26663 AV |
1024 | } |
1025 | ||
1da177e4 LT |
1026 | /** |
1027 | * qla2x00_chip_diag() - Test chip for proper operation. | |
1028 | * @ha: HA context | |
1029 | * | |
1030 | * Returns 0 on success. | |
1031 | */ | |
abbd8870 | 1032 | int |
e315cd28 | 1033 | qla2x00_chip_diag(scsi_qla_host_t *vha) |
1da177e4 LT |
1034 | { |
1035 | int rval; | |
e315cd28 | 1036 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 1037 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 LT |
1038 | unsigned long flags = 0; |
1039 | uint16_t data; | |
1040 | uint32_t cnt; | |
1041 | uint16_t mb[5]; | |
73208dfd | 1042 | struct req_que *req = ha->req_q_map[0]; |
1da177e4 LT |
1043 | |
1044 | /* Assume a failed state */ | |
1045 | rval = QLA_FUNCTION_FAILED; | |
1046 | ||
7c3df132 SK |
1047 | ql_dbg(ql_dbg_init, vha, 0x007b, |
1048 | "Testing device at %lx.\n", (u_long)®->flash_address); | |
1da177e4 LT |
1049 | |
1050 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1051 | ||
1052 | /* Reset ISP chip. */ | |
1053 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
1054 | ||
1055 | /* | |
1056 | * We need to have a delay here since the card will not respond while | |
1057 | * in reset causing an MCA on some architectures. | |
1058 | */ | |
1059 | udelay(20); | |
1060 | data = qla2x00_debounce_register(®->ctrl_status); | |
1061 | for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { | |
1062 | udelay(5); | |
1063 | data = RD_REG_WORD(®->ctrl_status); | |
1064 | barrier(); | |
1065 | } | |
1066 | ||
1067 | if (!cnt) | |
1068 | goto chip_diag_failed; | |
1069 | ||
7c3df132 SK |
1070 | ql_dbg(ql_dbg_init, vha, 0x007c, |
1071 | "Reset register cleared by chip reset.\n"); | |
1da177e4 LT |
1072 | |
1073 | /* Reset RISC processor. */ | |
1074 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
1075 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
1076 | ||
1077 | /* Workaround for QLA2312 PCI parity error */ | |
1078 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
1079 | data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); | |
1080 | for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { | |
1081 | udelay(5); | |
1082 | data = RD_MAILBOX_REG(ha, reg, 0); | |
fa2a1ce5 | 1083 | barrier(); |
1da177e4 LT |
1084 | } |
1085 | } else | |
1086 | udelay(10); | |
1087 | ||
1088 | if (!cnt) | |
1089 | goto chip_diag_failed; | |
1090 | ||
1091 | /* Check product ID of chip */ | |
7c3df132 | 1092 | ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n"); |
1da177e4 LT |
1093 | |
1094 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
1095 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
1096 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
1097 | mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); | |
1098 | if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || | |
1099 | mb[3] != PROD_ID_3) { | |
7c3df132 SK |
1100 | ql_log(ql_log_warn, vha, 0x0062, |
1101 | "Wrong product ID = 0x%x,0x%x,0x%x.\n", | |
1102 | mb[1], mb[2], mb[3]); | |
1da177e4 LT |
1103 | |
1104 | goto chip_diag_failed; | |
1105 | } | |
1106 | ha->product_id[0] = mb[1]; | |
1107 | ha->product_id[1] = mb[2]; | |
1108 | ha->product_id[2] = mb[3]; | |
1109 | ha->product_id[3] = mb[4]; | |
1110 | ||
1111 | /* Adjust fw RISC transfer size */ | |
73208dfd | 1112 | if (req->length > 1024) |
1da177e4 LT |
1113 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; |
1114 | else | |
1115 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * | |
73208dfd | 1116 | req->length; |
1da177e4 LT |
1117 | |
1118 | if (IS_QLA2200(ha) && | |
1119 | RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { | |
1120 | /* Limit firmware transfer size with a 2200A */ | |
7c3df132 | 1121 | ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); |
1da177e4 | 1122 | |
ea5b6382 | 1123 | ha->device_type |= DT_ISP2200A; |
1da177e4 LT |
1124 | ha->fw_transfer_size = 128; |
1125 | } | |
1126 | ||
1127 | /* Wrap Incoming Mailboxes Test. */ | |
1128 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1129 | ||
7c3df132 | 1130 | ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); |
e315cd28 | 1131 | rval = qla2x00_mbx_reg_test(vha); |
7c3df132 SK |
1132 | if (rval) |
1133 | ql_log(ql_log_warn, vha, 0x0080, | |
1134 | "Failed mailbox send register test.\n"); | |
1135 | else | |
1da177e4 LT |
1136 | /* Flag a successful rval */ |
1137 | rval = QLA_SUCCESS; | |
1da177e4 LT |
1138 | spin_lock_irqsave(&ha->hardware_lock, flags); |
1139 | ||
1140 | chip_diag_failed: | |
1141 | if (rval) | |
7c3df132 SK |
1142 | ql_log(ql_log_info, vha, 0x0081, |
1143 | "Chip diagnostics **** FAILED ****.\n"); | |
1da177e4 LT |
1144 | |
1145 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1146 | ||
1147 | return (rval); | |
1148 | } | |
1149 | ||
0107109e AV |
1150 | /** |
1151 | * qla24xx_chip_diag() - Test ISP24xx for proper operation. | |
1152 | * @ha: HA context | |
1153 | * | |
1154 | * Returns 0 on success. | |
1155 | */ | |
1156 | int | |
e315cd28 | 1157 | qla24xx_chip_diag(scsi_qla_host_t *vha) |
0107109e AV |
1158 | { |
1159 | int rval; | |
e315cd28 | 1160 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 1161 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 1162 | |
a9083016 GM |
1163 | if (IS_QLA82XX(ha)) |
1164 | return QLA_SUCCESS; | |
1165 | ||
73208dfd | 1166 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; |
0107109e | 1167 | |
e315cd28 | 1168 | rval = qla2x00_mbx_reg_test(vha); |
0107109e | 1169 | if (rval) { |
7c3df132 SK |
1170 | ql_log(ql_log_warn, vha, 0x0082, |
1171 | "Failed mailbox send register test.\n"); | |
0107109e AV |
1172 | } else { |
1173 | /* Flag a successful rval */ | |
1174 | rval = QLA_SUCCESS; | |
1175 | } | |
1176 | ||
1177 | return rval; | |
1178 | } | |
1179 | ||
a7a167bf | 1180 | void |
e315cd28 | 1181 | qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) |
0107109e | 1182 | { |
a7a167bf AV |
1183 | int rval; |
1184 | uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, | |
73208dfd | 1185 | eft_size, fce_size, mq_size; |
df613b96 AV |
1186 | dma_addr_t tc_dma; |
1187 | void *tc; | |
e315cd28 | 1188 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
1189 | struct req_que *req = ha->req_q_map[0]; |
1190 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
a7a167bf AV |
1191 | |
1192 | if (ha->fw_dump) { | |
7c3df132 SK |
1193 | ql_dbg(ql_dbg_init, vha, 0x00bd, |
1194 | "Firmware dump already allocated.\n"); | |
a7a167bf AV |
1195 | return; |
1196 | } | |
d4e3e04d | 1197 | |
0107109e | 1198 | ha->fw_dumped = 0; |
73208dfd | 1199 | fixed_size = mem_size = eft_size = fce_size = mq_size = 0; |
d4e3e04d | 1200 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { |
a7a167bf | 1201 | fixed_size = sizeof(struct qla2100_fw_dump); |
d4e3e04d | 1202 | } else if (IS_QLA23XX(ha)) { |
a7a167bf AV |
1203 | fixed_size = offsetof(struct qla2300_fw_dump, data_ram); |
1204 | mem_size = (ha->fw_memory_size - 0x11000 + 1) * | |
1205 | sizeof(uint16_t); | |
e428924c | 1206 | } else if (IS_FWI2_CAPABLE(ha)) { |
6246b8a1 GM |
1207 | if (IS_QLA83XX(ha)) |
1208 | fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); | |
1209 | else if (IS_QLA81XX(ha)) | |
3a03eb79 AV |
1210 | fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); |
1211 | else if (IS_QLA25XX(ha)) | |
1212 | fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); | |
1213 | else | |
1214 | fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); | |
a7a167bf AV |
1215 | mem_size = (ha->fw_memory_size - 0x100000 + 1) * |
1216 | sizeof(uint32_t); | |
050c9bb1 | 1217 | if (ha->mqenable) { |
6246b8a1 GM |
1218 | if (!IS_QLA83XX(ha)) |
1219 | mq_size = sizeof(struct qla2xxx_mq_chain); | |
050c9bb1 GM |
1220 | /* |
1221 | * Allocate maximum buffer size for all queues. | |
1222 | * Resizing must be done at end-of-dump processing. | |
1223 | */ | |
1224 | mq_size += ha->max_req_queues * | |
1225 | (req->length * sizeof(request_t)); | |
1226 | mq_size += ha->max_rsp_queues * | |
1227 | (rsp->length * sizeof(response_t)); | |
1228 | } | |
df613b96 | 1229 | /* Allocate memory for Fibre Channel Event Buffer. */ |
6246b8a1 | 1230 | if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha)) |
436a7b11 | 1231 | goto try_eft; |
df613b96 AV |
1232 | |
1233 | tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, | |
1234 | GFP_KERNEL); | |
1235 | if (!tc) { | |
7c3df132 SK |
1236 | ql_log(ql_log_warn, vha, 0x00be, |
1237 | "Unable to allocate (%d KB) for FCE.\n", | |
1238 | FCE_SIZE / 1024); | |
17d98630 | 1239 | goto try_eft; |
df613b96 AV |
1240 | } |
1241 | ||
1242 | memset(tc, 0, FCE_SIZE); | |
e315cd28 | 1243 | rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, |
df613b96 AV |
1244 | ha->fce_mb, &ha->fce_bufs); |
1245 | if (rval) { | |
7c3df132 SK |
1246 | ql_log(ql_log_warn, vha, 0x00bf, |
1247 | "Unable to initialize FCE (%d).\n", rval); | |
df613b96 AV |
1248 | dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, |
1249 | tc_dma); | |
1250 | ha->flags.fce_enabled = 0; | |
17d98630 | 1251 | goto try_eft; |
df613b96 | 1252 | } |
cfb0919c | 1253 | ql_dbg(ql_dbg_init, vha, 0x00c0, |
7c3df132 | 1254 | "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); |
df613b96 | 1255 | |
7d9dade3 | 1256 | fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; |
df613b96 AV |
1257 | ha->flags.fce_enabled = 1; |
1258 | ha->fce_dma = tc_dma; | |
1259 | ha->fce = tc; | |
436a7b11 AV |
1260 | try_eft: |
1261 | /* Allocate memory for Extended Trace Buffer. */ | |
1262 | tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, | |
1263 | GFP_KERNEL); | |
1264 | if (!tc) { | |
7c3df132 SK |
1265 | ql_log(ql_log_warn, vha, 0x00c1, |
1266 | "Unable to allocate (%d KB) for EFT.\n", | |
1267 | EFT_SIZE / 1024); | |
436a7b11 AV |
1268 | goto cont_alloc; |
1269 | } | |
1270 | ||
1271 | memset(tc, 0, EFT_SIZE); | |
e315cd28 | 1272 | rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); |
436a7b11 | 1273 | if (rval) { |
7c3df132 SK |
1274 | ql_log(ql_log_warn, vha, 0x00c2, |
1275 | "Unable to initialize EFT (%d).\n", rval); | |
436a7b11 AV |
1276 | dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, |
1277 | tc_dma); | |
1278 | goto cont_alloc; | |
1279 | } | |
cfb0919c | 1280 | ql_dbg(ql_dbg_init, vha, 0x00c3, |
7c3df132 | 1281 | "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); |
436a7b11 AV |
1282 | |
1283 | eft_size = EFT_SIZE; | |
1284 | ha->eft_dma = tc_dma; | |
1285 | ha->eft = tc; | |
d4e3e04d | 1286 | } |
a7a167bf | 1287 | cont_alloc: |
73208dfd AC |
1288 | req_q_size = req->length * sizeof(request_t); |
1289 | rsp_q_size = rsp->length * sizeof(response_t); | |
a7a167bf AV |
1290 | |
1291 | dump_size = offsetof(struct qla2xxx_fw_dump, isp); | |
2afa19a9 | 1292 | dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; |
bb99de67 AV |
1293 | ha->chain_offset = dump_size; |
1294 | dump_size += mq_size + fce_size; | |
d4e3e04d AV |
1295 | |
1296 | ha->fw_dump = vmalloc(dump_size); | |
a7a167bf | 1297 | if (!ha->fw_dump) { |
7c3df132 SK |
1298 | ql_log(ql_log_warn, vha, 0x00c4, |
1299 | "Unable to allocate (%d KB) for firmware dump.\n", | |
1300 | dump_size / 1024); | |
a7a167bf | 1301 | |
e30d1756 MI |
1302 | if (ha->fce) { |
1303 | dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce, | |
1304 | ha->fce_dma); | |
1305 | ha->fce = NULL; | |
1306 | ha->fce_dma = 0; | |
1307 | } | |
1308 | ||
a7a167bf AV |
1309 | if (ha->eft) { |
1310 | dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft, | |
1311 | ha->eft_dma); | |
1312 | ha->eft = NULL; | |
1313 | ha->eft_dma = 0; | |
1314 | } | |
1315 | return; | |
1316 | } | |
cfb0919c | 1317 | ql_dbg(ql_dbg_init, vha, 0x00c5, |
7c3df132 | 1318 | "Allocated (%d KB) for firmware dump.\n", dump_size / 1024); |
a7a167bf AV |
1319 | |
1320 | ha->fw_dump_len = dump_size; | |
1321 | ha->fw_dump->signature[0] = 'Q'; | |
1322 | ha->fw_dump->signature[1] = 'L'; | |
1323 | ha->fw_dump->signature[2] = 'G'; | |
1324 | ha->fw_dump->signature[3] = 'C'; | |
1325 | ha->fw_dump->version = __constant_htonl(1); | |
1326 | ||
1327 | ha->fw_dump->fixed_size = htonl(fixed_size); | |
1328 | ha->fw_dump->mem_size = htonl(mem_size); | |
1329 | ha->fw_dump->req_q_size = htonl(req_q_size); | |
1330 | ha->fw_dump->rsp_q_size = htonl(rsp_q_size); | |
1331 | ||
1332 | ha->fw_dump->eft_size = htonl(eft_size); | |
1333 | ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); | |
1334 | ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); | |
1335 | ||
1336 | ha->fw_dump->header_size = | |
1337 | htonl(offsetof(struct qla2xxx_fw_dump, isp)); | |
0107109e AV |
1338 | } |
1339 | ||
18e7555a AV |
1340 | static int |
1341 | qla81xx_mpi_sync(scsi_qla_host_t *vha) | |
1342 | { | |
1343 | #define MPS_MASK 0xe0 | |
1344 | int rval; | |
1345 | uint16_t dc; | |
1346 | uint32_t dw; | |
18e7555a AV |
1347 | |
1348 | if (!IS_QLA81XX(vha->hw)) | |
1349 | return QLA_SUCCESS; | |
1350 | ||
1351 | rval = qla2x00_write_ram_word(vha, 0x7c00, 1); | |
1352 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
1353 | ql_log(ql_log_warn, vha, 0x0105, |
1354 | "Unable to acquire semaphore.\n"); | |
18e7555a AV |
1355 | goto done; |
1356 | } | |
1357 | ||
1358 | pci_read_config_word(vha->hw->pdev, 0x54, &dc); | |
1359 | rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); | |
1360 | if (rval != QLA_SUCCESS) { | |
7c3df132 | 1361 | ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); |
18e7555a AV |
1362 | goto done_release; |
1363 | } | |
1364 | ||
1365 | dc &= MPS_MASK; | |
1366 | if (dc == (dw & MPS_MASK)) | |
1367 | goto done_release; | |
1368 | ||
1369 | dw &= ~MPS_MASK; | |
1370 | dw |= dc; | |
1371 | rval = qla2x00_write_ram_word(vha, 0x7a15, dw); | |
1372 | if (rval != QLA_SUCCESS) { | |
7c3df132 | 1373 | ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); |
18e7555a AV |
1374 | } |
1375 | ||
1376 | done_release: | |
1377 | rval = qla2x00_write_ram_word(vha, 0x7c00, 0); | |
1378 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
1379 | ql_log(ql_log_warn, vha, 0x006d, |
1380 | "Unable to release semaphore.\n"); | |
18e7555a AV |
1381 | } |
1382 | ||
1383 | done: | |
1384 | return rval; | |
1385 | } | |
1386 | ||
1da177e4 LT |
1387 | /** |
1388 | * qla2x00_setup_chip() - Load and start RISC firmware. | |
1389 | * @ha: HA context | |
1390 | * | |
1391 | * Returns 0 on success. | |
1392 | */ | |
1393 | static int | |
e315cd28 | 1394 | qla2x00_setup_chip(scsi_qla_host_t *vha) |
1da177e4 | 1395 | { |
0107109e AV |
1396 | int rval; |
1397 | uint32_t srisc_address = 0; | |
e315cd28 | 1398 | struct qla_hw_data *ha = vha->hw; |
3db0652e AV |
1399 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1400 | unsigned long flags; | |
dda772e8 | 1401 | uint16_t fw_major_version; |
3db0652e | 1402 | |
a9083016 GM |
1403 | if (IS_QLA82XX(ha)) { |
1404 | rval = ha->isp_ops->load_risc(vha, &srisc_address); | |
14e303d9 AV |
1405 | if (rval == QLA_SUCCESS) { |
1406 | qla2x00_stop_firmware(vha); | |
a9083016 | 1407 | goto enable_82xx_npiv; |
14e303d9 | 1408 | } else |
b963752f | 1409 | goto failed; |
a9083016 GM |
1410 | } |
1411 | ||
3db0652e AV |
1412 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { |
1413 | /* Disable SRAM, Instruction RAM and GP RAM parity. */ | |
1414 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1415 | WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); | |
1416 | RD_REG_WORD(®->hccr); | |
1417 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1418 | } | |
1da177e4 | 1419 | |
18e7555a AV |
1420 | qla81xx_mpi_sync(vha); |
1421 | ||
1da177e4 | 1422 | /* Load firmware sequences */ |
e315cd28 | 1423 | rval = ha->isp_ops->load_risc(vha, &srisc_address); |
0107109e | 1424 | if (rval == QLA_SUCCESS) { |
7c3df132 SK |
1425 | ql_dbg(ql_dbg_init, vha, 0x00c9, |
1426 | "Verifying Checksum of loaded RISC code.\n"); | |
1da177e4 | 1427 | |
e315cd28 | 1428 | rval = qla2x00_verify_checksum(vha, srisc_address); |
1da177e4 LT |
1429 | if (rval == QLA_SUCCESS) { |
1430 | /* Start firmware execution. */ | |
7c3df132 SK |
1431 | ql_dbg(ql_dbg_init, vha, 0x00ca, |
1432 | "Starting firmware.\n"); | |
1da177e4 | 1433 | |
e315cd28 | 1434 | rval = qla2x00_execute_fw(vha, srisc_address); |
1da177e4 | 1435 | /* Retrieve firmware information. */ |
dda772e8 | 1436 | if (rval == QLA_SUCCESS) { |
a9083016 | 1437 | enable_82xx_npiv: |
dda772e8 | 1438 | fw_major_version = ha->fw_major_version; |
3173167f GM |
1439 | if (IS_QLA82XX(ha)) |
1440 | qla82xx_check_md_needed(vha); | |
6246b8a1 GM |
1441 | else |
1442 | rval = qla2x00_get_fw_version(vha); | |
ca9e9c3e AV |
1443 | if (rval != QLA_SUCCESS) |
1444 | goto failed; | |
2c3dfe3f | 1445 | ha->flags.npiv_supported = 0; |
e315cd28 | 1446 | if (IS_QLA2XXX_MIDTYPE(ha) && |
946fb891 | 1447 | (ha->fw_attributes & BIT_2)) { |
2c3dfe3f | 1448 | ha->flags.npiv_supported = 1; |
4d0ea247 SJ |
1449 | if ((!ha->max_npiv_vports) || |
1450 | ((ha->max_npiv_vports + 1) % | |
eb66dc60 | 1451 | MIN_MULTI_ID_FABRIC)) |
4d0ea247 | 1452 | ha->max_npiv_vports = |
eb66dc60 | 1453 | MIN_MULTI_ID_FABRIC - 1; |
4d0ea247 | 1454 | } |
24a08138 AV |
1455 | qla2x00_get_resource_cnts(vha, NULL, |
1456 | &ha->fw_xcb_count, NULL, NULL, | |
f3a0a77e | 1457 | &ha->max_npiv_vports, NULL); |
d743de66 | 1458 | |
be5ea3cf SK |
1459 | if (!fw_major_version && ql2xallocfwdump |
1460 | && !IS_QLA82XX(ha)) | |
08de2844 | 1461 | qla2x00_alloc_fw_dump(vha); |
1da177e4 LT |
1462 | } |
1463 | } else { | |
7c3df132 SK |
1464 | ql_log(ql_log_fatal, vha, 0x00cd, |
1465 | "ISP Firmware failed checksum.\n"); | |
1466 | goto failed; | |
1da177e4 LT |
1467 | } |
1468 | } | |
1469 | ||
3db0652e AV |
1470 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { |
1471 | /* Enable proper parity. */ | |
1472 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1473 | if (IS_QLA2300(ha)) | |
1474 | /* SRAM parity */ | |
1475 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); | |
1476 | else | |
1477 | /* SRAM, Instruction RAM and GP RAM parity */ | |
1478 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); | |
1479 | RD_REG_WORD(®->hccr); | |
1480 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1481 | } | |
1482 | ||
6246b8a1 GM |
1483 | if (IS_QLA83XX(ha)) |
1484 | goto skip_fac_check; | |
1485 | ||
1d2874de JC |
1486 | if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { |
1487 | uint32_t size; | |
1488 | ||
1489 | rval = qla81xx_fac_get_sector_size(vha, &size); | |
1490 | if (rval == QLA_SUCCESS) { | |
1491 | ha->flags.fac_supported = 1; | |
1492 | ha->fdt_block_size = size << 2; | |
1493 | } else { | |
7c3df132 | 1494 | ql_log(ql_log_warn, vha, 0x00ce, |
1d2874de JC |
1495 | "Unsupported FAC firmware (%d.%02d.%02d).\n", |
1496 | ha->fw_major_version, ha->fw_minor_version, | |
1497 | ha->fw_subminor_version); | |
6246b8a1 GM |
1498 | skip_fac_check: |
1499 | if (IS_QLA83XX(ha)) { | |
1500 | ha->flags.fac_supported = 0; | |
1501 | rval = QLA_SUCCESS; | |
1502 | } | |
1d2874de JC |
1503 | } |
1504 | } | |
ca9e9c3e | 1505 | failed: |
1da177e4 | 1506 | if (rval) { |
7c3df132 SK |
1507 | ql_log(ql_log_fatal, vha, 0x00cf, |
1508 | "Setup chip ****FAILED****.\n"); | |
1da177e4 LT |
1509 | } |
1510 | ||
1511 | return (rval); | |
1512 | } | |
1513 | ||
1514 | /** | |
1515 | * qla2x00_init_response_q_entries() - Initializes response queue entries. | |
1516 | * @ha: HA context | |
1517 | * | |
1518 | * Beginning of request ring has initialization control block already built | |
1519 | * by nvram config routine. | |
1520 | * | |
1521 | * Returns 0 on success. | |
1522 | */ | |
73208dfd AC |
1523 | void |
1524 | qla2x00_init_response_q_entries(struct rsp_que *rsp) | |
1da177e4 LT |
1525 | { |
1526 | uint16_t cnt; | |
1527 | response_t *pkt; | |
1528 | ||
2afa19a9 AC |
1529 | rsp->ring_ptr = rsp->ring; |
1530 | rsp->ring_index = 0; | |
1531 | rsp->status_srb = NULL; | |
e315cd28 AC |
1532 | pkt = rsp->ring_ptr; |
1533 | for (cnt = 0; cnt < rsp->length; cnt++) { | |
1da177e4 LT |
1534 | pkt->signature = RESPONSE_PROCESSED; |
1535 | pkt++; | |
1536 | } | |
1da177e4 LT |
1537 | } |
1538 | ||
1539 | /** | |
1540 | * qla2x00_update_fw_options() - Read and process firmware options. | |
1541 | * @ha: HA context | |
1542 | * | |
1543 | * Returns 0 on success. | |
1544 | */ | |
abbd8870 | 1545 | void |
e315cd28 | 1546 | qla2x00_update_fw_options(scsi_qla_host_t *vha) |
1da177e4 LT |
1547 | { |
1548 | uint16_t swing, emphasis, tx_sens, rx_sens; | |
e315cd28 | 1549 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1550 | |
1551 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
e315cd28 | 1552 | qla2x00_get_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1553 | |
1554 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) | |
1555 | return; | |
1556 | ||
1557 | /* Serial Link options. */ | |
7c3df132 SK |
1558 | ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, |
1559 | "Serial link options.\n"); | |
1560 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, | |
1561 | (uint8_t *)&ha->fw_seriallink_options, | |
1562 | sizeof(ha->fw_seriallink_options)); | |
1da177e4 LT |
1563 | |
1564 | ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; | |
1565 | if (ha->fw_seriallink_options[3] & BIT_2) { | |
1566 | ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; | |
1567 | ||
1568 | /* 1G settings */ | |
1569 | swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); | |
1570 | emphasis = (ha->fw_seriallink_options[2] & | |
1571 | (BIT_4 | BIT_3)) >> 3; | |
1572 | tx_sens = ha->fw_seriallink_options[0] & | |
fa2a1ce5 | 1573 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1574 | rx_sens = (ha->fw_seriallink_options[0] & |
1575 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1576 | ha->fw_options[10] = (emphasis << 14) | (swing << 8); | |
1577 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1578 | if (rx_sens == 0x0) | |
1579 | rx_sens = 0x3; | |
1580 | ha->fw_options[10] |= (tx_sens << 4) | rx_sens; | |
1581 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1582 | ha->fw_options[10] |= BIT_5 | | |
1583 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1584 | (tx_sens & (BIT_1 | BIT_0)); | |
1585 | ||
1586 | /* 2G settings */ | |
1587 | swing = (ha->fw_seriallink_options[2] & | |
1588 | (BIT_7 | BIT_6 | BIT_5)) >> 5; | |
1589 | emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); | |
1590 | tx_sens = ha->fw_seriallink_options[1] & | |
fa2a1ce5 | 1591 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1592 | rx_sens = (ha->fw_seriallink_options[1] & |
1593 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1594 | ha->fw_options[11] = (emphasis << 14) | (swing << 8); | |
1595 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1596 | if (rx_sens == 0x0) | |
1597 | rx_sens = 0x3; | |
1598 | ha->fw_options[11] |= (tx_sens << 4) | rx_sens; | |
1599 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1600 | ha->fw_options[11] |= BIT_5 | | |
1601 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1602 | (tx_sens & (BIT_1 | BIT_0)); | |
1603 | } | |
1604 | ||
1605 | /* FCP2 options. */ | |
1606 | /* Return command IOCBs without waiting for an ABTS to complete. */ | |
1607 | ha->fw_options[3] |= BIT_13; | |
1608 | ||
1609 | /* LED scheme. */ | |
1610 | if (ha->flags.enable_led_scheme) | |
1611 | ha->fw_options[2] |= BIT_12; | |
1612 | ||
48c02fde AV |
1613 | /* Detect ISP6312. */ |
1614 | if (IS_QLA6312(ha)) | |
1615 | ha->fw_options[2] |= BIT_13; | |
1616 | ||
1da177e4 | 1617 | /* Update firmware options. */ |
e315cd28 | 1618 | qla2x00_set_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1619 | } |
1620 | ||
0107109e | 1621 | void |
e315cd28 | 1622 | qla24xx_update_fw_options(scsi_qla_host_t *vha) |
0107109e AV |
1623 | { |
1624 | int rval; | |
e315cd28 | 1625 | struct qla_hw_data *ha = vha->hw; |
0107109e | 1626 | |
a9083016 GM |
1627 | if (IS_QLA82XX(ha)) |
1628 | return; | |
1629 | ||
0107109e | 1630 | /* Update Serial Link options. */ |
f94097ed | 1631 | if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) |
0107109e AV |
1632 | return; |
1633 | ||
e315cd28 | 1634 | rval = qla2x00_set_serdes_params(vha, |
f94097ed AV |
1635 | le16_to_cpu(ha->fw_seriallink_options24[1]), |
1636 | le16_to_cpu(ha->fw_seriallink_options24[2]), | |
1637 | le16_to_cpu(ha->fw_seriallink_options24[3])); | |
0107109e | 1638 | if (rval != QLA_SUCCESS) { |
7c3df132 | 1639 | ql_log(ql_log_warn, vha, 0x0104, |
0107109e AV |
1640 | "Unable to update Serial Link options (%x).\n", rval); |
1641 | } | |
1642 | } | |
1643 | ||
abbd8870 | 1644 | void |
e315cd28 | 1645 | qla2x00_config_rings(struct scsi_qla_host *vha) |
abbd8870 | 1646 | { |
e315cd28 | 1647 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 1648 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
73208dfd AC |
1649 | struct req_que *req = ha->req_q_map[0]; |
1650 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
abbd8870 AV |
1651 | |
1652 | /* Setup ring parameters in initialization control block. */ | |
1653 | ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1654 | ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1655 | ha->init_cb->request_q_length = cpu_to_le16(req->length); |
1656 | ha->init_cb->response_q_length = cpu_to_le16(rsp->length); | |
1657 | ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1658 | ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1659 | ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1660 | ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
abbd8870 AV |
1661 | |
1662 | WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); | |
1663 | WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); | |
1664 | WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); | |
1665 | WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); | |
1666 | RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ | |
1667 | } | |
1668 | ||
0107109e | 1669 | void |
e315cd28 | 1670 | qla24xx_config_rings(struct scsi_qla_host *vha) |
0107109e | 1671 | { |
e315cd28 | 1672 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
1673 | device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0); |
1674 | struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; | |
1675 | struct qla_msix_entry *msix; | |
0107109e | 1676 | struct init_cb_24xx *icb; |
73208dfd AC |
1677 | uint16_t rid = 0; |
1678 | struct req_que *req = ha->req_q_map[0]; | |
1679 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
0107109e | 1680 | |
6246b8a1 | 1681 | /* Setup ring parameters in initialization control block. */ |
0107109e AV |
1682 | icb = (struct init_cb_24xx *)ha->init_cb; |
1683 | icb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1684 | icb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1685 | icb->request_q_length = cpu_to_le16(req->length); |
1686 | icb->response_q_length = cpu_to_le16(rsp->length); | |
1687 | icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1688 | icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1689 | icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1690 | icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
0107109e | 1691 | |
6246b8a1 | 1692 | if (ha->mqenable || IS_QLA83XX(ha)) { |
73208dfd AC |
1693 | icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS); |
1694 | icb->rid = __constant_cpu_to_le16(rid); | |
1695 | if (ha->flags.msix_enabled) { | |
1696 | msix = &ha->msix_entries[1]; | |
7c3df132 SK |
1697 | ql_dbg(ql_dbg_init, vha, 0x00fd, |
1698 | "Registering vector 0x%x for base que.\n", | |
1699 | msix->entry); | |
73208dfd AC |
1700 | icb->msix = cpu_to_le16(msix->entry); |
1701 | } | |
1702 | /* Use alternate PCI bus number */ | |
1703 | if (MSB(rid)) | |
1704 | icb->firmware_options_2 |= | |
1705 | __constant_cpu_to_le32(BIT_19); | |
1706 | /* Use alternate PCI devfn */ | |
1707 | if (LSB(rid)) | |
1708 | icb->firmware_options_2 |= | |
1709 | __constant_cpu_to_le32(BIT_18); | |
1710 | ||
3155754a | 1711 | /* Use Disable MSIX Handshake mode for capable adapters */ |
6246b8a1 GM |
1712 | if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && |
1713 | (ha->flags.msix_enabled)) { | |
3155754a AC |
1714 | icb->firmware_options_2 &= |
1715 | __constant_cpu_to_le32(~BIT_22); | |
1716 | ha->flags.disable_msix_handshake = 1; | |
7c3df132 SK |
1717 | ql_dbg(ql_dbg_init, vha, 0x00fe, |
1718 | "MSIX Handshake Disable Mode turned on.\n"); | |
3155754a AC |
1719 | } else { |
1720 | icb->firmware_options_2 |= | |
1721 | __constant_cpu_to_le32(BIT_22); | |
1722 | } | |
73208dfd | 1723 | icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23); |
73208dfd AC |
1724 | |
1725 | WRT_REG_DWORD(®->isp25mq.req_q_in, 0); | |
1726 | WRT_REG_DWORD(®->isp25mq.req_q_out, 0); | |
1727 | WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); | |
1728 | WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); | |
1729 | } else { | |
1730 | WRT_REG_DWORD(®->isp24.req_q_in, 0); | |
1731 | WRT_REG_DWORD(®->isp24.req_q_out, 0); | |
1732 | WRT_REG_DWORD(®->isp24.rsp_q_in, 0); | |
1733 | WRT_REG_DWORD(®->isp24.rsp_q_out, 0); | |
1734 | } | |
1735 | /* PCI posting */ | |
1736 | RD_REG_DWORD(&ioreg->hccr); | |
0107109e AV |
1737 | } |
1738 | ||
1da177e4 LT |
1739 | /** |
1740 | * qla2x00_init_rings() - Initializes firmware. | |
1741 | * @ha: HA context | |
1742 | * | |
1743 | * Beginning of request ring has initialization control block already built | |
1744 | * by nvram config routine. | |
1745 | * | |
1746 | * Returns 0 on success. | |
1747 | */ | |
1748 | static int | |
e315cd28 | 1749 | qla2x00_init_rings(scsi_qla_host_t *vha) |
1da177e4 LT |
1750 | { |
1751 | int rval; | |
1752 | unsigned long flags = 0; | |
29bdccbe | 1753 | int cnt, que; |
e315cd28 | 1754 | struct qla_hw_data *ha = vha->hw; |
29bdccbe AC |
1755 | struct req_que *req; |
1756 | struct rsp_que *rsp; | |
2c3dfe3f SJ |
1757 | struct mid_init_cb_24xx *mid_init_cb = |
1758 | (struct mid_init_cb_24xx *) ha->init_cb; | |
1da177e4 LT |
1759 | |
1760 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1761 | ||
1762 | /* Clear outstanding commands array. */ | |
2afa19a9 | 1763 | for (que = 0; que < ha->max_req_queues; que++) { |
29bdccbe AC |
1764 | req = ha->req_q_map[que]; |
1765 | if (!req) | |
1766 | continue; | |
2afa19a9 | 1767 | for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) |
29bdccbe | 1768 | req->outstanding_cmds[cnt] = NULL; |
1da177e4 | 1769 | |
2afa19a9 | 1770 | req->current_outstanding_cmd = 1; |
1da177e4 | 1771 | |
29bdccbe AC |
1772 | /* Initialize firmware. */ |
1773 | req->ring_ptr = req->ring; | |
1774 | req->ring_index = 0; | |
1775 | req->cnt = req->length; | |
1776 | } | |
1da177e4 | 1777 | |
2afa19a9 | 1778 | for (que = 0; que < ha->max_rsp_queues; que++) { |
29bdccbe AC |
1779 | rsp = ha->rsp_q_map[que]; |
1780 | if (!rsp) | |
1781 | continue; | |
29bdccbe AC |
1782 | /* Initialize response queue entries */ |
1783 | qla2x00_init_response_q_entries(rsp); | |
1784 | } | |
1da177e4 | 1785 | |
542bce1f | 1786 | spin_lock(&ha->vport_slock); |
feafb7b1 | 1787 | |
542bce1f | 1788 | spin_unlock(&ha->vport_slock); |
feafb7b1 | 1789 | |
e315cd28 | 1790 | ha->isp_ops->config_rings(vha); |
1da177e4 LT |
1791 | |
1792 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1793 | ||
1794 | /* Update any ISP specific firmware options before initialization. */ | |
e315cd28 | 1795 | ha->isp_ops->update_fw_options(vha); |
1da177e4 | 1796 | |
7c3df132 | 1797 | ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); |
2c3dfe3f | 1798 | |
605aa2bc LC |
1799 | if (ha->flags.npiv_supported) { |
1800 | if (ha->operating_mode == LOOP) | |
1801 | ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; | |
c48339de | 1802 | mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); |
605aa2bc LC |
1803 | } |
1804 | ||
24a08138 AV |
1805 | if (IS_FWI2_CAPABLE(ha)) { |
1806 | mid_init_cb->options = __constant_cpu_to_le16(BIT_1); | |
1807 | mid_init_cb->init_cb.execution_throttle = | |
1808 | cpu_to_le16(ha->fw_xcb_count); | |
1809 | } | |
2c3dfe3f | 1810 | |
e315cd28 | 1811 | rval = qla2x00_init_firmware(vha, ha->init_cb_size); |
1da177e4 | 1812 | if (rval) { |
7c3df132 SK |
1813 | ql_log(ql_log_fatal, vha, 0x00d2, |
1814 | "Init Firmware **** FAILED ****.\n"); | |
1da177e4 | 1815 | } else { |
7c3df132 SK |
1816 | ql_dbg(ql_dbg_init, vha, 0x00d3, |
1817 | "Init Firmware -- success.\n"); | |
1da177e4 LT |
1818 | } |
1819 | ||
1820 | return (rval); | |
1821 | } | |
1822 | ||
1823 | /** | |
1824 | * qla2x00_fw_ready() - Waits for firmware ready. | |
1825 | * @ha: HA context | |
1826 | * | |
1827 | * Returns 0 on success. | |
1828 | */ | |
1829 | static int | |
e315cd28 | 1830 | qla2x00_fw_ready(scsi_qla_host_t *vha) |
1da177e4 LT |
1831 | { |
1832 | int rval; | |
4d4df193 | 1833 | unsigned long wtime, mtime, cs84xx_time; |
1da177e4 LT |
1834 | uint16_t min_wait; /* Minimum wait time if loop is down */ |
1835 | uint16_t wait_time; /* Wait time if loop is coming ready */ | |
656e8912 | 1836 | uint16_t state[5]; |
e315cd28 | 1837 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1838 | |
1839 | rval = QLA_SUCCESS; | |
1840 | ||
1841 | /* 20 seconds for loop down. */ | |
fa2a1ce5 | 1842 | min_wait = 20; |
1da177e4 LT |
1843 | |
1844 | /* | |
1845 | * Firmware should take at most one RATOV to login, plus 5 seconds for | |
1846 | * our own processing. | |
1847 | */ | |
1848 | if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { | |
1849 | wait_time = min_wait; | |
1850 | } | |
1851 | ||
1852 | /* Min wait time if loop down */ | |
1853 | mtime = jiffies + (min_wait * HZ); | |
1854 | ||
1855 | /* wait time before firmware ready */ | |
1856 | wtime = jiffies + (wait_time * HZ); | |
1857 | ||
1858 | /* Wait for ISP to finish LIP */ | |
e315cd28 | 1859 | if (!vha->flags.init_done) |
7c3df132 SK |
1860 | ql_log(ql_log_info, vha, 0x801e, |
1861 | "Waiting for LIP to complete.\n"); | |
1da177e4 LT |
1862 | |
1863 | do { | |
e315cd28 | 1864 | rval = qla2x00_get_firmware_state(vha, state); |
1da177e4 | 1865 | if (rval == QLA_SUCCESS) { |
4d4df193 | 1866 | if (state[0] < FSTATE_LOSS_OF_SYNC) { |
e315cd28 | 1867 | vha->device_flags &= ~DFLG_NO_CABLE; |
1da177e4 | 1868 | } |
4d4df193 | 1869 | if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { |
7c3df132 SK |
1870 | ql_dbg(ql_dbg_taskm, vha, 0x801f, |
1871 | "fw_state=%x 84xx=%x.\n", state[0], | |
1872 | state[2]); | |
4d4df193 HK |
1873 | if ((state[2] & FSTATE_LOGGED_IN) && |
1874 | (state[2] & FSTATE_WAITING_FOR_VERIFY)) { | |
7c3df132 SK |
1875 | ql_dbg(ql_dbg_taskm, vha, 0x8028, |
1876 | "Sending verify iocb.\n"); | |
4d4df193 HK |
1877 | |
1878 | cs84xx_time = jiffies; | |
e315cd28 | 1879 | rval = qla84xx_init_chip(vha); |
7c3df132 SK |
1880 | if (rval != QLA_SUCCESS) { |
1881 | ql_log(ql_log_warn, | |
cfb0919c | 1882 | vha, 0x8007, |
7c3df132 | 1883 | "Init chip failed.\n"); |
4d4df193 | 1884 | break; |
7c3df132 | 1885 | } |
4d4df193 HK |
1886 | |
1887 | /* Add time taken to initialize. */ | |
1888 | cs84xx_time = jiffies - cs84xx_time; | |
1889 | wtime += cs84xx_time; | |
1890 | mtime += cs84xx_time; | |
cfb0919c | 1891 | ql_dbg(ql_dbg_taskm, vha, 0x8008, |
7c3df132 SK |
1892 | "Increasing wait time by %ld. " |
1893 | "New time %ld.\n", cs84xx_time, | |
1894 | wtime); | |
4d4df193 HK |
1895 | } |
1896 | } else if (state[0] == FSTATE_READY) { | |
7c3df132 SK |
1897 | ql_dbg(ql_dbg_taskm, vha, 0x8037, |
1898 | "F/W Ready - OK.\n"); | |
1da177e4 | 1899 | |
e315cd28 | 1900 | qla2x00_get_retry_cnt(vha, &ha->retry_count, |
1da177e4 LT |
1901 | &ha->login_timeout, &ha->r_a_tov); |
1902 | ||
1903 | rval = QLA_SUCCESS; | |
1904 | break; | |
1905 | } | |
1906 | ||
1907 | rval = QLA_FUNCTION_FAILED; | |
1908 | ||
e315cd28 | 1909 | if (atomic_read(&vha->loop_down_timer) && |
4d4df193 | 1910 | state[0] != FSTATE_READY) { |
1da177e4 | 1911 | /* Loop down. Timeout on min_wait for states |
fa2a1ce5 AV |
1912 | * other than Wait for Login. |
1913 | */ | |
1da177e4 | 1914 | if (time_after_eq(jiffies, mtime)) { |
7c3df132 | 1915 | ql_log(ql_log_info, vha, 0x8038, |
1da177e4 LT |
1916 | "Cable is unplugged...\n"); |
1917 | ||
e315cd28 | 1918 | vha->device_flags |= DFLG_NO_CABLE; |
1da177e4 LT |
1919 | break; |
1920 | } | |
1921 | } | |
1922 | } else { | |
1923 | /* Mailbox cmd failed. Timeout on min_wait. */ | |
cdbb0a4f | 1924 | if (time_after_eq(jiffies, mtime) || |
7190575f | 1925 | ha->flags.isp82xx_fw_hung) |
1da177e4 LT |
1926 | break; |
1927 | } | |
1928 | ||
1929 | if (time_after_eq(jiffies, wtime)) | |
1930 | break; | |
1931 | ||
1932 | /* Delay for a while */ | |
1933 | msleep(500); | |
1da177e4 LT |
1934 | } while (1); |
1935 | ||
7c3df132 SK |
1936 | ql_dbg(ql_dbg_taskm, vha, 0x803a, |
1937 | "fw_state=%x (%x, %x, %x, %x) " "curr time=%lx.\n", state[0], | |
1938 | state[1], state[2], state[3], state[4], jiffies); | |
1da177e4 | 1939 | |
cfb0919c | 1940 | if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { |
7c3df132 SK |
1941 | ql_log(ql_log_warn, vha, 0x803b, |
1942 | "Firmware ready **** FAILED ****.\n"); | |
1da177e4 LT |
1943 | } |
1944 | ||
1945 | return (rval); | |
1946 | } | |
1947 | ||
1948 | /* | |
1949 | * qla2x00_configure_hba | |
1950 | * Setup adapter context. | |
1951 | * | |
1952 | * Input: | |
1953 | * ha = adapter state pointer. | |
1954 | * | |
1955 | * Returns: | |
1956 | * 0 = success | |
1957 | * | |
1958 | * Context: | |
1959 | * Kernel context. | |
1960 | */ | |
1961 | static int | |
e315cd28 | 1962 | qla2x00_configure_hba(scsi_qla_host_t *vha) |
1da177e4 LT |
1963 | { |
1964 | int rval; | |
1965 | uint16_t loop_id; | |
1966 | uint16_t topo; | |
2c3dfe3f | 1967 | uint16_t sw_cap; |
1da177e4 LT |
1968 | uint8_t al_pa; |
1969 | uint8_t area; | |
1970 | uint8_t domain; | |
1971 | char connect_type[22]; | |
e315cd28 | 1972 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1973 | |
1974 | /* Get host addresses. */ | |
e315cd28 | 1975 | rval = qla2x00_get_adapter_id(vha, |
2c3dfe3f | 1976 | &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); |
1da177e4 | 1977 | if (rval != QLA_SUCCESS) { |
e315cd28 | 1978 | if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || |
6246b8a1 | 1979 | IS_CNA_CAPABLE(ha) || |
33135aa2 | 1980 | (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { |
7c3df132 SK |
1981 | ql_dbg(ql_dbg_disc, vha, 0x2008, |
1982 | "Loop is in a transition state.\n"); | |
33135aa2 | 1983 | } else { |
7c3df132 SK |
1984 | ql_log(ql_log_warn, vha, 0x2009, |
1985 | "Unable to get host loop ID.\n"); | |
e315cd28 | 1986 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
33135aa2 | 1987 | } |
1da177e4 LT |
1988 | return (rval); |
1989 | } | |
1990 | ||
1991 | if (topo == 4) { | |
7c3df132 SK |
1992 | ql_log(ql_log_info, vha, 0x200a, |
1993 | "Cannot get topology - retrying.\n"); | |
1da177e4 LT |
1994 | return (QLA_FUNCTION_FAILED); |
1995 | } | |
1996 | ||
e315cd28 | 1997 | vha->loop_id = loop_id; |
1da177e4 LT |
1998 | |
1999 | /* initialize */ | |
2000 | ha->min_external_loopid = SNS_FIRST_LOOP_ID; | |
2001 | ha->operating_mode = LOOP; | |
2c3dfe3f | 2002 | ha->switch_cap = 0; |
1da177e4 LT |
2003 | |
2004 | switch (topo) { | |
2005 | case 0: | |
7c3df132 | 2006 | ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); |
1da177e4 LT |
2007 | ha->current_topology = ISP_CFG_NL; |
2008 | strcpy(connect_type, "(Loop)"); | |
2009 | break; | |
2010 | ||
2011 | case 1: | |
7c3df132 | 2012 | ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); |
2c3dfe3f | 2013 | ha->switch_cap = sw_cap; |
1da177e4 LT |
2014 | ha->current_topology = ISP_CFG_FL; |
2015 | strcpy(connect_type, "(FL_Port)"); | |
2016 | break; | |
2017 | ||
2018 | case 2: | |
7c3df132 | 2019 | ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); |
1da177e4 LT |
2020 | ha->operating_mode = P2P; |
2021 | ha->current_topology = ISP_CFG_N; | |
2022 | strcpy(connect_type, "(N_Port-to-N_Port)"); | |
2023 | break; | |
2024 | ||
2025 | case 3: | |
7c3df132 | 2026 | ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); |
2c3dfe3f | 2027 | ha->switch_cap = sw_cap; |
1da177e4 LT |
2028 | ha->operating_mode = P2P; |
2029 | ha->current_topology = ISP_CFG_F; | |
2030 | strcpy(connect_type, "(F_Port)"); | |
2031 | break; | |
2032 | ||
2033 | default: | |
7c3df132 SK |
2034 | ql_dbg(ql_dbg_disc, vha, 0x200f, |
2035 | "HBA in unknown topology %x, using NL.\n", topo); | |
1da177e4 LT |
2036 | ha->current_topology = ISP_CFG_NL; |
2037 | strcpy(connect_type, "(Loop)"); | |
2038 | break; | |
2039 | } | |
2040 | ||
2041 | /* Save Host port and loop ID. */ | |
2042 | /* byte order - Big Endian */ | |
e315cd28 AC |
2043 | vha->d_id.b.domain = domain; |
2044 | vha->d_id.b.area = area; | |
2045 | vha->d_id.b.al_pa = al_pa; | |
1da177e4 | 2046 | |
e315cd28 | 2047 | if (!vha->flags.init_done) |
7c3df132 SK |
2048 | ql_log(ql_log_info, vha, 0x2010, |
2049 | "Topology - %s, Host Loop address 0x%x.\n", | |
e315cd28 | 2050 | connect_type, vha->loop_id); |
1da177e4 LT |
2051 | |
2052 | if (rval) { | |
7c3df132 SK |
2053 | ql_log(ql_log_warn, vha, 0x2011, |
2054 | "%s FAILED\n", __func__); | |
1da177e4 | 2055 | } else { |
7c3df132 SK |
2056 | ql_dbg(ql_dbg_disc, vha, 0x2012, |
2057 | "%s success\n", __func__); | |
1da177e4 LT |
2058 | } |
2059 | ||
2060 | return(rval); | |
2061 | } | |
2062 | ||
a9083016 | 2063 | inline void |
e315cd28 AC |
2064 | qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, |
2065 | char *def) | |
9bb9fcf2 AV |
2066 | { |
2067 | char *st, *en; | |
2068 | uint16_t index; | |
e315cd28 | 2069 | struct qla_hw_data *ha = vha->hw; |
ab671149 | 2070 | int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && |
6246b8a1 | 2071 | !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); |
9bb9fcf2 AV |
2072 | |
2073 | if (memcmp(model, BINZERO, len) != 0) { | |
2074 | strncpy(ha->model_number, model, len); | |
2075 | st = en = ha->model_number; | |
2076 | en += len - 1; | |
2077 | while (en > st) { | |
2078 | if (*en != 0x20 && *en != 0x00) | |
2079 | break; | |
2080 | *en-- = '\0'; | |
2081 | } | |
2082 | ||
2083 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
2084 | if (use_tbl && |
2085 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 | 2086 | index < QLA_MODEL_NAMES) |
1ee27146 JC |
2087 | strncpy(ha->model_desc, |
2088 | qla2x00_model_name[index * 2 + 1], | |
2089 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
2090 | } else { |
2091 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
2092 | if (use_tbl && |
2093 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 AV |
2094 | index < QLA_MODEL_NAMES) { |
2095 | strcpy(ha->model_number, | |
2096 | qla2x00_model_name[index * 2]); | |
1ee27146 JC |
2097 | strncpy(ha->model_desc, |
2098 | qla2x00_model_name[index * 2 + 1], | |
2099 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
2100 | } else { |
2101 | strcpy(ha->model_number, def); | |
2102 | } | |
2103 | } | |
1ee27146 | 2104 | if (IS_FWI2_CAPABLE(ha)) |
e315cd28 | 2105 | qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, |
1ee27146 | 2106 | sizeof(ha->model_desc)); |
9bb9fcf2 AV |
2107 | } |
2108 | ||
4e08df3f DM |
2109 | /* On sparc systems, obtain port and node WWN from firmware |
2110 | * properties. | |
2111 | */ | |
e315cd28 | 2112 | static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) |
4e08df3f DM |
2113 | { |
2114 | #ifdef CONFIG_SPARC | |
e315cd28 | 2115 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 2116 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
2117 | struct device_node *dp = pci_device_to_OF_node(pdev); |
2118 | const u8 *val; | |
4e08df3f DM |
2119 | int len; |
2120 | ||
2121 | val = of_get_property(dp, "port-wwn", &len); | |
2122 | if (val && len >= WWN_SIZE) | |
2123 | memcpy(nv->port_name, val, WWN_SIZE); | |
2124 | ||
2125 | val = of_get_property(dp, "node-wwn", &len); | |
2126 | if (val && len >= WWN_SIZE) | |
2127 | memcpy(nv->node_name, val, WWN_SIZE); | |
2128 | #endif | |
2129 | } | |
2130 | ||
1da177e4 LT |
2131 | /* |
2132 | * NVRAM configuration for ISP 2xxx | |
2133 | * | |
2134 | * Input: | |
2135 | * ha = adapter block pointer. | |
2136 | * | |
2137 | * Output: | |
2138 | * initialization control block in response_ring | |
2139 | * host adapters parameters in host adapter block | |
2140 | * | |
2141 | * Returns: | |
2142 | * 0 = success. | |
2143 | */ | |
abbd8870 | 2144 | int |
e315cd28 | 2145 | qla2x00_nvram_config(scsi_qla_host_t *vha) |
1da177e4 | 2146 | { |
4e08df3f | 2147 | int rval; |
0107109e AV |
2148 | uint8_t chksum = 0; |
2149 | uint16_t cnt; | |
2150 | uint8_t *dptr1, *dptr2; | |
e315cd28 | 2151 | struct qla_hw_data *ha = vha->hw; |
0107109e | 2152 | init_cb_t *icb = ha->init_cb; |
281afe19 SJ |
2153 | nvram_t *nv = ha->nvram; |
2154 | uint8_t *ptr = ha->nvram; | |
3d71644c | 2155 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 2156 | |
4e08df3f DM |
2157 | rval = QLA_SUCCESS; |
2158 | ||
1da177e4 | 2159 | /* Determine NVRAM starting address. */ |
0107109e | 2160 | ha->nvram_size = sizeof(nvram_t); |
1da177e4 LT |
2161 | ha->nvram_base = 0; |
2162 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) | |
2163 | if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) | |
2164 | ha->nvram_base = 0x80; | |
2165 | ||
2166 | /* Get NVRAM data and calculate checksum. */ | |
e315cd28 | 2167 | ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); |
0107109e AV |
2168 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) |
2169 | chksum += *ptr++; | |
1da177e4 | 2170 | |
7c3df132 SK |
2171 | ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, |
2172 | "Contents of NVRAM.\n"); | |
2173 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, | |
2174 | (uint8_t *)nv, ha->nvram_size); | |
1da177e4 LT |
2175 | |
2176 | /* Bad NVRAM data, set defaults parameters. */ | |
2177 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || | |
2178 | nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { | |
2179 | /* Reset NVRAM data. */ | |
7c3df132 SK |
2180 | ql_log(ql_log_warn, vha, 0x0064, |
2181 | "Inconisistent NVRAM " | |
2182 | "detected: checksum=0x%x id=%c version=0x%x.\n", | |
2183 | chksum, nv->id[0], nv->nvram_version); | |
2184 | ql_log(ql_log_warn, vha, 0x0065, | |
2185 | "Falling back to " | |
2186 | "functioning (yet invalid -- WWPN) defaults.\n"); | |
4e08df3f DM |
2187 | |
2188 | /* | |
2189 | * Set default initialization control block. | |
2190 | */ | |
2191 | memset(nv, 0, ha->nvram_size); | |
2192 | nv->parameter_block_version = ICB_VERSION; | |
2193 | ||
2194 | if (IS_QLA23XX(ha)) { | |
2195 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
2196 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
2197 | nv->add_firmware_options[0] = BIT_5; | |
2198 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
2199 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
2200 | nv->special_options[1] = BIT_7; | |
2201 | } else if (IS_QLA2200(ha)) { | |
2202 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
2203 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
2204 | nv->add_firmware_options[0] = BIT_5; | |
2205 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
2206 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
2207 | } else if (IS_QLA2100(ha)) { | |
2208 | nv->firmware_options[0] = BIT_3 | BIT_1; | |
2209 | nv->firmware_options[1] = BIT_5; | |
2210 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
2211 | } | |
2212 | ||
2213 | nv->max_iocb_allocation = __constant_cpu_to_le16(256); | |
2214 | nv->execution_throttle = __constant_cpu_to_le16(16); | |
2215 | nv->retry_count = 8; | |
2216 | nv->retry_delay = 1; | |
2217 | ||
2218 | nv->port_name[0] = 33; | |
2219 | nv->port_name[3] = 224; | |
2220 | nv->port_name[4] = 139; | |
2221 | ||
e315cd28 | 2222 | qla2xxx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
2223 | |
2224 | nv->login_timeout = 4; | |
2225 | ||
2226 | /* | |
2227 | * Set default host adapter parameters | |
2228 | */ | |
2229 | nv->host_p[1] = BIT_2; | |
2230 | nv->reset_delay = 5; | |
2231 | nv->port_down_retry_count = 8; | |
2232 | nv->max_luns_per_target = __constant_cpu_to_le16(8); | |
2233 | nv->link_down_timeout = 60; | |
2234 | ||
2235 | rval = 1; | |
1da177e4 LT |
2236 | } |
2237 | ||
2238 | #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) | |
2239 | /* | |
2240 | * The SN2 does not provide BIOS emulation which means you can't change | |
2241 | * potentially bogus BIOS settings. Force the use of default settings | |
2242 | * for link rate and frame size. Hope that the rest of the settings | |
2243 | * are valid. | |
2244 | */ | |
2245 | if (ia64_platform_is("sn2")) { | |
2246 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
2247 | if (IS_QLA23XX(ha)) | |
2248 | nv->special_options[1] = BIT_7; | |
2249 | } | |
2250 | #endif | |
2251 | ||
2252 | /* Reset Initialization control block */ | |
0107109e | 2253 | memset(icb, 0, ha->init_cb_size); |
1da177e4 LT |
2254 | |
2255 | /* | |
2256 | * Setup driver NVRAM options. | |
2257 | */ | |
2258 | nv->firmware_options[0] |= (BIT_6 | BIT_1); | |
2259 | nv->firmware_options[0] &= ~(BIT_5 | BIT_4); | |
2260 | nv->firmware_options[1] |= (BIT_5 | BIT_0); | |
2261 | nv->firmware_options[1] &= ~BIT_4; | |
2262 | ||
2263 | if (IS_QLA23XX(ha)) { | |
2264 | nv->firmware_options[0] |= BIT_2; | |
2265 | nv->firmware_options[0] &= ~BIT_3; | |
5ff1d584 | 2266 | nv->firmware_options[0] &= ~BIT_6; |
0107109e | 2267 | nv->add_firmware_options[1] |= BIT_5 | BIT_4; |
1da177e4 LT |
2268 | |
2269 | if (IS_QLA2300(ha)) { | |
2270 | if (ha->fb_rev == FPM_2310) { | |
2271 | strcpy(ha->model_number, "QLA2310"); | |
2272 | } else { | |
2273 | strcpy(ha->model_number, "QLA2300"); | |
2274 | } | |
2275 | } else { | |
e315cd28 | 2276 | qla2x00_set_model_info(vha, nv->model_number, |
9bb9fcf2 | 2277 | sizeof(nv->model_number), "QLA23xx"); |
1da177e4 LT |
2278 | } |
2279 | } else if (IS_QLA2200(ha)) { | |
2280 | nv->firmware_options[0] |= BIT_2; | |
2281 | /* | |
2282 | * 'Point-to-point preferred, else loop' is not a safe | |
2283 | * connection mode setting. | |
2284 | */ | |
2285 | if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == | |
2286 | (BIT_5 | BIT_4)) { | |
2287 | /* Force 'loop preferred, else point-to-point'. */ | |
2288 | nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); | |
2289 | nv->add_firmware_options[0] |= BIT_5; | |
2290 | } | |
2291 | strcpy(ha->model_number, "QLA22xx"); | |
2292 | } else /*if (IS_QLA2100(ha))*/ { | |
2293 | strcpy(ha->model_number, "QLA2100"); | |
2294 | } | |
2295 | ||
2296 | /* | |
2297 | * Copy over NVRAM RISC parameter block to initialization control block. | |
2298 | */ | |
2299 | dptr1 = (uint8_t *)icb; | |
2300 | dptr2 = (uint8_t *)&nv->parameter_block_version; | |
2301 | cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; | |
2302 | while (cnt--) | |
2303 | *dptr1++ = *dptr2++; | |
2304 | ||
2305 | /* Copy 2nd half. */ | |
2306 | dptr1 = (uint8_t *)icb->add_firmware_options; | |
2307 | cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; | |
2308 | while (cnt--) | |
2309 | *dptr1++ = *dptr2++; | |
2310 | ||
5341e868 AV |
2311 | /* Use alternate WWN? */ |
2312 | if (nv->host_p[1] & BIT_7) { | |
2313 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
2314 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
2315 | } | |
2316 | ||
1da177e4 LT |
2317 | /* Prepare nodename */ |
2318 | if ((icb->firmware_options[1] & BIT_6) == 0) { | |
2319 | /* | |
2320 | * Firmware will apply the following mask if the nodename was | |
2321 | * not provided. | |
2322 | */ | |
2323 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
2324 | icb->node_name[0] &= 0xF0; | |
2325 | } | |
2326 | ||
2327 | /* | |
2328 | * Set host adapter parameters. | |
2329 | */ | |
3ce8866c SK |
2330 | |
2331 | /* | |
2332 | * BIT_7 in the host-parameters section allows for modification to | |
2333 | * internal driver logging. | |
2334 | */ | |
0181944f | 2335 | if (nv->host_p[0] & BIT_7) |
cfb0919c | 2336 | ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; |
1da177e4 LT |
2337 | ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); |
2338 | /* Always load RISC code on non ISP2[12]00 chips. */ | |
2339 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) | |
2340 | ha->flags.disable_risc_code_load = 0; | |
2341 | ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); | |
2342 | ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); | |
2343 | ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); | |
06c22bd1 | 2344 | ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; |
d4c760c2 | 2345 | ha->flags.disable_serdes = 0; |
1da177e4 LT |
2346 | |
2347 | ha->operating_mode = | |
2348 | (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
2349 | ||
2350 | memcpy(ha->fw_seriallink_options, nv->seriallink_options, | |
2351 | sizeof(ha->fw_seriallink_options)); | |
2352 | ||
2353 | /* save HBA serial number */ | |
2354 | ha->serial0 = icb->port_name[5]; | |
2355 | ha->serial1 = icb->port_name[6]; | |
2356 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
2357 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
2358 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
1da177e4 LT |
2359 | |
2360 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
2361 | ||
2362 | ha->retry_count = nv->retry_count; | |
2363 | ||
2364 | /* Set minimum login_timeout to 4 seconds. */ | |
5b91490e | 2365 | if (nv->login_timeout != ql2xlogintimeout) |
1da177e4 LT |
2366 | nv->login_timeout = ql2xlogintimeout; |
2367 | if (nv->login_timeout < 4) | |
2368 | nv->login_timeout = 4; | |
2369 | ha->login_timeout = nv->login_timeout; | |
2370 | icb->login_timeout = nv->login_timeout; | |
2371 | ||
00a537b8 AV |
2372 | /* Set minimum RATOV to 100 tenths of a second. */ |
2373 | ha->r_a_tov = 100; | |
1da177e4 | 2374 | |
1da177e4 LT |
2375 | ha->loop_reset_delay = nv->reset_delay; |
2376 | ||
1da177e4 LT |
2377 | /* Link Down Timeout = 0: |
2378 | * | |
2379 | * When Port Down timer expires we will start returning | |
2380 | * I/O's to OS with "DID_NO_CONNECT". | |
2381 | * | |
2382 | * Link Down Timeout != 0: | |
2383 | * | |
2384 | * The driver waits for the link to come up after link down | |
2385 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
fa2a1ce5 | 2386 | */ |
1da177e4 LT |
2387 | if (nv->link_down_timeout == 0) { |
2388 | ha->loop_down_abort_time = | |
354d6b21 | 2389 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); |
1da177e4 LT |
2390 | } else { |
2391 | ha->link_down_timeout = nv->link_down_timeout; | |
2392 | ha->loop_down_abort_time = | |
2393 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
fa2a1ce5 | 2394 | } |
1da177e4 | 2395 | |
1da177e4 LT |
2396 | /* |
2397 | * Need enough time to try and get the port back. | |
2398 | */ | |
2399 | ha->port_down_retry_count = nv->port_down_retry_count; | |
2400 | if (qlport_down_retry) | |
2401 | ha->port_down_retry_count = qlport_down_retry; | |
2402 | /* Set login_retry_count */ | |
2403 | ha->login_retry_count = nv->retry_count; | |
2404 | if (ha->port_down_retry_count == nv->port_down_retry_count && | |
2405 | ha->port_down_retry_count > 3) | |
2406 | ha->login_retry_count = ha->port_down_retry_count; | |
2407 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
2408 | ha->login_retry_count = ha->port_down_retry_count; | |
2409 | if (ql2xloginretrycount) | |
2410 | ha->login_retry_count = ql2xloginretrycount; | |
2411 | ||
1da177e4 LT |
2412 | icb->lun_enables = __constant_cpu_to_le16(0); |
2413 | icb->command_resource_count = 0; | |
2414 | icb->immediate_notify_resource_count = 0; | |
2415 | icb->timeout = __constant_cpu_to_le16(0); | |
2416 | ||
2417 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { | |
2418 | /* Enable RIO */ | |
2419 | icb->firmware_options[0] &= ~BIT_3; | |
2420 | icb->add_firmware_options[0] &= | |
2421 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
2422 | icb->add_firmware_options[0] |= BIT_2; | |
2423 | icb->response_accumulation_timer = 3; | |
2424 | icb->interrupt_delay_timer = 5; | |
2425 | ||
e315cd28 | 2426 | vha->flags.process_response_queue = 1; |
1da177e4 | 2427 | } else { |
4fdfefe5 | 2428 | /* Enable ZIO. */ |
e315cd28 | 2429 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
2430 | ha->zio_mode = icb->add_firmware_options[0] & |
2431 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
2432 | ha->zio_timer = icb->interrupt_delay_timer ? | |
2433 | icb->interrupt_delay_timer: 2; | |
2434 | } | |
1da177e4 LT |
2435 | icb->add_firmware_options[0] &= |
2436 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
e315cd28 | 2437 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 2438 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d AV |
2439 | ha->zio_mode = QLA_ZIO_MODE_6; |
2440 | ||
7c3df132 | 2441 | ql_log(ql_log_info, vha, 0x0068, |
4fdfefe5 AV |
2442 | "ZIO mode %d enabled; timer delay (%d us).\n", |
2443 | ha->zio_mode, ha->zio_timer * 100); | |
1da177e4 | 2444 | |
4fdfefe5 AV |
2445 | icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; |
2446 | icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; | |
e315cd28 | 2447 | vha->flags.process_response_queue = 1; |
1da177e4 LT |
2448 | } |
2449 | } | |
2450 | ||
4e08df3f | 2451 | if (rval) { |
7c3df132 SK |
2452 | ql_log(ql_log_warn, vha, 0x0069, |
2453 | "NVRAM configuration failed.\n"); | |
4e08df3f DM |
2454 | } |
2455 | return (rval); | |
1da177e4 LT |
2456 | } |
2457 | ||
19a7b4ae JSEC |
2458 | static void |
2459 | qla2x00_rport_del(void *data) | |
2460 | { | |
2461 | fc_port_t *fcport = data; | |
d97994dc | 2462 | struct fc_rport *rport; |
044d78e1 | 2463 | unsigned long flags; |
d97994dc | 2464 | |
044d78e1 | 2465 | spin_lock_irqsave(fcport->vha->host->host_lock, flags); |
ac280b67 | 2466 | rport = fcport->drport ? fcport->drport: fcport->rport; |
d97994dc | 2467 | fcport->drport = NULL; |
044d78e1 | 2468 | spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); |
d97994dc AV |
2469 | if (rport) |
2470 | fc_remote_port_delete(rport); | |
19a7b4ae JSEC |
2471 | } |
2472 | ||
1da177e4 LT |
2473 | /** |
2474 | * qla2x00_alloc_fcport() - Allocate a generic fcport. | |
2475 | * @ha: HA context | |
2476 | * @flags: allocation flags | |
2477 | * | |
2478 | * Returns a pointer to the allocated fcport, or NULL, if none available. | |
2479 | */ | |
9a069e19 | 2480 | fc_port_t * |
e315cd28 | 2481 | qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) |
1da177e4 LT |
2482 | { |
2483 | fc_port_t *fcport; | |
2484 | ||
bbfbbbc1 MK |
2485 | fcport = kzalloc(sizeof(fc_port_t), flags); |
2486 | if (!fcport) | |
2487 | return NULL; | |
1da177e4 LT |
2488 | |
2489 | /* Setup fcport template structure. */ | |
e315cd28 AC |
2490 | fcport->vha = vha; |
2491 | fcport->vp_idx = vha->vp_idx; | |
1da177e4 LT |
2492 | fcport->port_type = FCT_UNKNOWN; |
2493 | fcport->loop_id = FC_NO_LOOP_ID; | |
ec426e10 | 2494 | qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); |
ad3e0eda | 2495 | fcport->supported_classes = FC_COS_UNSPECIFIED; |
1da177e4 | 2496 | |
bbfbbbc1 | 2497 | return fcport; |
1da177e4 LT |
2498 | } |
2499 | ||
2500 | /* | |
2501 | * qla2x00_configure_loop | |
2502 | * Updates Fibre Channel Device Database with what is actually on loop. | |
2503 | * | |
2504 | * Input: | |
2505 | * ha = adapter block pointer. | |
2506 | * | |
2507 | * Returns: | |
2508 | * 0 = success. | |
2509 | * 1 = error. | |
2510 | * 2 = database was full and device was not configured. | |
2511 | */ | |
2512 | static int | |
e315cd28 | 2513 | qla2x00_configure_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
2514 | { |
2515 | int rval; | |
2516 | unsigned long flags, save_flags; | |
e315cd28 | 2517 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2518 | rval = QLA_SUCCESS; |
2519 | ||
2520 | /* Get Initiator ID */ | |
e315cd28 AC |
2521 | if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { |
2522 | rval = qla2x00_configure_hba(vha); | |
1da177e4 | 2523 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
2524 | ql_dbg(ql_dbg_disc, vha, 0x2013, |
2525 | "Unable to configure HBA.\n"); | |
1da177e4 LT |
2526 | return (rval); |
2527 | } | |
2528 | } | |
2529 | ||
e315cd28 | 2530 | save_flags = flags = vha->dpc_flags; |
7c3df132 SK |
2531 | ql_dbg(ql_dbg_disc, vha, 0x2014, |
2532 | "Configure loop -- dpc flags = 0x%lx.\n", flags); | |
1da177e4 LT |
2533 | |
2534 | /* | |
2535 | * If we have both an RSCN and PORT UPDATE pending then handle them | |
2536 | * both at the same time. | |
2537 | */ | |
e315cd28 AC |
2538 | clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
2539 | clear_bit(RSCN_UPDATE, &vha->dpc_flags); | |
1da177e4 | 2540 | |
3064ff39 MH |
2541 | qla2x00_get_data_rate(vha); |
2542 | ||
1da177e4 LT |
2543 | /* Determine what we need to do */ |
2544 | if (ha->current_topology == ISP_CFG_FL && | |
2545 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2546 | ||
1da177e4 LT |
2547 | set_bit(RSCN_UPDATE, &flags); |
2548 | ||
2549 | } else if (ha->current_topology == ISP_CFG_F && | |
2550 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2551 | ||
1da177e4 LT |
2552 | set_bit(RSCN_UPDATE, &flags); |
2553 | clear_bit(LOCAL_LOOP_UPDATE, &flags); | |
21333b48 AV |
2554 | |
2555 | } else if (ha->current_topology == ISP_CFG_N) { | |
2556 | clear_bit(RSCN_UPDATE, &flags); | |
1da177e4 | 2557 | |
e315cd28 | 2558 | } else if (!vha->flags.online || |
1da177e4 LT |
2559 | (test_bit(ABORT_ISP_ACTIVE, &flags))) { |
2560 | ||
1da177e4 LT |
2561 | set_bit(RSCN_UPDATE, &flags); |
2562 | set_bit(LOCAL_LOOP_UPDATE, &flags); | |
2563 | } | |
2564 | ||
2565 | if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { | |
7c3df132 SK |
2566 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { |
2567 | ql_dbg(ql_dbg_disc, vha, 0x2015, | |
2568 | "Loop resync needed, failing.\n"); | |
1da177e4 | 2569 | rval = QLA_FUNCTION_FAILED; |
7c3df132 | 2570 | } |
e315cd28 AC |
2571 | else |
2572 | rval = qla2x00_configure_local_loop(vha); | |
1da177e4 LT |
2573 | } |
2574 | ||
2575 | if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { | |
7c3df132 SK |
2576 | if (LOOP_TRANSITION(vha)) { |
2577 | ql_dbg(ql_dbg_disc, vha, 0x201e, | |
2578 | "Needs RSCN update and loop transition.\n"); | |
1da177e4 | 2579 | rval = QLA_FUNCTION_FAILED; |
7c3df132 | 2580 | } |
e315cd28 AC |
2581 | else |
2582 | rval = qla2x00_configure_fabric(vha); | |
1da177e4 LT |
2583 | } |
2584 | ||
2585 | if (rval == QLA_SUCCESS) { | |
e315cd28 AC |
2586 | if (atomic_read(&vha->loop_down_timer) || |
2587 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { | |
1da177e4 LT |
2588 | rval = QLA_FUNCTION_FAILED; |
2589 | } else { | |
e315cd28 | 2590 | atomic_set(&vha->loop_state, LOOP_READY); |
7c3df132 SK |
2591 | ql_dbg(ql_dbg_disc, vha, 0x2069, |
2592 | "LOOP READY.\n"); | |
1da177e4 LT |
2593 | } |
2594 | } | |
2595 | ||
2596 | if (rval) { | |
7c3df132 SK |
2597 | ql_dbg(ql_dbg_disc, vha, 0x206a, |
2598 | "%s *** FAILED ***.\n", __func__); | |
1da177e4 | 2599 | } else { |
7c3df132 SK |
2600 | ql_dbg(ql_dbg_disc, vha, 0x206b, |
2601 | "%s: exiting normally.\n", __func__); | |
1da177e4 LT |
2602 | } |
2603 | ||
cc3ef7bc | 2604 | /* Restore state if a resync event occurred during processing */ |
e315cd28 | 2605 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { |
1da177e4 | 2606 | if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) |
e315cd28 | 2607 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
f4658b6c | 2608 | if (test_bit(RSCN_UPDATE, &save_flags)) { |
e315cd28 | 2609 | set_bit(RSCN_UPDATE, &vha->dpc_flags); |
f4658b6c | 2610 | } |
1da177e4 LT |
2611 | } |
2612 | ||
2613 | return (rval); | |
2614 | } | |
2615 | ||
2616 | ||
2617 | ||
2618 | /* | |
2619 | * qla2x00_configure_local_loop | |
2620 | * Updates Fibre Channel Device Database with local loop devices. | |
2621 | * | |
2622 | * Input: | |
2623 | * ha = adapter block pointer. | |
2624 | * | |
2625 | * Returns: | |
2626 | * 0 = success. | |
2627 | */ | |
2628 | static int | |
e315cd28 | 2629 | qla2x00_configure_local_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
2630 | { |
2631 | int rval, rval2; | |
2632 | int found_devs; | |
2633 | int found; | |
2634 | fc_port_t *fcport, *new_fcport; | |
2635 | ||
2636 | uint16_t index; | |
2637 | uint16_t entries; | |
2638 | char *id_iter; | |
2639 | uint16_t loop_id; | |
2640 | uint8_t domain, area, al_pa; | |
e315cd28 | 2641 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2642 | |
2643 | found_devs = 0; | |
2644 | new_fcport = NULL; | |
2645 | entries = MAX_FIBRE_DEVICES; | |
2646 | ||
7c3df132 SK |
2647 | ql_dbg(ql_dbg_disc, vha, 0x2016, |
2648 | "Getting FCAL position map.\n"); | |
2649 | if (ql2xextended_error_logging & ql_dbg_disc) | |
2650 | qla2x00_get_fcal_position_map(vha, NULL); | |
1da177e4 LT |
2651 | |
2652 | /* Get list of logged in devices. */ | |
2653 | memset(ha->gid_list, 0, GID_LIST_SIZE); | |
e315cd28 | 2654 | rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, |
1da177e4 LT |
2655 | &entries); |
2656 | if (rval != QLA_SUCCESS) | |
2657 | goto cleanup_allocation; | |
2658 | ||
7c3df132 SK |
2659 | ql_dbg(ql_dbg_disc, vha, 0x2017, |
2660 | "Entries in ID list (%d).\n", entries); | |
2661 | ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, | |
2662 | (uint8_t *)ha->gid_list, | |
2663 | entries * sizeof(struct gid_list_info)); | |
1da177e4 LT |
2664 | |
2665 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 2666 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 2667 | if (new_fcport == NULL) { |
7c3df132 SK |
2668 | ql_log(ql_log_warn, vha, 0x2018, |
2669 | "Memory allocation failed for fcport.\n"); | |
1da177e4 LT |
2670 | rval = QLA_MEMORY_ALLOC_FAILED; |
2671 | goto cleanup_allocation; | |
2672 | } | |
2673 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2674 | ||
2675 | /* | |
2676 | * Mark local devices that were present with FCF_DEVICE_LOST for now. | |
2677 | */ | |
e315cd28 | 2678 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2679 | if (atomic_read(&fcport->state) == FCS_ONLINE && |
2680 | fcport->port_type != FCT_BROADCAST && | |
2681 | (fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
2682 | ||
7c3df132 SK |
2683 | ql_dbg(ql_dbg_disc, vha, 0x2019, |
2684 | "Marking port lost loop_id=0x%04x.\n", | |
2685 | fcport->loop_id); | |
1da177e4 | 2686 | |
ec426e10 | 2687 | qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST); |
1da177e4 LT |
2688 | } |
2689 | } | |
2690 | ||
2691 | /* Add devices to port list. */ | |
2692 | id_iter = (char *)ha->gid_list; | |
2693 | for (index = 0; index < entries; index++) { | |
2694 | domain = ((struct gid_list_info *)id_iter)->domain; | |
2695 | area = ((struct gid_list_info *)id_iter)->area; | |
2696 | al_pa = ((struct gid_list_info *)id_iter)->al_pa; | |
abbd8870 | 2697 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) |
1da177e4 LT |
2698 | loop_id = (uint16_t) |
2699 | ((struct gid_list_info *)id_iter)->loop_id_2100; | |
abbd8870 | 2700 | else |
1da177e4 LT |
2701 | loop_id = le16_to_cpu( |
2702 | ((struct gid_list_info *)id_iter)->loop_id); | |
abbd8870 | 2703 | id_iter += ha->gid_list_info_size; |
1da177e4 LT |
2704 | |
2705 | /* Bypass reserved domain fields. */ | |
2706 | if ((domain & 0xf0) == 0xf0) | |
2707 | continue; | |
2708 | ||
2709 | /* Bypass if not same domain and area of adapter. */ | |
f7d289f6 | 2710 | if (area && domain && |
e315cd28 | 2711 | (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) |
1da177e4 LT |
2712 | continue; |
2713 | ||
2714 | /* Bypass invalid local loop ID. */ | |
2715 | if (loop_id > LAST_LOCAL_LOOP_ID) | |
2716 | continue; | |
2717 | ||
2718 | /* Fill in member data. */ | |
2719 | new_fcport->d_id.b.domain = domain; | |
2720 | new_fcport->d_id.b.area = area; | |
2721 | new_fcport->d_id.b.al_pa = al_pa; | |
2722 | new_fcport->loop_id = loop_id; | |
e315cd28 AC |
2723 | new_fcport->vp_idx = vha->vp_idx; |
2724 | rval2 = qla2x00_get_port_database(vha, new_fcport, 0); | |
1da177e4 | 2725 | if (rval2 != QLA_SUCCESS) { |
7c3df132 SK |
2726 | ql_dbg(ql_dbg_disc, vha, 0x201a, |
2727 | "Failed to retrieve fcport information " | |
2728 | "-- get_port_database=%x, loop_id=0x%04x.\n", | |
2729 | rval2, new_fcport->loop_id); | |
2730 | ql_dbg(ql_dbg_disc, vha, 0x201b, | |
2731 | "Scheduling resync.\n"); | |
e315cd28 | 2732 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
2733 | continue; |
2734 | } | |
2735 | ||
2736 | /* Check for matching device in port list. */ | |
2737 | found = 0; | |
2738 | fcport = NULL; | |
e315cd28 | 2739 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2740 | if (memcmp(new_fcport->port_name, fcport->port_name, |
2741 | WWN_SIZE)) | |
2742 | continue; | |
2743 | ||
ddb9b126 | 2744 | fcport->flags &= ~FCF_FABRIC_DEVICE; |
1da177e4 LT |
2745 | fcport->loop_id = new_fcport->loop_id; |
2746 | fcport->port_type = new_fcport->port_type; | |
2747 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
2748 | memcpy(fcport->node_name, new_fcport->node_name, | |
2749 | WWN_SIZE); | |
2750 | ||
2751 | found++; | |
2752 | break; | |
2753 | } | |
2754 | ||
2755 | if (!found) { | |
2756 | /* New device, add to fcports list. */ | |
e315cd28 AC |
2757 | if (vha->vp_idx) { |
2758 | new_fcport->vha = vha; | |
2759 | new_fcport->vp_idx = vha->vp_idx; | |
2c3dfe3f | 2760 | } |
e315cd28 | 2761 | list_add_tail(&new_fcport->list, &vha->vp_fcports); |
1da177e4 LT |
2762 | |
2763 | /* Allocate a new replacement fcport. */ | |
2764 | fcport = new_fcport; | |
e315cd28 | 2765 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 2766 | if (new_fcport == NULL) { |
7c3df132 SK |
2767 | ql_log(ql_log_warn, vha, 0x201c, |
2768 | "Failed to allocate memory for fcport.\n"); | |
1da177e4 LT |
2769 | rval = QLA_MEMORY_ALLOC_FAILED; |
2770 | goto cleanup_allocation; | |
2771 | } | |
2772 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2773 | } | |
2774 | ||
d8b45213 | 2775 | /* Base iIDMA settings on HBA port speed. */ |
a3cbdfad | 2776 | fcport->fp_speed = ha->link_data_rate; |
d8b45213 | 2777 | |
e315cd28 | 2778 | qla2x00_update_fcport(vha, fcport); |
1da177e4 LT |
2779 | |
2780 | found_devs++; | |
2781 | } | |
2782 | ||
2783 | cleanup_allocation: | |
c9475cb0 | 2784 | kfree(new_fcport); |
1da177e4 LT |
2785 | |
2786 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
2787 | ql_dbg(ql_dbg_disc, vha, 0x201d, |
2788 | "Configure local loop error exit: rval=%x.\n", rval); | |
1da177e4 LT |
2789 | } |
2790 | ||
1da177e4 LT |
2791 | return (rval); |
2792 | } | |
2793 | ||
d8b45213 | 2794 | static void |
e315cd28 | 2795 | qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
d8b45213 AV |
2796 | { |
2797 | #define LS_UNKNOWN 2 | |
9f8fddee AV |
2798 | static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" }; |
2799 | char *link_speed; | |
d8b45213 | 2800 | int rval; |
1bb39548 | 2801 | uint16_t mb[4]; |
e315cd28 | 2802 | struct qla_hw_data *ha = vha->hw; |
d8b45213 | 2803 | |
c76f2c01 | 2804 | if (!IS_IIDMA_CAPABLE(ha)) |
d8b45213 AV |
2805 | return; |
2806 | ||
c9afb9a2 GM |
2807 | if (atomic_read(&fcport->state) != FCS_ONLINE) |
2808 | return; | |
2809 | ||
39bd9622 AV |
2810 | if (fcport->fp_speed == PORT_SPEED_UNKNOWN || |
2811 | fcport->fp_speed > ha->link_data_rate) | |
d8b45213 AV |
2812 | return; |
2813 | ||
e315cd28 | 2814 | rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, |
a3cbdfad | 2815 | mb); |
d8b45213 | 2816 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
2817 | ql_dbg(ql_dbg_disc, vha, 0x2004, |
2818 | "Unable to adjust iIDMA " | |
2819 | "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x " | |
2820 | "%04x.\n", fcport->port_name[0], fcport->port_name[1], | |
d8b45213 AV |
2821 | fcport->port_name[2], fcport->port_name[3], |
2822 | fcport->port_name[4], fcport->port_name[5], | |
2823 | fcport->port_name[6], fcport->port_name[7], rval, | |
7c3df132 | 2824 | fcport->fp_speed, mb[0], mb[1]); |
d8b45213 | 2825 | } else { |
9f8fddee AV |
2826 | link_speed = link_speeds[LS_UNKNOWN]; |
2827 | if (fcport->fp_speed < 5) | |
2828 | link_speed = link_speeds[fcport->fp_speed]; | |
2829 | else if (fcport->fp_speed == 0x13) | |
2830 | link_speed = link_speeds[5]; | |
7c3df132 SK |
2831 | ql_dbg(ql_dbg_disc, vha, 0x2005, |
2832 | "iIDMA adjusted to %s GB/s " | |
2833 | "on %02x%02x%02x%02x%02x%02x%02x%02x.\n", link_speed, | |
2834 | fcport->port_name[0], fcport->port_name[1], | |
2835 | fcport->port_name[2], fcport->port_name[3], | |
2836 | fcport->port_name[4], fcport->port_name[5], | |
2837 | fcport->port_name[6], fcport->port_name[7]); | |
d8b45213 AV |
2838 | } |
2839 | } | |
2840 | ||
23be331d | 2841 | static void |
e315cd28 | 2842 | qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) |
8482e118 AV |
2843 | { |
2844 | struct fc_rport_identifiers rport_ids; | |
bdf79621 | 2845 | struct fc_rport *rport; |
044d78e1 | 2846 | unsigned long flags; |
8482e118 | 2847 | |
ac280b67 | 2848 | qla2x00_rport_del(fcport); |
8482e118 | 2849 | |
f8b02a85 AV |
2850 | rport_ids.node_name = wwn_to_u64(fcport->node_name); |
2851 | rport_ids.port_name = wwn_to_u64(fcport->port_name); | |
8482e118 AV |
2852 | rport_ids.port_id = fcport->d_id.b.domain << 16 | |
2853 | fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; | |
77d74143 | 2854 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
e315cd28 | 2855 | fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); |
77d74143 | 2856 | if (!rport) { |
7c3df132 SK |
2857 | ql_log(ql_log_warn, vha, 0x2006, |
2858 | "Unable to allocate fc remote port.\n"); | |
77d74143 AV |
2859 | return; |
2860 | } | |
044d78e1 | 2861 | spin_lock_irqsave(fcport->vha->host->host_lock, flags); |
19a7b4ae | 2862 | *((fc_port_t **)rport->dd_data) = fcport; |
044d78e1 | 2863 | spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); |
d97994dc | 2864 | |
ad3e0eda | 2865 | rport->supported_classes = fcport->supported_classes; |
77d74143 | 2866 | |
8482e118 AV |
2867 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
2868 | if (fcport->port_type == FCT_INITIATOR) | |
2869 | rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; | |
2870 | if (fcport->port_type == FCT_TARGET) | |
2871 | rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; | |
77d74143 | 2872 | fc_remote_port_rolechg(rport, rport_ids.roles); |
1da177e4 LT |
2873 | } |
2874 | ||
23be331d AB |
2875 | /* |
2876 | * qla2x00_update_fcport | |
2877 | * Updates device on list. | |
2878 | * | |
2879 | * Input: | |
2880 | * ha = adapter block pointer. | |
2881 | * fcport = port structure pointer. | |
2882 | * | |
2883 | * Return: | |
2884 | * 0 - Success | |
2885 | * BIT_0 - error | |
2886 | * | |
2887 | * Context: | |
2888 | * Kernel context. | |
2889 | */ | |
2890 | void | |
e315cd28 | 2891 | qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
23be331d | 2892 | { |
e315cd28 | 2893 | fcport->vha = vha; |
23be331d | 2894 | fcport->login_retry = 0; |
5ff1d584 | 2895 | fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); |
23be331d | 2896 | |
e315cd28 | 2897 | qla2x00_iidma_fcport(vha, fcport); |
21090cbe | 2898 | qla24xx_update_fcport_fcp_prio(vha, fcport); |
e315cd28 | 2899 | qla2x00_reg_remote_port(vha, fcport); |
ec426e10 | 2900 | qla2x00_set_fcport_state(fcport, FCS_ONLINE); |
23be331d AB |
2901 | } |
2902 | ||
1da177e4 LT |
2903 | /* |
2904 | * qla2x00_configure_fabric | |
2905 | * Setup SNS devices with loop ID's. | |
2906 | * | |
2907 | * Input: | |
2908 | * ha = adapter block pointer. | |
2909 | * | |
2910 | * Returns: | |
2911 | * 0 = success. | |
2912 | * BIT_0 = error | |
2913 | */ | |
2914 | static int | |
e315cd28 | 2915 | qla2x00_configure_fabric(scsi_qla_host_t *vha) |
1da177e4 | 2916 | { |
b3b02e6e | 2917 | int rval; |
1da177e4 LT |
2918 | fc_port_t *fcport, *fcptemp; |
2919 | uint16_t next_loopid; | |
2920 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
0107109e | 2921 | uint16_t loop_id; |
1da177e4 | 2922 | LIST_HEAD(new_fcports); |
e315cd28 AC |
2923 | struct qla_hw_data *ha = vha->hw; |
2924 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
1da177e4 LT |
2925 | |
2926 | /* If FL port exists, then SNS is present */ | |
e428924c | 2927 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2928 | loop_id = NPH_F_PORT; |
2929 | else | |
2930 | loop_id = SNS_FL_PORT; | |
e315cd28 | 2931 | rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); |
1da177e4 | 2932 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
2933 | ql_dbg(ql_dbg_disc, vha, 0x201f, |
2934 | "MBX_GET_PORT_NAME failed, No FL Port.\n"); | |
1da177e4 | 2935 | |
e315cd28 | 2936 | vha->device_flags &= ~SWITCH_FOUND; |
1da177e4 LT |
2937 | return (QLA_SUCCESS); |
2938 | } | |
e315cd28 | 2939 | vha->device_flags |= SWITCH_FOUND; |
1da177e4 | 2940 | |
1da177e4 | 2941 | do { |
cca5335c AV |
2942 | /* FDMI support. */ |
2943 | if (ql2xfdmienable && | |
e315cd28 AC |
2944 | test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) |
2945 | qla2x00_fdmi_register(vha); | |
cca5335c | 2946 | |
1da177e4 | 2947 | /* Ensure we are logged into the SNS. */ |
e428924c | 2948 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2949 | loop_id = NPH_SNS; |
2950 | else | |
2951 | loop_id = SIMPLE_NAME_SERVER; | |
0b91d116 CD |
2952 | rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, |
2953 | 0xfc, mb, BIT_1|BIT_0); | |
2954 | if (rval != QLA_SUCCESS) { | |
2955 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
2956 | return rval; | |
2957 | } | |
1da177e4 | 2958 | if (mb[0] != MBS_COMMAND_COMPLETE) { |
7c3df132 SK |
2959 | ql_dbg(ql_dbg_disc, vha, 0x2042, |
2960 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x " | |
2961 | "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1], | |
2962 | mb[2], mb[6], mb[7]); | |
1da177e4 LT |
2963 | return (QLA_SUCCESS); |
2964 | } | |
2965 | ||
e315cd28 AC |
2966 | if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { |
2967 | if (qla2x00_rft_id(vha)) { | |
1da177e4 | 2968 | /* EMPTY */ |
7c3df132 SK |
2969 | ql_dbg(ql_dbg_disc, vha, 0x2045, |
2970 | "Register FC-4 TYPE failed.\n"); | |
1da177e4 | 2971 | } |
e315cd28 | 2972 | if (qla2x00_rff_id(vha)) { |
1da177e4 | 2973 | /* EMPTY */ |
7c3df132 SK |
2974 | ql_dbg(ql_dbg_disc, vha, 0x2049, |
2975 | "Register FC-4 Features failed.\n"); | |
1da177e4 | 2976 | } |
e315cd28 | 2977 | if (qla2x00_rnn_id(vha)) { |
1da177e4 | 2978 | /* EMPTY */ |
7c3df132 SK |
2979 | ql_dbg(ql_dbg_disc, vha, 0x204f, |
2980 | "Register Node Name failed.\n"); | |
e315cd28 | 2981 | } else if (qla2x00_rsnn_nn(vha)) { |
1da177e4 | 2982 | /* EMPTY */ |
7c3df132 SK |
2983 | ql_dbg(ql_dbg_disc, vha, 0x2053, |
2984 | "Register Symobilic Node Name failed.\n"); | |
1da177e4 LT |
2985 | } |
2986 | } | |
2987 | ||
b3b02e6e AE |
2988 | #define QLA_FCPORT_SCAN 1 |
2989 | #define QLA_FCPORT_FOUND 2 | |
2990 | ||
2991 | list_for_each_entry(fcport, &vha->vp_fcports, list) { | |
2992 | fcport->scan_state = QLA_FCPORT_SCAN; | |
2993 | } | |
2994 | ||
e315cd28 | 2995 | rval = qla2x00_find_all_fabric_devs(vha, &new_fcports); |
1da177e4 LT |
2996 | if (rval != QLA_SUCCESS) |
2997 | break; | |
2998 | ||
2999 | /* | |
3000 | * Logout all previous fabric devices marked lost, except | |
f08b7251 | 3001 | * FCP2 devices. |
1da177e4 | 3002 | */ |
e315cd28 AC |
3003 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
3004 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
3005 | break; |
3006 | ||
3007 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) | |
3008 | continue; | |
3009 | ||
b3b02e6e AE |
3010 | if (fcport->scan_state == QLA_FCPORT_SCAN && |
3011 | atomic_read(&fcport->state) == FCS_ONLINE) { | |
e315cd28 | 3012 | qla2x00_mark_device_lost(vha, fcport, |
d97994dc | 3013 | ql2xplogiabsentdevice, 0); |
1da177e4 | 3014 | if (fcport->loop_id != FC_NO_LOOP_ID && |
f08b7251 | 3015 | (fcport->flags & FCF_FCP2_DEVICE) == 0 && |
1da177e4 LT |
3016 | fcport->port_type != FCT_INITIATOR && |
3017 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 3018 | ha->isp_ops->fabric_logout(vha, |
1c7c6357 AV |
3019 | fcport->loop_id, |
3020 | fcport->d_id.b.domain, | |
3021 | fcport->d_id.b.area, | |
3022 | fcport->d_id.b.al_pa); | |
1da177e4 LT |
3023 | fcport->loop_id = FC_NO_LOOP_ID; |
3024 | } | |
3025 | } | |
3026 | } | |
3027 | ||
3028 | /* Starting free loop ID. */ | |
e315cd28 | 3029 | next_loopid = ha->min_external_loopid; |
1da177e4 LT |
3030 | |
3031 | /* | |
3032 | * Scan through our port list and login entries that need to be | |
3033 | * logged in. | |
3034 | */ | |
e315cd28 AC |
3035 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
3036 | if (atomic_read(&vha->loop_down_timer) || | |
3037 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
3038 | break; |
3039 | ||
3040 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || | |
3041 | (fcport->flags & FCF_LOGIN_NEEDED) == 0) | |
3042 | continue; | |
3043 | ||
3044 | if (fcport->loop_id == FC_NO_LOOP_ID) { | |
3045 | fcport->loop_id = next_loopid; | |
d4486fd6 | 3046 | rval = qla2x00_find_new_loop_id( |
e315cd28 | 3047 | base_vha, fcport); |
1da177e4 LT |
3048 | if (rval != QLA_SUCCESS) { |
3049 | /* Ran out of IDs to use */ | |
3050 | break; | |
3051 | } | |
3052 | } | |
1da177e4 | 3053 | /* Login and update database */ |
e315cd28 | 3054 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
1da177e4 LT |
3055 | } |
3056 | ||
3057 | /* Exit if out of loop IDs. */ | |
3058 | if (rval != QLA_SUCCESS) { | |
3059 | break; | |
3060 | } | |
3061 | ||
3062 | /* | |
3063 | * Login and add the new devices to our port list. | |
3064 | */ | |
3065 | list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { | |
e315cd28 AC |
3066 | if (atomic_read(&vha->loop_down_timer) || |
3067 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
3068 | break; |
3069 | ||
3070 | /* Find a new loop ID to use. */ | |
3071 | fcport->loop_id = next_loopid; | |
e315cd28 | 3072 | rval = qla2x00_find_new_loop_id(base_vha, fcport); |
1da177e4 LT |
3073 | if (rval != QLA_SUCCESS) { |
3074 | /* Ran out of IDs to use */ | |
3075 | break; | |
3076 | } | |
3077 | ||
bdf79621 | 3078 | /* Login and update database */ |
e315cd28 AC |
3079 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
3080 | ||
3081 | if (vha->vp_idx) { | |
3082 | fcport->vha = vha; | |
3083 | fcport->vp_idx = vha->vp_idx; | |
3084 | } | |
3085 | list_move_tail(&fcport->list, &vha->vp_fcports); | |
1da177e4 LT |
3086 | } |
3087 | } while (0); | |
3088 | ||
3089 | /* Free all new device structures not processed. */ | |
3090 | list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { | |
3091 | list_del(&fcport->list); | |
3092 | kfree(fcport); | |
3093 | } | |
3094 | ||
3095 | if (rval) { | |
7c3df132 SK |
3096 | ql_dbg(ql_dbg_disc, vha, 0x2068, |
3097 | "Configure fabric error exit rval=%d.\n", rval); | |
1da177e4 LT |
3098 | } |
3099 | ||
3100 | return (rval); | |
3101 | } | |
3102 | ||
1da177e4 LT |
3103 | /* |
3104 | * qla2x00_find_all_fabric_devs | |
3105 | * | |
3106 | * Input: | |
3107 | * ha = adapter block pointer. | |
3108 | * dev = database device entry pointer. | |
3109 | * | |
3110 | * Returns: | |
3111 | * 0 = success. | |
3112 | * | |
3113 | * Context: | |
3114 | * Kernel context. | |
3115 | */ | |
3116 | static int | |
e315cd28 AC |
3117 | qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha, |
3118 | struct list_head *new_fcports) | |
1da177e4 LT |
3119 | { |
3120 | int rval; | |
3121 | uint16_t loop_id; | |
3122 | fc_port_t *fcport, *new_fcport, *fcptemp; | |
3123 | int found; | |
3124 | ||
3125 | sw_info_t *swl; | |
3126 | int swl_idx; | |
3127 | int first_dev, last_dev; | |
1516ef44 | 3128 | port_id_t wrap = {}, nxt_d_id; |
e315cd28 AC |
3129 | struct qla_hw_data *ha = vha->hw; |
3130 | struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev); | |
ee546b6e | 3131 | struct scsi_qla_host *tvp; |
1da177e4 LT |
3132 | |
3133 | rval = QLA_SUCCESS; | |
3134 | ||
3135 | /* Try GID_PT to get device list, else GAN. */ | |
7a67735b AV |
3136 | if (!ha->swl) |
3137 | ha->swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), | |
3138 | GFP_KERNEL); | |
3139 | swl = ha->swl; | |
bbfbbbc1 | 3140 | if (!swl) { |
1da177e4 | 3141 | /*EMPTY*/ |
7c3df132 SK |
3142 | ql_dbg(ql_dbg_disc, vha, 0x2054, |
3143 | "GID_PT allocations failed, fallback on GA_NXT.\n"); | |
1da177e4 | 3144 | } else { |
7a67735b | 3145 | memset(swl, 0, MAX_FIBRE_DEVICES * sizeof(sw_info_t)); |
e315cd28 | 3146 | if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { |
1da177e4 | 3147 | swl = NULL; |
e315cd28 | 3148 | } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 | 3149 | swl = NULL; |
e315cd28 | 3150 | } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 | 3151 | swl = NULL; |
e5896bd5 | 3152 | } else if (ql2xiidmaenable && |
e315cd28 AC |
3153 | qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) { |
3154 | qla2x00_gpsc(vha, swl); | |
1da177e4 | 3155 | } |
e8c72ba5 CD |
3156 | |
3157 | /* If other queries succeeded probe for FC-4 type */ | |
3158 | if (swl) | |
3159 | qla2x00_gff_id(vha, swl); | |
1da177e4 LT |
3160 | } |
3161 | swl_idx = 0; | |
3162 | ||
3163 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 3164 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 3165 | if (new_fcport == NULL) { |
7c3df132 SK |
3166 | ql_log(ql_log_warn, vha, 0x205e, |
3167 | "Failed to allocate memory for fcport.\n"); | |
1da177e4 LT |
3168 | return (QLA_MEMORY_ALLOC_FAILED); |
3169 | } | |
3170 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
3171 | /* Set start port ID scan at adapter ID. */ |
3172 | first_dev = 1; | |
3173 | last_dev = 0; | |
3174 | ||
3175 | /* Starting free loop ID. */ | |
e315cd28 AC |
3176 | loop_id = ha->min_external_loopid; |
3177 | for (; loop_id <= ha->max_loop_id; loop_id++) { | |
3178 | if (qla2x00_is_reserved_id(vha, loop_id)) | |
1da177e4 LT |
3179 | continue; |
3180 | ||
3a6478df GM |
3181 | if (ha->current_topology == ISP_CFG_FL && |
3182 | (atomic_read(&vha->loop_down_timer) || | |
3183 | LOOP_TRANSITION(vha))) { | |
bb2d52b2 AV |
3184 | atomic_set(&vha->loop_down_timer, 0); |
3185 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
3186 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
1da177e4 | 3187 | break; |
bb2d52b2 | 3188 | } |
1da177e4 LT |
3189 | |
3190 | if (swl != NULL) { | |
3191 | if (last_dev) { | |
3192 | wrap.b24 = new_fcport->d_id.b24; | |
3193 | } else { | |
3194 | new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; | |
3195 | memcpy(new_fcport->node_name, | |
3196 | swl[swl_idx].node_name, WWN_SIZE); | |
3197 | memcpy(new_fcport->port_name, | |
3198 | swl[swl_idx].port_name, WWN_SIZE); | |
d8b45213 AV |
3199 | memcpy(new_fcport->fabric_port_name, |
3200 | swl[swl_idx].fabric_port_name, WWN_SIZE); | |
3201 | new_fcport->fp_speed = swl[swl_idx].fp_speed; | |
e8c72ba5 | 3202 | new_fcport->fc4_type = swl[swl_idx].fc4_type; |
1da177e4 LT |
3203 | |
3204 | if (swl[swl_idx].d_id.b.rsvd_1 != 0) { | |
3205 | last_dev = 1; | |
3206 | } | |
3207 | swl_idx++; | |
3208 | } | |
3209 | } else { | |
3210 | /* Send GA_NXT to the switch */ | |
e315cd28 | 3211 | rval = qla2x00_ga_nxt(vha, new_fcport); |
1da177e4 | 3212 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
3213 | ql_log(ql_log_warn, vha, 0x2064, |
3214 | "SNS scan failed -- assuming " | |
3215 | "zero-entry result.\n"); | |
1da177e4 LT |
3216 | list_for_each_entry_safe(fcport, fcptemp, |
3217 | new_fcports, list) { | |
3218 | list_del(&fcport->list); | |
3219 | kfree(fcport); | |
3220 | } | |
3221 | rval = QLA_SUCCESS; | |
3222 | break; | |
3223 | } | |
3224 | } | |
3225 | ||
3226 | /* If wrap on switch device list, exit. */ | |
3227 | if (first_dev) { | |
3228 | wrap.b24 = new_fcport->d_id.b24; | |
3229 | first_dev = 0; | |
3230 | } else if (new_fcport->d_id.b24 == wrap.b24) { | |
7c3df132 SK |
3231 | ql_dbg(ql_dbg_disc, vha, 0x2065, |
3232 | "Device wrap (%02x%02x%02x).\n", | |
3233 | new_fcport->d_id.b.domain, | |
3234 | new_fcport->d_id.b.area, | |
3235 | new_fcport->d_id.b.al_pa); | |
1da177e4 LT |
3236 | break; |
3237 | } | |
3238 | ||
2c3dfe3f | 3239 | /* Bypass if same physical adapter. */ |
e315cd28 | 3240 | if (new_fcport->d_id.b24 == base_vha->d_id.b24) |
1da177e4 LT |
3241 | continue; |
3242 | ||
2c3dfe3f | 3243 | /* Bypass virtual ports of the same host. */ |
e315cd28 AC |
3244 | found = 0; |
3245 | if (ha->num_vhosts) { | |
feafb7b1 AE |
3246 | unsigned long flags; |
3247 | ||
3248 | spin_lock_irqsave(&ha->vport_slock, flags); | |
ee546b6e | 3249 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
3250 | if (new_fcport->d_id.b24 == vp->d_id.b24) { |
3251 | found = 1; | |
2c3dfe3f | 3252 | break; |
e315cd28 | 3253 | } |
2c3dfe3f | 3254 | } |
feafb7b1 AE |
3255 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
3256 | ||
e315cd28 | 3257 | if (found) |
2c3dfe3f SJ |
3258 | continue; |
3259 | } | |
3260 | ||
f7d289f6 AV |
3261 | /* Bypass if same domain and area of adapter. */ |
3262 | if (((new_fcport->d_id.b24 & 0xffff00) == | |
e315cd28 | 3263 | (vha->d_id.b24 & 0xffff00)) && ha->current_topology == |
f7d289f6 AV |
3264 | ISP_CFG_FL) |
3265 | continue; | |
3266 | ||
1da177e4 LT |
3267 | /* Bypass reserved domain fields. */ |
3268 | if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) | |
3269 | continue; | |
3270 | ||
e8c72ba5 | 3271 | /* Bypass ports whose FCP-4 type is not FCP_SCSI */ |
4da26e16 CD |
3272 | if (ql2xgffidenable && |
3273 | (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && | |
3274 | new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) | |
e8c72ba5 CD |
3275 | continue; |
3276 | ||
1da177e4 LT |
3277 | /* Locate matching device in database. */ |
3278 | found = 0; | |
e315cd28 | 3279 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
3280 | if (memcmp(new_fcport->port_name, fcport->port_name, |
3281 | WWN_SIZE)) | |
3282 | continue; | |
3283 | ||
b3b02e6e AE |
3284 | fcport->scan_state = QLA_FCPORT_FOUND; |
3285 | ||
1da177e4 LT |
3286 | found++; |
3287 | ||
d8b45213 AV |
3288 | /* Update port state. */ |
3289 | memcpy(fcport->fabric_port_name, | |
3290 | new_fcport->fabric_port_name, WWN_SIZE); | |
3291 | fcport->fp_speed = new_fcport->fp_speed; | |
3292 | ||
1da177e4 LT |
3293 | /* |
3294 | * If address the same and state FCS_ONLINE, nothing | |
3295 | * changed. | |
3296 | */ | |
3297 | if (fcport->d_id.b24 == new_fcport->d_id.b24 && | |
3298 | atomic_read(&fcport->state) == FCS_ONLINE) { | |
3299 | break; | |
3300 | } | |
3301 | ||
3302 | /* | |
3303 | * If device was not a fabric device before. | |
3304 | */ | |
3305 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
3306 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
3307 | fcport->loop_id = FC_NO_LOOP_ID; | |
3308 | fcport->flags |= (FCF_FABRIC_DEVICE | | |
3309 | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
3310 | break; |
3311 | } | |
3312 | ||
3313 | /* | |
3314 | * Port ID changed or device was marked to be updated; | |
3315 | * Log it out if still logged in and mark it for | |
3316 | * relogin later. | |
3317 | */ | |
3318 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
3319 | fcport->flags |= FCF_LOGIN_NEEDED; | |
3320 | if (fcport->loop_id != FC_NO_LOOP_ID && | |
f08b7251 | 3321 | (fcport->flags & FCF_FCP2_DEVICE) == 0 && |
1da177e4 LT |
3322 | fcport->port_type != FCT_INITIATOR && |
3323 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 3324 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3325 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3326 | fcport->d_id.b.al_pa); | |
1da177e4 LT |
3327 | fcport->loop_id = FC_NO_LOOP_ID; |
3328 | } | |
3329 | ||
3330 | break; | |
3331 | } | |
3332 | ||
3333 | if (found) | |
3334 | continue; | |
1da177e4 LT |
3335 | /* If device was not in our fcports list, then add it. */ |
3336 | list_add_tail(&new_fcport->list, new_fcports); | |
3337 | ||
3338 | /* Allocate a new replacement fcport. */ | |
3339 | nxt_d_id.b24 = new_fcport->d_id.b24; | |
e315cd28 | 3340 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 3341 | if (new_fcport == NULL) { |
7c3df132 SK |
3342 | ql_log(ql_log_warn, vha, 0x2066, |
3343 | "Memory allocation failed for fcport.\n"); | |
1da177e4 LT |
3344 | return (QLA_MEMORY_ALLOC_FAILED); |
3345 | } | |
3346 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
3347 | new_fcport->d_id.b24 = nxt_d_id.b24; | |
3348 | } | |
3349 | ||
c9475cb0 | 3350 | kfree(new_fcport); |
1da177e4 | 3351 | |
1da177e4 LT |
3352 | return (rval); |
3353 | } | |
3354 | ||
3355 | /* | |
3356 | * qla2x00_find_new_loop_id | |
3357 | * Scan through our port list and find a new usable loop ID. | |
3358 | * | |
3359 | * Input: | |
3360 | * ha: adapter state pointer. | |
3361 | * dev: port structure pointer. | |
3362 | * | |
3363 | * Returns: | |
3364 | * qla2x00 local function return status code. | |
3365 | * | |
3366 | * Context: | |
3367 | * Kernel context. | |
3368 | */ | |
03bcfb57 | 3369 | int |
e315cd28 | 3370 | qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) |
1da177e4 LT |
3371 | { |
3372 | int rval; | |
3373 | int found; | |
3374 | fc_port_t *fcport; | |
3375 | uint16_t first_loop_id; | |
e315cd28 AC |
3376 | struct qla_hw_data *ha = vha->hw; |
3377 | struct scsi_qla_host *vp; | |
ee546b6e | 3378 | struct scsi_qla_host *tvp; |
feafb7b1 | 3379 | unsigned long flags = 0; |
1da177e4 LT |
3380 | |
3381 | rval = QLA_SUCCESS; | |
3382 | ||
3383 | /* Save starting loop ID. */ | |
3384 | first_loop_id = dev->loop_id; | |
3385 | ||
3386 | for (;;) { | |
3387 | /* Skip loop ID if already used by adapter. */ | |
e315cd28 | 3388 | if (dev->loop_id == vha->loop_id) |
1da177e4 | 3389 | dev->loop_id++; |
1da177e4 LT |
3390 | |
3391 | /* Skip reserved loop IDs. */ | |
e315cd28 | 3392 | while (qla2x00_is_reserved_id(vha, dev->loop_id)) |
1da177e4 | 3393 | dev->loop_id++; |
1da177e4 LT |
3394 | |
3395 | /* Reset loop ID if passed the end. */ | |
e315cd28 | 3396 | if (dev->loop_id > ha->max_loop_id) { |
1da177e4 LT |
3397 | /* first loop ID. */ |
3398 | dev->loop_id = ha->min_external_loopid; | |
3399 | } | |
3400 | ||
3401 | /* Check for loop ID being already in use. */ | |
3402 | found = 0; | |
3403 | fcport = NULL; | |
feafb7b1 AE |
3404 | |
3405 | spin_lock_irqsave(&ha->vport_slock, flags); | |
ee546b6e | 3406 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
3407 | list_for_each_entry(fcport, &vp->vp_fcports, list) { |
3408 | if (fcport->loop_id == dev->loop_id && | |
3409 | fcport != dev) { | |
3410 | /* ID possibly in use */ | |
3411 | found++; | |
3412 | break; | |
3413 | } | |
1da177e4 | 3414 | } |
e315cd28 AC |
3415 | if (found) |
3416 | break; | |
1da177e4 | 3417 | } |
feafb7b1 | 3418 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
1da177e4 LT |
3419 | |
3420 | /* If not in use then it is free to use. */ | |
3421 | if (!found) { | |
557cf785 AE |
3422 | ql_dbg(ql_dbg_disc, dev->vha, 0x2086, |
3423 | "Assigning new loopid=%x, portid=%x.\n", | |
3424 | dev->loop_id, dev->d_id.b24); | |
1da177e4 LT |
3425 | break; |
3426 | } | |
3427 | ||
3428 | /* ID in use. Try next value. */ | |
3429 | dev->loop_id++; | |
3430 | ||
3431 | /* If wrap around. No free ID to use. */ | |
3432 | if (dev->loop_id == first_loop_id) { | |
3433 | dev->loop_id = FC_NO_LOOP_ID; | |
3434 | rval = QLA_FUNCTION_FAILED; | |
3435 | break; | |
3436 | } | |
3437 | } | |
3438 | ||
3439 | return (rval); | |
3440 | } | |
3441 | ||
1da177e4 LT |
3442 | /* |
3443 | * qla2x00_fabric_dev_login | |
3444 | * Login fabric target device and update FC port database. | |
3445 | * | |
3446 | * Input: | |
3447 | * ha: adapter state pointer. | |
3448 | * fcport: port structure list pointer. | |
3449 | * next_loopid: contains value of a new loop ID that can be used | |
3450 | * by the next login attempt. | |
3451 | * | |
3452 | * Returns: | |
3453 | * qla2x00 local function return status code. | |
3454 | * | |
3455 | * Context: | |
3456 | * Kernel context. | |
3457 | */ | |
3458 | static int | |
e315cd28 | 3459 | qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
3460 | uint16_t *next_loopid) |
3461 | { | |
3462 | int rval; | |
3463 | int retry; | |
0107109e | 3464 | uint8_t opts; |
e315cd28 | 3465 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3466 | |
3467 | rval = QLA_SUCCESS; | |
3468 | retry = 0; | |
3469 | ||
ac280b67 | 3470 | if (IS_ALOGIO_CAPABLE(ha)) { |
5ff1d584 AV |
3471 | if (fcport->flags & FCF_ASYNC_SENT) |
3472 | return rval; | |
3473 | fcport->flags |= FCF_ASYNC_SENT; | |
ac280b67 AV |
3474 | rval = qla2x00_post_async_login_work(vha, fcport, NULL); |
3475 | if (!rval) | |
3476 | return rval; | |
3477 | } | |
3478 | ||
5ff1d584 | 3479 | fcport->flags &= ~FCF_ASYNC_SENT; |
e315cd28 | 3480 | rval = qla2x00_fabric_login(vha, fcport, next_loopid); |
1da177e4 | 3481 | if (rval == QLA_SUCCESS) { |
f08b7251 | 3482 | /* Send an ADISC to FCP2 devices.*/ |
0107109e | 3483 | opts = 0; |
f08b7251 | 3484 | if (fcport->flags & FCF_FCP2_DEVICE) |
0107109e | 3485 | opts |= BIT_1; |
e315cd28 | 3486 | rval = qla2x00_get_port_database(vha, fcport, opts); |
1da177e4 | 3487 | if (rval != QLA_SUCCESS) { |
e315cd28 | 3488 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3489 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3490 | fcport->d_id.b.al_pa); | |
e315cd28 | 3491 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 | 3492 | } else { |
e315cd28 | 3493 | qla2x00_update_fcport(vha, fcport); |
1da177e4 | 3494 | } |
0b91d116 CD |
3495 | } else { |
3496 | /* Retry Login. */ | |
3497 | qla2x00_mark_device_lost(vha, fcport, 1, 0); | |
1da177e4 LT |
3498 | } |
3499 | ||
3500 | return (rval); | |
3501 | } | |
3502 | ||
3503 | /* | |
3504 | * qla2x00_fabric_login | |
3505 | * Issue fabric login command. | |
3506 | * | |
3507 | * Input: | |
3508 | * ha = adapter block pointer. | |
3509 | * device = pointer to FC device type structure. | |
3510 | * | |
3511 | * Returns: | |
3512 | * 0 - Login successfully | |
3513 | * 1 - Login failed | |
3514 | * 2 - Initiator device | |
3515 | * 3 - Fatal error | |
3516 | */ | |
3517 | int | |
e315cd28 | 3518 | qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
3519 | uint16_t *next_loopid) |
3520 | { | |
3521 | int rval; | |
3522 | int retry; | |
3523 | uint16_t tmp_loopid; | |
3524 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
e315cd28 | 3525 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3526 | |
3527 | retry = 0; | |
3528 | tmp_loopid = 0; | |
3529 | ||
3530 | for (;;) { | |
7c3df132 SK |
3531 | ql_dbg(ql_dbg_disc, vha, 0x2000, |
3532 | "Trying Fabric Login w/loop id 0x%04x for port " | |
3533 | "%02x%02x%02x.\n", | |
3534 | fcport->loop_id, fcport->d_id.b.domain, | |
3535 | fcport->d_id.b.area, fcport->d_id.b.al_pa); | |
1da177e4 LT |
3536 | |
3537 | /* Login fcport on switch. */ | |
0b91d116 | 3538 | rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, |
1da177e4 LT |
3539 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3540 | fcport->d_id.b.al_pa, mb, BIT_0); | |
0b91d116 CD |
3541 | if (rval != QLA_SUCCESS) { |
3542 | return rval; | |
3543 | } | |
1da177e4 LT |
3544 | if (mb[0] == MBS_PORT_ID_USED) { |
3545 | /* | |
3546 | * Device has another loop ID. The firmware team | |
0107109e AV |
3547 | * recommends the driver perform an implicit login with |
3548 | * the specified ID again. The ID we just used is save | |
3549 | * here so we return with an ID that can be tried by | |
3550 | * the next login. | |
1da177e4 LT |
3551 | */ |
3552 | retry++; | |
3553 | tmp_loopid = fcport->loop_id; | |
3554 | fcport->loop_id = mb[1]; | |
3555 | ||
7c3df132 SK |
3556 | ql_dbg(ql_dbg_disc, vha, 0x2001, |
3557 | "Fabric Login: port in use - next loop " | |
3558 | "id=0x%04x, port id= %02x%02x%02x.\n", | |
1da177e4 | 3559 | fcport->loop_id, fcport->d_id.b.domain, |
7c3df132 | 3560 | fcport->d_id.b.area, fcport->d_id.b.al_pa); |
1da177e4 LT |
3561 | |
3562 | } else if (mb[0] == MBS_COMMAND_COMPLETE) { | |
3563 | /* | |
3564 | * Login succeeded. | |
3565 | */ | |
3566 | if (retry) { | |
3567 | /* A retry occurred before. */ | |
3568 | *next_loopid = tmp_loopid; | |
3569 | } else { | |
3570 | /* | |
3571 | * No retry occurred before. Just increment the | |
3572 | * ID value for next login. | |
3573 | */ | |
3574 | *next_loopid = (fcport->loop_id + 1); | |
3575 | } | |
3576 | ||
3577 | if (mb[1] & BIT_0) { | |
3578 | fcport->port_type = FCT_INITIATOR; | |
3579 | } else { | |
3580 | fcport->port_type = FCT_TARGET; | |
3581 | if (mb[1] & BIT_1) { | |
8474f3a0 | 3582 | fcport->flags |= FCF_FCP2_DEVICE; |
1da177e4 LT |
3583 | } |
3584 | } | |
3585 | ||
ad3e0eda AV |
3586 | if (mb[10] & BIT_0) |
3587 | fcport->supported_classes |= FC_COS_CLASS2; | |
3588 | if (mb[10] & BIT_1) | |
3589 | fcport->supported_classes |= FC_COS_CLASS3; | |
3590 | ||
1da177e4 LT |
3591 | rval = QLA_SUCCESS; |
3592 | break; | |
3593 | } else if (mb[0] == MBS_LOOP_ID_USED) { | |
3594 | /* | |
3595 | * Loop ID already used, try next loop ID. | |
3596 | */ | |
3597 | fcport->loop_id++; | |
e315cd28 | 3598 | rval = qla2x00_find_new_loop_id(vha, fcport); |
1da177e4 LT |
3599 | if (rval != QLA_SUCCESS) { |
3600 | /* Ran out of loop IDs to use */ | |
3601 | break; | |
3602 | } | |
3603 | } else if (mb[0] == MBS_COMMAND_ERROR) { | |
3604 | /* | |
3605 | * Firmware possibly timed out during login. If NO | |
3606 | * retries are left to do then the device is declared | |
3607 | * dead. | |
3608 | */ | |
3609 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3610 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3611 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3612 | fcport->d_id.b.al_pa); | |
e315cd28 | 3613 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 LT |
3614 | |
3615 | rval = 1; | |
3616 | break; | |
3617 | } else { | |
3618 | /* | |
3619 | * unrecoverable / not handled error | |
3620 | */ | |
7c3df132 SK |
3621 | ql_dbg(ql_dbg_disc, vha, 0x2002, |
3622 | "Failed=%x port_id=%02x%02x%02x loop_id=%x " | |
3623 | "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, | |
3624 | fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
3625 | fcport->loop_id, jiffies); | |
1da177e4 LT |
3626 | |
3627 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3628 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3629 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3630 | fcport->d_id.b.al_pa); | |
1da177e4 | 3631 | fcport->loop_id = FC_NO_LOOP_ID; |
0eedfcf0 | 3632 | fcport->login_retry = 0; |
1da177e4 LT |
3633 | |
3634 | rval = 3; | |
3635 | break; | |
3636 | } | |
3637 | } | |
3638 | ||
3639 | return (rval); | |
3640 | } | |
3641 | ||
3642 | /* | |
3643 | * qla2x00_local_device_login | |
3644 | * Issue local device login command. | |
3645 | * | |
3646 | * Input: | |
3647 | * ha = adapter block pointer. | |
3648 | * loop_id = loop id of device to login to. | |
3649 | * | |
3650 | * Returns (Where's the #define!!!!): | |
3651 | * 0 - Login successfully | |
3652 | * 1 - Login failed | |
3653 | * 3 - Fatal error | |
3654 | */ | |
3655 | int | |
e315cd28 | 3656 | qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) |
1da177e4 LT |
3657 | { |
3658 | int rval; | |
3659 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
3660 | ||
3661 | memset(mb, 0, sizeof(mb)); | |
e315cd28 | 3662 | rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); |
1da177e4 LT |
3663 | if (rval == QLA_SUCCESS) { |
3664 | /* Interrogate mailbox registers for any errors */ | |
3665 | if (mb[0] == MBS_COMMAND_ERROR) | |
3666 | rval = 1; | |
3667 | else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) | |
3668 | /* device not in PCB table */ | |
3669 | rval = 3; | |
3670 | } | |
3671 | ||
3672 | return (rval); | |
3673 | } | |
3674 | ||
3675 | /* | |
3676 | * qla2x00_loop_resync | |
3677 | * Resync with fibre channel devices. | |
3678 | * | |
3679 | * Input: | |
3680 | * ha = adapter block pointer. | |
3681 | * | |
3682 | * Returns: | |
3683 | * 0 = success | |
3684 | */ | |
3685 | int | |
e315cd28 | 3686 | qla2x00_loop_resync(scsi_qla_host_t *vha) |
1da177e4 | 3687 | { |
73208dfd | 3688 | int rval = QLA_SUCCESS; |
1da177e4 | 3689 | uint32_t wait_time; |
67c2e93a AC |
3690 | struct req_que *req; |
3691 | struct rsp_que *rsp; | |
3692 | ||
7163ea81 | 3693 | if (vha->hw->flags.cpu_affinity_enabled) |
67c2e93a AC |
3694 | req = vha->hw->req_q_map[0]; |
3695 | else | |
3696 | req = vha->req; | |
3697 | rsp = req->rsp; | |
1da177e4 | 3698 | |
e315cd28 AC |
3699 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
3700 | if (vha->flags.online) { | |
3701 | if (!(rval = qla2x00_fw_ready(vha))) { | |
1da177e4 LT |
3702 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
3703 | wait_time = 256; | |
3704 | do { | |
0107109e | 3705 | /* Issue a marker after FW becomes ready. */ |
73208dfd AC |
3706 | qla2x00_marker(vha, req, rsp, 0, 0, |
3707 | MK_SYNC_ALL); | |
e315cd28 | 3708 | vha->marker_needed = 0; |
1da177e4 LT |
3709 | |
3710 | /* Remap devices on Loop. */ | |
e315cd28 | 3711 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1da177e4 | 3712 | |
e315cd28 | 3713 | qla2x00_configure_loop(vha); |
1da177e4 | 3714 | wait_time--; |
e315cd28 AC |
3715 | } while (!atomic_read(&vha->loop_down_timer) && |
3716 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
3717 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
3718 | &vha->dpc_flags))); | |
1da177e4 | 3719 | } |
1da177e4 LT |
3720 | } |
3721 | ||
e315cd28 | 3722 | if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) |
1da177e4 | 3723 | return (QLA_FUNCTION_FAILED); |
1da177e4 | 3724 | |
e315cd28 | 3725 | if (rval) |
7c3df132 SK |
3726 | ql_dbg(ql_dbg_disc, vha, 0x206c, |
3727 | "%s *** FAILED ***.\n", __func__); | |
1da177e4 LT |
3728 | |
3729 | return (rval); | |
3730 | } | |
3731 | ||
579d12b5 SK |
3732 | /* |
3733 | * qla2x00_perform_loop_resync | |
3734 | * Description: This function will set the appropriate flags and call | |
3735 | * qla2x00_loop_resync. If successful loop will be resynced | |
3736 | * Arguments : scsi_qla_host_t pointer | |
3737 | * returm : Success or Failure | |
3738 | */ | |
3739 | ||
3740 | int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) | |
3741 | { | |
3742 | int32_t rval = 0; | |
3743 | ||
3744 | if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { | |
3745 | /*Configure the flags so that resync happens properly*/ | |
3746 | atomic_set(&ha->loop_down_timer, 0); | |
3747 | if (!(ha->device_flags & DFLG_NO_CABLE)) { | |
3748 | atomic_set(&ha->loop_state, LOOP_UP); | |
3749 | set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); | |
3750 | set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); | |
3751 | set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); | |
3752 | ||
3753 | rval = qla2x00_loop_resync(ha); | |
3754 | } else | |
3755 | atomic_set(&ha->loop_state, LOOP_DEAD); | |
3756 | ||
3757 | clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); | |
3758 | } | |
3759 | ||
3760 | return rval; | |
3761 | } | |
3762 | ||
d97994dc | 3763 | void |
67becc00 | 3764 | qla2x00_update_fcports(scsi_qla_host_t *base_vha) |
d97994dc AV |
3765 | { |
3766 | fc_port_t *fcport; | |
feafb7b1 AE |
3767 | struct scsi_qla_host *vha; |
3768 | struct qla_hw_data *ha = base_vha->hw; | |
3769 | unsigned long flags; | |
d97994dc | 3770 | |
feafb7b1 | 3771 | spin_lock_irqsave(&ha->vport_slock, flags); |
d97994dc | 3772 | /* Go with deferred removal of rport references. */ |
feafb7b1 AE |
3773 | list_for_each_entry(vha, &base_vha->hw->vp_list, list) { |
3774 | atomic_inc(&vha->vref_count); | |
3775 | list_for_each_entry(fcport, &vha->vp_fcports, list) { | |
8ae598d0 | 3776 | if (fcport->drport && |
feafb7b1 AE |
3777 | atomic_read(&fcport->state) != FCS_UNCONFIGURED) { |
3778 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
3779 | ||
67becc00 | 3780 | qla2x00_rport_del(fcport); |
feafb7b1 AE |
3781 | |
3782 | spin_lock_irqsave(&ha->vport_slock, flags); | |
3783 | } | |
3784 | } | |
3785 | atomic_dec(&vha->vref_count); | |
3786 | } | |
3787 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
d97994dc AV |
3788 | } |
3789 | ||
579d12b5 SK |
3790 | /* |
3791 | * qla82xx_quiescent_state_cleanup | |
3792 | * Description: This function will block the new I/Os | |
3793 | * Its not aborting any I/Os as context | |
3794 | * is not destroyed during quiescence | |
3795 | * Arguments: scsi_qla_host_t | |
3796 | * return : void | |
3797 | */ | |
3798 | void | |
3799 | qla82xx_quiescent_state_cleanup(scsi_qla_host_t *vha) | |
3800 | { | |
3801 | struct qla_hw_data *ha = vha->hw; | |
3802 | struct scsi_qla_host *vp; | |
3803 | ||
7c3df132 SK |
3804 | ql_dbg(ql_dbg_p3p, vha, 0xb002, |
3805 | "Performing ISP error recovery - ha=%p.\n", ha); | |
579d12b5 SK |
3806 | |
3807 | atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); | |
3808 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { | |
3809 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
3810 | qla2x00_mark_all_devices_lost(vha, 0); | |
3811 | list_for_each_entry(vp, &ha->vp_list, list) | |
3812 | qla2x00_mark_all_devices_lost(vha, 0); | |
3813 | } else { | |
3814 | if (!atomic_read(&vha->loop_down_timer)) | |
3815 | atomic_set(&vha->loop_down_timer, | |
3816 | LOOP_DOWN_TIME); | |
3817 | } | |
3818 | /* Wait for pending cmds to complete */ | |
3819 | qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); | |
3820 | } | |
3821 | ||
a9083016 GM |
3822 | void |
3823 | qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) | |
3824 | { | |
3825 | struct qla_hw_data *ha = vha->hw; | |
579d12b5 | 3826 | struct scsi_qla_host *vp; |
feafb7b1 | 3827 | unsigned long flags; |
6aef87be | 3828 | fc_port_t *fcport; |
a9083016 | 3829 | |
e46ef004 SK |
3830 | /* For ISP82XX, driver waits for completion of the commands. |
3831 | * online flag should be set. | |
3832 | */ | |
3833 | if (!IS_QLA82XX(ha)) | |
3834 | vha->flags.online = 0; | |
a9083016 GM |
3835 | ha->flags.chip_reset_done = 0; |
3836 | clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
3837 | ha->qla_stats.total_isp_aborts++; | |
3838 | ||
7c3df132 SK |
3839 | ql_log(ql_log_info, vha, 0x00af, |
3840 | "Performing ISP error recovery - ha=%p.\n", ha); | |
a9083016 | 3841 | |
e46ef004 SK |
3842 | /* For ISP82XX, reset_chip is just disabling interrupts. |
3843 | * Driver waits for the completion of the commands. | |
3844 | * the interrupts need to be enabled. | |
3845 | */ | |
a9083016 GM |
3846 | if (!IS_QLA82XX(ha)) |
3847 | ha->isp_ops->reset_chip(vha); | |
3848 | ||
3849 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
3850 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { | |
3851 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
3852 | qla2x00_mark_all_devices_lost(vha, 0); | |
feafb7b1 AE |
3853 | |
3854 | spin_lock_irqsave(&ha->vport_slock, flags); | |
579d12b5 | 3855 | list_for_each_entry(vp, &ha->vp_list, list) { |
feafb7b1 AE |
3856 | atomic_inc(&vp->vref_count); |
3857 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
3858 | ||
a9083016 | 3859 | qla2x00_mark_all_devices_lost(vp, 0); |
feafb7b1 AE |
3860 | |
3861 | spin_lock_irqsave(&ha->vport_slock, flags); | |
3862 | atomic_dec(&vp->vref_count); | |
3863 | } | |
3864 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
a9083016 GM |
3865 | } else { |
3866 | if (!atomic_read(&vha->loop_down_timer)) | |
3867 | atomic_set(&vha->loop_down_timer, | |
3868 | LOOP_DOWN_TIME); | |
3869 | } | |
3870 | ||
6aef87be AV |
3871 | /* Clear all async request states across all VPs. */ |
3872 | list_for_each_entry(fcport, &vha->vp_fcports, list) | |
3873 | fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); | |
3874 | spin_lock_irqsave(&ha->vport_slock, flags); | |
3875 | list_for_each_entry(vp, &ha->vp_list, list) { | |
3876 | atomic_inc(&vp->vref_count); | |
3877 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
3878 | ||
3879 | list_for_each_entry(fcport, &vp->vp_fcports, list) | |
3880 | fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); | |
3881 | ||
3882 | spin_lock_irqsave(&ha->vport_slock, flags); | |
3883 | atomic_dec(&vp->vref_count); | |
3884 | } | |
3885 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
3886 | ||
bddd2d65 LC |
3887 | if (!ha->flags.eeh_busy) { |
3888 | /* Make sure for ISP 82XX IO DMA is complete */ | |
3889 | if (IS_QLA82XX(ha)) { | |
7190575f | 3890 | qla82xx_chip_reset_cleanup(vha); |
7c3df132 SK |
3891 | ql_log(ql_log_info, vha, 0x00b4, |
3892 | "Done chip reset cleanup.\n"); | |
a9083016 | 3893 | |
e46ef004 SK |
3894 | /* Done waiting for pending commands. |
3895 | * Reset the online flag. | |
3896 | */ | |
3897 | vha->flags.online = 0; | |
4d78c973 | 3898 | } |
a9083016 | 3899 | |
bddd2d65 LC |
3900 | /* Requeue all commands in outstanding command list. */ |
3901 | qla2x00_abort_all_cmds(vha, DID_RESET << 16); | |
3902 | } | |
a9083016 GM |
3903 | } |
3904 | ||
1da177e4 LT |
3905 | /* |
3906 | * qla2x00_abort_isp | |
3907 | * Resets ISP and aborts all outstanding commands. | |
3908 | * | |
3909 | * Input: | |
3910 | * ha = adapter block pointer. | |
3911 | * | |
3912 | * Returns: | |
3913 | * 0 = success | |
3914 | */ | |
3915 | int | |
e315cd28 | 3916 | qla2x00_abort_isp(scsi_qla_host_t *vha) |
1da177e4 | 3917 | { |
476e8978 | 3918 | int rval; |
1da177e4 | 3919 | uint8_t status = 0; |
e315cd28 AC |
3920 | struct qla_hw_data *ha = vha->hw; |
3921 | struct scsi_qla_host *vp; | |
73208dfd | 3922 | struct req_que *req = ha->req_q_map[0]; |
feafb7b1 | 3923 | unsigned long flags; |
1da177e4 | 3924 | |
e315cd28 | 3925 | if (vha->flags.online) { |
a9083016 | 3926 | qla2x00_abort_isp_cleanup(vha); |
1da177e4 | 3927 | |
85880801 AV |
3928 | if (unlikely(pci_channel_offline(ha->pdev) && |
3929 | ha->flags.pci_channel_io_perm_failure)) { | |
3930 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
3931 | status = 0; | |
3932 | return status; | |
3933 | } | |
3934 | ||
73208dfd | 3935 | ha->isp_ops->get_flash_version(vha, req->ring); |
30c47662 | 3936 | |
e315cd28 | 3937 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 3938 | |
e315cd28 AC |
3939 | if (!qla2x00_restart_isp(vha)) { |
3940 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
1da177e4 | 3941 | |
e315cd28 | 3942 | if (!atomic_read(&vha->loop_down_timer)) { |
1da177e4 LT |
3943 | /* |
3944 | * Issue marker command only when we are going | |
3945 | * to start the I/O . | |
3946 | */ | |
e315cd28 | 3947 | vha->marker_needed = 1; |
1da177e4 LT |
3948 | } |
3949 | ||
e315cd28 | 3950 | vha->flags.online = 1; |
1da177e4 | 3951 | |
fd34f556 | 3952 | ha->isp_ops->enable_intrs(ha); |
1da177e4 | 3953 | |
fa2a1ce5 | 3954 | ha->isp_abort_cnt = 0; |
e315cd28 | 3955 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
476e8978 | 3956 | |
6246b8a1 GM |
3957 | if (IS_QLA81XX(ha) || IS_QLA8031(ha)) |
3958 | qla2x00_get_fw_version(vha); | |
df613b96 AV |
3959 | if (ha->fce) { |
3960 | ha->flags.fce_enabled = 1; | |
3961 | memset(ha->fce, 0, | |
3962 | fce_calc_size(ha->fce_bufs)); | |
e315cd28 | 3963 | rval = qla2x00_enable_fce_trace(vha, |
df613b96 AV |
3964 | ha->fce_dma, ha->fce_bufs, ha->fce_mb, |
3965 | &ha->fce_bufs); | |
3966 | if (rval) { | |
7c3df132 | 3967 | ql_log(ql_log_warn, vha, 0x8033, |
df613b96 AV |
3968 | "Unable to reinitialize FCE " |
3969 | "(%d).\n", rval); | |
3970 | ha->flags.fce_enabled = 0; | |
3971 | } | |
3972 | } | |
436a7b11 AV |
3973 | |
3974 | if (ha->eft) { | |
3975 | memset(ha->eft, 0, EFT_SIZE); | |
e315cd28 | 3976 | rval = qla2x00_enable_eft_trace(vha, |
436a7b11 AV |
3977 | ha->eft_dma, EFT_NUM_BUFFERS); |
3978 | if (rval) { | |
7c3df132 | 3979 | ql_log(ql_log_warn, vha, 0x8034, |
436a7b11 AV |
3980 | "Unable to reinitialize EFT " |
3981 | "(%d).\n", rval); | |
3982 | } | |
3983 | } | |
1da177e4 | 3984 | } else { /* failed the ISP abort */ |
e315cd28 AC |
3985 | vha->flags.online = 1; |
3986 | if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { | |
1da177e4 | 3987 | if (ha->isp_abort_cnt == 0) { |
7c3df132 SK |
3988 | ql_log(ql_log_fatal, vha, 0x8035, |
3989 | "ISP error recover failed - " | |
3990 | "board disabled.\n"); | |
fa2a1ce5 | 3991 | /* |
1da177e4 LT |
3992 | * The next call disables the board |
3993 | * completely. | |
3994 | */ | |
e315cd28 AC |
3995 | ha->isp_ops->reset_adapter(vha); |
3996 | vha->flags.online = 0; | |
1da177e4 | 3997 | clear_bit(ISP_ABORT_RETRY, |
e315cd28 | 3998 | &vha->dpc_flags); |
1da177e4 LT |
3999 | status = 0; |
4000 | } else { /* schedule another ISP abort */ | |
4001 | ha->isp_abort_cnt--; | |
7c3df132 SK |
4002 | ql_dbg(ql_dbg_taskm, vha, 0x8020, |
4003 | "ISP abort - retry remaining %d.\n", | |
4004 | ha->isp_abort_cnt); | |
1da177e4 LT |
4005 | status = 1; |
4006 | } | |
4007 | } else { | |
4008 | ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; | |
7c3df132 SK |
4009 | ql_dbg(ql_dbg_taskm, vha, 0x8021, |
4010 | "ISP error recovery - retrying (%d) " | |
4011 | "more times.\n", ha->isp_abort_cnt); | |
e315cd28 | 4012 | set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
1da177e4 LT |
4013 | status = 1; |
4014 | } | |
4015 | } | |
fa2a1ce5 | 4016 | |
1da177e4 LT |
4017 | } |
4018 | ||
e315cd28 | 4019 | if (!status) { |
7c3df132 | 4020 | ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); |
feafb7b1 AE |
4021 | |
4022 | spin_lock_irqsave(&ha->vport_slock, flags); | |
4023 | list_for_each_entry(vp, &ha->vp_list, list) { | |
4024 | if (vp->vp_idx) { | |
4025 | atomic_inc(&vp->vref_count); | |
4026 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
4027 | ||
e315cd28 | 4028 | qla2x00_vp_abort_isp(vp); |
feafb7b1 AE |
4029 | |
4030 | spin_lock_irqsave(&ha->vport_slock, flags); | |
4031 | atomic_dec(&vp->vref_count); | |
4032 | } | |
e315cd28 | 4033 | } |
feafb7b1 AE |
4034 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
4035 | ||
e315cd28 | 4036 | } else { |
d8424f68 JP |
4037 | ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", |
4038 | __func__); | |
1da177e4 LT |
4039 | } |
4040 | ||
4041 | return(status); | |
4042 | } | |
4043 | ||
4044 | /* | |
4045 | * qla2x00_restart_isp | |
4046 | * restarts the ISP after a reset | |
4047 | * | |
4048 | * Input: | |
4049 | * ha = adapter block pointer. | |
4050 | * | |
4051 | * Returns: | |
4052 | * 0 = success | |
4053 | */ | |
4054 | static int | |
e315cd28 | 4055 | qla2x00_restart_isp(scsi_qla_host_t *vha) |
1da177e4 | 4056 | { |
c6b2fca8 | 4057 | int status = 0; |
1da177e4 | 4058 | uint32_t wait_time; |
e315cd28 | 4059 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
4060 | struct req_que *req = ha->req_q_map[0]; |
4061 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
1da177e4 LT |
4062 | |
4063 | /* If firmware needs to be loaded */ | |
e315cd28 AC |
4064 | if (qla2x00_isp_firmware(vha)) { |
4065 | vha->flags.online = 0; | |
4066 | status = ha->isp_ops->chip_diag(vha); | |
4067 | if (!status) | |
4068 | status = qla2x00_setup_chip(vha); | |
1da177e4 LT |
4069 | } |
4070 | ||
e315cd28 AC |
4071 | if (!status && !(status = qla2x00_init_rings(vha))) { |
4072 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
2533cf67 | 4073 | ha->flags.chip_reset_done = 1; |
73208dfd AC |
4074 | /* Initialize the queues in use */ |
4075 | qla25xx_init_queues(ha); | |
4076 | ||
e315cd28 AC |
4077 | status = qla2x00_fw_ready(vha); |
4078 | if (!status) { | |
7c3df132 SK |
4079 | ql_dbg(ql_dbg_taskm, vha, 0x8031, |
4080 | "Start configure loop status = %d.\n", status); | |
0107109e AV |
4081 | |
4082 | /* Issue a marker after FW becomes ready. */ | |
73208dfd | 4083 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
0107109e | 4084 | |
e315cd28 | 4085 | vha->flags.online = 1; |
1da177e4 LT |
4086 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
4087 | wait_time = 256; | |
4088 | do { | |
e315cd28 AC |
4089 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
4090 | qla2x00_configure_loop(vha); | |
1da177e4 | 4091 | wait_time--; |
e315cd28 AC |
4092 | } while (!atomic_read(&vha->loop_down_timer) && |
4093 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
4094 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
4095 | &vha->dpc_flags))); | |
1da177e4 LT |
4096 | } |
4097 | ||
4098 | /* if no cable then assume it's good */ | |
e315cd28 | 4099 | if ((vha->device_flags & DFLG_NO_CABLE)) |
1da177e4 LT |
4100 | status = 0; |
4101 | ||
7c3df132 SK |
4102 | ql_dbg(ql_dbg_taskm, vha, 0x8032, |
4103 | "Configure loop done, status = 0x%x.\n", status); | |
1da177e4 LT |
4104 | } |
4105 | return (status); | |
4106 | } | |
4107 | ||
73208dfd AC |
4108 | static int |
4109 | qla25xx_init_queues(struct qla_hw_data *ha) | |
4110 | { | |
4111 | struct rsp_que *rsp = NULL; | |
4112 | struct req_que *req = NULL; | |
4113 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
4114 | int ret = -1; | |
4115 | int i; | |
4116 | ||
2afa19a9 | 4117 | for (i = 1; i < ha->max_rsp_queues; i++) { |
73208dfd AC |
4118 | rsp = ha->rsp_q_map[i]; |
4119 | if (rsp) { | |
4120 | rsp->options &= ~BIT_0; | |
618a7523 | 4121 | ret = qla25xx_init_rsp_que(base_vha, rsp); |
73208dfd | 4122 | if (ret != QLA_SUCCESS) |
7c3df132 SK |
4123 | ql_dbg(ql_dbg_init, base_vha, 0x00ff, |
4124 | "%s Rsp que: %d init failed.\n", | |
4125 | __func__, rsp->id); | |
73208dfd | 4126 | else |
7c3df132 SK |
4127 | ql_dbg(ql_dbg_init, base_vha, 0x0100, |
4128 | "%s Rsp que: %d inited.\n", | |
4129 | __func__, rsp->id); | |
73208dfd | 4130 | } |
2afa19a9 AC |
4131 | } |
4132 | for (i = 1; i < ha->max_req_queues; i++) { | |
73208dfd AC |
4133 | req = ha->req_q_map[i]; |
4134 | if (req) { | |
29bdccbe | 4135 | /* Clear outstanding commands array. */ |
73208dfd | 4136 | req->options &= ~BIT_0; |
618a7523 | 4137 | ret = qla25xx_init_req_que(base_vha, req); |
73208dfd | 4138 | if (ret != QLA_SUCCESS) |
7c3df132 SK |
4139 | ql_dbg(ql_dbg_init, base_vha, 0x0101, |
4140 | "%s Req que: %d init failed.\n", | |
4141 | __func__, req->id); | |
73208dfd | 4142 | else |
7c3df132 SK |
4143 | ql_dbg(ql_dbg_init, base_vha, 0x0102, |
4144 | "%s Req que: %d inited.\n", | |
4145 | __func__, req->id); | |
73208dfd AC |
4146 | } |
4147 | } | |
4148 | return ret; | |
4149 | } | |
4150 | ||
1da177e4 LT |
4151 | /* |
4152 | * qla2x00_reset_adapter | |
4153 | * Reset adapter. | |
4154 | * | |
4155 | * Input: | |
4156 | * ha = adapter block pointer. | |
4157 | */ | |
abbd8870 | 4158 | void |
e315cd28 | 4159 | qla2x00_reset_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
4160 | { |
4161 | unsigned long flags = 0; | |
e315cd28 | 4162 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 4163 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 4164 | |
e315cd28 | 4165 | vha->flags.online = 0; |
fd34f556 | 4166 | ha->isp_ops->disable_intrs(ha); |
1da177e4 | 4167 | |
1da177e4 LT |
4168 | spin_lock_irqsave(&ha->hardware_lock, flags); |
4169 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
4170 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
4171 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
4172 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
4173 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
4174 | } | |
0107109e AV |
4175 | |
4176 | void | |
e315cd28 | 4177 | qla24xx_reset_adapter(scsi_qla_host_t *vha) |
0107109e AV |
4178 | { |
4179 | unsigned long flags = 0; | |
e315cd28 | 4180 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
4181 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
4182 | ||
a9083016 GM |
4183 | if (IS_QLA82XX(ha)) |
4184 | return; | |
4185 | ||
e315cd28 | 4186 | vha->flags.online = 0; |
fd34f556 | 4187 | ha->isp_ops->disable_intrs(ha); |
0107109e AV |
4188 | |
4189 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
4190 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); | |
4191 | RD_REG_DWORD(®->hccr); | |
4192 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
4193 | RD_REG_DWORD(®->hccr); | |
4194 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
09ff36d3 AV |
4195 | |
4196 | if (IS_NOPOLLING_TYPE(ha)) | |
4197 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
4198 | } |
4199 | ||
4e08df3f DM |
4200 | /* On sparc systems, obtain port and node WWN from firmware |
4201 | * properties. | |
4202 | */ | |
e315cd28 AC |
4203 | static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, |
4204 | struct nvram_24xx *nv) | |
4e08df3f DM |
4205 | { |
4206 | #ifdef CONFIG_SPARC | |
e315cd28 | 4207 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 4208 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
4209 | struct device_node *dp = pci_device_to_OF_node(pdev); |
4210 | const u8 *val; | |
4e08df3f DM |
4211 | int len; |
4212 | ||
4213 | val = of_get_property(dp, "port-wwn", &len); | |
4214 | if (val && len >= WWN_SIZE) | |
4215 | memcpy(nv->port_name, val, WWN_SIZE); | |
4216 | ||
4217 | val = of_get_property(dp, "node-wwn", &len); | |
4218 | if (val && len >= WWN_SIZE) | |
4219 | memcpy(nv->node_name, val, WWN_SIZE); | |
4220 | #endif | |
4221 | } | |
4222 | ||
0107109e | 4223 | int |
e315cd28 | 4224 | qla24xx_nvram_config(scsi_qla_host_t *vha) |
0107109e | 4225 | { |
4e08df3f | 4226 | int rval; |
0107109e AV |
4227 | struct init_cb_24xx *icb; |
4228 | struct nvram_24xx *nv; | |
4229 | uint32_t *dptr; | |
4230 | uint8_t *dptr1, *dptr2; | |
4231 | uint32_t chksum; | |
4232 | uint16_t cnt; | |
e315cd28 | 4233 | struct qla_hw_data *ha = vha->hw; |
0107109e | 4234 | |
4e08df3f | 4235 | rval = QLA_SUCCESS; |
0107109e | 4236 | icb = (struct init_cb_24xx *)ha->init_cb; |
281afe19 | 4237 | nv = ha->nvram; |
0107109e AV |
4238 | |
4239 | /* Determine NVRAM starting address. */ | |
e5b68a61 AC |
4240 | if (ha->flags.port0) { |
4241 | ha->nvram_base = FA_NVRAM_FUNC0_ADDR; | |
4242 | ha->vpd_base = FA_NVRAM_VPD0_ADDR; | |
4243 | } else { | |
0107109e | 4244 | ha->nvram_base = FA_NVRAM_FUNC1_ADDR; |
6f641790 AV |
4245 | ha->vpd_base = FA_NVRAM_VPD1_ADDR; |
4246 | } | |
e5b68a61 AC |
4247 | ha->nvram_size = sizeof(struct nvram_24xx); |
4248 | ha->vpd_size = FA_NVRAM_VPD_SIZE; | |
a9083016 GM |
4249 | if (IS_QLA82XX(ha)) |
4250 | ha->vpd_size = FA_VPD_SIZE_82XX; | |
0107109e | 4251 | |
281afe19 SJ |
4252 | /* Get VPD data into cache */ |
4253 | ha->vpd = ha->nvram + VPD_OFFSET; | |
e315cd28 | 4254 | ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, |
281afe19 SJ |
4255 | ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); |
4256 | ||
4257 | /* Get NVRAM data into cache and calculate checksum. */ | |
0107109e | 4258 | dptr = (uint32_t *)nv; |
e315cd28 | 4259 | ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, |
0107109e AV |
4260 | ha->nvram_size); |
4261 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) | |
4262 | chksum += le32_to_cpu(*dptr++); | |
4263 | ||
7c3df132 SK |
4264 | ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, |
4265 | "Contents of NVRAM\n"); | |
4266 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, | |
4267 | (uint8_t *)nv, ha->nvram_size); | |
0107109e AV |
4268 | |
4269 | /* Bad NVRAM data, set defaults parameters. */ | |
4270 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
4271 | || nv->id[3] != ' ' || | |
4272 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
4273 | /* Reset NVRAM data. */ | |
7c3df132 SK |
4274 | ql_log(ql_log_warn, vha, 0x006b, |
4275 | "Inconisistent NVRAM detected: checksum=0x%x id=%c " | |
4276 | "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); | |
4277 | ql_log(ql_log_warn, vha, 0x006c, | |
4278 | "Falling back to functioning (yet invalid -- WWPN) " | |
4279 | "defaults.\n"); | |
4e08df3f DM |
4280 | |
4281 | /* | |
4282 | * Set default initialization control block. | |
4283 | */ | |
4284 | memset(nv, 0, ha->nvram_size); | |
4285 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
4286 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
4287 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
4288 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
4289 | nv->exchange_count = __constant_cpu_to_le16(0); | |
4290 | nv->hard_address = __constant_cpu_to_le16(124); | |
4291 | nv->port_name[0] = 0x21; | |
e5b68a61 | 4292 | nv->port_name[1] = 0x00 + ha->port_no; |
4e08df3f DM |
4293 | nv->port_name[2] = 0x00; |
4294 | nv->port_name[3] = 0xe0; | |
4295 | nv->port_name[4] = 0x8b; | |
4296 | nv->port_name[5] = 0x1c; | |
4297 | nv->port_name[6] = 0x55; | |
4298 | nv->port_name[7] = 0x86; | |
4299 | nv->node_name[0] = 0x20; | |
4300 | nv->node_name[1] = 0x00; | |
4301 | nv->node_name[2] = 0x00; | |
4302 | nv->node_name[3] = 0xe0; | |
4303 | nv->node_name[4] = 0x8b; | |
4304 | nv->node_name[5] = 0x1c; | |
4305 | nv->node_name[6] = 0x55; | |
4306 | nv->node_name[7] = 0x86; | |
e315cd28 | 4307 | qla24xx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
4308 | nv->login_retry_count = __constant_cpu_to_le16(8); |
4309 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
4310 | nv->login_timeout = __constant_cpu_to_le16(0); | |
4311 | nv->firmware_options_1 = | |
4312 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
4313 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
4314 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
4315 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
4316 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
4317 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
4318 | nv->reset_delay = 5; | |
4319 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
4320 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
4321 | nv->link_down_timeout = __constant_cpu_to_le16(30); | |
4322 | ||
4323 | rval = 1; | |
0107109e AV |
4324 | } |
4325 | ||
4326 | /* Reset Initialization control block */ | |
e315cd28 | 4327 | memset(icb, 0, ha->init_cb_size); |
0107109e AV |
4328 | |
4329 | /* Copy 1st segment. */ | |
4330 | dptr1 = (uint8_t *)icb; | |
4331 | dptr2 = (uint8_t *)&nv->version; | |
4332 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
4333 | while (cnt--) | |
4334 | *dptr1++ = *dptr2++; | |
4335 | ||
4336 | icb->login_retry_count = nv->login_retry_count; | |
3ea66e28 | 4337 | icb->link_down_on_nos = nv->link_down_on_nos; |
0107109e AV |
4338 | |
4339 | /* Copy 2nd segment. */ | |
4340 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
4341 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
4342 | cnt = (uint8_t *)&icb->reserved_3 - | |
4343 | (uint8_t *)&icb->interrupt_delay_timer; | |
4344 | while (cnt--) | |
4345 | *dptr1++ = *dptr2++; | |
4346 | ||
4347 | /* | |
4348 | * Setup driver NVRAM options. | |
4349 | */ | |
e315cd28 | 4350 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), |
9bb9fcf2 | 4351 | "QLA2462"); |
0107109e | 4352 | |
5341e868 AV |
4353 | /* Use alternate WWN? */ |
4354 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
4355 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
4356 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
4357 | } | |
4358 | ||
0107109e | 4359 | /* Prepare nodename */ |
fd0e7e4d | 4360 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { |
0107109e AV |
4361 | /* |
4362 | * Firmware will apply the following mask if the nodename was | |
4363 | * not provided. | |
4364 | */ | |
4365 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
4366 | icb->node_name[0] &= 0xF0; | |
4367 | } | |
4368 | ||
4369 | /* Set host adapter parameters. */ | |
4370 | ha->flags.disable_risc_code_load = 0; | |
0c8c39af AV |
4371 | ha->flags.enable_lip_reset = 0; |
4372 | ha->flags.enable_lip_full_login = | |
4373 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
4374 | ha->flags.enable_target_reset = | |
4375 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
0107109e | 4376 | ha->flags.enable_led_scheme = 0; |
d4c760c2 | 4377 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; |
0107109e | 4378 | |
fd0e7e4d AV |
4379 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & |
4380 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
0107109e AV |
4381 | |
4382 | memcpy(ha->fw_seriallink_options24, nv->seriallink_options, | |
4383 | sizeof(ha->fw_seriallink_options24)); | |
4384 | ||
4385 | /* save HBA serial number */ | |
4386 | ha->serial0 = icb->port_name[5]; | |
4387 | ha->serial1 = icb->port_name[6]; | |
4388 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
4389 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
4390 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
0107109e | 4391 | |
bc8fb3cb AV |
4392 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); |
4393 | ||
0107109e AV |
4394 | ha->retry_count = le16_to_cpu(nv->login_retry_count); |
4395 | ||
4396 | /* Set minimum login_timeout to 4 seconds. */ | |
4397 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
4398 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
4399 | if (le16_to_cpu(nv->login_timeout) < 4) | |
4400 | nv->login_timeout = __constant_cpu_to_le16(4); | |
4401 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
c6852c4c | 4402 | icb->login_timeout = nv->login_timeout; |
0107109e | 4403 | |
00a537b8 AV |
4404 | /* Set minimum RATOV to 100 tenths of a second. */ |
4405 | ha->r_a_tov = 100; | |
0107109e AV |
4406 | |
4407 | ha->loop_reset_delay = nv->reset_delay; | |
4408 | ||
4409 | /* Link Down Timeout = 0: | |
4410 | * | |
4411 | * When Port Down timer expires we will start returning | |
4412 | * I/O's to OS with "DID_NO_CONNECT". | |
4413 | * | |
4414 | * Link Down Timeout != 0: | |
4415 | * | |
4416 | * The driver waits for the link to come up after link down | |
4417 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
4418 | */ | |
4419 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
4420 | ha->loop_down_abort_time = | |
4421 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
4422 | } else { | |
4423 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
4424 | ha->loop_down_abort_time = | |
4425 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
4426 | } | |
4427 | ||
4428 | /* Need enough time to try and get the port back. */ | |
4429 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
4430 | if (qlport_down_retry) | |
4431 | ha->port_down_retry_count = qlport_down_retry; | |
4432 | ||
4433 | /* Set login_retry_count */ | |
4434 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
4435 | if (ha->port_down_retry_count == | |
4436 | le16_to_cpu(nv->port_down_retry_count) && | |
4437 | ha->port_down_retry_count > 3) | |
4438 | ha->login_retry_count = ha->port_down_retry_count; | |
4439 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
4440 | ha->login_retry_count = ha->port_down_retry_count; | |
4441 | if (ql2xloginretrycount) | |
4442 | ha->login_retry_count = ql2xloginretrycount; | |
4443 | ||
4fdfefe5 | 4444 | /* Enable ZIO. */ |
e315cd28 | 4445 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
4446 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & |
4447 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
4448 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
4449 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
4450 | } | |
4451 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
4452 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
e315cd28 | 4453 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 4454 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d AV |
4455 | ha->zio_mode = QLA_ZIO_MODE_6; |
4456 | ||
7c3df132 | 4457 | ql_log(ql_log_info, vha, 0x006f, |
4fdfefe5 AV |
4458 | "ZIO mode %d enabled; timer delay (%d us).\n", |
4459 | ha->zio_mode, ha->zio_timer * 100); | |
4460 | ||
4461 | icb->firmware_options_2 |= cpu_to_le32( | |
4462 | (uint32_t)ha->zio_mode); | |
4463 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
e315cd28 | 4464 | vha->flags.process_response_queue = 1; |
4fdfefe5 AV |
4465 | } |
4466 | ||
4e08df3f | 4467 | if (rval) { |
7c3df132 SK |
4468 | ql_log(ql_log_warn, vha, 0x0070, |
4469 | "NVRAM configuration failed.\n"); | |
4e08df3f DM |
4470 | } |
4471 | return (rval); | |
0107109e AV |
4472 | } |
4473 | ||
413975a0 | 4474 | static int |
cbc8eb67 AV |
4475 | qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, |
4476 | uint32_t faddr) | |
d1c61909 | 4477 | { |
73208dfd | 4478 | int rval = QLA_SUCCESS; |
d1c61909 | 4479 | int segments, fragment; |
d1c61909 AV |
4480 | uint32_t *dcode, dlen; |
4481 | uint32_t risc_addr; | |
4482 | uint32_t risc_size; | |
4483 | uint32_t i; | |
e315cd28 | 4484 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4485 | struct req_que *req = ha->req_q_map[0]; |
eaac30be | 4486 | |
7c3df132 | 4487 | ql_dbg(ql_dbg_init, vha, 0x008b, |
cfb0919c | 4488 | "FW: Loading firmware from flash (%x).\n", faddr); |
eaac30be | 4489 | |
d1c61909 AV |
4490 | rval = QLA_SUCCESS; |
4491 | ||
4492 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 4493 | dcode = (uint32_t *)req->ring; |
d1c61909 AV |
4494 | *srisc_addr = 0; |
4495 | ||
4496 | /* Validate firmware image by checking version. */ | |
e315cd28 | 4497 | qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); |
d1c61909 AV |
4498 | for (i = 0; i < 4; i++) |
4499 | dcode[i] = be32_to_cpu(dcode[i]); | |
4500 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
4501 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
4502 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
4503 | dcode[3] == 0)) { | |
7c3df132 SK |
4504 | ql_log(ql_log_fatal, vha, 0x008c, |
4505 | "Unable to verify the integrity of flash firmware " | |
4506 | "image.\n"); | |
4507 | ql_log(ql_log_fatal, vha, 0x008d, | |
4508 | "Firmware data: %08x %08x %08x %08x.\n", | |
4509 | dcode[0], dcode[1], dcode[2], dcode[3]); | |
d1c61909 AV |
4510 | |
4511 | return QLA_FUNCTION_FAILED; | |
4512 | } | |
4513 | ||
4514 | while (segments && rval == QLA_SUCCESS) { | |
4515 | /* Read segment's load information. */ | |
e315cd28 | 4516 | qla24xx_read_flash_data(vha, dcode, faddr, 4); |
d1c61909 AV |
4517 | |
4518 | risc_addr = be32_to_cpu(dcode[2]); | |
4519 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
4520 | risc_size = be32_to_cpu(dcode[3]); | |
4521 | ||
4522 | fragment = 0; | |
4523 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4524 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
4525 | if (dlen > risc_size) | |
4526 | dlen = risc_size; | |
4527 | ||
7c3df132 SK |
4528 | ql_dbg(ql_dbg_init, vha, 0x008e, |
4529 | "Loading risc segment@ risc addr %x " | |
4530 | "number of dwords 0x%x offset 0x%x.\n", | |
4531 | risc_addr, dlen, faddr); | |
d1c61909 | 4532 | |
e315cd28 | 4533 | qla24xx_read_flash_data(vha, dcode, faddr, dlen); |
d1c61909 AV |
4534 | for (i = 0; i < dlen; i++) |
4535 | dcode[i] = swab32(dcode[i]); | |
4536 | ||
73208dfd | 4537 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
d1c61909 AV |
4538 | dlen); |
4539 | if (rval) { | |
7c3df132 SK |
4540 | ql_log(ql_log_fatal, vha, 0x008f, |
4541 | "Failed to load segment %d of firmware.\n", | |
4542 | fragment); | |
d1c61909 AV |
4543 | break; |
4544 | } | |
4545 | ||
4546 | faddr += dlen; | |
4547 | risc_addr += dlen; | |
4548 | risc_size -= dlen; | |
4549 | fragment++; | |
4550 | } | |
4551 | ||
4552 | /* Next segment. */ | |
4553 | segments--; | |
4554 | } | |
4555 | ||
4556 | return rval; | |
4557 | } | |
4558 | ||
d1c61909 AV |
4559 | #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/" |
4560 | ||
0107109e | 4561 | int |
e315cd28 | 4562 | qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) |
5433383e AV |
4563 | { |
4564 | int rval; | |
4565 | int i, fragment; | |
4566 | uint16_t *wcode, *fwcode; | |
4567 | uint32_t risc_addr, risc_size, fwclen, wlen, *seg; | |
4568 | struct fw_blob *blob; | |
e315cd28 | 4569 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4570 | struct req_que *req = ha->req_q_map[0]; |
5433383e AV |
4571 | |
4572 | /* Load firmware blob. */ | |
e315cd28 | 4573 | blob = qla2x00_request_firmware(vha); |
5433383e | 4574 | if (!blob) { |
7c3df132 SK |
4575 | ql_log(ql_log_info, vha, 0x0083, |
4576 | "Fimware image unavailable.\n"); | |
4577 | ql_log(ql_log_info, vha, 0x0084, | |
4578 | "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); | |
5433383e AV |
4579 | return QLA_FUNCTION_FAILED; |
4580 | } | |
4581 | ||
4582 | rval = QLA_SUCCESS; | |
4583 | ||
73208dfd | 4584 | wcode = (uint16_t *)req->ring; |
5433383e AV |
4585 | *srisc_addr = 0; |
4586 | fwcode = (uint16_t *)blob->fw->data; | |
4587 | fwclen = 0; | |
4588 | ||
4589 | /* Validate firmware image by checking version. */ | |
4590 | if (blob->fw->size < 8 * sizeof(uint16_t)) { | |
7c3df132 SK |
4591 | ql_log(ql_log_fatal, vha, 0x0085, |
4592 | "Unable to verify integrity of firmware image (%Zd).\n", | |
5433383e AV |
4593 | blob->fw->size); |
4594 | goto fail_fw_integrity; | |
4595 | } | |
4596 | for (i = 0; i < 4; i++) | |
4597 | wcode[i] = be16_to_cpu(fwcode[i + 4]); | |
4598 | if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && | |
4599 | wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && | |
4600 | wcode[2] == 0 && wcode[3] == 0)) { | |
7c3df132 SK |
4601 | ql_log(ql_log_fatal, vha, 0x0086, |
4602 | "Unable to verify integrity of firmware image.\n"); | |
4603 | ql_log(ql_log_fatal, vha, 0x0087, | |
4604 | "Firmware data: %04x %04x %04x %04x.\n", | |
4605 | wcode[0], wcode[1], wcode[2], wcode[3]); | |
5433383e AV |
4606 | goto fail_fw_integrity; |
4607 | } | |
4608 | ||
4609 | seg = blob->segs; | |
4610 | while (*seg && rval == QLA_SUCCESS) { | |
4611 | risc_addr = *seg; | |
4612 | *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; | |
4613 | risc_size = be16_to_cpu(fwcode[3]); | |
4614 | ||
4615 | /* Validate firmware image size. */ | |
4616 | fwclen += risc_size * sizeof(uint16_t); | |
4617 | if (blob->fw->size < fwclen) { | |
7c3df132 | 4618 | ql_log(ql_log_fatal, vha, 0x0088, |
5433383e | 4619 | "Unable to verify integrity of firmware image " |
7c3df132 | 4620 | "(%Zd).\n", blob->fw->size); |
5433383e AV |
4621 | goto fail_fw_integrity; |
4622 | } | |
4623 | ||
4624 | fragment = 0; | |
4625 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4626 | wlen = (uint16_t)(ha->fw_transfer_size >> 1); | |
4627 | if (wlen > risc_size) | |
4628 | wlen = risc_size; | |
7c3df132 SK |
4629 | ql_dbg(ql_dbg_init, vha, 0x0089, |
4630 | "Loading risc segment@ risc addr %x number of " | |
4631 | "words 0x%x.\n", risc_addr, wlen); | |
5433383e AV |
4632 | |
4633 | for (i = 0; i < wlen; i++) | |
4634 | wcode[i] = swab16(fwcode[i]); | |
4635 | ||
73208dfd | 4636 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
5433383e AV |
4637 | wlen); |
4638 | if (rval) { | |
7c3df132 SK |
4639 | ql_log(ql_log_fatal, vha, 0x008a, |
4640 | "Failed to load segment %d of firmware.\n", | |
4641 | fragment); | |
5433383e AV |
4642 | break; |
4643 | } | |
4644 | ||
4645 | fwcode += wlen; | |
4646 | risc_addr += wlen; | |
4647 | risc_size -= wlen; | |
4648 | fragment++; | |
4649 | } | |
4650 | ||
4651 | /* Next segment. */ | |
4652 | seg++; | |
4653 | } | |
4654 | return rval; | |
4655 | ||
4656 | fail_fw_integrity: | |
4657 | return QLA_FUNCTION_FAILED; | |
4658 | } | |
4659 | ||
eaac30be AV |
4660 | static int |
4661 | qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
0107109e AV |
4662 | { |
4663 | int rval; | |
4664 | int segments, fragment; | |
4665 | uint32_t *dcode, dlen; | |
4666 | uint32_t risc_addr; | |
4667 | uint32_t risc_size; | |
4668 | uint32_t i; | |
5433383e | 4669 | struct fw_blob *blob; |
0107109e | 4670 | uint32_t *fwcode, fwclen; |
e315cd28 | 4671 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4672 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 4673 | |
5433383e | 4674 | /* Load firmware blob. */ |
e315cd28 | 4675 | blob = qla2x00_request_firmware(vha); |
5433383e | 4676 | if (!blob) { |
7c3df132 SK |
4677 | ql_log(ql_log_warn, vha, 0x0090, |
4678 | "Fimware image unavailable.\n"); | |
4679 | ql_log(ql_log_warn, vha, 0x0091, | |
4680 | "Firmware images can be retrieved from: " | |
4681 | QLA_FW_URL ".\n"); | |
d1c61909 | 4682 | |
eaac30be | 4683 | return QLA_FUNCTION_FAILED; |
0107109e AV |
4684 | } |
4685 | ||
cfb0919c CD |
4686 | ql_dbg(ql_dbg_init, vha, 0x0092, |
4687 | "FW: Loading via request-firmware.\n"); | |
eaac30be | 4688 | |
0107109e AV |
4689 | rval = QLA_SUCCESS; |
4690 | ||
4691 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 4692 | dcode = (uint32_t *)req->ring; |
0107109e | 4693 | *srisc_addr = 0; |
5433383e | 4694 | fwcode = (uint32_t *)blob->fw->data; |
0107109e AV |
4695 | fwclen = 0; |
4696 | ||
4697 | /* Validate firmware image by checking version. */ | |
5433383e | 4698 | if (blob->fw->size < 8 * sizeof(uint32_t)) { |
7c3df132 SK |
4699 | ql_log(ql_log_fatal, vha, 0x0093, |
4700 | "Unable to verify integrity of firmware image (%Zd).\n", | |
5433383e | 4701 | blob->fw->size); |
0107109e AV |
4702 | goto fail_fw_integrity; |
4703 | } | |
4704 | for (i = 0; i < 4; i++) | |
4705 | dcode[i] = be32_to_cpu(fwcode[i + 4]); | |
4706 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
4707 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
4708 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
4709 | dcode[3] == 0)) { | |
7c3df132 SK |
4710 | ql_log(ql_log_fatal, vha, 0x0094, |
4711 | "Unable to verify integrity of firmware image (%Zd).\n", | |
4712 | blob->fw->size); | |
4713 | ql_log(ql_log_fatal, vha, 0x0095, | |
4714 | "Firmware data: %08x %08x %08x %08x.\n", | |
4715 | dcode[0], dcode[1], dcode[2], dcode[3]); | |
0107109e AV |
4716 | goto fail_fw_integrity; |
4717 | } | |
4718 | ||
4719 | while (segments && rval == QLA_SUCCESS) { | |
4720 | risc_addr = be32_to_cpu(fwcode[2]); | |
4721 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
4722 | risc_size = be32_to_cpu(fwcode[3]); | |
4723 | ||
4724 | /* Validate firmware image size. */ | |
4725 | fwclen += risc_size * sizeof(uint32_t); | |
5433383e | 4726 | if (blob->fw->size < fwclen) { |
7c3df132 | 4727 | ql_log(ql_log_fatal, vha, 0x0096, |
5433383e | 4728 | "Unable to verify integrity of firmware image " |
7c3df132 | 4729 | "(%Zd).\n", blob->fw->size); |
5433383e | 4730 | |
0107109e AV |
4731 | goto fail_fw_integrity; |
4732 | } | |
4733 | ||
4734 | fragment = 0; | |
4735 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4736 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
4737 | if (dlen > risc_size) | |
4738 | dlen = risc_size; | |
4739 | ||
7c3df132 SK |
4740 | ql_dbg(ql_dbg_init, vha, 0x0097, |
4741 | "Loading risc segment@ risc addr %x " | |
4742 | "number of dwords 0x%x.\n", risc_addr, dlen); | |
0107109e AV |
4743 | |
4744 | for (i = 0; i < dlen; i++) | |
4745 | dcode[i] = swab32(fwcode[i]); | |
4746 | ||
73208dfd | 4747 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
590f98e5 | 4748 | dlen); |
0107109e | 4749 | if (rval) { |
7c3df132 SK |
4750 | ql_log(ql_log_fatal, vha, 0x0098, |
4751 | "Failed to load segment %d of firmware.\n", | |
4752 | fragment); | |
0107109e AV |
4753 | break; |
4754 | } | |
4755 | ||
4756 | fwcode += dlen; | |
4757 | risc_addr += dlen; | |
4758 | risc_size -= dlen; | |
4759 | fragment++; | |
4760 | } | |
4761 | ||
4762 | /* Next segment. */ | |
4763 | segments--; | |
4764 | } | |
0107109e AV |
4765 | return rval; |
4766 | ||
4767 | fail_fw_integrity: | |
0107109e | 4768 | return QLA_FUNCTION_FAILED; |
0107109e | 4769 | } |
18c6c127 | 4770 | |
eaac30be AV |
4771 | int |
4772 | qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4773 | { | |
4774 | int rval; | |
4775 | ||
e337d907 AV |
4776 | if (ql2xfwloadbin == 1) |
4777 | return qla81xx_load_risc(vha, srisc_addr); | |
4778 | ||
eaac30be AV |
4779 | /* |
4780 | * FW Load priority: | |
4781 | * 1) Firmware via request-firmware interface (.bin file). | |
4782 | * 2) Firmware residing in flash. | |
4783 | */ | |
4784 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4785 | if (rval == QLA_SUCCESS) | |
4786 | return rval; | |
4787 | ||
cbc8eb67 AV |
4788 | return qla24xx_load_risc_flash(vha, srisc_addr, |
4789 | vha->hw->flt_region_fw); | |
eaac30be AV |
4790 | } |
4791 | ||
4792 | int | |
4793 | qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4794 | { | |
4795 | int rval; | |
cbc8eb67 | 4796 | struct qla_hw_data *ha = vha->hw; |
eaac30be | 4797 | |
e337d907 | 4798 | if (ql2xfwloadbin == 2) |
cbc8eb67 | 4799 | goto try_blob_fw; |
e337d907 | 4800 | |
eaac30be AV |
4801 | /* |
4802 | * FW Load priority: | |
4803 | * 1) Firmware residing in flash. | |
4804 | * 2) Firmware via request-firmware interface (.bin file). | |
cbc8eb67 | 4805 | * 3) Golden-Firmware residing in flash -- limited operation. |
eaac30be | 4806 | */ |
cbc8eb67 | 4807 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); |
eaac30be AV |
4808 | if (rval == QLA_SUCCESS) |
4809 | return rval; | |
4810 | ||
cbc8eb67 AV |
4811 | try_blob_fw: |
4812 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4813 | if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) | |
4814 | return rval; | |
4815 | ||
7c3df132 SK |
4816 | ql_log(ql_log_info, vha, 0x0099, |
4817 | "Attempting to fallback to golden firmware.\n"); | |
cbc8eb67 AV |
4818 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); |
4819 | if (rval != QLA_SUCCESS) | |
4820 | return rval; | |
4821 | ||
7c3df132 | 4822 | ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); |
cbc8eb67 | 4823 | ha->flags.running_gold_fw = 1; |
cbc8eb67 | 4824 | return rval; |
eaac30be AV |
4825 | } |
4826 | ||
18c6c127 | 4827 | void |
e315cd28 | 4828 | qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) |
18c6c127 AV |
4829 | { |
4830 | int ret, retries; | |
e315cd28 | 4831 | struct qla_hw_data *ha = vha->hw; |
18c6c127 | 4832 | |
85880801 AV |
4833 | if (ha->flags.pci_channel_io_perm_failure) |
4834 | return; | |
e428924c | 4835 | if (!IS_FWI2_CAPABLE(ha)) |
18c6c127 | 4836 | return; |
75edf81d AV |
4837 | if (!ha->fw_major_version) |
4838 | return; | |
18c6c127 | 4839 | |
e315cd28 | 4840 | ret = qla2x00_stop_firmware(vha); |
7c7f1f29 | 4841 | for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && |
b469a7cb | 4842 | ret != QLA_INVALID_COMMAND && retries ; retries--) { |
e315cd28 AC |
4843 | ha->isp_ops->reset_chip(vha); |
4844 | if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) | |
18c6c127 | 4845 | continue; |
e315cd28 | 4846 | if (qla2x00_setup_chip(vha) != QLA_SUCCESS) |
18c6c127 | 4847 | continue; |
7c3df132 SK |
4848 | ql_log(ql_log_info, vha, 0x8015, |
4849 | "Attempting retry of stop-firmware command.\n"); | |
e315cd28 | 4850 | ret = qla2x00_stop_firmware(vha); |
18c6c127 AV |
4851 | } |
4852 | } | |
2c3dfe3f SJ |
4853 | |
4854 | int | |
e315cd28 | 4855 | qla24xx_configure_vhba(scsi_qla_host_t *vha) |
2c3dfe3f SJ |
4856 | { |
4857 | int rval = QLA_SUCCESS; | |
0b91d116 | 4858 | int rval2; |
2c3dfe3f | 4859 | uint16_t mb[MAILBOX_REGISTER_COUNT]; |
e315cd28 AC |
4860 | struct qla_hw_data *ha = vha->hw; |
4861 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
67c2e93a AC |
4862 | struct req_que *req; |
4863 | struct rsp_que *rsp; | |
2c3dfe3f | 4864 | |
e315cd28 | 4865 | if (!vha->vp_idx) |
2c3dfe3f SJ |
4866 | return -EINVAL; |
4867 | ||
e315cd28 | 4868 | rval = qla2x00_fw_ready(base_vha); |
7163ea81 | 4869 | if (ha->flags.cpu_affinity_enabled) |
67c2e93a AC |
4870 | req = ha->req_q_map[0]; |
4871 | else | |
4872 | req = vha->req; | |
4873 | rsp = req->rsp; | |
4874 | ||
2c3dfe3f | 4875 | if (rval == QLA_SUCCESS) { |
e315cd28 | 4876 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
73208dfd | 4877 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
2c3dfe3f SJ |
4878 | } |
4879 | ||
e315cd28 | 4880 | vha->flags.management_server_logged_in = 0; |
2c3dfe3f SJ |
4881 | |
4882 | /* Login to SNS first */ | |
0b91d116 CD |
4883 | rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, |
4884 | BIT_1); | |
4885 | if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { | |
4886 | if (rval2 == QLA_MEMORY_ALLOC_FAILED) | |
4887 | ql_dbg(ql_dbg_init, vha, 0x0120, | |
4888 | "Failed SNS login: loop_id=%x, rval2=%d\n", | |
4889 | NPH_SNS, rval2); | |
4890 | else | |
4891 | ql_dbg(ql_dbg_init, vha, 0x0103, | |
4892 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " | |
4893 | "mb[2]=%x mb[6]=%x mb[7]=%x.\n", | |
4894 | NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); | |
2c3dfe3f SJ |
4895 | return (QLA_FUNCTION_FAILED); |
4896 | } | |
4897 | ||
e315cd28 AC |
4898 | atomic_set(&vha->loop_down_timer, 0); |
4899 | atomic_set(&vha->loop_state, LOOP_UP); | |
4900 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
4901 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
4902 | rval = qla2x00_loop_resync(base_vha); | |
2c3dfe3f SJ |
4903 | |
4904 | return rval; | |
4905 | } | |
4d4df193 HK |
4906 | |
4907 | /* 84XX Support **************************************************************/ | |
4908 | ||
4909 | static LIST_HEAD(qla_cs84xx_list); | |
4910 | static DEFINE_MUTEX(qla_cs84xx_mutex); | |
4911 | ||
4912 | static struct qla_chip_state_84xx * | |
e315cd28 | 4913 | qla84xx_get_chip(struct scsi_qla_host *vha) |
4d4df193 HK |
4914 | { |
4915 | struct qla_chip_state_84xx *cs84xx; | |
e315cd28 | 4916 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4917 | |
4918 | mutex_lock(&qla_cs84xx_mutex); | |
4919 | ||
4920 | /* Find any shared 84xx chip. */ | |
4921 | list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { | |
4922 | if (cs84xx->bus == ha->pdev->bus) { | |
4923 | kref_get(&cs84xx->kref); | |
4924 | goto done; | |
4925 | } | |
4926 | } | |
4927 | ||
4928 | cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); | |
4929 | if (!cs84xx) | |
4930 | goto done; | |
4931 | ||
4932 | kref_init(&cs84xx->kref); | |
4933 | spin_lock_init(&cs84xx->access_lock); | |
4934 | mutex_init(&cs84xx->fw_update_mutex); | |
4935 | cs84xx->bus = ha->pdev->bus; | |
4936 | ||
4937 | list_add_tail(&cs84xx->list, &qla_cs84xx_list); | |
4938 | done: | |
4939 | mutex_unlock(&qla_cs84xx_mutex); | |
4940 | return cs84xx; | |
4941 | } | |
4942 | ||
4943 | static void | |
4944 | __qla84xx_chip_release(struct kref *kref) | |
4945 | { | |
4946 | struct qla_chip_state_84xx *cs84xx = | |
4947 | container_of(kref, struct qla_chip_state_84xx, kref); | |
4948 | ||
4949 | mutex_lock(&qla_cs84xx_mutex); | |
4950 | list_del(&cs84xx->list); | |
4951 | mutex_unlock(&qla_cs84xx_mutex); | |
4952 | kfree(cs84xx); | |
4953 | } | |
4954 | ||
4955 | void | |
e315cd28 | 4956 | qla84xx_put_chip(struct scsi_qla_host *vha) |
4d4df193 | 4957 | { |
e315cd28 | 4958 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4959 | if (ha->cs84xx) |
4960 | kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); | |
4961 | } | |
4962 | ||
4963 | static int | |
e315cd28 | 4964 | qla84xx_init_chip(scsi_qla_host_t *vha) |
4d4df193 HK |
4965 | { |
4966 | int rval; | |
4967 | uint16_t status[2]; | |
e315cd28 | 4968 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4969 | |
4970 | mutex_lock(&ha->cs84xx->fw_update_mutex); | |
4971 | ||
e315cd28 | 4972 | rval = qla84xx_verify_chip(vha, status); |
4d4df193 HK |
4973 | |
4974 | mutex_unlock(&ha->cs84xx->fw_update_mutex); | |
4975 | ||
4976 | return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: | |
4977 | QLA_SUCCESS; | |
4978 | } | |
3a03eb79 AV |
4979 | |
4980 | /* 81XX Support **************************************************************/ | |
4981 | ||
4982 | int | |
4983 | qla81xx_nvram_config(scsi_qla_host_t *vha) | |
4984 | { | |
4985 | int rval; | |
4986 | struct init_cb_81xx *icb; | |
4987 | struct nvram_81xx *nv; | |
4988 | uint32_t *dptr; | |
4989 | uint8_t *dptr1, *dptr2; | |
4990 | uint32_t chksum; | |
4991 | uint16_t cnt; | |
4992 | struct qla_hw_data *ha = vha->hw; | |
4993 | ||
4994 | rval = QLA_SUCCESS; | |
4995 | icb = (struct init_cb_81xx *)ha->init_cb; | |
4996 | nv = ha->nvram; | |
4997 | ||
4998 | /* Determine NVRAM starting address. */ | |
4999 | ha->nvram_size = sizeof(struct nvram_81xx); | |
3a03eb79 | 5000 | ha->vpd_size = FA_NVRAM_VPD_SIZE; |
3a03eb79 AV |
5001 | |
5002 | /* Get VPD data into cache */ | |
5003 | ha->vpd = ha->nvram + VPD_OFFSET; | |
3d79038f AV |
5004 | ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, |
5005 | ha->vpd_size); | |
3a03eb79 AV |
5006 | |
5007 | /* Get NVRAM data into cache and calculate checksum. */ | |
3d79038f | 5008 | ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, |
3a03eb79 | 5009 | ha->nvram_size); |
3d79038f | 5010 | dptr = (uint32_t *)nv; |
3a03eb79 AV |
5011 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) |
5012 | chksum += le32_to_cpu(*dptr++); | |
5013 | ||
7c3df132 SK |
5014 | ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, |
5015 | "Contents of NVRAM:\n"); | |
5016 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, | |
5017 | (uint8_t *)nv, ha->nvram_size); | |
3a03eb79 AV |
5018 | |
5019 | /* Bad NVRAM data, set defaults parameters. */ | |
5020 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
5021 | || nv->id[3] != ' ' || | |
5022 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
5023 | /* Reset NVRAM data. */ | |
7c3df132 SK |
5024 | ql_log(ql_log_info, vha, 0x0073, |
5025 | "Inconisistent NVRAM detected: checksum=0x%x id=%c " | |
5026 | "version=0x%x.\n", chksum, nv->id[0], | |
3a03eb79 | 5027 | le16_to_cpu(nv->nvram_version)); |
7c3df132 SK |
5028 | ql_log(ql_log_info, vha, 0x0074, |
5029 | "Falling back to functioning (yet invalid -- WWPN) " | |
5030 | "defaults.\n"); | |
3a03eb79 AV |
5031 | |
5032 | /* | |
5033 | * Set default initialization control block. | |
5034 | */ | |
5035 | memset(nv, 0, ha->nvram_size); | |
5036 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
5037 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
5038 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
5039 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
5040 | nv->exchange_count = __constant_cpu_to_le16(0); | |
5041 | nv->port_name[0] = 0x21; | |
e5b68a61 | 5042 | nv->port_name[1] = 0x00 + ha->port_no; |
3a03eb79 AV |
5043 | nv->port_name[2] = 0x00; |
5044 | nv->port_name[3] = 0xe0; | |
5045 | nv->port_name[4] = 0x8b; | |
5046 | nv->port_name[5] = 0x1c; | |
5047 | nv->port_name[6] = 0x55; | |
5048 | nv->port_name[7] = 0x86; | |
5049 | nv->node_name[0] = 0x20; | |
5050 | nv->node_name[1] = 0x00; | |
5051 | nv->node_name[2] = 0x00; | |
5052 | nv->node_name[3] = 0xe0; | |
5053 | nv->node_name[4] = 0x8b; | |
5054 | nv->node_name[5] = 0x1c; | |
5055 | nv->node_name[6] = 0x55; | |
5056 | nv->node_name[7] = 0x86; | |
5057 | nv->login_retry_count = __constant_cpu_to_le16(8); | |
5058 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
5059 | nv->login_timeout = __constant_cpu_to_le16(0); | |
5060 | nv->firmware_options_1 = | |
5061 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
5062 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
5063 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
5064 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
5065 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
5066 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
5067 | nv->reset_delay = 5; | |
5068 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
5069 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
6246b8a1 | 5070 | nv->link_down_timeout = __constant_cpu_to_le16(180); |
eeebcc92 | 5071 | nv->enode_mac[0] = 0x00; |
6246b8a1 GM |
5072 | nv->enode_mac[1] = 0xC0; |
5073 | nv->enode_mac[2] = 0xDD; | |
3a03eb79 AV |
5074 | nv->enode_mac[3] = 0x04; |
5075 | nv->enode_mac[4] = 0x05; | |
e5b68a61 | 5076 | nv->enode_mac[5] = 0x06 + ha->port_no; |
3a03eb79 AV |
5077 | |
5078 | rval = 1; | |
5079 | } | |
5080 | ||
5081 | /* Reset Initialization control block */ | |
773120e4 | 5082 | memset(icb, 0, ha->init_cb_size); |
3a03eb79 AV |
5083 | |
5084 | /* Copy 1st segment. */ | |
5085 | dptr1 = (uint8_t *)icb; | |
5086 | dptr2 = (uint8_t *)&nv->version; | |
5087 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
5088 | while (cnt--) | |
5089 | *dptr1++ = *dptr2++; | |
5090 | ||
5091 | icb->login_retry_count = nv->login_retry_count; | |
5092 | ||
5093 | /* Copy 2nd segment. */ | |
5094 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
5095 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
5096 | cnt = (uint8_t *)&icb->reserved_5 - | |
5097 | (uint8_t *)&icb->interrupt_delay_timer; | |
5098 | while (cnt--) | |
5099 | *dptr1++ = *dptr2++; | |
5100 | ||
5101 | memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); | |
5102 | /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ | |
5103 | if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { | |
69e5f1ea AV |
5104 | icb->enode_mac[0] = 0x00; |
5105 | icb->enode_mac[1] = 0xC0; | |
5106 | icb->enode_mac[2] = 0xDD; | |
3a03eb79 AV |
5107 | icb->enode_mac[3] = 0x04; |
5108 | icb->enode_mac[4] = 0x05; | |
e5b68a61 | 5109 | icb->enode_mac[5] = 0x06 + ha->port_no; |
3a03eb79 AV |
5110 | } |
5111 | ||
b64b0e8f AV |
5112 | /* Use extended-initialization control block. */ |
5113 | memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); | |
5114 | ||
3a03eb79 AV |
5115 | /* |
5116 | * Setup driver NVRAM options. | |
5117 | */ | |
5118 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), | |
a9083016 | 5119 | "QLE8XXX"); |
3a03eb79 AV |
5120 | |
5121 | /* Use alternate WWN? */ | |
5122 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
5123 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
5124 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
5125 | } | |
5126 | ||
5127 | /* Prepare nodename */ | |
5128 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { | |
5129 | /* | |
5130 | * Firmware will apply the following mask if the nodename was | |
5131 | * not provided. | |
5132 | */ | |
5133 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
5134 | icb->node_name[0] &= 0xF0; | |
5135 | } | |
5136 | ||
5137 | /* Set host adapter parameters. */ | |
5138 | ha->flags.disable_risc_code_load = 0; | |
5139 | ha->flags.enable_lip_reset = 0; | |
5140 | ha->flags.enable_lip_full_login = | |
5141 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
5142 | ha->flags.enable_target_reset = | |
5143 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
5144 | ha->flags.enable_led_scheme = 0; | |
5145 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; | |
5146 | ||
5147 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & | |
5148 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
5149 | ||
5150 | /* save HBA serial number */ | |
5151 | ha->serial0 = icb->port_name[5]; | |
5152 | ha->serial1 = icb->port_name[6]; | |
5153 | ha->serial2 = icb->port_name[7]; | |
5154 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); | |
5155 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
5156 | ||
5157 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
5158 | ||
5159 | ha->retry_count = le16_to_cpu(nv->login_retry_count); | |
5160 | ||
5161 | /* Set minimum login_timeout to 4 seconds. */ | |
5162 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
5163 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
5164 | if (le16_to_cpu(nv->login_timeout) < 4) | |
5165 | nv->login_timeout = __constant_cpu_to_le16(4); | |
5166 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
5167 | icb->login_timeout = nv->login_timeout; | |
5168 | ||
5169 | /* Set minimum RATOV to 100 tenths of a second. */ | |
5170 | ha->r_a_tov = 100; | |
5171 | ||
5172 | ha->loop_reset_delay = nv->reset_delay; | |
5173 | ||
5174 | /* Link Down Timeout = 0: | |
5175 | * | |
5176 | * When Port Down timer expires we will start returning | |
5177 | * I/O's to OS with "DID_NO_CONNECT". | |
5178 | * | |
5179 | * Link Down Timeout != 0: | |
5180 | * | |
5181 | * The driver waits for the link to come up after link down | |
5182 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
5183 | */ | |
5184 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
5185 | ha->loop_down_abort_time = | |
5186 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
5187 | } else { | |
5188 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
5189 | ha->loop_down_abort_time = | |
5190 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
5191 | } | |
5192 | ||
5193 | /* Need enough time to try and get the port back. */ | |
5194 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
5195 | if (qlport_down_retry) | |
5196 | ha->port_down_retry_count = qlport_down_retry; | |
5197 | ||
5198 | /* Set login_retry_count */ | |
5199 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
5200 | if (ha->port_down_retry_count == | |
5201 | le16_to_cpu(nv->port_down_retry_count) && | |
5202 | ha->port_down_retry_count > 3) | |
5203 | ha->login_retry_count = ha->port_down_retry_count; | |
5204 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
5205 | ha->login_retry_count = ha->port_down_retry_count; | |
5206 | if (ql2xloginretrycount) | |
5207 | ha->login_retry_count = ql2xloginretrycount; | |
5208 | ||
6246b8a1 GM |
5209 | /* if not running MSI-X we need handshaking on interrupts */ |
5210 | if (!vha->hw->flags.msix_enabled && IS_QLA83XX(ha)) | |
5211 | icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_22); | |
5212 | ||
3a03eb79 AV |
5213 | /* Enable ZIO. */ |
5214 | if (!vha->flags.init_done) { | |
5215 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & | |
5216 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
5217 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
5218 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
5219 | } | |
5220 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
5221 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
5222 | vha->flags.process_response_queue = 0; | |
5223 | if (ha->zio_mode != QLA_ZIO_DISABLED) { | |
5224 | ha->zio_mode = QLA_ZIO_MODE_6; | |
5225 | ||
7c3df132 | 5226 | ql_log(ql_log_info, vha, 0x0075, |
3a03eb79 | 5227 | "ZIO mode %d enabled; timer delay (%d us).\n", |
7c3df132 SK |
5228 | ha->zio_mode, |
5229 | ha->zio_timer * 100); | |
3a03eb79 AV |
5230 | |
5231 | icb->firmware_options_2 |= cpu_to_le32( | |
5232 | (uint32_t)ha->zio_mode); | |
5233 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
5234 | vha->flags.process_response_queue = 1; | |
5235 | } | |
5236 | ||
5237 | if (rval) { | |
7c3df132 SK |
5238 | ql_log(ql_log_warn, vha, 0x0076, |
5239 | "NVRAM configuration failed.\n"); | |
3a03eb79 AV |
5240 | } |
5241 | return (rval); | |
5242 | } | |
5243 | ||
a9083016 GM |
5244 | int |
5245 | qla82xx_restart_isp(scsi_qla_host_t *vha) | |
5246 | { | |
5247 | int status, rval; | |
5248 | uint32_t wait_time; | |
5249 | struct qla_hw_data *ha = vha->hw; | |
5250 | struct req_que *req = ha->req_q_map[0]; | |
5251 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
5252 | struct scsi_qla_host *vp; | |
feafb7b1 | 5253 | unsigned long flags; |
a9083016 GM |
5254 | |
5255 | status = qla2x00_init_rings(vha); | |
5256 | if (!status) { | |
5257 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
5258 | ha->flags.chip_reset_done = 1; | |
5259 | ||
5260 | status = qla2x00_fw_ready(vha); | |
5261 | if (!status) { | |
7c3df132 SK |
5262 | ql_log(ql_log_info, vha, 0x803c, |
5263 | "Start configure loop, status =%d.\n", status); | |
a9083016 GM |
5264 | |
5265 | /* Issue a marker after FW becomes ready. */ | |
5266 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); | |
5267 | ||
5268 | vha->flags.online = 1; | |
5269 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ | |
5270 | wait_time = 256; | |
5271 | do { | |
5272 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
5273 | qla2x00_configure_loop(vha); | |
5274 | wait_time--; | |
5275 | } while (!atomic_read(&vha->loop_down_timer) && | |
5276 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) && | |
5277 | wait_time && | |
5278 | (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))); | |
5279 | } | |
5280 | ||
5281 | /* if no cable then assume it's good */ | |
5282 | if ((vha->device_flags & DFLG_NO_CABLE)) | |
5283 | status = 0; | |
5284 | ||
cfb0919c | 5285 | ql_log(ql_log_info, vha, 0x8000, |
7c3df132 | 5286 | "Configure loop done, status = 0x%x.\n", status); |
a9083016 GM |
5287 | } |
5288 | ||
5289 | if (!status) { | |
5290 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
5291 | ||
5292 | if (!atomic_read(&vha->loop_down_timer)) { | |
5293 | /* | |
5294 | * Issue marker command only when we are going | |
5295 | * to start the I/O . | |
5296 | */ | |
5297 | vha->marker_needed = 1; | |
5298 | } | |
5299 | ||
5300 | vha->flags.online = 1; | |
5301 | ||
5302 | ha->isp_ops->enable_intrs(ha); | |
5303 | ||
5304 | ha->isp_abort_cnt = 0; | |
5305 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
5306 | ||
53296788 | 5307 | /* Update the firmware version */ |
3173167f | 5308 | status = qla82xx_check_md_needed(vha); |
53296788 | 5309 | |
a9083016 GM |
5310 | if (ha->fce) { |
5311 | ha->flags.fce_enabled = 1; | |
5312 | memset(ha->fce, 0, | |
5313 | fce_calc_size(ha->fce_bufs)); | |
5314 | rval = qla2x00_enable_fce_trace(vha, | |
5315 | ha->fce_dma, ha->fce_bufs, ha->fce_mb, | |
5316 | &ha->fce_bufs); | |
5317 | if (rval) { | |
cfb0919c | 5318 | ql_log(ql_log_warn, vha, 0x8001, |
7c3df132 SK |
5319 | "Unable to reinitialize FCE (%d).\n", |
5320 | rval); | |
a9083016 GM |
5321 | ha->flags.fce_enabled = 0; |
5322 | } | |
5323 | } | |
5324 | ||
5325 | if (ha->eft) { | |
5326 | memset(ha->eft, 0, EFT_SIZE); | |
5327 | rval = qla2x00_enable_eft_trace(vha, | |
5328 | ha->eft_dma, EFT_NUM_BUFFERS); | |
5329 | if (rval) { | |
cfb0919c | 5330 | ql_log(ql_log_warn, vha, 0x8010, |
7c3df132 SK |
5331 | "Unable to reinitialize EFT (%d).\n", |
5332 | rval); | |
a9083016 GM |
5333 | } |
5334 | } | |
a9083016 GM |
5335 | } |
5336 | ||
5337 | if (!status) { | |
cfb0919c | 5338 | ql_dbg(ql_dbg_taskm, vha, 0x8011, |
7c3df132 | 5339 | "qla82xx_restart_isp succeeded.\n"); |
feafb7b1 AE |
5340 | |
5341 | spin_lock_irqsave(&ha->vport_slock, flags); | |
5342 | list_for_each_entry(vp, &ha->vp_list, list) { | |
5343 | if (vp->vp_idx) { | |
5344 | atomic_inc(&vp->vref_count); | |
5345 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
5346 | ||
a9083016 | 5347 | qla2x00_vp_abort_isp(vp); |
feafb7b1 AE |
5348 | |
5349 | spin_lock_irqsave(&ha->vport_slock, flags); | |
5350 | atomic_dec(&vp->vref_count); | |
5351 | } | |
a9083016 | 5352 | } |
feafb7b1 AE |
5353 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
5354 | ||
a9083016 | 5355 | } else { |
cfb0919c | 5356 | ql_log(ql_log_warn, vha, 0x8016, |
7c3df132 | 5357 | "qla82xx_restart_isp **** FAILED ****.\n"); |
a9083016 GM |
5358 | } |
5359 | ||
5360 | return status; | |
5361 | } | |
5362 | ||
3a03eb79 | 5363 | void |
ae97c91e | 5364 | qla81xx_update_fw_options(scsi_qla_host_t *vha) |
3a03eb79 | 5365 | { |
ae97c91e AV |
5366 | struct qla_hw_data *ha = vha->hw; |
5367 | ||
5368 | if (!ql2xetsenable) | |
5369 | return; | |
5370 | ||
5371 | /* Enable ETS Burst. */ | |
5372 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
5373 | ha->fw_options[2] |= BIT_9; | |
5374 | qla2x00_set_fw_options(vha, ha->fw_options); | |
3a03eb79 | 5375 | } |
09ff701a SR |
5376 | |
5377 | /* | |
5378 | * qla24xx_get_fcp_prio | |
5379 | * Gets the fcp cmd priority value for the logged in port. | |
5380 | * Looks for a match of the port descriptors within | |
5381 | * each of the fcp prio config entries. If a match is found, | |
5382 | * the tag (priority) value is returned. | |
5383 | * | |
5384 | * Input: | |
21090cbe | 5385 | * vha = scsi host structure pointer. |
09ff701a SR |
5386 | * fcport = port structure pointer. |
5387 | * | |
5388 | * Return: | |
6c452a45 | 5389 | * non-zero (if found) |
f28a0a96 | 5390 | * -1 (if not found) |
09ff701a SR |
5391 | * |
5392 | * Context: | |
5393 | * Kernel context | |
5394 | */ | |
f28a0a96 | 5395 | static int |
09ff701a SR |
5396 | qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) |
5397 | { | |
5398 | int i, entries; | |
5399 | uint8_t pid_match, wwn_match; | |
f28a0a96 | 5400 | int priority; |
09ff701a SR |
5401 | uint32_t pid1, pid2; |
5402 | uint64_t wwn1, wwn2; | |
5403 | struct qla_fcp_prio_entry *pri_entry; | |
5404 | struct qla_hw_data *ha = vha->hw; | |
5405 | ||
5406 | if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) | |
f28a0a96 | 5407 | return -1; |
09ff701a | 5408 | |
f28a0a96 | 5409 | priority = -1; |
09ff701a SR |
5410 | entries = ha->fcp_prio_cfg->num_entries; |
5411 | pri_entry = &ha->fcp_prio_cfg->entry[0]; | |
5412 | ||
5413 | for (i = 0; i < entries; i++) { | |
5414 | pid_match = wwn_match = 0; | |
5415 | ||
5416 | if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { | |
5417 | pri_entry++; | |
5418 | continue; | |
5419 | } | |
5420 | ||
5421 | /* check source pid for a match */ | |
5422 | if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { | |
5423 | pid1 = pri_entry->src_pid & INVALID_PORT_ID; | |
5424 | pid2 = vha->d_id.b24 & INVALID_PORT_ID; | |
5425 | if (pid1 == INVALID_PORT_ID) | |
5426 | pid_match++; | |
5427 | else if (pid1 == pid2) | |
5428 | pid_match++; | |
5429 | } | |
5430 | ||
5431 | /* check destination pid for a match */ | |
5432 | if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { | |
5433 | pid1 = pri_entry->dst_pid & INVALID_PORT_ID; | |
5434 | pid2 = fcport->d_id.b24 & INVALID_PORT_ID; | |
5435 | if (pid1 == INVALID_PORT_ID) | |
5436 | pid_match++; | |
5437 | else if (pid1 == pid2) | |
5438 | pid_match++; | |
5439 | } | |
5440 | ||
5441 | /* check source WWN for a match */ | |
5442 | if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { | |
5443 | wwn1 = wwn_to_u64(vha->port_name); | |
5444 | wwn2 = wwn_to_u64(pri_entry->src_wwpn); | |
5445 | if (wwn2 == (uint64_t)-1) | |
5446 | wwn_match++; | |
5447 | else if (wwn1 == wwn2) | |
5448 | wwn_match++; | |
5449 | } | |
5450 | ||
5451 | /* check destination WWN for a match */ | |
5452 | if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { | |
5453 | wwn1 = wwn_to_u64(fcport->port_name); | |
5454 | wwn2 = wwn_to_u64(pri_entry->dst_wwpn); | |
5455 | if (wwn2 == (uint64_t)-1) | |
5456 | wwn_match++; | |
5457 | else if (wwn1 == wwn2) | |
5458 | wwn_match++; | |
5459 | } | |
5460 | ||
5461 | if (pid_match == 2 || wwn_match == 2) { | |
5462 | /* Found a matching entry */ | |
5463 | if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) | |
5464 | priority = pri_entry->tag; | |
5465 | break; | |
5466 | } | |
5467 | ||
5468 | pri_entry++; | |
5469 | } | |
5470 | ||
5471 | return priority; | |
5472 | } | |
5473 | ||
5474 | /* | |
5475 | * qla24xx_update_fcport_fcp_prio | |
5476 | * Activates fcp priority for the logged in fc port | |
5477 | * | |
5478 | * Input: | |
21090cbe | 5479 | * vha = scsi host structure pointer. |
09ff701a SR |
5480 | * fcp = port structure pointer. |
5481 | * | |
5482 | * Return: | |
5483 | * QLA_SUCCESS or QLA_FUNCTION_FAILED | |
5484 | * | |
5485 | * Context: | |
5486 | * Kernel context. | |
5487 | */ | |
5488 | int | |
21090cbe | 5489 | qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) |
09ff701a SR |
5490 | { |
5491 | int ret; | |
f28a0a96 | 5492 | int priority; |
09ff701a SR |
5493 | uint16_t mb[5]; |
5494 | ||
21090cbe MI |
5495 | if (fcport->port_type != FCT_TARGET || |
5496 | fcport->loop_id == FC_NO_LOOP_ID) | |
09ff701a SR |
5497 | return QLA_FUNCTION_FAILED; |
5498 | ||
21090cbe | 5499 | priority = qla24xx_get_fcp_prio(vha, fcport); |
f28a0a96 AV |
5500 | if (priority < 0) |
5501 | return QLA_FUNCTION_FAILED; | |
5502 | ||
a00f6296 SK |
5503 | if (IS_QLA82XX(vha->hw)) { |
5504 | fcport->fcp_prio = priority & 0xf; | |
5505 | return QLA_SUCCESS; | |
5506 | } | |
5507 | ||
21090cbe | 5508 | ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); |
cfb0919c CD |
5509 | if (ret == QLA_SUCCESS) { |
5510 | if (fcport->fcp_prio != priority) | |
5511 | ql_dbg(ql_dbg_user, vha, 0x709e, | |
5512 | "Updated FCP_CMND priority - value=%d loop_id=%d " | |
5513 | "port_id=%02x%02x%02x.\n", priority, | |
5514 | fcport->loop_id, fcport->d_id.b.domain, | |
5515 | fcport->d_id.b.area, fcport->d_id.b.al_pa); | |
a00f6296 | 5516 | fcport->fcp_prio = priority & 0xf; |
cfb0919c | 5517 | } else |
7c3df132 | 5518 | ql_dbg(ql_dbg_user, vha, 0x704f, |
cfb0919c CD |
5519 | "Unable to update FCP_CMND priority - ret=0x%x for " |
5520 | "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, | |
5521 | fcport->d_id.b.domain, fcport->d_id.b.area, | |
5522 | fcport->d_id.b.al_pa); | |
09ff701a SR |
5523 | return ret; |
5524 | } | |
5525 | ||
5526 | /* | |
5527 | * qla24xx_update_all_fcp_prio | |
5528 | * Activates fcp priority for all the logged in ports | |
5529 | * | |
5530 | * Input: | |
5531 | * ha = adapter block pointer. | |
5532 | * | |
5533 | * Return: | |
5534 | * QLA_SUCCESS or QLA_FUNCTION_FAILED | |
5535 | * | |
5536 | * Context: | |
5537 | * Kernel context. | |
5538 | */ | |
5539 | int | |
5540 | qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) | |
5541 | { | |
5542 | int ret; | |
5543 | fc_port_t *fcport; | |
5544 | ||
5545 | ret = QLA_FUNCTION_FAILED; | |
5546 | /* We need to set priority for all logged in ports */ | |
5547 | list_for_each_entry(fcport, &vha->vp_fcports, list) | |
5548 | ret = qla24xx_update_fcport_fcp_prio(vha, fcport); | |
5549 | ||
5550 | return ret; | |
5551 | } |