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[SCSI] qla2xxx: Return sysfs error codes appropriate to conditions.
[mirror_ubuntu-bionic-kernel.git] / drivers / scsi / qla2xxx / qla_init.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
07e264b7 3 * Copyright (c) 2003-2011 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
73208dfd 8#include "qla_gbl.h"
1da177e4
LT		 9
10#include <linux/delay.h>
5a0e3ad6 11#include <linux/slab.h>
0107109e 12#include <linux/vmalloc.h>
1da177e4
LT		 13
14#include "qla_devtbl.h"
15
4e08df3f
DM		 16#ifdef CONFIG_SPARC
17#include <asm/prom.h>
4e08df3f
DM		 18#endif
19
1da177e4
LT		 20/*
21* QLogic ISP2x00 Hardware Support Function Prototypes.
22*/
1da177e4 23static int qla2x00_isp_firmware(scsi_qla_host_t *);
1da177e4 24static int qla2x00_setup_chip(scsi_qla_host_t *);
1da177e4
LT		 25static int qla2x00_init_rings(scsi_qla_host_t *);
26static int qla2x00_fw_ready(scsi_qla_host_t *);
27static int qla2x00_configure_hba(scsi_qla_host_t *);
1da177e4
LT		 28static int qla2x00_configure_loop(scsi_qla_host_t *);
29static int qla2x00_configure_local_loop(scsi_qla_host_t *);
1da177e4
LT		 30static int qla2x00_configure_fabric(scsi_qla_host_t *);
31static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
32static int qla2x00_device_resync(scsi_qla_host_t *);
33static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
34 uint16_t *);
1da177e4
LT		 35
36static int qla2x00_restart_isp(scsi_qla_host_t *);
1da177e4 37
4d4df193
HK		 38static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
39static int qla84xx_init_chip(scsi_qla_host_t *);
73208dfd 40static int qla25xx_init_queues(struct qla_hw_data *);
4d4df193 41
ac280b67
AV		 42/* SRB Extensions ---------------------------------------------------------- */
43
44static void
45qla2x00_ctx_sp_timeout(unsigned long __data)
46{
47 srb_t *sp = (srb_t *)__data;
48 struct srb_ctx *ctx;
4916392b 49 struct srb_iocb *iocb;
ac280b67
AV		 50 fc_port_t *fcport = sp->fcport;
51 struct qla_hw_data *ha = fcport->vha->hw;
52 struct req_que *req;
53 unsigned long flags;
54
55 spin_lock_irqsave(&ha->hardware_lock, flags);
56 req = ha->req_q_map[0];
57 req->outstanding_cmds[sp->handle] = NULL;
58 ctx = sp->ctx;
4916392b
MI		 59 iocb = ctx->u.iocb_cmd;
60 iocb->timeout(sp);
4916392b 61 iocb->free(sp);
6ac52608 62 spin_unlock_irqrestore(&ha->hardware_lock, flags);
ac280b67
AV		 63}
64
3dbe756a 65static void
ac280b67
AV		 66qla2x00_ctx_sp_free(srb_t *sp)
67{
68 struct srb_ctx *ctx = sp->ctx;
4916392b 69 struct srb_iocb *iocb = ctx->u.iocb_cmd;
feafb7b1 70 struct scsi_qla_host *vha = sp->fcport->vha;
ac280b67 71
4d97cc53 72 del_timer(&iocb->timer);
4916392b 73 kfree(iocb);
ac280b67
AV		 74 kfree(ctx);
75 mempool_free(sp, sp->fcport->vha->hw->srb_mempool);
feafb7b1
AE		 76
77 QLA_VHA_MARK_NOT_BUSY(vha);
ac280b67
AV		 78}
79
80inline srb_t *
81qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size,
82 unsigned long tmo)
83{
feafb7b1 84 srb_t *sp = NULL;
ac280b67
AV		 85 struct qla_hw_data *ha = vha->hw;
86 struct srb_ctx *ctx;
4916392b 87 struct srb_iocb *iocb;
feafb7b1
AE		 88 uint8_t bail;
89
90 QLA_VHA_MARK_BUSY(vha, bail);
91 if (bail)
92 return NULL;
ac280b67
AV		 93
94 sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL);
95 if (!sp)
96 goto done;
97 ctx = kzalloc(size, GFP_KERNEL);
98 if (!ctx) {
99 mempool_free(sp, ha->srb_mempool);
4916392b
MI		 100 sp = NULL;
101 goto done;
102 }
103 iocb = kzalloc(sizeof(struct srb_iocb), GFP_KERNEL);
104 if (!iocb) {
105 mempool_free(sp, ha->srb_mempool);
106 sp = NULL;
107 kfree(ctx);
ac280b67
AV		 108 goto done;
109 }
110
111 memset(sp, 0, sizeof(*sp));
112 sp->fcport = fcport;
113 sp->ctx = ctx;
4916392b
MI		 114 ctx->u.iocb_cmd = iocb;
115 iocb->free = qla2x00_ctx_sp_free;
ac280b67 116
4916392b 117 init_timer(&iocb->timer);
ac280b67
AV		 118 if (!tmo)
119 goto done;
4916392b
MI		 120 iocb->timer.expires = jiffies + tmo * HZ;
121 iocb->timer.data = (unsigned long)sp;
122 iocb->timer.function = qla2x00_ctx_sp_timeout;
123 add_timer(&iocb->timer);
ac280b67 124done:
feafb7b1
AE		 125 if (!sp)
126 QLA_VHA_MARK_NOT_BUSY(vha);
ac280b67
AV		 127 return sp;
128}
129
130/* Asynchronous Login/Logout Routines -------------------------------------- */
131
5b91490e
AV		 132static inline unsigned long
133qla2x00_get_async_timeout(struct scsi_qla_host *vha)
134{
135 unsigned long tmo;
136 struct qla_hw_data *ha = vha->hw;
137
138 /* Firmware should use switch negotiated r_a_tov for timeout. */
139 tmo = ha->r_a_tov / 10 * 2;
140 if (!IS_FWI2_CAPABLE(ha)) {
141 /*
142 * Except for earlier ISPs where the timeout is seeded from the
143 * initialization control block.
144 */
145 tmo = ha->login_timeout;
146 }
147 return tmo;
148}
ac280b67
AV		 149
150static void
3822263e 151qla2x00_async_iocb_timeout(srb_t *sp)
ac280b67
AV		 152{
153 fc_port_t *fcport = sp->fcport;
4916392b 154 struct srb_ctx *ctx = sp->ctx;
ac280b67 155
7c3df132
SK		 156 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
157 "Async-%s timeout - portid=%02x%02x%02x.\n",
158 ctx->name, fcport->d_id.b.domain, fcport->d_id.b.area,
159 fcport->d_id.b.al_pa);
ac280b67 160
5ff1d584 161 fcport->flags &= ~FCF_ASYNC_SENT;
6ac52608
AV		 162 if (ctx->type == SRB_LOGIN_CMD) {
163 struct srb_iocb *lio = ctx->u.iocb_cmd;
ac280b67 164 qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
6ac52608
AV		 165 /* Retry as needed. */
166 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
167 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
168 QLA_LOGIO_LOGIN_RETRIED : 0;
169 qla2x00_post_async_login_done_work(fcport->vha, fcport,
170 lio->u.logio.data);
171 }
ac280b67
AV		 172}
173
99b0bec7
AV		 174static void
175qla2x00_async_login_ctx_done(srb_t *sp)
176{
4916392b
MI		 177 struct srb_ctx *ctx = sp->ctx;
178 struct srb_iocb *lio = ctx->u.iocb_cmd;
99b0bec7
AV		 179
180 qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
4916392b
MI		 181 lio->u.logio.data);
182 lio->free(sp);
99b0bec7
AV		 183}
184
ac280b67
AV		 185int
186qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
187 uint16_t *data)
188{
ac280b67 189 srb_t *sp;
4916392b
MI		 190 struct srb_ctx *ctx;
191 struct srb_iocb *lio;
ac280b67
AV		 192 int rval;
193
194 rval = QLA_FUNCTION_FAILED;
4916392b 195 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
5b91490e 196 qla2x00_get_async_timeout(vha) + 2);
ac280b67
AV		 197 if (!sp)
198 goto done;
199
4916392b
MI		 200 ctx = sp->ctx;
201 ctx->type = SRB_LOGIN_CMD;
202 ctx->name = "login";
203 lio = ctx->u.iocb_cmd;
3822263e 204 lio->timeout = qla2x00_async_iocb_timeout;
4916392b
MI		 205 lio->done = qla2x00_async_login_ctx_done;
206 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
ac280b67 207 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
4916392b 208 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
ac280b67
AV		 209 rval = qla2x00_start_sp(sp);
210 if (rval != QLA_SUCCESS)
211 goto done_free_sp;
212
7c3df132
SK		 213 ql_dbg(ql_dbg_disc, vha, 0x2072,
214 "Async-login - loopid=%x portid=%02x%02x%02x retries=%d.\n",
215 fcport->loop_id, fcport->d_id.b.domain, fcport->d_id.b.area,
216 fcport->d_id.b.al_pa, fcport->login_retry);
ac280b67
AV		 217 return rval;
218
219done_free_sp:
4916392b 220 lio->free(sp);
ac280b67
AV		 221done:
222 return rval;
223}
224
99b0bec7
AV		 225static void
226qla2x00_async_logout_ctx_done(srb_t *sp)
227{
4916392b
MI		 228 struct srb_ctx *ctx = sp->ctx;
229 struct srb_iocb *lio = ctx->u.iocb_cmd;
99b0bec7
AV		 230
231 qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
4916392b
MI		 232 lio->u.logio.data);
233 lio->free(sp);
99b0bec7
AV		 234}
235
ac280b67
AV		 236int
237qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
238{
ac280b67 239 srb_t *sp;
4916392b
MI		 240 struct srb_ctx *ctx;
241 struct srb_iocb *lio;
ac280b67
AV		 242 int rval;
243
244 rval = QLA_FUNCTION_FAILED;
4916392b 245 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
5b91490e 246 qla2x00_get_async_timeout(vha) + 2);
ac280b67
AV		 247 if (!sp)
248 goto done;
249
4916392b
MI		 250 ctx = sp->ctx;
251 ctx->type = SRB_LOGOUT_CMD;
252 ctx->name = "logout";
253 lio = ctx->u.iocb_cmd;
3822263e 254 lio->timeout = qla2x00_async_iocb_timeout;
4916392b 255 lio->done = qla2x00_async_logout_ctx_done;
ac280b67
AV		 256 rval = qla2x00_start_sp(sp);
257 if (rval != QLA_SUCCESS)
258 goto done_free_sp;
259
7c3df132
SK		 260 ql_dbg(ql_dbg_disc, vha, 0x2070,
261 "Async-logout - loop-id=%x portid=%02x%02x%02x.\n",
262 fcport->loop_id, fcport->d_id.b.domain, fcport->d_id.b.area,
263 fcport->d_id.b.al_pa);
ac280b67
AV		 264 return rval;
265
266done_free_sp:
4916392b 267 lio->free(sp);
ac280b67
AV		 268done:
269 return rval;
270}
271
5ff1d584
AV		 272static void
273qla2x00_async_adisc_ctx_done(srb_t *sp)
274{
4916392b
MI		 275 struct srb_ctx *ctx = sp->ctx;
276 struct srb_iocb *lio = ctx->u.iocb_cmd;
5ff1d584
AV		 277
278 qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
4916392b
MI		 279 lio->u.logio.data);
280 lio->free(sp);
5ff1d584
AV		 281}
282
283int
284qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
285 uint16_t *data)
286{
5ff1d584 287 srb_t *sp;
4916392b
MI		 288 struct srb_ctx *ctx;
289 struct srb_iocb *lio;
5ff1d584
AV		 290 int rval;
291
292 rval = QLA_FUNCTION_FAILED;
4916392b 293 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
5b91490e 294 qla2x00_get_async_timeout(vha) + 2);
5ff1d584
AV		 295 if (!sp)
296 goto done;
297
4916392b
MI		 298 ctx = sp->ctx;
299 ctx->type = SRB_ADISC_CMD;
300 ctx->name = "adisc";
301 lio = ctx->u.iocb_cmd;
3822263e 302 lio->timeout = qla2x00_async_iocb_timeout;
4916392b 303 lio->done = qla2x00_async_adisc_ctx_done;
5ff1d584 304 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
4916392b 305 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
5ff1d584
AV		 306 rval = qla2x00_start_sp(sp);
307 if (rval != QLA_SUCCESS)
308 goto done_free_sp;
309
7c3df132
SK		 310 ql_dbg(ql_dbg_disc, vha, 0x206f,
311 "Async-adisc - loopid=%x portid=%02x%02x%02x.\n",
312 fcport->loop_id, fcport->d_id.b.domain, fcport->d_id.b.area,
313 fcport->d_id.b.al_pa);
5ff1d584
AV		 314 return rval;
315
316done_free_sp:
4916392b 317 lio->free(sp);
5ff1d584
AV		 318done:
319 return rval;
320}
321
3822263e
MI		 322static void
323qla2x00_async_tm_cmd_ctx_done(srb_t *sp)
324{
325 struct srb_ctx *ctx = sp->ctx;
326 struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd;
327
328 qla2x00_async_tm_cmd_done(sp->fcport->vha, sp->fcport, iocb);
329 iocb->free(sp);
330}
331
332int
333qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
334 uint32_t tag)
335{
336 struct scsi_qla_host *vha = fcport->vha;
3822263e
MI		 337 srb_t *sp;
338 struct srb_ctx *ctx;
339 struct srb_iocb *tcf;
340 int rval;
341
342 rval = QLA_FUNCTION_FAILED;
343 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
5b91490e 344 qla2x00_get_async_timeout(vha) + 2);
3822263e
MI		 345 if (!sp)
346 goto done;
347
348 ctx = sp->ctx;
349 ctx->type = SRB_TM_CMD;
350 ctx->name = "tmf";
351 tcf = ctx->u.iocb_cmd;
352 tcf->u.tmf.flags = flags;
353 tcf->u.tmf.lun = lun;
354 tcf->u.tmf.data = tag;
355 tcf->timeout = qla2x00_async_iocb_timeout;
356 tcf->done = qla2x00_async_tm_cmd_ctx_done;
357
358 rval = qla2x00_start_sp(sp);
359 if (rval != QLA_SUCCESS)
360 goto done_free_sp;
361
7c3df132
SK		 362 ql_dbg(ql_dbg_taskm, vha, 0x802f,
363 "Async-tmf loop-id=%x portid=%02x%02x%02x.\n",
364 fcport->loop_id, fcport->d_id.b.domain, fcport->d_id.b.area,
365 fcport->d_id.b.al_pa);
3822263e
MI		 366 return rval;
367
368done_free_sp:
369 tcf->free(sp);
370done:
371 return rval;
372}
373
4916392b 374void
ac280b67
AV		 375qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
376 uint16_t *data)
377{
378 int rval;
ac280b67
AV		 379
380 switch (data[0]) {
381 case MBS_COMMAND_COMPLETE:
a4f92a32
AV		 382 /*
383 * Driver must validate login state - If PRLI not complete,
384 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
385 * requests.
386 */
387 rval = qla2x00_get_port_database(vha, fcport, 0);
388 if (rval != QLA_SUCCESS) {
389 qla2x00_post_async_logout_work(vha, fcport, NULL);
390 qla2x00_post_async_login_work(vha, fcport, NULL);
391 break;
392 }
99b0bec7 393 if (fcport->flags & FCF_FCP2_DEVICE) {
5ff1d584
AV		 394 qla2x00_post_async_adisc_work(vha, fcport, data);
395 break;
99b0bec7
AV		 396 }
397 qla2x00_update_fcport(vha, fcport);
ac280b67
AV		 398 break;
399 case MBS_COMMAND_ERROR:
5ff1d584 400 fcport->flags &= ~FCF_ASYNC_SENT;
ac280b67
AV		 401 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
402 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
403 else
80d79440 404 qla2x00_mark_device_lost(vha, fcport, 1, 0);
ac280b67
AV		 405 break;
406 case MBS_PORT_ID_USED:
407 fcport->loop_id = data[1];
6ac52608 408 qla2x00_post_async_logout_work(vha, fcport, NULL);
ac280b67
AV		 409 qla2x00_post_async_login_work(vha, fcport, NULL);
410 break;
411 case MBS_LOOP_ID_USED:
412 fcport->loop_id++;
413 rval = qla2x00_find_new_loop_id(vha, fcport);
414 if (rval != QLA_SUCCESS) {
5ff1d584 415 fcport->flags &= ~FCF_ASYNC_SENT;
80d79440 416 qla2x00_mark_device_lost(vha, fcport, 1, 0);
ac280b67
AV		 417 break;
418 }
419 qla2x00_post_async_login_work(vha, fcport, NULL);
420 break;
421 }
4916392b 422 return;
ac280b67
AV		 423}
424
4916392b 425void
ac280b67
AV		 426qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
427 uint16_t *data)
428{
429 qla2x00_mark_device_lost(vha, fcport, 1, 0);
4916392b 430 return;
ac280b67
AV		 431}
432
4916392b 433void
5ff1d584
AV		 434qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
435 uint16_t *data)
436{
437 if (data[0] == MBS_COMMAND_COMPLETE) {
438 qla2x00_update_fcport(vha, fcport);
439
4916392b 440 return;
5ff1d584
AV		 441 }
442
443 /* Retry login. */
444 fcport->flags &= ~FCF_ASYNC_SENT;
445 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
446 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
447 else
80d79440 448 qla2x00_mark_device_lost(vha, fcport, 1, 0);
5ff1d584 449
4916392b 450 return;
5ff1d584
AV		 451}
452
3822263e
MI		 453void
454qla2x00_async_tm_cmd_done(struct scsi_qla_host *vha, fc_port_t *fcport,
455 struct srb_iocb *iocb)
456{
457 int rval;
458 uint32_t flags;
459 uint16_t lun;
460
461 flags = iocb->u.tmf.flags;
462 lun = (uint16_t)iocb->u.tmf.lun;
463
464 /* Issue Marker IOCB */
d94d10e7
GM		 465 rval = qla2x00_marker(vha, vha->hw->req_q_map[0],
466 vha->hw->rsp_q_map[0], fcport->loop_id, lun,
3822263e
MI		 467 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
468
469 if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) {
7c3df132
SK		 470 ql_dbg(ql_dbg_taskm, vha, 0x8030,
471 "TM IOCB failed (%x).\n", rval);
3822263e
MI		 472 }
473
474 return;
475}
476
1da177e4
LT		 477/****************************************************************************/
478/* QLogic ISP2x00 Hardware Support Functions. */
479/****************************************************************************/
480
481/*
482* qla2x00_initialize_adapter
483* Initialize board.
484*
485* Input:
486* ha = adapter block pointer.
487*
488* Returns:
489* 0 = success
490*/
491int
e315cd28 492qla2x00_initialize_adapter(scsi_qla_host_t *vha)
1da177e4
LT		 493{
494 int rval;
e315cd28 495 struct qla_hw_data *ha = vha->hw;
73208dfd 496 struct req_que *req = ha->req_q_map[0];
2533cf67 497
1da177e4 498 /* Clear adapter flags. */
e315cd28 499 vha->flags.online = 0;
2533cf67 500 ha->flags.chip_reset_done = 0;
e315cd28 501 vha->flags.reset_active = 0;
85880801
AV		 502 ha->flags.pci_channel_io_perm_failure = 0;
503 ha->flags.eeh_busy = 0;
794a5691 504 ha->flags.thermal_supported = 1;
e315cd28
AC		 505 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
506 atomic_set(&vha->loop_state, LOOP_DOWN);
507 vha->device_flags = DFLG_NO_CABLE;
508 vha->dpc_flags = 0;
509 vha->flags.management_server_logged_in = 0;
510 vha->marker_needed = 0;
1da177e4
LT		 511 ha->isp_abort_cnt = 0;
512 ha->beacon_blink_led = 0;
513
73208dfd
AC		 514 set_bit(0, ha->req_qid_map);
515 set_bit(0, ha->rsp_qid_map);
516
7c3df132
SK		 517 ql_log(ql_log_info, vha, 0x0040,
518 "Configuring PCI space...\n");
e315cd28 519 rval = ha->isp_ops->pci_config(vha);
1da177e4 520 if (rval) {
7c3df132
SK		 521 ql_log(ql_log_warn, vha, 0x0044,
522 "Unable to configure PCI space.\n");
1da177e4
LT		 523 return (rval);
524 }
525
e315cd28 526 ha->isp_ops->reset_chip(vha);
1da177e4 527
e315cd28 528 rval = qla2xxx_get_flash_info(vha);
c00d8994 529 if (rval) {
7c3df132
SK		 530 ql_log(ql_log_fatal, vha, 0x004f,
531 "Unable to validate FLASH data.\n");
c00d8994
AV		 532 return (rval);
533 }
534
73208dfd 535 ha->isp_ops->get_flash_version(vha, req->ring);
7c3df132
SK		 536 ql_log(ql_log_info, vha, 0x0061,
537 "Configure NVRAM parameters...\n");
0107109e 538
e315cd28 539 ha->isp_ops->nvram_config(vha);
1da177e4 540
d4c760c2
AV		 541 if (ha->flags.disable_serdes) {
542 /* Mask HBA via NVRAM settings? */
7c3df132
SK		 543 ql_log(ql_log_info, vha, 0x0077,
544 "Masking HBA WWPN "
d4c760c2 545 "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
e315cd28
AC		 546 vha->port_name[0], vha->port_name[1],
547 vha->port_name[2], vha->port_name[3],
548 vha->port_name[4], vha->port_name[5],
549 vha->port_name[6], vha->port_name[7]);
d4c760c2
AV		 550 return QLA_FUNCTION_FAILED;
551 }
552
7c3df132
SK		 553 ql_log(ql_log_info, vha, 0x0078,
554 "Verifying loaded RISC code...\n");
1da177e4 555
e315cd28
AC		 556 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
557 rval = ha->isp_ops->chip_diag(vha);
d19044c3
AV		 558 if (rval)
559 return (rval);
e315cd28 560 rval = qla2x00_setup_chip(vha);
d19044c3
AV		 561 if (rval)
562 return (rval);
1da177e4 563 }
a9083016 564
4d4df193 565 if (IS_QLA84XX(ha)) {
e315cd28 566 ha->cs84xx = qla84xx_get_chip(vha);
4d4df193 567 if (!ha->cs84xx) {
7c3df132 568 ql_log(ql_log_warn, vha, 0x00d0,
4d4df193
HK		 569 "Unable to configure ISP84XX.\n");
570 return QLA_FUNCTION_FAILED;
571 }
572 }
e315cd28 573 rval = qla2x00_init_rings(vha);
2533cf67 574 ha->flags.chip_reset_done = 1;
1da177e4 575
9a069e19 576 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
6c452a45 577 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
9a069e19
GM		 578 rval = qla84xx_init_chip(vha);
579 if (rval != QLA_SUCCESS) {
7c3df132
SK		 580 ql_log(ql_log_warn, vha, 0x00d4,
581 "Unable to initialize ISP84XX.\n");
9a069e19
GM		 582 qla84xx_put_chip(vha);
583 }
584 }
585
2f0f3f4f
MI		 586 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
587 qla24xx_read_fcp_prio_cfg(vha);
09ff701a 588
1da177e4
LT		 589 return (rval);
590}
591
592/**
abbd8870 593 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
1da177e4
LT		 594 * @ha: HA context
595 *
596 * Returns 0 on success.
597 */
abbd8870 598int
e315cd28 599qla2100_pci_config(scsi_qla_host_t *vha)
1da177e4 600{
a157b101 601 uint16_t w;
abbd8870 602 unsigned long flags;
e315cd28 603 struct qla_hw_data *ha = vha->hw;
3d71644c 604 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 605
1da177e4 606 pci_set_master(ha->pdev);
af6177d8 607 pci_try_set_mwi(ha->pdev);
1da177e4 608
1da177e4 609 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 610 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
abbd8870
AV		 611 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
612
737faece 613 pci_disable_rom(ha->pdev);
1da177e4
LT		 614
615 /* Get PCI bus information. */
616 spin_lock_irqsave(&ha->hardware_lock, flags);
3d71644c 617 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
1da177e4
LT		 618 spin_unlock_irqrestore(&ha->hardware_lock, flags);
619
abbd8870
AV		 620 return QLA_SUCCESS;
621}
1da177e4 622
abbd8870
AV		 623/**
624 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
625 * @ha: HA context
626 *
627 * Returns 0 on success.
628 */
629int
e315cd28 630qla2300_pci_config(scsi_qla_host_t *vha)
abbd8870 631{
a157b101 632 uint16_t w;
abbd8870
AV		 633 unsigned long flags = 0;
634 uint32_t cnt;
e315cd28 635 struct qla_hw_data *ha = vha->hw;
3d71644c 636 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 637
abbd8870 638 pci_set_master(ha->pdev);
af6177d8 639 pci_try_set_mwi(ha->pdev);
1da177e4 640
abbd8870 641 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 642 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
1da177e4 643
abbd8870
AV		 644 if (IS_QLA2322(ha) || IS_QLA6322(ha))
645 w &= ~PCI_COMMAND_INTX_DISABLE;
a157b101 646 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
1da177e4 647
abbd8870
AV		 648 /*
649 * If this is a 2300 card and not 2312, reset the
650 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
651 * the 2310 also reports itself as a 2300 so we need to get the
652 * fb revision level -- a 6 indicates it really is a 2300 and
653 * not a 2310.
654 */
655 if (IS_QLA2300(ha)) {
656 spin_lock_irqsave(&ha->hardware_lock, flags);
1da177e4 657
abbd8870 658 /* Pause RISC. */
3d71644c 659 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
abbd8870 660 for (cnt = 0; cnt < 30000; cnt++) {
3d71644c 661 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
abbd8870 662 break;
1da177e4 663
abbd8870
AV		 664 udelay(10);
665 }
1da177e4 666
abbd8870 667 /* Select FPM registers. */
3d71644c
AV		 668 WRT_REG_WORD(&reg->ctrl_status, 0x20);
669 RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 670
671 /* Get the fb rev level */
3d71644c 672 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
abbd8870
AV		 673
674 if (ha->fb_rev == FPM_2300)
a157b101 675 pci_clear_mwi(ha->pdev);
abbd8870
AV		 676
677 /* Deselect FPM registers. */
3d71644c
AV		 678 WRT_REG_WORD(&reg->ctrl_status, 0x0);
679 RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 680
681 /* Release RISC module. */
3d71644c 682 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
abbd8870 683 for (cnt = 0; cnt < 30000; cnt++) {
3d71644c 684 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
abbd8870
AV		 685 break;
686
687 udelay(10);
1da177e4 688 }
1da177e4 689
abbd8870
AV		 690 spin_unlock_irqrestore(&ha->hardware_lock, flags);
691 }
1da177e4 692
abbd8870
AV		 693 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
694
737faece 695 pci_disable_rom(ha->pdev);
1da177e4 696
abbd8870
AV		 697 /* Get PCI bus information. */
698 spin_lock_irqsave(&ha->hardware_lock, flags);
3d71644c 699 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 700 spin_unlock_irqrestore(&ha->hardware_lock, flags);
701
702 return QLA_SUCCESS;
1da177e4
LT		 703}
704
0107109e
AV		 705/**
706 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
707 * @ha: HA context
708 *
709 * Returns 0 on success.
710 */
711int
e315cd28 712qla24xx_pci_config(scsi_qla_host_t *vha)
0107109e 713{
a157b101 714 uint16_t w;
0107109e 715 unsigned long flags = 0;
e315cd28 716 struct qla_hw_data *ha = vha->hw;
0107109e 717 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
0107109e
AV		 718
719 pci_set_master(ha->pdev);
af6177d8 720 pci_try_set_mwi(ha->pdev);
0107109e
AV		 721
722 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 723 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
0107109e
AV		 724 w &= ~PCI_COMMAND_INTX_DISABLE;
725 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
726
727 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
728
729 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
f85ec187
AV		 730 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
731 pcix_set_mmrbc(ha->pdev, 2048);
0107109e
AV		 732
733 /* PCIe -- adjust Maximum Read Request Size (2048). */
f85ec187
AV		 734 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
735 pcie_set_readrq(ha->pdev, 2048);
0107109e 736
737faece 737 pci_disable_rom(ha->pdev);
0107109e 738
44c10138 739 ha->chip_revision = ha->pdev->revision;
a8488abe 740
0107109e
AV		 741 /* Get PCI bus information. */
742 spin_lock_irqsave(&ha->hardware_lock, flags);
743 ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
744 spin_unlock_irqrestore(&ha->hardware_lock, flags);
745
746 return QLA_SUCCESS;
747}
748
c3a2f0df
AV		 749/**
750 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
751 * @ha: HA context
752 *
753 * Returns 0 on success.
754 */
755int
e315cd28 756qla25xx_pci_config(scsi_qla_host_t *vha)
c3a2f0df
AV		 757{
758 uint16_t w;
e315cd28 759 struct qla_hw_data *ha = vha->hw;
c3a2f0df
AV		 760
761 pci_set_master(ha->pdev);
762 pci_try_set_mwi(ha->pdev);
763
764 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
765 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
766 w &= ~PCI_COMMAND_INTX_DISABLE;
767 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
768
769 /* PCIe -- adjust Maximum Read Request Size (2048). */
770 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
771 pcie_set_readrq(ha->pdev, 2048);
772
737faece 773 pci_disable_rom(ha->pdev);
c3a2f0df
AV		 774
775 ha->chip_revision = ha->pdev->revision;
776
777 return QLA_SUCCESS;
778}
779
1da177e4
LT		 780/**
781 * qla2x00_isp_firmware() - Choose firmware image.
782 * @ha: HA context
783 *
784 * Returns 0 on success.
785 */
786static int
e315cd28 787qla2x00_isp_firmware(scsi_qla_host_t *vha)
1da177e4
LT		 788{
789 int rval;
42e421b1
AV		 790 uint16_t loop_id, topo, sw_cap;
791 uint8_t domain, area, al_pa;
e315cd28 792 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 793
794 /* Assume loading risc code */
fa2a1ce5 795 rval = QLA_FUNCTION_FAILED;
1da177e4
LT		 796
797 if (ha->flags.disable_risc_code_load) {
7c3df132 798 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
1da177e4
LT		 799
800 /* Verify checksum of loaded RISC code. */
e315cd28 801 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
42e421b1
AV		 802 if (rval == QLA_SUCCESS) {
803 /* And, verify we are not in ROM code. */
e315cd28 804 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
42e421b1
AV		 805 &area, &domain, &topo, &sw_cap);
806 }
1da177e4
LT		 807 }
808
7c3df132
SK		 809 if (rval)
810 ql_dbg(ql_dbg_init, vha, 0x007a,
811 "**** Load RISC code ****.\n");
1da177e4
LT		 812
813 return (rval);
814}
815
816/**
817 * qla2x00_reset_chip() - Reset ISP chip.
818 * @ha: HA context
819 *
820 * Returns 0 on success.
821 */
abbd8870 822void
e315cd28 823qla2x00_reset_chip(scsi_qla_host_t *vha)
1da177e4
LT		 824{
825 unsigned long flags = 0;
e315cd28 826 struct qla_hw_data *ha = vha->hw;
3d71644c 827 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 828 uint32_t cnt;
1da177e4
LT		 829 uint16_t cmd;
830
85880801
AV		 831 if (unlikely(pci_channel_offline(ha->pdev)))
832 return;
833
fd34f556 834 ha->isp_ops->disable_intrs(ha);
1da177e4
LT		 835
836 spin_lock_irqsave(&ha->hardware_lock, flags);
837
838 /* Turn off master enable */
839 cmd = 0;
840 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
841 cmd &= ~PCI_COMMAND_MASTER;
842 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
843
844 if (!IS_QLA2100(ha)) {
845 /* Pause RISC. */
846 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
847 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
848 for (cnt = 0; cnt < 30000; cnt++) {
849 if ((RD_REG_WORD(&reg->hccr) &
850 HCCR_RISC_PAUSE) != 0)
851 break;
852 udelay(100);
853 }
854 } else {
855 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
856 udelay(10);
857 }
858
859 /* Select FPM registers. */
860 WRT_REG_WORD(&reg->ctrl_status, 0x20);
861 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
862
863 /* FPM Soft Reset. */
864 WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
865 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
866
867 /* Toggle Fpm Reset. */
868 if (!IS_QLA2200(ha)) {
869 WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
870 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
871 }
872
873 /* Select frame buffer registers. */
874 WRT_REG_WORD(&reg->ctrl_status, 0x10);
875 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
876
877 /* Reset frame buffer FIFOs. */
878 if (IS_QLA2200(ha)) {
879 WRT_FB_CMD_REG(ha, reg, 0xa000);
880 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
881 } else {
882 WRT_FB_CMD_REG(ha, reg, 0x00fc);
883
884 /* Read back fb_cmd until zero or 3 seconds max */
885 for (cnt = 0; cnt < 3000; cnt++) {
886 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
887 break;
888 udelay(100);
889 }
890 }
891
892 /* Select RISC module registers. */
893 WRT_REG_WORD(&reg->ctrl_status, 0);
894 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
895
896 /* Reset RISC processor. */
897 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
898 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
899
900 /* Release RISC processor. */
901 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
902 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
903 }
904
905 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
906 WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
907
908 /* Reset ISP chip. */
909 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
910
911 /* Wait for RISC to recover from reset. */
912 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
913 /*
914 * It is necessary to for a delay here since the card doesn't
915 * respond to PCI reads during a reset. On some architectures
916 * this will result in an MCA.
917 */
918 udelay(20);
919 for (cnt = 30000; cnt; cnt--) {
920 if ((RD_REG_WORD(&reg->ctrl_status) &
921 CSR_ISP_SOFT_RESET) == 0)
922 break;
923 udelay(100);
924 }
925 } else
926 udelay(10);
927
928 /* Reset RISC processor. */
929 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
930
931 WRT_REG_WORD(&reg->semaphore, 0);
932
933 /* Release RISC processor. */
934 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
935 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
936
937 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
938 for (cnt = 0; cnt < 30000; cnt++) {
ffb39f03 939 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
1da177e4 940 break;
1da177e4
LT		 941
942 udelay(100);
943 }
944 } else
945 udelay(100);
946
947 /* Turn on master enable */
948 cmd |= PCI_COMMAND_MASTER;
949 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
950
951 /* Disable RISC pause on FPM parity error. */
952 if (!IS_QLA2100(ha)) {
953 WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
954 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
955 }
956
957 spin_unlock_irqrestore(&ha->hardware_lock, flags);
958}
959
b1d46989
MI		 960/**
961 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
962 *
963 * Returns 0 on success.
964 */
965int
966qla81xx_reset_mpi(scsi_qla_host_t *vha)
967{
968 uint16_t mb[4] = {0x1010, 0, 1, 0};
969
970 return qla81xx_write_mpi_register(vha, mb);
971}
972
0107109e 973/**
88c26663 974 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
0107109e
AV		 975 * @ha: HA context
976 *
977 * Returns 0 on success.
978 */
88c26663 979static inline void
e315cd28 980qla24xx_reset_risc(scsi_qla_host_t *vha)
0107109e
AV		 981{
982 unsigned long flags = 0;
e315cd28 983 struct qla_hw_data *ha = vha->hw;
0107109e
AV		 984 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
985 uint32_t cnt, d2;
335a1cc9 986 uint16_t wd;
b1d46989 987 static int abts_cnt; /* ISP abort retry counts */
0107109e 988
0107109e
AV		 989 spin_lock_irqsave(&ha->hardware_lock, flags);
990
991 /* Reset RISC. */
992 WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
993 for (cnt = 0; cnt < 30000; cnt++) {
994 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
995 break;
996
997 udelay(10);
998 }
999
1000 WRT_REG_DWORD(&reg->ctrl_status,
1001 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
335a1cc9 1002 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
88c26663 1003
335a1cc9 1004 udelay(100);
88c26663 1005 /* Wait for firmware to complete NVRAM accesses. */
88c26663
AV		 1006 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1007 for (cnt = 10000 ; cnt && d2; cnt--) {
1008 udelay(5);
1009 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1010 barrier();
1011 }
1012
335a1cc9 1013 /* Wait for soft-reset to complete. */
0107109e
AV		 1014 d2 = RD_REG_DWORD(&reg->ctrl_status);
1015 for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
1016 udelay(5);
1017 d2 = RD_REG_DWORD(&reg->ctrl_status);
1018 barrier();
1019 }
1020
b1d46989
MI		 1021 /* If required, do an MPI FW reset now */
1022 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
1023 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
1024 if (++abts_cnt < 5) {
1025 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1026 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
1027 } else {
1028 /*
1029 * We exhausted the ISP abort retries. We have to
1030 * set the board offline.
1031 */
1032 abts_cnt = 0;
1033 vha->flags.online = 0;
1034 }
1035 }
1036 }
1037
0107109e
AV		 1038 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
1039 RD_REG_DWORD(&reg->hccr);
1040
1041 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
1042 RD_REG_DWORD(&reg->hccr);
1043
1044 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
1045 RD_REG_DWORD(&reg->hccr);
1046
1047 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1048 for (cnt = 6000000 ; cnt && d2; cnt--) {
1049 udelay(5);
1050 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1051 barrier();
1052 }
1053
1054 spin_unlock_irqrestore(&ha->hardware_lock, flags);
124f85e6
AV		 1055
1056 if (IS_NOPOLLING_TYPE(ha))
1057 ha->isp_ops->enable_intrs(ha);
0107109e
AV		 1058}
1059
88c26663
AV		 1060/**
1061 * qla24xx_reset_chip() - Reset ISP24xx chip.
1062 * @ha: HA context
1063 *
1064 * Returns 0 on success.
1065 */
1066void
e315cd28 1067qla24xx_reset_chip(scsi_qla_host_t *vha)
88c26663 1068{
e315cd28 1069 struct qla_hw_data *ha = vha->hw;
85880801
AV		 1070
1071 if (pci_channel_offline(ha->pdev) &&
1072 ha->flags.pci_channel_io_perm_failure) {
1073 return;
1074 }
1075
fd34f556 1076 ha->isp_ops->disable_intrs(ha);
88c26663
AV		 1077
1078 /* Perform RISC reset. */
e315cd28 1079 qla24xx_reset_risc(vha);
88c26663
AV		 1080}
1081
1da177e4
LT		 1082/**
1083 * qla2x00_chip_diag() - Test chip for proper operation.
1084 * @ha: HA context
1085 *
1086 * Returns 0 on success.
1087 */
abbd8870 1088int
e315cd28 1089qla2x00_chip_diag(scsi_qla_host_t *vha)
1da177e4
LT		 1090{
1091 int rval;
e315cd28 1092 struct qla_hw_data *ha = vha->hw;
3d71644c 1093 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4
LT		 1094 unsigned long flags = 0;
1095 uint16_t data;
1096 uint32_t cnt;
1097 uint16_t mb[5];
73208dfd 1098 struct req_que *req = ha->req_q_map[0];
1da177e4
LT		 1099
1100 /* Assume a failed state */
1101 rval = QLA_FUNCTION_FAILED;
1102
7c3df132
SK		 1103 ql_dbg(ql_dbg_init, vha, 0x007b,
1104 "Testing device at %lx.\n", (u_long)&reg->flash_address);
1da177e4
LT		 1105
1106 spin_lock_irqsave(&ha->hardware_lock, flags);
1107
1108 /* Reset ISP chip. */
1109 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
1110
1111 /*
1112 * We need to have a delay here since the card will not respond while
1113 * in reset causing an MCA on some architectures.
1114 */
1115 udelay(20);
1116 data = qla2x00_debounce_register(&reg->ctrl_status);
1117 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
1118 udelay(5);
1119 data = RD_REG_WORD(&reg->ctrl_status);
1120 barrier();
1121 }
1122
1123 if (!cnt)
1124 goto chip_diag_failed;
1125
7c3df132
SK		 1126 ql_dbg(ql_dbg_init, vha, 0x007c,
1127 "Reset register cleared by chip reset.\n");
1da177e4
LT		 1128
1129 /* Reset RISC processor. */
1130 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
1131 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
1132
1133 /* Workaround for QLA2312 PCI parity error */
1134 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
1135 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
1136 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
1137 udelay(5);
1138 data = RD_MAILBOX_REG(ha, reg, 0);
fa2a1ce5 1139 barrier();
1da177e4
LT		 1140 }
1141 } else
1142 udelay(10);
1143
1144 if (!cnt)
1145 goto chip_diag_failed;
1146
1147 /* Check product ID of chip */
7c3df132 1148 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n");
1da177e4
LT		 1149
1150 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
1151 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
1152 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
1153 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
1154 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
1155 mb[3] != PROD_ID_3) {
7c3df132
SK		 1156 ql_log(ql_log_warn, vha, 0x0062,
1157 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
1158 mb[1], mb[2], mb[3]);
1da177e4
LT		 1159
1160 goto chip_diag_failed;
1161 }
1162 ha->product_id[0] = mb[1];
1163 ha->product_id[1] = mb[2];
1164 ha->product_id[2] = mb[3];
1165 ha->product_id[3] = mb[4];
1166
1167 /* Adjust fw RISC transfer size */
73208dfd 1168 if (req->length > 1024)
1da177e4
LT		 1169 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
1170 else
1171 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
73208dfd 1172 req->length;
1da177e4
LT		 1173
1174 if (IS_QLA2200(ha) &&
1175 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
1176 /* Limit firmware transfer size with a 2200A */
7c3df132 1177 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
1da177e4 1178
ea5b6382 1179 ha->device_type |= DT_ISP2200A;
1da177e4
LT		 1180 ha->fw_transfer_size = 128;
1181 }
1182
1183 /* Wrap Incoming Mailboxes Test. */
1184 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1185
7c3df132 1186 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
e315cd28 1187 rval = qla2x00_mbx_reg_test(vha);
7c3df132
SK		 1188 if (rval)
1189 ql_log(ql_log_warn, vha, 0x0080,
1190 "Failed mailbox send register test.\n");
1191 else
1da177e4
LT		 1192 /* Flag a successful rval */
1193 rval = QLA_SUCCESS;
1da177e4
LT		 1194 spin_lock_irqsave(&ha->hardware_lock, flags);
1195
1196chip_diag_failed:
1197 if (rval)
7c3df132
SK		 1198 ql_log(ql_log_info, vha, 0x0081,
1199 "Chip diagnostics **** FAILED ****.\n");
1da177e4
LT		 1200
1201 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1202
1203 return (rval);
1204}
1205
0107109e
AV		 1206/**
1207 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
1208 * @ha: HA context
1209 *
1210 * Returns 0 on success.
1211 */
1212int
e315cd28 1213qla24xx_chip_diag(scsi_qla_host_t *vha)
0107109e
AV		 1214{
1215 int rval;
e315cd28 1216 struct qla_hw_data *ha = vha->hw;
73208dfd 1217 struct req_que *req = ha->req_q_map[0];
0107109e 1218
a9083016
GM		 1219 if (IS_QLA82XX(ha))
1220 return QLA_SUCCESS;
1221
73208dfd 1222 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
0107109e 1223
e315cd28 1224 rval = qla2x00_mbx_reg_test(vha);
0107109e 1225 if (rval) {
7c3df132
SK		 1226 ql_log(ql_log_warn, vha, 0x0082,
1227 "Failed mailbox send register test.\n");
0107109e
AV		 1228 } else {
1229 /* Flag a successful rval */
1230 rval = QLA_SUCCESS;
1231 }
1232
1233 return rval;
1234}
1235
a7a167bf 1236void
e315cd28 1237qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
0107109e 1238{
a7a167bf
AV		 1239 int rval;
1240 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
73208dfd 1241 eft_size, fce_size, mq_size;
df613b96
AV		 1242 dma_addr_t tc_dma;
1243 void *tc;
e315cd28 1244 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 1245 struct req_que *req = ha->req_q_map[0];
1246 struct rsp_que *rsp = ha->rsp_q_map[0];
a7a167bf
AV		 1247
1248 if (ha->fw_dump) {
7c3df132
SK		 1249 ql_dbg(ql_dbg_init, vha, 0x00bd,
1250 "Firmware dump already allocated.\n");
a7a167bf
AV		 1251 return;
1252 }
d4e3e04d 1253
0107109e 1254 ha->fw_dumped = 0;
73208dfd 1255 fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
d4e3e04d 1256 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
a7a167bf 1257 fixed_size = sizeof(struct qla2100_fw_dump);
d4e3e04d 1258 } else if (IS_QLA23XX(ha)) {
a7a167bf
AV		 1259 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
1260 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
1261 sizeof(uint16_t);
e428924c 1262 } else if (IS_FWI2_CAPABLE(ha)) {
3a03eb79
AV		 1263 if (IS_QLA81XX(ha))
1264 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
1265 else if (IS_QLA25XX(ha))
1266 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
1267 else
1268 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
a7a167bf
AV		 1269 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
1270 sizeof(uint32_t);
73208dfd
AC		 1271 if (ha->mqenable)
1272 mq_size = sizeof(struct qla2xxx_mq_chain);
df613b96 1273 /* Allocate memory for Fibre Channel Event Buffer. */
3a03eb79 1274 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
436a7b11 1275 goto try_eft;
df613b96
AV		 1276
1277 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
1278 GFP_KERNEL);
1279 if (!tc) {
7c3df132
SK		 1280 ql_log(ql_log_warn, vha, 0x00be,
1281 "Unable to allocate (%d KB) for FCE.\n",
1282 FCE_SIZE / 1024);
17d98630 1283 goto try_eft;
df613b96
AV		 1284 }
1285
1286 memset(tc, 0, FCE_SIZE);
e315cd28 1287 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
df613b96
AV		 1288 ha->fce_mb, &ha->fce_bufs);
1289 if (rval) {
7c3df132
SK		 1290 ql_log(ql_log_warn, vha, 0x00bf,
1291 "Unable to initialize FCE (%d).\n", rval);
df613b96
AV		 1292 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
1293 tc_dma);
1294 ha->flags.fce_enabled = 0;
17d98630 1295 goto try_eft;
df613b96 1296 }
7c3df132
SK		 1297 ql_log(ql_log_info, vha, 0x00c0,
1298 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
df613b96 1299
7d9dade3 1300 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
df613b96
AV		 1301 ha->flags.fce_enabled = 1;
1302 ha->fce_dma = tc_dma;
1303 ha->fce = tc;
436a7b11
AV		 1304try_eft:
1305 /* Allocate memory for Extended Trace Buffer. */
1306 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
1307 GFP_KERNEL);
1308 if (!tc) {
7c3df132
SK		 1309 ql_log(ql_log_warn, vha, 0x00c1,
1310 "Unable to allocate (%d KB) for EFT.\n",
1311 EFT_SIZE / 1024);
436a7b11
AV		 1312 goto cont_alloc;
1313 }
1314
1315 memset(tc, 0, EFT_SIZE);
e315cd28 1316 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
436a7b11 1317 if (rval) {
7c3df132
SK		 1318 ql_log(ql_log_warn, vha, 0x00c2,
1319 "Unable to initialize EFT (%d).\n", rval);
436a7b11
AV		 1320 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
1321 tc_dma);
1322 goto cont_alloc;
1323 }
7c3df132
SK		 1324 ql_log(ql_log_info, vha, 0x00c3,
1325 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
436a7b11
AV		 1326
1327 eft_size = EFT_SIZE;
1328 ha->eft_dma = tc_dma;
1329 ha->eft = tc;
d4e3e04d 1330 }
a7a167bf 1331cont_alloc:
73208dfd
AC		 1332 req_q_size = req->length * sizeof(request_t);
1333 rsp_q_size = rsp->length * sizeof(response_t);
a7a167bf
AV		 1334
1335 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
2afa19a9 1336 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
bb99de67
AV		 1337 ha->chain_offset = dump_size;
1338 dump_size += mq_size + fce_size;
d4e3e04d
AV		 1339
1340 ha->fw_dump = vmalloc(dump_size);
a7a167bf 1341 if (!ha->fw_dump) {
7c3df132
SK		 1342 ql_log(ql_log_warn, vha, 0x00c4,
1343 "Unable to allocate (%d KB) for firmware dump.\n",
1344 dump_size / 1024);
a7a167bf 1345
e30d1756
MI		 1346 if (ha->fce) {
1347 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
1348 ha->fce_dma);
1349 ha->fce = NULL;
1350 ha->fce_dma = 0;
1351 }
1352
a7a167bf
AV		 1353 if (ha->eft) {
1354 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
1355 ha->eft_dma);
1356 ha->eft = NULL;
1357 ha->eft_dma = 0;
1358 }
1359 return;
1360 }
7c3df132
SK		 1361 ql_log(ql_log_info, vha, 0x00c5,
1362 "Allocated (%d KB) for firmware dump.\n", dump_size / 1024);
a7a167bf
AV		 1363
1364 ha->fw_dump_len = dump_size;
1365 ha->fw_dump->signature[0] = 'Q';
1366 ha->fw_dump->signature[1] = 'L';
1367 ha->fw_dump->signature[2] = 'G';
1368 ha->fw_dump->signature[3] = 'C';
1369 ha->fw_dump->version = __constant_htonl(1);
1370
1371 ha->fw_dump->fixed_size = htonl(fixed_size);
1372 ha->fw_dump->mem_size = htonl(mem_size);
1373 ha->fw_dump->req_q_size = htonl(req_q_size);
1374 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
1375
1376 ha->fw_dump->eft_size = htonl(eft_size);
1377 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
1378 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
1379
1380 ha->fw_dump->header_size =
1381 htonl(offsetof(struct qla2xxx_fw_dump, isp));
0107109e
AV		 1382}
1383
18e7555a
AV		 1384static int
1385qla81xx_mpi_sync(scsi_qla_host_t *vha)
1386{
1387#define MPS_MASK 0xe0
1388 int rval;
1389 uint16_t dc;
1390 uint32_t dw;
18e7555a
AV		 1391
1392 if (!IS_QLA81XX(vha->hw))
1393 return QLA_SUCCESS;
1394
1395 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
1396 if (rval != QLA_SUCCESS) {
7c3df132
SK		 1397 ql_log(ql_log_warn, vha, 0x0105,
1398 "Unable to acquire semaphore.\n");
18e7555a
AV		 1399 goto done;
1400 }
1401
1402 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
1403 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
1404 if (rval != QLA_SUCCESS) {
7c3df132 1405 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
18e7555a
AV		 1406 goto done_release;
1407 }
1408
1409 dc &= MPS_MASK;
1410 if (dc == (dw & MPS_MASK))
1411 goto done_release;
1412
1413 dw &= ~MPS_MASK;
1414 dw |= dc;
1415 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
1416 if (rval != QLA_SUCCESS) {
7c3df132 1417 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
18e7555a
AV		 1418 }
1419
1420done_release:
1421 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
1422 if (rval != QLA_SUCCESS) {
7c3df132
SK		 1423 ql_log(ql_log_warn, vha, 0x006d,
1424 "Unable to release semaphore.\n");
18e7555a
AV		 1425 }
1426
1427done:
1428 return rval;
1429}
1430
1da177e4
LT		 1431/**
1432 * qla2x00_setup_chip() - Load and start RISC firmware.
1433 * @ha: HA context
1434 *
1435 * Returns 0 on success.
1436 */
1437static int
e315cd28 1438qla2x00_setup_chip(scsi_qla_host_t *vha)
1da177e4 1439{
0107109e
AV		 1440 int rval;
1441 uint32_t srisc_address = 0;
e315cd28 1442 struct qla_hw_data *ha = vha->hw;
3db0652e
AV		 1443 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1444 unsigned long flags;
dda772e8 1445 uint16_t fw_major_version;
3db0652e 1446
a9083016
GM		 1447 if (IS_QLA82XX(ha)) {
1448 rval = ha->isp_ops->load_risc(vha, &srisc_address);
14e303d9
AV		 1449 if (rval == QLA_SUCCESS) {
1450 qla2x00_stop_firmware(vha);
a9083016 1451 goto enable_82xx_npiv;
14e303d9 1452 } else
b963752f 1453 goto failed;
a9083016
GM		 1454 }
1455
3db0652e
AV		 1456 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1457 /* Disable SRAM, Instruction RAM and GP RAM parity. */
1458 spin_lock_irqsave(&ha->hardware_lock, flags);
1459 WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
1460 RD_REG_WORD(&reg->hccr);
1461 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1462 }
1da177e4 1463
18e7555a
AV		 1464 qla81xx_mpi_sync(vha);
1465
1da177e4 1466 /* Load firmware sequences */
e315cd28 1467 rval = ha->isp_ops->load_risc(vha, &srisc_address);
0107109e 1468 if (rval == QLA_SUCCESS) {
7c3df132
SK		 1469 ql_dbg(ql_dbg_init, vha, 0x00c9,
1470 "Verifying Checksum of loaded RISC code.\n");
1da177e4 1471
e315cd28 1472 rval = qla2x00_verify_checksum(vha, srisc_address);
1da177e4
LT		 1473 if (rval == QLA_SUCCESS) {
1474 /* Start firmware execution. */
7c3df132
SK		 1475 ql_dbg(ql_dbg_init, vha, 0x00ca,
1476 "Starting firmware.\n");
1da177e4 1477
e315cd28 1478 rval = qla2x00_execute_fw(vha, srisc_address);
1da177e4 1479 /* Retrieve firmware information. */
dda772e8 1480 if (rval == QLA_SUCCESS) {
a9083016 1481enable_82xx_npiv:
dda772e8 1482 fw_major_version = ha->fw_major_version;
ca9e9c3e 1483 rval = qla2x00_get_fw_version(vha,
1da177e4
LT		 1484 &ha->fw_major_version,
1485 &ha->fw_minor_version,
1486 &ha->fw_subminor_version,
3a03eb79 1487 &ha->fw_attributes, &ha->fw_memory_size,
55a96158
AV		 1488 ha->mpi_version, &ha->mpi_capabilities,
1489 ha->phy_version);
ca9e9c3e
AV		 1490 if (rval != QLA_SUCCESS)
1491 goto failed;
2c3dfe3f 1492 ha->flags.npiv_supported = 0;
e315cd28 1493 if (IS_QLA2XXX_MIDTYPE(ha) &&
946fb891 1494 (ha->fw_attributes & BIT_2)) {
2c3dfe3f 1495 ha->flags.npiv_supported = 1;
4d0ea247
SJ		 1496 if ((!ha->max_npiv_vports) ||
1497 ((ha->max_npiv_vports + 1) %
eb66dc60 1498 MIN_MULTI_ID_FABRIC))
4d0ea247 1499 ha->max_npiv_vports =
eb66dc60 1500 MIN_MULTI_ID_FABRIC - 1;
4d0ea247 1501 }
24a08138
AV		 1502 qla2x00_get_resource_cnts(vha, NULL,
1503 &ha->fw_xcb_count, NULL, NULL,
f3a0a77e 1504 &ha->max_npiv_vports, NULL);
d743de66 1505
08de2844
GM		 1506 if (!fw_major_version && ql2xallocfwdump)
1507 qla2x00_alloc_fw_dump(vha);
1da177e4
LT		 1508 }
1509 } else {
7c3df132
SK		 1510 ql_log(ql_log_fatal, vha, 0x00cd,
1511 "ISP Firmware failed checksum.\n");
1512 goto failed;
1da177e4
LT		 1513 }
1514 }
1515
3db0652e
AV		 1516 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1517 /* Enable proper parity. */
1518 spin_lock_irqsave(&ha->hardware_lock, flags);
1519 if (IS_QLA2300(ha))
1520 /* SRAM parity */
1521 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
1522 else
1523 /* SRAM, Instruction RAM and GP RAM parity */
1524 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
1525 RD_REG_WORD(&reg->hccr);
1526 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1527 }
1528
1d2874de
JC		 1529 if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
1530 uint32_t size;
1531
1532 rval = qla81xx_fac_get_sector_size(vha, &size);
1533 if (rval == QLA_SUCCESS) {
1534 ha->flags.fac_supported = 1;
1535 ha->fdt_block_size = size << 2;
1536 } else {
7c3df132 1537 ql_log(ql_log_warn, vha, 0x00ce,
1d2874de
JC		 1538 "Unsupported FAC firmware (%d.%02d.%02d).\n",
1539 ha->fw_major_version, ha->fw_minor_version,
1540 ha->fw_subminor_version);
1541 }
1542 }
ca9e9c3e 1543failed:
1da177e4 1544 if (rval) {
7c3df132
SK		 1545 ql_log(ql_log_fatal, vha, 0x00cf,
1546 "Setup chip ****FAILED****.\n");
1da177e4
LT		 1547 }
1548
1549 return (rval);
1550}
1551
1552/**
1553 * qla2x00_init_response_q_entries() - Initializes response queue entries.
1554 * @ha: HA context
1555 *
1556 * Beginning of request ring has initialization control block already built
1557 * by nvram config routine.
1558 *
1559 * Returns 0 on success.
1560 */
73208dfd
AC		 1561void
1562qla2x00_init_response_q_entries(struct rsp_que *rsp)
1da177e4
LT		 1563{
1564 uint16_t cnt;
1565 response_t *pkt;
1566
2afa19a9
AC		 1567 rsp->ring_ptr = rsp->ring;
1568 rsp->ring_index = 0;
1569 rsp->status_srb = NULL;
e315cd28
AC		 1570 pkt = rsp->ring_ptr;
1571 for (cnt = 0; cnt < rsp->length; cnt++) {
1da177e4
LT		 1572 pkt->signature = RESPONSE_PROCESSED;
1573 pkt++;
1574 }
1da177e4
LT		 1575}
1576
1577/**
1578 * qla2x00_update_fw_options() - Read and process firmware options.
1579 * @ha: HA context
1580 *
1581 * Returns 0 on success.
1582 */
abbd8870 1583void
e315cd28 1584qla2x00_update_fw_options(scsi_qla_host_t *vha)
1da177e4
LT		 1585{
1586 uint16_t swing, emphasis, tx_sens, rx_sens;
e315cd28 1587 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 1588
1589 memset(ha->fw_options, 0, sizeof(ha->fw_options));
e315cd28 1590 qla2x00_get_fw_options(vha, ha->fw_options);
1da177e4
LT		 1591
1592 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1593 return;
1594
1595 /* Serial Link options. */
7c3df132
SK		 1596 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
1597 "Serial link options.\n");
1598 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
1599 (uint8_t *)&ha->fw_seriallink_options,
1600 sizeof(ha->fw_seriallink_options));
1da177e4
LT		 1601
1602 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
1603 if (ha->fw_seriallink_options[3] & BIT_2) {
1604 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
1605
1606 /* 1G settings */
1607 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
1608 emphasis = (ha->fw_seriallink_options[2] &
1609 (BIT_4 | BIT_3)) >> 3;
1610 tx_sens = ha->fw_seriallink_options[0] &
fa2a1ce5 1611 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1da177e4
LT		 1612 rx_sens = (ha->fw_seriallink_options[0] &
1613 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1614 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
1615 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
1616 if (rx_sens == 0x0)
1617 rx_sens = 0x3;
1618 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
1619 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
1620 ha->fw_options[10] |= BIT_5 |
1621 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
1622 (tx_sens & (BIT_1 | BIT_0));
1623
1624 /* 2G settings */
1625 swing = (ha->fw_seriallink_options[2] &
1626 (BIT_7 | BIT_6 | BIT_5)) >> 5;
1627 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
1628 tx_sens = ha->fw_seriallink_options[1] &
fa2a1ce5 1629 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1da177e4
LT		 1630 rx_sens = (ha->fw_seriallink_options[1] &
1631 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1632 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
1633 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
1634 if (rx_sens == 0x0)
1635 rx_sens = 0x3;
1636 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
1637 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
1638 ha->fw_options[11] |= BIT_5 |
1639 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
1640 (tx_sens & (BIT_1 | BIT_0));
1641 }
1642
1643 /* FCP2 options. */
1644 /* Return command IOCBs without waiting for an ABTS to complete. */
1645 ha->fw_options[3] |= BIT_13;
1646
1647 /* LED scheme. */
1648 if (ha->flags.enable_led_scheme)
1649 ha->fw_options[2] |= BIT_12;
1650
48c02fde
AV		 1651 /* Detect ISP6312. */
1652 if (IS_QLA6312(ha))
1653 ha->fw_options[2] |= BIT_13;
1654
1da177e4 1655 /* Update firmware options. */
e315cd28 1656 qla2x00_set_fw_options(vha, ha->fw_options);
1da177e4
LT		 1657}
1658
0107109e 1659void
e315cd28 1660qla24xx_update_fw_options(scsi_qla_host_t *vha)
0107109e
AV		 1661{
1662 int rval;
e315cd28 1663 struct qla_hw_data *ha = vha->hw;
0107109e 1664
a9083016
GM		 1665 if (IS_QLA82XX(ha))
1666 return;
1667
0107109e 1668 /* Update Serial Link options. */
f94097ed 1669 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
0107109e
AV		 1670 return;
1671
e315cd28 1672 rval = qla2x00_set_serdes_params(vha,
f94097ed
AV		 1673 le16_to_cpu(ha->fw_seriallink_options24[1]),
1674 le16_to_cpu(ha->fw_seriallink_options24[2]),
1675 le16_to_cpu(ha->fw_seriallink_options24[3]));
0107109e 1676 if (rval != QLA_SUCCESS) {
7c3df132 1677 ql_log(ql_log_warn, vha, 0x0104,
0107109e
AV		 1678 "Unable to update Serial Link options (%x).\n", rval);
1679 }
1680}
1681
abbd8870 1682void
e315cd28 1683qla2x00_config_rings(struct scsi_qla_host *vha)
abbd8870 1684{
e315cd28 1685 struct qla_hw_data *ha = vha->hw;
3d71644c 1686 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
73208dfd
AC		 1687 struct req_que *req = ha->req_q_map[0];
1688 struct rsp_que *rsp = ha->rsp_q_map[0];
abbd8870
AV		 1689
1690 /* Setup ring parameters in initialization control block. */
1691 ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
1692 ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
e315cd28
AC		 1693 ha->init_cb->request_q_length = cpu_to_le16(req->length);
1694 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
1695 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
1696 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
1697 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
1698 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
abbd8870
AV		 1699
1700 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
1701 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
1702 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
1703 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
1704 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
1705}
1706
0107109e 1707void
e315cd28 1708qla24xx_config_rings(struct scsi_qla_host *vha)
0107109e 1709{
e315cd28 1710 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 1711 device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
1712 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
1713 struct qla_msix_entry *msix;
0107109e 1714 struct init_cb_24xx *icb;
73208dfd
AC		 1715 uint16_t rid = 0;
1716 struct req_que *req = ha->req_q_map[0];
1717 struct rsp_que *rsp = ha->rsp_q_map[0];
0107109e 1718
73208dfd 1719/* Setup ring parameters in initialization control block. */
0107109e
AV		 1720 icb = (struct init_cb_24xx *)ha->init_cb;
1721 icb->request_q_outpointer = __constant_cpu_to_le16(0);
1722 icb->response_q_inpointer = __constant_cpu_to_le16(0);
e315cd28
AC		 1723 icb->request_q_length = cpu_to_le16(req->length);
1724 icb->response_q_length = cpu_to_le16(rsp->length);
1725 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
1726 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
1727 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
1728 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
0107109e 1729
73208dfd
AC		 1730 if (ha->mqenable) {
1731 icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
1732 icb->rid = __constant_cpu_to_le16(rid);
1733 if (ha->flags.msix_enabled) {
1734 msix = &ha->msix_entries[1];
7c3df132
SK		 1735 ql_dbg(ql_dbg_init, vha, 0x00fd,
1736 "Registering vector 0x%x for base que.\n",
1737 msix->entry);
73208dfd
AC		 1738 icb->msix = cpu_to_le16(msix->entry);
1739 }
1740 /* Use alternate PCI bus number */
1741 if (MSB(rid))
1742 icb->firmware_options_2 |=
1743 __constant_cpu_to_le32(BIT_19);
1744 /* Use alternate PCI devfn */
1745 if (LSB(rid))
1746 icb->firmware_options_2 |=
1747 __constant_cpu_to_le32(BIT_18);
1748
3155754a
AC		 1749 /* Use Disable MSIX Handshake mode for capable adapters */
1750 if (IS_MSIX_NACK_CAPABLE(ha)) {
1751 icb->firmware_options_2 &=
1752 __constant_cpu_to_le32(~BIT_22);
1753 ha->flags.disable_msix_handshake = 1;
7c3df132
SK		 1754 ql_dbg(ql_dbg_init, vha, 0x00fe,
1755 "MSIX Handshake Disable Mode turned on.\n");
3155754a
AC		 1756 } else {
1757 icb->firmware_options_2 |=
1758 __constant_cpu_to_le32(BIT_22);
1759 }
73208dfd 1760 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
73208dfd
AC		 1761
1762 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
1763 WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
1764 WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
1765 WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
1766 } else {
1767 WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
1768 WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
1769 WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
1770 WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
1771 }
1772 /* PCI posting */
1773 RD_REG_DWORD(&ioreg->hccr);
0107109e
AV		 1774}
1775
1da177e4
LT		 1776/**
1777 * qla2x00_init_rings() - Initializes firmware.
1778 * @ha: HA context
1779 *
1780 * Beginning of request ring has initialization control block already built
1781 * by nvram config routine.
1782 *
1783 * Returns 0 on success.
1784 */
1785static int
e315cd28 1786qla2x00_init_rings(scsi_qla_host_t *vha)
1da177e4
LT		 1787{
1788 int rval;
1789 unsigned long flags = 0;
29bdccbe 1790 int cnt, que;
e315cd28 1791 struct qla_hw_data *ha = vha->hw;
29bdccbe
AC		 1792 struct req_que *req;
1793 struct rsp_que *rsp;
1794 struct scsi_qla_host *vp;
2c3dfe3f
SJ		 1795 struct mid_init_cb_24xx *mid_init_cb =
1796 (struct mid_init_cb_24xx *) ha->init_cb;
1da177e4
LT		 1797
1798 spin_lock_irqsave(&ha->hardware_lock, flags);
1799
1800 /* Clear outstanding commands array. */
2afa19a9 1801 for (que = 0; que < ha->max_req_queues; que++) {
29bdccbe
AC		 1802 req = ha->req_q_map[que];
1803 if (!req)
1804 continue;
2afa19a9 1805 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
29bdccbe 1806 req->outstanding_cmds[cnt] = NULL;
1da177e4 1807
2afa19a9 1808 req->current_outstanding_cmd = 1;
1da177e4 1809
29bdccbe
AC		 1810 /* Initialize firmware. */
1811 req->ring_ptr = req->ring;
1812 req->ring_index = 0;
1813 req->cnt = req->length;
1814 }
1da177e4 1815
2afa19a9 1816 for (que = 0; que < ha->max_rsp_queues; que++) {
29bdccbe
AC		 1817 rsp = ha->rsp_q_map[que];
1818 if (!rsp)
1819 continue;
29bdccbe
AC		 1820 /* Initialize response queue entries */
1821 qla2x00_init_response_q_entries(rsp);
1822 }
1da177e4 1823
542bce1f 1824 spin_lock(&ha->vport_slock);
29bdccbe
AC		 1825 /* Clear RSCN queue. */
1826 list_for_each_entry(vp, &ha->vp_list, list) {
1827 vp->rscn_in_ptr = 0;
1828 vp->rscn_out_ptr = 0;
1829 }
feafb7b1 1830
542bce1f 1831 spin_unlock(&ha->vport_slock);
feafb7b1 1832
e315cd28 1833 ha->isp_ops->config_rings(vha);
1da177e4
LT		 1834
1835 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1836
1837 /* Update any ISP specific firmware options before initialization. */
e315cd28 1838 ha->isp_ops->update_fw_options(vha);
1da177e4 1839
7c3df132 1840 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
2c3dfe3f 1841
605aa2bc
LC		 1842 if (ha->flags.npiv_supported) {
1843 if (ha->operating_mode == LOOP)
1844 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
c48339de 1845 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
605aa2bc
LC		 1846 }
1847
24a08138
AV		 1848 if (IS_FWI2_CAPABLE(ha)) {
1849 mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
1850 mid_init_cb->init_cb.execution_throttle =
1851 cpu_to_le16(ha->fw_xcb_count);
1852 }
2c3dfe3f 1853
e315cd28 1854 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
1da177e4 1855 if (rval) {
7c3df132
SK		 1856 ql_log(ql_log_fatal, vha, 0x00d2,
1857 "Init Firmware **** FAILED ****.\n");
1da177e4 1858 } else {
7c3df132
SK		 1859 ql_dbg(ql_dbg_init, vha, 0x00d3,
1860 "Init Firmware -- success.\n");
1da177e4
LT		 1861 }
1862
1863 return (rval);
1864}
1865
1866/**
1867 * qla2x00_fw_ready() - Waits for firmware ready.
1868 * @ha: HA context
1869 *
1870 * Returns 0 on success.
1871 */
1872static int
e315cd28 1873qla2x00_fw_ready(scsi_qla_host_t *vha)
1da177e4
LT		 1874{
1875 int rval;
4d4df193 1876 unsigned long wtime, mtime, cs84xx_time;
1da177e4
LT		 1877 uint16_t min_wait; /* Minimum wait time if loop is down */
1878 uint16_t wait_time; /* Wait time if loop is coming ready */
656e8912 1879 uint16_t state[5];
e315cd28 1880 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 1881
1882 rval = QLA_SUCCESS;
1883
1884 /* 20 seconds for loop down. */
fa2a1ce5 1885 min_wait = 20;
1da177e4
LT		 1886
1887 /*
1888 * Firmware should take at most one RATOV to login, plus 5 seconds for
1889 * our own processing.
1890 */
1891 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
1892 wait_time = min_wait;
1893 }
1894
1895 /* Min wait time if loop down */
1896 mtime = jiffies + (min_wait * HZ);
1897
1898 /* wait time before firmware ready */
1899 wtime = jiffies + (wait_time * HZ);
1900
1901 /* Wait for ISP to finish LIP */
e315cd28 1902 if (!vha->flags.init_done)
7c3df132
SK		 1903 ql_log(ql_log_info, vha, 0x801e,
1904 "Waiting for LIP to complete.\n");
1da177e4
LT		 1905
1906 do {
e315cd28 1907 rval = qla2x00_get_firmware_state(vha, state);
1da177e4 1908 if (rval == QLA_SUCCESS) {
4d4df193 1909 if (state[0] < FSTATE_LOSS_OF_SYNC) {
e315cd28 1910 vha->device_flags &= ~DFLG_NO_CABLE;
1da177e4 1911 }
4d4df193 1912 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
7c3df132
SK		 1913 ql_dbg(ql_dbg_taskm, vha, 0x801f,
1914 "fw_state=%x 84xx=%x.\n", state[0],
1915 state[2]);
4d4df193
HK		 1916 if ((state[2] & FSTATE_LOGGED_IN) &&
1917 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
7c3df132
SK		 1918 ql_dbg(ql_dbg_taskm, vha, 0x8028,
1919 "Sending verify iocb.\n");
4d4df193
HK		 1920
1921 cs84xx_time = jiffies;
e315cd28 1922 rval = qla84xx_init_chip(vha);
7c3df132
SK		 1923 if (rval != QLA_SUCCESS) {
1924 ql_log(ql_log_warn,
08de2844 1925 vha, 0x8026,
7c3df132 1926 "Init chip failed.\n");
4d4df193 1927 break;
7c3df132 1928 }
4d4df193
HK		 1929
1930 /* Add time taken to initialize. */
1931 cs84xx_time = jiffies - cs84xx_time;
1932 wtime += cs84xx_time;
1933 mtime += cs84xx_time;
08de2844 1934 ql_dbg(ql_dbg_taskm, vha, 0x8025,
7c3df132
SK		 1935 "Increasing wait time by %ld. "
1936 "New time %ld.\n", cs84xx_time,
1937 wtime);
4d4df193
HK		 1938 }
1939 } else if (state[0] == FSTATE_READY) {
7c3df132
SK		 1940 ql_dbg(ql_dbg_taskm, vha, 0x8037,
1941 "F/W Ready - OK.\n");
1da177e4 1942
e315cd28 1943 qla2x00_get_retry_cnt(vha, &ha->retry_count,
1da177e4
LT		 1944 &ha->login_timeout, &ha->r_a_tov);
1945
1946 rval = QLA_SUCCESS;
1947 break;
1948 }
1949
1950 rval = QLA_FUNCTION_FAILED;
1951
e315cd28 1952 if (atomic_read(&vha->loop_down_timer) &&
4d4df193 1953 state[0] != FSTATE_READY) {
1da177e4 1954 /* Loop down. Timeout on min_wait for states
fa2a1ce5
AV		 1955 * other than Wait for Login.
1956 */
1da177e4 1957 if (time_after_eq(jiffies, mtime)) {
7c3df132 1958 ql_log(ql_log_info, vha, 0x8038,
1da177e4
LT		 1959 "Cable is unplugged...\n");
1960
e315cd28 1961 vha->device_flags |= DFLG_NO_CABLE;
1da177e4
LT		 1962 break;
1963 }
1964 }
1965 } else {
1966 /* Mailbox cmd failed. Timeout on min_wait. */
cdbb0a4f 1967 if (time_after_eq(jiffies, mtime) ||
7190575f 1968 ha->flags.isp82xx_fw_hung)
1da177e4
LT		 1969 break;
1970 }
1971
1972 if (time_after_eq(jiffies, wtime))
1973 break;
1974
1975 /* Delay for a while */
1976 msleep(500);
1977
7c3df132
SK		 1978 ql_dbg(ql_dbg_taskm, vha, 0x8039,
1979 "fw_state=%x curr time=%lx.\n", state[0], jiffies);
1da177e4
LT		 1980 } while (1);
1981
7c3df132
SK		 1982 ql_dbg(ql_dbg_taskm, vha, 0x803a,
1983 "fw_state=%x (%x, %x, %x, %x) " "curr time=%lx.\n", state[0],
1984 state[1], state[2], state[3], state[4], jiffies);
1da177e4
LT		 1985
1986 if (rval) {
7c3df132
SK		 1987 ql_log(ql_log_warn, vha, 0x803b,
1988 "Firmware ready **** FAILED ****.\n");
1da177e4
LT		 1989 }
1990
1991 return (rval);
1992}
1993
1994/*
1995* qla2x00_configure_hba
1996* Setup adapter context.
1997*
1998* Input:
1999* ha = adapter state pointer.
2000*
2001* Returns:
2002* 0 = success
2003*
2004* Context:
2005* Kernel context.
2006*/
2007static int
e315cd28 2008qla2x00_configure_hba(scsi_qla_host_t *vha)
1da177e4
LT		 2009{
2010 int rval;
2011 uint16_t loop_id;
2012 uint16_t topo;
2c3dfe3f 2013 uint16_t sw_cap;
1da177e4
LT		 2014 uint8_t al_pa;
2015 uint8_t area;
2016 uint8_t domain;
2017 char connect_type[22];
e315cd28 2018 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 2019
2020 /* Get host addresses. */
e315cd28 2021 rval = qla2x00_get_adapter_id(vha,
2c3dfe3f 2022 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
1da177e4 2023 if (rval != QLA_SUCCESS) {
e315cd28 2024 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
7a44b86e 2025 IS_QLA8XXX_TYPE(ha) ||
33135aa2 2026 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
7c3df132
SK		 2027 ql_dbg(ql_dbg_disc, vha, 0x2008,
2028 "Loop is in a transition state.\n");
33135aa2 2029 } else {
7c3df132
SK		 2030 ql_log(ql_log_warn, vha, 0x2009,
2031 "Unable to get host loop ID.\n");
e315cd28 2032 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
33135aa2 2033 }
1da177e4
LT		 2034 return (rval);
2035 }
2036
2037 if (topo == 4) {
7c3df132
SK		 2038 ql_log(ql_log_info, vha, 0x200a,
2039 "Cannot get topology - retrying.\n");
1da177e4
LT		 2040 return (QLA_FUNCTION_FAILED);
2041 }
2042
e315cd28 2043 vha->loop_id = loop_id;
1da177e4
LT		 2044
2045 /* initialize */
2046 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
2047 ha->operating_mode = LOOP;
2c3dfe3f 2048 ha->switch_cap = 0;
1da177e4
LT		 2049
2050 switch (topo) {
2051 case 0:
7c3df132 2052 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
1da177e4
LT		 2053 ha->current_topology = ISP_CFG_NL;
2054 strcpy(connect_type, "(Loop)");
2055 break;
2056
2057 case 1:
7c3df132 2058 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
2c3dfe3f 2059 ha->switch_cap = sw_cap;
1da177e4
LT		 2060 ha->current_topology = ISP_CFG_FL;
2061 strcpy(connect_type, "(FL_Port)");
2062 break;
2063
2064 case 2:
7c3df132 2065 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
1da177e4
LT		 2066 ha->operating_mode = P2P;
2067 ha->current_topology = ISP_CFG_N;
2068 strcpy(connect_type, "(N_Port-to-N_Port)");
2069 break;
2070
2071 case 3:
7c3df132 2072 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
2c3dfe3f 2073 ha->switch_cap = sw_cap;
1da177e4
LT		 2074 ha->operating_mode = P2P;
2075 ha->current_topology = ISP_CFG_F;
2076 strcpy(connect_type, "(F_Port)");
2077 break;
2078
2079 default:
7c3df132
SK		 2080 ql_dbg(ql_dbg_disc, vha, 0x200f,
2081 "HBA in unknown topology %x, using NL.\n", topo);
1da177e4
LT		 2082 ha->current_topology = ISP_CFG_NL;
2083 strcpy(connect_type, "(Loop)");
2084 break;
2085 }
2086
2087 /* Save Host port and loop ID. */
2088 /* byte order - Big Endian */
e315cd28
AC		 2089 vha->d_id.b.domain = domain;
2090 vha->d_id.b.area = area;
2091 vha->d_id.b.al_pa = al_pa;
1da177e4 2092
e315cd28 2093 if (!vha->flags.init_done)
7c3df132
SK		 2094 ql_log(ql_log_info, vha, 0x2010,
2095 "Topology - %s, Host Loop address 0x%x.\n",
e315cd28 2096 connect_type, vha->loop_id);
1da177e4
LT		 2097
2098 if (rval) {
7c3df132
SK		 2099 ql_log(ql_log_warn, vha, 0x2011,
2100 "%s FAILED\n", __func__);
1da177e4 2101 } else {
7c3df132
SK		 2102 ql_dbg(ql_dbg_disc, vha, 0x2012,
2103 "%s success\n", __func__);
1da177e4
LT		 2104 }
2105
2106 return(rval);
2107}
2108
a9083016 2109inline void
e315cd28
AC		 2110qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
2111 char *def)
9bb9fcf2
AV		 2112{
2113 char *st, *en;
2114 uint16_t index;
e315cd28 2115 struct qla_hw_data *ha = vha->hw;
ab671149 2116 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
a9083016 2117 !IS_QLA8XXX_TYPE(ha);
9bb9fcf2
AV		 2118
2119 if (memcmp(model, BINZERO, len) != 0) {
2120 strncpy(ha->model_number, model, len);
2121 st = en = ha->model_number;
2122 en += len - 1;
2123 while (en > st) {
2124 if (*en != 0x20 && *en != 0x00)
2125 break;
2126 *en-- = '\0';
2127 }
2128
2129 index = (ha->pdev->subsystem_device & 0xff);
7d0dba17
AV		 2130 if (use_tbl &&
2131 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
9bb9fcf2 2132 index < QLA_MODEL_NAMES)
1ee27146
JC		 2133 strncpy(ha->model_desc,
2134 qla2x00_model_name[index * 2 + 1],
2135 sizeof(ha->model_desc) - 1);
9bb9fcf2
AV		 2136 } else {
2137 index = (ha->pdev->subsystem_device & 0xff);
7d0dba17
AV		 2138 if (use_tbl &&
2139 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
9bb9fcf2
AV		 2140 index < QLA_MODEL_NAMES) {
2141 strcpy(ha->model_number,
2142 qla2x00_model_name[index * 2]);
1ee27146
JC		 2143 strncpy(ha->model_desc,
2144 qla2x00_model_name[index * 2 + 1],
2145 sizeof(ha->model_desc) - 1);
9bb9fcf2
AV		 2146 } else {
2147 strcpy(ha->model_number, def);
2148 }
2149 }
1ee27146 2150 if (IS_FWI2_CAPABLE(ha))
e315cd28 2151 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
1ee27146 2152 sizeof(ha->model_desc));
9bb9fcf2
AV		 2153}
2154
4e08df3f
DM		 2155/* On sparc systems, obtain port and node WWN from firmware
2156 * properties.
2157 */
e315cd28 2158static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4e08df3f
DM		 2159{
2160#ifdef CONFIG_SPARC
e315cd28 2161 struct qla_hw_data *ha = vha->hw;
4e08df3f 2162 struct pci_dev *pdev = ha->pdev;
15576bc8
DM		 2163 struct device_node *dp = pci_device_to_OF_node(pdev);
2164 const u8 *val;
4e08df3f
DM		 2165 int len;
2166
2167 val = of_get_property(dp, "port-wwn", &len);
2168 if (val && len >= WWN_SIZE)
2169 memcpy(nv->port_name, val, WWN_SIZE);
2170
2171 val = of_get_property(dp, "node-wwn", &len);
2172 if (val && len >= WWN_SIZE)
2173 memcpy(nv->node_name, val, WWN_SIZE);
2174#endif
2175}
2176
1da177e4
LT		 2177/*
2178* NVRAM configuration for ISP 2xxx
2179*
2180* Input:
2181* ha = adapter block pointer.
2182*
2183* Output:
2184* initialization control block in response_ring
2185* host adapters parameters in host adapter block
2186*
2187* Returns:
2188* 0 = success.
2189*/
abbd8870 2190int
e315cd28 2191qla2x00_nvram_config(scsi_qla_host_t *vha)
1da177e4 2192{
4e08df3f 2193 int rval;
0107109e
AV		 2194 uint8_t chksum = 0;
2195 uint16_t cnt;
2196 uint8_t *dptr1, *dptr2;
e315cd28 2197 struct qla_hw_data *ha = vha->hw;
0107109e 2198 init_cb_t *icb = ha->init_cb;
281afe19
SJ		 2199 nvram_t *nv = ha->nvram;
2200 uint8_t *ptr = ha->nvram;
3d71644c 2201 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 2202
4e08df3f
DM		 2203 rval = QLA_SUCCESS;
2204
1da177e4 2205 /* Determine NVRAM starting address. */
0107109e 2206 ha->nvram_size = sizeof(nvram_t);
1da177e4
LT		 2207 ha->nvram_base = 0;
2208 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
2209 if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
2210 ha->nvram_base = 0x80;
2211
2212 /* Get NVRAM data and calculate checksum. */
e315cd28 2213 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
0107109e
AV		 2214 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
2215 chksum += *ptr++;
1da177e4 2216
7c3df132
SK		 2217 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
2218 "Contents of NVRAM.\n");
2219 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
2220 (uint8_t *)nv, ha->nvram_size);
1da177e4
LT		 2221
2222 /* Bad NVRAM data, set defaults parameters. */
2223 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
2224 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
2225 /* Reset NVRAM data. */
7c3df132
SK		 2226 ql_log(ql_log_warn, vha, 0x0064,
2227 "Inconisistent NVRAM "
2228 "detected: checksum=0x%x id=%c version=0x%x.\n",
2229 chksum, nv->id[0], nv->nvram_version);
2230 ql_log(ql_log_warn, vha, 0x0065,
2231 "Falling back to "
2232 "functioning (yet invalid -- WWPN) defaults.\n");
4e08df3f
DM		 2233
2234 /*
2235 * Set default initialization control block.
2236 */
2237 memset(nv, 0, ha->nvram_size);
2238 nv->parameter_block_version = ICB_VERSION;
2239
2240 if (IS_QLA23XX(ha)) {
2241 nv->firmware_options[0] = BIT_2 | BIT_1;
2242 nv->firmware_options[1] = BIT_7 | BIT_5;
2243 nv->add_firmware_options[0] = BIT_5;
2244 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2245 nv->frame_payload_size = __constant_cpu_to_le16(2048);
2246 nv->special_options[1] = BIT_7;
2247 } else if (IS_QLA2200(ha)) {
2248 nv->firmware_options[0] = BIT_2 | BIT_1;
2249 nv->firmware_options[1] = BIT_7 | BIT_5;
2250 nv->add_firmware_options[0] = BIT_5;
2251 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2252 nv->frame_payload_size = __constant_cpu_to_le16(1024);
2253 } else if (IS_QLA2100(ha)) {
2254 nv->firmware_options[0] = BIT_3 | BIT_1;
2255 nv->firmware_options[1] = BIT_5;
2256 nv->frame_payload_size = __constant_cpu_to_le16(1024);
2257 }
2258
2259 nv->max_iocb_allocation = __constant_cpu_to_le16(256);
2260 nv->execution_throttle = __constant_cpu_to_le16(16);
2261 nv->retry_count = 8;
2262 nv->retry_delay = 1;
2263
2264 nv->port_name[0] = 33;
2265 nv->port_name[3] = 224;
2266 nv->port_name[4] = 139;
2267
e315cd28 2268 qla2xxx_nvram_wwn_from_ofw(vha, nv);
4e08df3f
DM		 2269
2270 nv->login_timeout = 4;
2271
2272 /*
2273 * Set default host adapter parameters
2274 */
2275 nv->host_p[1] = BIT_2;
2276 nv->reset_delay = 5;
2277 nv->port_down_retry_count = 8;
2278 nv->max_luns_per_target = __constant_cpu_to_le16(8);
2279 nv->link_down_timeout = 60;
2280
2281 rval = 1;
1da177e4
LT		 2282 }
2283
2284#if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
2285 /*
2286 * The SN2 does not provide BIOS emulation which means you can't change
2287 * potentially bogus BIOS settings. Force the use of default settings
2288 * for link rate and frame size. Hope that the rest of the settings
2289 * are valid.
2290 */
2291 if (ia64_platform_is("sn2")) {
2292 nv->frame_payload_size = __constant_cpu_to_le16(2048);
2293 if (IS_QLA23XX(ha))
2294 nv->special_options[1] = BIT_7;
2295 }
2296#endif
2297
2298 /* Reset Initialization control block */
0107109e 2299 memset(icb, 0, ha->init_cb_size);
1da177e4
LT		 2300
2301 /*
2302 * Setup driver NVRAM options.
2303 */
2304 nv->firmware_options[0] |= (BIT_6 | BIT_1);
2305 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
2306 nv->firmware_options[1] |= (BIT_5 | BIT_0);
2307 nv->firmware_options[1] &= ~BIT_4;
2308
2309 if (IS_QLA23XX(ha)) {
2310 nv->firmware_options[0] |= BIT_2;
2311 nv->firmware_options[0] &= ~BIT_3;
5ff1d584 2312 nv->firmware_options[0] &= ~BIT_6;
0107109e 2313 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
1da177e4
LT		 2314
2315 if (IS_QLA2300(ha)) {
2316 if (ha->fb_rev == FPM_2310) {
2317 strcpy(ha->model_number, "QLA2310");
2318 } else {
2319 strcpy(ha->model_number, "QLA2300");
2320 }
2321 } else {
e315cd28 2322 qla2x00_set_model_info(vha, nv->model_number,
9bb9fcf2 2323 sizeof(nv->model_number), "QLA23xx");
1da177e4
LT		 2324 }
2325 } else if (IS_QLA2200(ha)) {
2326 nv->firmware_options[0] |= BIT_2;
2327 /*
2328 * 'Point-to-point preferred, else loop' is not a safe
2329 * connection mode setting.
2330 */
2331 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
2332 (BIT_5 | BIT_4)) {
2333 /* Force 'loop preferred, else point-to-point'. */
2334 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
2335 nv->add_firmware_options[0] |= BIT_5;
2336 }
2337 strcpy(ha->model_number, "QLA22xx");
2338 } else /*if (IS_QLA2100(ha))*/ {
2339 strcpy(ha->model_number, "QLA2100");
2340 }
2341
2342 /*
2343 * Copy over NVRAM RISC parameter block to initialization control block.
2344 */
2345 dptr1 = (uint8_t *)icb;
2346 dptr2 = (uint8_t *)&nv->parameter_block_version;
2347 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
2348 while (cnt--)
2349 *dptr1++ = *dptr2++;
2350
2351 /* Copy 2nd half. */
2352 dptr1 = (uint8_t *)icb->add_firmware_options;
2353 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
2354 while (cnt--)
2355 *dptr1++ = *dptr2++;
2356
5341e868
AV		 2357 /* Use alternate WWN? */
2358 if (nv->host_p[1] & BIT_7) {
2359 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
2360 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
2361 }
2362
1da177e4
LT		 2363 /* Prepare nodename */
2364 if ((icb->firmware_options[1] & BIT_6) == 0) {
2365 /*
2366 * Firmware will apply the following mask if the nodename was
2367 * not provided.
2368 */
2369 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
2370 icb->node_name[0] &= 0xF0;
2371 }
2372
2373 /*
2374 * Set host adapter parameters.
2375 */
3ce8866c
SK		 2376
2377 /*
2378 * BIT_7 in the host-parameters section allows for modification to
2379 * internal driver logging.
2380 */
0181944f 2381 if (nv->host_p[0] & BIT_7)
3ce8866c 2382 ql2xextended_error_logging = 0x7fffffff;
1da177e4
LT		 2383 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
2384 /* Always load RISC code on non ISP2[12]00 chips. */
2385 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
2386 ha->flags.disable_risc_code_load = 0;
2387 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
2388 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
2389 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
06c22bd1 2390 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
d4c760c2 2391 ha->flags.disable_serdes = 0;
1da177e4
LT		 2392
2393 ha->operating_mode =
2394 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
2395
2396 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
2397 sizeof(ha->fw_seriallink_options));
2398
2399 /* save HBA serial number */
2400 ha->serial0 = icb->port_name[5];
2401 ha->serial1 = icb->port_name[6];
2402 ha->serial2 = icb->port_name[7];
e315cd28
AC		 2403 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
2404 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
1da177e4
LT		 2405
2406 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
2407
2408 ha->retry_count = nv->retry_count;
2409
2410 /* Set minimum login_timeout to 4 seconds. */
5b91490e 2411 if (nv->login_timeout != ql2xlogintimeout)
1da177e4
LT		 2412 nv->login_timeout = ql2xlogintimeout;
2413 if (nv->login_timeout < 4)
2414 nv->login_timeout = 4;
2415 ha->login_timeout = nv->login_timeout;
2416 icb->login_timeout = nv->login_timeout;
2417
00a537b8
AV		 2418 /* Set minimum RATOV to 100 tenths of a second. */
2419 ha->r_a_tov = 100;
1da177e4 2420
1da177e4
LT		 2421 ha->loop_reset_delay = nv->reset_delay;
2422
1da177e4
LT		 2423 /* Link Down Timeout = 0:
2424 *
2425 * When Port Down timer expires we will start returning
2426 * I/O's to OS with "DID_NO_CONNECT".
2427 *
2428 * Link Down Timeout != 0:
2429 *
2430 * The driver waits for the link to come up after link down
2431 * before returning I/Os to OS with "DID_NO_CONNECT".
fa2a1ce5 2432 */
1da177e4
LT		 2433 if (nv->link_down_timeout == 0) {
2434 ha->loop_down_abort_time =
354d6b21 2435 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
1da177e4
LT		 2436 } else {
2437 ha->link_down_timeout = nv->link_down_timeout;
2438 ha->loop_down_abort_time =
2439 (LOOP_DOWN_TIME - ha->link_down_timeout);
fa2a1ce5 2440 }
1da177e4 2441
1da177e4
LT		 2442 /*
2443 * Need enough time to try and get the port back.
2444 */
2445 ha->port_down_retry_count = nv->port_down_retry_count;
2446 if (qlport_down_retry)
2447 ha->port_down_retry_count = qlport_down_retry;
2448 /* Set login_retry_count */
2449 ha->login_retry_count = nv->retry_count;
2450 if (ha->port_down_retry_count == nv->port_down_retry_count &&
2451 ha->port_down_retry_count > 3)
2452 ha->login_retry_count = ha->port_down_retry_count;
2453 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
2454 ha->login_retry_count = ha->port_down_retry_count;
2455 if (ql2xloginretrycount)
2456 ha->login_retry_count = ql2xloginretrycount;
2457
1da177e4
LT		 2458 icb->lun_enables = __constant_cpu_to_le16(0);
2459 icb->command_resource_count = 0;
2460 icb->immediate_notify_resource_count = 0;
2461 icb->timeout = __constant_cpu_to_le16(0);
2462
2463 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
2464 /* Enable RIO */
2465 icb->firmware_options[0] &= ~BIT_3;
2466 icb->add_firmware_options[0] &=
2467 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
2468 icb->add_firmware_options[0] |= BIT_2;
2469 icb->response_accumulation_timer = 3;
2470 icb->interrupt_delay_timer = 5;
2471
e315cd28 2472 vha->flags.process_response_queue = 1;
1da177e4 2473 } else {
4fdfefe5 2474 /* Enable ZIO. */
e315cd28 2475 if (!vha->flags.init_done) {
4fdfefe5
AV		 2476 ha->zio_mode = icb->add_firmware_options[0] &
2477 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
2478 ha->zio_timer = icb->interrupt_delay_timer ?
2479 icb->interrupt_delay_timer: 2;
2480 }
1da177e4
LT		 2481 icb->add_firmware_options[0] &=
2482 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
e315cd28 2483 vha->flags.process_response_queue = 0;
4fdfefe5 2484 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4a59f71d
AV		 2485 ha->zio_mode = QLA_ZIO_MODE_6;
2486
7c3df132 2487 ql_log(ql_log_info, vha, 0x0068,
4fdfefe5
AV		 2488 "ZIO mode %d enabled; timer delay (%d us).\n",
2489 ha->zio_mode, ha->zio_timer * 100);
1da177e4 2490
4fdfefe5
AV		 2491 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
2492 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
e315cd28 2493 vha->flags.process_response_queue = 1;
1da177e4
LT		 2494 }
2495 }
2496
4e08df3f 2497 if (rval) {
7c3df132
SK		 2498 ql_log(ql_log_warn, vha, 0x0069,
2499 "NVRAM configuration failed.\n");
4e08df3f
DM		 2500 }
2501 return (rval);
1da177e4
LT		 2502}
2503
19a7b4ae
JSEC		 2504static void
2505qla2x00_rport_del(void *data)
2506{
2507 fc_port_t *fcport = data;
d97994dc 2508 struct fc_rport *rport;
044d78e1 2509 unsigned long flags;
d97994dc 2510
044d78e1 2511 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
ac280b67 2512 rport = fcport->drport ? fcport->drport: fcport->rport;
d97994dc 2513 fcport->drport = NULL;
044d78e1 2514 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
d97994dc
AV		 2515 if (rport)
2516 fc_remote_port_delete(rport);
19a7b4ae
JSEC		 2517}
2518
1da177e4
LT		 2519/**
2520 * qla2x00_alloc_fcport() - Allocate a generic fcport.
2521 * @ha: HA context
2522 * @flags: allocation flags
2523 *
2524 * Returns a pointer to the allocated fcport, or NULL, if none available.
2525 */
9a069e19 2526fc_port_t *
e315cd28 2527qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
1da177e4
LT		 2528{
2529 fc_port_t *fcport;
2530
bbfbbbc1
MK		 2531 fcport = kzalloc(sizeof(fc_port_t), flags);
2532 if (!fcport)
2533 return NULL;
1da177e4
LT		 2534
2535 /* Setup fcport template structure. */
e315cd28
AC		 2536 fcport->vha = vha;
2537 fcport->vp_idx = vha->vp_idx;
1da177e4
LT		 2538 fcport->port_type = FCT_UNKNOWN;
2539 fcport->loop_id = FC_NO_LOOP_ID;
ec426e10 2540 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
ad3e0eda 2541 fcport->supported_classes = FC_COS_UNSPECIFIED;
1da177e4 2542
bbfbbbc1 2543 return fcport;
1da177e4
LT		 2544}
2545
2546/*
2547 * qla2x00_configure_loop
2548 * Updates Fibre Channel Device Database with what is actually on loop.
2549 *
2550 * Input:
2551 * ha = adapter block pointer.
2552 *
2553 * Returns:
2554 * 0 = success.
2555 * 1 = error.
2556 * 2 = database was full and device was not configured.
2557 */
2558static int
e315cd28 2559qla2x00_configure_loop(scsi_qla_host_t *vha)
1da177e4
LT		 2560{
2561 int rval;
2562 unsigned long flags, save_flags;
e315cd28 2563 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 2564 rval = QLA_SUCCESS;
2565
2566 /* Get Initiator ID */
e315cd28
AC		 2567 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
2568 rval = qla2x00_configure_hba(vha);
1da177e4 2569 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2570 ql_dbg(ql_dbg_disc, vha, 0x2013,
2571 "Unable to configure HBA.\n");
1da177e4
LT		 2572 return (rval);
2573 }
2574 }
2575
e315cd28 2576 save_flags = flags = vha->dpc_flags;
7c3df132
SK		 2577 ql_dbg(ql_dbg_disc, vha, 0x2014,
2578 "Configure loop -- dpc flags = 0x%lx.\n", flags);
1da177e4
LT		 2579
2580 /*
2581 * If we have both an RSCN and PORT UPDATE pending then handle them
2582 * both at the same time.
2583 */
e315cd28
AC		 2584 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2585 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
1da177e4 2586
3064ff39
MH		 2587 qla2x00_get_data_rate(vha);
2588
1da177e4
LT		 2589 /* Determine what we need to do */
2590 if (ha->current_topology == ISP_CFG_FL &&
2591 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
2592
e315cd28 2593 vha->flags.rscn_queue_overflow = 1;
1da177e4
LT		 2594 set_bit(RSCN_UPDATE, &flags);
2595
2596 } else if (ha->current_topology == ISP_CFG_F &&
2597 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
2598
e315cd28 2599 vha->flags.rscn_queue_overflow = 1;
1da177e4
LT		 2600 set_bit(RSCN_UPDATE, &flags);
2601 clear_bit(LOCAL_LOOP_UPDATE, &flags);
21333b48
AV		 2602
2603 } else if (ha->current_topology == ISP_CFG_N) {
2604 clear_bit(RSCN_UPDATE, &flags);
1da177e4 2605
e315cd28 2606 } else if (!vha->flags.online ||
1da177e4
LT		 2607 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
2608
e315cd28 2609 vha->flags.rscn_queue_overflow = 1;
1da177e4
LT		 2610 set_bit(RSCN_UPDATE, &flags);
2611 set_bit(LOCAL_LOOP_UPDATE, &flags);
2612 }
2613
2614 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
7c3df132
SK		 2615 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
2616 ql_dbg(ql_dbg_disc, vha, 0x2015,
2617 "Loop resync needed, failing.\n");
1da177e4 2618 rval = QLA_FUNCTION_FAILED;
7c3df132 2619 }
e315cd28
AC		 2620 else
2621 rval = qla2x00_configure_local_loop(vha);
1da177e4
LT		 2622 }
2623
2624 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
7c3df132
SK		 2625 if (LOOP_TRANSITION(vha)) {
2626 ql_dbg(ql_dbg_disc, vha, 0x201e,
2627 "Needs RSCN update and loop transition.\n");
1da177e4 2628 rval = QLA_FUNCTION_FAILED;
7c3df132 2629 }
e315cd28
AC		 2630 else
2631 rval = qla2x00_configure_fabric(vha);
1da177e4
LT		 2632 }
2633
2634 if (rval == QLA_SUCCESS) {
e315cd28
AC		 2635 if (atomic_read(&vha->loop_down_timer) ||
2636 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1da177e4
LT		 2637 rval = QLA_FUNCTION_FAILED;
2638 } else {
e315cd28 2639 atomic_set(&vha->loop_state, LOOP_READY);
7c3df132
SK		 2640 ql_dbg(ql_dbg_disc, vha, 0x2069,
2641 "LOOP READY.\n");
1da177e4
LT		 2642 }
2643 }
2644
2645 if (rval) {
7c3df132
SK		 2646 ql_dbg(ql_dbg_disc, vha, 0x206a,
2647 "%s *** FAILED ***.\n", __func__);
1da177e4 2648 } else {
7c3df132
SK		 2649 ql_dbg(ql_dbg_disc, vha, 0x206b,
2650 "%s: exiting normally.\n", __func__);
1da177e4
LT		 2651 }
2652
cc3ef7bc 2653 /* Restore state if a resync event occurred during processing */
e315cd28 2654 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1da177e4 2655 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
e315cd28 2656 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
f4658b6c 2657 if (test_bit(RSCN_UPDATE, &save_flags)) {
e315cd28 2658 set_bit(RSCN_UPDATE, &vha->dpc_flags);
3a6478df
GM		 2659 if (!IS_ALOGIO_CAPABLE(ha))
2660 vha->flags.rscn_queue_overflow = 1;
f4658b6c 2661 }
1da177e4
LT		 2662 }
2663
2664 return (rval);
2665}
2666
2667
2668
2669/*
2670 * qla2x00_configure_local_loop
2671 * Updates Fibre Channel Device Database with local loop devices.
2672 *
2673 * Input:
2674 * ha = adapter block pointer.
2675 *
2676 * Returns:
2677 * 0 = success.
2678 */
2679static int
e315cd28 2680qla2x00_configure_local_loop(scsi_qla_host_t *vha)
1da177e4
LT		 2681{
2682 int rval, rval2;
2683 int found_devs;
2684 int found;
2685 fc_port_t *fcport, *new_fcport;
2686
2687 uint16_t index;
2688 uint16_t entries;
2689 char *id_iter;
2690 uint16_t loop_id;
2691 uint8_t domain, area, al_pa;
e315cd28 2692 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 2693
2694 found_devs = 0;
2695 new_fcport = NULL;
2696 entries = MAX_FIBRE_DEVICES;
2697
7c3df132
SK		 2698 ql_dbg(ql_dbg_disc, vha, 0x2016,
2699 "Getting FCAL position map.\n");
2700 if (ql2xextended_error_logging & ql_dbg_disc)
2701 qla2x00_get_fcal_position_map(vha, NULL);
1da177e4
LT		 2702
2703 /* Get list of logged in devices. */
2704 memset(ha->gid_list, 0, GID_LIST_SIZE);
e315cd28 2705 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
1da177e4
LT		 2706 &entries);
2707 if (rval != QLA_SUCCESS)
2708 goto cleanup_allocation;
2709
7c3df132
SK		 2710 ql_dbg(ql_dbg_disc, vha, 0x2017,
2711 "Entries in ID list (%d).\n", entries);
2712 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
2713 (uint8_t *)ha->gid_list,
2714 entries * sizeof(struct gid_list_info));
1da177e4
LT		 2715
2716 /* Allocate temporary fcport for any new fcports discovered. */
e315cd28 2717 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 2718 if (new_fcport == NULL) {
7c3df132
SK		 2719 ql_log(ql_log_warn, vha, 0x2018,
2720 "Memory allocation failed for fcport.\n");
1da177e4
LT		 2721 rval = QLA_MEMORY_ALLOC_FAILED;
2722 goto cleanup_allocation;
2723 }
2724 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
2725
2726 /*
2727 * Mark local devices that were present with FCF_DEVICE_LOST for now.
2728 */
e315cd28 2729 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 2730 if (atomic_read(&fcport->state) == FCS_ONLINE &&
2731 fcport->port_type != FCT_BROADCAST &&
2732 (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
2733
7c3df132
SK		 2734 ql_dbg(ql_dbg_disc, vha, 0x2019,
2735 "Marking port lost loop_id=0x%04x.\n",
2736 fcport->loop_id);
1da177e4 2737
ec426e10 2738 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
1da177e4
LT		 2739 }
2740 }
2741
2742 /* Add devices to port list. */
2743 id_iter = (char *)ha->gid_list;
2744 for (index = 0; index < entries; index++) {
2745 domain = ((struct gid_list_info *)id_iter)->domain;
2746 area = ((struct gid_list_info *)id_iter)->area;
2747 al_pa = ((struct gid_list_info *)id_iter)->al_pa;
abbd8870 2748 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1da177e4
LT		 2749 loop_id = (uint16_t)
2750 ((struct gid_list_info *)id_iter)->loop_id_2100;
abbd8870 2751 else
1da177e4
LT		 2752 loop_id = le16_to_cpu(
2753 ((struct gid_list_info *)id_iter)->loop_id);
abbd8870 2754 id_iter += ha->gid_list_info_size;
1da177e4
LT		 2755
2756 /* Bypass reserved domain fields. */
2757 if ((domain & 0xf0) == 0xf0)
2758 continue;
2759
2760 /* Bypass if not same domain and area of adapter. */
f7d289f6 2761 if (area && domain &&
e315cd28 2762 (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
1da177e4
LT		 2763 continue;
2764
2765 /* Bypass invalid local loop ID. */
2766 if (loop_id > LAST_LOCAL_LOOP_ID)
2767 continue;
2768
2769 /* Fill in member data. */
2770 new_fcport->d_id.b.domain = domain;
2771 new_fcport->d_id.b.area = area;
2772 new_fcport->d_id.b.al_pa = al_pa;
2773 new_fcport->loop_id = loop_id;
e315cd28
AC		 2774 new_fcport->vp_idx = vha->vp_idx;
2775 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
1da177e4 2776 if (rval2 != QLA_SUCCESS) {
7c3df132
SK		 2777 ql_dbg(ql_dbg_disc, vha, 0x201a,
2778 "Failed to retrieve fcport information "
2779 "-- get_port_database=%x, loop_id=0x%04x.\n",
2780 rval2, new_fcport->loop_id);
2781 ql_dbg(ql_dbg_disc, vha, 0x201b,
2782 "Scheduling resync.\n");
e315cd28 2783 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1da177e4
LT		 2784 continue;
2785 }
2786
2787 /* Check for matching device in port list. */
2788 found = 0;
2789 fcport = NULL;
e315cd28 2790 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 2791 if (memcmp(new_fcport->port_name, fcport->port_name,
2792 WWN_SIZE))
2793 continue;
2794
ddb9b126 2795 fcport->flags &= ~FCF_FABRIC_DEVICE;
1da177e4
LT		 2796 fcport->loop_id = new_fcport->loop_id;
2797 fcport->port_type = new_fcport->port_type;
2798 fcport->d_id.b24 = new_fcport->d_id.b24;
2799 memcpy(fcport->node_name, new_fcport->node_name,
2800 WWN_SIZE);
2801
2802 found++;
2803 break;
2804 }
2805
2806 if (!found) {
2807 /* New device, add to fcports list. */
e315cd28
AC		 2808 if (vha->vp_idx) {
2809 new_fcport->vha = vha;
2810 new_fcport->vp_idx = vha->vp_idx;
2c3dfe3f 2811 }
e315cd28 2812 list_add_tail(&new_fcport->list, &vha->vp_fcports);
1da177e4
LT		 2813
2814 /* Allocate a new replacement fcport. */
2815 fcport = new_fcport;
e315cd28 2816 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 2817 if (new_fcport == NULL) {
7c3df132
SK		 2818 ql_log(ql_log_warn, vha, 0x201c,
2819 "Failed to allocate memory for fcport.\n");
1da177e4
LT		 2820 rval = QLA_MEMORY_ALLOC_FAILED;
2821 goto cleanup_allocation;
2822 }
2823 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
2824 }
2825
d8b45213 2826 /* Base iIDMA settings on HBA port speed. */
a3cbdfad 2827 fcport->fp_speed = ha->link_data_rate;
d8b45213 2828
e315cd28 2829 qla2x00_update_fcport(vha, fcport);
1da177e4
LT		 2830
2831 found_devs++;
2832 }
2833
2834cleanup_allocation:
c9475cb0 2835 kfree(new_fcport);
1da177e4
LT		 2836
2837 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2838 ql_dbg(ql_dbg_disc, vha, 0x201d,
2839 "Configure local loop error exit: rval=%x.\n", rval);
1da177e4
LT		 2840 }
2841
1da177e4
LT		 2842 return (rval);
2843}
2844
d8b45213 2845static void
e315cd28 2846qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
d8b45213
AV		 2847{
2848#define LS_UNKNOWN 2
9f8fddee
AV		 2849 static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
2850 char *link_speed;
d8b45213 2851 int rval;
1bb39548 2852 uint16_t mb[4];
e315cd28 2853 struct qla_hw_data *ha = vha->hw;
d8b45213 2854
c76f2c01 2855 if (!IS_IIDMA_CAPABLE(ha))
d8b45213
AV		 2856 return;
2857
c9afb9a2
GM		 2858 if (atomic_read(&fcport->state) != FCS_ONLINE)
2859 return;
2860
39bd9622
AV		 2861 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
2862 fcport->fp_speed > ha->link_data_rate)
d8b45213
AV		 2863 return;
2864
e315cd28 2865 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
a3cbdfad 2866 mb);
d8b45213 2867 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2868 ql_dbg(ql_dbg_disc, vha, 0x2004,
2869 "Unable to adjust iIDMA "
2870 "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x "
2871 "%04x.\n", fcport->port_name[0], fcport->port_name[1],
d8b45213
AV		 2872 fcport->port_name[2], fcport->port_name[3],
2873 fcport->port_name[4], fcport->port_name[5],
2874 fcport->port_name[6], fcport->port_name[7], rval,
7c3df132 2875 fcport->fp_speed, mb[0], mb[1]);
d8b45213 2876 } else {
9f8fddee
AV		 2877 link_speed = link_speeds[LS_UNKNOWN];
2878 if (fcport->fp_speed < 5)
2879 link_speed = link_speeds[fcport->fp_speed];
2880 else if (fcport->fp_speed == 0x13)
2881 link_speed = link_speeds[5];
7c3df132
SK		 2882 ql_dbg(ql_dbg_disc, vha, 0x2005,
2883 "iIDMA adjusted to %s GB/s "
2884 "on %02x%02x%02x%02x%02x%02x%02x%02x.\n", link_speed,
2885 fcport->port_name[0], fcport->port_name[1],
2886 fcport->port_name[2], fcport->port_name[3],
2887 fcport->port_name[4], fcport->port_name[5],
2888 fcport->port_name[6], fcport->port_name[7]);
d8b45213
AV		 2889 }
2890}
2891
23be331d 2892static void
e315cd28 2893qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
8482e118
AV		 2894{
2895 struct fc_rport_identifiers rport_ids;
bdf79621 2896 struct fc_rport *rport;
044d78e1 2897 unsigned long flags;
8482e118 2898
ac280b67 2899 qla2x00_rport_del(fcport);
8482e118 2900
f8b02a85
AV		 2901 rport_ids.node_name = wwn_to_u64(fcport->node_name);
2902 rport_ids.port_name = wwn_to_u64(fcport->port_name);
8482e118
AV		 2903 rport_ids.port_id = fcport->d_id.b.domain << 16 |
2904 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
77d74143 2905 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
e315cd28 2906 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
77d74143 2907 if (!rport) {
7c3df132
SK		 2908 ql_log(ql_log_warn, vha, 0x2006,
2909 "Unable to allocate fc remote port.\n");
77d74143
AV		 2910 return;
2911 }
044d78e1 2912 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
19a7b4ae 2913 *((fc_port_t **)rport->dd_data) = fcport;
044d78e1 2914 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
d97994dc 2915
ad3e0eda 2916 rport->supported_classes = fcport->supported_classes;
77d74143 2917
8482e118
AV		 2918 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
2919 if (fcport->port_type == FCT_INITIATOR)
2920 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
2921 if (fcport->port_type == FCT_TARGET)
2922 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
77d74143 2923 fc_remote_port_rolechg(rport, rport_ids.roles);
1da177e4
LT		 2924}
2925
23be331d
AB		 2926/*
2927 * qla2x00_update_fcport
2928 * Updates device on list.
2929 *
2930 * Input:
2931 * ha = adapter block pointer.
2932 * fcport = port structure pointer.
2933 *
2934 * Return:
2935 * 0 - Success
2936 * BIT_0 - error
2937 *
2938 * Context:
2939 * Kernel context.
2940 */
2941void
e315cd28 2942qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
23be331d 2943{
e315cd28 2944 fcport->vha = vha;
23be331d 2945 fcport->login_retry = 0;
5ff1d584 2946 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
23be331d 2947
e315cd28 2948 qla2x00_iidma_fcport(vha, fcport);
21090cbe 2949 qla24xx_update_fcport_fcp_prio(vha, fcport);
e315cd28 2950 qla2x00_reg_remote_port(vha, fcport);
ec426e10 2951 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
23be331d
AB		 2952}
2953
1da177e4
LT		 2954/*
2955 * qla2x00_configure_fabric
2956 * Setup SNS devices with loop ID's.
2957 *
2958 * Input:
2959 * ha = adapter block pointer.
2960 *
2961 * Returns:
2962 * 0 = success.
2963 * BIT_0 = error
2964 */
2965static int
e315cd28 2966qla2x00_configure_fabric(scsi_qla_host_t *vha)
1da177e4
LT		 2967{
2968 int rval, rval2;
2969 fc_port_t *fcport, *fcptemp;
2970 uint16_t next_loopid;
2971 uint16_t mb[MAILBOX_REGISTER_COUNT];
0107109e 2972 uint16_t loop_id;
1da177e4 2973 LIST_HEAD(new_fcports);
e315cd28
AC		 2974 struct qla_hw_data *ha = vha->hw;
2975 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
1da177e4
LT		 2976
2977 /* If FL port exists, then SNS is present */
e428924c 2978 if (IS_FWI2_CAPABLE(ha))
0107109e
AV		 2979 loop_id = NPH_F_PORT;
2980 else
2981 loop_id = SNS_FL_PORT;
e315cd28 2982 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
1da177e4 2983 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2984 ql_dbg(ql_dbg_disc, vha, 0x201f,
2985 "MBX_GET_PORT_NAME failed, No FL Port.\n");
1da177e4 2986
e315cd28 2987 vha->device_flags &= ~SWITCH_FOUND;
1da177e4
LT		 2988 return (QLA_SUCCESS);
2989 }
e315cd28 2990 vha->device_flags |= SWITCH_FOUND;
1da177e4
LT		 2991
2992 /* Mark devices that need re-synchronization. */
e315cd28 2993 rval2 = qla2x00_device_resync(vha);
1da177e4
LT		 2994 if (rval2 == QLA_RSCNS_HANDLED) {
2995 /* No point doing the scan, just continue. */
2996 return (QLA_SUCCESS);
2997 }
2998 do {
cca5335c
AV		 2999 /* FDMI support. */
3000 if (ql2xfdmienable &&
e315cd28
AC		 3001 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
3002 qla2x00_fdmi_register(vha);
cca5335c 3003
1da177e4 3004 /* Ensure we are logged into the SNS. */
e428924c 3005 if (IS_FWI2_CAPABLE(ha))
0107109e
AV		 3006 loop_id = NPH_SNS;
3007 else
3008 loop_id = SIMPLE_NAME_SERVER;
e315cd28 3009 ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
abbd8870 3010 0xfc, mb, BIT_1 | BIT_0);
1da177e4 3011 if (mb[0] != MBS_COMMAND_COMPLETE) {
7c3df132
SK		 3012 ql_dbg(ql_dbg_disc, vha, 0x2042,
3013 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x "
3014 "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1],
3015 mb[2], mb[6], mb[7]);
1da177e4
LT		 3016 return (QLA_SUCCESS);
3017 }
3018
e315cd28
AC		 3019 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
3020 if (qla2x00_rft_id(vha)) {
1da177e4 3021 /* EMPTY */
7c3df132
SK		 3022 ql_dbg(ql_dbg_disc, vha, 0x2045,
3023 "Register FC-4 TYPE failed.\n");
1da177e4 3024 }
e315cd28 3025 if (qla2x00_rff_id(vha)) {
1da177e4 3026 /* EMPTY */
7c3df132
SK		 3027 ql_dbg(ql_dbg_disc, vha, 0x2049,
3028 "Register FC-4 Features failed.\n");
1da177e4 3029 }
e315cd28 3030 if (qla2x00_rnn_id(vha)) {
1da177e4 3031 /* EMPTY */
7c3df132
SK		 3032 ql_dbg(ql_dbg_disc, vha, 0x204f,
3033 "Register Node Name failed.\n");
e315cd28 3034 } else if (qla2x00_rsnn_nn(vha)) {
1da177e4 3035 /* EMPTY */
7c3df132
SK		 3036 ql_dbg(ql_dbg_disc, vha, 0x2053,
3037 "Register Symobilic Node Name failed.\n");
1da177e4
LT		 3038 }
3039 }
3040
e315cd28 3041 rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
1da177e4
LT		 3042 if (rval != QLA_SUCCESS)
3043 break;
3044
3045 /*
3046 * Logout all previous fabric devices marked lost, except
f08b7251 3047 * FCP2 devices.
1da177e4 3048 */
e315cd28
AC		 3049 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3050 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1da177e4
LT		 3051 break;
3052
3053 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
3054 continue;
3055
3056 if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
e315cd28 3057 qla2x00_mark_device_lost(vha, fcport,
d97994dc 3058 ql2xplogiabsentdevice, 0);
1da177e4 3059 if (fcport->loop_id != FC_NO_LOOP_ID &&
f08b7251 3060 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
1da177e4
LT		 3061 fcport->port_type != FCT_INITIATOR &&
3062 fcport->port_type != FCT_BROADCAST) {
e315cd28 3063 ha->isp_ops->fabric_logout(vha,
1c7c6357
AV		 3064 fcport->loop_id,
3065 fcport->d_id.b.domain,
3066 fcport->d_id.b.area,
3067 fcport->d_id.b.al_pa);
1da177e4
LT		 3068 fcport->loop_id = FC_NO_LOOP_ID;
3069 }
3070 }
3071 }
3072
3073 /* Starting free loop ID. */
e315cd28 3074 next_loopid = ha->min_external_loopid;
1da177e4
LT		 3075
3076 /*
3077 * Scan through our port list and login entries that need to be
3078 * logged in.
3079 */
e315cd28
AC		 3080 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3081 if (atomic_read(&vha->loop_down_timer) ||
3082 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1da177e4
LT		 3083 break;
3084
3085 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
3086 (fcport->flags & FCF_LOGIN_NEEDED) == 0)
3087 continue;
3088
3089 if (fcport->loop_id == FC_NO_LOOP_ID) {
3090 fcport->loop_id = next_loopid;
d4486fd6 3091 rval = qla2x00_find_new_loop_id(
e315cd28 3092 base_vha, fcport);
1da177e4
LT		 3093 if (rval != QLA_SUCCESS) {
3094 /* Ran out of IDs to use */
3095 break;
3096 }
3097 }
1da177e4 3098 /* Login and update database */
e315cd28 3099 qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
1da177e4
LT		 3100 }
3101
3102 /* Exit if out of loop IDs. */
3103 if (rval != QLA_SUCCESS) {
3104 break;
3105 }
3106
3107 /*
3108 * Login and add the new devices to our port list.
3109 */
3110 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
e315cd28
AC		 3111 if (atomic_read(&vha->loop_down_timer) ||
3112 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1da177e4
LT		 3113 break;
3114
3115 /* Find a new loop ID to use. */
3116 fcport->loop_id = next_loopid;
e315cd28 3117 rval = qla2x00_find_new_loop_id(base_vha, fcport);
1da177e4
LT		 3118 if (rval != QLA_SUCCESS) {
3119 /* Ran out of IDs to use */
3120 break;
3121 }
3122
bdf79621 3123 /* Login and update database */
e315cd28
AC		 3124 qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
3125
3126 if (vha->vp_idx) {
3127 fcport->vha = vha;
3128 fcport->vp_idx = vha->vp_idx;
3129 }
3130 list_move_tail(&fcport->list, &vha->vp_fcports);
1da177e4
LT		 3131 }
3132 } while (0);
3133
3134 /* Free all new device structures not processed. */
3135 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
3136 list_del(&fcport->list);
3137 kfree(fcport);
3138 }
3139
3140 if (rval) {
7c3df132
SK		 3141 ql_dbg(ql_dbg_disc, vha, 0x2068,
3142 "Configure fabric error exit rval=%d.\n", rval);
1da177e4
LT		 3143 }
3144
3145 return (rval);
3146}
3147
1da177e4
LT		 3148/*
3149 * qla2x00_find_all_fabric_devs
3150 *
3151 * Input:
3152 * ha = adapter block pointer.
3153 * dev = database device entry pointer.
3154 *
3155 * Returns:
3156 * 0 = success.
3157 *
3158 * Context:
3159 * Kernel context.
3160 */
3161static int
e315cd28
AC		 3162qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
3163 struct list_head *new_fcports)
1da177e4
LT		 3164{
3165 int rval;
3166 uint16_t loop_id;
3167 fc_port_t *fcport, *new_fcport, *fcptemp;
3168 int found;
3169
3170 sw_info_t *swl;
3171 int swl_idx;
3172 int first_dev, last_dev;
1516ef44 3173 port_id_t wrap = {}, nxt_d_id;
e315cd28
AC		 3174 struct qla_hw_data *ha = vha->hw;
3175 struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
ee546b6e 3176 struct scsi_qla_host *tvp;
1da177e4
LT		 3177
3178 rval = QLA_SUCCESS;
3179
3180 /* Try GID_PT to get device list, else GAN. */
4b89258c 3181 swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
bbfbbbc1 3182 if (!swl) {
1da177e4 3183 /*EMPTY*/
7c3df132
SK		 3184 ql_dbg(ql_dbg_disc, vha, 0x2054,
3185 "GID_PT allocations failed, fallback on GA_NXT.\n");
1da177e4 3186 } else {
e315cd28 3187 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
1da177e4
LT		 3188 kfree(swl);
3189 swl = NULL;
e315cd28 3190 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
1da177e4
LT		 3191 kfree(swl);
3192 swl = NULL;
e315cd28 3193 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
1da177e4
LT		 3194 kfree(swl);
3195 swl = NULL;
e5896bd5 3196 } else if (ql2xiidmaenable &&
e315cd28
AC		 3197 qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
3198 qla2x00_gpsc(vha, swl);
1da177e4 3199 }
e8c72ba5
CD		 3200
3201 /* If other queries succeeded probe for FC-4 type */
3202 if (swl)
3203 qla2x00_gff_id(vha, swl);
1da177e4
LT		 3204 }
3205 swl_idx = 0;
3206
3207 /* Allocate temporary fcport for any new fcports discovered. */
e315cd28 3208 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 3209 if (new_fcport == NULL) {
7c3df132
SK		 3210 ql_log(ql_log_warn, vha, 0x205e,
3211 "Failed to allocate memory for fcport.\n");
c9475cb0 3212 kfree(swl);
1da177e4
LT		 3213 return (QLA_MEMORY_ALLOC_FAILED);
3214 }
3215 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
1da177e4
LT		 3216 /* Set start port ID scan at adapter ID. */
3217 first_dev = 1;
3218 last_dev = 0;
3219
3220 /* Starting free loop ID. */
e315cd28
AC		 3221 loop_id = ha->min_external_loopid;
3222 for (; loop_id <= ha->max_loop_id; loop_id++) {
3223 if (qla2x00_is_reserved_id(vha, loop_id))
1da177e4
LT		 3224 continue;
3225
3a6478df
GM		 3226 if (ha->current_topology == ISP_CFG_FL &&
3227 (atomic_read(&vha->loop_down_timer) ||
3228 LOOP_TRANSITION(vha))) {
bb2d52b2
AV		 3229 atomic_set(&vha->loop_down_timer, 0);
3230 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3231 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1da177e4 3232 break;
bb2d52b2 3233 }
1da177e4
LT		 3234
3235 if (swl != NULL) {
3236 if (last_dev) {
3237 wrap.b24 = new_fcport->d_id.b24;
3238 } else {
3239 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
3240 memcpy(new_fcport->node_name,
3241 swl[swl_idx].node_name, WWN_SIZE);
3242 memcpy(new_fcport->port_name,
3243 swl[swl_idx].port_name, WWN_SIZE);
d8b45213
AV		 3244 memcpy(new_fcport->fabric_port_name,
3245 swl[swl_idx].fabric_port_name, WWN_SIZE);
3246 new_fcport->fp_speed = swl[swl_idx].fp_speed;
e8c72ba5 3247 new_fcport->fc4_type = swl[swl_idx].fc4_type;
1da177e4
LT		 3248
3249 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
3250 last_dev = 1;
3251 }
3252 swl_idx++;
3253 }
3254 } else {
3255 /* Send GA_NXT to the switch */
e315cd28 3256 rval = qla2x00_ga_nxt(vha, new_fcport);
1da177e4 3257 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3258 ql_log(ql_log_warn, vha, 0x2064,
3259 "SNS scan failed -- assuming "
3260 "zero-entry result.\n");
1da177e4
LT		 3261 list_for_each_entry_safe(fcport, fcptemp,
3262 new_fcports, list) {
3263 list_del(&fcport->list);
3264 kfree(fcport);
3265 }
3266 rval = QLA_SUCCESS;
3267 break;
3268 }
3269 }
3270
3271 /* If wrap on switch device list, exit. */
3272 if (first_dev) {
3273 wrap.b24 = new_fcport->d_id.b24;
3274 first_dev = 0;
3275 } else if (new_fcport->d_id.b24 == wrap.b24) {
7c3df132
SK		 3276 ql_dbg(ql_dbg_disc, vha, 0x2065,
3277 "Device wrap (%02x%02x%02x).\n",
3278 new_fcport->d_id.b.domain,
3279 new_fcport->d_id.b.area,
3280 new_fcport->d_id.b.al_pa);
1da177e4
LT		 3281 break;
3282 }
3283
2c3dfe3f 3284 /* Bypass if same physical adapter. */
e315cd28 3285 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
1da177e4
LT		 3286 continue;
3287
2c3dfe3f 3288 /* Bypass virtual ports of the same host. */
e315cd28
AC		 3289 found = 0;
3290 if (ha->num_vhosts) {
feafb7b1
AE		 3291 unsigned long flags;
3292
3293 spin_lock_irqsave(&ha->vport_slock, flags);
ee546b6e 3294 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
e315cd28
AC		 3295 if (new_fcport->d_id.b24 == vp->d_id.b24) {
3296 found = 1;
2c3dfe3f 3297 break;
e315cd28 3298 }
2c3dfe3f 3299 }
feafb7b1
AE		 3300 spin_unlock_irqrestore(&ha->vport_slock, flags);
3301
e315cd28 3302 if (found)
2c3dfe3f
SJ		 3303 continue;
3304 }
3305
f7d289f6
AV		 3306 /* Bypass if same domain and area of adapter. */
3307 if (((new_fcport->d_id.b24 & 0xffff00) ==
e315cd28 3308 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
f7d289f6
AV		 3309 ISP_CFG_FL)
3310 continue;
3311
1da177e4
LT		 3312 /* Bypass reserved domain fields. */
3313 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
3314 continue;
3315
e8c72ba5 3316 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
4da26e16
CD		 3317 if (ql2xgffidenable &&
3318 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
3319 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
e8c72ba5
CD		 3320 continue;
3321
1da177e4
LT		 3322 /* Locate matching device in database. */
3323 found = 0;
e315cd28 3324 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 3325 if (memcmp(new_fcport->port_name, fcport->port_name,
3326 WWN_SIZE))
3327 continue;
3328
3329 found++;
3330
d8b45213
AV		 3331 /* Update port state. */
3332 memcpy(fcport->fabric_port_name,
3333 new_fcport->fabric_port_name, WWN_SIZE);
3334 fcport->fp_speed = new_fcport->fp_speed;
3335
1da177e4
LT		 3336 /*
3337 * If address the same and state FCS_ONLINE, nothing
3338 * changed.
3339 */
3340 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
3341 atomic_read(&fcport->state) == FCS_ONLINE) {
3342 break;
3343 }
3344
3345 /*
3346 * If device was not a fabric device before.
3347 */
3348 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
3349 fcport->d_id.b24 = new_fcport->d_id.b24;
3350 fcport->loop_id = FC_NO_LOOP_ID;
3351 fcport->flags |= (FCF_FABRIC_DEVICE |
3352 FCF_LOGIN_NEEDED);
1da177e4
LT		 3353 break;
3354 }
3355
3356 /*
3357 * Port ID changed or device was marked to be updated;
3358 * Log it out if still logged in and mark it for
3359 * relogin later.
3360 */
3361 fcport->d_id.b24 = new_fcport->d_id.b24;
3362 fcport->flags |= FCF_LOGIN_NEEDED;
3363 if (fcport->loop_id != FC_NO_LOOP_ID &&
f08b7251 3364 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
1da177e4
LT		 3365 fcport->port_type != FCT_INITIATOR &&
3366 fcport->port_type != FCT_BROADCAST) {
e315cd28 3367 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 3368 fcport->d_id.b.domain, fcport->d_id.b.area,
3369 fcport->d_id.b.al_pa);
1da177e4
LT		 3370 fcport->loop_id = FC_NO_LOOP_ID;
3371 }
3372
3373 break;
3374 }
3375
3376 if (found)
3377 continue;
1da177e4
LT		 3378 /* If device was not in our fcports list, then add it. */
3379 list_add_tail(&new_fcport->list, new_fcports);
3380
3381 /* Allocate a new replacement fcport. */
3382 nxt_d_id.b24 = new_fcport->d_id.b24;
e315cd28 3383 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 3384 if (new_fcport == NULL) {
7c3df132
SK		 3385 ql_log(ql_log_warn, vha, 0x2066,
3386 "Memory allocation failed for fcport.\n");
c9475cb0 3387 kfree(swl);
1da177e4
LT		 3388 return (QLA_MEMORY_ALLOC_FAILED);
3389 }
3390 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
3391 new_fcport->d_id.b24 = nxt_d_id.b24;
3392 }
3393
c9475cb0
JJ		 3394 kfree(swl);
3395 kfree(new_fcport);
1da177e4 3396
1da177e4
LT		 3397 return (rval);
3398}
3399
3400/*
3401 * qla2x00_find_new_loop_id
3402 * Scan through our port list and find a new usable loop ID.
3403 *
3404 * Input:
3405 * ha: adapter state pointer.
3406 * dev: port structure pointer.
3407 *
3408 * Returns:
3409 * qla2x00 local function return status code.
3410 *
3411 * Context:
3412 * Kernel context.
3413 */
03bcfb57 3414int
e315cd28 3415qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
1da177e4
LT		 3416{
3417 int rval;
3418 int found;
3419 fc_port_t *fcport;
3420 uint16_t first_loop_id;
e315cd28
AC		 3421 struct qla_hw_data *ha = vha->hw;
3422 struct scsi_qla_host *vp;
ee546b6e 3423 struct scsi_qla_host *tvp;
feafb7b1 3424 unsigned long flags = 0;
1da177e4
LT		 3425
3426 rval = QLA_SUCCESS;
3427
3428 /* Save starting loop ID. */
3429 first_loop_id = dev->loop_id;
3430
3431 for (;;) {
3432 /* Skip loop ID if already used by adapter. */
e315cd28 3433 if (dev->loop_id == vha->loop_id)
1da177e4 3434 dev->loop_id++;
1da177e4
LT		 3435
3436 /* Skip reserved loop IDs. */
e315cd28 3437 while (qla2x00_is_reserved_id(vha, dev->loop_id))
1da177e4 3438 dev->loop_id++;
1da177e4
LT		 3439
3440 /* Reset loop ID if passed the end. */
e315cd28 3441 if (dev->loop_id > ha->max_loop_id) {
1da177e4
LT		 3442 /* first loop ID. */
3443 dev->loop_id = ha->min_external_loopid;
3444 }
3445
3446 /* Check for loop ID being already in use. */
3447 found = 0;
3448 fcport = NULL;
feafb7b1
AE		 3449
3450 spin_lock_irqsave(&ha->vport_slock, flags);
ee546b6e 3451 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
e315cd28
AC		 3452 list_for_each_entry(fcport, &vp->vp_fcports, list) {
3453 if (fcport->loop_id == dev->loop_id &&
3454 fcport != dev) {
3455 /* ID possibly in use */
3456 found++;
3457 break;
3458 }
1da177e4 3459 }
e315cd28
AC		 3460 if (found)
3461 break;
1da177e4 3462 }
feafb7b1 3463 spin_unlock_irqrestore(&ha->vport_slock, flags);
1da177e4
LT		 3464
3465 /* If not in use then it is free to use. */
3466 if (!found) {
3467 break;
3468 }
3469
3470 /* ID in use. Try next value. */
3471 dev->loop_id++;
3472
3473 /* If wrap around. No free ID to use. */
3474 if (dev->loop_id == first_loop_id) {
3475 dev->loop_id = FC_NO_LOOP_ID;
3476 rval = QLA_FUNCTION_FAILED;
3477 break;
3478 }
3479 }
3480
3481 return (rval);
3482}
3483
3484/*
3485 * qla2x00_device_resync
3486 * Marks devices in the database that needs resynchronization.
3487 *
3488 * Input:
3489 * ha = adapter block pointer.
3490 *
3491 * Context:
3492 * Kernel context.
3493 */
3494static int
e315cd28 3495qla2x00_device_resync(scsi_qla_host_t *vha)
1da177e4
LT		 3496{
3497 int rval;
1da177e4
LT		 3498 uint32_t mask;
3499 fc_port_t *fcport;
3500 uint32_t rscn_entry;
3501 uint8_t rscn_out_iter;
3502 uint8_t format;
1516ef44 3503 port_id_t d_id = {};
1da177e4
LT		 3504
3505 rval = QLA_RSCNS_HANDLED;
3506
e315cd28
AC		 3507 while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
3508 vha->flags.rscn_queue_overflow) {
1da177e4 3509
e315cd28 3510 rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
1da177e4
LT		 3511 format = MSB(MSW(rscn_entry));
3512 d_id.b.domain = LSB(MSW(rscn_entry));
3513 d_id.b.area = MSB(LSW(rscn_entry));
3514 d_id.b.al_pa = LSB(LSW(rscn_entry));
3515
7c3df132
SK		 3516 ql_dbg(ql_dbg_disc, vha, 0x2020,
3517 "RSCN queue entry[%d] = [%02x/%02x%02x%02x].\n",
3518 vha->rscn_out_ptr, format, d_id.b.domain, d_id.b.area,
3519 d_id.b.al_pa);
1da177e4 3520
e315cd28
AC		 3521 vha->rscn_out_ptr++;
3522 if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
3523 vha->rscn_out_ptr = 0;
1da177e4
LT		 3524
3525 /* Skip duplicate entries. */
e315cd28
AC		 3526 for (rscn_out_iter = vha->rscn_out_ptr;
3527 !vha->flags.rscn_queue_overflow &&
3528 rscn_out_iter != vha->rscn_in_ptr;
1da177e4
LT		 3529 rscn_out_iter = (rscn_out_iter ==
3530 (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
3531
e315cd28 3532 if (rscn_entry != vha->rscn_queue[rscn_out_iter])
1da177e4
LT		 3533 break;
3534
7c3df132
SK		 3535 ql_dbg(ql_dbg_disc, vha, 0x2021,
3536 "Skipping duplicate RSCN queue entry found at "
3537 "[%d].\n", rscn_out_iter);
1da177e4 3538
e315cd28 3539 vha->rscn_out_ptr = rscn_out_iter;
1da177e4
LT		 3540 }
3541
3542 /* Queue overflow, set switch default case. */
e315cd28 3543 if (vha->flags.rscn_queue_overflow) {
7c3df132
SK		 3544 ql_dbg(ql_dbg_disc, vha, 0x2022,
3545 "device_resync: rscn overflow.\n");
1da177e4
LT		 3546
3547 format = 3;
e315cd28 3548 vha->flags.rscn_queue_overflow = 0;
1da177e4
LT		 3549 }
3550
3551 switch (format) {
3552 case 0:
1da177e4
LT		 3553 mask = 0xffffff;
3554 break;
3555 case 1:
3556 mask = 0xffff00;
3557 break;
3558 case 2:
3559 mask = 0xff0000;
3560 break;
3561 default:
3562 mask = 0x0;
3563 d_id.b24 = 0;
e315cd28 3564 vha->rscn_out_ptr = vha->rscn_in_ptr;
1da177e4
LT		 3565 break;
3566 }
3567
3568 rval = QLA_SUCCESS;
3569
e315cd28 3570 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 3571 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
3572 (fcport->d_id.b24 & mask) != d_id.b24 ||
3573 fcport->port_type == FCT_BROADCAST)
3574 continue;
3575
3576 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3577 if (format != 3 ||
3578 fcport->port_type != FCT_INITIATOR) {
e315cd28 3579 qla2x00_mark_device_lost(vha, fcport,
d97994dc 3580 0, 0);
1da177e4
LT		 3581 }
3582 }
1da177e4
LT		 3583 }
3584 }
3585 return (rval);
3586}
3587
3588/*
3589 * qla2x00_fabric_dev_login
3590 * Login fabric target device and update FC port database.
3591 *
3592 * Input:
3593 * ha: adapter state pointer.
3594 * fcport: port structure list pointer.
3595 * next_loopid: contains value of a new loop ID that can be used
3596 * by the next login attempt.
3597 *
3598 * Returns:
3599 * qla2x00 local function return status code.
3600 *
3601 * Context:
3602 * Kernel context.
3603 */
3604static int
e315cd28 3605qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
1da177e4
LT		 3606 uint16_t *next_loopid)
3607{
3608 int rval;
3609 int retry;
0107109e 3610 uint8_t opts;
e315cd28 3611 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 3612
3613 rval = QLA_SUCCESS;
3614 retry = 0;
3615
ac280b67 3616 if (IS_ALOGIO_CAPABLE(ha)) {
5ff1d584
AV		 3617 if (fcport->flags & FCF_ASYNC_SENT)
3618 return rval;
3619 fcport->flags |= FCF_ASYNC_SENT;
ac280b67
AV		 3620 rval = qla2x00_post_async_login_work(vha, fcport, NULL);
3621 if (!rval)
3622 return rval;
3623 }
3624
5ff1d584 3625 fcport->flags &= ~FCF_ASYNC_SENT;
e315cd28 3626 rval = qla2x00_fabric_login(vha, fcport, next_loopid);
1da177e4 3627 if (rval == QLA_SUCCESS) {
f08b7251 3628 /* Send an ADISC to FCP2 devices.*/
0107109e 3629 opts = 0;
f08b7251 3630 if (fcport->flags & FCF_FCP2_DEVICE)
0107109e 3631 opts |= BIT_1;
e315cd28 3632 rval = qla2x00_get_port_database(vha, fcport, opts);
1da177e4 3633 if (rval != QLA_SUCCESS) {
e315cd28 3634 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 3635 fcport->d_id.b.domain, fcport->d_id.b.area,
3636 fcport->d_id.b.al_pa);
e315cd28 3637 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1da177e4 3638 } else {
e315cd28 3639 qla2x00_update_fcport(vha, fcport);
1da177e4
LT		 3640 }
3641 }
3642
3643 return (rval);
3644}
3645
3646/*
3647 * qla2x00_fabric_login
3648 * Issue fabric login command.
3649 *
3650 * Input:
3651 * ha = adapter block pointer.
3652 * device = pointer to FC device type structure.
3653 *
3654 * Returns:
3655 * 0 - Login successfully
3656 * 1 - Login failed
3657 * 2 - Initiator device
3658 * 3 - Fatal error
3659 */
3660int
e315cd28 3661qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
1da177e4
LT		 3662 uint16_t *next_loopid)
3663{
3664 int rval;
3665 int retry;
3666 uint16_t tmp_loopid;
3667 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28 3668 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 3669
3670 retry = 0;
3671 tmp_loopid = 0;
3672
3673 for (;;) {
7c3df132
SK		 3674 ql_dbg(ql_dbg_disc, vha, 0x2000,
3675 "Trying Fabric Login w/loop id 0x%04x for port "
3676 "%02x%02x%02x.\n",
3677 fcport->loop_id, fcport->d_id.b.domain,
3678 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1da177e4
LT		 3679
3680 /* Login fcport on switch. */
e315cd28 3681 ha->isp_ops->fabric_login(vha, fcport->loop_id,
1da177e4
LT		 3682 fcport->d_id.b.domain, fcport->d_id.b.area,
3683 fcport->d_id.b.al_pa, mb, BIT_0);
3684 if (mb[0] == MBS_PORT_ID_USED) {
3685 /*
3686 * Device has another loop ID. The firmware team
0107109e
AV		 3687 * recommends the driver perform an implicit login with
3688 * the specified ID again. The ID we just used is save
3689 * here so we return with an ID that can be tried by
3690 * the next login.
1da177e4
LT		 3691 */
3692 retry++;
3693 tmp_loopid = fcport->loop_id;
3694 fcport->loop_id = mb[1];
3695
7c3df132
SK		 3696 ql_dbg(ql_dbg_disc, vha, 0x2001,
3697 "Fabric Login: port in use - next loop "
3698 "id=0x%04x, port id= %02x%02x%02x.\n",
1da177e4 3699 fcport->loop_id, fcport->d_id.b.domain,
7c3df132 3700 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1da177e4
LT		 3701
3702 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
3703 /*
3704 * Login succeeded.
3705 */
3706 if (retry) {
3707 /* A retry occurred before. */
3708 *next_loopid = tmp_loopid;
3709 } else {
3710 /*
3711 * No retry occurred before. Just increment the
3712 * ID value for next login.
3713 */
3714 *next_loopid = (fcport->loop_id + 1);
3715 }
3716
3717 if (mb[1] & BIT_0) {
3718 fcport->port_type = FCT_INITIATOR;
3719 } else {
3720 fcport->port_type = FCT_TARGET;
3721 if (mb[1] & BIT_1) {
8474f3a0 3722 fcport->flags |= FCF_FCP2_DEVICE;
1da177e4
LT		 3723 }
3724 }
3725
ad3e0eda
AV		 3726 if (mb[10] & BIT_0)
3727 fcport->supported_classes |= FC_COS_CLASS2;
3728 if (mb[10] & BIT_1)
3729 fcport->supported_classes |= FC_COS_CLASS3;
3730
1da177e4
LT		 3731 rval = QLA_SUCCESS;
3732 break;
3733 } else if (mb[0] == MBS_LOOP_ID_USED) {
3734 /*
3735 * Loop ID already used, try next loop ID.
3736 */
3737 fcport->loop_id++;
e315cd28 3738 rval = qla2x00_find_new_loop_id(vha, fcport);
1da177e4
LT		 3739 if (rval != QLA_SUCCESS) {
3740 /* Ran out of loop IDs to use */
3741 break;
3742 }
3743 } else if (mb[0] == MBS_COMMAND_ERROR) {
3744 /*
3745 * Firmware possibly timed out during login. If NO
3746 * retries are left to do then the device is declared
3747 * dead.
3748 */
3749 *next_loopid = fcport->loop_id;
e315cd28 3750 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 3751 fcport->d_id.b.domain, fcport->d_id.b.area,
3752 fcport->d_id.b.al_pa);
e315cd28 3753 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1da177e4
LT		 3754
3755 rval = 1;
3756 break;
3757 } else {
3758 /*
3759 * unrecoverable / not handled error
3760 */
7c3df132
SK		 3761 ql_dbg(ql_dbg_disc, vha, 0x2002,
3762 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
3763 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
3764 fcport->d_id.b.area, fcport->d_id.b.al_pa,
3765 fcport->loop_id, jiffies);
1da177e4
LT		 3766
3767 *next_loopid = fcport->loop_id;
e315cd28 3768 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 3769 fcport->d_id.b.domain, fcport->d_id.b.area,
3770 fcport->d_id.b.al_pa);
1da177e4 3771 fcport->loop_id = FC_NO_LOOP_ID;
0eedfcf0 3772 fcport->login_retry = 0;
1da177e4
LT		 3773
3774 rval = 3;
3775 break;
3776 }
3777 }
3778
3779 return (rval);
3780}
3781
3782/*
3783 * qla2x00_local_device_login
3784 * Issue local device login command.
3785 *
3786 * Input:
3787 * ha = adapter block pointer.
3788 * loop_id = loop id of device to login to.
3789 *
3790 * Returns (Where's the #define!!!!):
3791 * 0 - Login successfully
3792 * 1 - Login failed
3793 * 3 - Fatal error
3794 */
3795int
e315cd28 3796qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
1da177e4
LT		 3797{
3798 int rval;
3799 uint16_t mb[MAILBOX_REGISTER_COUNT];
3800
3801 memset(mb, 0, sizeof(mb));
e315cd28 3802 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
1da177e4
LT		 3803 if (rval == QLA_SUCCESS) {
3804 /* Interrogate mailbox registers for any errors */
3805 if (mb[0] == MBS_COMMAND_ERROR)
3806 rval = 1;
3807 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
3808 /* device not in PCB table */
3809 rval = 3;
3810 }
3811
3812 return (rval);
3813}
3814
3815/*
3816 * qla2x00_loop_resync
3817 * Resync with fibre channel devices.
3818 *
3819 * Input:
3820 * ha = adapter block pointer.
3821 *
3822 * Returns:
3823 * 0 = success
3824 */
3825int
e315cd28 3826qla2x00_loop_resync(scsi_qla_host_t *vha)
1da177e4 3827{
73208dfd 3828 int rval = QLA_SUCCESS;
1da177e4 3829 uint32_t wait_time;
67c2e93a
AC		 3830 struct req_que *req;
3831 struct rsp_que *rsp;
3832
7163ea81 3833 if (vha->hw->flags.cpu_affinity_enabled)
67c2e93a
AC		 3834 req = vha->hw->req_q_map[0];
3835 else
3836 req = vha->req;
3837 rsp = req->rsp;
1da177e4 3838
e315cd28
AC		 3839 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
3840 if (vha->flags.online) {
3841 if (!(rval = qla2x00_fw_ready(vha))) {
1da177e4
LT		 3842 /* Wait at most MAX_TARGET RSCNs for a stable link. */
3843 wait_time = 256;
3844 do {
0107109e 3845 /* Issue a marker after FW becomes ready. */
73208dfd
AC		 3846 qla2x00_marker(vha, req, rsp, 0, 0,
3847 MK_SYNC_ALL);
e315cd28 3848 vha->marker_needed = 0;
1da177e4
LT		 3849
3850 /* Remap devices on Loop. */
e315cd28 3851 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1da177e4 3852
e315cd28 3853 qla2x00_configure_loop(vha);
1da177e4 3854 wait_time--;
e315cd28
AC		 3855 } while (!atomic_read(&vha->loop_down_timer) &&
3856 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
3857 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
3858 &vha->dpc_flags)));
1da177e4 3859 }
1da177e4
LT		 3860 }
3861
e315cd28 3862 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
1da177e4 3863 return (QLA_FUNCTION_FAILED);
1da177e4 3864
e315cd28 3865 if (rval)
7c3df132
SK		 3866 ql_dbg(ql_dbg_disc, vha, 0x206c,
3867 "%s *** FAILED ***.\n", __func__);
1da177e4
LT		 3868
3869 return (rval);
3870}
3871
579d12b5
SK		 3872/*
3873* qla2x00_perform_loop_resync
3874* Description: This function will set the appropriate flags and call
3875* qla2x00_loop_resync. If successful loop will be resynced
3876* Arguments : scsi_qla_host_t pointer
3877* returm : Success or Failure
3878*/
3879
3880int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
3881{
3882 int32_t rval = 0;
3883
3884 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
3885 /*Configure the flags so that resync happens properly*/
3886 atomic_set(&ha->loop_down_timer, 0);
3887 if (!(ha->device_flags & DFLG_NO_CABLE)) {
3888 atomic_set(&ha->loop_state, LOOP_UP);
3889 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
3890 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
3891 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
3892
3893 rval = qla2x00_loop_resync(ha);
3894 } else
3895 atomic_set(&ha->loop_state, LOOP_DEAD);
3896
3897 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
3898 }
3899
3900 return rval;
3901}
3902
d97994dc 3903void
67becc00 3904qla2x00_update_fcports(scsi_qla_host_t *base_vha)
d97994dc
AV		 3905{
3906 fc_port_t *fcport;
feafb7b1
AE		 3907 struct scsi_qla_host *vha;
3908 struct qla_hw_data *ha = base_vha->hw;
3909 unsigned long flags;
d97994dc 3910
feafb7b1 3911 spin_lock_irqsave(&ha->vport_slock, flags);
d97994dc 3912 /* Go with deferred removal of rport references. */
feafb7b1
AE		 3913 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
3914 atomic_inc(&vha->vref_count);
3915 list_for_each_entry(fcport, &vha->vp_fcports, list) {
8ae598d0 3916 if (fcport->drport &&
feafb7b1
AE		 3917 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
3918 spin_unlock_irqrestore(&ha->vport_slock, flags);
3919
67becc00 3920 qla2x00_rport_del(fcport);
feafb7b1
AE		 3921
3922 spin_lock_irqsave(&ha->vport_slock, flags);
3923 }
3924 }
3925 atomic_dec(&vha->vref_count);
3926 }
3927 spin_unlock_irqrestore(&ha->vport_slock, flags);
d97994dc
AV		 3928}
3929
579d12b5
SK		 3930/*
3931* qla82xx_quiescent_state_cleanup
3932* Description: This function will block the new I/Os
3933* Its not aborting any I/Os as context
3934* is not destroyed during quiescence
3935* Arguments: scsi_qla_host_t
3936* return : void
3937*/
3938void
3939qla82xx_quiescent_state_cleanup(scsi_qla_host_t *vha)
3940{
3941 struct qla_hw_data *ha = vha->hw;
3942 struct scsi_qla_host *vp;
3943
7c3df132
SK		 3944 ql_dbg(ql_dbg_p3p, vha, 0xb002,
3945 "Performing ISP error recovery - ha=%p.\n", ha);
579d12b5
SK		 3946
3947 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
3948 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
3949 atomic_set(&vha->loop_state, LOOP_DOWN);
3950 qla2x00_mark_all_devices_lost(vha, 0);
3951 list_for_each_entry(vp, &ha->vp_list, list)
3952 qla2x00_mark_all_devices_lost(vha, 0);
3953 } else {
3954 if (!atomic_read(&vha->loop_down_timer))
3955 atomic_set(&vha->loop_down_timer,
3956 LOOP_DOWN_TIME);
3957 }
3958 /* Wait for pending cmds to complete */
3959 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
3960}
3961
a9083016
GM		 3962void
3963qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
3964{
3965 struct qla_hw_data *ha = vha->hw;
579d12b5 3966 struct scsi_qla_host *vp;
feafb7b1 3967 unsigned long flags;
6aef87be 3968 fc_port_t *fcport;
a9083016 3969
e46ef004
SK		 3970 /* For ISP82XX, driver waits for completion of the commands.
3971 * online flag should be set.
3972 */
3973 if (!IS_QLA82XX(ha))
3974 vha->flags.online = 0;
a9083016
GM		 3975 ha->flags.chip_reset_done = 0;
3976 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
3977 ha->qla_stats.total_isp_aborts++;
3978
7c3df132
SK		 3979 ql_log(ql_log_info, vha, 0x00af,
3980 "Performing ISP error recovery - ha=%p.\n", ha);
a9083016 3981
e46ef004
SK		 3982 /* For ISP82XX, reset_chip is just disabling interrupts.
3983 * Driver waits for the completion of the commands.
3984 * the interrupts need to be enabled.
3985 */
a9083016
GM		 3986 if (!IS_QLA82XX(ha))
3987 ha->isp_ops->reset_chip(vha);
3988
3989 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
3990 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
3991 atomic_set(&vha->loop_state, LOOP_DOWN);
3992 qla2x00_mark_all_devices_lost(vha, 0);
feafb7b1
AE		 3993
3994 spin_lock_irqsave(&ha->vport_slock, flags);
579d12b5 3995 list_for_each_entry(vp, &ha->vp_list, list) {
feafb7b1
AE		 3996 atomic_inc(&vp->vref_count);
3997 spin_unlock_irqrestore(&ha->vport_slock, flags);
3998
a9083016 3999 qla2x00_mark_all_devices_lost(vp, 0);
feafb7b1
AE		 4000
4001 spin_lock_irqsave(&ha->vport_slock, flags);
4002 atomic_dec(&vp->vref_count);
4003 }
4004 spin_unlock_irqrestore(&ha->vport_slock, flags);
a9083016
GM		 4005 } else {
4006 if (!atomic_read(&vha->loop_down_timer))
4007 atomic_set(&vha->loop_down_timer,
4008 LOOP_DOWN_TIME);
4009 }
4010
6aef87be
AV		 4011 /* Clear all async request states across all VPs. */
4012 list_for_each_entry(fcport, &vha->vp_fcports, list)
4013 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
4014 spin_lock_irqsave(&ha->vport_slock, flags);
4015 list_for_each_entry(vp, &ha->vp_list, list) {
4016 atomic_inc(&vp->vref_count);
4017 spin_unlock_irqrestore(&ha->vport_slock, flags);
4018
4019 list_for_each_entry(fcport, &vp->vp_fcports, list)
4020 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
4021
4022 spin_lock_irqsave(&ha->vport_slock, flags);
4023 atomic_dec(&vp->vref_count);
4024 }
4025 spin_unlock_irqrestore(&ha->vport_slock, flags);
4026
bddd2d65
LC		 4027 if (!ha->flags.eeh_busy) {
4028 /* Make sure for ISP 82XX IO DMA is complete */
4029 if (IS_QLA82XX(ha)) {
7190575f 4030 qla82xx_chip_reset_cleanup(vha);
7c3df132
SK		 4031 ql_log(ql_log_info, vha, 0x00b4,
4032 "Done chip reset cleanup.\n");
a9083016 4033
e46ef004
SK		 4034 /* Done waiting for pending commands.
4035 * Reset the online flag.
4036 */
4037 vha->flags.online = 0;
4d78c973 4038 }
a9083016 4039
bddd2d65
LC		 4040 /* Requeue all commands in outstanding command list. */
4041 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
4042 }
a9083016
GM		 4043}
4044
1da177e4
LT		 4045/*
4046* qla2x00_abort_isp
4047* Resets ISP and aborts all outstanding commands.
4048*
4049* Input:
4050* ha = adapter block pointer.
4051*
4052* Returns:
4053* 0 = success
4054*/
4055int
e315cd28 4056qla2x00_abort_isp(scsi_qla_host_t *vha)
1da177e4 4057{
476e8978 4058 int rval;
1da177e4 4059 uint8_t status = 0;
e315cd28
AC		 4060 struct qla_hw_data *ha = vha->hw;
4061 struct scsi_qla_host *vp;
73208dfd 4062 struct req_que *req = ha->req_q_map[0];
feafb7b1 4063 unsigned long flags;
1da177e4 4064
e315cd28 4065 if (vha->flags.online) {
a9083016 4066 qla2x00_abort_isp_cleanup(vha);
1da177e4 4067
85880801
AV		 4068 if (unlikely(pci_channel_offline(ha->pdev) &&
4069 ha->flags.pci_channel_io_perm_failure)) {
4070 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4071 status = 0;
4072 return status;
4073 }
4074
73208dfd 4075 ha->isp_ops->get_flash_version(vha, req->ring);
30c47662 4076
e315cd28 4077 ha->isp_ops->nvram_config(vha);
1da177e4 4078
e315cd28
AC		 4079 if (!qla2x00_restart_isp(vha)) {
4080 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4 4081
e315cd28 4082 if (!atomic_read(&vha->loop_down_timer)) {
1da177e4
LT		 4083 /*
4084 * Issue marker command only when we are going
4085 * to start the I/O .
4086 */
e315cd28 4087 vha->marker_needed = 1;
1da177e4
LT		 4088 }
4089
e315cd28 4090 vha->flags.online = 1;
1da177e4 4091
fd34f556 4092 ha->isp_ops->enable_intrs(ha);
1da177e4 4093
fa2a1ce5 4094 ha->isp_abort_cnt = 0;
e315cd28 4095 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
476e8978 4096
29c5397f
LC		 4097 if (IS_QLA81XX(ha))
4098 qla2x00_get_fw_version(vha,
4099 &ha->fw_major_version,
4100 &ha->fw_minor_version,
4101 &ha->fw_subminor_version,
4102 &ha->fw_attributes, &ha->fw_memory_size,
4103 ha->mpi_version, &ha->mpi_capabilities,
4104 ha->phy_version);
4105
df613b96
AV		 4106 if (ha->fce) {
4107 ha->flags.fce_enabled = 1;
4108 memset(ha->fce, 0,
4109 fce_calc_size(ha->fce_bufs));
e315cd28 4110 rval = qla2x00_enable_fce_trace(vha,
df613b96
AV		 4111 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
4112 &ha->fce_bufs);
4113 if (rval) {
7c3df132 4114 ql_log(ql_log_warn, vha, 0x8033,
df613b96
AV		 4115 "Unable to reinitialize FCE "
4116 "(%d).\n", rval);
4117 ha->flags.fce_enabled = 0;
4118 }
4119 }
436a7b11
AV		 4120
4121 if (ha->eft) {
4122 memset(ha->eft, 0, EFT_SIZE);
e315cd28 4123 rval = qla2x00_enable_eft_trace(vha,
436a7b11
AV		 4124 ha->eft_dma, EFT_NUM_BUFFERS);
4125 if (rval) {
7c3df132 4126 ql_log(ql_log_warn, vha, 0x8034,
436a7b11
AV		 4127 "Unable to reinitialize EFT "
4128 "(%d).\n", rval);
4129 }
4130 }
1da177e4 4131 } else { /* failed the ISP abort */
e315cd28
AC		 4132 vha->flags.online = 1;
4133 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
1da177e4 4134 if (ha->isp_abort_cnt == 0) {
7c3df132
SK		 4135 ql_log(ql_log_fatal, vha, 0x8035,
4136 "ISP error recover failed - "
4137 "board disabled.\n");
fa2a1ce5 4138 /*
1da177e4
LT		 4139 * The next call disables the board
4140 * completely.
4141 */
e315cd28
AC		 4142 ha->isp_ops->reset_adapter(vha);
4143 vha->flags.online = 0;
1da177e4 4144 clear_bit(ISP_ABORT_RETRY,
e315cd28 4145 &vha->dpc_flags);
1da177e4
LT		 4146 status = 0;
4147 } else { /* schedule another ISP abort */
4148 ha->isp_abort_cnt--;
7c3df132
SK		 4149 ql_dbg(ql_dbg_taskm, vha, 0x8020,
4150 "ISP abort - retry remaining %d.\n",
4151 ha->isp_abort_cnt);
1da177e4
LT		 4152 status = 1;
4153 }
4154 } else {
4155 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
7c3df132
SK		 4156 ql_dbg(ql_dbg_taskm, vha, 0x8021,
4157 "ISP error recovery - retrying (%d) "
4158 "more times.\n", ha->isp_abort_cnt);
e315cd28 4159 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
1da177e4
LT		 4160 status = 1;
4161 }
4162 }
fa2a1ce5 4163
1da177e4
LT		 4164 }
4165
e315cd28 4166 if (!status) {
7c3df132 4167 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
feafb7b1
AE		 4168
4169 spin_lock_irqsave(&ha->vport_slock, flags);
4170 list_for_each_entry(vp, &ha->vp_list, list) {
4171 if (vp->vp_idx) {
4172 atomic_inc(&vp->vref_count);
4173 spin_unlock_irqrestore(&ha->vport_slock, flags);
4174
e315cd28 4175 qla2x00_vp_abort_isp(vp);
feafb7b1
AE		 4176
4177 spin_lock_irqsave(&ha->vport_slock, flags);
4178 atomic_dec(&vp->vref_count);
4179 }
e315cd28 4180 }
feafb7b1
AE		 4181 spin_unlock_irqrestore(&ha->vport_slock, flags);
4182
e315cd28 4183 } else {
7c3df132 4184 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n");
1da177e4
LT		 4185 }
4186
4187 return(status);
4188}
4189
4190/*
4191* qla2x00_restart_isp
4192* restarts the ISP after a reset
4193*
4194* Input:
4195* ha = adapter block pointer.
4196*
4197* Returns:
4198* 0 = success
4199*/
4200static int
e315cd28 4201qla2x00_restart_isp(scsi_qla_host_t *vha)
1da177e4 4202{
c6b2fca8 4203 int status = 0;
1da177e4 4204 uint32_t wait_time;
e315cd28 4205 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 4206 struct req_que *req = ha->req_q_map[0];
4207 struct rsp_que *rsp = ha->rsp_q_map[0];
1da177e4
LT		 4208
4209 /* If firmware needs to be loaded */
e315cd28
AC		 4210 if (qla2x00_isp_firmware(vha)) {
4211 vha->flags.online = 0;
4212 status = ha->isp_ops->chip_diag(vha);
4213 if (!status)
4214 status = qla2x00_setup_chip(vha);
1da177e4
LT		 4215 }
4216
e315cd28
AC		 4217 if (!status && !(status = qla2x00_init_rings(vha))) {
4218 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
2533cf67 4219 ha->flags.chip_reset_done = 1;
73208dfd
AC		 4220 /* Initialize the queues in use */
4221 qla25xx_init_queues(ha);
4222
e315cd28
AC		 4223 status = qla2x00_fw_ready(vha);
4224 if (!status) {
7c3df132
SK		 4225 ql_dbg(ql_dbg_taskm, vha, 0x8031,
4226 "Start configure loop status = %d.\n", status);
0107109e
AV		 4227
4228 /* Issue a marker after FW becomes ready. */
73208dfd 4229 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
0107109e 4230
e315cd28 4231 vha->flags.online = 1;
1da177e4
LT		 4232 /* Wait at most MAX_TARGET RSCNs for a stable link. */
4233 wait_time = 256;
4234 do {
e315cd28
AC		 4235 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
4236 qla2x00_configure_loop(vha);
1da177e4 4237 wait_time--;
e315cd28
AC		 4238 } while (!atomic_read(&vha->loop_down_timer) &&
4239 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
4240 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
4241 &vha->dpc_flags)));
1da177e4
LT		 4242 }
4243
4244 /* if no cable then assume it's good */
e315cd28 4245 if ((vha->device_flags & DFLG_NO_CABLE))
1da177e4
LT		 4246 status = 0;
4247
7c3df132
SK		 4248 ql_dbg(ql_dbg_taskm, vha, 0x8032,
4249 "Configure loop done, status = 0x%x.\n", status);
1da177e4
LT		 4250 }
4251 return (status);
4252}
4253
73208dfd
AC		 4254static int
4255qla25xx_init_queues(struct qla_hw_data *ha)
4256{
4257 struct rsp_que *rsp = NULL;
4258 struct req_que *req = NULL;
4259 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
4260 int ret = -1;
4261 int i;
4262
2afa19a9 4263 for (i = 1; i < ha->max_rsp_queues; i++) {
73208dfd
AC		 4264 rsp = ha->rsp_q_map[i];
4265 if (rsp) {
4266 rsp->options &= ~BIT_0;
618a7523 4267 ret = qla25xx_init_rsp_que(base_vha, rsp);
73208dfd 4268 if (ret != QLA_SUCCESS)
7c3df132
SK		 4269 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
4270 "%s Rsp que: %d init failed.\n",
4271 __func__, rsp->id);
73208dfd 4272 else
7c3df132
SK		 4273 ql_dbg(ql_dbg_init, base_vha, 0x0100,
4274 "%s Rsp que: %d inited.\n",
4275 __func__, rsp->id);
73208dfd 4276 }
2afa19a9
AC		 4277 }
4278 for (i = 1; i < ha->max_req_queues; i++) {
73208dfd
AC		 4279 req = ha->req_q_map[i];
4280 if (req) {
29bdccbe 4281 /* Clear outstanding commands array. */
73208dfd 4282 req->options &= ~BIT_0;
618a7523 4283 ret = qla25xx_init_req_que(base_vha, req);
73208dfd 4284 if (ret != QLA_SUCCESS)
7c3df132
SK		 4285 ql_dbg(ql_dbg_init, base_vha, 0x0101,
4286 "%s Req que: %d init failed.\n",
4287 __func__, req->id);
73208dfd 4288 else
7c3df132
SK		 4289 ql_dbg(ql_dbg_init, base_vha, 0x0102,
4290 "%s Req que: %d inited.\n",
4291 __func__, req->id);
73208dfd
AC		 4292 }
4293 }
4294 return ret;
4295}
4296
1da177e4
LT		 4297/*
4298* qla2x00_reset_adapter
4299* Reset adapter.
4300*
4301* Input:
4302* ha = adapter block pointer.
4303*/
abbd8870 4304void
e315cd28 4305qla2x00_reset_adapter(scsi_qla_host_t *vha)
1da177e4
LT		 4306{
4307 unsigned long flags = 0;
e315cd28 4308 struct qla_hw_data *ha = vha->hw;
3d71644c 4309 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 4310
e315cd28 4311 vha->flags.online = 0;
fd34f556 4312 ha->isp_ops->disable_intrs(ha);
1da177e4 4313
1da177e4
LT		 4314 spin_lock_irqsave(&ha->hardware_lock, flags);
4315 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
4316 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
4317 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
4318 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
4319 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4320}
0107109e
AV		 4321
4322void
e315cd28 4323qla24xx_reset_adapter(scsi_qla_host_t *vha)
0107109e
AV		 4324{
4325 unsigned long flags = 0;
e315cd28 4326 struct qla_hw_data *ha = vha->hw;
0107109e
AV		 4327 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
4328
a9083016
GM		 4329 if (IS_QLA82XX(ha))
4330 return;
4331
e315cd28 4332 vha->flags.online = 0;
fd34f556 4333 ha->isp_ops->disable_intrs(ha);
0107109e
AV		 4334
4335 spin_lock_irqsave(&ha->hardware_lock, flags);
4336 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
4337 RD_REG_DWORD(&reg->hccr);
4338 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
4339 RD_REG_DWORD(&reg->hccr);
4340 spin_unlock_irqrestore(&ha->hardware_lock, flags);
09ff36d3
AV		 4341
4342 if (IS_NOPOLLING_TYPE(ha))
4343 ha->isp_ops->enable_intrs(ha);
0107109e
AV		 4344}
4345
4e08df3f
DM		 4346/* On sparc systems, obtain port and node WWN from firmware
4347 * properties.
4348 */
e315cd28
AC		 4349static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
4350 struct nvram_24xx *nv)
4e08df3f
DM		 4351{
4352#ifdef CONFIG_SPARC
e315cd28 4353 struct qla_hw_data *ha = vha->hw;
4e08df3f 4354 struct pci_dev *pdev = ha->pdev;
15576bc8
DM		 4355 struct device_node *dp = pci_device_to_OF_node(pdev);
4356 const u8 *val;
4e08df3f
DM		 4357 int len;
4358
4359 val = of_get_property(dp, "port-wwn", &len);
4360 if (val && len >= WWN_SIZE)
4361 memcpy(nv->port_name, val, WWN_SIZE);
4362
4363 val = of_get_property(dp, "node-wwn", &len);
4364 if (val && len >= WWN_SIZE)
4365 memcpy(nv->node_name, val, WWN_SIZE);
4366#endif
4367}
4368
0107109e 4369int
e315cd28 4370qla24xx_nvram_config(scsi_qla_host_t *vha)
0107109e 4371{
4e08df3f 4372 int rval;
0107109e
AV		 4373 struct init_cb_24xx *icb;
4374 struct nvram_24xx *nv;
4375 uint32_t *dptr;
4376 uint8_t *dptr1, *dptr2;
4377 uint32_t chksum;
4378 uint16_t cnt;
e315cd28 4379 struct qla_hw_data *ha = vha->hw;
0107109e 4380
4e08df3f 4381 rval = QLA_SUCCESS;
0107109e 4382 icb = (struct init_cb_24xx *)ha->init_cb;
281afe19 4383 nv = ha->nvram;
0107109e
AV		 4384
4385 /* Determine NVRAM starting address. */
e5b68a61
AC		 4386 if (ha->flags.port0) {
4387 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
4388 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
4389 } else {
0107109e 4390 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
6f641790
AV		 4391 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
4392 }
e5b68a61
AC		 4393 ha->nvram_size = sizeof(struct nvram_24xx);
4394 ha->vpd_size = FA_NVRAM_VPD_SIZE;
a9083016
GM		 4395 if (IS_QLA82XX(ha))
4396 ha->vpd_size = FA_VPD_SIZE_82XX;
0107109e 4397
281afe19
SJ		 4398 /* Get VPD data into cache */
4399 ha->vpd = ha->nvram + VPD_OFFSET;
e315cd28 4400 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
281afe19
SJ		 4401 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
4402
4403 /* Get NVRAM data into cache and calculate checksum. */
0107109e 4404 dptr = (uint32_t *)nv;
e315cd28 4405 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
0107109e
AV		 4406 ha->nvram_size);
4407 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
4408 chksum += le32_to_cpu(*dptr++);
4409
7c3df132
SK		 4410 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
4411 "Contents of NVRAM\n");
4412 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
4413 (uint8_t *)nv, ha->nvram_size);
0107109e
AV		 4414
4415 /* Bad NVRAM data, set defaults parameters. */
4416 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
4417 || nv->id[3] != ' ' ||
4418 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
4419 /* Reset NVRAM data. */
7c3df132
SK		 4420 ql_log(ql_log_warn, vha, 0x006b,
4421 "Inconisistent NVRAM detected: checksum=0x%x id=%c "
4422 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version);
4423 ql_log(ql_log_warn, vha, 0x006c,
4424 "Falling back to functioning (yet invalid -- WWPN) "
4425 "defaults.\n");
4e08df3f
DM		 4426
4427 /*
4428 * Set default initialization control block.
4429 */
4430 memset(nv, 0, ha->nvram_size);
4431 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
4432 nv->version = __constant_cpu_to_le16(ICB_VERSION);
4433 nv->frame_payload_size = __constant_cpu_to_le16(2048);
4434 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
4435 nv->exchange_count = __constant_cpu_to_le16(0);
4436 nv->hard_address = __constant_cpu_to_le16(124);
4437 nv->port_name[0] = 0x21;
e5b68a61 4438 nv->port_name[1] = 0x00 + ha->port_no;
4e08df3f
DM		 4439 nv->port_name[2] = 0x00;
4440 nv->port_name[3] = 0xe0;
4441 nv->port_name[4] = 0x8b;
4442 nv->port_name[5] = 0x1c;
4443 nv->port_name[6] = 0x55;
4444 nv->port_name[7] = 0x86;
4445 nv->node_name[0] = 0x20;
4446 nv->node_name[1] = 0x00;
4447 nv->node_name[2] = 0x00;
4448 nv->node_name[3] = 0xe0;
4449 nv->node_name[4] = 0x8b;
4450 nv->node_name[5] = 0x1c;
4451 nv->node_name[6] = 0x55;
4452 nv->node_name[7] = 0x86;
e315cd28 4453 qla24xx_nvram_wwn_from_ofw(vha, nv);
4e08df3f
DM		 4454 nv->login_retry_count = __constant_cpu_to_le16(8);
4455 nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
4456 nv->login_timeout = __constant_cpu_to_le16(0);
4457 nv->firmware_options_1 =
4458 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
4459 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
4460 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
4461 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
4462 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
4463 nv->efi_parameters = __constant_cpu_to_le32(0);
4464 nv->reset_delay = 5;
4465 nv->max_luns_per_target = __constant_cpu_to_le16(128);
4466 nv->port_down_retry_count = __constant_cpu_to_le16(30);
4467 nv->link_down_timeout = __constant_cpu_to_le16(30);
4468
4469 rval = 1;
0107109e
AV		 4470 }
4471
4472 /* Reset Initialization control block */
e315cd28 4473 memset(icb, 0, ha->init_cb_size);
0107109e
AV		 4474
4475 /* Copy 1st segment. */
4476 dptr1 = (uint8_t *)icb;
4477 dptr2 = (uint8_t *)&nv->version;
4478 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
4479 while (cnt--)
4480 *dptr1++ = *dptr2++;
4481
4482 icb->login_retry_count = nv->login_retry_count;
3ea66e28 4483 icb->link_down_on_nos = nv->link_down_on_nos;
0107109e
AV		 4484
4485 /* Copy 2nd segment. */
4486 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
4487 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
4488 cnt = (uint8_t *)&icb->reserved_3 -
4489 (uint8_t *)&icb->interrupt_delay_timer;
4490 while (cnt--)
4491 *dptr1++ = *dptr2++;
4492
4493 /*
4494 * Setup driver NVRAM options.
4495 */
e315cd28 4496 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
9bb9fcf2 4497 "QLA2462");
0107109e 4498
5341e868
AV		 4499 /* Use alternate WWN? */
4500 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
4501 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4502 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4503 }
4504
0107109e 4505 /* Prepare nodename */
fd0e7e4d 4506 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
0107109e
AV		 4507 /*
4508 * Firmware will apply the following mask if the nodename was
4509 * not provided.
4510 */
4511 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4512 icb->node_name[0] &= 0xF0;
4513 }
4514
4515 /* Set host adapter parameters. */
4516 ha->flags.disable_risc_code_load = 0;
0c8c39af
AV		 4517 ha->flags.enable_lip_reset = 0;
4518 ha->flags.enable_lip_full_login =
4519 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
4520 ha->flags.enable_target_reset =
4521 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
0107109e 4522 ha->flags.enable_led_scheme = 0;
d4c760c2 4523 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
0107109e 4524
fd0e7e4d
AV		 4525 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
4526 (BIT_6 | BIT_5 | BIT_4)) >> 4;
0107109e
AV		 4527
4528 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
4529 sizeof(ha->fw_seriallink_options24));
4530
4531 /* save HBA serial number */
4532 ha->serial0 = icb->port_name[5];
4533 ha->serial1 = icb->port_name[6];
4534 ha->serial2 = icb->port_name[7];
e315cd28
AC		 4535 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4536 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
0107109e 4537
bc8fb3cb
AV		 4538 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
4539
0107109e
AV		 4540 ha->retry_count = le16_to_cpu(nv->login_retry_count);
4541
4542 /* Set minimum login_timeout to 4 seconds. */
4543 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
4544 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
4545 if (le16_to_cpu(nv->login_timeout) < 4)
4546 nv->login_timeout = __constant_cpu_to_le16(4);
4547 ha->login_timeout = le16_to_cpu(nv->login_timeout);
c6852c4c 4548 icb->login_timeout = nv->login_timeout;
0107109e 4549
00a537b8
AV		 4550 /* Set minimum RATOV to 100 tenths of a second. */
4551 ha->r_a_tov = 100;
0107109e
AV		 4552
4553 ha->loop_reset_delay = nv->reset_delay;
4554
4555 /* Link Down Timeout = 0:
4556 *
4557 * When Port Down timer expires we will start returning
4558 * I/O's to OS with "DID_NO_CONNECT".
4559 *
4560 * Link Down Timeout != 0:
4561 *
4562 * The driver waits for the link to come up after link down
4563 * before returning I/Os to OS with "DID_NO_CONNECT".
4564 */
4565 if (le16_to_cpu(nv->link_down_timeout) == 0) {
4566 ha->loop_down_abort_time =
4567 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
4568 } else {
4569 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
4570 ha->loop_down_abort_time =
4571 (LOOP_DOWN_TIME - ha->link_down_timeout);
4572 }
4573
4574 /* Need enough time to try and get the port back. */
4575 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
4576 if (qlport_down_retry)
4577 ha->port_down_retry_count = qlport_down_retry;
4578
4579 /* Set login_retry_count */
4580 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
4581 if (ha->port_down_retry_count ==
4582 le16_to_cpu(nv->port_down_retry_count) &&
4583 ha->port_down_retry_count > 3)
4584 ha->login_retry_count = ha->port_down_retry_count;
4585 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4586 ha->login_retry_count = ha->port_down_retry_count;
4587 if (ql2xloginretrycount)
4588 ha->login_retry_count = ql2xloginretrycount;
4589
4fdfefe5 4590 /* Enable ZIO. */
e315cd28 4591 if (!vha->flags.init_done) {
4fdfefe5
AV		 4592 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
4593 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4594 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
4595 le16_to_cpu(icb->interrupt_delay_timer): 2;
4596 }
4597 icb->firmware_options_2 &= __constant_cpu_to_le32(
4598 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
e315cd28 4599 vha->flags.process_response_queue = 0;
4fdfefe5 4600 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4a59f71d
AV		 4601 ha->zio_mode = QLA_ZIO_MODE_6;
4602
7c3df132 4603 ql_log(ql_log_info, vha, 0x006f,
4fdfefe5
AV		 4604 "ZIO mode %d enabled; timer delay (%d us).\n",
4605 ha->zio_mode, ha->zio_timer * 100);
4606
4607 icb->firmware_options_2 |= cpu_to_le32(
4608 (uint32_t)ha->zio_mode);
4609 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
e315cd28 4610 vha->flags.process_response_queue = 1;
4fdfefe5
AV		 4611 }
4612
4e08df3f 4613 if (rval) {
7c3df132
SK		 4614 ql_log(ql_log_warn, vha, 0x0070,
4615 "NVRAM configuration failed.\n");
4e08df3f
DM		 4616 }
4617 return (rval);
0107109e
AV		 4618}
4619
413975a0 4620static int
cbc8eb67
AV		 4621qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
4622 uint32_t faddr)
d1c61909 4623{
73208dfd 4624 int rval = QLA_SUCCESS;
d1c61909 4625 int segments, fragment;
d1c61909
AV		 4626 uint32_t *dcode, dlen;
4627 uint32_t risc_addr;
4628 uint32_t risc_size;
4629 uint32_t i;
e315cd28 4630 struct qla_hw_data *ha = vha->hw;
73208dfd 4631 struct req_que *req = ha->req_q_map[0];
eaac30be 4632
7c3df132
SK		 4633 ql_dbg(ql_dbg_init, vha, 0x008b,
4634 "Loading firmware from flash (%x).\n", faddr);
eaac30be 4635
d1c61909
AV		 4636 rval = QLA_SUCCESS;
4637
4638 segments = FA_RISC_CODE_SEGMENTS;
73208dfd 4639 dcode = (uint32_t *)req->ring;
d1c61909
AV		 4640 *srisc_addr = 0;
4641
4642 /* Validate firmware image by checking version. */
e315cd28 4643 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
d1c61909
AV		 4644 for (i = 0; i < 4; i++)
4645 dcode[i] = be32_to_cpu(dcode[i]);
4646 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
4647 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
4648 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
4649 dcode[3] == 0)) {
7c3df132
SK		 4650 ql_log(ql_log_fatal, vha, 0x008c,
4651 "Unable to verify the integrity of flash firmware "
4652 "image.\n");
4653 ql_log(ql_log_fatal, vha, 0x008d,
4654 "Firmware data: %08x %08x %08x %08x.\n",
4655 dcode[0], dcode[1], dcode[2], dcode[3]);
d1c61909
AV		 4656
4657 return QLA_FUNCTION_FAILED;
4658 }
4659
4660 while (segments && rval == QLA_SUCCESS) {
4661 /* Read segment's load information. */
e315cd28 4662 qla24xx_read_flash_data(vha, dcode, faddr, 4);
d1c61909
AV		 4663
4664 risc_addr = be32_to_cpu(dcode[2]);
4665 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
4666 risc_size = be32_to_cpu(dcode[3]);
4667
4668 fragment = 0;
4669 while (risc_size > 0 && rval == QLA_SUCCESS) {
4670 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
4671 if (dlen > risc_size)
4672 dlen = risc_size;
4673
7c3df132
SK		 4674 ql_dbg(ql_dbg_init, vha, 0x008e,
4675 "Loading risc segment@ risc addr %x "
4676 "number of dwords 0x%x offset 0x%x.\n",
4677 risc_addr, dlen, faddr);
d1c61909 4678
e315cd28 4679 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
d1c61909
AV		 4680 for (i = 0; i < dlen; i++)
4681 dcode[i] = swab32(dcode[i]);
4682
73208dfd 4683 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
d1c61909
AV		 4684 dlen);
4685 if (rval) {
7c3df132
SK		 4686 ql_log(ql_log_fatal, vha, 0x008f,
4687 "Failed to load segment %d of firmware.\n",
4688 fragment);
d1c61909
AV		 4689 break;
4690 }
4691
4692 faddr += dlen;
4693 risc_addr += dlen;
4694 risc_size -= dlen;
4695 fragment++;
4696 }
4697
4698 /* Next segment. */
4699 segments--;
4700 }
4701
4702 return rval;
4703}
4704
d1c61909
AV		 4705#define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
4706
0107109e 4707int
e315cd28 4708qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5433383e
AV		 4709{
4710 int rval;
4711 int i, fragment;
4712 uint16_t *wcode, *fwcode;
4713 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
4714 struct fw_blob *blob;
e315cd28 4715 struct qla_hw_data *ha = vha->hw;
73208dfd 4716 struct req_que *req = ha->req_q_map[0];
5433383e
AV		 4717
4718 /* Load firmware blob. */
e315cd28 4719 blob = qla2x00_request_firmware(vha);
5433383e 4720 if (!blob) {
7c3df132
SK		 4721 ql_log(ql_log_info, vha, 0x0083,
4722 "Fimware image unavailable.\n");
4723 ql_log(ql_log_info, vha, 0x0084,
4724 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
5433383e
AV		 4725 return QLA_FUNCTION_FAILED;
4726 }
4727
4728 rval = QLA_SUCCESS;
4729
73208dfd 4730 wcode = (uint16_t *)req->ring;
5433383e
AV		 4731 *srisc_addr = 0;
4732 fwcode = (uint16_t *)blob->fw->data;
4733 fwclen = 0;
4734
4735 /* Validate firmware image by checking version. */
4736 if (blob->fw->size < 8 * sizeof(uint16_t)) {
7c3df132
SK		 4737 ql_log(ql_log_fatal, vha, 0x0085,
4738 "Unable to verify integrity of firmware image (%Zd).\n",
5433383e
AV		 4739 blob->fw->size);
4740 goto fail_fw_integrity;
4741 }
4742 for (i = 0; i < 4; i++)
4743 wcode[i] = be16_to_cpu(fwcode[i + 4]);
4744 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
4745 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
4746 wcode[2] == 0 && wcode[3] == 0)) {
7c3df132
SK		 4747 ql_log(ql_log_fatal, vha, 0x0086,
4748 "Unable to verify integrity of firmware image.\n");
4749 ql_log(ql_log_fatal, vha, 0x0087,
4750 "Firmware data: %04x %04x %04x %04x.\n",
4751 wcode[0], wcode[1], wcode[2], wcode[3]);
5433383e
AV		 4752 goto fail_fw_integrity;
4753 }
4754
4755 seg = blob->segs;
4756 while (*seg && rval == QLA_SUCCESS) {
4757 risc_addr = *seg;
4758 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
4759 risc_size = be16_to_cpu(fwcode[3]);
4760
4761 /* Validate firmware image size. */
4762 fwclen += risc_size * sizeof(uint16_t);
4763 if (blob->fw->size < fwclen) {
7c3df132 4764 ql_log(ql_log_fatal, vha, 0x0088,
5433383e 4765 "Unable to verify integrity of firmware image "
7c3df132 4766 "(%Zd).\n", blob->fw->size);
5433383e
AV		 4767 goto fail_fw_integrity;
4768 }
4769
4770 fragment = 0;
4771 while (risc_size > 0 && rval == QLA_SUCCESS) {
4772 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
4773 if (wlen > risc_size)
4774 wlen = risc_size;
7c3df132
SK		 4775 ql_dbg(ql_dbg_init, vha, 0x0089,
4776 "Loading risc segment@ risc addr %x number of "
4777 "words 0x%x.\n", risc_addr, wlen);
5433383e
AV		 4778
4779 for (i = 0; i < wlen; i++)
4780 wcode[i] = swab16(fwcode[i]);
4781
73208dfd 4782 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5433383e
AV		 4783 wlen);
4784 if (rval) {
7c3df132
SK		 4785 ql_log(ql_log_fatal, vha, 0x008a,
4786 "Failed to load segment %d of firmware.\n",
4787 fragment);
5433383e
AV		 4788 break;
4789 }
4790
4791 fwcode += wlen;
4792 risc_addr += wlen;
4793 risc_size -= wlen;
4794 fragment++;
4795 }
4796
4797 /* Next segment. */
4798 seg++;
4799 }
4800 return rval;
4801
4802fail_fw_integrity:
4803 return QLA_FUNCTION_FAILED;
4804}
4805
eaac30be
AV		 4806static int
4807qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
0107109e
AV		 4808{
4809 int rval;
4810 int segments, fragment;
4811 uint32_t *dcode, dlen;
4812 uint32_t risc_addr;
4813 uint32_t risc_size;
4814 uint32_t i;
5433383e 4815 struct fw_blob *blob;
0107109e 4816 uint32_t *fwcode, fwclen;
e315cd28 4817 struct qla_hw_data *ha = vha->hw;
73208dfd 4818 struct req_que *req = ha->req_q_map[0];
0107109e 4819
5433383e 4820 /* Load firmware blob. */
e315cd28 4821 blob = qla2x00_request_firmware(vha);
5433383e 4822 if (!blob) {
7c3df132
SK		 4823 ql_log(ql_log_warn, vha, 0x0090,
4824 "Fimware image unavailable.\n");
4825 ql_log(ql_log_warn, vha, 0x0091,
4826 "Firmware images can be retrieved from: "
4827 QLA_FW_URL ".\n");
d1c61909 4828
eaac30be 4829 return QLA_FUNCTION_FAILED;
0107109e
AV		 4830 }
4831
7c3df132
SK		 4832 ql_log(ql_log_info, vha, 0x0092,
4833 "Loading via request-firmware.\n");
eaac30be 4834
0107109e
AV		 4835 rval = QLA_SUCCESS;
4836
4837 segments = FA_RISC_CODE_SEGMENTS;
73208dfd 4838 dcode = (uint32_t *)req->ring;
0107109e 4839 *srisc_addr = 0;
5433383e 4840 fwcode = (uint32_t *)blob->fw->data;
0107109e
AV		 4841 fwclen = 0;
4842
4843 /* Validate firmware image by checking version. */
5433383e 4844 if (blob->fw->size < 8 * sizeof(uint32_t)) {
7c3df132
SK		 4845 ql_log(ql_log_fatal, vha, 0x0093,
4846 "Unable to verify integrity of firmware image (%Zd).\n",
5433383e 4847 blob->fw->size);
0107109e
AV		 4848 goto fail_fw_integrity;
4849 }
4850 for (i = 0; i < 4; i++)
4851 dcode[i] = be32_to_cpu(fwcode[i + 4]);
4852 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
4853 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
4854 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
4855 dcode[3] == 0)) {
7c3df132
SK		 4856 ql_log(ql_log_fatal, vha, 0x0094,
4857 "Unable to verify integrity of firmware image (%Zd).\n",
4858 blob->fw->size);
4859 ql_log(ql_log_fatal, vha, 0x0095,
4860 "Firmware data: %08x %08x %08x %08x.\n",
4861 dcode[0], dcode[1], dcode[2], dcode[3]);
0107109e
AV		 4862 goto fail_fw_integrity;
4863 }
4864
4865 while (segments && rval == QLA_SUCCESS) {
4866 risc_addr = be32_to_cpu(fwcode[2]);
4867 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
4868 risc_size = be32_to_cpu(fwcode[3]);
4869
4870 /* Validate firmware image size. */
4871 fwclen += risc_size * sizeof(uint32_t);
5433383e 4872 if (blob->fw->size < fwclen) {
7c3df132 4873 ql_log(ql_log_fatal, vha, 0x0096,
5433383e 4874 "Unable to verify integrity of firmware image "
7c3df132 4875 "(%Zd).\n", blob->fw->size);
5433383e 4876
0107109e
AV		 4877 goto fail_fw_integrity;
4878 }
4879
4880 fragment = 0;
4881 while (risc_size > 0 && rval == QLA_SUCCESS) {
4882 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
4883 if (dlen > risc_size)
4884 dlen = risc_size;
4885
7c3df132
SK		 4886 ql_dbg(ql_dbg_init, vha, 0x0097,
4887 "Loading risc segment@ risc addr %x "
4888 "number of dwords 0x%x.\n", risc_addr, dlen);
0107109e
AV		 4889
4890 for (i = 0; i < dlen; i++)
4891 dcode[i] = swab32(fwcode[i]);
4892
73208dfd 4893 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
590f98e5 4894 dlen);
0107109e 4895 if (rval) {
7c3df132
SK		 4896 ql_log(ql_log_fatal, vha, 0x0098,
4897 "Failed to load segment %d of firmware.\n",
4898 fragment);
0107109e
AV		 4899 break;
4900 }
4901
4902 fwcode += dlen;
4903 risc_addr += dlen;
4904 risc_size -= dlen;
4905 fragment++;
4906 }
4907
4908 /* Next segment. */
4909 segments--;
4910 }
0107109e
AV		 4911 return rval;
4912
4913fail_fw_integrity:
0107109e 4914 return QLA_FUNCTION_FAILED;
0107109e 4915}
18c6c127 4916
eaac30be
AV		 4917int
4918qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
4919{
4920 int rval;
4921
e337d907
AV		 4922 if (ql2xfwloadbin == 1)
4923 return qla81xx_load_risc(vha, srisc_addr);
4924
eaac30be
AV		 4925 /*
4926 * FW Load priority:
4927 * 1) Firmware via request-firmware interface (.bin file).
4928 * 2) Firmware residing in flash.
4929 */
4930 rval = qla24xx_load_risc_blob(vha, srisc_addr);
4931 if (rval == QLA_SUCCESS)
4932 return rval;
4933
cbc8eb67
AV		 4934 return qla24xx_load_risc_flash(vha, srisc_addr,
4935 vha->hw->flt_region_fw);
eaac30be
AV		 4936}
4937
4938int
4939qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
4940{
4941 int rval;
cbc8eb67 4942 struct qla_hw_data *ha = vha->hw;
eaac30be 4943
e337d907 4944 if (ql2xfwloadbin == 2)
cbc8eb67 4945 goto try_blob_fw;
e337d907 4946
eaac30be
AV		 4947 /*
4948 * FW Load priority:
4949 * 1) Firmware residing in flash.
4950 * 2) Firmware via request-firmware interface (.bin file).
cbc8eb67 4951 * 3) Golden-Firmware residing in flash -- limited operation.
eaac30be 4952 */
cbc8eb67 4953 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
eaac30be
AV		 4954 if (rval == QLA_SUCCESS)
4955 return rval;
4956
cbc8eb67
AV		 4957try_blob_fw:
4958 rval = qla24xx_load_risc_blob(vha, srisc_addr);
4959 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
4960 return rval;
4961
7c3df132
SK		 4962 ql_log(ql_log_info, vha, 0x0099,
4963 "Attempting to fallback to golden firmware.\n");
cbc8eb67
AV		 4964 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
4965 if (rval != QLA_SUCCESS)
4966 return rval;
4967
7c3df132 4968 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n");
cbc8eb67
AV		 4969 ha->flags.running_gold_fw = 1;
4970
4971 return rval;
eaac30be
AV		 4972}
4973
18c6c127 4974void
e315cd28 4975qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
18c6c127
AV		 4976{
4977 int ret, retries;
e315cd28 4978 struct qla_hw_data *ha = vha->hw;
18c6c127 4979
85880801
AV		 4980 if (ha->flags.pci_channel_io_perm_failure)
4981 return;
e428924c 4982 if (!IS_FWI2_CAPABLE(ha))
18c6c127 4983 return;
75edf81d
AV		 4984 if (!ha->fw_major_version)
4985 return;
18c6c127 4986
e315cd28 4987 ret = qla2x00_stop_firmware(vha);
7c7f1f29 4988 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
b469a7cb 4989 ret != QLA_INVALID_COMMAND && retries ; retries--) {
e315cd28
AC		 4990 ha->isp_ops->reset_chip(vha);
4991 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
18c6c127 4992 continue;
e315cd28 4993 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
18c6c127 4994 continue;
7c3df132
SK		 4995 ql_log(ql_log_info, vha, 0x8015,
4996 "Attempting retry of stop-firmware command.\n");
e315cd28 4997 ret = qla2x00_stop_firmware(vha);
18c6c127
AV		 4998 }
4999}
2c3dfe3f
SJ		 5000
5001int
e315cd28 5002qla24xx_configure_vhba(scsi_qla_host_t *vha)
2c3dfe3f
SJ		 5003{
5004 int rval = QLA_SUCCESS;
5005 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28
AC		 5006 struct qla_hw_data *ha = vha->hw;
5007 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
67c2e93a
AC		 5008 struct req_que *req;
5009 struct rsp_que *rsp;
2c3dfe3f 5010
e315cd28 5011 if (!vha->vp_idx)
2c3dfe3f
SJ		 5012 return -EINVAL;
5013
e315cd28 5014 rval = qla2x00_fw_ready(base_vha);
7163ea81 5015 if (ha->flags.cpu_affinity_enabled)
67c2e93a
AC		 5016 req = ha->req_q_map[0];
5017 else
5018 req = vha->req;
5019 rsp = req->rsp;
5020
2c3dfe3f 5021 if (rval == QLA_SUCCESS) {
e315cd28 5022 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
73208dfd 5023 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
2c3dfe3f
SJ		 5024 }
5025
e315cd28 5026 vha->flags.management_server_logged_in = 0;
2c3dfe3f
SJ		 5027
5028 /* Login to SNS first */
e315cd28 5029 ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
2c3dfe3f 5030 if (mb[0] != MBS_COMMAND_COMPLETE) {
7c3df132
SK		 5031 ql_dbg(ql_dbg_init, vha, 0x0103,
5032 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x "
5033 "mb[6]=%x mb[7]=%x.\n",
5034 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
2c3dfe3f
SJ		 5035 return (QLA_FUNCTION_FAILED);
5036 }
5037
e315cd28
AC		 5038 atomic_set(&vha->loop_down_timer, 0);
5039 atomic_set(&vha->loop_state, LOOP_UP);
5040 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5041 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5042 rval = qla2x00_loop_resync(base_vha);
2c3dfe3f
SJ		 5043
5044 return rval;
5045}
4d4df193
HK		 5046
5047/* 84XX Support **************************************************************/
5048
5049static LIST_HEAD(qla_cs84xx_list);
5050static DEFINE_MUTEX(qla_cs84xx_mutex);
5051
5052static struct qla_chip_state_84xx *
e315cd28 5053qla84xx_get_chip(struct scsi_qla_host *vha)
4d4df193
HK		 5054{
5055 struct qla_chip_state_84xx *cs84xx;
e315cd28 5056 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 5057
5058 mutex_lock(&qla_cs84xx_mutex);
5059
5060 /* Find any shared 84xx chip. */
5061 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
5062 if (cs84xx->bus == ha->pdev->bus) {
5063 kref_get(&cs84xx->kref);
5064 goto done;
5065 }
5066 }
5067
5068 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
5069 if (!cs84xx)
5070 goto done;
5071
5072 kref_init(&cs84xx->kref);
5073 spin_lock_init(&cs84xx->access_lock);
5074 mutex_init(&cs84xx->fw_update_mutex);
5075 cs84xx->bus = ha->pdev->bus;
5076
5077 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
5078done:
5079 mutex_unlock(&qla_cs84xx_mutex);
5080 return cs84xx;
5081}
5082
5083static void
5084__qla84xx_chip_release(struct kref *kref)
5085{
5086 struct qla_chip_state_84xx *cs84xx =
5087 container_of(kref, struct qla_chip_state_84xx, kref);
5088
5089 mutex_lock(&qla_cs84xx_mutex);
5090 list_del(&cs84xx->list);
5091 mutex_unlock(&qla_cs84xx_mutex);
5092 kfree(cs84xx);
5093}
5094
5095void
e315cd28 5096qla84xx_put_chip(struct scsi_qla_host *vha)
4d4df193 5097{
e315cd28 5098 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 5099 if (ha->cs84xx)
5100 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
5101}
5102
5103static int
e315cd28 5104qla84xx_init_chip(scsi_qla_host_t *vha)
4d4df193
HK		 5105{
5106 int rval;
5107 uint16_t status[2];
e315cd28 5108 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 5109
5110 mutex_lock(&ha->cs84xx->fw_update_mutex);
5111
e315cd28 5112 rval = qla84xx_verify_chip(vha, status);
4d4df193
HK		 5113
5114 mutex_unlock(&ha->cs84xx->fw_update_mutex);
5115
5116 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
5117 QLA_SUCCESS;
5118}
3a03eb79
AV		 5119
5120/* 81XX Support **************************************************************/
5121
5122int
5123qla81xx_nvram_config(scsi_qla_host_t *vha)
5124{
5125 int rval;
5126 struct init_cb_81xx *icb;
5127 struct nvram_81xx *nv;
5128 uint32_t *dptr;
5129 uint8_t *dptr1, *dptr2;
5130 uint32_t chksum;
5131 uint16_t cnt;
5132 struct qla_hw_data *ha = vha->hw;
5133
5134 rval = QLA_SUCCESS;
5135 icb = (struct init_cb_81xx *)ha->init_cb;
5136 nv = ha->nvram;
5137
5138 /* Determine NVRAM starting address. */
5139 ha->nvram_size = sizeof(struct nvram_81xx);
3a03eb79 5140 ha->vpd_size = FA_NVRAM_VPD_SIZE;
3a03eb79
AV		 5141
5142 /* Get VPD data into cache */
5143 ha->vpd = ha->nvram + VPD_OFFSET;
3d79038f
AV		 5144 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
5145 ha->vpd_size);
3a03eb79
AV		 5146
5147 /* Get NVRAM data into cache and calculate checksum. */
3d79038f 5148 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
3a03eb79 5149 ha->nvram_size);
3d79038f 5150 dptr = (uint32_t *)nv;
3a03eb79
AV		 5151 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
5152 chksum += le32_to_cpu(*dptr++);
5153
7c3df132
SK		 5154 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
5155 "Contents of NVRAM:\n");
5156 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
5157 (uint8_t *)nv, ha->nvram_size);
3a03eb79
AV		 5158
5159 /* Bad NVRAM data, set defaults parameters. */
5160 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
5161 || nv->id[3] != ' ' ||
5162 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
5163 /* Reset NVRAM data. */
7c3df132
SK		 5164 ql_log(ql_log_info, vha, 0x0073,
5165 "Inconisistent NVRAM detected: checksum=0x%x id=%c "
5166 "version=0x%x.\n", chksum, nv->id[0],
3a03eb79 5167 le16_to_cpu(nv->nvram_version));
7c3df132
SK		 5168 ql_log(ql_log_info, vha, 0x0074,
5169 "Falling back to functioning (yet invalid -- WWPN) "
5170 "defaults.\n");
3a03eb79
AV		 5171
5172 /*
5173 * Set default initialization control block.
5174 */
5175 memset(nv, 0, ha->nvram_size);
5176 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
5177 nv->version = __constant_cpu_to_le16(ICB_VERSION);
5178 nv->frame_payload_size = __constant_cpu_to_le16(2048);
5179 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
5180 nv->exchange_count = __constant_cpu_to_le16(0);
5181 nv->port_name[0] = 0x21;
e5b68a61 5182 nv->port_name[1] = 0x00 + ha->port_no;
3a03eb79
AV		 5183 nv->port_name[2] = 0x00;
5184 nv->port_name[3] = 0xe0;
5185 nv->port_name[4] = 0x8b;
5186 nv->port_name[5] = 0x1c;
5187 nv->port_name[6] = 0x55;
5188 nv->port_name[7] = 0x86;
5189 nv->node_name[0] = 0x20;
5190 nv->node_name[1] = 0x00;
5191 nv->node_name[2] = 0x00;
5192 nv->node_name[3] = 0xe0;
5193 nv->node_name[4] = 0x8b;
5194 nv->node_name[5] = 0x1c;
5195 nv->node_name[6] = 0x55;
5196 nv->node_name[7] = 0x86;
5197 nv->login_retry_count = __constant_cpu_to_le16(8);
5198 nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
5199 nv->login_timeout = __constant_cpu_to_le16(0);
5200 nv->firmware_options_1 =
5201 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
5202 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
5203 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
5204 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
5205 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
5206 nv->efi_parameters = __constant_cpu_to_le32(0);
5207 nv->reset_delay = 5;
5208 nv->max_luns_per_target = __constant_cpu_to_le16(128);
5209 nv->port_down_retry_count = __constant_cpu_to_le16(30);
5210 nv->link_down_timeout = __constant_cpu_to_le16(30);
eeebcc92 5211 nv->enode_mac[0] = 0x00;
3a03eb79
AV		 5212 nv->enode_mac[1] = 0x02;
5213 nv->enode_mac[2] = 0x03;
5214 nv->enode_mac[3] = 0x04;
5215 nv->enode_mac[4] = 0x05;
e5b68a61 5216 nv->enode_mac[5] = 0x06 + ha->port_no;
3a03eb79
AV		 5217
5218 rval = 1;
5219 }
5220
5221 /* Reset Initialization control block */
773120e4 5222 memset(icb, 0, ha->init_cb_size);
3a03eb79
AV		 5223
5224 /* Copy 1st segment. */
5225 dptr1 = (uint8_t *)icb;
5226 dptr2 = (uint8_t *)&nv->version;
5227 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
5228 while (cnt--)
5229 *dptr1++ = *dptr2++;
5230
5231 icb->login_retry_count = nv->login_retry_count;
5232
5233 /* Copy 2nd segment. */
5234 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
5235 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
5236 cnt = (uint8_t *)&icb->reserved_5 -
5237 (uint8_t *)&icb->interrupt_delay_timer;
5238 while (cnt--)
5239 *dptr1++ = *dptr2++;
5240
5241 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
5242 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
5243 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
5244 icb->enode_mac[0] = 0x01;
5245 icb->enode_mac[1] = 0x02;
5246 icb->enode_mac[2] = 0x03;
5247 icb->enode_mac[3] = 0x04;
5248 icb->enode_mac[4] = 0x05;
e5b68a61 5249 icb->enode_mac[5] = 0x06 + ha->port_no;
3a03eb79
AV		 5250 }
5251
b64b0e8f
AV		 5252 /* Use extended-initialization control block. */
5253 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
5254
3a03eb79
AV		 5255 /*
5256 * Setup driver NVRAM options.
5257 */
5258 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
a9083016 5259 "QLE8XXX");
3a03eb79
AV		 5260
5261 /* Use alternate WWN? */
5262 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
5263 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
5264 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
5265 }
5266
5267 /* Prepare nodename */
5268 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
5269 /*
5270 * Firmware will apply the following mask if the nodename was
5271 * not provided.
5272 */
5273 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
5274 icb->node_name[0] &= 0xF0;
5275 }
5276
5277 /* Set host adapter parameters. */
5278 ha->flags.disable_risc_code_load = 0;
5279 ha->flags.enable_lip_reset = 0;
5280 ha->flags.enable_lip_full_login =
5281 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
5282 ha->flags.enable_target_reset =
5283 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
5284 ha->flags.enable_led_scheme = 0;
5285 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
5286
5287 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
5288 (BIT_6 | BIT_5 | BIT_4)) >> 4;
5289
5290 /* save HBA serial number */
5291 ha->serial0 = icb->port_name[5];
5292 ha->serial1 = icb->port_name[6];
5293 ha->serial2 = icb->port_name[7];
5294 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
5295 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
5296
5297 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
5298
5299 ha->retry_count = le16_to_cpu(nv->login_retry_count);
5300
5301 /* Set minimum login_timeout to 4 seconds. */
5302 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
5303 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
5304 if (le16_to_cpu(nv->login_timeout) < 4)
5305 nv->login_timeout = __constant_cpu_to_le16(4);
5306 ha->login_timeout = le16_to_cpu(nv->login_timeout);
5307 icb->login_timeout = nv->login_timeout;
5308
5309 /* Set minimum RATOV to 100 tenths of a second. */
5310 ha->r_a_tov = 100;
5311
5312 ha->loop_reset_delay = nv->reset_delay;
5313
5314 /* Link Down Timeout = 0:
5315 *
5316 * When Port Down timer expires we will start returning
5317 * I/O's to OS with "DID_NO_CONNECT".
5318 *
5319 * Link Down Timeout != 0:
5320 *
5321 * The driver waits for the link to come up after link down
5322 * before returning I/Os to OS with "DID_NO_CONNECT".
5323 */
5324 if (le16_to_cpu(nv->link_down_timeout) == 0) {
5325 ha->loop_down_abort_time =
5326 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
5327 } else {
5328 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
5329 ha->loop_down_abort_time =
5330 (LOOP_DOWN_TIME - ha->link_down_timeout);
5331 }
5332
5333 /* Need enough time to try and get the port back. */
5334 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
5335 if (qlport_down_retry)
5336 ha->port_down_retry_count = qlport_down_retry;
5337
5338 /* Set login_retry_count */
5339 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
5340 if (ha->port_down_retry_count ==
5341 le16_to_cpu(nv->port_down_retry_count) &&
5342 ha->port_down_retry_count > 3)
5343 ha->login_retry_count = ha->port_down_retry_count;
5344 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
5345 ha->login_retry_count = ha->port_down_retry_count;
5346 if (ql2xloginretrycount)
5347 ha->login_retry_count = ql2xloginretrycount;
5348
5349 /* Enable ZIO. */
5350 if (!vha->flags.init_done) {
5351 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
5352 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
5353 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
5354 le16_to_cpu(icb->interrupt_delay_timer): 2;
5355 }
5356 icb->firmware_options_2 &= __constant_cpu_to_le32(
5357 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
5358 vha->flags.process_response_queue = 0;
5359 if (ha->zio_mode != QLA_ZIO_DISABLED) {
5360 ha->zio_mode = QLA_ZIO_MODE_6;
5361
7c3df132 5362 ql_log(ql_log_info, vha, 0x0075,
3a03eb79 5363 "ZIO mode %d enabled; timer delay (%d us).\n",
7c3df132
SK		 5364 ha->zio_mode,
5365 ha->zio_timer * 100);
3a03eb79
AV		 5366
5367 icb->firmware_options_2 |= cpu_to_le32(
5368 (uint32_t)ha->zio_mode);
5369 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
5370 vha->flags.process_response_queue = 1;
5371 }
5372
5373 if (rval) {
7c3df132
SK		 5374 ql_log(ql_log_warn, vha, 0x0076,
5375 "NVRAM configuration failed.\n");
3a03eb79
AV		 5376 }
5377 return (rval);
5378}
5379
a9083016
GM		 5380int
5381qla82xx_restart_isp(scsi_qla_host_t *vha)
5382{
5383 int status, rval;
5384 uint32_t wait_time;
5385 struct qla_hw_data *ha = vha->hw;
5386 struct req_que *req = ha->req_q_map[0];
5387 struct rsp_que *rsp = ha->rsp_q_map[0];
5388 struct scsi_qla_host *vp;
feafb7b1 5389 unsigned long flags;
a9083016
GM		 5390
5391 status = qla2x00_init_rings(vha);
5392 if (!status) {
5393 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5394 ha->flags.chip_reset_done = 1;
5395
5396 status = qla2x00_fw_ready(vha);
5397 if (!status) {
7c3df132
SK		 5398 ql_log(ql_log_info, vha, 0x803c,
5399 "Start configure loop, status =%d.\n", status);
a9083016
GM		 5400
5401 /* Issue a marker after FW becomes ready. */
5402 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
5403
5404 vha->flags.online = 1;
5405 /* Wait at most MAX_TARGET RSCNs for a stable link. */
5406 wait_time = 256;
5407 do {
5408 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5409 qla2x00_configure_loop(vha);
5410 wait_time--;
5411 } while (!atomic_read(&vha->loop_down_timer) &&
5412 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) &&
5413 wait_time &&
5414 (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)));
5415 }
5416
5417 /* if no cable then assume it's good */
5418 if ((vha->device_flags & DFLG_NO_CABLE))
5419 status = 0;
5420
7c3df132
SK		 5421 ql_log(ql_log_info, vha, 0x803d,
5422 "Configure loop done, status = 0x%x.\n", status);
a9083016
GM		 5423 }
5424
5425 if (!status) {
5426 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5427
5428 if (!atomic_read(&vha->loop_down_timer)) {
5429 /*
5430 * Issue marker command only when we are going
5431 * to start the I/O .
5432 */
5433 vha->marker_needed = 1;
5434 }
5435
5436 vha->flags.online = 1;
5437
5438 ha->isp_ops->enable_intrs(ha);
5439
5440 ha->isp_abort_cnt = 0;
5441 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
5442
53296788
SK		 5443 /* Update the firmware version */
5444 qla2x00_get_fw_version(vha, &ha->fw_major_version,
5445 &ha->fw_minor_version, &ha->fw_subminor_version,
5446 &ha->fw_attributes, &ha->fw_memory_size,
5447 ha->mpi_version, &ha->mpi_capabilities,
5448 ha->phy_version);
5449
a9083016
GM		 5450 if (ha->fce) {
5451 ha->flags.fce_enabled = 1;
5452 memset(ha->fce, 0,
5453 fce_calc_size(ha->fce_bufs));
5454 rval = qla2x00_enable_fce_trace(vha,
5455 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
5456 &ha->fce_bufs);
5457 if (rval) {
7c3df132
SK		 5458 ql_log(ql_log_warn, vha, 0x803e,
5459 "Unable to reinitialize FCE (%d).\n",
5460 rval);
a9083016
GM		 5461 ha->flags.fce_enabled = 0;
5462 }
5463 }
5464
5465 if (ha->eft) {
5466 memset(ha->eft, 0, EFT_SIZE);
5467 rval = qla2x00_enable_eft_trace(vha,
5468 ha->eft_dma, EFT_NUM_BUFFERS);
5469 if (rval) {
7c3df132
SK		 5470 ql_log(ql_log_warn, vha, 0x803f,
5471 "Unable to reinitialize EFT (%d).\n",
5472 rval);
a9083016
GM		 5473 }
5474 }
a9083016
GM		 5475 }
5476
5477 if (!status) {
7c3df132
SK		 5478 ql_dbg(ql_dbg_taskm, vha, 0x8040,
5479 "qla82xx_restart_isp succeeded.\n");
feafb7b1
AE		 5480
5481 spin_lock_irqsave(&ha->vport_slock, flags);
5482 list_for_each_entry(vp, &ha->vp_list, list) {
5483 if (vp->vp_idx) {
5484 atomic_inc(&vp->vref_count);
5485 spin_unlock_irqrestore(&ha->vport_slock, flags);
5486
a9083016 5487 qla2x00_vp_abort_isp(vp);
feafb7b1
AE		 5488
5489 spin_lock_irqsave(&ha->vport_slock, flags);
5490 atomic_dec(&vp->vref_count);
5491 }
a9083016 5492 }
feafb7b1
AE		 5493 spin_unlock_irqrestore(&ha->vport_slock, flags);
5494
a9083016 5495 } else {
7c3df132
SK		 5496 ql_log(ql_log_warn, vha, 0x8041,
5497 "qla82xx_restart_isp **** FAILED ****.\n");
a9083016
GM		 5498 }
5499
5500 return status;
5501}
5502
3a03eb79 5503void
ae97c91e 5504qla81xx_update_fw_options(scsi_qla_host_t *vha)
3a03eb79 5505{
ae97c91e
AV		 5506 struct qla_hw_data *ha = vha->hw;
5507
5508 if (!ql2xetsenable)
5509 return;
5510
5511 /* Enable ETS Burst. */
5512 memset(ha->fw_options, 0, sizeof(ha->fw_options));
5513 ha->fw_options[2] |= BIT_9;
5514 qla2x00_set_fw_options(vha, ha->fw_options);
3a03eb79 5515}
09ff701a
SR		 5516
5517/*
5518 * qla24xx_get_fcp_prio
5519 * Gets the fcp cmd priority value for the logged in port.
5520 * Looks for a match of the port descriptors within
5521 * each of the fcp prio config entries. If a match is found,
5522 * the tag (priority) value is returned.
5523 *
5524 * Input:
21090cbe 5525 * vha = scsi host structure pointer.
09ff701a
SR		 5526 * fcport = port structure pointer.
5527 *
5528 * Return:
6c452a45 5529 * non-zero (if found)
f28a0a96 5530 * -1 (if not found)
09ff701a
SR		 5531 *
5532 * Context:
5533 * Kernel context
5534 */
f28a0a96 5535static int
09ff701a
SR		 5536qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
5537{
5538 int i, entries;
5539 uint8_t pid_match, wwn_match;
f28a0a96 5540 int priority;
09ff701a
SR		 5541 uint32_t pid1, pid2;
5542 uint64_t wwn1, wwn2;
5543 struct qla_fcp_prio_entry *pri_entry;
5544 struct qla_hw_data *ha = vha->hw;
5545
5546 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
f28a0a96 5547 return -1;
09ff701a 5548
f28a0a96 5549 priority = -1;
09ff701a
SR		 5550 entries = ha->fcp_prio_cfg->num_entries;
5551 pri_entry = &ha->fcp_prio_cfg->entry[0];
5552
5553 for (i = 0; i < entries; i++) {
5554 pid_match = wwn_match = 0;
5555
5556 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
5557 pri_entry++;
5558 continue;
5559 }
5560
5561 /* check source pid for a match */
5562 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
5563 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
5564 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
5565 if (pid1 == INVALID_PORT_ID)
5566 pid_match++;
5567 else if (pid1 == pid2)
5568 pid_match++;
5569 }
5570
5571 /* check destination pid for a match */
5572 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
5573 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
5574 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
5575 if (pid1 == INVALID_PORT_ID)
5576 pid_match++;
5577 else if (pid1 == pid2)
5578 pid_match++;
5579 }
5580
5581 /* check source WWN for a match */
5582 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
5583 wwn1 = wwn_to_u64(vha->port_name);
5584 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
5585 if (wwn2 == (uint64_t)-1)
5586 wwn_match++;
5587 else if (wwn1 == wwn2)
5588 wwn_match++;
5589 }
5590
5591 /* check destination WWN for a match */
5592 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
5593 wwn1 = wwn_to_u64(fcport->port_name);
5594 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
5595 if (wwn2 == (uint64_t)-1)
5596 wwn_match++;
5597 else if (wwn1 == wwn2)
5598 wwn_match++;
5599 }
5600
5601 if (pid_match == 2 || wwn_match == 2) {
5602 /* Found a matching entry */
5603 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
5604 priority = pri_entry->tag;
5605 break;
5606 }
5607
5608 pri_entry++;
5609 }
5610
5611 return priority;
5612}
5613
5614/*
5615 * qla24xx_update_fcport_fcp_prio
5616 * Activates fcp priority for the logged in fc port
5617 *
5618 * Input:
21090cbe 5619 * vha = scsi host structure pointer.
09ff701a
SR		 5620 * fcp = port structure pointer.
5621 *
5622 * Return:
5623 * QLA_SUCCESS or QLA_FUNCTION_FAILED
5624 *
5625 * Context:
5626 * Kernel context.
5627 */
5628int
21090cbe 5629qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
09ff701a
SR		 5630{
5631 int ret;
f28a0a96 5632 int priority;
09ff701a
SR		 5633 uint16_t mb[5];
5634
21090cbe
MI		 5635 if (fcport->port_type != FCT_TARGET ||
5636 fcport->loop_id == FC_NO_LOOP_ID)
09ff701a
SR		 5637 return QLA_FUNCTION_FAILED;
5638
21090cbe 5639 priority = qla24xx_get_fcp_prio(vha, fcport);
f28a0a96
AV		 5640 if (priority < 0)
5641 return QLA_FUNCTION_FAILED;
5642
21090cbe 5643 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
09ff701a
SR		 5644 if (ret == QLA_SUCCESS)
5645 fcport->fcp_prio = priority;
5646 else
7c3df132
SK		 5647 ql_dbg(ql_dbg_user, vha, 0x704f,
5648 "Unable to activate fcp priority, ret=0x%x.\n", ret);
09ff701a
SR		 5649
5650 return ret;
5651}
5652
5653/*
5654 * qla24xx_update_all_fcp_prio
5655 * Activates fcp priority for all the logged in ports
5656 *
5657 * Input:
5658 * ha = adapter block pointer.
5659 *
5660 * Return:
5661 * QLA_SUCCESS or QLA_FUNCTION_FAILED
5662 *
5663 * Context:
5664 * Kernel context.
5665 */
5666int
5667qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
5668{
5669 int ret;
5670 fc_port_t *fcport;
5671
5672 ret = QLA_FUNCTION_FAILED;
5673 /* We need to set priority for all logged in ports */
5674 list_for_each_entry(fcport, &vha->vp_fcports, list)
5675 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
5676
5677 return ret;
5678}
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