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Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
fa90c54f | 2 | * QLogic Fibre Channel HBA Driver |
de7c5d05 | 3 | * Copyright (c) 2003-2010 QLogic Corporation |
1da177e4 | 4 | * |
fa90c54f | 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
1da177e4 LT |
6 | */ |
7 | #include "qla_def.h" | |
73208dfd | 8 | #include "qla_gbl.h" |
1da177e4 LT |
9 | |
10 | #include <linux/delay.h> | |
5a0e3ad6 | 11 | #include <linux/slab.h> |
0107109e | 12 | #include <linux/vmalloc.h> |
1da177e4 LT |
13 | |
14 | #include "qla_devtbl.h" | |
15 | ||
4e08df3f DM |
16 | #ifdef CONFIG_SPARC |
17 | #include <asm/prom.h> | |
4e08df3f DM |
18 | #endif |
19 | ||
1da177e4 LT |
20 | /* |
21 | * QLogic ISP2x00 Hardware Support Function Prototypes. | |
22 | */ | |
1da177e4 | 23 | static int qla2x00_isp_firmware(scsi_qla_host_t *); |
1da177e4 | 24 | static int qla2x00_setup_chip(scsi_qla_host_t *); |
1da177e4 LT |
25 | static int qla2x00_init_rings(scsi_qla_host_t *); |
26 | static int qla2x00_fw_ready(scsi_qla_host_t *); | |
27 | static int qla2x00_configure_hba(scsi_qla_host_t *); | |
1da177e4 LT |
28 | static int qla2x00_configure_loop(scsi_qla_host_t *); |
29 | static int qla2x00_configure_local_loop(scsi_qla_host_t *); | |
1da177e4 LT |
30 | static int qla2x00_configure_fabric(scsi_qla_host_t *); |
31 | static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *); | |
32 | static int qla2x00_device_resync(scsi_qla_host_t *); | |
33 | static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *, | |
34 | uint16_t *); | |
1da177e4 LT |
35 | |
36 | static int qla2x00_restart_isp(scsi_qla_host_t *); | |
1da177e4 | 37 | |
e315cd28 | 38 | static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *); |
413975a0 | 39 | |
4d4df193 HK |
40 | static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); |
41 | static int qla84xx_init_chip(scsi_qla_host_t *); | |
73208dfd | 42 | static int qla25xx_init_queues(struct qla_hw_data *); |
4d4df193 | 43 | |
ac280b67 AV |
44 | /* SRB Extensions ---------------------------------------------------------- */ |
45 | ||
46 | static void | |
47 | qla2x00_ctx_sp_timeout(unsigned long __data) | |
48 | { | |
49 | srb_t *sp = (srb_t *)__data; | |
50 | struct srb_ctx *ctx; | |
4916392b | 51 | struct srb_iocb *iocb; |
ac280b67 AV |
52 | fc_port_t *fcport = sp->fcport; |
53 | struct qla_hw_data *ha = fcport->vha->hw; | |
54 | struct req_que *req; | |
55 | unsigned long flags; | |
56 | ||
57 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
58 | req = ha->req_q_map[0]; | |
59 | req->outstanding_cmds[sp->handle] = NULL; | |
60 | ctx = sp->ctx; | |
4916392b MI |
61 | iocb = ctx->u.iocb_cmd; |
62 | iocb->timeout(sp); | |
4916392b | 63 | iocb->free(sp); |
6ac52608 | 64 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
ac280b67 AV |
65 | } |
66 | ||
3dbe756a | 67 | static void |
ac280b67 AV |
68 | qla2x00_ctx_sp_free(srb_t *sp) |
69 | { | |
70 | struct srb_ctx *ctx = sp->ctx; | |
4916392b | 71 | struct srb_iocb *iocb = ctx->u.iocb_cmd; |
ac280b67 | 72 | |
4916392b MI |
73 | del_timer_sync(&iocb->timer); |
74 | kfree(iocb); | |
ac280b67 AV |
75 | kfree(ctx); |
76 | mempool_free(sp, sp->fcport->vha->hw->srb_mempool); | |
77 | } | |
78 | ||
79 | inline srb_t * | |
80 | qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size, | |
81 | unsigned long tmo) | |
82 | { | |
83 | srb_t *sp; | |
84 | struct qla_hw_data *ha = vha->hw; | |
85 | struct srb_ctx *ctx; | |
4916392b | 86 | struct srb_iocb *iocb; |
ac280b67 AV |
87 | |
88 | sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL); | |
89 | if (!sp) | |
90 | goto done; | |
91 | ctx = kzalloc(size, GFP_KERNEL); | |
92 | if (!ctx) { | |
93 | mempool_free(sp, ha->srb_mempool); | |
4916392b MI |
94 | sp = NULL; |
95 | goto done; | |
96 | } | |
97 | iocb = kzalloc(sizeof(struct srb_iocb), GFP_KERNEL); | |
98 | if (!iocb) { | |
99 | mempool_free(sp, ha->srb_mempool); | |
100 | sp = NULL; | |
101 | kfree(ctx); | |
ac280b67 AV |
102 | goto done; |
103 | } | |
104 | ||
105 | memset(sp, 0, sizeof(*sp)); | |
106 | sp->fcport = fcport; | |
107 | sp->ctx = ctx; | |
4916392b MI |
108 | ctx->u.iocb_cmd = iocb; |
109 | iocb->free = qla2x00_ctx_sp_free; | |
ac280b67 | 110 | |
4916392b | 111 | init_timer(&iocb->timer); |
ac280b67 AV |
112 | if (!tmo) |
113 | goto done; | |
4916392b MI |
114 | iocb->timer.expires = jiffies + tmo * HZ; |
115 | iocb->timer.data = (unsigned long)sp; | |
116 | iocb->timer.function = qla2x00_ctx_sp_timeout; | |
117 | add_timer(&iocb->timer); | |
ac280b67 AV |
118 | done: |
119 | return sp; | |
120 | } | |
121 | ||
122 | /* Asynchronous Login/Logout Routines -------------------------------------- */ | |
123 | ||
5b91490e AV |
124 | static inline unsigned long |
125 | qla2x00_get_async_timeout(struct scsi_qla_host *vha) | |
126 | { | |
127 | unsigned long tmo; | |
128 | struct qla_hw_data *ha = vha->hw; | |
129 | ||
130 | /* Firmware should use switch negotiated r_a_tov for timeout. */ | |
131 | tmo = ha->r_a_tov / 10 * 2; | |
132 | if (!IS_FWI2_CAPABLE(ha)) { | |
133 | /* | |
134 | * Except for earlier ISPs where the timeout is seeded from the | |
135 | * initialization control block. | |
136 | */ | |
137 | tmo = ha->login_timeout; | |
138 | } | |
139 | return tmo; | |
140 | } | |
ac280b67 AV |
141 | |
142 | static void | |
3822263e | 143 | qla2x00_async_iocb_timeout(srb_t *sp) |
ac280b67 AV |
144 | { |
145 | fc_port_t *fcport = sp->fcport; | |
4916392b | 146 | struct srb_ctx *ctx = sp->ctx; |
ac280b67 AV |
147 | |
148 | DEBUG2(printk(KERN_WARNING | |
d3fa9e7d AV |
149 | "scsi(%ld:%x): Async-%s timeout - portid=%02x%02x%02x.\n", |
150 | fcport->vha->host_no, sp->handle, | |
151 | ctx->name, fcport->d_id.b.domain, | |
152 | fcport->d_id.b.area, fcport->d_id.b.al_pa)); | |
ac280b67 | 153 | |
5ff1d584 | 154 | fcport->flags &= ~FCF_ASYNC_SENT; |
6ac52608 AV |
155 | if (ctx->type == SRB_LOGIN_CMD) { |
156 | struct srb_iocb *lio = ctx->u.iocb_cmd; | |
ac280b67 | 157 | qla2x00_post_async_logout_work(fcport->vha, fcport, NULL); |
6ac52608 AV |
158 | /* Retry as needed. */ |
159 | lio->u.logio.data[0] = MBS_COMMAND_ERROR; | |
160 | lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? | |
161 | QLA_LOGIO_LOGIN_RETRIED : 0; | |
162 | qla2x00_post_async_login_done_work(fcport->vha, fcport, | |
163 | lio->u.logio.data); | |
164 | } | |
ac280b67 AV |
165 | } |
166 | ||
99b0bec7 AV |
167 | static void |
168 | qla2x00_async_login_ctx_done(srb_t *sp) | |
169 | { | |
4916392b MI |
170 | struct srb_ctx *ctx = sp->ctx; |
171 | struct srb_iocb *lio = ctx->u.iocb_cmd; | |
99b0bec7 AV |
172 | |
173 | qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport, | |
4916392b MI |
174 | lio->u.logio.data); |
175 | lio->free(sp); | |
99b0bec7 AV |
176 | } |
177 | ||
ac280b67 AV |
178 | int |
179 | qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, | |
180 | uint16_t *data) | |
181 | { | |
ac280b67 | 182 | srb_t *sp; |
4916392b MI |
183 | struct srb_ctx *ctx; |
184 | struct srb_iocb *lio; | |
ac280b67 AV |
185 | int rval; |
186 | ||
187 | rval = QLA_FUNCTION_FAILED; | |
4916392b | 188 | sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), |
5b91490e | 189 | qla2x00_get_async_timeout(vha) + 2); |
ac280b67 AV |
190 | if (!sp) |
191 | goto done; | |
192 | ||
4916392b MI |
193 | ctx = sp->ctx; |
194 | ctx->type = SRB_LOGIN_CMD; | |
195 | ctx->name = "login"; | |
196 | lio = ctx->u.iocb_cmd; | |
3822263e | 197 | lio->timeout = qla2x00_async_iocb_timeout; |
4916392b MI |
198 | lio->done = qla2x00_async_login_ctx_done; |
199 | lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; | |
ac280b67 | 200 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) |
4916392b | 201 | lio->u.logio.flags |= SRB_LOGIN_RETRIED; |
ac280b67 AV |
202 | rval = qla2x00_start_sp(sp); |
203 | if (rval != QLA_SUCCESS) | |
204 | goto done_free_sp; | |
205 | ||
206 | DEBUG2(printk(KERN_DEBUG | |
207 | "scsi(%ld:%x): Async-login - loop-id=%x portid=%02x%02x%02x " | |
208 | "retries=%d.\n", fcport->vha->host_no, sp->handle, fcport->loop_id, | |
209 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
210 | fcport->login_retry)); | |
211 | return rval; | |
212 | ||
213 | done_free_sp: | |
4916392b | 214 | lio->free(sp); |
ac280b67 AV |
215 | done: |
216 | return rval; | |
217 | } | |
218 | ||
99b0bec7 AV |
219 | static void |
220 | qla2x00_async_logout_ctx_done(srb_t *sp) | |
221 | { | |
4916392b MI |
222 | struct srb_ctx *ctx = sp->ctx; |
223 | struct srb_iocb *lio = ctx->u.iocb_cmd; | |
99b0bec7 AV |
224 | |
225 | qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport, | |
4916392b MI |
226 | lio->u.logio.data); |
227 | lio->free(sp); | |
99b0bec7 AV |
228 | } |
229 | ||
ac280b67 AV |
230 | int |
231 | qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) | |
232 | { | |
ac280b67 | 233 | srb_t *sp; |
4916392b MI |
234 | struct srb_ctx *ctx; |
235 | struct srb_iocb *lio; | |
ac280b67 AV |
236 | int rval; |
237 | ||
238 | rval = QLA_FUNCTION_FAILED; | |
4916392b | 239 | sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), |
5b91490e | 240 | qla2x00_get_async_timeout(vha) + 2); |
ac280b67 AV |
241 | if (!sp) |
242 | goto done; | |
243 | ||
4916392b MI |
244 | ctx = sp->ctx; |
245 | ctx->type = SRB_LOGOUT_CMD; | |
246 | ctx->name = "logout"; | |
247 | lio = ctx->u.iocb_cmd; | |
3822263e | 248 | lio->timeout = qla2x00_async_iocb_timeout; |
4916392b | 249 | lio->done = qla2x00_async_logout_ctx_done; |
ac280b67 AV |
250 | rval = qla2x00_start_sp(sp); |
251 | if (rval != QLA_SUCCESS) | |
252 | goto done_free_sp; | |
253 | ||
254 | DEBUG2(printk(KERN_DEBUG | |
255 | "scsi(%ld:%x): Async-logout - loop-id=%x portid=%02x%02x%02x.\n", | |
256 | fcport->vha->host_no, sp->handle, fcport->loop_id, | |
257 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa)); | |
258 | return rval; | |
259 | ||
260 | done_free_sp: | |
4916392b | 261 | lio->free(sp); |
ac280b67 AV |
262 | done: |
263 | return rval; | |
264 | } | |
265 | ||
5ff1d584 AV |
266 | static void |
267 | qla2x00_async_adisc_ctx_done(srb_t *sp) | |
268 | { | |
4916392b MI |
269 | struct srb_ctx *ctx = sp->ctx; |
270 | struct srb_iocb *lio = ctx->u.iocb_cmd; | |
5ff1d584 AV |
271 | |
272 | qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport, | |
4916392b MI |
273 | lio->u.logio.data); |
274 | lio->free(sp); | |
5ff1d584 AV |
275 | } |
276 | ||
277 | int | |
278 | qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, | |
279 | uint16_t *data) | |
280 | { | |
5ff1d584 | 281 | srb_t *sp; |
4916392b MI |
282 | struct srb_ctx *ctx; |
283 | struct srb_iocb *lio; | |
5ff1d584 AV |
284 | int rval; |
285 | ||
286 | rval = QLA_FUNCTION_FAILED; | |
4916392b | 287 | sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), |
5b91490e | 288 | qla2x00_get_async_timeout(vha) + 2); |
5ff1d584 AV |
289 | if (!sp) |
290 | goto done; | |
291 | ||
4916392b MI |
292 | ctx = sp->ctx; |
293 | ctx->type = SRB_ADISC_CMD; | |
294 | ctx->name = "adisc"; | |
295 | lio = ctx->u.iocb_cmd; | |
3822263e | 296 | lio->timeout = qla2x00_async_iocb_timeout; |
4916392b | 297 | lio->done = qla2x00_async_adisc_ctx_done; |
5ff1d584 | 298 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) |
4916392b | 299 | lio->u.logio.flags |= SRB_LOGIN_RETRIED; |
5ff1d584 AV |
300 | rval = qla2x00_start_sp(sp); |
301 | if (rval != QLA_SUCCESS) | |
302 | goto done_free_sp; | |
303 | ||
304 | DEBUG2(printk(KERN_DEBUG | |
305 | "scsi(%ld:%x): Async-adisc - loop-id=%x portid=%02x%02x%02x.\n", | |
306 | fcport->vha->host_no, sp->handle, fcport->loop_id, | |
307 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa)); | |
308 | ||
309 | return rval; | |
310 | ||
311 | done_free_sp: | |
4916392b | 312 | lio->free(sp); |
5ff1d584 AV |
313 | done: |
314 | return rval; | |
315 | } | |
316 | ||
3822263e MI |
317 | static void |
318 | qla2x00_async_tm_cmd_ctx_done(srb_t *sp) | |
319 | { | |
320 | struct srb_ctx *ctx = sp->ctx; | |
321 | struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd; | |
322 | ||
323 | qla2x00_async_tm_cmd_done(sp->fcport->vha, sp->fcport, iocb); | |
324 | iocb->free(sp); | |
325 | } | |
326 | ||
327 | int | |
328 | qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, | |
329 | uint32_t tag) | |
330 | { | |
331 | struct scsi_qla_host *vha = fcport->vha; | |
3822263e MI |
332 | srb_t *sp; |
333 | struct srb_ctx *ctx; | |
334 | struct srb_iocb *tcf; | |
335 | int rval; | |
336 | ||
337 | rval = QLA_FUNCTION_FAILED; | |
338 | sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), | |
5b91490e | 339 | qla2x00_get_async_timeout(vha) + 2); |
3822263e MI |
340 | if (!sp) |
341 | goto done; | |
342 | ||
343 | ctx = sp->ctx; | |
344 | ctx->type = SRB_TM_CMD; | |
345 | ctx->name = "tmf"; | |
346 | tcf = ctx->u.iocb_cmd; | |
347 | tcf->u.tmf.flags = flags; | |
348 | tcf->u.tmf.lun = lun; | |
349 | tcf->u.tmf.data = tag; | |
350 | tcf->timeout = qla2x00_async_iocb_timeout; | |
351 | tcf->done = qla2x00_async_tm_cmd_ctx_done; | |
352 | ||
353 | rval = qla2x00_start_sp(sp); | |
354 | if (rval != QLA_SUCCESS) | |
355 | goto done_free_sp; | |
356 | ||
357 | DEBUG2(printk(KERN_DEBUG | |
358 | "scsi(%ld:%x): Async-tmf - loop-id=%x portid=%02x%02x%02x.\n", | |
359 | fcport->vha->host_no, sp->handle, fcport->loop_id, | |
360 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa)); | |
361 | ||
362 | return rval; | |
363 | ||
364 | done_free_sp: | |
365 | tcf->free(sp); | |
366 | done: | |
367 | return rval; | |
368 | } | |
369 | ||
4916392b | 370 | void |
ac280b67 AV |
371 | qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport, |
372 | uint16_t *data) | |
373 | { | |
374 | int rval; | |
ac280b67 AV |
375 | |
376 | switch (data[0]) { | |
377 | case MBS_COMMAND_COMPLETE: | |
99b0bec7 | 378 | if (fcport->flags & FCF_FCP2_DEVICE) { |
5ff1d584 AV |
379 | fcport->flags |= FCF_ASYNC_SENT; |
380 | qla2x00_post_async_adisc_work(vha, fcport, data); | |
381 | break; | |
99b0bec7 AV |
382 | } |
383 | qla2x00_update_fcport(vha, fcport); | |
ac280b67 AV |
384 | break; |
385 | case MBS_COMMAND_ERROR: | |
5ff1d584 | 386 | fcport->flags &= ~FCF_ASYNC_SENT; |
ac280b67 AV |
387 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) |
388 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
389 | else | |
6ac52608 | 390 | qla2x00_mark_device_lost(vha, fcport, 1, 1); |
ac280b67 AV |
391 | break; |
392 | case MBS_PORT_ID_USED: | |
393 | fcport->loop_id = data[1]; | |
6ac52608 | 394 | qla2x00_post_async_logout_work(vha, fcport, NULL); |
ac280b67 AV |
395 | qla2x00_post_async_login_work(vha, fcport, NULL); |
396 | break; | |
397 | case MBS_LOOP_ID_USED: | |
398 | fcport->loop_id++; | |
399 | rval = qla2x00_find_new_loop_id(vha, fcport); | |
400 | if (rval != QLA_SUCCESS) { | |
5ff1d584 | 401 | fcport->flags &= ~FCF_ASYNC_SENT; |
6ac52608 | 402 | qla2x00_mark_device_lost(vha, fcport, 1, 1); |
ac280b67 AV |
403 | break; |
404 | } | |
405 | qla2x00_post_async_login_work(vha, fcport, NULL); | |
406 | break; | |
407 | } | |
4916392b | 408 | return; |
ac280b67 AV |
409 | } |
410 | ||
4916392b | 411 | void |
ac280b67 AV |
412 | qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, |
413 | uint16_t *data) | |
414 | { | |
415 | qla2x00_mark_device_lost(vha, fcport, 1, 0); | |
4916392b | 416 | return; |
ac280b67 AV |
417 | } |
418 | ||
4916392b | 419 | void |
5ff1d584 AV |
420 | qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, |
421 | uint16_t *data) | |
422 | { | |
423 | if (data[0] == MBS_COMMAND_COMPLETE) { | |
424 | qla2x00_update_fcport(vha, fcport); | |
425 | ||
4916392b | 426 | return; |
5ff1d584 AV |
427 | } |
428 | ||
429 | /* Retry login. */ | |
430 | fcport->flags &= ~FCF_ASYNC_SENT; | |
431 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) | |
432 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
433 | else | |
6ac52608 | 434 | qla2x00_mark_device_lost(vha, fcport, 1, 1); |
5ff1d584 | 435 | |
4916392b | 436 | return; |
5ff1d584 AV |
437 | } |
438 | ||
3822263e MI |
439 | void |
440 | qla2x00_async_tm_cmd_done(struct scsi_qla_host *vha, fc_port_t *fcport, | |
441 | struct srb_iocb *iocb) | |
442 | { | |
443 | int rval; | |
444 | uint32_t flags; | |
445 | uint16_t lun; | |
446 | ||
447 | flags = iocb->u.tmf.flags; | |
448 | lun = (uint16_t)iocb->u.tmf.lun; | |
449 | ||
450 | /* Issue Marker IOCB */ | |
d94d10e7 GM |
451 | rval = qla2x00_marker(vha, vha->hw->req_q_map[0], |
452 | vha->hw->rsp_q_map[0], fcport->loop_id, lun, | |
3822263e MI |
453 | flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); |
454 | ||
455 | if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) { | |
456 | DEBUG2_3_11(printk(KERN_WARNING | |
457 | "%s(%ld): TM IOCB failed (%x).\n", | |
458 | __func__, vha->host_no, rval)); | |
459 | } | |
460 | ||
461 | return; | |
462 | } | |
463 | ||
1da177e4 LT |
464 | /****************************************************************************/ |
465 | /* QLogic ISP2x00 Hardware Support Functions. */ | |
466 | /****************************************************************************/ | |
467 | ||
468 | /* | |
469 | * qla2x00_initialize_adapter | |
470 | * Initialize board. | |
471 | * | |
472 | * Input: | |
473 | * ha = adapter block pointer. | |
474 | * | |
475 | * Returns: | |
476 | * 0 = success | |
477 | */ | |
478 | int | |
e315cd28 | 479 | qla2x00_initialize_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
480 | { |
481 | int rval; | |
e315cd28 | 482 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 483 | struct req_que *req = ha->req_q_map[0]; |
2533cf67 | 484 | |
1da177e4 | 485 | /* Clear adapter flags. */ |
e315cd28 | 486 | vha->flags.online = 0; |
2533cf67 | 487 | ha->flags.chip_reset_done = 0; |
e315cd28 | 488 | vha->flags.reset_active = 0; |
85880801 AV |
489 | ha->flags.pci_channel_io_perm_failure = 0; |
490 | ha->flags.eeh_busy = 0; | |
e315cd28 AC |
491 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); |
492 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
493 | vha->device_flags = DFLG_NO_CABLE; | |
494 | vha->dpc_flags = 0; | |
495 | vha->flags.management_server_logged_in = 0; | |
496 | vha->marker_needed = 0; | |
1da177e4 LT |
497 | ha->isp_abort_cnt = 0; |
498 | ha->beacon_blink_led = 0; | |
499 | ||
73208dfd AC |
500 | set_bit(0, ha->req_qid_map); |
501 | set_bit(0, ha->rsp_qid_map); | |
502 | ||
0107109e | 503 | qla_printk(KERN_INFO, ha, "Configuring PCI space...\n"); |
e315cd28 | 504 | rval = ha->isp_ops->pci_config(vha); |
1da177e4 | 505 | if (rval) { |
7c98a046 | 506 | DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n", |
e315cd28 | 507 | vha->host_no)); |
1da177e4 LT |
508 | return (rval); |
509 | } | |
510 | ||
e315cd28 | 511 | ha->isp_ops->reset_chip(vha); |
1da177e4 | 512 | |
e315cd28 | 513 | rval = qla2xxx_get_flash_info(vha); |
c00d8994 AV |
514 | if (rval) { |
515 | DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n", | |
e315cd28 | 516 | vha->host_no)); |
c00d8994 AV |
517 | return (rval); |
518 | } | |
519 | ||
73208dfd | 520 | ha->isp_ops->get_flash_version(vha, req->ring); |
30c47662 | 521 | |
1da177e4 | 522 | qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n"); |
0107109e | 523 | |
e315cd28 | 524 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 525 | |
d4c760c2 AV |
526 | if (ha->flags.disable_serdes) { |
527 | /* Mask HBA via NVRAM settings? */ | |
528 | qla_printk(KERN_INFO, ha, "Masking HBA WWPN " | |
529 | "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n", | |
e315cd28 AC |
530 | vha->port_name[0], vha->port_name[1], |
531 | vha->port_name[2], vha->port_name[3], | |
532 | vha->port_name[4], vha->port_name[5], | |
533 | vha->port_name[6], vha->port_name[7]); | |
d4c760c2 AV |
534 | return QLA_FUNCTION_FAILED; |
535 | } | |
536 | ||
1da177e4 LT |
537 | qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n"); |
538 | ||
e315cd28 AC |
539 | if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { |
540 | rval = ha->isp_ops->chip_diag(vha); | |
d19044c3 AV |
541 | if (rval) |
542 | return (rval); | |
e315cd28 | 543 | rval = qla2x00_setup_chip(vha); |
d19044c3 AV |
544 | if (rval) |
545 | return (rval); | |
1da177e4 | 546 | } |
a9083016 | 547 | |
4d4df193 | 548 | if (IS_QLA84XX(ha)) { |
e315cd28 | 549 | ha->cs84xx = qla84xx_get_chip(vha); |
4d4df193 HK |
550 | if (!ha->cs84xx) { |
551 | qla_printk(KERN_ERR, ha, | |
552 | "Unable to configure ISP84XX.\n"); | |
553 | return QLA_FUNCTION_FAILED; | |
554 | } | |
555 | } | |
e315cd28 | 556 | rval = qla2x00_init_rings(vha); |
2533cf67 | 557 | ha->flags.chip_reset_done = 1; |
1da177e4 | 558 | |
9a069e19 | 559 | if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { |
6c452a45 | 560 | /* Issue verify 84xx FW IOCB to complete 84xx initialization */ |
9a069e19 GM |
561 | rval = qla84xx_init_chip(vha); |
562 | if (rval != QLA_SUCCESS) { | |
563 | qla_printk(KERN_ERR, ha, | |
564 | "Unable to initialize ISP84XX.\n"); | |
565 | qla84xx_put_chip(vha); | |
566 | } | |
567 | } | |
568 | ||
2f0f3f4f MI |
569 | if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) |
570 | qla24xx_read_fcp_prio_cfg(vha); | |
09ff701a | 571 | |
1da177e4 LT |
572 | return (rval); |
573 | } | |
574 | ||
575 | /** | |
abbd8870 | 576 | * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. |
1da177e4 LT |
577 | * @ha: HA context |
578 | * | |
579 | * Returns 0 on success. | |
580 | */ | |
abbd8870 | 581 | int |
e315cd28 | 582 | qla2100_pci_config(scsi_qla_host_t *vha) |
1da177e4 | 583 | { |
a157b101 | 584 | uint16_t w; |
abbd8870 | 585 | unsigned long flags; |
e315cd28 | 586 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 587 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 588 | |
1da177e4 | 589 | pci_set_master(ha->pdev); |
af6177d8 | 590 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 591 | |
1da177e4 | 592 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 593 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
abbd8870 AV |
594 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
595 | ||
737faece | 596 | pci_disable_rom(ha->pdev); |
1da177e4 LT |
597 | |
598 | /* Get PCI bus information. */ | |
599 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 600 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
1da177e4 LT |
601 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
602 | ||
abbd8870 AV |
603 | return QLA_SUCCESS; |
604 | } | |
1da177e4 | 605 | |
abbd8870 AV |
606 | /** |
607 | * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. | |
608 | * @ha: HA context | |
609 | * | |
610 | * Returns 0 on success. | |
611 | */ | |
612 | int | |
e315cd28 | 613 | qla2300_pci_config(scsi_qla_host_t *vha) |
abbd8870 | 614 | { |
a157b101 | 615 | uint16_t w; |
abbd8870 AV |
616 | unsigned long flags = 0; |
617 | uint32_t cnt; | |
e315cd28 | 618 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 619 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 620 | |
abbd8870 | 621 | pci_set_master(ha->pdev); |
af6177d8 | 622 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 623 | |
abbd8870 | 624 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 625 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
1da177e4 | 626 | |
abbd8870 AV |
627 | if (IS_QLA2322(ha) || IS_QLA6322(ha)) |
628 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
a157b101 | 629 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
1da177e4 | 630 | |
abbd8870 AV |
631 | /* |
632 | * If this is a 2300 card and not 2312, reset the | |
633 | * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, | |
634 | * the 2310 also reports itself as a 2300 so we need to get the | |
635 | * fb revision level -- a 6 indicates it really is a 2300 and | |
636 | * not a 2310. | |
637 | */ | |
638 | if (IS_QLA2300(ha)) { | |
639 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1da177e4 | 640 | |
abbd8870 | 641 | /* Pause RISC. */ |
3d71644c | 642 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); |
abbd8870 | 643 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 644 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) |
abbd8870 | 645 | break; |
1da177e4 | 646 | |
abbd8870 AV |
647 | udelay(10); |
648 | } | |
1da177e4 | 649 | |
abbd8870 | 650 | /* Select FPM registers. */ |
3d71644c AV |
651 | WRT_REG_WORD(®->ctrl_status, 0x20); |
652 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
653 | |
654 | /* Get the fb rev level */ | |
3d71644c | 655 | ha->fb_rev = RD_FB_CMD_REG(ha, reg); |
abbd8870 AV |
656 | |
657 | if (ha->fb_rev == FPM_2300) | |
a157b101 | 658 | pci_clear_mwi(ha->pdev); |
abbd8870 AV |
659 | |
660 | /* Deselect FPM registers. */ | |
3d71644c AV |
661 | WRT_REG_WORD(®->ctrl_status, 0x0); |
662 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
663 | |
664 | /* Release RISC module. */ | |
3d71644c | 665 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); |
abbd8870 | 666 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 667 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) |
abbd8870 AV |
668 | break; |
669 | ||
670 | udelay(10); | |
1da177e4 | 671 | } |
1da177e4 | 672 | |
abbd8870 AV |
673 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
674 | } | |
1da177e4 | 675 | |
abbd8870 AV |
676 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); |
677 | ||
737faece | 678 | pci_disable_rom(ha->pdev); |
1da177e4 | 679 | |
abbd8870 AV |
680 | /* Get PCI bus information. */ |
681 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 682 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
abbd8870 AV |
683 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
684 | ||
685 | return QLA_SUCCESS; | |
1da177e4 LT |
686 | } |
687 | ||
0107109e AV |
688 | /** |
689 | * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. | |
690 | * @ha: HA context | |
691 | * | |
692 | * Returns 0 on success. | |
693 | */ | |
694 | int | |
e315cd28 | 695 | qla24xx_pci_config(scsi_qla_host_t *vha) |
0107109e | 696 | { |
a157b101 | 697 | uint16_t w; |
0107109e | 698 | unsigned long flags = 0; |
e315cd28 | 699 | struct qla_hw_data *ha = vha->hw; |
0107109e | 700 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
0107109e AV |
701 | |
702 | pci_set_master(ha->pdev); | |
af6177d8 | 703 | pci_try_set_mwi(ha->pdev); |
0107109e AV |
704 | |
705 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
a157b101 | 706 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
0107109e AV |
707 | w &= ~PCI_COMMAND_INTX_DISABLE; |
708 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
709 | ||
710 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); | |
711 | ||
712 | /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ | |
f85ec187 AV |
713 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) |
714 | pcix_set_mmrbc(ha->pdev, 2048); | |
0107109e AV |
715 | |
716 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
f85ec187 AV |
717 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) |
718 | pcie_set_readrq(ha->pdev, 2048); | |
0107109e | 719 | |
737faece | 720 | pci_disable_rom(ha->pdev); |
0107109e | 721 | |
44c10138 | 722 | ha->chip_revision = ha->pdev->revision; |
a8488abe | 723 | |
0107109e AV |
724 | /* Get PCI bus information. */ |
725 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
726 | ha->pci_attr = RD_REG_DWORD(®->ctrl_status); | |
727 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
728 | ||
729 | return QLA_SUCCESS; | |
730 | } | |
731 | ||
c3a2f0df AV |
732 | /** |
733 | * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. | |
734 | * @ha: HA context | |
735 | * | |
736 | * Returns 0 on success. | |
737 | */ | |
738 | int | |
e315cd28 | 739 | qla25xx_pci_config(scsi_qla_host_t *vha) |
c3a2f0df AV |
740 | { |
741 | uint16_t w; | |
e315cd28 | 742 | struct qla_hw_data *ha = vha->hw; |
c3a2f0df AV |
743 | |
744 | pci_set_master(ha->pdev); | |
745 | pci_try_set_mwi(ha->pdev); | |
746 | ||
747 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
748 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); | |
749 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
750 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
751 | ||
752 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
753 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) | |
754 | pcie_set_readrq(ha->pdev, 2048); | |
755 | ||
737faece | 756 | pci_disable_rom(ha->pdev); |
c3a2f0df AV |
757 | |
758 | ha->chip_revision = ha->pdev->revision; | |
759 | ||
760 | return QLA_SUCCESS; | |
761 | } | |
762 | ||
1da177e4 LT |
763 | /** |
764 | * qla2x00_isp_firmware() - Choose firmware image. | |
765 | * @ha: HA context | |
766 | * | |
767 | * Returns 0 on success. | |
768 | */ | |
769 | static int | |
e315cd28 | 770 | qla2x00_isp_firmware(scsi_qla_host_t *vha) |
1da177e4 LT |
771 | { |
772 | int rval; | |
42e421b1 AV |
773 | uint16_t loop_id, topo, sw_cap; |
774 | uint8_t domain, area, al_pa; | |
e315cd28 | 775 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
776 | |
777 | /* Assume loading risc code */ | |
fa2a1ce5 | 778 | rval = QLA_FUNCTION_FAILED; |
1da177e4 LT |
779 | |
780 | if (ha->flags.disable_risc_code_load) { | |
781 | DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n", | |
e315cd28 | 782 | vha->host_no)); |
1da177e4 LT |
783 | qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n"); |
784 | ||
785 | /* Verify checksum of loaded RISC code. */ | |
e315cd28 | 786 | rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); |
42e421b1 AV |
787 | if (rval == QLA_SUCCESS) { |
788 | /* And, verify we are not in ROM code. */ | |
e315cd28 | 789 | rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, |
42e421b1 AV |
790 | &area, &domain, &topo, &sw_cap); |
791 | } | |
1da177e4 LT |
792 | } |
793 | ||
794 | if (rval) { | |
795 | DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n", | |
e315cd28 | 796 | vha->host_no)); |
1da177e4 LT |
797 | } |
798 | ||
799 | return (rval); | |
800 | } | |
801 | ||
802 | /** | |
803 | * qla2x00_reset_chip() - Reset ISP chip. | |
804 | * @ha: HA context | |
805 | * | |
806 | * Returns 0 on success. | |
807 | */ | |
abbd8870 | 808 | void |
e315cd28 | 809 | qla2x00_reset_chip(scsi_qla_host_t *vha) |
1da177e4 LT |
810 | { |
811 | unsigned long flags = 0; | |
e315cd28 | 812 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 813 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 814 | uint32_t cnt; |
1da177e4 LT |
815 | uint16_t cmd; |
816 | ||
85880801 AV |
817 | if (unlikely(pci_channel_offline(ha->pdev))) |
818 | return; | |
819 | ||
fd34f556 | 820 | ha->isp_ops->disable_intrs(ha); |
1da177e4 LT |
821 | |
822 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
823 | ||
824 | /* Turn off master enable */ | |
825 | cmd = 0; | |
826 | pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); | |
827 | cmd &= ~PCI_COMMAND_MASTER; | |
828 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
829 | ||
830 | if (!IS_QLA2100(ha)) { | |
831 | /* Pause RISC. */ | |
832 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); | |
833 | if (IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
834 | for (cnt = 0; cnt < 30000; cnt++) { | |
835 | if ((RD_REG_WORD(®->hccr) & | |
836 | HCCR_RISC_PAUSE) != 0) | |
837 | break; | |
838 | udelay(100); | |
839 | } | |
840 | } else { | |
841 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
842 | udelay(10); | |
843 | } | |
844 | ||
845 | /* Select FPM registers. */ | |
846 | WRT_REG_WORD(®->ctrl_status, 0x20); | |
847 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
848 | ||
849 | /* FPM Soft Reset. */ | |
850 | WRT_REG_WORD(®->fpm_diag_config, 0x100); | |
851 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
852 | ||
853 | /* Toggle Fpm Reset. */ | |
854 | if (!IS_QLA2200(ha)) { | |
855 | WRT_REG_WORD(®->fpm_diag_config, 0x0); | |
856 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
857 | } | |
858 | ||
859 | /* Select frame buffer registers. */ | |
860 | WRT_REG_WORD(®->ctrl_status, 0x10); | |
861 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
862 | ||
863 | /* Reset frame buffer FIFOs. */ | |
864 | if (IS_QLA2200(ha)) { | |
865 | WRT_FB_CMD_REG(ha, reg, 0xa000); | |
866 | RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ | |
867 | } else { | |
868 | WRT_FB_CMD_REG(ha, reg, 0x00fc); | |
869 | ||
870 | /* Read back fb_cmd until zero or 3 seconds max */ | |
871 | for (cnt = 0; cnt < 3000; cnt++) { | |
872 | if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) | |
873 | break; | |
874 | udelay(100); | |
875 | } | |
876 | } | |
877 | ||
878 | /* Select RISC module registers. */ | |
879 | WRT_REG_WORD(®->ctrl_status, 0); | |
880 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
881 | ||
882 | /* Reset RISC processor. */ | |
883 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
884 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
885 | ||
886 | /* Release RISC processor. */ | |
887 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
888 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
889 | } | |
890 | ||
891 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
892 | WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); | |
893 | ||
894 | /* Reset ISP chip. */ | |
895 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
896 | ||
897 | /* Wait for RISC to recover from reset. */ | |
898 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
899 | /* | |
900 | * It is necessary to for a delay here since the card doesn't | |
901 | * respond to PCI reads during a reset. On some architectures | |
902 | * this will result in an MCA. | |
903 | */ | |
904 | udelay(20); | |
905 | for (cnt = 30000; cnt; cnt--) { | |
906 | if ((RD_REG_WORD(®->ctrl_status) & | |
907 | CSR_ISP_SOFT_RESET) == 0) | |
908 | break; | |
909 | udelay(100); | |
910 | } | |
911 | } else | |
912 | udelay(10); | |
913 | ||
914 | /* Reset RISC processor. */ | |
915 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
916 | ||
917 | WRT_REG_WORD(®->semaphore, 0); | |
918 | ||
919 | /* Release RISC processor. */ | |
920 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
921 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
922 | ||
923 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
924 | for (cnt = 0; cnt < 30000; cnt++) { | |
ffb39f03 | 925 | if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) |
1da177e4 | 926 | break; |
1da177e4 LT |
927 | |
928 | udelay(100); | |
929 | } | |
930 | } else | |
931 | udelay(100); | |
932 | ||
933 | /* Turn on master enable */ | |
934 | cmd |= PCI_COMMAND_MASTER; | |
935 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
936 | ||
937 | /* Disable RISC pause on FPM parity error. */ | |
938 | if (!IS_QLA2100(ha)) { | |
939 | WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); | |
940 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
941 | } | |
942 | ||
943 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
944 | } | |
945 | ||
0107109e | 946 | /** |
88c26663 | 947 | * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. |
0107109e AV |
948 | * @ha: HA context |
949 | * | |
950 | * Returns 0 on success. | |
951 | */ | |
88c26663 | 952 | static inline void |
e315cd28 | 953 | qla24xx_reset_risc(scsi_qla_host_t *vha) |
0107109e AV |
954 | { |
955 | unsigned long flags = 0; | |
e315cd28 | 956 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
957 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
958 | uint32_t cnt, d2; | |
335a1cc9 | 959 | uint16_t wd; |
0107109e | 960 | |
0107109e AV |
961 | spin_lock_irqsave(&ha->hardware_lock, flags); |
962 | ||
963 | /* Reset RISC. */ | |
964 | WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
965 | for (cnt = 0; cnt < 30000; cnt++) { | |
966 | if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) | |
967 | break; | |
968 | ||
969 | udelay(10); | |
970 | } | |
971 | ||
972 | WRT_REG_DWORD(®->ctrl_status, | |
973 | CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
335a1cc9 | 974 | pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); |
88c26663 | 975 | |
335a1cc9 | 976 | udelay(100); |
88c26663 | 977 | /* Wait for firmware to complete NVRAM accesses. */ |
88c26663 AV |
978 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); |
979 | for (cnt = 10000 ; cnt && d2; cnt--) { | |
980 | udelay(5); | |
981 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
982 | barrier(); | |
983 | } | |
984 | ||
335a1cc9 | 985 | /* Wait for soft-reset to complete. */ |
0107109e AV |
986 | d2 = RD_REG_DWORD(®->ctrl_status); |
987 | for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) { | |
988 | udelay(5); | |
989 | d2 = RD_REG_DWORD(®->ctrl_status); | |
990 | barrier(); | |
991 | } | |
992 | ||
993 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); | |
994 | RD_REG_DWORD(®->hccr); | |
995 | ||
996 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
997 | RD_REG_DWORD(®->hccr); | |
998 | ||
999 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); | |
1000 | RD_REG_DWORD(®->hccr); | |
1001 | ||
1002 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
1003 | for (cnt = 6000000 ; cnt && d2; cnt--) { | |
1004 | udelay(5); | |
1005 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
1006 | barrier(); | |
1007 | } | |
1008 | ||
1009 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
124f85e6 AV |
1010 | |
1011 | if (IS_NOPOLLING_TYPE(ha)) | |
1012 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
1013 | } |
1014 | ||
88c26663 AV |
1015 | /** |
1016 | * qla24xx_reset_chip() - Reset ISP24xx chip. | |
1017 | * @ha: HA context | |
1018 | * | |
1019 | * Returns 0 on success. | |
1020 | */ | |
1021 | void | |
e315cd28 | 1022 | qla24xx_reset_chip(scsi_qla_host_t *vha) |
88c26663 | 1023 | { |
e315cd28 | 1024 | struct qla_hw_data *ha = vha->hw; |
85880801 AV |
1025 | |
1026 | if (pci_channel_offline(ha->pdev) && | |
1027 | ha->flags.pci_channel_io_perm_failure) { | |
1028 | return; | |
1029 | } | |
1030 | ||
fd34f556 | 1031 | ha->isp_ops->disable_intrs(ha); |
88c26663 AV |
1032 | |
1033 | /* Perform RISC reset. */ | |
e315cd28 | 1034 | qla24xx_reset_risc(vha); |
88c26663 AV |
1035 | } |
1036 | ||
1da177e4 LT |
1037 | /** |
1038 | * qla2x00_chip_diag() - Test chip for proper operation. | |
1039 | * @ha: HA context | |
1040 | * | |
1041 | * Returns 0 on success. | |
1042 | */ | |
abbd8870 | 1043 | int |
e315cd28 | 1044 | qla2x00_chip_diag(scsi_qla_host_t *vha) |
1da177e4 LT |
1045 | { |
1046 | int rval; | |
e315cd28 | 1047 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 1048 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 LT |
1049 | unsigned long flags = 0; |
1050 | uint16_t data; | |
1051 | uint32_t cnt; | |
1052 | uint16_t mb[5]; | |
73208dfd | 1053 | struct req_que *req = ha->req_q_map[0]; |
1da177e4 LT |
1054 | |
1055 | /* Assume a failed state */ | |
1056 | rval = QLA_FUNCTION_FAILED; | |
1057 | ||
1058 | DEBUG3(printk("scsi(%ld): Testing device at %lx.\n", | |
e315cd28 | 1059 | vha->host_no, (u_long)®->flash_address)); |
1da177e4 LT |
1060 | |
1061 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1062 | ||
1063 | /* Reset ISP chip. */ | |
1064 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
1065 | ||
1066 | /* | |
1067 | * We need to have a delay here since the card will not respond while | |
1068 | * in reset causing an MCA on some architectures. | |
1069 | */ | |
1070 | udelay(20); | |
1071 | data = qla2x00_debounce_register(®->ctrl_status); | |
1072 | for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { | |
1073 | udelay(5); | |
1074 | data = RD_REG_WORD(®->ctrl_status); | |
1075 | barrier(); | |
1076 | } | |
1077 | ||
1078 | if (!cnt) | |
1079 | goto chip_diag_failed; | |
1080 | ||
1081 | DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n", | |
7640335e | 1082 | vha->host_no)); |
1da177e4 LT |
1083 | |
1084 | /* Reset RISC processor. */ | |
1085 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
1086 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
1087 | ||
1088 | /* Workaround for QLA2312 PCI parity error */ | |
1089 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
1090 | data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); | |
1091 | for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { | |
1092 | udelay(5); | |
1093 | data = RD_MAILBOX_REG(ha, reg, 0); | |
fa2a1ce5 | 1094 | barrier(); |
1da177e4 LT |
1095 | } |
1096 | } else | |
1097 | udelay(10); | |
1098 | ||
1099 | if (!cnt) | |
1100 | goto chip_diag_failed; | |
1101 | ||
1102 | /* Check product ID of chip */ | |
7640335e | 1103 | DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no)); |
1da177e4 LT |
1104 | |
1105 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
1106 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
1107 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
1108 | mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); | |
1109 | if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || | |
1110 | mb[3] != PROD_ID_3) { | |
1111 | qla_printk(KERN_WARNING, ha, | |
1112 | "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]); | |
1113 | ||
1114 | goto chip_diag_failed; | |
1115 | } | |
1116 | ha->product_id[0] = mb[1]; | |
1117 | ha->product_id[1] = mb[2]; | |
1118 | ha->product_id[2] = mb[3]; | |
1119 | ha->product_id[3] = mb[4]; | |
1120 | ||
1121 | /* Adjust fw RISC transfer size */ | |
73208dfd | 1122 | if (req->length > 1024) |
1da177e4 LT |
1123 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; |
1124 | else | |
1125 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * | |
73208dfd | 1126 | req->length; |
1da177e4 LT |
1127 | |
1128 | if (IS_QLA2200(ha) && | |
1129 | RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { | |
1130 | /* Limit firmware transfer size with a 2200A */ | |
1131 | DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n", | |
e315cd28 | 1132 | vha->host_no)); |
1da177e4 | 1133 | |
ea5b6382 | 1134 | ha->device_type |= DT_ISP2200A; |
1da177e4 LT |
1135 | ha->fw_transfer_size = 128; |
1136 | } | |
1137 | ||
1138 | /* Wrap Incoming Mailboxes Test. */ | |
1139 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1140 | ||
e315cd28 AC |
1141 | DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no)); |
1142 | rval = qla2x00_mbx_reg_test(vha); | |
1da177e4 LT |
1143 | if (rval) { |
1144 | DEBUG(printk("scsi(%ld): Failed mailbox send register test\n", | |
e315cd28 | 1145 | vha->host_no)); |
1da177e4 LT |
1146 | qla_printk(KERN_WARNING, ha, |
1147 | "Failed mailbox send register test\n"); | |
1148 | } | |
1149 | else { | |
1150 | /* Flag a successful rval */ | |
1151 | rval = QLA_SUCCESS; | |
1152 | } | |
1153 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1154 | ||
1155 | chip_diag_failed: | |
1156 | if (rval) | |
1157 | DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED " | |
e315cd28 | 1158 | "****\n", vha->host_no)); |
1da177e4 LT |
1159 | |
1160 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1161 | ||
1162 | return (rval); | |
1163 | } | |
1164 | ||
0107109e AV |
1165 | /** |
1166 | * qla24xx_chip_diag() - Test ISP24xx for proper operation. | |
1167 | * @ha: HA context | |
1168 | * | |
1169 | * Returns 0 on success. | |
1170 | */ | |
1171 | int | |
e315cd28 | 1172 | qla24xx_chip_diag(scsi_qla_host_t *vha) |
0107109e AV |
1173 | { |
1174 | int rval; | |
e315cd28 | 1175 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 1176 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 1177 | |
a9083016 GM |
1178 | if (IS_QLA82XX(ha)) |
1179 | return QLA_SUCCESS; | |
1180 | ||
73208dfd | 1181 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; |
0107109e | 1182 | |
e315cd28 | 1183 | rval = qla2x00_mbx_reg_test(vha); |
0107109e AV |
1184 | if (rval) { |
1185 | DEBUG(printk("scsi(%ld): Failed mailbox send register test\n", | |
e315cd28 | 1186 | vha->host_no)); |
0107109e AV |
1187 | qla_printk(KERN_WARNING, ha, |
1188 | "Failed mailbox send register test\n"); | |
1189 | } else { | |
1190 | /* Flag a successful rval */ | |
1191 | rval = QLA_SUCCESS; | |
1192 | } | |
1193 | ||
1194 | return rval; | |
1195 | } | |
1196 | ||
a7a167bf | 1197 | void |
e315cd28 | 1198 | qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) |
0107109e | 1199 | { |
a7a167bf AV |
1200 | int rval; |
1201 | uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, | |
73208dfd | 1202 | eft_size, fce_size, mq_size; |
df613b96 AV |
1203 | dma_addr_t tc_dma; |
1204 | void *tc; | |
e315cd28 | 1205 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
1206 | struct req_que *req = ha->req_q_map[0]; |
1207 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
a7a167bf AV |
1208 | |
1209 | if (ha->fw_dump) { | |
1210 | qla_printk(KERN_WARNING, ha, | |
1211 | "Firmware dump previously allocated.\n"); | |
1212 | return; | |
1213 | } | |
d4e3e04d | 1214 | |
0107109e | 1215 | ha->fw_dumped = 0; |
73208dfd | 1216 | fixed_size = mem_size = eft_size = fce_size = mq_size = 0; |
d4e3e04d | 1217 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { |
a7a167bf | 1218 | fixed_size = sizeof(struct qla2100_fw_dump); |
d4e3e04d | 1219 | } else if (IS_QLA23XX(ha)) { |
a7a167bf AV |
1220 | fixed_size = offsetof(struct qla2300_fw_dump, data_ram); |
1221 | mem_size = (ha->fw_memory_size - 0x11000 + 1) * | |
1222 | sizeof(uint16_t); | |
e428924c | 1223 | } else if (IS_FWI2_CAPABLE(ha)) { |
3a03eb79 AV |
1224 | if (IS_QLA81XX(ha)) |
1225 | fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); | |
1226 | else if (IS_QLA25XX(ha)) | |
1227 | fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); | |
1228 | else | |
1229 | fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); | |
a7a167bf AV |
1230 | mem_size = (ha->fw_memory_size - 0x100000 + 1) * |
1231 | sizeof(uint32_t); | |
73208dfd AC |
1232 | if (ha->mqenable) |
1233 | mq_size = sizeof(struct qla2xxx_mq_chain); | |
df613b96 | 1234 | /* Allocate memory for Fibre Channel Event Buffer. */ |
3a03eb79 | 1235 | if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)) |
436a7b11 | 1236 | goto try_eft; |
df613b96 AV |
1237 | |
1238 | tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, | |
1239 | GFP_KERNEL); | |
1240 | if (!tc) { | |
1241 | qla_printk(KERN_WARNING, ha, "Unable to allocate " | |
1242 | "(%d KB) for FCE.\n", FCE_SIZE / 1024); | |
17d98630 | 1243 | goto try_eft; |
df613b96 AV |
1244 | } |
1245 | ||
1246 | memset(tc, 0, FCE_SIZE); | |
e315cd28 | 1247 | rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, |
df613b96 AV |
1248 | ha->fce_mb, &ha->fce_bufs); |
1249 | if (rval) { | |
1250 | qla_printk(KERN_WARNING, ha, "Unable to initialize " | |
1251 | "FCE (%d).\n", rval); | |
1252 | dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, | |
1253 | tc_dma); | |
1254 | ha->flags.fce_enabled = 0; | |
17d98630 | 1255 | goto try_eft; |
df613b96 AV |
1256 | } |
1257 | ||
1258 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n", | |
1259 | FCE_SIZE / 1024); | |
1260 | ||
7d9dade3 | 1261 | fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; |
df613b96 AV |
1262 | ha->flags.fce_enabled = 1; |
1263 | ha->fce_dma = tc_dma; | |
1264 | ha->fce = tc; | |
436a7b11 AV |
1265 | try_eft: |
1266 | /* Allocate memory for Extended Trace Buffer. */ | |
1267 | tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, | |
1268 | GFP_KERNEL); | |
1269 | if (!tc) { | |
1270 | qla_printk(KERN_WARNING, ha, "Unable to allocate " | |
1271 | "(%d KB) for EFT.\n", EFT_SIZE / 1024); | |
1272 | goto cont_alloc; | |
1273 | } | |
1274 | ||
1275 | memset(tc, 0, EFT_SIZE); | |
e315cd28 | 1276 | rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); |
436a7b11 AV |
1277 | if (rval) { |
1278 | qla_printk(KERN_WARNING, ha, "Unable to initialize " | |
1279 | "EFT (%d).\n", rval); | |
1280 | dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, | |
1281 | tc_dma); | |
1282 | goto cont_alloc; | |
1283 | } | |
1284 | ||
1285 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n", | |
1286 | EFT_SIZE / 1024); | |
1287 | ||
1288 | eft_size = EFT_SIZE; | |
1289 | ha->eft_dma = tc_dma; | |
1290 | ha->eft = tc; | |
d4e3e04d | 1291 | } |
a7a167bf | 1292 | cont_alloc: |
73208dfd AC |
1293 | req_q_size = req->length * sizeof(request_t); |
1294 | rsp_q_size = rsp->length * sizeof(response_t); | |
a7a167bf AV |
1295 | |
1296 | dump_size = offsetof(struct qla2xxx_fw_dump, isp); | |
2afa19a9 | 1297 | dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; |
bb99de67 AV |
1298 | ha->chain_offset = dump_size; |
1299 | dump_size += mq_size + fce_size; | |
d4e3e04d AV |
1300 | |
1301 | ha->fw_dump = vmalloc(dump_size); | |
a7a167bf | 1302 | if (!ha->fw_dump) { |
0107109e | 1303 | qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for " |
d4e3e04d | 1304 | "firmware dump!!!\n", dump_size / 1024); |
a7a167bf AV |
1305 | |
1306 | if (ha->eft) { | |
1307 | dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft, | |
1308 | ha->eft_dma); | |
1309 | ha->eft = NULL; | |
1310 | ha->eft_dma = 0; | |
1311 | } | |
1312 | return; | |
1313 | } | |
a7a167bf AV |
1314 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n", |
1315 | dump_size / 1024); | |
1316 | ||
1317 | ha->fw_dump_len = dump_size; | |
1318 | ha->fw_dump->signature[0] = 'Q'; | |
1319 | ha->fw_dump->signature[1] = 'L'; | |
1320 | ha->fw_dump->signature[2] = 'G'; | |
1321 | ha->fw_dump->signature[3] = 'C'; | |
1322 | ha->fw_dump->version = __constant_htonl(1); | |
1323 | ||
1324 | ha->fw_dump->fixed_size = htonl(fixed_size); | |
1325 | ha->fw_dump->mem_size = htonl(mem_size); | |
1326 | ha->fw_dump->req_q_size = htonl(req_q_size); | |
1327 | ha->fw_dump->rsp_q_size = htonl(rsp_q_size); | |
1328 | ||
1329 | ha->fw_dump->eft_size = htonl(eft_size); | |
1330 | ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); | |
1331 | ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); | |
1332 | ||
1333 | ha->fw_dump->header_size = | |
1334 | htonl(offsetof(struct qla2xxx_fw_dump, isp)); | |
0107109e AV |
1335 | } |
1336 | ||
18e7555a AV |
1337 | static int |
1338 | qla81xx_mpi_sync(scsi_qla_host_t *vha) | |
1339 | { | |
1340 | #define MPS_MASK 0xe0 | |
1341 | int rval; | |
1342 | uint16_t dc; | |
1343 | uint32_t dw; | |
1344 | struct qla_hw_data *ha = vha->hw; | |
1345 | ||
1346 | if (!IS_QLA81XX(vha->hw)) | |
1347 | return QLA_SUCCESS; | |
1348 | ||
1349 | rval = qla2x00_write_ram_word(vha, 0x7c00, 1); | |
1350 | if (rval != QLA_SUCCESS) { | |
1351 | DEBUG2(qla_printk(KERN_WARNING, ha, | |
1352 | "Sync-MPI: Unable to acquire semaphore.\n")); | |
1353 | goto done; | |
1354 | } | |
1355 | ||
1356 | pci_read_config_word(vha->hw->pdev, 0x54, &dc); | |
1357 | rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); | |
1358 | if (rval != QLA_SUCCESS) { | |
1359 | DEBUG2(qla_printk(KERN_WARNING, ha, | |
1360 | "Sync-MPI: Unable to read sync.\n")); | |
1361 | goto done_release; | |
1362 | } | |
1363 | ||
1364 | dc &= MPS_MASK; | |
1365 | if (dc == (dw & MPS_MASK)) | |
1366 | goto done_release; | |
1367 | ||
1368 | dw &= ~MPS_MASK; | |
1369 | dw |= dc; | |
1370 | rval = qla2x00_write_ram_word(vha, 0x7a15, dw); | |
1371 | if (rval != QLA_SUCCESS) { | |
1372 | DEBUG2(qla_printk(KERN_WARNING, ha, | |
1373 | "Sync-MPI: Unable to gain sync.\n")); | |
1374 | } | |
1375 | ||
1376 | done_release: | |
1377 | rval = qla2x00_write_ram_word(vha, 0x7c00, 0); | |
1378 | if (rval != QLA_SUCCESS) { | |
1379 | DEBUG2(qla_printk(KERN_WARNING, ha, | |
1380 | "Sync-MPI: Unable to release semaphore.\n")); | |
1381 | } | |
1382 | ||
1383 | done: | |
1384 | return rval; | |
1385 | } | |
1386 | ||
1da177e4 LT |
1387 | /** |
1388 | * qla2x00_setup_chip() - Load and start RISC firmware. | |
1389 | * @ha: HA context | |
1390 | * | |
1391 | * Returns 0 on success. | |
1392 | */ | |
1393 | static int | |
e315cd28 | 1394 | qla2x00_setup_chip(scsi_qla_host_t *vha) |
1da177e4 | 1395 | { |
0107109e AV |
1396 | int rval; |
1397 | uint32_t srisc_address = 0; | |
e315cd28 | 1398 | struct qla_hw_data *ha = vha->hw; |
3db0652e AV |
1399 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1400 | unsigned long flags; | |
dda772e8 | 1401 | uint16_t fw_major_version; |
3db0652e | 1402 | |
a9083016 GM |
1403 | if (IS_QLA82XX(ha)) { |
1404 | rval = ha->isp_ops->load_risc(vha, &srisc_address); | |
14e303d9 AV |
1405 | if (rval == QLA_SUCCESS) { |
1406 | qla2x00_stop_firmware(vha); | |
a9083016 | 1407 | goto enable_82xx_npiv; |
14e303d9 | 1408 | } else |
b963752f | 1409 | goto failed; |
a9083016 GM |
1410 | } |
1411 | ||
3db0652e AV |
1412 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { |
1413 | /* Disable SRAM, Instruction RAM and GP RAM parity. */ | |
1414 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1415 | WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); | |
1416 | RD_REG_WORD(®->hccr); | |
1417 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1418 | } | |
1da177e4 | 1419 | |
18e7555a AV |
1420 | qla81xx_mpi_sync(vha); |
1421 | ||
1da177e4 | 1422 | /* Load firmware sequences */ |
e315cd28 | 1423 | rval = ha->isp_ops->load_risc(vha, &srisc_address); |
0107109e | 1424 | if (rval == QLA_SUCCESS) { |
1da177e4 | 1425 | DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC " |
e315cd28 | 1426 | "code.\n", vha->host_no)); |
1da177e4 | 1427 | |
e315cd28 | 1428 | rval = qla2x00_verify_checksum(vha, srisc_address); |
1da177e4 LT |
1429 | if (rval == QLA_SUCCESS) { |
1430 | /* Start firmware execution. */ | |
1431 | DEBUG(printk("scsi(%ld): Checksum OK, start " | |
e315cd28 | 1432 | "firmware.\n", vha->host_no)); |
1da177e4 | 1433 | |
e315cd28 | 1434 | rval = qla2x00_execute_fw(vha, srisc_address); |
1da177e4 | 1435 | /* Retrieve firmware information. */ |
dda772e8 | 1436 | if (rval == QLA_SUCCESS) { |
a9083016 | 1437 | enable_82xx_npiv: |
dda772e8 | 1438 | fw_major_version = ha->fw_major_version; |
ca9e9c3e | 1439 | rval = qla2x00_get_fw_version(vha, |
1da177e4 LT |
1440 | &ha->fw_major_version, |
1441 | &ha->fw_minor_version, | |
1442 | &ha->fw_subminor_version, | |
3a03eb79 | 1443 | &ha->fw_attributes, &ha->fw_memory_size, |
55a96158 AV |
1444 | ha->mpi_version, &ha->mpi_capabilities, |
1445 | ha->phy_version); | |
ca9e9c3e AV |
1446 | if (rval != QLA_SUCCESS) |
1447 | goto failed; | |
2c3dfe3f | 1448 | ha->flags.npiv_supported = 0; |
e315cd28 | 1449 | if (IS_QLA2XXX_MIDTYPE(ha) && |
946fb891 | 1450 | (ha->fw_attributes & BIT_2)) { |
2c3dfe3f | 1451 | ha->flags.npiv_supported = 1; |
4d0ea247 SJ |
1452 | if ((!ha->max_npiv_vports) || |
1453 | ((ha->max_npiv_vports + 1) % | |
eb66dc60 | 1454 | MIN_MULTI_ID_FABRIC)) |
4d0ea247 | 1455 | ha->max_npiv_vports = |
eb66dc60 | 1456 | MIN_MULTI_ID_FABRIC - 1; |
4d0ea247 | 1457 | } |
24a08138 AV |
1458 | qla2x00_get_resource_cnts(vha, NULL, |
1459 | &ha->fw_xcb_count, NULL, NULL, | |
f3a0a77e | 1460 | &ha->max_npiv_vports, NULL); |
d743de66 | 1461 | |
a9083016 GM |
1462 | if (!fw_major_version && ql2xallocfwdump) { |
1463 | if (!IS_QLA82XX(ha)) | |
1464 | qla2x00_alloc_fw_dump(vha); | |
1465 | } | |
1da177e4 LT |
1466 | } |
1467 | } else { | |
1468 | DEBUG2(printk(KERN_INFO | |
1469 | "scsi(%ld): ISP Firmware failed checksum.\n", | |
e315cd28 | 1470 | vha->host_no)); |
1da177e4 LT |
1471 | } |
1472 | } | |
1473 | ||
3db0652e AV |
1474 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { |
1475 | /* Enable proper parity. */ | |
1476 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1477 | if (IS_QLA2300(ha)) | |
1478 | /* SRAM parity */ | |
1479 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); | |
1480 | else | |
1481 | /* SRAM, Instruction RAM and GP RAM parity */ | |
1482 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); | |
1483 | RD_REG_WORD(®->hccr); | |
1484 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1485 | } | |
1486 | ||
1d2874de JC |
1487 | if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { |
1488 | uint32_t size; | |
1489 | ||
1490 | rval = qla81xx_fac_get_sector_size(vha, &size); | |
1491 | if (rval == QLA_SUCCESS) { | |
1492 | ha->flags.fac_supported = 1; | |
1493 | ha->fdt_block_size = size << 2; | |
1494 | } else { | |
1495 | qla_printk(KERN_ERR, ha, | |
1496 | "Unsupported FAC firmware (%d.%02d.%02d).\n", | |
1497 | ha->fw_major_version, ha->fw_minor_version, | |
1498 | ha->fw_subminor_version); | |
1499 | } | |
1500 | } | |
ca9e9c3e | 1501 | failed: |
1da177e4 LT |
1502 | if (rval) { |
1503 | DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n", | |
e315cd28 | 1504 | vha->host_no)); |
1da177e4 LT |
1505 | } |
1506 | ||
1507 | return (rval); | |
1508 | } | |
1509 | ||
1510 | /** | |
1511 | * qla2x00_init_response_q_entries() - Initializes response queue entries. | |
1512 | * @ha: HA context | |
1513 | * | |
1514 | * Beginning of request ring has initialization control block already built | |
1515 | * by nvram config routine. | |
1516 | * | |
1517 | * Returns 0 on success. | |
1518 | */ | |
73208dfd AC |
1519 | void |
1520 | qla2x00_init_response_q_entries(struct rsp_que *rsp) | |
1da177e4 LT |
1521 | { |
1522 | uint16_t cnt; | |
1523 | response_t *pkt; | |
1524 | ||
2afa19a9 AC |
1525 | rsp->ring_ptr = rsp->ring; |
1526 | rsp->ring_index = 0; | |
1527 | rsp->status_srb = NULL; | |
e315cd28 AC |
1528 | pkt = rsp->ring_ptr; |
1529 | for (cnt = 0; cnt < rsp->length; cnt++) { | |
1da177e4 LT |
1530 | pkt->signature = RESPONSE_PROCESSED; |
1531 | pkt++; | |
1532 | } | |
1da177e4 LT |
1533 | } |
1534 | ||
1535 | /** | |
1536 | * qla2x00_update_fw_options() - Read and process firmware options. | |
1537 | * @ha: HA context | |
1538 | * | |
1539 | * Returns 0 on success. | |
1540 | */ | |
abbd8870 | 1541 | void |
e315cd28 | 1542 | qla2x00_update_fw_options(scsi_qla_host_t *vha) |
1da177e4 LT |
1543 | { |
1544 | uint16_t swing, emphasis, tx_sens, rx_sens; | |
e315cd28 | 1545 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1546 | |
1547 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
e315cd28 | 1548 | qla2x00_get_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1549 | |
1550 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) | |
1551 | return; | |
1552 | ||
1553 | /* Serial Link options. */ | |
1554 | DEBUG3(printk("scsi(%ld): Serial link options:\n", | |
e315cd28 | 1555 | vha->host_no)); |
1da177e4 LT |
1556 | DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options, |
1557 | sizeof(ha->fw_seriallink_options))); | |
1558 | ||
1559 | ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; | |
1560 | if (ha->fw_seriallink_options[3] & BIT_2) { | |
1561 | ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; | |
1562 | ||
1563 | /* 1G settings */ | |
1564 | swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); | |
1565 | emphasis = (ha->fw_seriallink_options[2] & | |
1566 | (BIT_4 | BIT_3)) >> 3; | |
1567 | tx_sens = ha->fw_seriallink_options[0] & | |
fa2a1ce5 | 1568 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1569 | rx_sens = (ha->fw_seriallink_options[0] & |
1570 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1571 | ha->fw_options[10] = (emphasis << 14) | (swing << 8); | |
1572 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1573 | if (rx_sens == 0x0) | |
1574 | rx_sens = 0x3; | |
1575 | ha->fw_options[10] |= (tx_sens << 4) | rx_sens; | |
1576 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1577 | ha->fw_options[10] |= BIT_5 | | |
1578 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1579 | (tx_sens & (BIT_1 | BIT_0)); | |
1580 | ||
1581 | /* 2G settings */ | |
1582 | swing = (ha->fw_seriallink_options[2] & | |
1583 | (BIT_7 | BIT_6 | BIT_5)) >> 5; | |
1584 | emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); | |
1585 | tx_sens = ha->fw_seriallink_options[1] & | |
fa2a1ce5 | 1586 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1587 | rx_sens = (ha->fw_seriallink_options[1] & |
1588 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1589 | ha->fw_options[11] = (emphasis << 14) | (swing << 8); | |
1590 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1591 | if (rx_sens == 0x0) | |
1592 | rx_sens = 0x3; | |
1593 | ha->fw_options[11] |= (tx_sens << 4) | rx_sens; | |
1594 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1595 | ha->fw_options[11] |= BIT_5 | | |
1596 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1597 | (tx_sens & (BIT_1 | BIT_0)); | |
1598 | } | |
1599 | ||
1600 | /* FCP2 options. */ | |
1601 | /* Return command IOCBs without waiting for an ABTS to complete. */ | |
1602 | ha->fw_options[3] |= BIT_13; | |
1603 | ||
1604 | /* LED scheme. */ | |
1605 | if (ha->flags.enable_led_scheme) | |
1606 | ha->fw_options[2] |= BIT_12; | |
1607 | ||
48c02fde AV |
1608 | /* Detect ISP6312. */ |
1609 | if (IS_QLA6312(ha)) | |
1610 | ha->fw_options[2] |= BIT_13; | |
1611 | ||
1da177e4 | 1612 | /* Update firmware options. */ |
e315cd28 | 1613 | qla2x00_set_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1614 | } |
1615 | ||
0107109e | 1616 | void |
e315cd28 | 1617 | qla24xx_update_fw_options(scsi_qla_host_t *vha) |
0107109e AV |
1618 | { |
1619 | int rval; | |
e315cd28 | 1620 | struct qla_hw_data *ha = vha->hw; |
0107109e | 1621 | |
a9083016 GM |
1622 | if (IS_QLA82XX(ha)) |
1623 | return; | |
1624 | ||
0107109e | 1625 | /* Update Serial Link options. */ |
f94097ed | 1626 | if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) |
0107109e AV |
1627 | return; |
1628 | ||
e315cd28 | 1629 | rval = qla2x00_set_serdes_params(vha, |
f94097ed AV |
1630 | le16_to_cpu(ha->fw_seriallink_options24[1]), |
1631 | le16_to_cpu(ha->fw_seriallink_options24[2]), | |
1632 | le16_to_cpu(ha->fw_seriallink_options24[3])); | |
0107109e AV |
1633 | if (rval != QLA_SUCCESS) { |
1634 | qla_printk(KERN_WARNING, ha, | |
1635 | "Unable to update Serial Link options (%x).\n", rval); | |
1636 | } | |
1637 | } | |
1638 | ||
abbd8870 | 1639 | void |
e315cd28 | 1640 | qla2x00_config_rings(struct scsi_qla_host *vha) |
abbd8870 | 1641 | { |
e315cd28 | 1642 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 1643 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
73208dfd AC |
1644 | struct req_que *req = ha->req_q_map[0]; |
1645 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
abbd8870 AV |
1646 | |
1647 | /* Setup ring parameters in initialization control block. */ | |
1648 | ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1649 | ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1650 | ha->init_cb->request_q_length = cpu_to_le16(req->length); |
1651 | ha->init_cb->response_q_length = cpu_to_le16(rsp->length); | |
1652 | ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1653 | ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1654 | ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1655 | ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
abbd8870 AV |
1656 | |
1657 | WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); | |
1658 | WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); | |
1659 | WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); | |
1660 | WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); | |
1661 | RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ | |
1662 | } | |
1663 | ||
0107109e | 1664 | void |
e315cd28 | 1665 | qla24xx_config_rings(struct scsi_qla_host *vha) |
0107109e | 1666 | { |
e315cd28 | 1667 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
1668 | device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0); |
1669 | struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; | |
1670 | struct qla_msix_entry *msix; | |
0107109e | 1671 | struct init_cb_24xx *icb; |
73208dfd AC |
1672 | uint16_t rid = 0; |
1673 | struct req_que *req = ha->req_q_map[0]; | |
1674 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
0107109e | 1675 | |
73208dfd | 1676 | /* Setup ring parameters in initialization control block. */ |
0107109e AV |
1677 | icb = (struct init_cb_24xx *)ha->init_cb; |
1678 | icb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1679 | icb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1680 | icb->request_q_length = cpu_to_le16(req->length); |
1681 | icb->response_q_length = cpu_to_le16(rsp->length); | |
1682 | icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1683 | icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1684 | icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1685 | icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
0107109e | 1686 | |
73208dfd AC |
1687 | if (ha->mqenable) { |
1688 | icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS); | |
1689 | icb->rid = __constant_cpu_to_le16(rid); | |
1690 | if (ha->flags.msix_enabled) { | |
1691 | msix = &ha->msix_entries[1]; | |
1692 | DEBUG2_17(printk(KERN_INFO | |
2afa19a9 | 1693 | "Registering vector 0x%x for base que\n", msix->entry)); |
73208dfd AC |
1694 | icb->msix = cpu_to_le16(msix->entry); |
1695 | } | |
1696 | /* Use alternate PCI bus number */ | |
1697 | if (MSB(rid)) | |
1698 | icb->firmware_options_2 |= | |
1699 | __constant_cpu_to_le32(BIT_19); | |
1700 | /* Use alternate PCI devfn */ | |
1701 | if (LSB(rid)) | |
1702 | icb->firmware_options_2 |= | |
1703 | __constant_cpu_to_le32(BIT_18); | |
1704 | ||
3155754a AC |
1705 | /* Use Disable MSIX Handshake mode for capable adapters */ |
1706 | if (IS_MSIX_NACK_CAPABLE(ha)) { | |
1707 | icb->firmware_options_2 &= | |
1708 | __constant_cpu_to_le32(~BIT_22); | |
1709 | ha->flags.disable_msix_handshake = 1; | |
1710 | qla_printk(KERN_INFO, ha, | |
1711 | "MSIX Handshake Disable Mode turned on\n"); | |
1712 | } else { | |
1713 | icb->firmware_options_2 |= | |
1714 | __constant_cpu_to_le32(BIT_22); | |
1715 | } | |
73208dfd | 1716 | icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23); |
73208dfd AC |
1717 | |
1718 | WRT_REG_DWORD(®->isp25mq.req_q_in, 0); | |
1719 | WRT_REG_DWORD(®->isp25mq.req_q_out, 0); | |
1720 | WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); | |
1721 | WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); | |
1722 | } else { | |
1723 | WRT_REG_DWORD(®->isp24.req_q_in, 0); | |
1724 | WRT_REG_DWORD(®->isp24.req_q_out, 0); | |
1725 | WRT_REG_DWORD(®->isp24.rsp_q_in, 0); | |
1726 | WRT_REG_DWORD(®->isp24.rsp_q_out, 0); | |
1727 | } | |
1728 | /* PCI posting */ | |
1729 | RD_REG_DWORD(&ioreg->hccr); | |
0107109e AV |
1730 | } |
1731 | ||
1da177e4 LT |
1732 | /** |
1733 | * qla2x00_init_rings() - Initializes firmware. | |
1734 | * @ha: HA context | |
1735 | * | |
1736 | * Beginning of request ring has initialization control block already built | |
1737 | * by nvram config routine. | |
1738 | * | |
1739 | * Returns 0 on success. | |
1740 | */ | |
1741 | static int | |
e315cd28 | 1742 | qla2x00_init_rings(scsi_qla_host_t *vha) |
1da177e4 LT |
1743 | { |
1744 | int rval; | |
1745 | unsigned long flags = 0; | |
29bdccbe | 1746 | int cnt, que; |
e315cd28 | 1747 | struct qla_hw_data *ha = vha->hw; |
29bdccbe AC |
1748 | struct req_que *req; |
1749 | struct rsp_que *rsp; | |
1750 | struct scsi_qla_host *vp; | |
2c3dfe3f SJ |
1751 | struct mid_init_cb_24xx *mid_init_cb = |
1752 | (struct mid_init_cb_24xx *) ha->init_cb; | |
1da177e4 LT |
1753 | |
1754 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1755 | ||
1756 | /* Clear outstanding commands array. */ | |
2afa19a9 | 1757 | for (que = 0; que < ha->max_req_queues; que++) { |
29bdccbe AC |
1758 | req = ha->req_q_map[que]; |
1759 | if (!req) | |
1760 | continue; | |
2afa19a9 | 1761 | for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) |
29bdccbe | 1762 | req->outstanding_cmds[cnt] = NULL; |
1da177e4 | 1763 | |
2afa19a9 | 1764 | req->current_outstanding_cmd = 1; |
1da177e4 | 1765 | |
29bdccbe AC |
1766 | /* Initialize firmware. */ |
1767 | req->ring_ptr = req->ring; | |
1768 | req->ring_index = 0; | |
1769 | req->cnt = req->length; | |
1770 | } | |
1da177e4 | 1771 | |
2afa19a9 | 1772 | for (que = 0; que < ha->max_rsp_queues; que++) { |
29bdccbe AC |
1773 | rsp = ha->rsp_q_map[que]; |
1774 | if (!rsp) | |
1775 | continue; | |
29bdccbe AC |
1776 | /* Initialize response queue entries */ |
1777 | qla2x00_init_response_q_entries(rsp); | |
1778 | } | |
1da177e4 | 1779 | |
29bdccbe AC |
1780 | /* Clear RSCN queue. */ |
1781 | list_for_each_entry(vp, &ha->vp_list, list) { | |
1782 | vp->rscn_in_ptr = 0; | |
1783 | vp->rscn_out_ptr = 0; | |
1784 | } | |
e315cd28 | 1785 | ha->isp_ops->config_rings(vha); |
1da177e4 LT |
1786 | |
1787 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1788 | ||
1789 | /* Update any ISP specific firmware options before initialization. */ | |
e315cd28 | 1790 | ha->isp_ops->update_fw_options(vha); |
1da177e4 | 1791 | |
e315cd28 | 1792 | DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no)); |
2c3dfe3f | 1793 | |
605aa2bc LC |
1794 | if (ha->flags.npiv_supported) { |
1795 | if (ha->operating_mode == LOOP) | |
1796 | ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; | |
c48339de | 1797 | mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); |
605aa2bc LC |
1798 | } |
1799 | ||
24a08138 AV |
1800 | if (IS_FWI2_CAPABLE(ha)) { |
1801 | mid_init_cb->options = __constant_cpu_to_le16(BIT_1); | |
1802 | mid_init_cb->init_cb.execution_throttle = | |
1803 | cpu_to_le16(ha->fw_xcb_count); | |
1804 | } | |
2c3dfe3f | 1805 | |
e315cd28 | 1806 | rval = qla2x00_init_firmware(vha, ha->init_cb_size); |
1da177e4 LT |
1807 | if (rval) { |
1808 | DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n", | |
e315cd28 | 1809 | vha->host_no)); |
1da177e4 LT |
1810 | } else { |
1811 | DEBUG3(printk("scsi(%ld): Init firmware -- success.\n", | |
e315cd28 | 1812 | vha->host_no)); |
1da177e4 LT |
1813 | } |
1814 | ||
1815 | return (rval); | |
1816 | } | |
1817 | ||
1818 | /** | |
1819 | * qla2x00_fw_ready() - Waits for firmware ready. | |
1820 | * @ha: HA context | |
1821 | * | |
1822 | * Returns 0 on success. | |
1823 | */ | |
1824 | static int | |
e315cd28 | 1825 | qla2x00_fw_ready(scsi_qla_host_t *vha) |
1da177e4 LT |
1826 | { |
1827 | int rval; | |
4d4df193 | 1828 | unsigned long wtime, mtime, cs84xx_time; |
1da177e4 LT |
1829 | uint16_t min_wait; /* Minimum wait time if loop is down */ |
1830 | uint16_t wait_time; /* Wait time if loop is coming ready */ | |
656e8912 | 1831 | uint16_t state[5]; |
e315cd28 | 1832 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1833 | |
1834 | rval = QLA_SUCCESS; | |
1835 | ||
1836 | /* 20 seconds for loop down. */ | |
fa2a1ce5 | 1837 | min_wait = 20; |
1da177e4 LT |
1838 | |
1839 | /* | |
1840 | * Firmware should take at most one RATOV to login, plus 5 seconds for | |
1841 | * our own processing. | |
1842 | */ | |
1843 | if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { | |
1844 | wait_time = min_wait; | |
1845 | } | |
1846 | ||
1847 | /* Min wait time if loop down */ | |
1848 | mtime = jiffies + (min_wait * HZ); | |
1849 | ||
1850 | /* wait time before firmware ready */ | |
1851 | wtime = jiffies + (wait_time * HZ); | |
1852 | ||
1853 | /* Wait for ISP to finish LIP */ | |
e315cd28 | 1854 | if (!vha->flags.init_done) |
1da177e4 LT |
1855 | qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n"); |
1856 | ||
1857 | DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n", | |
e315cd28 | 1858 | vha->host_no)); |
1da177e4 LT |
1859 | |
1860 | do { | |
e315cd28 | 1861 | rval = qla2x00_get_firmware_state(vha, state); |
1da177e4 | 1862 | if (rval == QLA_SUCCESS) { |
4d4df193 | 1863 | if (state[0] < FSTATE_LOSS_OF_SYNC) { |
e315cd28 | 1864 | vha->device_flags &= ~DFLG_NO_CABLE; |
1da177e4 | 1865 | } |
4d4df193 HK |
1866 | if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { |
1867 | DEBUG16(printk("scsi(%ld): fw_state=%x " | |
e315cd28 | 1868 | "84xx=%x.\n", vha->host_no, state[0], |
4d4df193 HK |
1869 | state[2])); |
1870 | if ((state[2] & FSTATE_LOGGED_IN) && | |
1871 | (state[2] & FSTATE_WAITING_FOR_VERIFY)) { | |
1872 | DEBUG16(printk("scsi(%ld): Sending " | |
e315cd28 | 1873 | "verify iocb.\n", vha->host_no)); |
4d4df193 HK |
1874 | |
1875 | cs84xx_time = jiffies; | |
e315cd28 | 1876 | rval = qla84xx_init_chip(vha); |
4d4df193 HK |
1877 | if (rval != QLA_SUCCESS) |
1878 | break; | |
1879 | ||
1880 | /* Add time taken to initialize. */ | |
1881 | cs84xx_time = jiffies - cs84xx_time; | |
1882 | wtime += cs84xx_time; | |
1883 | mtime += cs84xx_time; | |
1884 | DEBUG16(printk("scsi(%ld): Increasing " | |
1885 | "wait time by %ld. New time %ld\n", | |
e315cd28 | 1886 | vha->host_no, cs84xx_time, wtime)); |
4d4df193 HK |
1887 | } |
1888 | } else if (state[0] == FSTATE_READY) { | |
1da177e4 | 1889 | DEBUG(printk("scsi(%ld): F/W Ready - OK \n", |
e315cd28 | 1890 | vha->host_no)); |
1da177e4 | 1891 | |
e315cd28 | 1892 | qla2x00_get_retry_cnt(vha, &ha->retry_count, |
1da177e4 LT |
1893 | &ha->login_timeout, &ha->r_a_tov); |
1894 | ||
1895 | rval = QLA_SUCCESS; | |
1896 | break; | |
1897 | } | |
1898 | ||
1899 | rval = QLA_FUNCTION_FAILED; | |
1900 | ||
e315cd28 | 1901 | if (atomic_read(&vha->loop_down_timer) && |
4d4df193 | 1902 | state[0] != FSTATE_READY) { |
1da177e4 | 1903 | /* Loop down. Timeout on min_wait for states |
fa2a1ce5 AV |
1904 | * other than Wait for Login. |
1905 | */ | |
1da177e4 LT |
1906 | if (time_after_eq(jiffies, mtime)) { |
1907 | qla_printk(KERN_INFO, ha, | |
1908 | "Cable is unplugged...\n"); | |
1909 | ||
e315cd28 | 1910 | vha->device_flags |= DFLG_NO_CABLE; |
1da177e4 LT |
1911 | break; |
1912 | } | |
1913 | } | |
1914 | } else { | |
1915 | /* Mailbox cmd failed. Timeout on min_wait. */ | |
cdbb0a4f SV |
1916 | if (time_after_eq(jiffies, mtime) || |
1917 | (IS_QLA82XX(ha) && ha->flags.fw_hung)) | |
1da177e4 LT |
1918 | break; |
1919 | } | |
1920 | ||
1921 | if (time_after_eq(jiffies, wtime)) | |
1922 | break; | |
1923 | ||
1924 | /* Delay for a while */ | |
1925 | msleep(500); | |
1926 | ||
1927 | DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n", | |
e315cd28 | 1928 | vha->host_no, state[0], jiffies)); |
1da177e4 LT |
1929 | } while (1); |
1930 | ||
656e8912 AV |
1931 | DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n", |
1932 | vha->host_no, state[0], state[1], state[2], state[3], state[4], | |
1933 | jiffies)); | |
1da177e4 LT |
1934 | |
1935 | if (rval) { | |
1936 | DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n", | |
e315cd28 | 1937 | vha->host_no)); |
1da177e4 LT |
1938 | } |
1939 | ||
1940 | return (rval); | |
1941 | } | |
1942 | ||
1943 | /* | |
1944 | * qla2x00_configure_hba | |
1945 | * Setup adapter context. | |
1946 | * | |
1947 | * Input: | |
1948 | * ha = adapter state pointer. | |
1949 | * | |
1950 | * Returns: | |
1951 | * 0 = success | |
1952 | * | |
1953 | * Context: | |
1954 | * Kernel context. | |
1955 | */ | |
1956 | static int | |
e315cd28 | 1957 | qla2x00_configure_hba(scsi_qla_host_t *vha) |
1da177e4 LT |
1958 | { |
1959 | int rval; | |
1960 | uint16_t loop_id; | |
1961 | uint16_t topo; | |
2c3dfe3f | 1962 | uint16_t sw_cap; |
1da177e4 LT |
1963 | uint8_t al_pa; |
1964 | uint8_t area; | |
1965 | uint8_t domain; | |
1966 | char connect_type[22]; | |
e315cd28 | 1967 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1968 | |
1969 | /* Get host addresses. */ | |
e315cd28 | 1970 | rval = qla2x00_get_adapter_id(vha, |
2c3dfe3f | 1971 | &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); |
1da177e4 | 1972 | if (rval != QLA_SUCCESS) { |
e315cd28 | 1973 | if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || |
33135aa2 RA |
1974 | (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { |
1975 | DEBUG2(printk("%s(%ld) Loop is in a transition state\n", | |
e315cd28 | 1976 | __func__, vha->host_no)); |
33135aa2 RA |
1977 | } else { |
1978 | qla_printk(KERN_WARNING, ha, | |
1979 | "ERROR -- Unable to get host loop ID.\n"); | |
e315cd28 | 1980 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
33135aa2 | 1981 | } |
1da177e4 LT |
1982 | return (rval); |
1983 | } | |
1984 | ||
1985 | if (topo == 4) { | |
1986 | qla_printk(KERN_INFO, ha, | |
1987 | "Cannot get topology - retrying.\n"); | |
1988 | return (QLA_FUNCTION_FAILED); | |
1989 | } | |
1990 | ||
e315cd28 | 1991 | vha->loop_id = loop_id; |
1da177e4 LT |
1992 | |
1993 | /* initialize */ | |
1994 | ha->min_external_loopid = SNS_FIRST_LOOP_ID; | |
1995 | ha->operating_mode = LOOP; | |
2c3dfe3f | 1996 | ha->switch_cap = 0; |
1da177e4 LT |
1997 | |
1998 | switch (topo) { | |
1999 | case 0: | |
2000 | DEBUG3(printk("scsi(%ld): HBA in NL topology.\n", | |
e315cd28 | 2001 | vha->host_no)); |
1da177e4 LT |
2002 | ha->current_topology = ISP_CFG_NL; |
2003 | strcpy(connect_type, "(Loop)"); | |
2004 | break; | |
2005 | ||
2006 | case 1: | |
2007 | DEBUG3(printk("scsi(%ld): HBA in FL topology.\n", | |
e315cd28 | 2008 | vha->host_no)); |
2c3dfe3f | 2009 | ha->switch_cap = sw_cap; |
1da177e4 LT |
2010 | ha->current_topology = ISP_CFG_FL; |
2011 | strcpy(connect_type, "(FL_Port)"); | |
2012 | break; | |
2013 | ||
2014 | case 2: | |
2015 | DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n", | |
e315cd28 | 2016 | vha->host_no)); |
1da177e4 LT |
2017 | ha->operating_mode = P2P; |
2018 | ha->current_topology = ISP_CFG_N; | |
2019 | strcpy(connect_type, "(N_Port-to-N_Port)"); | |
2020 | break; | |
2021 | ||
2022 | case 3: | |
2023 | DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n", | |
e315cd28 | 2024 | vha->host_no)); |
2c3dfe3f | 2025 | ha->switch_cap = sw_cap; |
1da177e4 LT |
2026 | ha->operating_mode = P2P; |
2027 | ha->current_topology = ISP_CFG_F; | |
2028 | strcpy(connect_type, "(F_Port)"); | |
2029 | break; | |
2030 | ||
2031 | default: | |
2032 | DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. " | |
2033 | "Using NL.\n", | |
e315cd28 | 2034 | vha->host_no, topo)); |
1da177e4 LT |
2035 | ha->current_topology = ISP_CFG_NL; |
2036 | strcpy(connect_type, "(Loop)"); | |
2037 | break; | |
2038 | } | |
2039 | ||
2040 | /* Save Host port and loop ID. */ | |
2041 | /* byte order - Big Endian */ | |
e315cd28 AC |
2042 | vha->d_id.b.domain = domain; |
2043 | vha->d_id.b.area = area; | |
2044 | vha->d_id.b.al_pa = al_pa; | |
1da177e4 | 2045 | |
e315cd28 | 2046 | if (!vha->flags.init_done) |
1da177e4 LT |
2047 | qla_printk(KERN_INFO, ha, |
2048 | "Topology - %s, Host Loop address 0x%x\n", | |
e315cd28 | 2049 | connect_type, vha->loop_id); |
1da177e4 LT |
2050 | |
2051 | if (rval) { | |
e315cd28 | 2052 | DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no)); |
1da177e4 | 2053 | } else { |
e315cd28 | 2054 | DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no)); |
1da177e4 LT |
2055 | } |
2056 | ||
2057 | return(rval); | |
2058 | } | |
2059 | ||
a9083016 | 2060 | inline void |
e315cd28 AC |
2061 | qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, |
2062 | char *def) | |
9bb9fcf2 AV |
2063 | { |
2064 | char *st, *en; | |
2065 | uint16_t index; | |
e315cd28 | 2066 | struct qla_hw_data *ha = vha->hw; |
ab671149 | 2067 | int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && |
a9083016 | 2068 | !IS_QLA8XXX_TYPE(ha); |
9bb9fcf2 AV |
2069 | |
2070 | if (memcmp(model, BINZERO, len) != 0) { | |
2071 | strncpy(ha->model_number, model, len); | |
2072 | st = en = ha->model_number; | |
2073 | en += len - 1; | |
2074 | while (en > st) { | |
2075 | if (*en != 0x20 && *en != 0x00) | |
2076 | break; | |
2077 | *en-- = '\0'; | |
2078 | } | |
2079 | ||
2080 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
2081 | if (use_tbl && |
2082 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 | 2083 | index < QLA_MODEL_NAMES) |
1ee27146 JC |
2084 | strncpy(ha->model_desc, |
2085 | qla2x00_model_name[index * 2 + 1], | |
2086 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
2087 | } else { |
2088 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
2089 | if (use_tbl && |
2090 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 AV |
2091 | index < QLA_MODEL_NAMES) { |
2092 | strcpy(ha->model_number, | |
2093 | qla2x00_model_name[index * 2]); | |
1ee27146 JC |
2094 | strncpy(ha->model_desc, |
2095 | qla2x00_model_name[index * 2 + 1], | |
2096 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
2097 | } else { |
2098 | strcpy(ha->model_number, def); | |
2099 | } | |
2100 | } | |
1ee27146 | 2101 | if (IS_FWI2_CAPABLE(ha)) |
e315cd28 | 2102 | qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, |
1ee27146 | 2103 | sizeof(ha->model_desc)); |
9bb9fcf2 AV |
2104 | } |
2105 | ||
4e08df3f DM |
2106 | /* On sparc systems, obtain port and node WWN from firmware |
2107 | * properties. | |
2108 | */ | |
e315cd28 | 2109 | static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) |
4e08df3f DM |
2110 | { |
2111 | #ifdef CONFIG_SPARC | |
e315cd28 | 2112 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 2113 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
2114 | struct device_node *dp = pci_device_to_OF_node(pdev); |
2115 | const u8 *val; | |
4e08df3f DM |
2116 | int len; |
2117 | ||
2118 | val = of_get_property(dp, "port-wwn", &len); | |
2119 | if (val && len >= WWN_SIZE) | |
2120 | memcpy(nv->port_name, val, WWN_SIZE); | |
2121 | ||
2122 | val = of_get_property(dp, "node-wwn", &len); | |
2123 | if (val && len >= WWN_SIZE) | |
2124 | memcpy(nv->node_name, val, WWN_SIZE); | |
2125 | #endif | |
2126 | } | |
2127 | ||
1da177e4 LT |
2128 | /* |
2129 | * NVRAM configuration for ISP 2xxx | |
2130 | * | |
2131 | * Input: | |
2132 | * ha = adapter block pointer. | |
2133 | * | |
2134 | * Output: | |
2135 | * initialization control block in response_ring | |
2136 | * host adapters parameters in host adapter block | |
2137 | * | |
2138 | * Returns: | |
2139 | * 0 = success. | |
2140 | */ | |
abbd8870 | 2141 | int |
e315cd28 | 2142 | qla2x00_nvram_config(scsi_qla_host_t *vha) |
1da177e4 | 2143 | { |
4e08df3f | 2144 | int rval; |
0107109e AV |
2145 | uint8_t chksum = 0; |
2146 | uint16_t cnt; | |
2147 | uint8_t *dptr1, *dptr2; | |
e315cd28 | 2148 | struct qla_hw_data *ha = vha->hw; |
0107109e | 2149 | init_cb_t *icb = ha->init_cb; |
281afe19 SJ |
2150 | nvram_t *nv = ha->nvram; |
2151 | uint8_t *ptr = ha->nvram; | |
3d71644c | 2152 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 2153 | |
4e08df3f DM |
2154 | rval = QLA_SUCCESS; |
2155 | ||
1da177e4 | 2156 | /* Determine NVRAM starting address. */ |
0107109e | 2157 | ha->nvram_size = sizeof(nvram_t); |
1da177e4 LT |
2158 | ha->nvram_base = 0; |
2159 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) | |
2160 | if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) | |
2161 | ha->nvram_base = 0x80; | |
2162 | ||
2163 | /* Get NVRAM data and calculate checksum. */ | |
e315cd28 | 2164 | ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); |
0107109e AV |
2165 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) |
2166 | chksum += *ptr++; | |
1da177e4 | 2167 | |
e315cd28 | 2168 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no)); |
281afe19 | 2169 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
1da177e4 LT |
2170 | |
2171 | /* Bad NVRAM data, set defaults parameters. */ | |
2172 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || | |
2173 | nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { | |
2174 | /* Reset NVRAM data. */ | |
2175 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
2176 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
2177 | nv->nvram_version); | |
4e08df3f DM |
2178 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " |
2179 | "invalid -- WWPN) defaults.\n"); | |
2180 | ||
2181 | /* | |
2182 | * Set default initialization control block. | |
2183 | */ | |
2184 | memset(nv, 0, ha->nvram_size); | |
2185 | nv->parameter_block_version = ICB_VERSION; | |
2186 | ||
2187 | if (IS_QLA23XX(ha)) { | |
2188 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
2189 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
2190 | nv->add_firmware_options[0] = BIT_5; | |
2191 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
2192 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
2193 | nv->special_options[1] = BIT_7; | |
2194 | } else if (IS_QLA2200(ha)) { | |
2195 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
2196 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
2197 | nv->add_firmware_options[0] = BIT_5; | |
2198 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
2199 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
2200 | } else if (IS_QLA2100(ha)) { | |
2201 | nv->firmware_options[0] = BIT_3 | BIT_1; | |
2202 | nv->firmware_options[1] = BIT_5; | |
2203 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
2204 | } | |
2205 | ||
2206 | nv->max_iocb_allocation = __constant_cpu_to_le16(256); | |
2207 | nv->execution_throttle = __constant_cpu_to_le16(16); | |
2208 | nv->retry_count = 8; | |
2209 | nv->retry_delay = 1; | |
2210 | ||
2211 | nv->port_name[0] = 33; | |
2212 | nv->port_name[3] = 224; | |
2213 | nv->port_name[4] = 139; | |
2214 | ||
e315cd28 | 2215 | qla2xxx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
2216 | |
2217 | nv->login_timeout = 4; | |
2218 | ||
2219 | /* | |
2220 | * Set default host adapter parameters | |
2221 | */ | |
2222 | nv->host_p[1] = BIT_2; | |
2223 | nv->reset_delay = 5; | |
2224 | nv->port_down_retry_count = 8; | |
2225 | nv->max_luns_per_target = __constant_cpu_to_le16(8); | |
2226 | nv->link_down_timeout = 60; | |
2227 | ||
2228 | rval = 1; | |
1da177e4 LT |
2229 | } |
2230 | ||
2231 | #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) | |
2232 | /* | |
2233 | * The SN2 does not provide BIOS emulation which means you can't change | |
2234 | * potentially bogus BIOS settings. Force the use of default settings | |
2235 | * for link rate and frame size. Hope that the rest of the settings | |
2236 | * are valid. | |
2237 | */ | |
2238 | if (ia64_platform_is("sn2")) { | |
2239 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
2240 | if (IS_QLA23XX(ha)) | |
2241 | nv->special_options[1] = BIT_7; | |
2242 | } | |
2243 | #endif | |
2244 | ||
2245 | /* Reset Initialization control block */ | |
0107109e | 2246 | memset(icb, 0, ha->init_cb_size); |
1da177e4 LT |
2247 | |
2248 | /* | |
2249 | * Setup driver NVRAM options. | |
2250 | */ | |
2251 | nv->firmware_options[0] |= (BIT_6 | BIT_1); | |
2252 | nv->firmware_options[0] &= ~(BIT_5 | BIT_4); | |
2253 | nv->firmware_options[1] |= (BIT_5 | BIT_0); | |
2254 | nv->firmware_options[1] &= ~BIT_4; | |
2255 | ||
2256 | if (IS_QLA23XX(ha)) { | |
2257 | nv->firmware_options[0] |= BIT_2; | |
2258 | nv->firmware_options[0] &= ~BIT_3; | |
5ff1d584 | 2259 | nv->firmware_options[0] &= ~BIT_6; |
0107109e | 2260 | nv->add_firmware_options[1] |= BIT_5 | BIT_4; |
1da177e4 LT |
2261 | |
2262 | if (IS_QLA2300(ha)) { | |
2263 | if (ha->fb_rev == FPM_2310) { | |
2264 | strcpy(ha->model_number, "QLA2310"); | |
2265 | } else { | |
2266 | strcpy(ha->model_number, "QLA2300"); | |
2267 | } | |
2268 | } else { | |
e315cd28 | 2269 | qla2x00_set_model_info(vha, nv->model_number, |
9bb9fcf2 | 2270 | sizeof(nv->model_number), "QLA23xx"); |
1da177e4 LT |
2271 | } |
2272 | } else if (IS_QLA2200(ha)) { | |
2273 | nv->firmware_options[0] |= BIT_2; | |
2274 | /* | |
2275 | * 'Point-to-point preferred, else loop' is not a safe | |
2276 | * connection mode setting. | |
2277 | */ | |
2278 | if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == | |
2279 | (BIT_5 | BIT_4)) { | |
2280 | /* Force 'loop preferred, else point-to-point'. */ | |
2281 | nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); | |
2282 | nv->add_firmware_options[0] |= BIT_5; | |
2283 | } | |
2284 | strcpy(ha->model_number, "QLA22xx"); | |
2285 | } else /*if (IS_QLA2100(ha))*/ { | |
2286 | strcpy(ha->model_number, "QLA2100"); | |
2287 | } | |
2288 | ||
2289 | /* | |
2290 | * Copy over NVRAM RISC parameter block to initialization control block. | |
2291 | */ | |
2292 | dptr1 = (uint8_t *)icb; | |
2293 | dptr2 = (uint8_t *)&nv->parameter_block_version; | |
2294 | cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; | |
2295 | while (cnt--) | |
2296 | *dptr1++ = *dptr2++; | |
2297 | ||
2298 | /* Copy 2nd half. */ | |
2299 | dptr1 = (uint8_t *)icb->add_firmware_options; | |
2300 | cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; | |
2301 | while (cnt--) | |
2302 | *dptr1++ = *dptr2++; | |
2303 | ||
5341e868 AV |
2304 | /* Use alternate WWN? */ |
2305 | if (nv->host_p[1] & BIT_7) { | |
2306 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
2307 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
2308 | } | |
2309 | ||
1da177e4 LT |
2310 | /* Prepare nodename */ |
2311 | if ((icb->firmware_options[1] & BIT_6) == 0) { | |
2312 | /* | |
2313 | * Firmware will apply the following mask if the nodename was | |
2314 | * not provided. | |
2315 | */ | |
2316 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
2317 | icb->node_name[0] &= 0xF0; | |
2318 | } | |
2319 | ||
2320 | /* | |
2321 | * Set host adapter parameters. | |
2322 | */ | |
0181944f | 2323 | if (nv->host_p[0] & BIT_7) |
11010fec | 2324 | ql2xextended_error_logging = 1; |
1da177e4 LT |
2325 | ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); |
2326 | /* Always load RISC code on non ISP2[12]00 chips. */ | |
2327 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) | |
2328 | ha->flags.disable_risc_code_load = 0; | |
2329 | ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); | |
2330 | ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); | |
2331 | ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); | |
06c22bd1 | 2332 | ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; |
d4c760c2 | 2333 | ha->flags.disable_serdes = 0; |
1da177e4 LT |
2334 | |
2335 | ha->operating_mode = | |
2336 | (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
2337 | ||
2338 | memcpy(ha->fw_seriallink_options, nv->seriallink_options, | |
2339 | sizeof(ha->fw_seriallink_options)); | |
2340 | ||
2341 | /* save HBA serial number */ | |
2342 | ha->serial0 = icb->port_name[5]; | |
2343 | ha->serial1 = icb->port_name[6]; | |
2344 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
2345 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
2346 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
1da177e4 LT |
2347 | |
2348 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
2349 | ||
2350 | ha->retry_count = nv->retry_count; | |
2351 | ||
2352 | /* Set minimum login_timeout to 4 seconds. */ | |
5b91490e | 2353 | if (nv->login_timeout != ql2xlogintimeout) |
1da177e4 LT |
2354 | nv->login_timeout = ql2xlogintimeout; |
2355 | if (nv->login_timeout < 4) | |
2356 | nv->login_timeout = 4; | |
2357 | ha->login_timeout = nv->login_timeout; | |
2358 | icb->login_timeout = nv->login_timeout; | |
2359 | ||
00a537b8 AV |
2360 | /* Set minimum RATOV to 100 tenths of a second. */ |
2361 | ha->r_a_tov = 100; | |
1da177e4 | 2362 | |
1da177e4 LT |
2363 | ha->loop_reset_delay = nv->reset_delay; |
2364 | ||
1da177e4 LT |
2365 | /* Link Down Timeout = 0: |
2366 | * | |
2367 | * When Port Down timer expires we will start returning | |
2368 | * I/O's to OS with "DID_NO_CONNECT". | |
2369 | * | |
2370 | * Link Down Timeout != 0: | |
2371 | * | |
2372 | * The driver waits for the link to come up after link down | |
2373 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
fa2a1ce5 | 2374 | */ |
1da177e4 LT |
2375 | if (nv->link_down_timeout == 0) { |
2376 | ha->loop_down_abort_time = | |
354d6b21 | 2377 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); |
1da177e4 LT |
2378 | } else { |
2379 | ha->link_down_timeout = nv->link_down_timeout; | |
2380 | ha->loop_down_abort_time = | |
2381 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
fa2a1ce5 | 2382 | } |
1da177e4 | 2383 | |
1da177e4 LT |
2384 | /* |
2385 | * Need enough time to try and get the port back. | |
2386 | */ | |
2387 | ha->port_down_retry_count = nv->port_down_retry_count; | |
2388 | if (qlport_down_retry) | |
2389 | ha->port_down_retry_count = qlport_down_retry; | |
2390 | /* Set login_retry_count */ | |
2391 | ha->login_retry_count = nv->retry_count; | |
2392 | if (ha->port_down_retry_count == nv->port_down_retry_count && | |
2393 | ha->port_down_retry_count > 3) | |
2394 | ha->login_retry_count = ha->port_down_retry_count; | |
2395 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
2396 | ha->login_retry_count = ha->port_down_retry_count; | |
2397 | if (ql2xloginretrycount) | |
2398 | ha->login_retry_count = ql2xloginretrycount; | |
2399 | ||
1da177e4 LT |
2400 | icb->lun_enables = __constant_cpu_to_le16(0); |
2401 | icb->command_resource_count = 0; | |
2402 | icb->immediate_notify_resource_count = 0; | |
2403 | icb->timeout = __constant_cpu_to_le16(0); | |
2404 | ||
2405 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { | |
2406 | /* Enable RIO */ | |
2407 | icb->firmware_options[0] &= ~BIT_3; | |
2408 | icb->add_firmware_options[0] &= | |
2409 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
2410 | icb->add_firmware_options[0] |= BIT_2; | |
2411 | icb->response_accumulation_timer = 3; | |
2412 | icb->interrupt_delay_timer = 5; | |
2413 | ||
e315cd28 | 2414 | vha->flags.process_response_queue = 1; |
1da177e4 | 2415 | } else { |
4fdfefe5 | 2416 | /* Enable ZIO. */ |
e315cd28 | 2417 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
2418 | ha->zio_mode = icb->add_firmware_options[0] & |
2419 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
2420 | ha->zio_timer = icb->interrupt_delay_timer ? | |
2421 | icb->interrupt_delay_timer: 2; | |
2422 | } | |
1da177e4 LT |
2423 | icb->add_firmware_options[0] &= |
2424 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
e315cd28 | 2425 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 2426 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d AV |
2427 | ha->zio_mode = QLA_ZIO_MODE_6; |
2428 | ||
4fdfefe5 | 2429 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer " |
e315cd28 | 2430 | "delay (%d us).\n", vha->host_no, ha->zio_mode, |
4fdfefe5 | 2431 | ha->zio_timer * 100)); |
1da177e4 | 2432 | qla_printk(KERN_INFO, ha, |
4fdfefe5 AV |
2433 | "ZIO mode %d enabled; timer delay (%d us).\n", |
2434 | ha->zio_mode, ha->zio_timer * 100); | |
1da177e4 | 2435 | |
4fdfefe5 AV |
2436 | icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; |
2437 | icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; | |
e315cd28 | 2438 | vha->flags.process_response_queue = 1; |
1da177e4 LT |
2439 | } |
2440 | } | |
2441 | ||
4e08df3f DM |
2442 | if (rval) { |
2443 | DEBUG2_3(printk(KERN_WARNING | |
e315cd28 | 2444 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); |
4e08df3f DM |
2445 | } |
2446 | return (rval); | |
1da177e4 LT |
2447 | } |
2448 | ||
19a7b4ae JSEC |
2449 | static void |
2450 | qla2x00_rport_del(void *data) | |
2451 | { | |
2452 | fc_port_t *fcport = data; | |
d97994dc | 2453 | struct fc_rport *rport; |
d97994dc | 2454 | |
e315cd28 | 2455 | spin_lock_irq(fcport->vha->host->host_lock); |
ac280b67 | 2456 | rport = fcport->drport ? fcport->drport: fcport->rport; |
d97994dc | 2457 | fcport->drport = NULL; |
e315cd28 | 2458 | spin_unlock_irq(fcport->vha->host->host_lock); |
d97994dc AV |
2459 | if (rport) |
2460 | fc_remote_port_delete(rport); | |
19a7b4ae JSEC |
2461 | } |
2462 | ||
1da177e4 LT |
2463 | /** |
2464 | * qla2x00_alloc_fcport() - Allocate a generic fcport. | |
2465 | * @ha: HA context | |
2466 | * @flags: allocation flags | |
2467 | * | |
2468 | * Returns a pointer to the allocated fcport, or NULL, if none available. | |
2469 | */ | |
9a069e19 | 2470 | fc_port_t * |
e315cd28 | 2471 | qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) |
1da177e4 LT |
2472 | { |
2473 | fc_port_t *fcport; | |
2474 | ||
bbfbbbc1 MK |
2475 | fcport = kzalloc(sizeof(fc_port_t), flags); |
2476 | if (!fcport) | |
2477 | return NULL; | |
1da177e4 LT |
2478 | |
2479 | /* Setup fcport template structure. */ | |
e315cd28 AC |
2480 | fcport->vha = vha; |
2481 | fcport->vp_idx = vha->vp_idx; | |
1da177e4 LT |
2482 | fcport->port_type = FCT_UNKNOWN; |
2483 | fcport->loop_id = FC_NO_LOOP_ID; | |
1da177e4 | 2484 | atomic_set(&fcport->state, FCS_UNCONFIGURED); |
ad3e0eda | 2485 | fcport->supported_classes = FC_COS_UNSPECIFIED; |
1da177e4 | 2486 | |
bbfbbbc1 | 2487 | return fcport; |
1da177e4 LT |
2488 | } |
2489 | ||
2490 | /* | |
2491 | * qla2x00_configure_loop | |
2492 | * Updates Fibre Channel Device Database with what is actually on loop. | |
2493 | * | |
2494 | * Input: | |
2495 | * ha = adapter block pointer. | |
2496 | * | |
2497 | * Returns: | |
2498 | * 0 = success. | |
2499 | * 1 = error. | |
2500 | * 2 = database was full and device was not configured. | |
2501 | */ | |
2502 | static int | |
e315cd28 | 2503 | qla2x00_configure_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
2504 | { |
2505 | int rval; | |
2506 | unsigned long flags, save_flags; | |
e315cd28 | 2507 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2508 | rval = QLA_SUCCESS; |
2509 | ||
2510 | /* Get Initiator ID */ | |
e315cd28 AC |
2511 | if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { |
2512 | rval = qla2x00_configure_hba(vha); | |
1da177e4 LT |
2513 | if (rval != QLA_SUCCESS) { |
2514 | DEBUG(printk("scsi(%ld): Unable to configure HBA.\n", | |
e315cd28 | 2515 | vha->host_no)); |
1da177e4 LT |
2516 | return (rval); |
2517 | } | |
2518 | } | |
2519 | ||
e315cd28 | 2520 | save_flags = flags = vha->dpc_flags; |
1da177e4 | 2521 | DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n", |
e315cd28 | 2522 | vha->host_no, flags)); |
1da177e4 LT |
2523 | |
2524 | /* | |
2525 | * If we have both an RSCN and PORT UPDATE pending then handle them | |
2526 | * both at the same time. | |
2527 | */ | |
e315cd28 AC |
2528 | clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
2529 | clear_bit(RSCN_UPDATE, &vha->dpc_flags); | |
1da177e4 | 2530 | |
3064ff39 MH |
2531 | qla2x00_get_data_rate(vha); |
2532 | ||
1da177e4 LT |
2533 | /* Determine what we need to do */ |
2534 | if (ha->current_topology == ISP_CFG_FL && | |
2535 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2536 | ||
e315cd28 | 2537 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2538 | set_bit(RSCN_UPDATE, &flags); |
2539 | ||
2540 | } else if (ha->current_topology == ISP_CFG_F && | |
2541 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2542 | ||
e315cd28 | 2543 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2544 | set_bit(RSCN_UPDATE, &flags); |
2545 | clear_bit(LOCAL_LOOP_UPDATE, &flags); | |
21333b48 AV |
2546 | |
2547 | } else if (ha->current_topology == ISP_CFG_N) { | |
2548 | clear_bit(RSCN_UPDATE, &flags); | |
1da177e4 | 2549 | |
e315cd28 | 2550 | } else if (!vha->flags.online || |
1da177e4 LT |
2551 | (test_bit(ABORT_ISP_ACTIVE, &flags))) { |
2552 | ||
e315cd28 | 2553 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2554 | set_bit(RSCN_UPDATE, &flags); |
2555 | set_bit(LOCAL_LOOP_UPDATE, &flags); | |
2556 | } | |
2557 | ||
2558 | if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { | |
e315cd28 | 2559 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) |
1da177e4 | 2560 | rval = QLA_FUNCTION_FAILED; |
e315cd28 AC |
2561 | else |
2562 | rval = qla2x00_configure_local_loop(vha); | |
1da177e4 LT |
2563 | } |
2564 | ||
2565 | if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { | |
e315cd28 | 2566 | if (LOOP_TRANSITION(vha)) |
1da177e4 | 2567 | rval = QLA_FUNCTION_FAILED; |
e315cd28 AC |
2568 | else |
2569 | rval = qla2x00_configure_fabric(vha); | |
1da177e4 LT |
2570 | } |
2571 | ||
2572 | if (rval == QLA_SUCCESS) { | |
e315cd28 AC |
2573 | if (atomic_read(&vha->loop_down_timer) || |
2574 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { | |
1da177e4 LT |
2575 | rval = QLA_FUNCTION_FAILED; |
2576 | } else { | |
e315cd28 | 2577 | atomic_set(&vha->loop_state, LOOP_READY); |
1da177e4 | 2578 | |
e315cd28 | 2579 | DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no)); |
1da177e4 LT |
2580 | } |
2581 | } | |
2582 | ||
2583 | if (rval) { | |
2584 | DEBUG2_3(printk("%s(%ld): *** FAILED ***\n", | |
e315cd28 | 2585 | __func__, vha->host_no)); |
1da177e4 LT |
2586 | } else { |
2587 | DEBUG3(printk("%s: exiting normally\n", __func__)); | |
2588 | } | |
2589 | ||
cc3ef7bc | 2590 | /* Restore state if a resync event occurred during processing */ |
e315cd28 | 2591 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { |
1da177e4 | 2592 | if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) |
e315cd28 | 2593 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
f4658b6c | 2594 | if (test_bit(RSCN_UPDATE, &save_flags)) { |
e315cd28 | 2595 | set_bit(RSCN_UPDATE, &vha->dpc_flags); |
3a6478df GM |
2596 | if (!IS_ALOGIO_CAPABLE(ha)) |
2597 | vha->flags.rscn_queue_overflow = 1; | |
f4658b6c | 2598 | } |
1da177e4 LT |
2599 | } |
2600 | ||
2601 | return (rval); | |
2602 | } | |
2603 | ||
2604 | ||
2605 | ||
2606 | /* | |
2607 | * qla2x00_configure_local_loop | |
2608 | * Updates Fibre Channel Device Database with local loop devices. | |
2609 | * | |
2610 | * Input: | |
2611 | * ha = adapter block pointer. | |
2612 | * | |
2613 | * Returns: | |
2614 | * 0 = success. | |
2615 | */ | |
2616 | static int | |
e315cd28 | 2617 | qla2x00_configure_local_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
2618 | { |
2619 | int rval, rval2; | |
2620 | int found_devs; | |
2621 | int found; | |
2622 | fc_port_t *fcport, *new_fcport; | |
2623 | ||
2624 | uint16_t index; | |
2625 | uint16_t entries; | |
2626 | char *id_iter; | |
2627 | uint16_t loop_id; | |
2628 | uint8_t domain, area, al_pa; | |
e315cd28 | 2629 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2630 | |
2631 | found_devs = 0; | |
2632 | new_fcport = NULL; | |
2633 | entries = MAX_FIBRE_DEVICES; | |
2634 | ||
e315cd28 AC |
2635 | DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no)); |
2636 | DEBUG3(qla2x00_get_fcal_position_map(vha, NULL)); | |
1da177e4 LT |
2637 | |
2638 | /* Get list of logged in devices. */ | |
2639 | memset(ha->gid_list, 0, GID_LIST_SIZE); | |
e315cd28 | 2640 | rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, |
1da177e4 LT |
2641 | &entries); |
2642 | if (rval != QLA_SUCCESS) | |
2643 | goto cleanup_allocation; | |
2644 | ||
2645 | DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n", | |
7640335e | 2646 | vha->host_no, entries)); |
1da177e4 LT |
2647 | DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list, |
2648 | entries * sizeof(struct gid_list_info))); | |
2649 | ||
2650 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 2651 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 LT |
2652 | if (new_fcport == NULL) { |
2653 | rval = QLA_MEMORY_ALLOC_FAILED; | |
2654 | goto cleanup_allocation; | |
2655 | } | |
2656 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2657 | ||
2658 | /* | |
2659 | * Mark local devices that were present with FCF_DEVICE_LOST for now. | |
2660 | */ | |
e315cd28 | 2661 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2662 | if (atomic_read(&fcport->state) == FCS_ONLINE && |
2663 | fcport->port_type != FCT_BROADCAST && | |
2664 | (fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
2665 | ||
2666 | DEBUG(printk("scsi(%ld): Marking port lost, " | |
2667 | "loop_id=0x%04x\n", | |
e315cd28 | 2668 | vha->host_no, fcport->loop_id)); |
1da177e4 LT |
2669 | |
2670 | atomic_set(&fcport->state, FCS_DEVICE_LOST); | |
1da177e4 LT |
2671 | } |
2672 | } | |
2673 | ||
2674 | /* Add devices to port list. */ | |
2675 | id_iter = (char *)ha->gid_list; | |
2676 | for (index = 0; index < entries; index++) { | |
2677 | domain = ((struct gid_list_info *)id_iter)->domain; | |
2678 | area = ((struct gid_list_info *)id_iter)->area; | |
2679 | al_pa = ((struct gid_list_info *)id_iter)->al_pa; | |
abbd8870 | 2680 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) |
1da177e4 LT |
2681 | loop_id = (uint16_t) |
2682 | ((struct gid_list_info *)id_iter)->loop_id_2100; | |
abbd8870 | 2683 | else |
1da177e4 LT |
2684 | loop_id = le16_to_cpu( |
2685 | ((struct gid_list_info *)id_iter)->loop_id); | |
abbd8870 | 2686 | id_iter += ha->gid_list_info_size; |
1da177e4 LT |
2687 | |
2688 | /* Bypass reserved domain fields. */ | |
2689 | if ((domain & 0xf0) == 0xf0) | |
2690 | continue; | |
2691 | ||
2692 | /* Bypass if not same domain and area of adapter. */ | |
f7d289f6 | 2693 | if (area && domain && |
e315cd28 | 2694 | (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) |
1da177e4 LT |
2695 | continue; |
2696 | ||
2697 | /* Bypass invalid local loop ID. */ | |
2698 | if (loop_id > LAST_LOCAL_LOOP_ID) | |
2699 | continue; | |
2700 | ||
2701 | /* Fill in member data. */ | |
2702 | new_fcport->d_id.b.domain = domain; | |
2703 | new_fcport->d_id.b.area = area; | |
2704 | new_fcport->d_id.b.al_pa = al_pa; | |
2705 | new_fcport->loop_id = loop_id; | |
e315cd28 AC |
2706 | new_fcport->vp_idx = vha->vp_idx; |
2707 | rval2 = qla2x00_get_port_database(vha, new_fcport, 0); | |
1da177e4 LT |
2708 | if (rval2 != QLA_SUCCESS) { |
2709 | DEBUG2(printk("scsi(%ld): Failed to retrieve fcport " | |
2710 | "information -- get_port_database=%x, " | |
2711 | "loop_id=0x%04x\n", | |
e315cd28 | 2712 | vha->host_no, rval2, new_fcport->loop_id)); |
c9d02acf | 2713 | DEBUG2(printk("scsi(%ld): Scheduling resync...\n", |
e315cd28 AC |
2714 | vha->host_no)); |
2715 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
2716 | continue; |
2717 | } | |
2718 | ||
2719 | /* Check for matching device in port list. */ | |
2720 | found = 0; | |
2721 | fcport = NULL; | |
e315cd28 | 2722 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2723 | if (memcmp(new_fcport->port_name, fcport->port_name, |
2724 | WWN_SIZE)) | |
2725 | continue; | |
2726 | ||
ddb9b126 | 2727 | fcport->flags &= ~FCF_FABRIC_DEVICE; |
1da177e4 LT |
2728 | fcport->loop_id = new_fcport->loop_id; |
2729 | fcport->port_type = new_fcport->port_type; | |
2730 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
2731 | memcpy(fcport->node_name, new_fcport->node_name, | |
2732 | WWN_SIZE); | |
2733 | ||
2734 | found++; | |
2735 | break; | |
2736 | } | |
2737 | ||
2738 | if (!found) { | |
2739 | /* New device, add to fcports list. */ | |
e315cd28 AC |
2740 | if (vha->vp_idx) { |
2741 | new_fcport->vha = vha; | |
2742 | new_fcport->vp_idx = vha->vp_idx; | |
2c3dfe3f | 2743 | } |
e315cd28 | 2744 | list_add_tail(&new_fcport->list, &vha->vp_fcports); |
1da177e4 LT |
2745 | |
2746 | /* Allocate a new replacement fcport. */ | |
2747 | fcport = new_fcport; | |
e315cd28 | 2748 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 LT |
2749 | if (new_fcport == NULL) { |
2750 | rval = QLA_MEMORY_ALLOC_FAILED; | |
2751 | goto cleanup_allocation; | |
2752 | } | |
2753 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2754 | } | |
2755 | ||
d8b45213 | 2756 | /* Base iIDMA settings on HBA port speed. */ |
a3cbdfad | 2757 | fcport->fp_speed = ha->link_data_rate; |
d8b45213 | 2758 | |
e315cd28 | 2759 | qla2x00_update_fcport(vha, fcport); |
1da177e4 LT |
2760 | |
2761 | found_devs++; | |
2762 | } | |
2763 | ||
2764 | cleanup_allocation: | |
c9475cb0 | 2765 | kfree(new_fcport); |
1da177e4 LT |
2766 | |
2767 | if (rval != QLA_SUCCESS) { | |
2768 | DEBUG2(printk("scsi(%ld): Configure local loop error exit: " | |
e315cd28 | 2769 | "rval=%x\n", vha->host_no, rval)); |
1da177e4 LT |
2770 | } |
2771 | ||
1da177e4 LT |
2772 | return (rval); |
2773 | } | |
2774 | ||
d8b45213 | 2775 | static void |
e315cd28 | 2776 | qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
d8b45213 AV |
2777 | { |
2778 | #define LS_UNKNOWN 2 | |
9f8fddee AV |
2779 | static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" }; |
2780 | char *link_speed; | |
d8b45213 | 2781 | int rval; |
1bb39548 | 2782 | uint16_t mb[4]; |
e315cd28 | 2783 | struct qla_hw_data *ha = vha->hw; |
d8b45213 | 2784 | |
c76f2c01 | 2785 | if (!IS_IIDMA_CAPABLE(ha)) |
d8b45213 AV |
2786 | return; |
2787 | ||
c9afb9a2 GM |
2788 | if (atomic_read(&fcport->state) != FCS_ONLINE) |
2789 | return; | |
2790 | ||
39bd9622 AV |
2791 | if (fcport->fp_speed == PORT_SPEED_UNKNOWN || |
2792 | fcport->fp_speed > ha->link_data_rate) | |
d8b45213 AV |
2793 | return; |
2794 | ||
e315cd28 | 2795 | rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, |
a3cbdfad | 2796 | mb); |
d8b45213 AV |
2797 | if (rval != QLA_SUCCESS) { |
2798 | DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA " | |
2799 | "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n", | |
e315cd28 | 2800 | vha->host_no, fcport->port_name[0], fcport->port_name[1], |
d8b45213 AV |
2801 | fcport->port_name[2], fcport->port_name[3], |
2802 | fcport->port_name[4], fcport->port_name[5], | |
2803 | fcport->port_name[6], fcport->port_name[7], rval, | |
a3cbdfad | 2804 | fcport->fp_speed, mb[0], mb[1])); |
d8b45213 | 2805 | } else { |
9f8fddee AV |
2806 | link_speed = link_speeds[LS_UNKNOWN]; |
2807 | if (fcport->fp_speed < 5) | |
2808 | link_speed = link_speeds[fcport->fp_speed]; | |
2809 | else if (fcport->fp_speed == 0x13) | |
2810 | link_speed = link_speeds[5]; | |
d8b45213 AV |
2811 | DEBUG2(qla_printk(KERN_INFO, ha, |
2812 | "iIDMA adjusted to %s GB/s on " | |
2813 | "%02x%02x%02x%02x%02x%02x%02x%02x.\n", | |
9f8fddee | 2814 | link_speed, fcport->port_name[0], |
d8b45213 AV |
2815 | fcport->port_name[1], fcport->port_name[2], |
2816 | fcport->port_name[3], fcport->port_name[4], | |
2817 | fcport->port_name[5], fcport->port_name[6], | |
2818 | fcport->port_name[7])); | |
2819 | } | |
2820 | } | |
2821 | ||
23be331d | 2822 | static void |
e315cd28 | 2823 | qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) |
8482e118 AV |
2824 | { |
2825 | struct fc_rport_identifiers rport_ids; | |
bdf79621 | 2826 | struct fc_rport *rport; |
e315cd28 | 2827 | struct qla_hw_data *ha = vha->hw; |
8482e118 | 2828 | |
ac280b67 | 2829 | qla2x00_rport_del(fcport); |
8482e118 | 2830 | |
f8b02a85 AV |
2831 | rport_ids.node_name = wwn_to_u64(fcport->node_name); |
2832 | rport_ids.port_name = wwn_to_u64(fcport->port_name); | |
8482e118 AV |
2833 | rport_ids.port_id = fcport->d_id.b.domain << 16 | |
2834 | fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; | |
77d74143 | 2835 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
e315cd28 | 2836 | fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); |
77d74143 AV |
2837 | if (!rport) { |
2838 | qla_printk(KERN_WARNING, ha, | |
2839 | "Unable to allocate fc remote port!\n"); | |
2840 | return; | |
2841 | } | |
e315cd28 | 2842 | spin_lock_irq(fcport->vha->host->host_lock); |
19a7b4ae | 2843 | *((fc_port_t **)rport->dd_data) = fcport; |
e315cd28 | 2844 | spin_unlock_irq(fcport->vha->host->host_lock); |
d97994dc | 2845 | |
ad3e0eda | 2846 | rport->supported_classes = fcport->supported_classes; |
77d74143 | 2847 | |
8482e118 AV |
2848 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
2849 | if (fcport->port_type == FCT_INITIATOR) | |
2850 | rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; | |
2851 | if (fcport->port_type == FCT_TARGET) | |
2852 | rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; | |
77d74143 | 2853 | fc_remote_port_rolechg(rport, rport_ids.roles); |
1da177e4 LT |
2854 | } |
2855 | ||
23be331d AB |
2856 | /* |
2857 | * qla2x00_update_fcport | |
2858 | * Updates device on list. | |
2859 | * | |
2860 | * Input: | |
2861 | * ha = adapter block pointer. | |
2862 | * fcport = port structure pointer. | |
2863 | * | |
2864 | * Return: | |
2865 | * 0 - Success | |
2866 | * BIT_0 - error | |
2867 | * | |
2868 | * Context: | |
2869 | * Kernel context. | |
2870 | */ | |
2871 | void | |
e315cd28 | 2872 | qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
23be331d | 2873 | { |
e315cd28 | 2874 | struct qla_hw_data *ha = vha->hw; |
2c3dfe3f | 2875 | |
e315cd28 | 2876 | fcport->vha = vha; |
23be331d | 2877 | fcport->login_retry = 0; |
e315cd28 | 2878 | fcport->port_login_retry_count = ha->port_down_retry_count * |
23be331d | 2879 | PORT_RETRY_TIME; |
e315cd28 | 2880 | atomic_set(&fcport->port_down_timer, ha->port_down_retry_count * |
23be331d | 2881 | PORT_RETRY_TIME); |
5ff1d584 | 2882 | fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); |
23be331d | 2883 | |
e315cd28 | 2884 | qla2x00_iidma_fcport(vha, fcport); |
23be331d AB |
2885 | |
2886 | atomic_set(&fcport->state, FCS_ONLINE); | |
2887 | ||
e315cd28 | 2888 | qla2x00_reg_remote_port(vha, fcport); |
23be331d AB |
2889 | } |
2890 | ||
1da177e4 LT |
2891 | /* |
2892 | * qla2x00_configure_fabric | |
2893 | * Setup SNS devices with loop ID's. | |
2894 | * | |
2895 | * Input: | |
2896 | * ha = adapter block pointer. | |
2897 | * | |
2898 | * Returns: | |
2899 | * 0 = success. | |
2900 | * BIT_0 = error | |
2901 | */ | |
2902 | static int | |
e315cd28 | 2903 | qla2x00_configure_fabric(scsi_qla_host_t *vha) |
1da177e4 LT |
2904 | { |
2905 | int rval, rval2; | |
2906 | fc_port_t *fcport, *fcptemp; | |
2907 | uint16_t next_loopid; | |
2908 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
0107109e | 2909 | uint16_t loop_id; |
1da177e4 | 2910 | LIST_HEAD(new_fcports); |
e315cd28 AC |
2911 | struct qla_hw_data *ha = vha->hw; |
2912 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
1da177e4 LT |
2913 | |
2914 | /* If FL port exists, then SNS is present */ | |
e428924c | 2915 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2916 | loop_id = NPH_F_PORT; |
2917 | else | |
2918 | loop_id = SNS_FL_PORT; | |
e315cd28 | 2919 | rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); |
1da177e4 LT |
2920 | if (rval != QLA_SUCCESS) { |
2921 | DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL " | |
e315cd28 | 2922 | "Port\n", vha->host_no)); |
1da177e4 | 2923 | |
e315cd28 | 2924 | vha->device_flags &= ~SWITCH_FOUND; |
1da177e4 LT |
2925 | return (QLA_SUCCESS); |
2926 | } | |
e315cd28 | 2927 | vha->device_flags |= SWITCH_FOUND; |
1da177e4 LT |
2928 | |
2929 | /* Mark devices that need re-synchronization. */ | |
e315cd28 | 2930 | rval2 = qla2x00_device_resync(vha); |
1da177e4 LT |
2931 | if (rval2 == QLA_RSCNS_HANDLED) { |
2932 | /* No point doing the scan, just continue. */ | |
2933 | return (QLA_SUCCESS); | |
2934 | } | |
2935 | do { | |
cca5335c AV |
2936 | /* FDMI support. */ |
2937 | if (ql2xfdmienable && | |
e315cd28 AC |
2938 | test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) |
2939 | qla2x00_fdmi_register(vha); | |
cca5335c | 2940 | |
1da177e4 | 2941 | /* Ensure we are logged into the SNS. */ |
e428924c | 2942 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2943 | loop_id = NPH_SNS; |
2944 | else | |
2945 | loop_id = SIMPLE_NAME_SERVER; | |
e315cd28 | 2946 | ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, |
abbd8870 | 2947 | 0xfc, mb, BIT_1 | BIT_0); |
1da177e4 LT |
2948 | if (mb[0] != MBS_COMMAND_COMPLETE) { |
2949 | DEBUG2(qla_printk(KERN_INFO, ha, | |
2950 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " | |
0107109e | 2951 | "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id, |
1da177e4 LT |
2952 | mb[0], mb[1], mb[2], mb[6], mb[7])); |
2953 | return (QLA_SUCCESS); | |
2954 | } | |
2955 | ||
e315cd28 AC |
2956 | if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { |
2957 | if (qla2x00_rft_id(vha)) { | |
1da177e4 LT |
2958 | /* EMPTY */ |
2959 | DEBUG2(printk("scsi(%ld): Register FC-4 " | |
e315cd28 | 2960 | "TYPE failed.\n", vha->host_no)); |
1da177e4 | 2961 | } |
e315cd28 | 2962 | if (qla2x00_rff_id(vha)) { |
1da177e4 LT |
2963 | /* EMPTY */ |
2964 | DEBUG2(printk("scsi(%ld): Register FC-4 " | |
e315cd28 | 2965 | "Features failed.\n", vha->host_no)); |
1da177e4 | 2966 | } |
e315cd28 | 2967 | if (qla2x00_rnn_id(vha)) { |
1da177e4 LT |
2968 | /* EMPTY */ |
2969 | DEBUG2(printk("scsi(%ld): Register Node Name " | |
e315cd28 AC |
2970 | "failed.\n", vha->host_no)); |
2971 | } else if (qla2x00_rsnn_nn(vha)) { | |
1da177e4 LT |
2972 | /* EMPTY */ |
2973 | DEBUG2(printk("scsi(%ld): Register Symbolic " | |
e315cd28 | 2974 | "Node Name failed.\n", vha->host_no)); |
1da177e4 LT |
2975 | } |
2976 | } | |
2977 | ||
e315cd28 | 2978 | rval = qla2x00_find_all_fabric_devs(vha, &new_fcports); |
1da177e4 LT |
2979 | if (rval != QLA_SUCCESS) |
2980 | break; | |
2981 | ||
2982 | /* | |
2983 | * Logout all previous fabric devices marked lost, except | |
f08b7251 | 2984 | * FCP2 devices. |
1da177e4 | 2985 | */ |
e315cd28 AC |
2986 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
2987 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
2988 | break; |
2989 | ||
2990 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) | |
2991 | continue; | |
2992 | ||
2993 | if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) { | |
e315cd28 | 2994 | qla2x00_mark_device_lost(vha, fcport, |
d97994dc | 2995 | ql2xplogiabsentdevice, 0); |
1da177e4 | 2996 | if (fcport->loop_id != FC_NO_LOOP_ID && |
f08b7251 | 2997 | (fcport->flags & FCF_FCP2_DEVICE) == 0 && |
1da177e4 LT |
2998 | fcport->port_type != FCT_INITIATOR && |
2999 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 3000 | ha->isp_ops->fabric_logout(vha, |
1c7c6357 AV |
3001 | fcport->loop_id, |
3002 | fcport->d_id.b.domain, | |
3003 | fcport->d_id.b.area, | |
3004 | fcport->d_id.b.al_pa); | |
1da177e4 LT |
3005 | fcport->loop_id = FC_NO_LOOP_ID; |
3006 | } | |
3007 | } | |
3008 | } | |
3009 | ||
3010 | /* Starting free loop ID. */ | |
e315cd28 | 3011 | next_loopid = ha->min_external_loopid; |
1da177e4 LT |
3012 | |
3013 | /* | |
3014 | * Scan through our port list and login entries that need to be | |
3015 | * logged in. | |
3016 | */ | |
e315cd28 AC |
3017 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
3018 | if (atomic_read(&vha->loop_down_timer) || | |
3019 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
3020 | break; |
3021 | ||
3022 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || | |
3023 | (fcport->flags & FCF_LOGIN_NEEDED) == 0) | |
3024 | continue; | |
3025 | ||
3026 | if (fcport->loop_id == FC_NO_LOOP_ID) { | |
3027 | fcport->loop_id = next_loopid; | |
d4486fd6 | 3028 | rval = qla2x00_find_new_loop_id( |
e315cd28 | 3029 | base_vha, fcport); |
1da177e4 LT |
3030 | if (rval != QLA_SUCCESS) { |
3031 | /* Ran out of IDs to use */ | |
3032 | break; | |
3033 | } | |
3034 | } | |
1da177e4 | 3035 | /* Login and update database */ |
e315cd28 | 3036 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
1da177e4 LT |
3037 | } |
3038 | ||
3039 | /* Exit if out of loop IDs. */ | |
3040 | if (rval != QLA_SUCCESS) { | |
3041 | break; | |
3042 | } | |
3043 | ||
3044 | /* | |
3045 | * Login and add the new devices to our port list. | |
3046 | */ | |
3047 | list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { | |
e315cd28 AC |
3048 | if (atomic_read(&vha->loop_down_timer) || |
3049 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
3050 | break; |
3051 | ||
3052 | /* Find a new loop ID to use. */ | |
3053 | fcport->loop_id = next_loopid; | |
e315cd28 | 3054 | rval = qla2x00_find_new_loop_id(base_vha, fcport); |
1da177e4 LT |
3055 | if (rval != QLA_SUCCESS) { |
3056 | /* Ran out of IDs to use */ | |
3057 | break; | |
3058 | } | |
3059 | ||
bdf79621 | 3060 | /* Login and update database */ |
e315cd28 AC |
3061 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
3062 | ||
3063 | if (vha->vp_idx) { | |
3064 | fcport->vha = vha; | |
3065 | fcport->vp_idx = vha->vp_idx; | |
3066 | } | |
3067 | list_move_tail(&fcport->list, &vha->vp_fcports); | |
1da177e4 LT |
3068 | } |
3069 | } while (0); | |
3070 | ||
3071 | /* Free all new device structures not processed. */ | |
3072 | list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { | |
3073 | list_del(&fcport->list); | |
3074 | kfree(fcport); | |
3075 | } | |
3076 | ||
3077 | if (rval) { | |
3078 | DEBUG2(printk("scsi(%ld): Configure fabric error exit: " | |
e315cd28 | 3079 | "rval=%d\n", vha->host_no, rval)); |
1da177e4 LT |
3080 | } |
3081 | ||
3082 | return (rval); | |
3083 | } | |
3084 | ||
1da177e4 LT |
3085 | /* |
3086 | * qla2x00_find_all_fabric_devs | |
3087 | * | |
3088 | * Input: | |
3089 | * ha = adapter block pointer. | |
3090 | * dev = database device entry pointer. | |
3091 | * | |
3092 | * Returns: | |
3093 | * 0 = success. | |
3094 | * | |
3095 | * Context: | |
3096 | * Kernel context. | |
3097 | */ | |
3098 | static int | |
e315cd28 AC |
3099 | qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha, |
3100 | struct list_head *new_fcports) | |
1da177e4 LT |
3101 | { |
3102 | int rval; | |
3103 | uint16_t loop_id; | |
3104 | fc_port_t *fcport, *new_fcport, *fcptemp; | |
3105 | int found; | |
3106 | ||
3107 | sw_info_t *swl; | |
3108 | int swl_idx; | |
3109 | int first_dev, last_dev; | |
1516ef44 | 3110 | port_id_t wrap = {}, nxt_d_id; |
e315cd28 AC |
3111 | struct qla_hw_data *ha = vha->hw; |
3112 | struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev); | |
ee546b6e | 3113 | struct scsi_qla_host *tvp; |
1da177e4 LT |
3114 | |
3115 | rval = QLA_SUCCESS; | |
3116 | ||
3117 | /* Try GID_PT to get device list, else GAN. */ | |
4b89258c | 3118 | swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL); |
bbfbbbc1 | 3119 | if (!swl) { |
1da177e4 LT |
3120 | /*EMPTY*/ |
3121 | DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback " | |
e315cd28 | 3122 | "on GA_NXT\n", vha->host_no)); |
1da177e4 | 3123 | } else { |
e315cd28 | 3124 | if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
3125 | kfree(swl); |
3126 | swl = NULL; | |
e315cd28 | 3127 | } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
3128 | kfree(swl); |
3129 | swl = NULL; | |
e315cd28 | 3130 | } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
3131 | kfree(swl); |
3132 | swl = NULL; | |
e5896bd5 | 3133 | } else if (ql2xiidmaenable && |
e315cd28 AC |
3134 | qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) { |
3135 | qla2x00_gpsc(vha, swl); | |
1da177e4 | 3136 | } |
e8c72ba5 CD |
3137 | |
3138 | /* If other queries succeeded probe for FC-4 type */ | |
3139 | if (swl) | |
3140 | qla2x00_gff_id(vha, swl); | |
1da177e4 LT |
3141 | } |
3142 | swl_idx = 0; | |
3143 | ||
3144 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 3145 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 3146 | if (new_fcport == NULL) { |
c9475cb0 | 3147 | kfree(swl); |
1da177e4 LT |
3148 | return (QLA_MEMORY_ALLOC_FAILED); |
3149 | } | |
3150 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
3151 | /* Set start port ID scan at adapter ID. */ |
3152 | first_dev = 1; | |
3153 | last_dev = 0; | |
3154 | ||
3155 | /* Starting free loop ID. */ | |
e315cd28 AC |
3156 | loop_id = ha->min_external_loopid; |
3157 | for (; loop_id <= ha->max_loop_id; loop_id++) { | |
3158 | if (qla2x00_is_reserved_id(vha, loop_id)) | |
1da177e4 LT |
3159 | continue; |
3160 | ||
3a6478df GM |
3161 | if (ha->current_topology == ISP_CFG_FL && |
3162 | (atomic_read(&vha->loop_down_timer) || | |
3163 | LOOP_TRANSITION(vha))) { | |
bb2d52b2 AV |
3164 | atomic_set(&vha->loop_down_timer, 0); |
3165 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
3166 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
1da177e4 | 3167 | break; |
bb2d52b2 | 3168 | } |
1da177e4 LT |
3169 | |
3170 | if (swl != NULL) { | |
3171 | if (last_dev) { | |
3172 | wrap.b24 = new_fcport->d_id.b24; | |
3173 | } else { | |
3174 | new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; | |
3175 | memcpy(new_fcport->node_name, | |
3176 | swl[swl_idx].node_name, WWN_SIZE); | |
3177 | memcpy(new_fcport->port_name, | |
3178 | swl[swl_idx].port_name, WWN_SIZE); | |
d8b45213 AV |
3179 | memcpy(new_fcport->fabric_port_name, |
3180 | swl[swl_idx].fabric_port_name, WWN_SIZE); | |
3181 | new_fcport->fp_speed = swl[swl_idx].fp_speed; | |
e8c72ba5 | 3182 | new_fcport->fc4_type = swl[swl_idx].fc4_type; |
1da177e4 LT |
3183 | |
3184 | if (swl[swl_idx].d_id.b.rsvd_1 != 0) { | |
3185 | last_dev = 1; | |
3186 | } | |
3187 | swl_idx++; | |
3188 | } | |
3189 | } else { | |
3190 | /* Send GA_NXT to the switch */ | |
e315cd28 | 3191 | rval = qla2x00_ga_nxt(vha, new_fcport); |
1da177e4 LT |
3192 | if (rval != QLA_SUCCESS) { |
3193 | qla_printk(KERN_WARNING, ha, | |
3194 | "SNS scan failed -- assuming zero-entry " | |
3195 | "result...\n"); | |
3196 | list_for_each_entry_safe(fcport, fcptemp, | |
3197 | new_fcports, list) { | |
3198 | list_del(&fcport->list); | |
3199 | kfree(fcport); | |
3200 | } | |
3201 | rval = QLA_SUCCESS; | |
3202 | break; | |
3203 | } | |
3204 | } | |
3205 | ||
3206 | /* If wrap on switch device list, exit. */ | |
3207 | if (first_dev) { | |
3208 | wrap.b24 = new_fcport->d_id.b24; | |
3209 | first_dev = 0; | |
3210 | } else if (new_fcport->d_id.b24 == wrap.b24) { | |
3211 | DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n", | |
e315cd28 | 3212 | vha->host_no, new_fcport->d_id.b.domain, |
1da177e4 LT |
3213 | new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa)); |
3214 | break; | |
3215 | } | |
3216 | ||
2c3dfe3f | 3217 | /* Bypass if same physical adapter. */ |
e315cd28 | 3218 | if (new_fcport->d_id.b24 == base_vha->d_id.b24) |
1da177e4 LT |
3219 | continue; |
3220 | ||
2c3dfe3f | 3221 | /* Bypass virtual ports of the same host. */ |
e315cd28 AC |
3222 | found = 0; |
3223 | if (ha->num_vhosts) { | |
ee546b6e | 3224 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
3225 | if (new_fcport->d_id.b24 == vp->d_id.b24) { |
3226 | found = 1; | |
2c3dfe3f | 3227 | break; |
e315cd28 | 3228 | } |
2c3dfe3f | 3229 | } |
e315cd28 | 3230 | if (found) |
2c3dfe3f SJ |
3231 | continue; |
3232 | } | |
3233 | ||
f7d289f6 AV |
3234 | /* Bypass if same domain and area of adapter. */ |
3235 | if (((new_fcport->d_id.b24 & 0xffff00) == | |
e315cd28 | 3236 | (vha->d_id.b24 & 0xffff00)) && ha->current_topology == |
f7d289f6 AV |
3237 | ISP_CFG_FL) |
3238 | continue; | |
3239 | ||
1da177e4 LT |
3240 | /* Bypass reserved domain fields. */ |
3241 | if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) | |
3242 | continue; | |
3243 | ||
e8c72ba5 CD |
3244 | /* Bypass ports whose FCP-4 type is not FCP_SCSI */ |
3245 | if (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && | |
3246 | new_fcport->fc4_type != FC4_TYPE_UNKNOWN) | |
3247 | continue; | |
3248 | ||
1da177e4 LT |
3249 | /* Locate matching device in database. */ |
3250 | found = 0; | |
e315cd28 | 3251 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
3252 | if (memcmp(new_fcport->port_name, fcport->port_name, |
3253 | WWN_SIZE)) | |
3254 | continue; | |
3255 | ||
3256 | found++; | |
3257 | ||
d8b45213 AV |
3258 | /* Update port state. */ |
3259 | memcpy(fcport->fabric_port_name, | |
3260 | new_fcport->fabric_port_name, WWN_SIZE); | |
3261 | fcport->fp_speed = new_fcport->fp_speed; | |
3262 | ||
1da177e4 LT |
3263 | /* |
3264 | * If address the same and state FCS_ONLINE, nothing | |
3265 | * changed. | |
3266 | */ | |
3267 | if (fcport->d_id.b24 == new_fcport->d_id.b24 && | |
3268 | atomic_read(&fcport->state) == FCS_ONLINE) { | |
3269 | break; | |
3270 | } | |
3271 | ||
3272 | /* | |
3273 | * If device was not a fabric device before. | |
3274 | */ | |
3275 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
3276 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
3277 | fcport->loop_id = FC_NO_LOOP_ID; | |
3278 | fcport->flags |= (FCF_FABRIC_DEVICE | | |
3279 | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
3280 | break; |
3281 | } | |
3282 | ||
3283 | /* | |
3284 | * Port ID changed or device was marked to be updated; | |
3285 | * Log it out if still logged in and mark it for | |
3286 | * relogin later. | |
3287 | */ | |
3288 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
3289 | fcport->flags |= FCF_LOGIN_NEEDED; | |
3290 | if (fcport->loop_id != FC_NO_LOOP_ID && | |
f08b7251 | 3291 | (fcport->flags & FCF_FCP2_DEVICE) == 0 && |
1da177e4 LT |
3292 | fcport->port_type != FCT_INITIATOR && |
3293 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 3294 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3295 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3296 | fcport->d_id.b.al_pa); | |
1da177e4 LT |
3297 | fcport->loop_id = FC_NO_LOOP_ID; |
3298 | } | |
3299 | ||
3300 | break; | |
3301 | } | |
3302 | ||
3303 | if (found) | |
3304 | continue; | |
1da177e4 LT |
3305 | /* If device was not in our fcports list, then add it. */ |
3306 | list_add_tail(&new_fcport->list, new_fcports); | |
3307 | ||
3308 | /* Allocate a new replacement fcport. */ | |
3309 | nxt_d_id.b24 = new_fcport->d_id.b24; | |
e315cd28 | 3310 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 3311 | if (new_fcport == NULL) { |
c9475cb0 | 3312 | kfree(swl); |
1da177e4 LT |
3313 | return (QLA_MEMORY_ALLOC_FAILED); |
3314 | } | |
3315 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
3316 | new_fcport->d_id.b24 = nxt_d_id.b24; | |
3317 | } | |
3318 | ||
c9475cb0 JJ |
3319 | kfree(swl); |
3320 | kfree(new_fcport); | |
1da177e4 | 3321 | |
1da177e4 LT |
3322 | return (rval); |
3323 | } | |
3324 | ||
3325 | /* | |
3326 | * qla2x00_find_new_loop_id | |
3327 | * Scan through our port list and find a new usable loop ID. | |
3328 | * | |
3329 | * Input: | |
3330 | * ha: adapter state pointer. | |
3331 | * dev: port structure pointer. | |
3332 | * | |
3333 | * Returns: | |
3334 | * qla2x00 local function return status code. | |
3335 | * | |
3336 | * Context: | |
3337 | * Kernel context. | |
3338 | */ | |
413975a0 | 3339 | static int |
e315cd28 | 3340 | qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) |
1da177e4 LT |
3341 | { |
3342 | int rval; | |
3343 | int found; | |
3344 | fc_port_t *fcport; | |
3345 | uint16_t first_loop_id; | |
e315cd28 AC |
3346 | struct qla_hw_data *ha = vha->hw; |
3347 | struct scsi_qla_host *vp; | |
ee546b6e | 3348 | struct scsi_qla_host *tvp; |
1da177e4 LT |
3349 | |
3350 | rval = QLA_SUCCESS; | |
3351 | ||
3352 | /* Save starting loop ID. */ | |
3353 | first_loop_id = dev->loop_id; | |
3354 | ||
3355 | for (;;) { | |
3356 | /* Skip loop ID if already used by adapter. */ | |
e315cd28 | 3357 | if (dev->loop_id == vha->loop_id) |
1da177e4 | 3358 | dev->loop_id++; |
1da177e4 LT |
3359 | |
3360 | /* Skip reserved loop IDs. */ | |
e315cd28 | 3361 | while (qla2x00_is_reserved_id(vha, dev->loop_id)) |
1da177e4 | 3362 | dev->loop_id++; |
1da177e4 LT |
3363 | |
3364 | /* Reset loop ID if passed the end. */ | |
e315cd28 | 3365 | if (dev->loop_id > ha->max_loop_id) { |
1da177e4 LT |
3366 | /* first loop ID. */ |
3367 | dev->loop_id = ha->min_external_loopid; | |
3368 | } | |
3369 | ||
3370 | /* Check for loop ID being already in use. */ | |
3371 | found = 0; | |
3372 | fcport = NULL; | |
ee546b6e | 3373 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
3374 | list_for_each_entry(fcport, &vp->vp_fcports, list) { |
3375 | if (fcport->loop_id == dev->loop_id && | |
3376 | fcport != dev) { | |
3377 | /* ID possibly in use */ | |
3378 | found++; | |
3379 | break; | |
3380 | } | |
1da177e4 | 3381 | } |
e315cd28 AC |
3382 | if (found) |
3383 | break; | |
1da177e4 LT |
3384 | } |
3385 | ||
3386 | /* If not in use then it is free to use. */ | |
3387 | if (!found) { | |
3388 | break; | |
3389 | } | |
3390 | ||
3391 | /* ID in use. Try next value. */ | |
3392 | dev->loop_id++; | |
3393 | ||
3394 | /* If wrap around. No free ID to use. */ | |
3395 | if (dev->loop_id == first_loop_id) { | |
3396 | dev->loop_id = FC_NO_LOOP_ID; | |
3397 | rval = QLA_FUNCTION_FAILED; | |
3398 | break; | |
3399 | } | |
3400 | } | |
3401 | ||
3402 | return (rval); | |
3403 | } | |
3404 | ||
3405 | /* | |
3406 | * qla2x00_device_resync | |
3407 | * Marks devices in the database that needs resynchronization. | |
3408 | * | |
3409 | * Input: | |
3410 | * ha = adapter block pointer. | |
3411 | * | |
3412 | * Context: | |
3413 | * Kernel context. | |
3414 | */ | |
3415 | static int | |
e315cd28 | 3416 | qla2x00_device_resync(scsi_qla_host_t *vha) |
1da177e4 LT |
3417 | { |
3418 | int rval; | |
1da177e4 LT |
3419 | uint32_t mask; |
3420 | fc_port_t *fcport; | |
3421 | uint32_t rscn_entry; | |
3422 | uint8_t rscn_out_iter; | |
3423 | uint8_t format; | |
1516ef44 | 3424 | port_id_t d_id = {}; |
1da177e4 LT |
3425 | |
3426 | rval = QLA_RSCNS_HANDLED; | |
3427 | ||
e315cd28 AC |
3428 | while (vha->rscn_out_ptr != vha->rscn_in_ptr || |
3429 | vha->flags.rscn_queue_overflow) { | |
1da177e4 | 3430 | |
e315cd28 | 3431 | rscn_entry = vha->rscn_queue[vha->rscn_out_ptr]; |
1da177e4 LT |
3432 | format = MSB(MSW(rscn_entry)); |
3433 | d_id.b.domain = LSB(MSW(rscn_entry)); | |
3434 | d_id.b.area = MSB(LSW(rscn_entry)); | |
3435 | d_id.b.al_pa = LSB(LSW(rscn_entry)); | |
3436 | ||
3437 | DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = " | |
3438 | "[%02x/%02x%02x%02x].\n", | |
e315cd28 | 3439 | vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain, |
1da177e4 LT |
3440 | d_id.b.area, d_id.b.al_pa)); |
3441 | ||
e315cd28 AC |
3442 | vha->rscn_out_ptr++; |
3443 | if (vha->rscn_out_ptr == MAX_RSCN_COUNT) | |
3444 | vha->rscn_out_ptr = 0; | |
1da177e4 LT |
3445 | |
3446 | /* Skip duplicate entries. */ | |
e315cd28 AC |
3447 | for (rscn_out_iter = vha->rscn_out_ptr; |
3448 | !vha->flags.rscn_queue_overflow && | |
3449 | rscn_out_iter != vha->rscn_in_ptr; | |
1da177e4 LT |
3450 | rscn_out_iter = (rscn_out_iter == |
3451 | (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) { | |
3452 | ||
e315cd28 | 3453 | if (rscn_entry != vha->rscn_queue[rscn_out_iter]) |
1da177e4 LT |
3454 | break; |
3455 | ||
3456 | DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue " | |
e315cd28 | 3457 | "entry found at [%d].\n", vha->host_no, |
1da177e4 LT |
3458 | rscn_out_iter)); |
3459 | ||
e315cd28 | 3460 | vha->rscn_out_ptr = rscn_out_iter; |
1da177e4 LT |
3461 | } |
3462 | ||
3463 | /* Queue overflow, set switch default case. */ | |
e315cd28 | 3464 | if (vha->flags.rscn_queue_overflow) { |
1da177e4 | 3465 | DEBUG(printk("scsi(%ld): device_resync: rscn " |
e315cd28 | 3466 | "overflow.\n", vha->host_no)); |
1da177e4 LT |
3467 | |
3468 | format = 3; | |
e315cd28 | 3469 | vha->flags.rscn_queue_overflow = 0; |
1da177e4 LT |
3470 | } |
3471 | ||
3472 | switch (format) { | |
3473 | case 0: | |
1da177e4 LT |
3474 | mask = 0xffffff; |
3475 | break; | |
3476 | case 1: | |
3477 | mask = 0xffff00; | |
3478 | break; | |
3479 | case 2: | |
3480 | mask = 0xff0000; | |
3481 | break; | |
3482 | default: | |
3483 | mask = 0x0; | |
3484 | d_id.b24 = 0; | |
e315cd28 | 3485 | vha->rscn_out_ptr = vha->rscn_in_ptr; |
1da177e4 LT |
3486 | break; |
3487 | } | |
3488 | ||
3489 | rval = QLA_SUCCESS; | |
3490 | ||
e315cd28 | 3491 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
3492 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || |
3493 | (fcport->d_id.b24 & mask) != d_id.b24 || | |
3494 | fcport->port_type == FCT_BROADCAST) | |
3495 | continue; | |
3496 | ||
3497 | if (atomic_read(&fcport->state) == FCS_ONLINE) { | |
3498 | if (format != 3 || | |
3499 | fcport->port_type != FCT_INITIATOR) { | |
e315cd28 | 3500 | qla2x00_mark_device_lost(vha, fcport, |
d97994dc | 3501 | 0, 0); |
1da177e4 LT |
3502 | } |
3503 | } | |
1da177e4 LT |
3504 | } |
3505 | } | |
3506 | return (rval); | |
3507 | } | |
3508 | ||
3509 | /* | |
3510 | * qla2x00_fabric_dev_login | |
3511 | * Login fabric target device and update FC port database. | |
3512 | * | |
3513 | * Input: | |
3514 | * ha: adapter state pointer. | |
3515 | * fcport: port structure list pointer. | |
3516 | * next_loopid: contains value of a new loop ID that can be used | |
3517 | * by the next login attempt. | |
3518 | * | |
3519 | * Returns: | |
3520 | * qla2x00 local function return status code. | |
3521 | * | |
3522 | * Context: | |
3523 | * Kernel context. | |
3524 | */ | |
3525 | static int | |
e315cd28 | 3526 | qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
3527 | uint16_t *next_loopid) |
3528 | { | |
3529 | int rval; | |
3530 | int retry; | |
0107109e | 3531 | uint8_t opts; |
e315cd28 | 3532 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3533 | |
3534 | rval = QLA_SUCCESS; | |
3535 | retry = 0; | |
3536 | ||
ac280b67 | 3537 | if (IS_ALOGIO_CAPABLE(ha)) { |
5ff1d584 AV |
3538 | if (fcport->flags & FCF_ASYNC_SENT) |
3539 | return rval; | |
3540 | fcport->flags |= FCF_ASYNC_SENT; | |
ac280b67 AV |
3541 | rval = qla2x00_post_async_login_work(vha, fcport, NULL); |
3542 | if (!rval) | |
3543 | return rval; | |
3544 | } | |
3545 | ||
5ff1d584 | 3546 | fcport->flags &= ~FCF_ASYNC_SENT; |
e315cd28 | 3547 | rval = qla2x00_fabric_login(vha, fcport, next_loopid); |
1da177e4 | 3548 | if (rval == QLA_SUCCESS) { |
f08b7251 | 3549 | /* Send an ADISC to FCP2 devices.*/ |
0107109e | 3550 | opts = 0; |
f08b7251 | 3551 | if (fcport->flags & FCF_FCP2_DEVICE) |
0107109e | 3552 | opts |= BIT_1; |
e315cd28 | 3553 | rval = qla2x00_get_port_database(vha, fcport, opts); |
1da177e4 | 3554 | if (rval != QLA_SUCCESS) { |
e315cd28 | 3555 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3556 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3557 | fcport->d_id.b.al_pa); | |
e315cd28 | 3558 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 | 3559 | } else { |
e315cd28 | 3560 | qla2x00_update_fcport(vha, fcport); |
1da177e4 LT |
3561 | } |
3562 | } | |
3563 | ||
3564 | return (rval); | |
3565 | } | |
3566 | ||
3567 | /* | |
3568 | * qla2x00_fabric_login | |
3569 | * Issue fabric login command. | |
3570 | * | |
3571 | * Input: | |
3572 | * ha = adapter block pointer. | |
3573 | * device = pointer to FC device type structure. | |
3574 | * | |
3575 | * Returns: | |
3576 | * 0 - Login successfully | |
3577 | * 1 - Login failed | |
3578 | * 2 - Initiator device | |
3579 | * 3 - Fatal error | |
3580 | */ | |
3581 | int | |
e315cd28 | 3582 | qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
3583 | uint16_t *next_loopid) |
3584 | { | |
3585 | int rval; | |
3586 | int retry; | |
3587 | uint16_t tmp_loopid; | |
3588 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
e315cd28 | 3589 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3590 | |
3591 | retry = 0; | |
3592 | tmp_loopid = 0; | |
3593 | ||
3594 | for (;;) { | |
3595 | DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x " | |
3596 | "for port %02x%02x%02x.\n", | |
e315cd28 | 3597 | vha->host_no, fcport->loop_id, fcport->d_id.b.domain, |
1da177e4 LT |
3598 | fcport->d_id.b.area, fcport->d_id.b.al_pa)); |
3599 | ||
3600 | /* Login fcport on switch. */ | |
e315cd28 | 3601 | ha->isp_ops->fabric_login(vha, fcport->loop_id, |
1da177e4 LT |
3602 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3603 | fcport->d_id.b.al_pa, mb, BIT_0); | |
3604 | if (mb[0] == MBS_PORT_ID_USED) { | |
3605 | /* | |
3606 | * Device has another loop ID. The firmware team | |
0107109e AV |
3607 | * recommends the driver perform an implicit login with |
3608 | * the specified ID again. The ID we just used is save | |
3609 | * here so we return with an ID that can be tried by | |
3610 | * the next login. | |
1da177e4 LT |
3611 | */ |
3612 | retry++; | |
3613 | tmp_loopid = fcport->loop_id; | |
3614 | fcport->loop_id = mb[1]; | |
3615 | ||
3616 | DEBUG(printk("Fabric Login: port in use - next " | |
3617 | "loop id=0x%04x, port Id=%02x%02x%02x.\n", | |
3618 | fcport->loop_id, fcport->d_id.b.domain, | |
3619 | fcport->d_id.b.area, fcport->d_id.b.al_pa)); | |
3620 | ||
3621 | } else if (mb[0] == MBS_COMMAND_COMPLETE) { | |
3622 | /* | |
3623 | * Login succeeded. | |
3624 | */ | |
3625 | if (retry) { | |
3626 | /* A retry occurred before. */ | |
3627 | *next_loopid = tmp_loopid; | |
3628 | } else { | |
3629 | /* | |
3630 | * No retry occurred before. Just increment the | |
3631 | * ID value for next login. | |
3632 | */ | |
3633 | *next_loopid = (fcport->loop_id + 1); | |
3634 | } | |
3635 | ||
3636 | if (mb[1] & BIT_0) { | |
3637 | fcport->port_type = FCT_INITIATOR; | |
3638 | } else { | |
3639 | fcport->port_type = FCT_TARGET; | |
3640 | if (mb[1] & BIT_1) { | |
8474f3a0 | 3641 | fcport->flags |= FCF_FCP2_DEVICE; |
1da177e4 LT |
3642 | } |
3643 | } | |
3644 | ||
ad3e0eda AV |
3645 | if (mb[10] & BIT_0) |
3646 | fcport->supported_classes |= FC_COS_CLASS2; | |
3647 | if (mb[10] & BIT_1) | |
3648 | fcport->supported_classes |= FC_COS_CLASS3; | |
3649 | ||
1da177e4 LT |
3650 | rval = QLA_SUCCESS; |
3651 | break; | |
3652 | } else if (mb[0] == MBS_LOOP_ID_USED) { | |
3653 | /* | |
3654 | * Loop ID already used, try next loop ID. | |
3655 | */ | |
3656 | fcport->loop_id++; | |
e315cd28 | 3657 | rval = qla2x00_find_new_loop_id(vha, fcport); |
1da177e4 LT |
3658 | if (rval != QLA_SUCCESS) { |
3659 | /* Ran out of loop IDs to use */ | |
3660 | break; | |
3661 | } | |
3662 | } else if (mb[0] == MBS_COMMAND_ERROR) { | |
3663 | /* | |
3664 | * Firmware possibly timed out during login. If NO | |
3665 | * retries are left to do then the device is declared | |
3666 | * dead. | |
3667 | */ | |
3668 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3669 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3670 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3671 | fcport->d_id.b.al_pa); | |
e315cd28 | 3672 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 LT |
3673 | |
3674 | rval = 1; | |
3675 | break; | |
3676 | } else { | |
3677 | /* | |
3678 | * unrecoverable / not handled error | |
3679 | */ | |
3680 | DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x " | |
fa2a1ce5 | 3681 | "loop_id=%x jiffies=%lx.\n", |
e315cd28 | 3682 | __func__, vha->host_no, mb[0], |
1da177e4 LT |
3683 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3684 | fcport->d_id.b.al_pa, fcport->loop_id, jiffies)); | |
3685 | ||
3686 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3687 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3688 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3689 | fcport->d_id.b.al_pa); | |
1da177e4 | 3690 | fcport->loop_id = FC_NO_LOOP_ID; |
0eedfcf0 | 3691 | fcport->login_retry = 0; |
1da177e4 LT |
3692 | |
3693 | rval = 3; | |
3694 | break; | |
3695 | } | |
3696 | } | |
3697 | ||
3698 | return (rval); | |
3699 | } | |
3700 | ||
3701 | /* | |
3702 | * qla2x00_local_device_login | |
3703 | * Issue local device login command. | |
3704 | * | |
3705 | * Input: | |
3706 | * ha = adapter block pointer. | |
3707 | * loop_id = loop id of device to login to. | |
3708 | * | |
3709 | * Returns (Where's the #define!!!!): | |
3710 | * 0 - Login successfully | |
3711 | * 1 - Login failed | |
3712 | * 3 - Fatal error | |
3713 | */ | |
3714 | int | |
e315cd28 | 3715 | qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) |
1da177e4 LT |
3716 | { |
3717 | int rval; | |
3718 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
3719 | ||
3720 | memset(mb, 0, sizeof(mb)); | |
e315cd28 | 3721 | rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); |
1da177e4 LT |
3722 | if (rval == QLA_SUCCESS) { |
3723 | /* Interrogate mailbox registers for any errors */ | |
3724 | if (mb[0] == MBS_COMMAND_ERROR) | |
3725 | rval = 1; | |
3726 | else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) | |
3727 | /* device not in PCB table */ | |
3728 | rval = 3; | |
3729 | } | |
3730 | ||
3731 | return (rval); | |
3732 | } | |
3733 | ||
3734 | /* | |
3735 | * qla2x00_loop_resync | |
3736 | * Resync with fibre channel devices. | |
3737 | * | |
3738 | * Input: | |
3739 | * ha = adapter block pointer. | |
3740 | * | |
3741 | * Returns: | |
3742 | * 0 = success | |
3743 | */ | |
3744 | int | |
e315cd28 | 3745 | qla2x00_loop_resync(scsi_qla_host_t *vha) |
1da177e4 | 3746 | { |
73208dfd | 3747 | int rval = QLA_SUCCESS; |
1da177e4 | 3748 | uint32_t wait_time; |
67c2e93a AC |
3749 | struct req_que *req; |
3750 | struct rsp_que *rsp; | |
3751 | ||
7163ea81 | 3752 | if (vha->hw->flags.cpu_affinity_enabled) |
67c2e93a AC |
3753 | req = vha->hw->req_q_map[0]; |
3754 | else | |
3755 | req = vha->req; | |
3756 | rsp = req->rsp; | |
1da177e4 | 3757 | |
e315cd28 AC |
3758 | atomic_set(&vha->loop_state, LOOP_UPDATE); |
3759 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
3760 | if (vha->flags.online) { | |
3761 | if (!(rval = qla2x00_fw_ready(vha))) { | |
1da177e4 LT |
3762 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
3763 | wait_time = 256; | |
3764 | do { | |
e315cd28 | 3765 | atomic_set(&vha->loop_state, LOOP_UPDATE); |
1da177e4 | 3766 | |
0107109e | 3767 | /* Issue a marker after FW becomes ready. */ |
73208dfd AC |
3768 | qla2x00_marker(vha, req, rsp, 0, 0, |
3769 | MK_SYNC_ALL); | |
e315cd28 | 3770 | vha->marker_needed = 0; |
1da177e4 LT |
3771 | |
3772 | /* Remap devices on Loop. */ | |
e315cd28 | 3773 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1da177e4 | 3774 | |
e315cd28 | 3775 | qla2x00_configure_loop(vha); |
1da177e4 | 3776 | wait_time--; |
e315cd28 AC |
3777 | } while (!atomic_read(&vha->loop_down_timer) && |
3778 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
3779 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
3780 | &vha->dpc_flags))); | |
1da177e4 | 3781 | } |
1da177e4 LT |
3782 | } |
3783 | ||
e315cd28 | 3784 | if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) |
1da177e4 | 3785 | return (QLA_FUNCTION_FAILED); |
1da177e4 | 3786 | |
e315cd28 | 3787 | if (rval) |
1da177e4 | 3788 | DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__)); |
1da177e4 LT |
3789 | |
3790 | return (rval); | |
3791 | } | |
3792 | ||
d97994dc | 3793 | void |
67becc00 | 3794 | qla2x00_update_fcports(scsi_qla_host_t *base_vha) |
d97994dc AV |
3795 | { |
3796 | fc_port_t *fcport; | |
67becc00 | 3797 | struct scsi_qla_host *tvp, *vha; |
d97994dc AV |
3798 | |
3799 | /* Go with deferred removal of rport references. */ | |
67becc00 AV |
3800 | list_for_each_entry_safe(vha, tvp, &base_vha->hw->vp_list, list) |
3801 | list_for_each_entry(fcport, &vha->vp_fcports, list) | |
3802 | if (fcport && fcport->drport && | |
3803 | atomic_read(&fcport->state) != FCS_UNCONFIGURED) | |
3804 | qla2x00_rport_del(fcport); | |
d97994dc AV |
3805 | } |
3806 | ||
a9083016 GM |
3807 | void |
3808 | qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) | |
3809 | { | |
3810 | struct qla_hw_data *ha = vha->hw; | |
3811 | struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev); | |
3812 | struct scsi_qla_host *tvp; | |
3813 | ||
3814 | vha->flags.online = 0; | |
3815 | ha->flags.chip_reset_done = 0; | |
3816 | clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
3817 | ha->qla_stats.total_isp_aborts++; | |
3818 | ||
3819 | qla_printk(KERN_INFO, ha, | |
3820 | "Performing ISP error recovery - ha= %p.\n", ha); | |
3821 | ||
3822 | /* Chip reset does not apply to 82XX */ | |
3823 | if (!IS_QLA82XX(ha)) | |
3824 | ha->isp_ops->reset_chip(vha); | |
3825 | ||
3826 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
3827 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { | |
3828 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
3829 | qla2x00_mark_all_devices_lost(vha, 0); | |
3830 | list_for_each_entry_safe(vp, tvp, &base_vha->hw->vp_list, list) | |
3831 | qla2x00_mark_all_devices_lost(vp, 0); | |
3832 | } else { | |
3833 | if (!atomic_read(&vha->loop_down_timer)) | |
3834 | atomic_set(&vha->loop_down_timer, | |
3835 | LOOP_DOWN_TIME); | |
3836 | } | |
3837 | ||
bddd2d65 LC |
3838 | if (!ha->flags.eeh_busy) { |
3839 | /* Make sure for ISP 82XX IO DMA is complete */ | |
3840 | if (IS_QLA82XX(ha)) { | |
3841 | if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, | |
3842 | WAIT_HOST) == QLA_SUCCESS) { | |
3843 | DEBUG2(qla_printk(KERN_INFO, ha, | |
3844 | "Done wait for pending commands\n")); | |
3845 | } | |
4d78c973 | 3846 | } |
a9083016 | 3847 | |
bddd2d65 LC |
3848 | /* Requeue all commands in outstanding command list. */ |
3849 | qla2x00_abort_all_cmds(vha, DID_RESET << 16); | |
3850 | } | |
a9083016 GM |
3851 | } |
3852 | ||
1da177e4 LT |
3853 | /* |
3854 | * qla2x00_abort_isp | |
3855 | * Resets ISP and aborts all outstanding commands. | |
3856 | * | |
3857 | * Input: | |
3858 | * ha = adapter block pointer. | |
3859 | * | |
3860 | * Returns: | |
3861 | * 0 = success | |
3862 | */ | |
3863 | int | |
e315cd28 | 3864 | qla2x00_abort_isp(scsi_qla_host_t *vha) |
1da177e4 | 3865 | { |
476e8978 | 3866 | int rval; |
1da177e4 | 3867 | uint8_t status = 0; |
e315cd28 AC |
3868 | struct qla_hw_data *ha = vha->hw; |
3869 | struct scsi_qla_host *vp; | |
ee546b6e | 3870 | struct scsi_qla_host *tvp; |
73208dfd | 3871 | struct req_que *req = ha->req_q_map[0]; |
1da177e4 | 3872 | |
e315cd28 | 3873 | if (vha->flags.online) { |
a9083016 | 3874 | qla2x00_abort_isp_cleanup(vha); |
1da177e4 | 3875 | |
85880801 AV |
3876 | if (unlikely(pci_channel_offline(ha->pdev) && |
3877 | ha->flags.pci_channel_io_perm_failure)) { | |
3878 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
3879 | status = 0; | |
3880 | return status; | |
3881 | } | |
3882 | ||
73208dfd | 3883 | ha->isp_ops->get_flash_version(vha, req->ring); |
30c47662 | 3884 | |
e315cd28 | 3885 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 3886 | |
e315cd28 AC |
3887 | if (!qla2x00_restart_isp(vha)) { |
3888 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
1da177e4 | 3889 | |
e315cd28 | 3890 | if (!atomic_read(&vha->loop_down_timer)) { |
1da177e4 LT |
3891 | /* |
3892 | * Issue marker command only when we are going | |
3893 | * to start the I/O . | |
3894 | */ | |
e315cd28 | 3895 | vha->marker_needed = 1; |
1da177e4 LT |
3896 | } |
3897 | ||
e315cd28 | 3898 | vha->flags.online = 1; |
1da177e4 | 3899 | |
fd34f556 | 3900 | ha->isp_ops->enable_intrs(ha); |
1da177e4 | 3901 | |
fa2a1ce5 | 3902 | ha->isp_abort_cnt = 0; |
e315cd28 | 3903 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
476e8978 | 3904 | |
29c5397f LC |
3905 | if (IS_QLA81XX(ha)) |
3906 | qla2x00_get_fw_version(vha, | |
3907 | &ha->fw_major_version, | |
3908 | &ha->fw_minor_version, | |
3909 | &ha->fw_subminor_version, | |
3910 | &ha->fw_attributes, &ha->fw_memory_size, | |
3911 | ha->mpi_version, &ha->mpi_capabilities, | |
3912 | ha->phy_version); | |
3913 | ||
df613b96 AV |
3914 | if (ha->fce) { |
3915 | ha->flags.fce_enabled = 1; | |
3916 | memset(ha->fce, 0, | |
3917 | fce_calc_size(ha->fce_bufs)); | |
e315cd28 | 3918 | rval = qla2x00_enable_fce_trace(vha, |
df613b96 AV |
3919 | ha->fce_dma, ha->fce_bufs, ha->fce_mb, |
3920 | &ha->fce_bufs); | |
3921 | if (rval) { | |
3922 | qla_printk(KERN_WARNING, ha, | |
3923 | "Unable to reinitialize FCE " | |
3924 | "(%d).\n", rval); | |
3925 | ha->flags.fce_enabled = 0; | |
3926 | } | |
3927 | } | |
436a7b11 AV |
3928 | |
3929 | if (ha->eft) { | |
3930 | memset(ha->eft, 0, EFT_SIZE); | |
e315cd28 | 3931 | rval = qla2x00_enable_eft_trace(vha, |
436a7b11 AV |
3932 | ha->eft_dma, EFT_NUM_BUFFERS); |
3933 | if (rval) { | |
3934 | qla_printk(KERN_WARNING, ha, | |
3935 | "Unable to reinitialize EFT " | |
3936 | "(%d).\n", rval); | |
3937 | } | |
3938 | } | |
1da177e4 | 3939 | } else { /* failed the ISP abort */ |
e315cd28 AC |
3940 | vha->flags.online = 1; |
3941 | if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { | |
1da177e4 LT |
3942 | if (ha->isp_abort_cnt == 0) { |
3943 | qla_printk(KERN_WARNING, ha, | |
3944 | "ISP error recovery failed - " | |
3945 | "board disabled\n"); | |
fa2a1ce5 | 3946 | /* |
1da177e4 LT |
3947 | * The next call disables the board |
3948 | * completely. | |
3949 | */ | |
e315cd28 AC |
3950 | ha->isp_ops->reset_adapter(vha); |
3951 | vha->flags.online = 0; | |
1da177e4 | 3952 | clear_bit(ISP_ABORT_RETRY, |
e315cd28 | 3953 | &vha->dpc_flags); |
1da177e4 LT |
3954 | status = 0; |
3955 | } else { /* schedule another ISP abort */ | |
3956 | ha->isp_abort_cnt--; | |
3957 | DEBUG(printk("qla%ld: ISP abort - " | |
0107109e | 3958 | "retry remaining %d\n", |
e315cd28 | 3959 | vha->host_no, ha->isp_abort_cnt)); |
1da177e4 LT |
3960 | status = 1; |
3961 | } | |
3962 | } else { | |
3963 | ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; | |
3964 | DEBUG(printk("qla2x00(%ld): ISP error recovery " | |
3965 | "- retrying (%d) more times\n", | |
e315cd28 AC |
3966 | vha->host_no, ha->isp_abort_cnt)); |
3967 | set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
1da177e4 LT |
3968 | status = 1; |
3969 | } | |
3970 | } | |
fa2a1ce5 | 3971 | |
1da177e4 LT |
3972 | } |
3973 | ||
e315cd28 AC |
3974 | if (!status) { |
3975 | DEBUG(printk(KERN_INFO | |
3976 | "qla2x00_abort_isp(%ld): succeeded.\n", | |
3977 | vha->host_no)); | |
ee546b6e | 3978 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
3979 | if (vp->vp_idx) |
3980 | qla2x00_vp_abort_isp(vp); | |
3981 | } | |
3982 | } else { | |
1da177e4 LT |
3983 | qla_printk(KERN_INFO, ha, |
3984 | "qla2x00_abort_isp: **** FAILED ****\n"); | |
1da177e4 LT |
3985 | } |
3986 | ||
3987 | return(status); | |
3988 | } | |
3989 | ||
3990 | /* | |
3991 | * qla2x00_restart_isp | |
3992 | * restarts the ISP after a reset | |
3993 | * | |
3994 | * Input: | |
3995 | * ha = adapter block pointer. | |
3996 | * | |
3997 | * Returns: | |
3998 | * 0 = success | |
3999 | */ | |
4000 | static int | |
e315cd28 | 4001 | qla2x00_restart_isp(scsi_qla_host_t *vha) |
1da177e4 | 4002 | { |
c6b2fca8 | 4003 | int status = 0; |
1da177e4 | 4004 | uint32_t wait_time; |
e315cd28 | 4005 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
4006 | struct req_que *req = ha->req_q_map[0]; |
4007 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
1da177e4 LT |
4008 | |
4009 | /* If firmware needs to be loaded */ | |
e315cd28 AC |
4010 | if (qla2x00_isp_firmware(vha)) { |
4011 | vha->flags.online = 0; | |
4012 | status = ha->isp_ops->chip_diag(vha); | |
4013 | if (!status) | |
4014 | status = qla2x00_setup_chip(vha); | |
1da177e4 LT |
4015 | } |
4016 | ||
e315cd28 AC |
4017 | if (!status && !(status = qla2x00_init_rings(vha))) { |
4018 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
2533cf67 | 4019 | ha->flags.chip_reset_done = 1; |
73208dfd AC |
4020 | /* Initialize the queues in use */ |
4021 | qla25xx_init_queues(ha); | |
4022 | ||
e315cd28 AC |
4023 | status = qla2x00_fw_ready(vha); |
4024 | if (!status) { | |
1da177e4 | 4025 | DEBUG(printk("%s(): Start configure loop, " |
744f11fd | 4026 | "status = %d\n", __func__, status)); |
0107109e AV |
4027 | |
4028 | /* Issue a marker after FW becomes ready. */ | |
73208dfd | 4029 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
0107109e | 4030 | |
e315cd28 | 4031 | vha->flags.online = 1; |
1da177e4 LT |
4032 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
4033 | wait_time = 256; | |
4034 | do { | |
e315cd28 AC |
4035 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
4036 | qla2x00_configure_loop(vha); | |
1da177e4 | 4037 | wait_time--; |
e315cd28 AC |
4038 | } while (!atomic_read(&vha->loop_down_timer) && |
4039 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
4040 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
4041 | &vha->dpc_flags))); | |
1da177e4 LT |
4042 | } |
4043 | ||
4044 | /* if no cable then assume it's good */ | |
e315cd28 | 4045 | if ((vha->device_flags & DFLG_NO_CABLE)) |
1da177e4 LT |
4046 | status = 0; |
4047 | ||
4048 | DEBUG(printk("%s(): Configure loop done, status = 0x%x\n", | |
4049 | __func__, | |
744f11fd | 4050 | status)); |
1da177e4 LT |
4051 | } |
4052 | return (status); | |
4053 | } | |
4054 | ||
73208dfd AC |
4055 | static int |
4056 | qla25xx_init_queues(struct qla_hw_data *ha) | |
4057 | { | |
4058 | struct rsp_que *rsp = NULL; | |
4059 | struct req_que *req = NULL; | |
4060 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
4061 | int ret = -1; | |
4062 | int i; | |
4063 | ||
2afa19a9 | 4064 | for (i = 1; i < ha->max_rsp_queues; i++) { |
73208dfd AC |
4065 | rsp = ha->rsp_q_map[i]; |
4066 | if (rsp) { | |
4067 | rsp->options &= ~BIT_0; | |
618a7523 | 4068 | ret = qla25xx_init_rsp_que(base_vha, rsp); |
73208dfd AC |
4069 | if (ret != QLA_SUCCESS) |
4070 | DEBUG2_17(printk(KERN_WARNING | |
4071 | "%s Rsp que:%d init failed\n", __func__, | |
4072 | rsp->id)); | |
4073 | else | |
4074 | DEBUG2_17(printk(KERN_INFO | |
4075 | "%s Rsp que:%d inited\n", __func__, | |
4076 | rsp->id)); | |
4077 | } | |
2afa19a9 AC |
4078 | } |
4079 | for (i = 1; i < ha->max_req_queues; i++) { | |
73208dfd AC |
4080 | req = ha->req_q_map[i]; |
4081 | if (req) { | |
29bdccbe | 4082 | /* Clear outstanding commands array. */ |
73208dfd | 4083 | req->options &= ~BIT_0; |
618a7523 | 4084 | ret = qla25xx_init_req_que(base_vha, req); |
73208dfd AC |
4085 | if (ret != QLA_SUCCESS) |
4086 | DEBUG2_17(printk(KERN_WARNING | |
4087 | "%s Req que:%d init failed\n", __func__, | |
4088 | req->id)); | |
4089 | else | |
4090 | DEBUG2_17(printk(KERN_WARNING | |
29bdccbe | 4091 | "%s Req que:%d inited\n", __func__, |
73208dfd AC |
4092 | req->id)); |
4093 | } | |
4094 | } | |
4095 | return ret; | |
4096 | } | |
4097 | ||
1da177e4 LT |
4098 | /* |
4099 | * qla2x00_reset_adapter | |
4100 | * Reset adapter. | |
4101 | * | |
4102 | * Input: | |
4103 | * ha = adapter block pointer. | |
4104 | */ | |
abbd8870 | 4105 | void |
e315cd28 | 4106 | qla2x00_reset_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
4107 | { |
4108 | unsigned long flags = 0; | |
e315cd28 | 4109 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 4110 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 4111 | |
e315cd28 | 4112 | vha->flags.online = 0; |
fd34f556 | 4113 | ha->isp_ops->disable_intrs(ha); |
1da177e4 | 4114 | |
1da177e4 LT |
4115 | spin_lock_irqsave(&ha->hardware_lock, flags); |
4116 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
4117 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
4118 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
4119 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
4120 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
4121 | } | |
0107109e AV |
4122 | |
4123 | void | |
e315cd28 | 4124 | qla24xx_reset_adapter(scsi_qla_host_t *vha) |
0107109e AV |
4125 | { |
4126 | unsigned long flags = 0; | |
e315cd28 | 4127 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
4128 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
4129 | ||
a9083016 GM |
4130 | if (IS_QLA82XX(ha)) |
4131 | return; | |
4132 | ||
e315cd28 | 4133 | vha->flags.online = 0; |
fd34f556 | 4134 | ha->isp_ops->disable_intrs(ha); |
0107109e AV |
4135 | |
4136 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
4137 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); | |
4138 | RD_REG_DWORD(®->hccr); | |
4139 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
4140 | RD_REG_DWORD(®->hccr); | |
4141 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
09ff36d3 AV |
4142 | |
4143 | if (IS_NOPOLLING_TYPE(ha)) | |
4144 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
4145 | } |
4146 | ||
4e08df3f DM |
4147 | /* On sparc systems, obtain port and node WWN from firmware |
4148 | * properties. | |
4149 | */ | |
e315cd28 AC |
4150 | static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, |
4151 | struct nvram_24xx *nv) | |
4e08df3f DM |
4152 | { |
4153 | #ifdef CONFIG_SPARC | |
e315cd28 | 4154 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 4155 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
4156 | struct device_node *dp = pci_device_to_OF_node(pdev); |
4157 | const u8 *val; | |
4e08df3f DM |
4158 | int len; |
4159 | ||
4160 | val = of_get_property(dp, "port-wwn", &len); | |
4161 | if (val && len >= WWN_SIZE) | |
4162 | memcpy(nv->port_name, val, WWN_SIZE); | |
4163 | ||
4164 | val = of_get_property(dp, "node-wwn", &len); | |
4165 | if (val && len >= WWN_SIZE) | |
4166 | memcpy(nv->node_name, val, WWN_SIZE); | |
4167 | #endif | |
4168 | } | |
4169 | ||
0107109e | 4170 | int |
e315cd28 | 4171 | qla24xx_nvram_config(scsi_qla_host_t *vha) |
0107109e | 4172 | { |
4e08df3f | 4173 | int rval; |
0107109e AV |
4174 | struct init_cb_24xx *icb; |
4175 | struct nvram_24xx *nv; | |
4176 | uint32_t *dptr; | |
4177 | uint8_t *dptr1, *dptr2; | |
4178 | uint32_t chksum; | |
4179 | uint16_t cnt; | |
e315cd28 | 4180 | struct qla_hw_data *ha = vha->hw; |
0107109e | 4181 | |
4e08df3f | 4182 | rval = QLA_SUCCESS; |
0107109e | 4183 | icb = (struct init_cb_24xx *)ha->init_cb; |
281afe19 | 4184 | nv = ha->nvram; |
0107109e AV |
4185 | |
4186 | /* Determine NVRAM starting address. */ | |
e5b68a61 AC |
4187 | if (ha->flags.port0) { |
4188 | ha->nvram_base = FA_NVRAM_FUNC0_ADDR; | |
4189 | ha->vpd_base = FA_NVRAM_VPD0_ADDR; | |
4190 | } else { | |
0107109e | 4191 | ha->nvram_base = FA_NVRAM_FUNC1_ADDR; |
6f641790 AV |
4192 | ha->vpd_base = FA_NVRAM_VPD1_ADDR; |
4193 | } | |
e5b68a61 AC |
4194 | ha->nvram_size = sizeof(struct nvram_24xx); |
4195 | ha->vpd_size = FA_NVRAM_VPD_SIZE; | |
a9083016 GM |
4196 | if (IS_QLA82XX(ha)) |
4197 | ha->vpd_size = FA_VPD_SIZE_82XX; | |
0107109e | 4198 | |
281afe19 SJ |
4199 | /* Get VPD data into cache */ |
4200 | ha->vpd = ha->nvram + VPD_OFFSET; | |
e315cd28 | 4201 | ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, |
281afe19 SJ |
4202 | ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); |
4203 | ||
4204 | /* Get NVRAM data into cache and calculate checksum. */ | |
0107109e | 4205 | dptr = (uint32_t *)nv; |
e315cd28 | 4206 | ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, |
0107109e AV |
4207 | ha->nvram_size); |
4208 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) | |
4209 | chksum += le32_to_cpu(*dptr++); | |
4210 | ||
7640335e | 4211 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no)); |
281afe19 | 4212 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
0107109e AV |
4213 | |
4214 | /* Bad NVRAM data, set defaults parameters. */ | |
4215 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
4216 | || nv->id[3] != ' ' || | |
4217 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
4218 | /* Reset NVRAM data. */ | |
4219 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
4220 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
4221 | le16_to_cpu(nv->nvram_version)); | |
4e08df3f DM |
4222 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " |
4223 | "invalid -- WWPN) defaults.\n"); | |
4224 | ||
4225 | /* | |
4226 | * Set default initialization control block. | |
4227 | */ | |
4228 | memset(nv, 0, ha->nvram_size); | |
4229 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
4230 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
4231 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
4232 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
4233 | nv->exchange_count = __constant_cpu_to_le16(0); | |
4234 | nv->hard_address = __constant_cpu_to_le16(124); | |
4235 | nv->port_name[0] = 0x21; | |
e5b68a61 | 4236 | nv->port_name[1] = 0x00 + ha->port_no; |
4e08df3f DM |
4237 | nv->port_name[2] = 0x00; |
4238 | nv->port_name[3] = 0xe0; | |
4239 | nv->port_name[4] = 0x8b; | |
4240 | nv->port_name[5] = 0x1c; | |
4241 | nv->port_name[6] = 0x55; | |
4242 | nv->port_name[7] = 0x86; | |
4243 | nv->node_name[0] = 0x20; | |
4244 | nv->node_name[1] = 0x00; | |
4245 | nv->node_name[2] = 0x00; | |
4246 | nv->node_name[3] = 0xe0; | |
4247 | nv->node_name[4] = 0x8b; | |
4248 | nv->node_name[5] = 0x1c; | |
4249 | nv->node_name[6] = 0x55; | |
4250 | nv->node_name[7] = 0x86; | |
e315cd28 | 4251 | qla24xx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
4252 | nv->login_retry_count = __constant_cpu_to_le16(8); |
4253 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
4254 | nv->login_timeout = __constant_cpu_to_le16(0); | |
4255 | nv->firmware_options_1 = | |
4256 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
4257 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
4258 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
4259 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
4260 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
4261 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
4262 | nv->reset_delay = 5; | |
4263 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
4264 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
4265 | nv->link_down_timeout = __constant_cpu_to_le16(30); | |
4266 | ||
4267 | rval = 1; | |
0107109e AV |
4268 | } |
4269 | ||
4270 | /* Reset Initialization control block */ | |
e315cd28 | 4271 | memset(icb, 0, ha->init_cb_size); |
0107109e AV |
4272 | |
4273 | /* Copy 1st segment. */ | |
4274 | dptr1 = (uint8_t *)icb; | |
4275 | dptr2 = (uint8_t *)&nv->version; | |
4276 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
4277 | while (cnt--) | |
4278 | *dptr1++ = *dptr2++; | |
4279 | ||
4280 | icb->login_retry_count = nv->login_retry_count; | |
3ea66e28 | 4281 | icb->link_down_on_nos = nv->link_down_on_nos; |
0107109e AV |
4282 | |
4283 | /* Copy 2nd segment. */ | |
4284 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
4285 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
4286 | cnt = (uint8_t *)&icb->reserved_3 - | |
4287 | (uint8_t *)&icb->interrupt_delay_timer; | |
4288 | while (cnt--) | |
4289 | *dptr1++ = *dptr2++; | |
4290 | ||
4291 | /* | |
4292 | * Setup driver NVRAM options. | |
4293 | */ | |
e315cd28 | 4294 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), |
9bb9fcf2 | 4295 | "QLA2462"); |
0107109e | 4296 | |
5341e868 AV |
4297 | /* Use alternate WWN? */ |
4298 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
4299 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
4300 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
4301 | } | |
4302 | ||
0107109e | 4303 | /* Prepare nodename */ |
fd0e7e4d | 4304 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { |
0107109e AV |
4305 | /* |
4306 | * Firmware will apply the following mask if the nodename was | |
4307 | * not provided. | |
4308 | */ | |
4309 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
4310 | icb->node_name[0] &= 0xF0; | |
4311 | } | |
4312 | ||
4313 | /* Set host adapter parameters. */ | |
4314 | ha->flags.disable_risc_code_load = 0; | |
0c8c39af AV |
4315 | ha->flags.enable_lip_reset = 0; |
4316 | ha->flags.enable_lip_full_login = | |
4317 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
4318 | ha->flags.enable_target_reset = | |
4319 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
0107109e | 4320 | ha->flags.enable_led_scheme = 0; |
d4c760c2 | 4321 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; |
0107109e | 4322 | |
fd0e7e4d AV |
4323 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & |
4324 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
0107109e AV |
4325 | |
4326 | memcpy(ha->fw_seriallink_options24, nv->seriallink_options, | |
4327 | sizeof(ha->fw_seriallink_options24)); | |
4328 | ||
4329 | /* save HBA serial number */ | |
4330 | ha->serial0 = icb->port_name[5]; | |
4331 | ha->serial1 = icb->port_name[6]; | |
4332 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
4333 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
4334 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
0107109e | 4335 | |
bc8fb3cb AV |
4336 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); |
4337 | ||
0107109e AV |
4338 | ha->retry_count = le16_to_cpu(nv->login_retry_count); |
4339 | ||
4340 | /* Set minimum login_timeout to 4 seconds. */ | |
4341 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
4342 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
4343 | if (le16_to_cpu(nv->login_timeout) < 4) | |
4344 | nv->login_timeout = __constant_cpu_to_le16(4); | |
4345 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
c6852c4c | 4346 | icb->login_timeout = nv->login_timeout; |
0107109e | 4347 | |
00a537b8 AV |
4348 | /* Set minimum RATOV to 100 tenths of a second. */ |
4349 | ha->r_a_tov = 100; | |
0107109e AV |
4350 | |
4351 | ha->loop_reset_delay = nv->reset_delay; | |
4352 | ||
4353 | /* Link Down Timeout = 0: | |
4354 | * | |
4355 | * When Port Down timer expires we will start returning | |
4356 | * I/O's to OS with "DID_NO_CONNECT". | |
4357 | * | |
4358 | * Link Down Timeout != 0: | |
4359 | * | |
4360 | * The driver waits for the link to come up after link down | |
4361 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
4362 | */ | |
4363 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
4364 | ha->loop_down_abort_time = | |
4365 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
4366 | } else { | |
4367 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
4368 | ha->loop_down_abort_time = | |
4369 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
4370 | } | |
4371 | ||
4372 | /* Need enough time to try and get the port back. */ | |
4373 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
4374 | if (qlport_down_retry) | |
4375 | ha->port_down_retry_count = qlport_down_retry; | |
4376 | ||
4377 | /* Set login_retry_count */ | |
4378 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
4379 | if (ha->port_down_retry_count == | |
4380 | le16_to_cpu(nv->port_down_retry_count) && | |
4381 | ha->port_down_retry_count > 3) | |
4382 | ha->login_retry_count = ha->port_down_retry_count; | |
4383 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
4384 | ha->login_retry_count = ha->port_down_retry_count; | |
4385 | if (ql2xloginretrycount) | |
4386 | ha->login_retry_count = ql2xloginretrycount; | |
4387 | ||
4fdfefe5 | 4388 | /* Enable ZIO. */ |
e315cd28 | 4389 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
4390 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & |
4391 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
4392 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
4393 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
4394 | } | |
4395 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
4396 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
e315cd28 | 4397 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 4398 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d AV |
4399 | ha->zio_mode = QLA_ZIO_MODE_6; |
4400 | ||
4fdfefe5 | 4401 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay " |
e315cd28 | 4402 | "(%d us).\n", vha->host_no, ha->zio_mode, |
4fdfefe5 AV |
4403 | ha->zio_timer * 100)); |
4404 | qla_printk(KERN_INFO, ha, | |
4405 | "ZIO mode %d enabled; timer delay (%d us).\n", | |
4406 | ha->zio_mode, ha->zio_timer * 100); | |
4407 | ||
4408 | icb->firmware_options_2 |= cpu_to_le32( | |
4409 | (uint32_t)ha->zio_mode); | |
4410 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
e315cd28 | 4411 | vha->flags.process_response_queue = 1; |
4fdfefe5 AV |
4412 | } |
4413 | ||
4e08df3f DM |
4414 | if (rval) { |
4415 | DEBUG2_3(printk(KERN_WARNING | |
e315cd28 | 4416 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); |
4e08df3f DM |
4417 | } |
4418 | return (rval); | |
0107109e AV |
4419 | } |
4420 | ||
413975a0 | 4421 | static int |
cbc8eb67 AV |
4422 | qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, |
4423 | uint32_t faddr) | |
d1c61909 | 4424 | { |
73208dfd | 4425 | int rval = QLA_SUCCESS; |
d1c61909 | 4426 | int segments, fragment; |
d1c61909 AV |
4427 | uint32_t *dcode, dlen; |
4428 | uint32_t risc_addr; | |
4429 | uint32_t risc_size; | |
4430 | uint32_t i; | |
e315cd28 | 4431 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4432 | struct req_que *req = ha->req_q_map[0]; |
eaac30be AV |
4433 | |
4434 | qla_printk(KERN_INFO, ha, | |
cbc8eb67 | 4435 | "FW: Loading from flash (%x)...\n", faddr); |
eaac30be | 4436 | |
d1c61909 AV |
4437 | rval = QLA_SUCCESS; |
4438 | ||
4439 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 4440 | dcode = (uint32_t *)req->ring; |
d1c61909 AV |
4441 | *srisc_addr = 0; |
4442 | ||
4443 | /* Validate firmware image by checking version. */ | |
e315cd28 | 4444 | qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); |
d1c61909 AV |
4445 | for (i = 0; i < 4; i++) |
4446 | dcode[i] = be32_to_cpu(dcode[i]); | |
4447 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
4448 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
4449 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
4450 | dcode[3] == 0)) { | |
4451 | qla_printk(KERN_WARNING, ha, | |
4452 | "Unable to verify integrity of flash firmware image!\n"); | |
4453 | qla_printk(KERN_WARNING, ha, | |
4454 | "Firmware data: %08x %08x %08x %08x!\n", dcode[0], | |
4455 | dcode[1], dcode[2], dcode[3]); | |
4456 | ||
4457 | return QLA_FUNCTION_FAILED; | |
4458 | } | |
4459 | ||
4460 | while (segments && rval == QLA_SUCCESS) { | |
4461 | /* Read segment's load information. */ | |
e315cd28 | 4462 | qla24xx_read_flash_data(vha, dcode, faddr, 4); |
d1c61909 AV |
4463 | |
4464 | risc_addr = be32_to_cpu(dcode[2]); | |
4465 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
4466 | risc_size = be32_to_cpu(dcode[3]); | |
4467 | ||
4468 | fragment = 0; | |
4469 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4470 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
4471 | if (dlen > risc_size) | |
4472 | dlen = risc_size; | |
4473 | ||
4474 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
4475 | "addr %x, number of dwords 0x%x, offset 0x%x.\n", | |
e315cd28 | 4476 | vha->host_no, risc_addr, dlen, faddr)); |
d1c61909 | 4477 | |
e315cd28 | 4478 | qla24xx_read_flash_data(vha, dcode, faddr, dlen); |
d1c61909 AV |
4479 | for (i = 0; i < dlen; i++) |
4480 | dcode[i] = swab32(dcode[i]); | |
4481 | ||
73208dfd | 4482 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
d1c61909 AV |
4483 | dlen); |
4484 | if (rval) { | |
4485 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 4486 | "segment %d of firmware\n", vha->host_no, |
d1c61909 AV |
4487 | fragment)); |
4488 | qla_printk(KERN_WARNING, ha, | |
4489 | "[ERROR] Failed to load segment %d of " | |
4490 | "firmware\n", fragment); | |
4491 | break; | |
4492 | } | |
4493 | ||
4494 | faddr += dlen; | |
4495 | risc_addr += dlen; | |
4496 | risc_size -= dlen; | |
4497 | fragment++; | |
4498 | } | |
4499 | ||
4500 | /* Next segment. */ | |
4501 | segments--; | |
4502 | } | |
4503 | ||
4504 | return rval; | |
4505 | } | |
4506 | ||
d1c61909 AV |
4507 | #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/" |
4508 | ||
0107109e | 4509 | int |
e315cd28 | 4510 | qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) |
5433383e AV |
4511 | { |
4512 | int rval; | |
4513 | int i, fragment; | |
4514 | uint16_t *wcode, *fwcode; | |
4515 | uint32_t risc_addr, risc_size, fwclen, wlen, *seg; | |
4516 | struct fw_blob *blob; | |
e315cd28 | 4517 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4518 | struct req_que *req = ha->req_q_map[0]; |
5433383e AV |
4519 | |
4520 | /* Load firmware blob. */ | |
e315cd28 | 4521 | blob = qla2x00_request_firmware(vha); |
5433383e AV |
4522 | if (!blob) { |
4523 | qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n"); | |
d1c61909 AV |
4524 | qla_printk(KERN_ERR, ha, "Firmware images can be retrieved " |
4525 | "from: " QLA_FW_URL ".\n"); | |
5433383e AV |
4526 | return QLA_FUNCTION_FAILED; |
4527 | } | |
4528 | ||
4529 | rval = QLA_SUCCESS; | |
4530 | ||
73208dfd | 4531 | wcode = (uint16_t *)req->ring; |
5433383e AV |
4532 | *srisc_addr = 0; |
4533 | fwcode = (uint16_t *)blob->fw->data; | |
4534 | fwclen = 0; | |
4535 | ||
4536 | /* Validate firmware image by checking version. */ | |
4537 | if (blob->fw->size < 8 * sizeof(uint16_t)) { | |
4538 | qla_printk(KERN_WARNING, ha, | |
4539 | "Unable to verify integrity of firmware image (%Zd)!\n", | |
4540 | blob->fw->size); | |
4541 | goto fail_fw_integrity; | |
4542 | } | |
4543 | for (i = 0; i < 4; i++) | |
4544 | wcode[i] = be16_to_cpu(fwcode[i + 4]); | |
4545 | if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && | |
4546 | wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && | |
4547 | wcode[2] == 0 && wcode[3] == 0)) { | |
4548 | qla_printk(KERN_WARNING, ha, | |
4549 | "Unable to verify integrity of firmware image!\n"); | |
4550 | qla_printk(KERN_WARNING, ha, | |
4551 | "Firmware data: %04x %04x %04x %04x!\n", wcode[0], | |
4552 | wcode[1], wcode[2], wcode[3]); | |
4553 | goto fail_fw_integrity; | |
4554 | } | |
4555 | ||
4556 | seg = blob->segs; | |
4557 | while (*seg && rval == QLA_SUCCESS) { | |
4558 | risc_addr = *seg; | |
4559 | *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; | |
4560 | risc_size = be16_to_cpu(fwcode[3]); | |
4561 | ||
4562 | /* Validate firmware image size. */ | |
4563 | fwclen += risc_size * sizeof(uint16_t); | |
4564 | if (blob->fw->size < fwclen) { | |
4565 | qla_printk(KERN_WARNING, ha, | |
4566 | "Unable to verify integrity of firmware image " | |
4567 | "(%Zd)!\n", blob->fw->size); | |
4568 | goto fail_fw_integrity; | |
4569 | } | |
4570 | ||
4571 | fragment = 0; | |
4572 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4573 | wlen = (uint16_t)(ha->fw_transfer_size >> 1); | |
4574 | if (wlen > risc_size) | |
4575 | wlen = risc_size; | |
4576 | ||
4577 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
e315cd28 | 4578 | "addr %x, number of words 0x%x.\n", vha->host_no, |
5433383e AV |
4579 | risc_addr, wlen)); |
4580 | ||
4581 | for (i = 0; i < wlen; i++) | |
4582 | wcode[i] = swab16(fwcode[i]); | |
4583 | ||
73208dfd | 4584 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
5433383e AV |
4585 | wlen); |
4586 | if (rval) { | |
4587 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 4588 | "segment %d of firmware\n", vha->host_no, |
5433383e AV |
4589 | fragment)); |
4590 | qla_printk(KERN_WARNING, ha, | |
4591 | "[ERROR] Failed to load segment %d of " | |
4592 | "firmware\n", fragment); | |
4593 | break; | |
4594 | } | |
4595 | ||
4596 | fwcode += wlen; | |
4597 | risc_addr += wlen; | |
4598 | risc_size -= wlen; | |
4599 | fragment++; | |
4600 | } | |
4601 | ||
4602 | /* Next segment. */ | |
4603 | seg++; | |
4604 | } | |
4605 | return rval; | |
4606 | ||
4607 | fail_fw_integrity: | |
4608 | return QLA_FUNCTION_FAILED; | |
4609 | } | |
4610 | ||
eaac30be AV |
4611 | static int |
4612 | qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
0107109e AV |
4613 | { |
4614 | int rval; | |
4615 | int segments, fragment; | |
4616 | uint32_t *dcode, dlen; | |
4617 | uint32_t risc_addr; | |
4618 | uint32_t risc_size; | |
4619 | uint32_t i; | |
5433383e | 4620 | struct fw_blob *blob; |
0107109e | 4621 | uint32_t *fwcode, fwclen; |
e315cd28 | 4622 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4623 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 4624 | |
5433383e | 4625 | /* Load firmware blob. */ |
e315cd28 | 4626 | blob = qla2x00_request_firmware(vha); |
5433383e AV |
4627 | if (!blob) { |
4628 | qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n"); | |
d1c61909 AV |
4629 | qla_printk(KERN_ERR, ha, "Firmware images can be retrieved " |
4630 | "from: " QLA_FW_URL ".\n"); | |
4631 | ||
eaac30be | 4632 | return QLA_FUNCTION_FAILED; |
0107109e AV |
4633 | } |
4634 | ||
eaac30be AV |
4635 | qla_printk(KERN_INFO, ha, |
4636 | "FW: Loading via request-firmware...\n"); | |
4637 | ||
0107109e AV |
4638 | rval = QLA_SUCCESS; |
4639 | ||
4640 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 4641 | dcode = (uint32_t *)req->ring; |
0107109e | 4642 | *srisc_addr = 0; |
5433383e | 4643 | fwcode = (uint32_t *)blob->fw->data; |
0107109e AV |
4644 | fwclen = 0; |
4645 | ||
4646 | /* Validate firmware image by checking version. */ | |
5433383e | 4647 | if (blob->fw->size < 8 * sizeof(uint32_t)) { |
0107109e | 4648 | qla_printk(KERN_WARNING, ha, |
5433383e AV |
4649 | "Unable to verify integrity of firmware image (%Zd)!\n", |
4650 | blob->fw->size); | |
0107109e AV |
4651 | goto fail_fw_integrity; |
4652 | } | |
4653 | for (i = 0; i < 4; i++) | |
4654 | dcode[i] = be32_to_cpu(fwcode[i + 4]); | |
4655 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
4656 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
4657 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
4658 | dcode[3] == 0)) { | |
4659 | qla_printk(KERN_WARNING, ha, | |
5433383e | 4660 | "Unable to verify integrity of firmware image!\n"); |
0107109e AV |
4661 | qla_printk(KERN_WARNING, ha, |
4662 | "Firmware data: %08x %08x %08x %08x!\n", dcode[0], | |
4663 | dcode[1], dcode[2], dcode[3]); | |
4664 | goto fail_fw_integrity; | |
4665 | } | |
4666 | ||
4667 | while (segments && rval == QLA_SUCCESS) { | |
4668 | risc_addr = be32_to_cpu(fwcode[2]); | |
4669 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
4670 | risc_size = be32_to_cpu(fwcode[3]); | |
4671 | ||
4672 | /* Validate firmware image size. */ | |
4673 | fwclen += risc_size * sizeof(uint32_t); | |
5433383e | 4674 | if (blob->fw->size < fwclen) { |
0107109e | 4675 | qla_printk(KERN_WARNING, ha, |
5433383e AV |
4676 | "Unable to verify integrity of firmware image " |
4677 | "(%Zd)!\n", blob->fw->size); | |
4678 | ||
0107109e AV |
4679 | goto fail_fw_integrity; |
4680 | } | |
4681 | ||
4682 | fragment = 0; | |
4683 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4684 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
4685 | if (dlen > risc_size) | |
4686 | dlen = risc_size; | |
4687 | ||
4688 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
e315cd28 | 4689 | "addr %x, number of dwords 0x%x.\n", vha->host_no, |
0107109e AV |
4690 | risc_addr, dlen)); |
4691 | ||
4692 | for (i = 0; i < dlen; i++) | |
4693 | dcode[i] = swab32(fwcode[i]); | |
4694 | ||
73208dfd | 4695 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
590f98e5 | 4696 | dlen); |
0107109e AV |
4697 | if (rval) { |
4698 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 4699 | "segment %d of firmware\n", vha->host_no, |
0107109e AV |
4700 | fragment)); |
4701 | qla_printk(KERN_WARNING, ha, | |
4702 | "[ERROR] Failed to load segment %d of " | |
4703 | "firmware\n", fragment); | |
4704 | break; | |
4705 | } | |
4706 | ||
4707 | fwcode += dlen; | |
4708 | risc_addr += dlen; | |
4709 | risc_size -= dlen; | |
4710 | fragment++; | |
4711 | } | |
4712 | ||
4713 | /* Next segment. */ | |
4714 | segments--; | |
4715 | } | |
0107109e AV |
4716 | return rval; |
4717 | ||
4718 | fail_fw_integrity: | |
0107109e | 4719 | return QLA_FUNCTION_FAILED; |
0107109e | 4720 | } |
18c6c127 | 4721 | |
eaac30be AV |
4722 | int |
4723 | qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4724 | { | |
4725 | int rval; | |
4726 | ||
e337d907 AV |
4727 | if (ql2xfwloadbin == 1) |
4728 | return qla81xx_load_risc(vha, srisc_addr); | |
4729 | ||
eaac30be AV |
4730 | /* |
4731 | * FW Load priority: | |
4732 | * 1) Firmware via request-firmware interface (.bin file). | |
4733 | * 2) Firmware residing in flash. | |
4734 | */ | |
4735 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4736 | if (rval == QLA_SUCCESS) | |
4737 | return rval; | |
4738 | ||
cbc8eb67 AV |
4739 | return qla24xx_load_risc_flash(vha, srisc_addr, |
4740 | vha->hw->flt_region_fw); | |
eaac30be AV |
4741 | } |
4742 | ||
4743 | int | |
4744 | qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4745 | { | |
4746 | int rval; | |
cbc8eb67 | 4747 | struct qla_hw_data *ha = vha->hw; |
eaac30be | 4748 | |
e337d907 | 4749 | if (ql2xfwloadbin == 2) |
cbc8eb67 | 4750 | goto try_blob_fw; |
e337d907 | 4751 | |
eaac30be AV |
4752 | /* |
4753 | * FW Load priority: | |
4754 | * 1) Firmware residing in flash. | |
4755 | * 2) Firmware via request-firmware interface (.bin file). | |
cbc8eb67 | 4756 | * 3) Golden-Firmware residing in flash -- limited operation. |
eaac30be | 4757 | */ |
cbc8eb67 | 4758 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); |
eaac30be AV |
4759 | if (rval == QLA_SUCCESS) |
4760 | return rval; | |
4761 | ||
cbc8eb67 AV |
4762 | try_blob_fw: |
4763 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4764 | if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) | |
4765 | return rval; | |
4766 | ||
4767 | qla_printk(KERN_ERR, ha, | |
4768 | "FW: Attempting to fallback to golden firmware...\n"); | |
4769 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); | |
4770 | if (rval != QLA_SUCCESS) | |
4771 | return rval; | |
4772 | ||
4773 | qla_printk(KERN_ERR, ha, | |
4774 | "FW: Please update operational firmware...\n"); | |
4775 | ha->flags.running_gold_fw = 1; | |
4776 | ||
4777 | return rval; | |
eaac30be AV |
4778 | } |
4779 | ||
18c6c127 | 4780 | void |
e315cd28 | 4781 | qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) |
18c6c127 AV |
4782 | { |
4783 | int ret, retries; | |
e315cd28 | 4784 | struct qla_hw_data *ha = vha->hw; |
18c6c127 | 4785 | |
85880801 AV |
4786 | if (ha->flags.pci_channel_io_perm_failure) |
4787 | return; | |
e428924c | 4788 | if (!IS_FWI2_CAPABLE(ha)) |
18c6c127 | 4789 | return; |
75edf81d AV |
4790 | if (!ha->fw_major_version) |
4791 | return; | |
18c6c127 | 4792 | |
e315cd28 | 4793 | ret = qla2x00_stop_firmware(vha); |
7c7f1f29 | 4794 | for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && |
b469a7cb | 4795 | ret != QLA_INVALID_COMMAND && retries ; retries--) { |
e315cd28 AC |
4796 | ha->isp_ops->reset_chip(vha); |
4797 | if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) | |
18c6c127 | 4798 | continue; |
e315cd28 | 4799 | if (qla2x00_setup_chip(vha) != QLA_SUCCESS) |
18c6c127 AV |
4800 | continue; |
4801 | qla_printk(KERN_INFO, ha, | |
4802 | "Attempting retry of stop-firmware command...\n"); | |
e315cd28 | 4803 | ret = qla2x00_stop_firmware(vha); |
18c6c127 AV |
4804 | } |
4805 | } | |
2c3dfe3f SJ |
4806 | |
4807 | int | |
e315cd28 | 4808 | qla24xx_configure_vhba(scsi_qla_host_t *vha) |
2c3dfe3f SJ |
4809 | { |
4810 | int rval = QLA_SUCCESS; | |
4811 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
e315cd28 AC |
4812 | struct qla_hw_data *ha = vha->hw; |
4813 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
67c2e93a AC |
4814 | struct req_que *req; |
4815 | struct rsp_que *rsp; | |
2c3dfe3f | 4816 | |
e315cd28 | 4817 | if (!vha->vp_idx) |
2c3dfe3f SJ |
4818 | return -EINVAL; |
4819 | ||
e315cd28 | 4820 | rval = qla2x00_fw_ready(base_vha); |
7163ea81 | 4821 | if (ha->flags.cpu_affinity_enabled) |
67c2e93a AC |
4822 | req = ha->req_q_map[0]; |
4823 | else | |
4824 | req = vha->req; | |
4825 | rsp = req->rsp; | |
4826 | ||
2c3dfe3f | 4827 | if (rval == QLA_SUCCESS) { |
e315cd28 | 4828 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
73208dfd | 4829 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
2c3dfe3f SJ |
4830 | } |
4831 | ||
e315cd28 | 4832 | vha->flags.management_server_logged_in = 0; |
2c3dfe3f SJ |
4833 | |
4834 | /* Login to SNS first */ | |
e315cd28 | 4835 | ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1); |
2c3dfe3f SJ |
4836 | if (mb[0] != MBS_COMMAND_COMPLETE) { |
4837 | DEBUG15(qla_printk(KERN_INFO, ha, | |
4838 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " | |
4839 | "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS, | |
4840 | mb[0], mb[1], mb[2], mb[6], mb[7])); | |
4841 | return (QLA_FUNCTION_FAILED); | |
4842 | } | |
4843 | ||
e315cd28 AC |
4844 | atomic_set(&vha->loop_down_timer, 0); |
4845 | atomic_set(&vha->loop_state, LOOP_UP); | |
4846 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
4847 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
4848 | rval = qla2x00_loop_resync(base_vha); | |
2c3dfe3f SJ |
4849 | |
4850 | return rval; | |
4851 | } | |
4d4df193 HK |
4852 | |
4853 | /* 84XX Support **************************************************************/ | |
4854 | ||
4855 | static LIST_HEAD(qla_cs84xx_list); | |
4856 | static DEFINE_MUTEX(qla_cs84xx_mutex); | |
4857 | ||
4858 | static struct qla_chip_state_84xx * | |
e315cd28 | 4859 | qla84xx_get_chip(struct scsi_qla_host *vha) |
4d4df193 HK |
4860 | { |
4861 | struct qla_chip_state_84xx *cs84xx; | |
e315cd28 | 4862 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4863 | |
4864 | mutex_lock(&qla_cs84xx_mutex); | |
4865 | ||
4866 | /* Find any shared 84xx chip. */ | |
4867 | list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { | |
4868 | if (cs84xx->bus == ha->pdev->bus) { | |
4869 | kref_get(&cs84xx->kref); | |
4870 | goto done; | |
4871 | } | |
4872 | } | |
4873 | ||
4874 | cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); | |
4875 | if (!cs84xx) | |
4876 | goto done; | |
4877 | ||
4878 | kref_init(&cs84xx->kref); | |
4879 | spin_lock_init(&cs84xx->access_lock); | |
4880 | mutex_init(&cs84xx->fw_update_mutex); | |
4881 | cs84xx->bus = ha->pdev->bus; | |
4882 | ||
4883 | list_add_tail(&cs84xx->list, &qla_cs84xx_list); | |
4884 | done: | |
4885 | mutex_unlock(&qla_cs84xx_mutex); | |
4886 | return cs84xx; | |
4887 | } | |
4888 | ||
4889 | static void | |
4890 | __qla84xx_chip_release(struct kref *kref) | |
4891 | { | |
4892 | struct qla_chip_state_84xx *cs84xx = | |
4893 | container_of(kref, struct qla_chip_state_84xx, kref); | |
4894 | ||
4895 | mutex_lock(&qla_cs84xx_mutex); | |
4896 | list_del(&cs84xx->list); | |
4897 | mutex_unlock(&qla_cs84xx_mutex); | |
4898 | kfree(cs84xx); | |
4899 | } | |
4900 | ||
4901 | void | |
e315cd28 | 4902 | qla84xx_put_chip(struct scsi_qla_host *vha) |
4d4df193 | 4903 | { |
e315cd28 | 4904 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4905 | if (ha->cs84xx) |
4906 | kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); | |
4907 | } | |
4908 | ||
4909 | static int | |
e315cd28 | 4910 | qla84xx_init_chip(scsi_qla_host_t *vha) |
4d4df193 HK |
4911 | { |
4912 | int rval; | |
4913 | uint16_t status[2]; | |
e315cd28 | 4914 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4915 | |
4916 | mutex_lock(&ha->cs84xx->fw_update_mutex); | |
4917 | ||
e315cd28 | 4918 | rval = qla84xx_verify_chip(vha, status); |
4d4df193 HK |
4919 | |
4920 | mutex_unlock(&ha->cs84xx->fw_update_mutex); | |
4921 | ||
4922 | return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: | |
4923 | QLA_SUCCESS; | |
4924 | } | |
3a03eb79 AV |
4925 | |
4926 | /* 81XX Support **************************************************************/ | |
4927 | ||
4928 | int | |
4929 | qla81xx_nvram_config(scsi_qla_host_t *vha) | |
4930 | { | |
4931 | int rval; | |
4932 | struct init_cb_81xx *icb; | |
4933 | struct nvram_81xx *nv; | |
4934 | uint32_t *dptr; | |
4935 | uint8_t *dptr1, *dptr2; | |
4936 | uint32_t chksum; | |
4937 | uint16_t cnt; | |
4938 | struct qla_hw_data *ha = vha->hw; | |
4939 | ||
4940 | rval = QLA_SUCCESS; | |
4941 | icb = (struct init_cb_81xx *)ha->init_cb; | |
4942 | nv = ha->nvram; | |
4943 | ||
4944 | /* Determine NVRAM starting address. */ | |
4945 | ha->nvram_size = sizeof(struct nvram_81xx); | |
3a03eb79 | 4946 | ha->vpd_size = FA_NVRAM_VPD_SIZE; |
3a03eb79 AV |
4947 | |
4948 | /* Get VPD data into cache */ | |
4949 | ha->vpd = ha->nvram + VPD_OFFSET; | |
3d79038f AV |
4950 | ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, |
4951 | ha->vpd_size); | |
3a03eb79 AV |
4952 | |
4953 | /* Get NVRAM data into cache and calculate checksum. */ | |
3d79038f | 4954 | ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, |
3a03eb79 | 4955 | ha->nvram_size); |
3d79038f | 4956 | dptr = (uint32_t *)nv; |
3a03eb79 AV |
4957 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) |
4958 | chksum += le32_to_cpu(*dptr++); | |
4959 | ||
7640335e | 4960 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no)); |
3a03eb79 AV |
4961 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
4962 | ||
4963 | /* Bad NVRAM data, set defaults parameters. */ | |
4964 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
4965 | || nv->id[3] != ' ' || | |
4966 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
4967 | /* Reset NVRAM data. */ | |
4968 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
4969 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
4970 | le16_to_cpu(nv->nvram_version)); | |
4971 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " | |
4972 | "invalid -- WWPN) defaults.\n"); | |
4973 | ||
4974 | /* | |
4975 | * Set default initialization control block. | |
4976 | */ | |
4977 | memset(nv, 0, ha->nvram_size); | |
4978 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
4979 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
4980 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
4981 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
4982 | nv->exchange_count = __constant_cpu_to_le16(0); | |
4983 | nv->port_name[0] = 0x21; | |
e5b68a61 | 4984 | nv->port_name[1] = 0x00 + ha->port_no; |
3a03eb79 AV |
4985 | nv->port_name[2] = 0x00; |
4986 | nv->port_name[3] = 0xe0; | |
4987 | nv->port_name[4] = 0x8b; | |
4988 | nv->port_name[5] = 0x1c; | |
4989 | nv->port_name[6] = 0x55; | |
4990 | nv->port_name[7] = 0x86; | |
4991 | nv->node_name[0] = 0x20; | |
4992 | nv->node_name[1] = 0x00; | |
4993 | nv->node_name[2] = 0x00; | |
4994 | nv->node_name[3] = 0xe0; | |
4995 | nv->node_name[4] = 0x8b; | |
4996 | nv->node_name[5] = 0x1c; | |
4997 | nv->node_name[6] = 0x55; | |
4998 | nv->node_name[7] = 0x86; | |
4999 | nv->login_retry_count = __constant_cpu_to_le16(8); | |
5000 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
5001 | nv->login_timeout = __constant_cpu_to_le16(0); | |
5002 | nv->firmware_options_1 = | |
5003 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
5004 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
5005 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
5006 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
5007 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
5008 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
5009 | nv->reset_delay = 5; | |
5010 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
5011 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
5012 | nv->link_down_timeout = __constant_cpu_to_le16(30); | |
eeebcc92 | 5013 | nv->enode_mac[0] = 0x00; |
3a03eb79 AV |
5014 | nv->enode_mac[1] = 0x02; |
5015 | nv->enode_mac[2] = 0x03; | |
5016 | nv->enode_mac[3] = 0x04; | |
5017 | nv->enode_mac[4] = 0x05; | |
e5b68a61 | 5018 | nv->enode_mac[5] = 0x06 + ha->port_no; |
3a03eb79 AV |
5019 | |
5020 | rval = 1; | |
5021 | } | |
5022 | ||
5023 | /* Reset Initialization control block */ | |
5024 | memset(icb, 0, sizeof(struct init_cb_81xx)); | |
5025 | ||
5026 | /* Copy 1st segment. */ | |
5027 | dptr1 = (uint8_t *)icb; | |
5028 | dptr2 = (uint8_t *)&nv->version; | |
5029 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
5030 | while (cnt--) | |
5031 | *dptr1++ = *dptr2++; | |
5032 | ||
5033 | icb->login_retry_count = nv->login_retry_count; | |
5034 | ||
5035 | /* Copy 2nd segment. */ | |
5036 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
5037 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
5038 | cnt = (uint8_t *)&icb->reserved_5 - | |
5039 | (uint8_t *)&icb->interrupt_delay_timer; | |
5040 | while (cnt--) | |
5041 | *dptr1++ = *dptr2++; | |
5042 | ||
5043 | memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); | |
5044 | /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ | |
5045 | if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { | |
5046 | icb->enode_mac[0] = 0x01; | |
5047 | icb->enode_mac[1] = 0x02; | |
5048 | icb->enode_mac[2] = 0x03; | |
5049 | icb->enode_mac[3] = 0x04; | |
5050 | icb->enode_mac[4] = 0x05; | |
e5b68a61 | 5051 | icb->enode_mac[5] = 0x06 + ha->port_no; |
3a03eb79 AV |
5052 | } |
5053 | ||
b64b0e8f AV |
5054 | /* Use extended-initialization control block. */ |
5055 | memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); | |
5056 | ||
3a03eb79 AV |
5057 | /* |
5058 | * Setup driver NVRAM options. | |
5059 | */ | |
5060 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), | |
a9083016 | 5061 | "QLE8XXX"); |
3a03eb79 AV |
5062 | |
5063 | /* Use alternate WWN? */ | |
5064 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
5065 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
5066 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
5067 | } | |
5068 | ||
5069 | /* Prepare nodename */ | |
5070 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { | |
5071 | /* | |
5072 | * Firmware will apply the following mask if the nodename was | |
5073 | * not provided. | |
5074 | */ | |
5075 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
5076 | icb->node_name[0] &= 0xF0; | |
5077 | } | |
5078 | ||
5079 | /* Set host adapter parameters. */ | |
5080 | ha->flags.disable_risc_code_load = 0; | |
5081 | ha->flags.enable_lip_reset = 0; | |
5082 | ha->flags.enable_lip_full_login = | |
5083 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
5084 | ha->flags.enable_target_reset = | |
5085 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
5086 | ha->flags.enable_led_scheme = 0; | |
5087 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; | |
5088 | ||
5089 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & | |
5090 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
5091 | ||
5092 | /* save HBA serial number */ | |
5093 | ha->serial0 = icb->port_name[5]; | |
5094 | ha->serial1 = icb->port_name[6]; | |
5095 | ha->serial2 = icb->port_name[7]; | |
5096 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); | |
5097 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
5098 | ||
5099 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
5100 | ||
5101 | ha->retry_count = le16_to_cpu(nv->login_retry_count); | |
5102 | ||
5103 | /* Set minimum login_timeout to 4 seconds. */ | |
5104 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
5105 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
5106 | if (le16_to_cpu(nv->login_timeout) < 4) | |
5107 | nv->login_timeout = __constant_cpu_to_le16(4); | |
5108 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
5109 | icb->login_timeout = nv->login_timeout; | |
5110 | ||
5111 | /* Set minimum RATOV to 100 tenths of a second. */ | |
5112 | ha->r_a_tov = 100; | |
5113 | ||
5114 | ha->loop_reset_delay = nv->reset_delay; | |
5115 | ||
5116 | /* Link Down Timeout = 0: | |
5117 | * | |
5118 | * When Port Down timer expires we will start returning | |
5119 | * I/O's to OS with "DID_NO_CONNECT". | |
5120 | * | |
5121 | * Link Down Timeout != 0: | |
5122 | * | |
5123 | * The driver waits for the link to come up after link down | |
5124 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
5125 | */ | |
5126 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
5127 | ha->loop_down_abort_time = | |
5128 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
5129 | } else { | |
5130 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
5131 | ha->loop_down_abort_time = | |
5132 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
5133 | } | |
5134 | ||
5135 | /* Need enough time to try and get the port back. */ | |
5136 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
5137 | if (qlport_down_retry) | |
5138 | ha->port_down_retry_count = qlport_down_retry; | |
5139 | ||
5140 | /* Set login_retry_count */ | |
5141 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
5142 | if (ha->port_down_retry_count == | |
5143 | le16_to_cpu(nv->port_down_retry_count) && | |
5144 | ha->port_down_retry_count > 3) | |
5145 | ha->login_retry_count = ha->port_down_retry_count; | |
5146 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
5147 | ha->login_retry_count = ha->port_down_retry_count; | |
5148 | if (ql2xloginretrycount) | |
5149 | ha->login_retry_count = ql2xloginretrycount; | |
5150 | ||
5151 | /* Enable ZIO. */ | |
5152 | if (!vha->flags.init_done) { | |
5153 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & | |
5154 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
5155 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
5156 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
5157 | } | |
5158 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
5159 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
5160 | vha->flags.process_response_queue = 0; | |
5161 | if (ha->zio_mode != QLA_ZIO_DISABLED) { | |
5162 | ha->zio_mode = QLA_ZIO_MODE_6; | |
5163 | ||
5164 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay " | |
5165 | "(%d us).\n", vha->host_no, ha->zio_mode, | |
5166 | ha->zio_timer * 100)); | |
5167 | qla_printk(KERN_INFO, ha, | |
5168 | "ZIO mode %d enabled; timer delay (%d us).\n", | |
5169 | ha->zio_mode, ha->zio_timer * 100); | |
5170 | ||
5171 | icb->firmware_options_2 |= cpu_to_le32( | |
5172 | (uint32_t)ha->zio_mode); | |
5173 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
5174 | vha->flags.process_response_queue = 1; | |
5175 | } | |
5176 | ||
5177 | if (rval) { | |
5178 | DEBUG2_3(printk(KERN_WARNING | |
5179 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); | |
5180 | } | |
5181 | return (rval); | |
5182 | } | |
5183 | ||
a9083016 GM |
5184 | int |
5185 | qla82xx_restart_isp(scsi_qla_host_t *vha) | |
5186 | { | |
5187 | int status, rval; | |
5188 | uint32_t wait_time; | |
5189 | struct qla_hw_data *ha = vha->hw; | |
5190 | struct req_que *req = ha->req_q_map[0]; | |
5191 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
5192 | struct scsi_qla_host *vp; | |
5193 | struct scsi_qla_host *tvp; | |
5194 | ||
5195 | status = qla2x00_init_rings(vha); | |
5196 | if (!status) { | |
5197 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
5198 | ha->flags.chip_reset_done = 1; | |
5199 | ||
5200 | status = qla2x00_fw_ready(vha); | |
5201 | if (!status) { | |
5202 | qla_printk(KERN_INFO, ha, | |
5203 | "%s(): Start configure loop, " | |
5204 | "status = %d\n", __func__, status); | |
5205 | ||
5206 | /* Issue a marker after FW becomes ready. */ | |
5207 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); | |
5208 | ||
5209 | vha->flags.online = 1; | |
5210 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ | |
5211 | wait_time = 256; | |
5212 | do { | |
5213 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
5214 | qla2x00_configure_loop(vha); | |
5215 | wait_time--; | |
5216 | } while (!atomic_read(&vha->loop_down_timer) && | |
5217 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) && | |
5218 | wait_time && | |
5219 | (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))); | |
5220 | } | |
5221 | ||
5222 | /* if no cable then assume it's good */ | |
5223 | if ((vha->device_flags & DFLG_NO_CABLE)) | |
5224 | status = 0; | |
5225 | ||
5226 | qla_printk(KERN_INFO, ha, | |
5227 | "%s(): Configure loop done, status = 0x%x\n", | |
5228 | __func__, status); | |
5229 | } | |
5230 | ||
5231 | if (!status) { | |
5232 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
5233 | ||
5234 | if (!atomic_read(&vha->loop_down_timer)) { | |
5235 | /* | |
5236 | * Issue marker command only when we are going | |
5237 | * to start the I/O . | |
5238 | */ | |
5239 | vha->marker_needed = 1; | |
5240 | } | |
5241 | ||
5242 | vha->flags.online = 1; | |
5243 | ||
5244 | ha->isp_ops->enable_intrs(ha); | |
5245 | ||
5246 | ha->isp_abort_cnt = 0; | |
5247 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
5248 | ||
5249 | if (ha->fce) { | |
5250 | ha->flags.fce_enabled = 1; | |
5251 | memset(ha->fce, 0, | |
5252 | fce_calc_size(ha->fce_bufs)); | |
5253 | rval = qla2x00_enable_fce_trace(vha, | |
5254 | ha->fce_dma, ha->fce_bufs, ha->fce_mb, | |
5255 | &ha->fce_bufs); | |
5256 | if (rval) { | |
5257 | qla_printk(KERN_WARNING, ha, | |
5258 | "Unable to reinitialize FCE " | |
5259 | "(%d).\n", rval); | |
5260 | ha->flags.fce_enabled = 0; | |
5261 | } | |
5262 | } | |
5263 | ||
5264 | if (ha->eft) { | |
5265 | memset(ha->eft, 0, EFT_SIZE); | |
5266 | rval = qla2x00_enable_eft_trace(vha, | |
5267 | ha->eft_dma, EFT_NUM_BUFFERS); | |
5268 | if (rval) { | |
5269 | qla_printk(KERN_WARNING, ha, | |
5270 | "Unable to reinitialize EFT " | |
5271 | "(%d).\n", rval); | |
5272 | } | |
5273 | } | |
a9083016 GM |
5274 | } |
5275 | ||
5276 | if (!status) { | |
5277 | DEBUG(printk(KERN_INFO | |
5278 | "qla82xx_restart_isp(%ld): succeeded.\n", | |
5279 | vha->host_no)); | |
5280 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { | |
5281 | if (vp->vp_idx) | |
5282 | qla2x00_vp_abort_isp(vp); | |
5283 | } | |
5284 | } else { | |
5285 | qla_printk(KERN_INFO, ha, | |
5286 | "qla82xx_restart_isp: **** FAILED ****\n"); | |
5287 | } | |
5288 | ||
5289 | return status; | |
5290 | } | |
5291 | ||
3a03eb79 | 5292 | void |
ae97c91e | 5293 | qla81xx_update_fw_options(scsi_qla_host_t *vha) |
3a03eb79 | 5294 | { |
ae97c91e AV |
5295 | struct qla_hw_data *ha = vha->hw; |
5296 | ||
5297 | if (!ql2xetsenable) | |
5298 | return; | |
5299 | ||
5300 | /* Enable ETS Burst. */ | |
5301 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
5302 | ha->fw_options[2] |= BIT_9; | |
5303 | qla2x00_set_fw_options(vha, ha->fw_options); | |
3a03eb79 | 5304 | } |
09ff701a SR |
5305 | |
5306 | /* | |
5307 | * qla24xx_get_fcp_prio | |
5308 | * Gets the fcp cmd priority value for the logged in port. | |
5309 | * Looks for a match of the port descriptors within | |
5310 | * each of the fcp prio config entries. If a match is found, | |
5311 | * the tag (priority) value is returned. | |
5312 | * | |
5313 | * Input: | |
5314 | * ha = adapter block po | |
5315 | * fcport = port structure pointer. | |
5316 | * | |
5317 | * Return: | |
6c452a45 | 5318 | * non-zero (if found) |
09ff701a SR |
5319 | * 0 (if not found) |
5320 | * | |
5321 | * Context: | |
5322 | * Kernel context | |
5323 | */ | |
5324 | uint8_t | |
5325 | qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) | |
5326 | { | |
5327 | int i, entries; | |
5328 | uint8_t pid_match, wwn_match; | |
5329 | uint8_t priority; | |
5330 | uint32_t pid1, pid2; | |
5331 | uint64_t wwn1, wwn2; | |
5332 | struct qla_fcp_prio_entry *pri_entry; | |
5333 | struct qla_hw_data *ha = vha->hw; | |
5334 | ||
5335 | if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) | |
5336 | return 0; | |
5337 | ||
5338 | priority = 0; | |
5339 | entries = ha->fcp_prio_cfg->num_entries; | |
5340 | pri_entry = &ha->fcp_prio_cfg->entry[0]; | |
5341 | ||
5342 | for (i = 0; i < entries; i++) { | |
5343 | pid_match = wwn_match = 0; | |
5344 | ||
5345 | if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { | |
5346 | pri_entry++; | |
5347 | continue; | |
5348 | } | |
5349 | ||
5350 | /* check source pid for a match */ | |
5351 | if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { | |
5352 | pid1 = pri_entry->src_pid & INVALID_PORT_ID; | |
5353 | pid2 = vha->d_id.b24 & INVALID_PORT_ID; | |
5354 | if (pid1 == INVALID_PORT_ID) | |
5355 | pid_match++; | |
5356 | else if (pid1 == pid2) | |
5357 | pid_match++; | |
5358 | } | |
5359 | ||
5360 | /* check destination pid for a match */ | |
5361 | if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { | |
5362 | pid1 = pri_entry->dst_pid & INVALID_PORT_ID; | |
5363 | pid2 = fcport->d_id.b24 & INVALID_PORT_ID; | |
5364 | if (pid1 == INVALID_PORT_ID) | |
5365 | pid_match++; | |
5366 | else if (pid1 == pid2) | |
5367 | pid_match++; | |
5368 | } | |
5369 | ||
5370 | /* check source WWN for a match */ | |
5371 | if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { | |
5372 | wwn1 = wwn_to_u64(vha->port_name); | |
5373 | wwn2 = wwn_to_u64(pri_entry->src_wwpn); | |
5374 | if (wwn2 == (uint64_t)-1) | |
5375 | wwn_match++; | |
5376 | else if (wwn1 == wwn2) | |
5377 | wwn_match++; | |
5378 | } | |
5379 | ||
5380 | /* check destination WWN for a match */ | |
5381 | if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { | |
5382 | wwn1 = wwn_to_u64(fcport->port_name); | |
5383 | wwn2 = wwn_to_u64(pri_entry->dst_wwpn); | |
5384 | if (wwn2 == (uint64_t)-1) | |
5385 | wwn_match++; | |
5386 | else if (wwn1 == wwn2) | |
5387 | wwn_match++; | |
5388 | } | |
5389 | ||
5390 | if (pid_match == 2 || wwn_match == 2) { | |
5391 | /* Found a matching entry */ | |
5392 | if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) | |
5393 | priority = pri_entry->tag; | |
5394 | break; | |
5395 | } | |
5396 | ||
5397 | pri_entry++; | |
5398 | } | |
5399 | ||
5400 | return priority; | |
5401 | } | |
5402 | ||
5403 | /* | |
5404 | * qla24xx_update_fcport_fcp_prio | |
5405 | * Activates fcp priority for the logged in fc port | |
5406 | * | |
5407 | * Input: | |
5408 | * ha = adapter block pointer. | |
5409 | * fcp = port structure pointer. | |
5410 | * | |
5411 | * Return: | |
5412 | * QLA_SUCCESS or QLA_FUNCTION_FAILED | |
5413 | * | |
5414 | * Context: | |
5415 | * Kernel context. | |
5416 | */ | |
5417 | int | |
5418 | qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *ha, fc_port_t *fcport) | |
5419 | { | |
5420 | int ret; | |
5421 | uint8_t priority; | |
5422 | uint16_t mb[5]; | |
5423 | ||
5424 | if (atomic_read(&fcport->state) == FCS_UNCONFIGURED || | |
5425 | fcport->port_type != FCT_TARGET || | |
5426 | fcport->loop_id == FC_NO_LOOP_ID) | |
5427 | return QLA_FUNCTION_FAILED; | |
5428 | ||
5429 | priority = qla24xx_get_fcp_prio(ha, fcport); | |
5430 | ret = qla24xx_set_fcp_prio(ha, fcport->loop_id, priority, mb); | |
5431 | if (ret == QLA_SUCCESS) | |
5432 | fcport->fcp_prio = priority; | |
5433 | else | |
5434 | DEBUG2(printk(KERN_WARNING | |
5435 | "scsi(%ld): Unable to activate fcp priority, " | |
5436 | " ret=0x%x\n", ha->host_no, ret)); | |
5437 | ||
5438 | return ret; | |
5439 | } | |
5440 | ||
5441 | /* | |
5442 | * qla24xx_update_all_fcp_prio | |
5443 | * Activates fcp priority for all the logged in ports | |
5444 | * | |
5445 | * Input: | |
5446 | * ha = adapter block pointer. | |
5447 | * | |
5448 | * Return: | |
5449 | * QLA_SUCCESS or QLA_FUNCTION_FAILED | |
5450 | * | |
5451 | * Context: | |
5452 | * Kernel context. | |
5453 | */ | |
5454 | int | |
5455 | qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) | |
5456 | { | |
5457 | int ret; | |
5458 | fc_port_t *fcport; | |
5459 | ||
5460 | ret = QLA_FUNCTION_FAILED; | |
5461 | /* We need to set priority for all logged in ports */ | |
5462 | list_for_each_entry(fcport, &vha->vp_fcports, list) | |
5463 | ret = qla24xx_update_fcport_fcp_prio(vha, fcport); | |
5464 | ||
5465 | return ret; | |
5466 | } |