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qla2xxx: added sess generations to detect RSCN update races
[mirror_ubuntu-zesty-kernel.git] / drivers / scsi / qla2xxx / qla_init.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
bd21eaf9 3 * Copyright (c) 2003-2014 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
73208dfd 8#include "qla_gbl.h"
1da177e4
LT		 9
10#include <linux/delay.h>
5a0e3ad6 11#include <linux/slab.h>
0107109e 12#include <linux/vmalloc.h>
1da177e4
LT		 13
14#include "qla_devtbl.h"
15
4e08df3f
DM		 16#ifdef CONFIG_SPARC
17#include <asm/prom.h>
4e08df3f
DM		 18#endif
19
2d70c103
NB		 20#include <target/target_core_base.h>
21#include "qla_target.h"
22
1da177e4
LT		 23/*
24* QLogic ISP2x00 Hardware Support Function Prototypes.
25*/
1da177e4 26static int qla2x00_isp_firmware(scsi_qla_host_t *);
1da177e4 27static int qla2x00_setup_chip(scsi_qla_host_t *);
1da177e4
LT		 28static int qla2x00_fw_ready(scsi_qla_host_t *);
29static int qla2x00_configure_hba(scsi_qla_host_t *);
1da177e4
LT		 30static int qla2x00_configure_loop(scsi_qla_host_t *);
31static int qla2x00_configure_local_loop(scsi_qla_host_t *);
1da177e4
LT		 32static int qla2x00_configure_fabric(scsi_qla_host_t *);
33static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
1da177e4
LT		 34static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
35 uint16_t *);
1da177e4
LT		 36
37static int qla2x00_restart_isp(scsi_qla_host_t *);
1da177e4 38
4d4df193
HK		 39static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
40static int qla84xx_init_chip(scsi_qla_host_t *);
73208dfd 41static int qla25xx_init_queues(struct qla_hw_data *);
4d4df193 42
ac280b67
AV		 43/* SRB Extensions ---------------------------------------------------------- */
44
9ba56b95
GM		 45void
46qla2x00_sp_timeout(unsigned long __data)
ac280b67
AV		 47{
48 srb_t *sp = (srb_t *)__data;
4916392b 49 struct srb_iocb *iocb;
ac280b67
AV		 50 fc_port_t *fcport = sp->fcport;
51 struct qla_hw_data *ha = fcport->vha->hw;
52 struct req_que *req;
53 unsigned long flags;
54
55 spin_lock_irqsave(&ha->hardware_lock, flags);
56 req = ha->req_q_map[0];
57 req->outstanding_cmds[sp->handle] = NULL;
9ba56b95 58 iocb = &sp->u.iocb_cmd;
4916392b 59 iocb->timeout(sp);
9ba56b95 60 sp->free(fcport->vha, sp);
6ac52608 61 spin_unlock_irqrestore(&ha->hardware_lock, flags);
ac280b67
AV		 62}
63
9ba56b95
GM		 64void
65qla2x00_sp_free(void *data, void *ptr)
ac280b67 66{
9ba56b95
GM		 67 srb_t *sp = (srb_t *)ptr;
68 struct srb_iocb *iocb = &sp->u.iocb_cmd;
69 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
ac280b67 70
4d97cc53 71 del_timer(&iocb->timer);
b00ee7d7 72 qla2x00_rel_sp(vha, sp);
ac280b67
AV		 73}
74
ac280b67
AV		 75/* Asynchronous Login/Logout Routines -------------------------------------- */
76
a9b6f722 77unsigned long
5b91490e
AV		 78qla2x00_get_async_timeout(struct scsi_qla_host *vha)
79{
80 unsigned long tmo;
81 struct qla_hw_data *ha = vha->hw;
82
83 /* Firmware should use switch negotiated r_a_tov for timeout. */
84 tmo = ha->r_a_tov / 10 * 2;
8ae6d9c7
GM		 85 if (IS_QLAFX00(ha)) {
86 tmo = FX00_DEF_RATOV * 2;
87 } else if (!IS_FWI2_CAPABLE(ha)) {
5b91490e
AV		 88 /*
89 * Except for earlier ISPs where the timeout is seeded from the
90 * initialization control block.
91 */
92 tmo = ha->login_timeout;
93 }
94 return tmo;
95}
ac280b67
AV		 96
97static void
9ba56b95 98qla2x00_async_iocb_timeout(void *data)
ac280b67 99{
9ba56b95 100 srb_t *sp = (srb_t *)data;
ac280b67 101 fc_port_t *fcport = sp->fcport;
ac280b67 102
7c3df132 103 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
cfb0919c 104 "Async-%s timeout - hdl=%x portid=%02x%02x%02x.\n",
9ba56b95 105 sp->name, sp->handle, fcport->d_id.b.domain, fcport->d_id.b.area,
7c3df132 106 fcport->d_id.b.al_pa);
ac280b67 107
5ff1d584 108 fcport->flags &= ~FCF_ASYNC_SENT;
9ba56b95
GM		 109 if (sp->type == SRB_LOGIN_CMD) {
110 struct srb_iocb *lio = &sp->u.iocb_cmd;
ac280b67 111 qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
6ac52608
AV		 112 /* Retry as needed. */
113 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
114 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
115 QLA_LOGIO_LOGIN_RETRIED : 0;
116 qla2x00_post_async_login_done_work(fcport->vha, fcport,
117 lio->u.logio.data);
a6ca8878
AP		 118 } else if (sp->type == SRB_LOGOUT_CMD) {
119 qlt_logo_completion_handler(fcport, QLA_FUNCTION_TIMEOUT);
6ac52608 120 }
ac280b67
AV		 121}
122
99b0bec7 123static void
9ba56b95 124qla2x00_async_login_sp_done(void *data, void *ptr, int res)
99b0bec7 125{
9ba56b95
GM		 126 srb_t *sp = (srb_t *)ptr;
127 struct srb_iocb *lio = &sp->u.iocb_cmd;
128 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
129
130 if (!test_bit(UNLOADING, &vha->dpc_flags))
131 qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
132 lio->u.logio.data);
133 sp->free(sp->fcport->vha, sp);
99b0bec7
AV		 134}
135
ac280b67
AV		 136int
137qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
138 uint16_t *data)
139{
ac280b67 140 srb_t *sp;
4916392b 141 struct srb_iocb *lio;
ac280b67
AV		 142 int rval;
143
144 rval = QLA_FUNCTION_FAILED;
9ba56b95 145 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
ac280b67
AV		 146 if (!sp)
147 goto done;
148
9ba56b95
GM		 149 sp->type = SRB_LOGIN_CMD;
150 sp->name = "login";
151 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
152
153 lio = &sp->u.iocb_cmd;
3822263e 154 lio->timeout = qla2x00_async_iocb_timeout;
9ba56b95 155 sp->done = qla2x00_async_login_sp_done;
4916392b 156 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
ac280b67 157 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
4916392b 158 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
ac280b67
AV		 159 rval = qla2x00_start_sp(sp);
160 if (rval != QLA_SUCCESS)
161 goto done_free_sp;
162
7c3df132 163 ql_dbg(ql_dbg_disc, vha, 0x2072,
cfb0919c
CD		 164 "Async-login - hdl=%x, loopid=%x portid=%02x%02x%02x "
165 "retries=%d.\n", sp->handle, fcport->loop_id,
166 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
167 fcport->login_retry);
ac280b67
AV		 168 return rval;
169
170done_free_sp:
9ba56b95 171 sp->free(fcport->vha, sp);
ac280b67
AV		 172done:
173 return rval;
174}
175
99b0bec7 176static void
9ba56b95 177qla2x00_async_logout_sp_done(void *data, void *ptr, int res)
99b0bec7 178{
9ba56b95
GM		 179 srb_t *sp = (srb_t *)ptr;
180 struct srb_iocb *lio = &sp->u.iocb_cmd;
181 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
182
183 if (!test_bit(UNLOADING, &vha->dpc_flags))
184 qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
185 lio->u.logio.data);
186 sp->free(sp->fcport->vha, sp);
99b0bec7
AV		 187}
188
ac280b67
AV		 189int
190qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
191{
ac280b67 192 srb_t *sp;
4916392b 193 struct srb_iocb *lio;
ac280b67
AV		 194 int rval;
195
196 rval = QLA_FUNCTION_FAILED;
9ba56b95 197 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
ac280b67
AV		 198 if (!sp)
199 goto done;
200
9ba56b95
GM		 201 sp->type = SRB_LOGOUT_CMD;
202 sp->name = "logout";
203 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
204
205 lio = &sp->u.iocb_cmd;
3822263e 206 lio->timeout = qla2x00_async_iocb_timeout;
9ba56b95 207 sp->done = qla2x00_async_logout_sp_done;
ac280b67
AV		 208 rval = qla2x00_start_sp(sp);
209 if (rval != QLA_SUCCESS)
210 goto done_free_sp;
211
7c3df132 212 ql_dbg(ql_dbg_disc, vha, 0x2070,
cfb0919c
CD		 213 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
214 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
215 fcport->d_id.b.area, fcport->d_id.b.al_pa);
ac280b67
AV		 216 return rval;
217
218done_free_sp:
9ba56b95 219 sp->free(fcport->vha, sp);
ac280b67
AV		 220done:
221 return rval;
222}
223
5ff1d584 224static void
9ba56b95 225qla2x00_async_adisc_sp_done(void *data, void *ptr, int res)
5ff1d584 226{
9ba56b95
GM		 227 srb_t *sp = (srb_t *)ptr;
228 struct srb_iocb *lio = &sp->u.iocb_cmd;
229 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
230
231 if (!test_bit(UNLOADING, &vha->dpc_flags))
232 qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
233 lio->u.logio.data);
234 sp->free(sp->fcport->vha, sp);
5ff1d584
AV		 235}
236
237int
238qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
239 uint16_t *data)
240{
5ff1d584 241 srb_t *sp;
4916392b 242 struct srb_iocb *lio;
5ff1d584
AV		 243 int rval;
244
245 rval = QLA_FUNCTION_FAILED;
9ba56b95 246 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
5ff1d584
AV		 247 if (!sp)
248 goto done;
249
9ba56b95
GM		 250 sp->type = SRB_ADISC_CMD;
251 sp->name = "adisc";
252 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
253
254 lio = &sp->u.iocb_cmd;
3822263e 255 lio->timeout = qla2x00_async_iocb_timeout;
9ba56b95 256 sp->done = qla2x00_async_adisc_sp_done;
5ff1d584 257 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
4916392b 258 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
5ff1d584
AV		 259 rval = qla2x00_start_sp(sp);
260 if (rval != QLA_SUCCESS)
261 goto done_free_sp;
262
7c3df132 263 ql_dbg(ql_dbg_disc, vha, 0x206f,
cfb0919c
CD		 264 "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n",
265 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
266 fcport->d_id.b.area, fcport->d_id.b.al_pa);
5ff1d584
AV		 267 return rval;
268
269done_free_sp:
9ba56b95 270 sp->free(fcport->vha, sp);
5ff1d584
AV		 271done:
272 return rval;
273}
274
3822263e 275static void
faef62d1 276qla2x00_tmf_iocb_timeout(void *data)
3822263e 277{
faef62d1
AB		 278 srb_t *sp = (srb_t *)data;
279 struct srb_iocb *tmf = &sp->u.iocb_cmd;
3822263e 280
faef62d1
AB		 281 tmf->u.tmf.comp_status = CS_TIMEOUT;
282 complete(&tmf->u.tmf.comp);
283}
9ba56b95 284
faef62d1
AB		 285static void
286qla2x00_tmf_sp_done(void *data, void *ptr, int res)
287{
288 srb_t *sp = (srb_t *)ptr;
289 struct srb_iocb *tmf = &sp->u.iocb_cmd;
290 complete(&tmf->u.tmf.comp);
3822263e
MI		 291}
292
293int
faef62d1 294qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
3822263e
MI		 295 uint32_t tag)
296{
297 struct scsi_qla_host *vha = fcport->vha;
faef62d1 298 struct srb_iocb *tm_iocb;
3822263e 299 srb_t *sp;
faef62d1 300 int rval = QLA_FUNCTION_FAILED;
3822263e 301
9ba56b95 302 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
3822263e
MI		 303 if (!sp)
304 goto done;
305
faef62d1 306 tm_iocb = &sp->u.iocb_cmd;
9ba56b95
GM		 307 sp->type = SRB_TM_CMD;
308 sp->name = "tmf";
faef62d1
AB		 309 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
310 tm_iocb->u.tmf.flags = flags;
311 tm_iocb->u.tmf.lun = lun;
312 tm_iocb->u.tmf.data = tag;
313 sp->done = qla2x00_tmf_sp_done;
314 tm_iocb->timeout = qla2x00_tmf_iocb_timeout;
315 init_completion(&tm_iocb->u.tmf.comp);
3822263e
MI		 316
317 rval = qla2x00_start_sp(sp);
318 if (rval != QLA_SUCCESS)
319 goto done_free_sp;
320
7c3df132 321 ql_dbg(ql_dbg_taskm, vha, 0x802f,
cfb0919c
CD		 322 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
323 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
324 fcport->d_id.b.area, fcport->d_id.b.al_pa);
faef62d1
AB		 325
326 wait_for_completion(&tm_iocb->u.tmf.comp);
327
328 rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ?
329 QLA_SUCCESS : QLA_FUNCTION_FAILED;
330
331 if ((rval != QLA_SUCCESS) || tm_iocb->u.tmf.data) {
332 ql_dbg(ql_dbg_taskm, vha, 0x8030,
333 "TM IOCB failed (%x).\n", rval);
334 }
335
336 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
337 flags = tm_iocb->u.tmf.flags;
338 lun = (uint16_t)tm_iocb->u.tmf.lun;
339
340 /* Issue Marker IOCB */
341 qla2x00_marker(vha, vha->hw->req_q_map[0],
342 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun,
343 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
344 }
3822263e
MI		 345
346done_free_sp:
faef62d1 347 sp->free(vha, sp);
3822263e
MI		 348done:
349 return rval;
350}
351
4440e46d
AB		 352static void
353qla24xx_abort_iocb_timeout(void *data)
354{
355 srb_t *sp = (srb_t *)data;
356 struct srb_iocb *abt = &sp->u.iocb_cmd;
357
358 abt->u.abt.comp_status = CS_TIMEOUT;
359 complete(&abt->u.abt.comp);
360}
361
362static void
363qla24xx_abort_sp_done(void *data, void *ptr, int res)
364{
365 srb_t *sp = (srb_t *)ptr;
366 struct srb_iocb *abt = &sp->u.iocb_cmd;
367
368 complete(&abt->u.abt.comp);
369}
370
371static int
372qla24xx_async_abort_cmd(srb_t *cmd_sp)
373{
374 scsi_qla_host_t *vha = cmd_sp->fcport->vha;
375 fc_port_t *fcport = cmd_sp->fcport;
376 struct srb_iocb *abt_iocb;
377 srb_t *sp;
378 int rval = QLA_FUNCTION_FAILED;
379
380 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
381 if (!sp)
382 goto done;
383
384 abt_iocb = &sp->u.iocb_cmd;
385 sp->type = SRB_ABT_CMD;
386 sp->name = "abort";
387 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
388 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
389 sp->done = qla24xx_abort_sp_done;
390 abt_iocb->timeout = qla24xx_abort_iocb_timeout;
391 init_completion(&abt_iocb->u.abt.comp);
392
393 rval = qla2x00_start_sp(sp);
394 if (rval != QLA_SUCCESS)
395 goto done_free_sp;
396
397 ql_dbg(ql_dbg_async, vha, 0x507c,
398 "Abort command issued - hdl=%x, target_id=%x\n",
399 cmd_sp->handle, fcport->tgt_id);
400
401 wait_for_completion(&abt_iocb->u.abt.comp);
402
403 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
404 QLA_SUCCESS : QLA_FUNCTION_FAILED;
405
406done_free_sp:
407 sp->free(vha, sp);
408done:
409 return rval;
410}
411
412int
413qla24xx_async_abort_command(srb_t *sp)
414{
415 unsigned long flags = 0;
416
417 uint32_t handle;
418 fc_port_t *fcport = sp->fcport;
419 struct scsi_qla_host *vha = fcport->vha;
420 struct qla_hw_data *ha = vha->hw;
421 struct req_que *req = vha->req;
422
423 spin_lock_irqsave(&ha->hardware_lock, flags);
424 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
425 if (req->outstanding_cmds[handle] == sp)
426 break;
427 }
428 spin_unlock_irqrestore(&ha->hardware_lock, flags);
429 if (handle == req->num_outstanding_cmds) {
430 /* Command not found. */
431 return QLA_FUNCTION_FAILED;
432 }
433 if (sp->type == SRB_FXIOCB_DCMD)
434 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
435 FXDISC_ABORT_IOCTL);
436
437 return qla24xx_async_abort_cmd(sp);
438}
439
4916392b 440void
ac280b67
AV		 441qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
442 uint16_t *data)
443{
444 int rval;
ac280b67
AV		 445
446 switch (data[0]) {
447 case MBS_COMMAND_COMPLETE:
a4f92a32
AV		 448 /*
449 * Driver must validate login state - If PRLI not complete,
450 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
451 * requests.
452 */
453 rval = qla2x00_get_port_database(vha, fcport, 0);
0eba25df
AE		 454 if (rval == QLA_NOT_LOGGED_IN) {
455 fcport->flags &= ~FCF_ASYNC_SENT;
456 fcport->flags |= FCF_LOGIN_NEEDED;
457 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
458 break;
459 }
460
a4f92a32
AV		 461 if (rval != QLA_SUCCESS) {
462 qla2x00_post_async_logout_work(vha, fcport, NULL);
463 qla2x00_post_async_login_work(vha, fcport, NULL);
464 break;
465 }
99b0bec7 466 if (fcport->flags & FCF_FCP2_DEVICE) {
5ff1d584
AV		 467 qla2x00_post_async_adisc_work(vha, fcport, data);
468 break;
99b0bec7
AV		 469 }
470 qla2x00_update_fcport(vha, fcport);
ac280b67
AV		 471 break;
472 case MBS_COMMAND_ERROR:
5ff1d584 473 fcport->flags &= ~FCF_ASYNC_SENT;
ac280b67
AV		 474 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
475 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
476 else
80d79440 477 qla2x00_mark_device_lost(vha, fcport, 1, 0);
ac280b67
AV		 478 break;
479 case MBS_PORT_ID_USED:
480 fcport->loop_id = data[1];
6ac52608 481 qla2x00_post_async_logout_work(vha, fcport, NULL);
ac280b67
AV		 482 qla2x00_post_async_login_work(vha, fcport, NULL);
483 break;
484 case MBS_LOOP_ID_USED:
485 fcport->loop_id++;
486 rval = qla2x00_find_new_loop_id(vha, fcport);
487 if (rval != QLA_SUCCESS) {
5ff1d584 488 fcport->flags &= ~FCF_ASYNC_SENT;
80d79440 489 qla2x00_mark_device_lost(vha, fcport, 1, 0);
ac280b67
AV		 490 break;
491 }
492 qla2x00_post_async_login_work(vha, fcport, NULL);
493 break;
494 }
4916392b 495 return;
ac280b67
AV		 496}
497
4916392b 498void
ac280b67
AV		 499qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
500 uint16_t *data)
501{
a6ca8878
AP		 502 /* Don't re-login in target mode */
503 if (!fcport->tgt_session)
504 qla2x00_mark_device_lost(vha, fcport, 1, 0);
505 qlt_logo_completion_handler(fcport, data[0]);
4916392b 506 return;
ac280b67
AV		 507}
508
4916392b 509void
5ff1d584
AV		 510qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
511 uint16_t *data)
512{
513 if (data[0] == MBS_COMMAND_COMPLETE) {
514 qla2x00_update_fcport(vha, fcport);
515
4916392b 516 return;
5ff1d584
AV		 517 }
518
519 /* Retry login. */
520 fcport->flags &= ~FCF_ASYNC_SENT;
521 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
522 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
523 else
80d79440 524 qla2x00_mark_device_lost(vha, fcport, 1, 0);
5ff1d584 525
4916392b 526 return;
5ff1d584
AV		 527}
528
1da177e4
LT		 529/****************************************************************************/
530/* QLogic ISP2x00 Hardware Support Functions. */
531/****************************************************************************/
532
fa492630 533static int
7d613ac6
SV		 534qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
535{
536 int rval = QLA_SUCCESS;
537 struct qla_hw_data *ha = vha->hw;
538 uint32_t idc_major_ver, idc_minor_ver;
711aa7f7 539 uint16_t config[4];
7d613ac6
SV		 540
541 qla83xx_idc_lock(vha, 0);
542
543 /* SV: TODO: Assign initialization timeout from
544 * flash-info / other param
545 */
546 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
547 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
548
549 /* Set our fcoe function presence */
550 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
551 ql_dbg(ql_dbg_p3p, vha, 0xb077,
552 "Error while setting DRV-Presence.\n");
553 rval = QLA_FUNCTION_FAILED;
554 goto exit;
555 }
556
557 /* Decide the reset ownership */
558 qla83xx_reset_ownership(vha);
559
560 /*
561 * On first protocol driver load:
562 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
563 * register.
564 * Others: Check compatibility with current IDC Major version.
565 */
566 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
567 if (ha->flags.nic_core_reset_owner) {
568 /* Set IDC Major version */
569 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
570 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
571
572 /* Clearing IDC-Lock-Recovery register */
573 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
574 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
575 /*
576 * Clear further IDC participation if we are not compatible with
577 * the current IDC Major Version.
578 */
579 ql_log(ql_log_warn, vha, 0xb07d,
580 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
581 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
582 __qla83xx_clear_drv_presence(vha);
583 rval = QLA_FUNCTION_FAILED;
584 goto exit;
585 }
586 /* Each function sets its supported Minor version. */
587 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
588 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
589 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
590
711aa7f7
SK		 591 if (ha->flags.nic_core_reset_owner) {
592 memset(config, 0, sizeof(config));
593 if (!qla81xx_get_port_config(vha, config))
594 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
595 QLA8XXX_DEV_READY);
596 }
597
7d613ac6
SV		 598 rval = qla83xx_idc_state_handler(vha);
599
600exit:
601 qla83xx_idc_unlock(vha, 0);
602
603 return rval;
604}
605
1da177e4
LT		 606/*
607* qla2x00_initialize_adapter
608* Initialize board.
609*
610* Input:
611* ha = adapter block pointer.
612*
613* Returns:
614* 0 = success
615*/
616int
e315cd28 617qla2x00_initialize_adapter(scsi_qla_host_t *vha)
1da177e4
LT		 618{
619 int rval;
e315cd28 620 struct qla_hw_data *ha = vha->hw;
73208dfd 621 struct req_que *req = ha->req_q_map[0];
2533cf67 622
1da177e4 623 /* Clear adapter flags. */
e315cd28 624 vha->flags.online = 0;
2533cf67 625 ha->flags.chip_reset_done = 0;
e315cd28 626 vha->flags.reset_active = 0;
85880801
AV		 627 ha->flags.pci_channel_io_perm_failure = 0;
628 ha->flags.eeh_busy = 0;
fabbb8df 629 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
e315cd28
AC		 630 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
631 atomic_set(&vha->loop_state, LOOP_DOWN);
632 vha->device_flags = DFLG_NO_CABLE;
633 vha->dpc_flags = 0;
634 vha->flags.management_server_logged_in = 0;
635 vha->marker_needed = 0;
1da177e4
LT		 636 ha->isp_abort_cnt = 0;
637 ha->beacon_blink_led = 0;
638
73208dfd
AC		 639 set_bit(0, ha->req_qid_map);
640 set_bit(0, ha->rsp_qid_map);
641
cfb0919c 642 ql_dbg(ql_dbg_init, vha, 0x0040,
7c3df132 643 "Configuring PCI space...\n");
e315cd28 644 rval = ha->isp_ops->pci_config(vha);
1da177e4 645 if (rval) {
7c3df132
SK		 646 ql_log(ql_log_warn, vha, 0x0044,
647 "Unable to configure PCI space.\n");
1da177e4
LT		 648 return (rval);
649 }
650
e315cd28 651 ha->isp_ops->reset_chip(vha);
1da177e4 652
e315cd28 653 rval = qla2xxx_get_flash_info(vha);
c00d8994 654 if (rval) {
7c3df132
SK		 655 ql_log(ql_log_fatal, vha, 0x004f,
656 "Unable to validate FLASH data.\n");
7ec0effd
AD		 657 return rval;
658 }
659
660 if (IS_QLA8044(ha)) {
661 qla8044_read_reset_template(vha);
662
663 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
664 * If DONRESET_BIT0 is set, drivers should not set dev_state
665 * to NEED_RESET. But if NEED_RESET is set, drivers should
666 * should honor the reset. */
667 if (ql2xdontresethba == 1)
668 qla8044_set_idc_dontreset(vha);
c00d8994
AV		 669 }
670
73208dfd 671 ha->isp_ops->get_flash_version(vha, req->ring);
cfb0919c 672 ql_dbg(ql_dbg_init, vha, 0x0061,
7c3df132 673 "Configure NVRAM parameters...\n");
0107109e 674
e315cd28 675 ha->isp_ops->nvram_config(vha);
1da177e4 676
d4c760c2
AV		 677 if (ha->flags.disable_serdes) {
678 /* Mask HBA via NVRAM settings? */
7c3df132 679 ql_log(ql_log_info, vha, 0x0077,
7b833558 680 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
d4c760c2
AV		 681 return QLA_FUNCTION_FAILED;
682 }
683
cfb0919c 684 ql_dbg(ql_dbg_init, vha, 0x0078,
7c3df132 685 "Verifying loaded RISC code...\n");
1da177e4 686
e315cd28
AC		 687 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
688 rval = ha->isp_ops->chip_diag(vha);
d19044c3
AV		 689 if (rval)
690 return (rval);
e315cd28 691 rval = qla2x00_setup_chip(vha);
d19044c3
AV		 692 if (rval)
693 return (rval);
1da177e4 694 }
a9083016 695
4d4df193 696 if (IS_QLA84XX(ha)) {
e315cd28 697 ha->cs84xx = qla84xx_get_chip(vha);
4d4df193 698 if (!ha->cs84xx) {
7c3df132 699 ql_log(ql_log_warn, vha, 0x00d0,
4d4df193
HK		 700 "Unable to configure ISP84XX.\n");
701 return QLA_FUNCTION_FAILED;
702 }
703 }
2d70c103
NB		 704
705 if (qla_ini_mode_enabled(vha))
706 rval = qla2x00_init_rings(vha);
707
2533cf67 708 ha->flags.chip_reset_done = 1;
1da177e4 709
9a069e19 710 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
6c452a45 711 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
9a069e19
GM		 712 rval = qla84xx_init_chip(vha);
713 if (rval != QLA_SUCCESS) {
7c3df132
SK		 714 ql_log(ql_log_warn, vha, 0x00d4,
715 "Unable to initialize ISP84XX.\n");
8d2b21db 716 qla84xx_put_chip(vha);
9a069e19
GM		 717 }
718 }
719
7d613ac6
SV		 720 /* Load the NIC Core f/w if we are the first protocol driver. */
721 if (IS_QLA8031(ha)) {
722 rval = qla83xx_nic_core_fw_load(vha);
723 if (rval)
724 ql_log(ql_log_warn, vha, 0x0124,
725 "Error in initializing NIC Core f/w.\n");
726 }
727
2f0f3f4f
MI		 728 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
729 qla24xx_read_fcp_prio_cfg(vha);
09ff701a 730
c46e65c7
JC		 731 if (IS_P3P_TYPE(ha))
732 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
733 else
734 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
735
1da177e4
LT		 736 return (rval);
737}
738
739/**
abbd8870 740 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
1da177e4
LT		 741 * @ha: HA context
742 *
743 * Returns 0 on success.
744 */
abbd8870 745int
e315cd28 746qla2100_pci_config(scsi_qla_host_t *vha)
1da177e4 747{
a157b101 748 uint16_t w;
abbd8870 749 unsigned long flags;
e315cd28 750 struct qla_hw_data *ha = vha->hw;
3d71644c 751 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 752
1da177e4 753 pci_set_master(ha->pdev);
af6177d8 754 pci_try_set_mwi(ha->pdev);
1da177e4 755
1da177e4 756 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 757 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
abbd8870
AV		 758 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
759
737faece 760 pci_disable_rom(ha->pdev);
1da177e4
LT		 761
762 /* Get PCI bus information. */
763 spin_lock_irqsave(&ha->hardware_lock, flags);
3d71644c 764 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
1da177e4
LT		 765 spin_unlock_irqrestore(&ha->hardware_lock, flags);
766
abbd8870
AV		 767 return QLA_SUCCESS;
768}
1da177e4 769
abbd8870
AV		 770/**
771 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
772 * @ha: HA context
773 *
774 * Returns 0 on success.
775 */
776int
e315cd28 777qla2300_pci_config(scsi_qla_host_t *vha)
abbd8870 778{
a157b101 779 uint16_t w;
abbd8870
AV		 780 unsigned long flags = 0;
781 uint32_t cnt;
e315cd28 782 struct qla_hw_data *ha = vha->hw;
3d71644c 783 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 784
abbd8870 785 pci_set_master(ha->pdev);
af6177d8 786 pci_try_set_mwi(ha->pdev);
1da177e4 787
abbd8870 788 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 789 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
1da177e4 790
abbd8870
AV		 791 if (IS_QLA2322(ha) || IS_QLA6322(ha))
792 w &= ~PCI_COMMAND_INTX_DISABLE;
a157b101 793 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
1da177e4 794
abbd8870
AV		 795 /*
796 * If this is a 2300 card and not 2312, reset the
797 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
798 * the 2310 also reports itself as a 2300 so we need to get the
799 * fb revision level -- a 6 indicates it really is a 2300 and
800 * not a 2310.
801 */
802 if (IS_QLA2300(ha)) {
803 spin_lock_irqsave(&ha->hardware_lock, flags);
1da177e4 804
abbd8870 805 /* Pause RISC. */
3d71644c 806 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
abbd8870 807 for (cnt = 0; cnt < 30000; cnt++) {
3d71644c 808 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
abbd8870 809 break;
1da177e4 810
abbd8870
AV		 811 udelay(10);
812 }
1da177e4 813
abbd8870 814 /* Select FPM registers. */
3d71644c
AV		 815 WRT_REG_WORD(&reg->ctrl_status, 0x20);
816 RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 817
818 /* Get the fb rev level */
3d71644c 819 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
abbd8870
AV		 820
821 if (ha->fb_rev == FPM_2300)
a157b101 822 pci_clear_mwi(ha->pdev);
abbd8870
AV		 823
824 /* Deselect FPM registers. */
3d71644c
AV		 825 WRT_REG_WORD(&reg->ctrl_status, 0x0);
826 RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 827
828 /* Release RISC module. */
3d71644c 829 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
abbd8870 830 for (cnt = 0; cnt < 30000; cnt++) {
3d71644c 831 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
abbd8870
AV		 832 break;
833
834 udelay(10);
1da177e4 835 }
1da177e4 836
abbd8870
AV		 837 spin_unlock_irqrestore(&ha->hardware_lock, flags);
838 }
1da177e4 839
abbd8870
AV		 840 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
841
737faece 842 pci_disable_rom(ha->pdev);
1da177e4 843
abbd8870
AV		 844 /* Get PCI bus information. */
845 spin_lock_irqsave(&ha->hardware_lock, flags);
3d71644c 846 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 847 spin_unlock_irqrestore(&ha->hardware_lock, flags);
848
849 return QLA_SUCCESS;
1da177e4
LT		 850}
851
0107109e
AV		 852/**
853 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
854 * @ha: HA context
855 *
856 * Returns 0 on success.
857 */
858int
e315cd28 859qla24xx_pci_config(scsi_qla_host_t *vha)
0107109e 860{
a157b101 861 uint16_t w;
0107109e 862 unsigned long flags = 0;
e315cd28 863 struct qla_hw_data *ha = vha->hw;
0107109e 864 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
0107109e
AV		 865
866 pci_set_master(ha->pdev);
af6177d8 867 pci_try_set_mwi(ha->pdev);
0107109e
AV		 868
869 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 870 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
0107109e
AV		 871 w &= ~PCI_COMMAND_INTX_DISABLE;
872 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
873
874 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
875
876 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
f85ec187
AV		 877 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
878 pcix_set_mmrbc(ha->pdev, 2048);
0107109e
AV		 879
880 /* PCIe -- adjust Maximum Read Request Size (2048). */
e67f1321 881 if (pci_is_pcie(ha->pdev))
5ffd3a52 882 pcie_set_readrq(ha->pdev, 4096);
0107109e 883
737faece 884 pci_disable_rom(ha->pdev);
0107109e 885
44c10138 886 ha->chip_revision = ha->pdev->revision;
a8488abe 887
0107109e
AV		 888 /* Get PCI bus information. */
889 spin_lock_irqsave(&ha->hardware_lock, flags);
890 ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
891 spin_unlock_irqrestore(&ha->hardware_lock, flags);
892
893 return QLA_SUCCESS;
894}
895
c3a2f0df
AV		 896/**
897 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
898 * @ha: HA context
899 *
900 * Returns 0 on success.
901 */
902int
e315cd28 903qla25xx_pci_config(scsi_qla_host_t *vha)
c3a2f0df
AV		 904{
905 uint16_t w;
e315cd28 906 struct qla_hw_data *ha = vha->hw;
c3a2f0df
AV		 907
908 pci_set_master(ha->pdev);
909 pci_try_set_mwi(ha->pdev);
910
911 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
912 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
913 w &= ~PCI_COMMAND_INTX_DISABLE;
914 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
915
916 /* PCIe -- adjust Maximum Read Request Size (2048). */
e67f1321 917 if (pci_is_pcie(ha->pdev))
5ffd3a52 918 pcie_set_readrq(ha->pdev, 4096);
c3a2f0df 919
737faece 920 pci_disable_rom(ha->pdev);
c3a2f0df
AV		 921
922 ha->chip_revision = ha->pdev->revision;
923
924 return QLA_SUCCESS;
925}
926
1da177e4
LT		 927/**
928 * qla2x00_isp_firmware() - Choose firmware image.
929 * @ha: HA context
930 *
931 * Returns 0 on success.
932 */
933static int
e315cd28 934qla2x00_isp_firmware(scsi_qla_host_t *vha)
1da177e4
LT		 935{
936 int rval;
42e421b1
AV		 937 uint16_t loop_id, topo, sw_cap;
938 uint8_t domain, area, al_pa;
e315cd28 939 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 940
941 /* Assume loading risc code */
fa2a1ce5 942 rval = QLA_FUNCTION_FAILED;
1da177e4
LT		 943
944 if (ha->flags.disable_risc_code_load) {
7c3df132 945 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
1da177e4
LT		 946
947 /* Verify checksum of loaded RISC code. */
e315cd28 948 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
42e421b1
AV		 949 if (rval == QLA_SUCCESS) {
950 /* And, verify we are not in ROM code. */
e315cd28 951 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
42e421b1
AV		 952 &area, &domain, &topo, &sw_cap);
953 }
1da177e4
LT		 954 }
955
7c3df132
SK		 956 if (rval)
957 ql_dbg(ql_dbg_init, vha, 0x007a,
958 "**** Load RISC code ****.\n");
1da177e4
LT		 959
960 return (rval);
961}
962
963/**
964 * qla2x00_reset_chip() - Reset ISP chip.
965 * @ha: HA context
966 *
967 * Returns 0 on success.
968 */
abbd8870 969void
e315cd28 970qla2x00_reset_chip(scsi_qla_host_t *vha)
1da177e4
LT		 971{
972 unsigned long flags = 0;
e315cd28 973 struct qla_hw_data *ha = vha->hw;
3d71644c 974 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 975 uint32_t cnt;
1da177e4
LT		 976 uint16_t cmd;
977
85880801
AV		 978 if (unlikely(pci_channel_offline(ha->pdev)))
979 return;
980
fd34f556 981 ha->isp_ops->disable_intrs(ha);
1da177e4
LT		 982
983 spin_lock_irqsave(&ha->hardware_lock, flags);
984
985 /* Turn off master enable */
986 cmd = 0;
987 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
988 cmd &= ~PCI_COMMAND_MASTER;
989 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
990
991 if (!IS_QLA2100(ha)) {
992 /* Pause RISC. */
993 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
994 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
995 for (cnt = 0; cnt < 30000; cnt++) {
996 if ((RD_REG_WORD(&reg->hccr) &
997 HCCR_RISC_PAUSE) != 0)
998 break;
999 udelay(100);
1000 }
1001 } else {
1002 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
1003 udelay(10);
1004 }
1005
1006 /* Select FPM registers. */
1007 WRT_REG_WORD(&reg->ctrl_status, 0x20);
1008 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
1009
1010 /* FPM Soft Reset. */
1011 WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
1012 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
1013
1014 /* Toggle Fpm Reset. */
1015 if (!IS_QLA2200(ha)) {
1016 WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
1017 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
1018 }
1019
1020 /* Select frame buffer registers. */
1021 WRT_REG_WORD(&reg->ctrl_status, 0x10);
1022 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
1023
1024 /* Reset frame buffer FIFOs. */
1025 if (IS_QLA2200(ha)) {
1026 WRT_FB_CMD_REG(ha, reg, 0xa000);
1027 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
1028 } else {
1029 WRT_FB_CMD_REG(ha, reg, 0x00fc);
1030
1031 /* Read back fb_cmd until zero or 3 seconds max */
1032 for (cnt = 0; cnt < 3000; cnt++) {
1033 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
1034 break;
1035 udelay(100);
1036 }
1037 }
1038
1039 /* Select RISC module registers. */
1040 WRT_REG_WORD(&reg->ctrl_status, 0);
1041 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
1042
1043 /* Reset RISC processor. */
1044 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
1045 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
1046
1047 /* Release RISC processor. */
1048 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
1049 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
1050 }
1051
1052 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
1053 WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
1054
1055 /* Reset ISP chip. */
1056 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
1057
1058 /* Wait for RISC to recover from reset. */
1059 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
1060 /*
1061 * It is necessary to for a delay here since the card doesn't
1062 * respond to PCI reads during a reset. On some architectures
1063 * this will result in an MCA.
1064 */
1065 udelay(20);
1066 for (cnt = 30000; cnt; cnt--) {
1067 if ((RD_REG_WORD(&reg->ctrl_status) &
1068 CSR_ISP_SOFT_RESET) == 0)
1069 break;
1070 udelay(100);
1071 }
1072 } else
1073 udelay(10);
1074
1075 /* Reset RISC processor. */
1076 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
1077
1078 WRT_REG_WORD(&reg->semaphore, 0);
1079
1080 /* Release RISC processor. */
1081 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
1082 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
1083
1084 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
1085 for (cnt = 0; cnt < 30000; cnt++) {
ffb39f03 1086 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
1da177e4 1087 break;
1da177e4
LT		 1088
1089 udelay(100);
1090 }
1091 } else
1092 udelay(100);
1093
1094 /* Turn on master enable */
1095 cmd |= PCI_COMMAND_MASTER;
1096 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
1097
1098 /* Disable RISC pause on FPM parity error. */
1099 if (!IS_QLA2100(ha)) {
1100 WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
1101 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
1102 }
1103
1104 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1105}
1106
b1d46989
MI		 1107/**
1108 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
1109 *
1110 * Returns 0 on success.
1111 */
fa492630 1112static int
b1d46989
MI		 1113qla81xx_reset_mpi(scsi_qla_host_t *vha)
1114{
1115 uint16_t mb[4] = {0x1010, 0, 1, 0};
1116
6246b8a1
GM		 1117 if (!IS_QLA81XX(vha->hw))
1118 return QLA_SUCCESS;
1119
b1d46989
MI		 1120 return qla81xx_write_mpi_register(vha, mb);
1121}
1122
0107109e 1123/**
88c26663 1124 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
0107109e
AV		 1125 * @ha: HA context
1126 *
1127 * Returns 0 on success.
1128 */
d14e72fb 1129static inline int
e315cd28 1130qla24xx_reset_risc(scsi_qla_host_t *vha)
0107109e
AV		 1131{
1132 unsigned long flags = 0;
e315cd28 1133 struct qla_hw_data *ha = vha->hw;
0107109e
AV		 1134 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1135 uint32_t cnt, d2;
335a1cc9 1136 uint16_t wd;
b1d46989 1137 static int abts_cnt; /* ISP abort retry counts */
d14e72fb 1138 int rval = QLA_SUCCESS;
0107109e 1139
0107109e
AV		 1140 spin_lock_irqsave(&ha->hardware_lock, flags);
1141
1142 /* Reset RISC. */
1143 WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
1144 for (cnt = 0; cnt < 30000; cnt++) {
1145 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
1146 break;
1147
1148 udelay(10);
1149 }
1150
d14e72fb
HM		 1151 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE))
1152 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
1153
1154 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
1155 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
1156 RD_REG_DWORD(&reg->hccr),
1157 RD_REG_DWORD(&reg->ctrl_status),
1158 (RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE));
1159
0107109e
AV		 1160 WRT_REG_DWORD(&reg->ctrl_status,
1161 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
335a1cc9 1162 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
88c26663 1163
335a1cc9 1164 udelay(100);
d14e72fb 1165
88c26663 1166 /* Wait for firmware to complete NVRAM accesses. */
88c26663 1167 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
d14e72fb
HM		 1168 for (cnt = 10000; RD_REG_WORD(&reg->mailbox0) != 0 &&
1169 rval == QLA_SUCCESS; cnt--) {
88c26663 1170 barrier();
d14e72fb
HM		 1171 if (cnt)
1172 udelay(5);
1173 else
1174 rval = QLA_FUNCTION_TIMEOUT;
88c26663
AV		 1175 }
1176
d14e72fb
HM		 1177 if (rval == QLA_SUCCESS)
1178 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
1179
1180 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
1181 "HCCR: 0x%x, MailBox0 Status 0x%x\n",
1182 RD_REG_DWORD(&reg->hccr),
1183 RD_REG_DWORD(&reg->mailbox0));
1184
335a1cc9 1185 /* Wait for soft-reset to complete. */
0107109e 1186 d2 = RD_REG_DWORD(&reg->ctrl_status);
d14e72fb 1187 for (cnt = 0; cnt < 6000000; cnt++) {
0107109e 1188 barrier();
d14e72fb
HM		 1189 if ((RD_REG_DWORD(&reg->ctrl_status) &
1190 CSRX_ISP_SOFT_RESET) == 0)
1191 break;
1192
1193 udelay(5);
0107109e 1194 }
d14e72fb
HM		 1195 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))
1196 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
1197
1198 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
1199 "HCCR: 0x%x, Soft Reset status: 0x%x\n",
1200 RD_REG_DWORD(&reg->hccr),
1201 RD_REG_DWORD(&reg->ctrl_status));
0107109e 1202
b1d46989
MI		 1203 /* If required, do an MPI FW reset now */
1204 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
1205 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
1206 if (++abts_cnt < 5) {
1207 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1208 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
1209 } else {
1210 /*
1211 * We exhausted the ISP abort retries. We have to
1212 * set the board offline.
1213 */
1214 abts_cnt = 0;
1215 vha->flags.online = 0;
1216 }
1217 }
1218 }
1219
0107109e
AV		 1220 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
1221 RD_REG_DWORD(&reg->hccr);
1222
1223 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
1224 RD_REG_DWORD(&reg->hccr);
1225
1226 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
1227 RD_REG_DWORD(&reg->hccr);
1228
1229 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
d14e72fb
HM		 1230 for (cnt = 6000000; RD_REG_WORD(&reg->mailbox0) != 0 &&
1231 rval == QLA_SUCCESS; cnt--) {
0107109e 1232 barrier();
d14e72fb
HM		 1233 if (cnt)
1234 udelay(5);
1235 else
1236 rval = QLA_FUNCTION_TIMEOUT;
0107109e 1237 }
d14e72fb
HM		 1238 if (rval == QLA_SUCCESS)
1239 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
1240
1241 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
1242 "Host Risc 0x%x, mailbox0 0x%x\n",
1243 RD_REG_DWORD(&reg->hccr),
1244 RD_REG_WORD(&reg->mailbox0));
0107109e
AV		 1245
1246 spin_unlock_irqrestore(&ha->hardware_lock, flags);
124f85e6 1247
d14e72fb
HM		 1248 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
1249 "Driver in %s mode\n",
1250 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
1251
124f85e6
AV		 1252 if (IS_NOPOLLING_TYPE(ha))
1253 ha->isp_ops->enable_intrs(ha);
d14e72fb
HM		 1254
1255 return rval;
0107109e
AV		 1256}
1257
4ea2c9c7
JC		 1258static void
1259qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
1260{
1261 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
1262
1263 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
1264 *data = RD_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET);
1265
1266}
1267
1268static void
1269qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
1270{
1271 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
1272
1273 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
1274 WRT_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET, data);
1275}
1276
1277static void
1278qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
1279{
1280 struct qla_hw_data *ha = vha->hw;
1281 uint32_t wd32 = 0;
1282 uint delta_msec = 100;
1283 uint elapsed_msec = 0;
1284 uint timeout_msec;
1285 ulong n;
1286
1287 if (!IS_QLA25XX(ha) && !IS_QLA2031(ha))
1288 return;
1289
1290attempt:
1291 timeout_msec = TIMEOUT_SEMAPHORE;
1292 n = timeout_msec / delta_msec;
1293 while (n--) {
1294 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
1295 qla25xx_read_risc_sema_reg(vha, &wd32);
1296 if (wd32 & RISC_SEMAPHORE)
1297 break;
1298 msleep(delta_msec);
1299 elapsed_msec += delta_msec;
1300 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
1301 goto force;
1302 }
1303
1304 if (!(wd32 & RISC_SEMAPHORE))
1305 goto force;
1306
1307 if (!(wd32 & RISC_SEMAPHORE_FORCE))
1308 goto acquired;
1309
1310 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
1311 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
1312 n = timeout_msec / delta_msec;
1313 while (n--) {
1314 qla25xx_read_risc_sema_reg(vha, &wd32);
1315 if (!(wd32 & RISC_SEMAPHORE_FORCE))
1316 break;
1317 msleep(delta_msec);
1318 elapsed_msec += delta_msec;
1319 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
1320 goto force;
1321 }
1322
1323 if (wd32 & RISC_SEMAPHORE_FORCE)
1324 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
1325
1326 goto attempt;
1327
1328force:
1329 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
1330
1331acquired:
1332 return;
1333}
1334
88c26663
AV		 1335/**
1336 * qla24xx_reset_chip() - Reset ISP24xx chip.
1337 * @ha: HA context
1338 *
1339 * Returns 0 on success.
1340 */
1341void
e315cd28 1342qla24xx_reset_chip(scsi_qla_host_t *vha)
88c26663 1343{
e315cd28 1344 struct qla_hw_data *ha = vha->hw;
85880801
AV		 1345
1346 if (pci_channel_offline(ha->pdev) &&
1347 ha->flags.pci_channel_io_perm_failure) {
1348 return;
1349 }
1350
fd34f556 1351 ha->isp_ops->disable_intrs(ha);
88c26663 1352
4ea2c9c7
JC		 1353 qla25xx_manipulate_risc_semaphore(vha);
1354
88c26663 1355 /* Perform RISC reset. */
e315cd28 1356 qla24xx_reset_risc(vha);
88c26663
AV		 1357}
1358
1da177e4
LT		 1359/**
1360 * qla2x00_chip_diag() - Test chip for proper operation.
1361 * @ha: HA context
1362 *
1363 * Returns 0 on success.
1364 */
abbd8870 1365int
e315cd28 1366qla2x00_chip_diag(scsi_qla_host_t *vha)
1da177e4
LT		 1367{
1368 int rval;
e315cd28 1369 struct qla_hw_data *ha = vha->hw;
3d71644c 1370 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4
LT		 1371 unsigned long flags = 0;
1372 uint16_t data;
1373 uint32_t cnt;
1374 uint16_t mb[5];
73208dfd 1375 struct req_que *req = ha->req_q_map[0];
1da177e4
LT		 1376
1377 /* Assume a failed state */
1378 rval = QLA_FUNCTION_FAILED;
1379
7c3df132
SK		 1380 ql_dbg(ql_dbg_init, vha, 0x007b,
1381 "Testing device at %lx.\n", (u_long)&reg->flash_address);
1da177e4
LT		 1382
1383 spin_lock_irqsave(&ha->hardware_lock, flags);
1384
1385 /* Reset ISP chip. */
1386 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
1387
1388 /*
1389 * We need to have a delay here since the card will not respond while
1390 * in reset causing an MCA on some architectures.
1391 */
1392 udelay(20);
1393 data = qla2x00_debounce_register(&reg->ctrl_status);
1394 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
1395 udelay(5);
1396 data = RD_REG_WORD(&reg->ctrl_status);
1397 barrier();
1398 }
1399
1400 if (!cnt)
1401 goto chip_diag_failed;
1402
7c3df132
SK		 1403 ql_dbg(ql_dbg_init, vha, 0x007c,
1404 "Reset register cleared by chip reset.\n");
1da177e4
LT		 1405
1406 /* Reset RISC processor. */
1407 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
1408 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
1409
1410 /* Workaround for QLA2312 PCI parity error */
1411 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
1412 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
1413 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
1414 udelay(5);
1415 data = RD_MAILBOX_REG(ha, reg, 0);
fa2a1ce5 1416 barrier();
1da177e4
LT		 1417 }
1418 } else
1419 udelay(10);
1420
1421 if (!cnt)
1422 goto chip_diag_failed;
1423
1424 /* Check product ID of chip */
7c3df132 1425 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n");
1da177e4
LT		 1426
1427 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
1428 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
1429 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
1430 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
1431 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
1432 mb[3] != PROD_ID_3) {
7c3df132
SK		 1433 ql_log(ql_log_warn, vha, 0x0062,
1434 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
1435 mb[1], mb[2], mb[3]);
1da177e4
LT		 1436
1437 goto chip_diag_failed;
1438 }
1439 ha->product_id[0] = mb[1];
1440 ha->product_id[1] = mb[2];
1441 ha->product_id[2] = mb[3];
1442 ha->product_id[3] = mb[4];
1443
1444 /* Adjust fw RISC transfer size */
73208dfd 1445 if (req->length > 1024)
1da177e4
LT		 1446 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
1447 else
1448 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
73208dfd 1449 req->length;
1da177e4
LT		 1450
1451 if (IS_QLA2200(ha) &&
1452 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
1453 /* Limit firmware transfer size with a 2200A */
7c3df132 1454 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
1da177e4 1455
ea5b6382 1456 ha->device_type |= DT_ISP2200A;
1da177e4
LT		 1457 ha->fw_transfer_size = 128;
1458 }
1459
1460 /* Wrap Incoming Mailboxes Test. */
1461 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1462
7c3df132 1463 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
e315cd28 1464 rval = qla2x00_mbx_reg_test(vha);
7c3df132
SK		 1465 if (rval)
1466 ql_log(ql_log_warn, vha, 0x0080,
1467 "Failed mailbox send register test.\n");
1468 else
1da177e4
LT		 1469 /* Flag a successful rval */
1470 rval = QLA_SUCCESS;
1da177e4
LT		 1471 spin_lock_irqsave(&ha->hardware_lock, flags);
1472
1473chip_diag_failed:
1474 if (rval)
7c3df132
SK		 1475 ql_log(ql_log_info, vha, 0x0081,
1476 "Chip diagnostics **** FAILED ****.\n");
1da177e4
LT		 1477
1478 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1479
1480 return (rval);
1481}
1482
0107109e
AV		 1483/**
1484 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
1485 * @ha: HA context
1486 *
1487 * Returns 0 on success.
1488 */
1489int
e315cd28 1490qla24xx_chip_diag(scsi_qla_host_t *vha)
0107109e
AV		 1491{
1492 int rval;
e315cd28 1493 struct qla_hw_data *ha = vha->hw;
73208dfd 1494 struct req_que *req = ha->req_q_map[0];
0107109e 1495
7ec0effd 1496 if (IS_P3P_TYPE(ha))
a9083016
GM		 1497 return QLA_SUCCESS;
1498
73208dfd 1499 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
0107109e 1500
e315cd28 1501 rval = qla2x00_mbx_reg_test(vha);
0107109e 1502 if (rval) {
7c3df132
SK		 1503 ql_log(ql_log_warn, vha, 0x0082,
1504 "Failed mailbox send register test.\n");
0107109e
AV		 1505 } else {
1506 /* Flag a successful rval */
1507 rval = QLA_SUCCESS;
1508 }
1509
1510 return rval;
1511}
1512
a7a167bf 1513void
e315cd28 1514qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
0107109e 1515{
a7a167bf
AV		 1516 int rval;
1517 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
73208dfd 1518 eft_size, fce_size, mq_size;
df613b96
AV		 1519 dma_addr_t tc_dma;
1520 void *tc;
e315cd28 1521 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 1522 struct req_que *req = ha->req_q_map[0];
1523 struct rsp_que *rsp = ha->rsp_q_map[0];
a7a167bf
AV		 1524
1525 if (ha->fw_dump) {
7c3df132
SK		 1526 ql_dbg(ql_dbg_init, vha, 0x00bd,
1527 "Firmware dump already allocated.\n");
a7a167bf
AV		 1528 return;
1529 }
d4e3e04d 1530
0107109e 1531 ha->fw_dumped = 0;
61f098dd 1532 ha->fw_dump_cap_flags = 0;
f73cb695
CD		 1533 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
1534 req_q_size = rsp_q_size = 0;
1535
1536 if (IS_QLA27XX(ha))
1537 goto try_fce;
1538
d4e3e04d 1539 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
a7a167bf 1540 fixed_size = sizeof(struct qla2100_fw_dump);
d4e3e04d 1541 } else if (IS_QLA23XX(ha)) {
a7a167bf
AV		 1542 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
1543 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
1544 sizeof(uint16_t);
e428924c 1545 } else if (IS_FWI2_CAPABLE(ha)) {
b20f02e1 1546 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
6246b8a1
GM		 1547 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
1548 else if (IS_QLA81XX(ha))
3a03eb79
AV		 1549 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
1550 else if (IS_QLA25XX(ha))
1551 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
1552 else
1553 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
f73cb695 1554
a7a167bf
AV		 1555 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
1556 sizeof(uint32_t);
050c9bb1 1557 if (ha->mqenable) {
b20f02e1 1558 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
6246b8a1 1559 mq_size = sizeof(struct qla2xxx_mq_chain);
050c9bb1
GM		 1560 /*
1561 * Allocate maximum buffer size for all queues.
1562 * Resizing must be done at end-of-dump processing.
1563 */
1564 mq_size += ha->max_req_queues *
1565 (req->length * sizeof(request_t));
1566 mq_size += ha->max_rsp_queues *
1567 (rsp->length * sizeof(response_t));
1568 }
00876ae8 1569 if (ha->tgt.atio_ring)
2d70c103 1570 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
df613b96 1571 /* Allocate memory for Fibre Channel Event Buffer. */
f73cb695
CD		 1572 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
1573 !IS_QLA27XX(ha))
436a7b11 1574 goto try_eft;
df613b96 1575
f73cb695
CD		 1576try_fce:
1577 if (ha->fce)
1578 dma_free_coherent(&ha->pdev->dev,
1579 FCE_SIZE, ha->fce, ha->fce_dma);
1580
1581 /* Allocate memory for Fibre Channel Event Buffer. */
0ea85b50
JP		 1582 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
1583 GFP_KERNEL);
df613b96 1584 if (!tc) {
7c3df132
SK		 1585 ql_log(ql_log_warn, vha, 0x00be,
1586 "Unable to allocate (%d KB) for FCE.\n",
1587 FCE_SIZE / 1024);
17d98630 1588 goto try_eft;
df613b96
AV		 1589 }
1590
e315cd28 1591 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
df613b96
AV		 1592 ha->fce_mb, &ha->fce_bufs);
1593 if (rval) {
7c3df132
SK		 1594 ql_log(ql_log_warn, vha, 0x00bf,
1595 "Unable to initialize FCE (%d).\n", rval);
df613b96
AV		 1596 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
1597 tc_dma);
1598 ha->flags.fce_enabled = 0;
17d98630 1599 goto try_eft;
df613b96 1600 }
cfb0919c 1601 ql_dbg(ql_dbg_init, vha, 0x00c0,
7c3df132 1602 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
df613b96 1603
7d9dade3 1604 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
df613b96
AV		 1605 ha->flags.fce_enabled = 1;
1606 ha->fce_dma = tc_dma;
1607 ha->fce = tc;
f73cb695 1608
436a7b11 1609try_eft:
f73cb695
CD		 1610 if (ha->eft)
1611 dma_free_coherent(&ha->pdev->dev,
1612 EFT_SIZE, ha->eft, ha->eft_dma);
1613
436a7b11 1614 /* Allocate memory for Extended Trace Buffer. */
0ea85b50
JP		 1615 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
1616 GFP_KERNEL);
436a7b11 1617 if (!tc) {
7c3df132
SK		 1618 ql_log(ql_log_warn, vha, 0x00c1,
1619 "Unable to allocate (%d KB) for EFT.\n",
1620 EFT_SIZE / 1024);
436a7b11
AV		 1621 goto cont_alloc;
1622 }
1623
e315cd28 1624 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
436a7b11 1625 if (rval) {
7c3df132
SK		 1626 ql_log(ql_log_warn, vha, 0x00c2,
1627 "Unable to initialize EFT (%d).\n", rval);
436a7b11
AV		 1628 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
1629 tc_dma);
1630 goto cont_alloc;
1631 }
cfb0919c 1632 ql_dbg(ql_dbg_init, vha, 0x00c3,
7c3df132 1633 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
436a7b11
AV		 1634
1635 eft_size = EFT_SIZE;
1636 ha->eft_dma = tc_dma;
1637 ha->eft = tc;
d4e3e04d 1638 }
f73cb695 1639
a7a167bf 1640cont_alloc:
f73cb695
CD		 1641 if (IS_QLA27XX(ha)) {
1642 if (!ha->fw_dump_template) {
1643 ql_log(ql_log_warn, vha, 0x00ba,
1644 "Failed missing fwdump template\n");
1645 return;
1646 }
1647 dump_size = qla27xx_fwdt_calculate_dump_size(vha);
1648 ql_dbg(ql_dbg_init, vha, 0x00fa,
1649 "-> allocating fwdump (%x bytes)...\n", dump_size);
1650 goto allocate;
1651 }
1652
73208dfd
AC		 1653 req_q_size = req->length * sizeof(request_t);
1654 rsp_q_size = rsp->length * sizeof(response_t);
a7a167bf 1655 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
2afa19a9 1656 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
bb99de67
AV		 1657 ha->chain_offset = dump_size;
1658 dump_size += mq_size + fce_size;
d4e3e04d 1659
f73cb695 1660allocate:
d4e3e04d 1661 ha->fw_dump = vmalloc(dump_size);
a7a167bf 1662 if (!ha->fw_dump) {
7c3df132
SK		 1663 ql_log(ql_log_warn, vha, 0x00c4,
1664 "Unable to allocate (%d KB) for firmware dump.\n",
1665 dump_size / 1024);
a7a167bf 1666
e30d1756
MI		 1667 if (ha->fce) {
1668 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
1669 ha->fce_dma);
1670 ha->fce = NULL;
1671 ha->fce_dma = 0;
1672 }
1673
a7a167bf
AV		 1674 if (ha->eft) {
1675 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
1676 ha->eft_dma);
1677 ha->eft = NULL;
1678 ha->eft_dma = 0;
1679 }
1680 return;
1681 }
f73cb695 1682 ha->fw_dump_len = dump_size;
cfb0919c 1683 ql_dbg(ql_dbg_init, vha, 0x00c5,
7c3df132 1684 "Allocated (%d KB) for firmware dump.\n", dump_size / 1024);
a7a167bf 1685
f73cb695
CD		 1686 if (IS_QLA27XX(ha))
1687 return;
1688
a7a167bf
AV		 1689 ha->fw_dump->signature[0] = 'Q';
1690 ha->fw_dump->signature[1] = 'L';
1691 ha->fw_dump->signature[2] = 'G';
1692 ha->fw_dump->signature[3] = 'C';
1693 ha->fw_dump->version = __constant_htonl(1);
1694
1695 ha->fw_dump->fixed_size = htonl(fixed_size);
1696 ha->fw_dump->mem_size = htonl(mem_size);
1697 ha->fw_dump->req_q_size = htonl(req_q_size);
1698 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
1699
1700 ha->fw_dump->eft_size = htonl(eft_size);
1701 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
1702 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
1703
1704 ha->fw_dump->header_size =
1705 htonl(offsetof(struct qla2xxx_fw_dump, isp));
0107109e
AV		 1706}
1707
18e7555a
AV		 1708static int
1709qla81xx_mpi_sync(scsi_qla_host_t *vha)
1710{
1711#define MPS_MASK 0xe0
1712 int rval;
1713 uint16_t dc;
1714 uint32_t dw;
18e7555a
AV		 1715
1716 if (!IS_QLA81XX(vha->hw))
1717 return QLA_SUCCESS;
1718
1719 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
1720 if (rval != QLA_SUCCESS) {
7c3df132
SK		 1721 ql_log(ql_log_warn, vha, 0x0105,
1722 "Unable to acquire semaphore.\n");
18e7555a
AV		 1723 goto done;
1724 }
1725
1726 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
1727 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
1728 if (rval != QLA_SUCCESS) {
7c3df132 1729 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
18e7555a
AV		 1730 goto done_release;
1731 }
1732
1733 dc &= MPS_MASK;
1734 if (dc == (dw & MPS_MASK))
1735 goto done_release;
1736
1737 dw &= ~MPS_MASK;
1738 dw |= dc;
1739 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
1740 if (rval != QLA_SUCCESS) {
7c3df132 1741 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
18e7555a
AV		 1742 }
1743
1744done_release:
1745 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
1746 if (rval != QLA_SUCCESS) {
7c3df132
SK		 1747 ql_log(ql_log_warn, vha, 0x006d,
1748 "Unable to release semaphore.\n");
18e7555a
AV		 1749 }
1750
1751done:
1752 return rval;
1753}
1754
8d93f550
CD		 1755int
1756qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
1757{
1758 /* Don't try to reallocate the array */
1759 if (req->outstanding_cmds)
1760 return QLA_SUCCESS;
1761
1762 if (!IS_FWI2_CAPABLE(ha) || (ha->mqiobase &&
1763 (ql2xmultique_tag || ql2xmaxqueues > 1)))
1764 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
1765 else {
1766 if (ha->fw_xcb_count <= ha->fw_iocb_count)
1767 req->num_outstanding_cmds = ha->fw_xcb_count;
1768 else
1769 req->num_outstanding_cmds = ha->fw_iocb_count;
1770 }
1771
1772 req->outstanding_cmds = kzalloc(sizeof(srb_t *) *
1773 req->num_outstanding_cmds, GFP_KERNEL);
1774
1775 if (!req->outstanding_cmds) {
1776 /*
1777 * Try to allocate a minimal size just so we can get through
1778 * initialization.
1779 */
1780 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
1781 req->outstanding_cmds = kzalloc(sizeof(srb_t *) *
1782 req->num_outstanding_cmds, GFP_KERNEL);
1783
1784 if (!req->outstanding_cmds) {
1785 ql_log(ql_log_fatal, NULL, 0x0126,
1786 "Failed to allocate memory for "
1787 "outstanding_cmds for req_que %p.\n", req);
1788 req->num_outstanding_cmds = 0;
1789 return QLA_FUNCTION_FAILED;
1790 }
1791 }
1792
1793 return QLA_SUCCESS;
1794}
1795
1da177e4
LT		 1796/**
1797 * qla2x00_setup_chip() - Load and start RISC firmware.
1798 * @ha: HA context
1799 *
1800 * Returns 0 on success.
1801 */
1802static int
e315cd28 1803qla2x00_setup_chip(scsi_qla_host_t *vha)
1da177e4 1804{
0107109e
AV		 1805 int rval;
1806 uint32_t srisc_address = 0;
e315cd28 1807 struct qla_hw_data *ha = vha->hw;
3db0652e
AV		 1808 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1809 unsigned long flags;
dda772e8 1810 uint16_t fw_major_version;
3db0652e 1811
7ec0effd 1812 if (IS_P3P_TYPE(ha)) {
a9083016 1813 rval = ha->isp_ops->load_risc(vha, &srisc_address);
14e303d9
AV		 1814 if (rval == QLA_SUCCESS) {
1815 qla2x00_stop_firmware(vha);
a9083016 1816 goto enable_82xx_npiv;
14e303d9 1817 } else
b963752f 1818 goto failed;
a9083016
GM		 1819 }
1820
3db0652e
AV		 1821 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1822 /* Disable SRAM, Instruction RAM and GP RAM parity. */
1823 spin_lock_irqsave(&ha->hardware_lock, flags);
1824 WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
1825 RD_REG_WORD(&reg->hccr);
1826 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1827 }
1da177e4 1828
18e7555a
AV		 1829 qla81xx_mpi_sync(vha);
1830
1da177e4 1831 /* Load firmware sequences */
e315cd28 1832 rval = ha->isp_ops->load_risc(vha, &srisc_address);
0107109e 1833 if (rval == QLA_SUCCESS) {
7c3df132
SK		 1834 ql_dbg(ql_dbg_init, vha, 0x00c9,
1835 "Verifying Checksum of loaded RISC code.\n");
1da177e4 1836
e315cd28 1837 rval = qla2x00_verify_checksum(vha, srisc_address);
1da177e4
LT		 1838 if (rval == QLA_SUCCESS) {
1839 /* Start firmware execution. */
7c3df132
SK		 1840 ql_dbg(ql_dbg_init, vha, 0x00ca,
1841 "Starting firmware.\n");
1da177e4 1842
e315cd28 1843 rval = qla2x00_execute_fw(vha, srisc_address);
1da177e4 1844 /* Retrieve firmware information. */
dda772e8 1845 if (rval == QLA_SUCCESS) {
a9083016 1846enable_82xx_npiv:
dda772e8 1847 fw_major_version = ha->fw_major_version;
7ec0effd 1848 if (IS_P3P_TYPE(ha))
3173167f 1849 qla82xx_check_md_needed(vha);
6246b8a1
GM		 1850 else
1851 rval = qla2x00_get_fw_version(vha);
ca9e9c3e
AV		 1852 if (rval != QLA_SUCCESS)
1853 goto failed;
2c3dfe3f 1854 ha->flags.npiv_supported = 0;
e315cd28 1855 if (IS_QLA2XXX_MIDTYPE(ha) &&
946fb891 1856 (ha->fw_attributes & BIT_2)) {
2c3dfe3f 1857 ha->flags.npiv_supported = 1;
4d0ea247
SJ		 1858 if ((!ha->max_npiv_vports) ||
1859 ((ha->max_npiv_vports + 1) %
eb66dc60 1860 MIN_MULTI_ID_FABRIC))
4d0ea247 1861 ha->max_npiv_vports =
eb66dc60 1862 MIN_MULTI_ID_FABRIC - 1;
4d0ea247 1863 }
24a08138 1864 qla2x00_get_resource_cnts(vha, NULL,
8d93f550 1865 &ha->fw_xcb_count, NULL, &ha->fw_iocb_count,
f3a0a77e 1866 &ha->max_npiv_vports, NULL);
d743de66 1867
8d93f550
CD		 1868 /*
1869 * Allocate the array of outstanding commands
1870 * now that we know the firmware resources.
1871 */
1872 rval = qla2x00_alloc_outstanding_cmds(ha,
1873 vha->req);
1874 if (rval != QLA_SUCCESS)
1875 goto failed;
1876
be5ea3cf 1877 if (!fw_major_version && ql2xallocfwdump
7ec0effd 1878 && !(IS_P3P_TYPE(ha)))
08de2844 1879 qla2x00_alloc_fw_dump(vha);
3b6e5b9d
CD		 1880 } else {
1881 goto failed;
1da177e4
LT		 1882 }
1883 } else {
7c3df132
SK		 1884 ql_log(ql_log_fatal, vha, 0x00cd,
1885 "ISP Firmware failed checksum.\n");
1886 goto failed;
1da177e4 1887 }
c74d88a4
AV		 1888 } else
1889 goto failed;
1da177e4 1890
3db0652e
AV		 1891 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1892 /* Enable proper parity. */
1893 spin_lock_irqsave(&ha->hardware_lock, flags);
1894 if (IS_QLA2300(ha))
1895 /* SRAM parity */
1896 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
1897 else
1898 /* SRAM, Instruction RAM and GP RAM parity */
1899 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
1900 RD_REG_WORD(&reg->hccr);
1901 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1902 }
1903
f3982d89
CD		 1904 if (IS_QLA27XX(ha))
1905 ha->flags.fac_supported = 1;
1906 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
1d2874de
JC		 1907 uint32_t size;
1908
1909 rval = qla81xx_fac_get_sector_size(vha, &size);
1910 if (rval == QLA_SUCCESS) {
1911 ha->flags.fac_supported = 1;
1912 ha->fdt_block_size = size << 2;
1913 } else {
7c3df132 1914 ql_log(ql_log_warn, vha, 0x00ce,
1d2874de
JC		 1915 "Unsupported FAC firmware (%d.%02d.%02d).\n",
1916 ha->fw_major_version, ha->fw_minor_version,
1917 ha->fw_subminor_version);
1ca60e3b 1918
f73cb695 1919 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
6246b8a1
GM		 1920 ha->flags.fac_supported = 0;
1921 rval = QLA_SUCCESS;
1922 }
1d2874de
JC		 1923 }
1924 }
ca9e9c3e 1925failed:
1da177e4 1926 if (rval) {
7c3df132
SK		 1927 ql_log(ql_log_fatal, vha, 0x00cf,
1928 "Setup chip ****FAILED****.\n");
1da177e4
LT		 1929 }
1930
1931 return (rval);
1932}
1933
1934/**
1935 * qla2x00_init_response_q_entries() - Initializes response queue entries.
1936 * @ha: HA context
1937 *
1938 * Beginning of request ring has initialization control block already built
1939 * by nvram config routine.
1940 *
1941 * Returns 0 on success.
1942 */
73208dfd
AC		 1943void
1944qla2x00_init_response_q_entries(struct rsp_que *rsp)
1da177e4
LT		 1945{
1946 uint16_t cnt;
1947 response_t *pkt;
1948
2afa19a9
AC		 1949 rsp->ring_ptr = rsp->ring;
1950 rsp->ring_index = 0;
1951 rsp->status_srb = NULL;
e315cd28
AC		 1952 pkt = rsp->ring_ptr;
1953 for (cnt = 0; cnt < rsp->length; cnt++) {
1da177e4
LT		 1954 pkt->signature = RESPONSE_PROCESSED;
1955 pkt++;
1956 }
1da177e4
LT		 1957}
1958
1959/**
1960 * qla2x00_update_fw_options() - Read and process firmware options.
1961 * @ha: HA context
1962 *
1963 * Returns 0 on success.
1964 */
abbd8870 1965void
e315cd28 1966qla2x00_update_fw_options(scsi_qla_host_t *vha)
1da177e4
LT		 1967{
1968 uint16_t swing, emphasis, tx_sens, rx_sens;
e315cd28 1969 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 1970
1971 memset(ha->fw_options, 0, sizeof(ha->fw_options));
e315cd28 1972 qla2x00_get_fw_options(vha, ha->fw_options);
1da177e4
LT		 1973
1974 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1975 return;
1976
1977 /* Serial Link options. */
7c3df132
SK		 1978 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
1979 "Serial link options.\n");
1980 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
1981 (uint8_t *)&ha->fw_seriallink_options,
1982 sizeof(ha->fw_seriallink_options));
1da177e4
LT		 1983
1984 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
1985 if (ha->fw_seriallink_options[3] & BIT_2) {
1986 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
1987
1988 /* 1G settings */
1989 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
1990 emphasis = (ha->fw_seriallink_options[2] &
1991 (BIT_4 | BIT_3)) >> 3;
1992 tx_sens = ha->fw_seriallink_options[0] &
fa2a1ce5 1993 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1da177e4
LT		 1994 rx_sens = (ha->fw_seriallink_options[0] &
1995 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1996 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
1997 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
1998 if (rx_sens == 0x0)
1999 rx_sens = 0x3;
2000 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
2001 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
2002 ha->fw_options[10] |= BIT_5 |
2003 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
2004 (tx_sens & (BIT_1 | BIT_0));
2005
2006 /* 2G settings */
2007 swing = (ha->fw_seriallink_options[2] &
2008 (BIT_7 | BIT_6 | BIT_5)) >> 5;
2009 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
2010 tx_sens = ha->fw_seriallink_options[1] &
fa2a1ce5 2011 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1da177e4
LT		 2012 rx_sens = (ha->fw_seriallink_options[1] &
2013 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
2014 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
2015 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
2016 if (rx_sens == 0x0)
2017 rx_sens = 0x3;
2018 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
2019 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
2020 ha->fw_options[11] |= BIT_5 |
2021 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
2022 (tx_sens & (BIT_1 | BIT_0));
2023 }
2024
2025 /* FCP2 options. */
2026 /* Return command IOCBs without waiting for an ABTS to complete. */
2027 ha->fw_options[3] |= BIT_13;
2028
2029 /* LED scheme. */
2030 if (ha->flags.enable_led_scheme)
2031 ha->fw_options[2] |= BIT_12;
2032
48c02fde
AV		 2033 /* Detect ISP6312. */
2034 if (IS_QLA6312(ha))
2035 ha->fw_options[2] |= BIT_13;
2036
1da177e4 2037 /* Update firmware options. */
e315cd28 2038 qla2x00_set_fw_options(vha, ha->fw_options);
1da177e4
LT		 2039}
2040
0107109e 2041void
e315cd28 2042qla24xx_update_fw_options(scsi_qla_host_t *vha)
0107109e
AV		 2043{
2044 int rval;
e315cd28 2045 struct qla_hw_data *ha = vha->hw;
0107109e 2046
7ec0effd 2047 if (IS_P3P_TYPE(ha))
a9083016
GM		 2048 return;
2049
0107109e 2050 /* Update Serial Link options. */
f94097ed 2051 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
0107109e
AV		 2052 return;
2053
e315cd28 2054 rval = qla2x00_set_serdes_params(vha,
f94097ed
AV		 2055 le16_to_cpu(ha->fw_seriallink_options24[1]),
2056 le16_to_cpu(ha->fw_seriallink_options24[2]),
2057 le16_to_cpu(ha->fw_seriallink_options24[3]));
0107109e 2058 if (rval != QLA_SUCCESS) {
7c3df132 2059 ql_log(ql_log_warn, vha, 0x0104,
0107109e
AV		 2060 "Unable to update Serial Link options (%x).\n", rval);
2061 }
2062}
2063
abbd8870 2064void
e315cd28 2065qla2x00_config_rings(struct scsi_qla_host *vha)
abbd8870 2066{
e315cd28 2067 struct qla_hw_data *ha = vha->hw;
3d71644c 2068 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
73208dfd
AC		 2069 struct req_que *req = ha->req_q_map[0];
2070 struct rsp_que *rsp = ha->rsp_q_map[0];
abbd8870
AV		 2071
2072 /* Setup ring parameters in initialization control block. */
2073 ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
2074 ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
e315cd28
AC		 2075 ha->init_cb->request_q_length = cpu_to_le16(req->length);
2076 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
2077 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
2078 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
2079 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
2080 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
abbd8870
AV		 2081
2082 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
2083 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
2084 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
2085 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
2086 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
2087}
2088
0107109e 2089void
e315cd28 2090qla24xx_config_rings(struct scsi_qla_host *vha)
0107109e 2091{
e315cd28 2092 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 2093 device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
2094 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
2095 struct qla_msix_entry *msix;
0107109e 2096 struct init_cb_24xx *icb;
73208dfd
AC		 2097 uint16_t rid = 0;
2098 struct req_que *req = ha->req_q_map[0];
2099 struct rsp_que *rsp = ha->rsp_q_map[0];
0107109e 2100
6246b8a1 2101 /* Setup ring parameters in initialization control block. */
0107109e
AV		 2102 icb = (struct init_cb_24xx *)ha->init_cb;
2103 icb->request_q_outpointer = __constant_cpu_to_le16(0);
2104 icb->response_q_inpointer = __constant_cpu_to_le16(0);
e315cd28
AC		 2105 icb->request_q_length = cpu_to_le16(req->length);
2106 icb->response_q_length = cpu_to_le16(rsp->length);
2107 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
2108 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
2109 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
2110 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
0107109e 2111
2d70c103
NB		 2112 /* Setup ATIO queue dma pointers for target mode */
2113 icb->atio_q_inpointer = __constant_cpu_to_le16(0);
2114 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
2115 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma));
2116 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma));
2117
7c6300e3
JC		 2118 if (IS_SHADOW_REG_CAPABLE(ha))
2119 icb->firmware_options_2 |=
2120 __constant_cpu_to_le32(BIT_30|BIT_29);
2121
f73cb695 2122 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
73208dfd
AC		 2123 icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
2124 icb->rid = __constant_cpu_to_le16(rid);
2125 if (ha->flags.msix_enabled) {
2126 msix = &ha->msix_entries[1];
7c3df132
SK		 2127 ql_dbg(ql_dbg_init, vha, 0x00fd,
2128 "Registering vector 0x%x for base que.\n",
2129 msix->entry);
73208dfd
AC		 2130 icb->msix = cpu_to_le16(msix->entry);
2131 }
2132 /* Use alternate PCI bus number */
2133 if (MSB(rid))
2134 icb->firmware_options_2 |=
2135 __constant_cpu_to_le32(BIT_19);
2136 /* Use alternate PCI devfn */
2137 if (LSB(rid))
2138 icb->firmware_options_2 |=
2139 __constant_cpu_to_le32(BIT_18);
2140
3155754a 2141 /* Use Disable MSIX Handshake mode for capable adapters */
6246b8a1
GM		 2142 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
2143 (ha->flags.msix_enabled)) {
3155754a
AC		 2144 icb->firmware_options_2 &=
2145 __constant_cpu_to_le32(~BIT_22);
2146 ha->flags.disable_msix_handshake = 1;
7c3df132
SK		 2147 ql_dbg(ql_dbg_init, vha, 0x00fe,
2148 "MSIX Handshake Disable Mode turned on.\n");
3155754a
AC		 2149 } else {
2150 icb->firmware_options_2 |=
2151 __constant_cpu_to_le32(BIT_22);
2152 }
73208dfd 2153 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
73208dfd
AC		 2154
2155 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
2156 WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
2157 WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
2158 WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
2159 } else {
2160 WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
2161 WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
2162 WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
2163 WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
2164 }
aa230bc5 2165 qlt_24xx_config_rings(vha);
2d70c103 2166
73208dfd
AC		 2167 /* PCI posting */
2168 RD_REG_DWORD(&ioreg->hccr);
0107109e
AV		 2169}
2170
1da177e4
LT		 2171/**
2172 * qla2x00_init_rings() - Initializes firmware.
2173 * @ha: HA context
2174 *
2175 * Beginning of request ring has initialization control block already built
2176 * by nvram config routine.
2177 *
2178 * Returns 0 on success.
2179 */
8ae6d9c7 2180int
e315cd28 2181qla2x00_init_rings(scsi_qla_host_t *vha)
1da177e4
LT		 2182{
2183 int rval;
2184 unsigned long flags = 0;
29bdccbe 2185 int cnt, que;
e315cd28 2186 struct qla_hw_data *ha = vha->hw;
29bdccbe
AC		 2187 struct req_que *req;
2188 struct rsp_que *rsp;
2c3dfe3f
SJ		 2189 struct mid_init_cb_24xx *mid_init_cb =
2190 (struct mid_init_cb_24xx *) ha->init_cb;
1da177e4
LT		 2191
2192 spin_lock_irqsave(&ha->hardware_lock, flags);
2193
2194 /* Clear outstanding commands array. */
2afa19a9 2195 for (que = 0; que < ha->max_req_queues; que++) {
29bdccbe
AC		 2196 req = ha->req_q_map[que];
2197 if (!req)
2198 continue;
7c6300e3
JC		 2199 req->out_ptr = (void *)(req->ring + req->length);
2200 *req->out_ptr = 0;
8d93f550 2201 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
29bdccbe 2202 req->outstanding_cmds[cnt] = NULL;
1da177e4 2203
2afa19a9 2204 req->current_outstanding_cmd = 1;
1da177e4 2205
29bdccbe
AC		 2206 /* Initialize firmware. */
2207 req->ring_ptr = req->ring;
2208 req->ring_index = 0;
2209 req->cnt = req->length;
2210 }
1da177e4 2211
2afa19a9 2212 for (que = 0; que < ha->max_rsp_queues; que++) {
29bdccbe
AC		 2213 rsp = ha->rsp_q_map[que];
2214 if (!rsp)
2215 continue;
7c6300e3
JC		 2216 rsp->in_ptr = (void *)(rsp->ring + rsp->length);
2217 *rsp->in_ptr = 0;
29bdccbe 2218 /* Initialize response queue entries */
8ae6d9c7
GM		 2219 if (IS_QLAFX00(ha))
2220 qlafx00_init_response_q_entries(rsp);
2221 else
2222 qla2x00_init_response_q_entries(rsp);
29bdccbe 2223 }
1da177e4 2224
2d70c103
NB		 2225 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
2226 ha->tgt.atio_ring_index = 0;
2227 /* Initialize ATIO queue entries */
2228 qlt_init_atio_q_entries(vha);
2229
e315cd28 2230 ha->isp_ops->config_rings(vha);
1da177e4
LT		 2231
2232 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2233
8ae6d9c7
GM		 2234 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
2235
2236 if (IS_QLAFX00(ha)) {
2237 rval = qlafx00_init_firmware(vha, ha->init_cb_size);
2238 goto next_check;
2239 }
2240
1da177e4 2241 /* Update any ISP specific firmware options before initialization. */
e315cd28 2242 ha->isp_ops->update_fw_options(vha);
1da177e4 2243
605aa2bc 2244 if (ha->flags.npiv_supported) {
45980cc2 2245 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
605aa2bc 2246 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
c48339de 2247 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
605aa2bc
LC		 2248 }
2249
24a08138
AV		 2250 if (IS_FWI2_CAPABLE(ha)) {
2251 mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
2252 mid_init_cb->init_cb.execution_throttle =
2253 cpu_to_le16(ha->fw_xcb_count);
25232cc9
HM		 2254 /* D-Port Status */
2255 if (IS_DPORT_CAPABLE(ha))
2256 mid_init_cb->init_cb.firmware_options_1 |=
2257 cpu_to_le16(BIT_7);
2486c627
HM		 2258 /* Enable FA-WWPN */
2259 ha->flags.fawwpn_enabled =
2260 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) ? 1 : 0;
2261 ql_dbg(ql_dbg_init, vha, 0x0141, "FA-WWPN Support: %s.\n",
2262 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
24a08138 2263 }
2c3dfe3f 2264
e315cd28 2265 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
8ae6d9c7 2266next_check:
1da177e4 2267 if (rval) {
7c3df132
SK		 2268 ql_log(ql_log_fatal, vha, 0x00d2,
2269 "Init Firmware **** FAILED ****.\n");
1da177e4 2270 } else {
7c3df132
SK		 2271 ql_dbg(ql_dbg_init, vha, 0x00d3,
2272 "Init Firmware -- success.\n");
1da177e4
LT		 2273 }
2274
2275 return (rval);
2276}
2277
2278/**
2279 * qla2x00_fw_ready() - Waits for firmware ready.
2280 * @ha: HA context
2281 *
2282 * Returns 0 on success.
2283 */
2284static int
e315cd28 2285qla2x00_fw_ready(scsi_qla_host_t *vha)
1da177e4
LT		 2286{
2287 int rval;
4d4df193 2288 unsigned long wtime, mtime, cs84xx_time;
1da177e4
LT		 2289 uint16_t min_wait; /* Minimum wait time if loop is down */
2290 uint16_t wait_time; /* Wait time if loop is coming ready */
b5a340dd 2291 uint16_t state[6];
e315cd28 2292 struct qla_hw_data *ha = vha->hw;
1da177e4 2293
8ae6d9c7
GM		 2294 if (IS_QLAFX00(vha->hw))
2295 return qlafx00_fw_ready(vha);
2296
1da177e4
LT		 2297 rval = QLA_SUCCESS;
2298
33461491
CD		 2299 /* Time to wait for loop down */
2300 if (IS_P3P_TYPE(ha))
2301 min_wait = 30;
2302 else
2303 min_wait = 20;
1da177e4
LT		 2304
2305 /*
2306 * Firmware should take at most one RATOV to login, plus 5 seconds for
2307 * our own processing.
2308 */
2309 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
2310 wait_time = min_wait;
2311 }
2312
2313 /* Min wait time if loop down */
2314 mtime = jiffies + (min_wait * HZ);
2315
2316 /* wait time before firmware ready */
2317 wtime = jiffies + (wait_time * HZ);
2318
2319 /* Wait for ISP to finish LIP */
e315cd28 2320 if (!vha->flags.init_done)
7c3df132
SK		 2321 ql_log(ql_log_info, vha, 0x801e,
2322 "Waiting for LIP to complete.\n");
1da177e4
LT		 2323
2324 do {
5b939038 2325 memset(state, -1, sizeof(state));
e315cd28 2326 rval = qla2x00_get_firmware_state(vha, state);
1da177e4 2327 if (rval == QLA_SUCCESS) {
4d4df193 2328 if (state[0] < FSTATE_LOSS_OF_SYNC) {
e315cd28 2329 vha->device_flags &= ~DFLG_NO_CABLE;
1da177e4 2330 }
4d4df193 2331 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
7c3df132
SK		 2332 ql_dbg(ql_dbg_taskm, vha, 0x801f,
2333 "fw_state=%x 84xx=%x.\n", state[0],
2334 state[2]);
4d4df193
HK		 2335 if ((state[2] & FSTATE_LOGGED_IN) &&
2336 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
7c3df132
SK		 2337 ql_dbg(ql_dbg_taskm, vha, 0x8028,
2338 "Sending verify iocb.\n");
4d4df193
HK		 2339
2340 cs84xx_time = jiffies;
e315cd28 2341 rval = qla84xx_init_chip(vha);
7c3df132
SK		 2342 if (rval != QLA_SUCCESS) {
2343 ql_log(ql_log_warn,
cfb0919c 2344 vha, 0x8007,
7c3df132 2345 "Init chip failed.\n");
4d4df193 2346 break;
7c3df132 2347 }
4d4df193
HK		 2348
2349 /* Add time taken to initialize. */
2350 cs84xx_time = jiffies - cs84xx_time;
2351 wtime += cs84xx_time;
2352 mtime += cs84xx_time;
cfb0919c 2353 ql_dbg(ql_dbg_taskm, vha, 0x8008,
7c3df132
SK		 2354 "Increasing wait time by %ld. "
2355 "New time %ld.\n", cs84xx_time,
2356 wtime);
4d4df193
HK		 2357 }
2358 } else if (state[0] == FSTATE_READY) {
7c3df132
SK		 2359 ql_dbg(ql_dbg_taskm, vha, 0x8037,
2360 "F/W Ready - OK.\n");
1da177e4 2361
e315cd28 2362 qla2x00_get_retry_cnt(vha, &ha->retry_count,
1da177e4
LT		 2363 &ha->login_timeout, &ha->r_a_tov);
2364
2365 rval = QLA_SUCCESS;
2366 break;
2367 }
2368
2369 rval = QLA_FUNCTION_FAILED;
2370
e315cd28 2371 if (atomic_read(&vha->loop_down_timer) &&
4d4df193 2372 state[0] != FSTATE_READY) {
1da177e4 2373 /* Loop down. Timeout on min_wait for states
fa2a1ce5
AV		 2374 * other than Wait for Login.
2375 */
1da177e4 2376 if (time_after_eq(jiffies, mtime)) {
7c3df132 2377 ql_log(ql_log_info, vha, 0x8038,
1da177e4
LT		 2378 "Cable is unplugged...\n");
2379
e315cd28 2380 vha->device_flags |= DFLG_NO_CABLE;
1da177e4
LT		 2381 break;
2382 }
2383 }
2384 } else {
2385 /* Mailbox cmd failed. Timeout on min_wait. */
cdbb0a4f 2386 if (time_after_eq(jiffies, mtime) ||
7190575f 2387 ha->flags.isp82xx_fw_hung)
1da177e4
LT		 2388 break;
2389 }
2390
2391 if (time_after_eq(jiffies, wtime))
2392 break;
2393
2394 /* Delay for a while */
2395 msleep(500);
1da177e4
LT		 2396 } while (1);
2397
7c3df132 2398 ql_dbg(ql_dbg_taskm, vha, 0x803a,
b5a340dd
JC		 2399 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
2400 state[1], state[2], state[3], state[4], state[5], jiffies);
1da177e4 2401
cfb0919c 2402 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
7c3df132
SK		 2403 ql_log(ql_log_warn, vha, 0x803b,
2404 "Firmware ready **** FAILED ****.\n");
1da177e4
LT		 2405 }
2406
2407 return (rval);
2408}
2409
2410/*
2411* qla2x00_configure_hba
2412* Setup adapter context.
2413*
2414* Input:
2415* ha = adapter state pointer.
2416*
2417* Returns:
2418* 0 = success
2419*
2420* Context:
2421* Kernel context.
2422*/
2423static int
e315cd28 2424qla2x00_configure_hba(scsi_qla_host_t *vha)
1da177e4
LT		 2425{
2426 int rval;
2427 uint16_t loop_id;
2428 uint16_t topo;
2c3dfe3f 2429 uint16_t sw_cap;
1da177e4
LT		 2430 uint8_t al_pa;
2431 uint8_t area;
2432 uint8_t domain;
2433 char connect_type[22];
e315cd28 2434 struct qla_hw_data *ha = vha->hw;
f24b5cb8 2435 unsigned long flags;
61e1b269 2436 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4
LT		 2437
2438 /* Get host addresses. */
e315cd28 2439 rval = qla2x00_get_adapter_id(vha,
2c3dfe3f 2440 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
1da177e4 2441 if (rval != QLA_SUCCESS) {
e315cd28 2442 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
6246b8a1 2443 IS_CNA_CAPABLE(ha) ||
33135aa2 2444 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
7c3df132
SK		 2445 ql_dbg(ql_dbg_disc, vha, 0x2008,
2446 "Loop is in a transition state.\n");
33135aa2 2447 } else {
7c3df132
SK		 2448 ql_log(ql_log_warn, vha, 0x2009,
2449 "Unable to get host loop ID.\n");
61e1b269
JC		 2450 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
2451 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
2452 ql_log(ql_log_warn, vha, 0x1151,
2453 "Doing link init.\n");
2454 if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
2455 return rval;
2456 }
e315cd28 2457 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
33135aa2 2458 }
1da177e4
LT		 2459 return (rval);
2460 }
2461
2462 if (topo == 4) {
7c3df132
SK		 2463 ql_log(ql_log_info, vha, 0x200a,
2464 "Cannot get topology - retrying.\n");
1da177e4
LT		 2465 return (QLA_FUNCTION_FAILED);
2466 }
2467
e315cd28 2468 vha->loop_id = loop_id;
1da177e4
LT		 2469
2470 /* initialize */
2471 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
2472 ha->operating_mode = LOOP;
2c3dfe3f 2473 ha->switch_cap = 0;
1da177e4
LT		 2474
2475 switch (topo) {
2476 case 0:
7c3df132 2477 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
1da177e4
LT		 2478 ha->current_topology = ISP_CFG_NL;
2479 strcpy(connect_type, "(Loop)");
2480 break;
2481
2482 case 1:
7c3df132 2483 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
2c3dfe3f 2484 ha->switch_cap = sw_cap;
1da177e4
LT		 2485 ha->current_topology = ISP_CFG_FL;
2486 strcpy(connect_type, "(FL_Port)");
2487 break;
2488
2489 case 2:
7c3df132 2490 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
1da177e4
LT		 2491 ha->operating_mode = P2P;
2492 ha->current_topology = ISP_CFG_N;
2493 strcpy(connect_type, "(N_Port-to-N_Port)");
2494 break;
2495
2496 case 3:
7c3df132 2497 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
2c3dfe3f 2498 ha->switch_cap = sw_cap;
1da177e4
LT		 2499 ha->operating_mode = P2P;
2500 ha->current_topology = ISP_CFG_F;
2501 strcpy(connect_type, "(F_Port)");
2502 break;
2503
2504 default:
7c3df132
SK		 2505 ql_dbg(ql_dbg_disc, vha, 0x200f,
2506 "HBA in unknown topology %x, using NL.\n", topo);
1da177e4
LT		 2507 ha->current_topology = ISP_CFG_NL;
2508 strcpy(connect_type, "(Loop)");
2509 break;
2510 }
2511
2512 /* Save Host port and loop ID. */
2513 /* byte order - Big Endian */
e315cd28
AC		 2514 vha->d_id.b.domain = domain;
2515 vha->d_id.b.area = area;
2516 vha->d_id.b.al_pa = al_pa;
1da177e4 2517
f24b5cb8 2518 spin_lock_irqsave(&ha->vport_slock, flags);
2d70c103 2519 qlt_update_vp_map(vha, SET_AL_PA);
f24b5cb8 2520 spin_unlock_irqrestore(&ha->vport_slock, flags);
2d70c103 2521
e315cd28 2522 if (!vha->flags.init_done)
7c3df132
SK		 2523 ql_log(ql_log_info, vha, 0x2010,
2524 "Topology - %s, Host Loop address 0x%x.\n",
e315cd28 2525 connect_type, vha->loop_id);
1da177e4 2526
1da177e4
LT		 2527 return(rval);
2528}
2529
a9083016 2530inline void
e315cd28
AC		 2531qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
2532 char *def)
9bb9fcf2
AV		 2533{
2534 char *st, *en;
2535 uint16_t index;
e315cd28 2536 struct qla_hw_data *ha = vha->hw;
ab671149 2537 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
6246b8a1 2538 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
9bb9fcf2
AV		 2539
2540 if (memcmp(model, BINZERO, len) != 0) {
2541 strncpy(ha->model_number, model, len);
2542 st = en = ha->model_number;
2543 en += len - 1;
2544 while (en > st) {
2545 if (*en != 0x20 && *en != 0x00)
2546 break;
2547 *en-- = '\0';
2548 }
2549
2550 index = (ha->pdev->subsystem_device & 0xff);
7d0dba17
AV		 2551 if (use_tbl &&
2552 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
9bb9fcf2 2553 index < QLA_MODEL_NAMES)
1ee27146
JC		 2554 strncpy(ha->model_desc,
2555 qla2x00_model_name[index * 2 + 1],
2556 sizeof(ha->model_desc) - 1);
9bb9fcf2
AV		 2557 } else {
2558 index = (ha->pdev->subsystem_device & 0xff);
7d0dba17
AV		 2559 if (use_tbl &&
2560 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
9bb9fcf2
AV		 2561 index < QLA_MODEL_NAMES) {
2562 strcpy(ha->model_number,
2563 qla2x00_model_name[index * 2]);
1ee27146
JC		 2564 strncpy(ha->model_desc,
2565 qla2x00_model_name[index * 2 + 1],
2566 sizeof(ha->model_desc) - 1);
9bb9fcf2
AV		 2567 } else {
2568 strcpy(ha->model_number, def);
2569 }
2570 }
1ee27146 2571 if (IS_FWI2_CAPABLE(ha))
e315cd28 2572 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
1ee27146 2573 sizeof(ha->model_desc));
9bb9fcf2
AV		 2574}
2575
4e08df3f
DM		 2576/* On sparc systems, obtain port and node WWN from firmware
2577 * properties.
2578 */
e315cd28 2579static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4e08df3f
DM		 2580{
2581#ifdef CONFIG_SPARC
e315cd28 2582 struct qla_hw_data *ha = vha->hw;
4e08df3f 2583 struct pci_dev *pdev = ha->pdev;
15576bc8
DM		 2584 struct device_node *dp = pci_device_to_OF_node(pdev);
2585 const u8 *val;
4e08df3f
DM		 2586 int len;
2587
2588 val = of_get_property(dp, "port-wwn", &len);
2589 if (val && len >= WWN_SIZE)
2590 memcpy(nv->port_name, val, WWN_SIZE);
2591
2592 val = of_get_property(dp, "node-wwn", &len);
2593 if (val && len >= WWN_SIZE)
2594 memcpy(nv->node_name, val, WWN_SIZE);
2595#endif
2596}
2597
1da177e4
LT		 2598/*
2599* NVRAM configuration for ISP 2xxx
2600*
2601* Input:
2602* ha = adapter block pointer.
2603*
2604* Output:
2605* initialization control block in response_ring
2606* host adapters parameters in host adapter block
2607*
2608* Returns:
2609* 0 = success.
2610*/
abbd8870 2611int
e315cd28 2612qla2x00_nvram_config(scsi_qla_host_t *vha)
1da177e4 2613{
4e08df3f 2614 int rval;
0107109e
AV		 2615 uint8_t chksum = 0;
2616 uint16_t cnt;
2617 uint8_t *dptr1, *dptr2;
e315cd28 2618 struct qla_hw_data *ha = vha->hw;
0107109e 2619 init_cb_t *icb = ha->init_cb;
281afe19
SJ		 2620 nvram_t *nv = ha->nvram;
2621 uint8_t *ptr = ha->nvram;
3d71644c 2622 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 2623
4e08df3f
DM		 2624 rval = QLA_SUCCESS;
2625
1da177e4 2626 /* Determine NVRAM starting address. */
0107109e 2627 ha->nvram_size = sizeof(nvram_t);
1da177e4
LT		 2628 ha->nvram_base = 0;
2629 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
2630 if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
2631 ha->nvram_base = 0x80;
2632
2633 /* Get NVRAM data and calculate checksum. */
e315cd28 2634 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
0107109e
AV		 2635 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
2636 chksum += *ptr++;
1da177e4 2637
7c3df132
SK		 2638 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
2639 "Contents of NVRAM.\n");
2640 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
2641 (uint8_t *)nv, ha->nvram_size);
1da177e4
LT		 2642
2643 /* Bad NVRAM data, set defaults parameters. */
2644 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
2645 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
2646 /* Reset NVRAM data. */
7c3df132 2647 ql_log(ql_log_warn, vha, 0x0064,
9e336520 2648 "Inconsistent NVRAM "
7c3df132
SK		 2649 "detected: checksum=0x%x id=%c version=0x%x.\n",
2650 chksum, nv->id[0], nv->nvram_version);
2651 ql_log(ql_log_warn, vha, 0x0065,
2652 "Falling back to "
2653 "functioning (yet invalid -- WWPN) defaults.\n");
4e08df3f
DM		 2654
2655 /*
2656 * Set default initialization control block.
2657 */
2658 memset(nv, 0, ha->nvram_size);
2659 nv->parameter_block_version = ICB_VERSION;
2660
2661 if (IS_QLA23XX(ha)) {
2662 nv->firmware_options[0] = BIT_2 | BIT_1;
2663 nv->firmware_options[1] = BIT_7 | BIT_5;
2664 nv->add_firmware_options[0] = BIT_5;
2665 nv->add_firmware_options[1] = BIT_5 | BIT_4;
98aee70d 2666 nv->frame_payload_size = 2048;
4e08df3f
DM		 2667 nv->special_options[1] = BIT_7;
2668 } else if (IS_QLA2200(ha)) {
2669 nv->firmware_options[0] = BIT_2 | BIT_1;
2670 nv->firmware_options[1] = BIT_7 | BIT_5;
2671 nv->add_firmware_options[0] = BIT_5;
2672 nv->add_firmware_options[1] = BIT_5 | BIT_4;
98aee70d 2673 nv->frame_payload_size = 1024;
4e08df3f
DM		 2674 } else if (IS_QLA2100(ha)) {
2675 nv->firmware_options[0] = BIT_3 | BIT_1;
2676 nv->firmware_options[1] = BIT_5;
98aee70d 2677 nv->frame_payload_size = 1024;
4e08df3f
DM		 2678 }
2679
2680 nv->max_iocb_allocation = __constant_cpu_to_le16(256);
2681 nv->execution_throttle = __constant_cpu_to_le16(16);
2682 nv->retry_count = 8;
2683 nv->retry_delay = 1;
2684
2685 nv->port_name[0] = 33;
2686 nv->port_name[3] = 224;
2687 nv->port_name[4] = 139;
2688
e315cd28 2689 qla2xxx_nvram_wwn_from_ofw(vha, nv);
4e08df3f
DM		 2690
2691 nv->login_timeout = 4;
2692
2693 /*
2694 * Set default host adapter parameters
2695 */
2696 nv->host_p[1] = BIT_2;
2697 nv->reset_delay = 5;
2698 nv->port_down_retry_count = 8;
2699 nv->max_luns_per_target = __constant_cpu_to_le16(8);
2700 nv->link_down_timeout = 60;
2701
2702 rval = 1;
1da177e4
LT		 2703 }
2704
2705#if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
2706 /*
2707 * The SN2 does not provide BIOS emulation which means you can't change
2708 * potentially bogus BIOS settings. Force the use of default settings
2709 * for link rate and frame size. Hope that the rest of the settings
2710 * are valid.
2711 */
2712 if (ia64_platform_is("sn2")) {
98aee70d 2713 nv->frame_payload_size = 2048;
1da177e4
LT		 2714 if (IS_QLA23XX(ha))
2715 nv->special_options[1] = BIT_7;
2716 }
2717#endif
2718
2719 /* Reset Initialization control block */
0107109e 2720 memset(icb, 0, ha->init_cb_size);
1da177e4
LT		 2721
2722 /*
2723 * Setup driver NVRAM options.
2724 */
2725 nv->firmware_options[0] |= (BIT_6 | BIT_1);
2726 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
2727 nv->firmware_options[1] |= (BIT_5 | BIT_0);
2728 nv->firmware_options[1] &= ~BIT_4;
2729
2730 if (IS_QLA23XX(ha)) {
2731 nv->firmware_options[0] |= BIT_2;
2732 nv->firmware_options[0] &= ~BIT_3;
2d70c103 2733 nv->special_options[0] &= ~BIT_6;
0107109e 2734 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
1da177e4
LT		 2735
2736 if (IS_QLA2300(ha)) {
2737 if (ha->fb_rev == FPM_2310) {
2738 strcpy(ha->model_number, "QLA2310");
2739 } else {
2740 strcpy(ha->model_number, "QLA2300");
2741 }
2742 } else {
e315cd28 2743 qla2x00_set_model_info(vha, nv->model_number,
9bb9fcf2 2744 sizeof(nv->model_number), "QLA23xx");
1da177e4
LT		 2745 }
2746 } else if (IS_QLA2200(ha)) {
2747 nv->firmware_options[0] |= BIT_2;
2748 /*
2749 * 'Point-to-point preferred, else loop' is not a safe
2750 * connection mode setting.
2751 */
2752 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
2753 (BIT_5 | BIT_4)) {
2754 /* Force 'loop preferred, else point-to-point'. */
2755 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
2756 nv->add_firmware_options[0] |= BIT_5;
2757 }
2758 strcpy(ha->model_number, "QLA22xx");
2759 } else /*if (IS_QLA2100(ha))*/ {
2760 strcpy(ha->model_number, "QLA2100");
2761 }
2762
2763 /*
2764 * Copy over NVRAM RISC parameter block to initialization control block.
2765 */
2766 dptr1 = (uint8_t *)icb;
2767 dptr2 = (uint8_t *)&nv->parameter_block_version;
2768 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
2769 while (cnt--)
2770 *dptr1++ = *dptr2++;
2771
2772 /* Copy 2nd half. */
2773 dptr1 = (uint8_t *)icb->add_firmware_options;
2774 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
2775 while (cnt--)
2776 *dptr1++ = *dptr2++;
2777
5341e868
AV		 2778 /* Use alternate WWN? */
2779 if (nv->host_p[1] & BIT_7) {
2780 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
2781 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
2782 }
2783
1da177e4
LT		 2784 /* Prepare nodename */
2785 if ((icb->firmware_options[1] & BIT_6) == 0) {
2786 /*
2787 * Firmware will apply the following mask if the nodename was
2788 * not provided.
2789 */
2790 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
2791 icb->node_name[0] &= 0xF0;
2792 }
2793
2794 /*
2795 * Set host adapter parameters.
2796 */
3ce8866c
SK		 2797
2798 /*
2799 * BIT_7 in the host-parameters section allows for modification to
2800 * internal driver logging.
2801 */
0181944f 2802 if (nv->host_p[0] & BIT_7)
cfb0919c 2803 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
1da177e4
LT		 2804 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
2805 /* Always load RISC code on non ISP2[12]00 chips. */
2806 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
2807 ha->flags.disable_risc_code_load = 0;
2808 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
2809 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
2810 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
06c22bd1 2811 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
d4c760c2 2812 ha->flags.disable_serdes = 0;
1da177e4
LT		 2813
2814 ha->operating_mode =
2815 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
2816
2817 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
2818 sizeof(ha->fw_seriallink_options));
2819
2820 /* save HBA serial number */
2821 ha->serial0 = icb->port_name[5];
2822 ha->serial1 = icb->port_name[6];
2823 ha->serial2 = icb->port_name[7];
e315cd28
AC		 2824 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
2825 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
1da177e4
LT		 2826
2827 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
2828
2829 ha->retry_count = nv->retry_count;
2830
2831 /* Set minimum login_timeout to 4 seconds. */
5b91490e 2832 if (nv->login_timeout != ql2xlogintimeout)
1da177e4
LT		 2833 nv->login_timeout = ql2xlogintimeout;
2834 if (nv->login_timeout < 4)
2835 nv->login_timeout = 4;
2836 ha->login_timeout = nv->login_timeout;
2837 icb->login_timeout = nv->login_timeout;
2838
00a537b8
AV		 2839 /* Set minimum RATOV to 100 tenths of a second. */
2840 ha->r_a_tov = 100;
1da177e4 2841
1da177e4
LT		 2842 ha->loop_reset_delay = nv->reset_delay;
2843
1da177e4
LT		 2844 /* Link Down Timeout = 0:
2845 *
2846 * When Port Down timer expires we will start returning
2847 * I/O's to OS with "DID_NO_CONNECT".
2848 *
2849 * Link Down Timeout != 0:
2850 *
2851 * The driver waits for the link to come up after link down
2852 * before returning I/Os to OS with "DID_NO_CONNECT".
fa2a1ce5 2853 */
1da177e4
LT		 2854 if (nv->link_down_timeout == 0) {
2855 ha->loop_down_abort_time =
354d6b21 2856 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
1da177e4
LT		 2857 } else {
2858 ha->link_down_timeout = nv->link_down_timeout;
2859 ha->loop_down_abort_time =
2860 (LOOP_DOWN_TIME - ha->link_down_timeout);
fa2a1ce5 2861 }
1da177e4 2862
1da177e4
LT		 2863 /*
2864 * Need enough time to try and get the port back.
2865 */
2866 ha->port_down_retry_count = nv->port_down_retry_count;
2867 if (qlport_down_retry)
2868 ha->port_down_retry_count = qlport_down_retry;
2869 /* Set login_retry_count */
2870 ha->login_retry_count = nv->retry_count;
2871 if (ha->port_down_retry_count == nv->port_down_retry_count &&
2872 ha->port_down_retry_count > 3)
2873 ha->login_retry_count = ha->port_down_retry_count;
2874 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
2875 ha->login_retry_count = ha->port_down_retry_count;
2876 if (ql2xloginretrycount)
2877 ha->login_retry_count = ql2xloginretrycount;
2878
1da177e4
LT		 2879 icb->lun_enables = __constant_cpu_to_le16(0);
2880 icb->command_resource_count = 0;
2881 icb->immediate_notify_resource_count = 0;
2882 icb->timeout = __constant_cpu_to_le16(0);
2883
2884 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
2885 /* Enable RIO */
2886 icb->firmware_options[0] &= ~BIT_3;
2887 icb->add_firmware_options[0] &=
2888 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
2889 icb->add_firmware_options[0] |= BIT_2;
2890 icb->response_accumulation_timer = 3;
2891 icb->interrupt_delay_timer = 5;
2892
e315cd28 2893 vha->flags.process_response_queue = 1;
1da177e4 2894 } else {
4fdfefe5 2895 /* Enable ZIO. */
e315cd28 2896 if (!vha->flags.init_done) {
4fdfefe5
AV		 2897 ha->zio_mode = icb->add_firmware_options[0] &
2898 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
2899 ha->zio_timer = icb->interrupt_delay_timer ?
2900 icb->interrupt_delay_timer: 2;
2901 }
1da177e4
LT		 2902 icb->add_firmware_options[0] &=
2903 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
e315cd28 2904 vha->flags.process_response_queue = 0;
4fdfefe5 2905 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4a59f71d
AV		 2906 ha->zio_mode = QLA_ZIO_MODE_6;
2907
7c3df132 2908 ql_log(ql_log_info, vha, 0x0068,
4fdfefe5
AV		 2909 "ZIO mode %d enabled; timer delay (%d us).\n",
2910 ha->zio_mode, ha->zio_timer * 100);
1da177e4 2911
4fdfefe5
AV		 2912 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
2913 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
e315cd28 2914 vha->flags.process_response_queue = 1;
1da177e4
LT		 2915 }
2916 }
2917
4e08df3f 2918 if (rval) {
7c3df132
SK		 2919 ql_log(ql_log_warn, vha, 0x0069,
2920 "NVRAM configuration failed.\n");
4e08df3f
DM		 2921 }
2922 return (rval);
1da177e4
LT		 2923}
2924
19a7b4ae
JSEC		 2925static void
2926qla2x00_rport_del(void *data)
2927{
2928 fc_port_t *fcport = data;
d97994dc 2929 struct fc_rport *rport;
044d78e1 2930 unsigned long flags;
d97994dc 2931
044d78e1 2932 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
ac280b67 2933 rport = fcport->drport ? fcport->drport: fcport->rport;
d97994dc 2934 fcport->drport = NULL;
044d78e1 2935 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
df673274 2936 if (rport)
d97994dc 2937 fc_remote_port_delete(rport);
19a7b4ae
JSEC		 2938}
2939
1da177e4
LT		 2940/**
2941 * qla2x00_alloc_fcport() - Allocate a generic fcport.
2942 * @ha: HA context
2943 * @flags: allocation flags
2944 *
2945 * Returns a pointer to the allocated fcport, or NULL, if none available.
2946 */
9a069e19 2947fc_port_t *
e315cd28 2948qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
1da177e4
LT		 2949{
2950 fc_port_t *fcport;
2951
bbfbbbc1
MK		 2952 fcport = kzalloc(sizeof(fc_port_t), flags);
2953 if (!fcport)
2954 return NULL;
1da177e4
LT		 2955
2956 /* Setup fcport template structure. */
e315cd28 2957 fcport->vha = vha;
1da177e4
LT		 2958 fcport->port_type = FCT_UNKNOWN;
2959 fcport->loop_id = FC_NO_LOOP_ID;
ec426e10 2960 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
ad3e0eda 2961 fcport->supported_classes = FC_COS_UNSPECIFIED;
1da177e4 2962
bbfbbbc1 2963 return fcport;
1da177e4
LT		 2964}
2965
2966/*
2967 * qla2x00_configure_loop
2968 * Updates Fibre Channel Device Database with what is actually on loop.
2969 *
2970 * Input:
2971 * ha = adapter block pointer.
2972 *
2973 * Returns:
2974 * 0 = success.
2975 * 1 = error.
2976 * 2 = database was full and device was not configured.
2977 */
2978static int
e315cd28 2979qla2x00_configure_loop(scsi_qla_host_t *vha)
1da177e4
LT		 2980{
2981 int rval;
2982 unsigned long flags, save_flags;
e315cd28 2983 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 2984 rval = QLA_SUCCESS;
2985
2986 /* Get Initiator ID */
e315cd28
AC		 2987 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
2988 rval = qla2x00_configure_hba(vha);
1da177e4 2989 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2990 ql_dbg(ql_dbg_disc, vha, 0x2013,
2991 "Unable to configure HBA.\n");
1da177e4
LT		 2992 return (rval);
2993 }
2994 }
2995
e315cd28 2996 save_flags = flags = vha->dpc_flags;
7c3df132
SK		 2997 ql_dbg(ql_dbg_disc, vha, 0x2014,
2998 "Configure loop -- dpc flags = 0x%lx.\n", flags);
1da177e4
LT		 2999
3000 /*
3001 * If we have both an RSCN and PORT UPDATE pending then handle them
3002 * both at the same time.
3003 */
e315cd28
AC		 3004 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
3005 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
1da177e4 3006
3064ff39
MH		 3007 qla2x00_get_data_rate(vha);
3008
1da177e4
LT		 3009 /* Determine what we need to do */
3010 if (ha->current_topology == ISP_CFG_FL &&
3011 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
3012
1da177e4
LT		 3013 set_bit(RSCN_UPDATE, &flags);
3014
3015 } else if (ha->current_topology == ISP_CFG_F &&
3016 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
3017
1da177e4
LT		 3018 set_bit(RSCN_UPDATE, &flags);
3019 clear_bit(LOCAL_LOOP_UPDATE, &flags);
21333b48
AV		 3020
3021 } else if (ha->current_topology == ISP_CFG_N) {
3022 clear_bit(RSCN_UPDATE, &flags);
1da177e4 3023
e315cd28 3024 } else if (!vha->flags.online ||
1da177e4
LT		 3025 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
3026
1da177e4
LT		 3027 set_bit(RSCN_UPDATE, &flags);
3028 set_bit(LOCAL_LOOP_UPDATE, &flags);
3029 }
3030
3031 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
7c3df132
SK		 3032 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
3033 ql_dbg(ql_dbg_disc, vha, 0x2015,
3034 "Loop resync needed, failing.\n");
1da177e4 3035 rval = QLA_FUNCTION_FAILED;
642ef983 3036 } else
e315cd28 3037 rval = qla2x00_configure_local_loop(vha);
1da177e4
LT		 3038 }
3039
3040 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
7c3df132
SK		 3041 if (LOOP_TRANSITION(vha)) {
3042 ql_dbg(ql_dbg_disc, vha, 0x201e,
3043 "Needs RSCN update and loop transition.\n");
1da177e4 3044 rval = QLA_FUNCTION_FAILED;
7c3df132 3045 }
e315cd28
AC		 3046 else
3047 rval = qla2x00_configure_fabric(vha);
1da177e4
LT		 3048 }
3049
3050 if (rval == QLA_SUCCESS) {
e315cd28
AC		 3051 if (atomic_read(&vha->loop_down_timer) ||
3052 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1da177e4
LT		 3053 rval = QLA_FUNCTION_FAILED;
3054 } else {
e315cd28 3055 atomic_set(&vha->loop_state, LOOP_READY);
7c3df132
SK		 3056 ql_dbg(ql_dbg_disc, vha, 0x2069,
3057 "LOOP READY.\n");
1da177e4
LT		 3058 }
3059 }
3060
3061 if (rval) {
7c3df132
SK		 3062 ql_dbg(ql_dbg_disc, vha, 0x206a,
3063 "%s *** FAILED ***.\n", __func__);
1da177e4 3064 } else {
7c3df132
SK		 3065 ql_dbg(ql_dbg_disc, vha, 0x206b,
3066 "%s: exiting normally.\n", __func__);
1da177e4
LT		 3067 }
3068
cc3ef7bc 3069 /* Restore state if a resync event occurred during processing */
e315cd28 3070 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1da177e4 3071 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
e315cd28 3072 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
f4658b6c 3073 if (test_bit(RSCN_UPDATE, &save_flags)) {
e315cd28 3074 set_bit(RSCN_UPDATE, &vha->dpc_flags);
f4658b6c 3075 }
1da177e4
LT		 3076 }
3077
3078 return (rval);
3079}
3080
3081
3082
3083/*
3084 * qla2x00_configure_local_loop
3085 * Updates Fibre Channel Device Database with local loop devices.
3086 *
3087 * Input:
3088 * ha = adapter block pointer.
3089 *
3090 * Returns:
3091 * 0 = success.
3092 */
3093static int
e315cd28 3094qla2x00_configure_local_loop(scsi_qla_host_t *vha)
1da177e4
LT		 3095{
3096 int rval, rval2;
3097 int found_devs;
3098 int found;
3099 fc_port_t *fcport, *new_fcport;
3100
3101 uint16_t index;
3102 uint16_t entries;
3103 char *id_iter;
3104 uint16_t loop_id;
3105 uint8_t domain, area, al_pa;
e315cd28 3106 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 3107
3108 found_devs = 0;
3109 new_fcport = NULL;
642ef983 3110 entries = MAX_FIBRE_DEVICES_LOOP;
1da177e4 3111
1da177e4 3112 /* Get list of logged in devices. */
642ef983 3113 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
e315cd28 3114 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
1da177e4
LT		 3115 &entries);
3116 if (rval != QLA_SUCCESS)
3117 goto cleanup_allocation;
3118
7c3df132
SK		 3119 ql_dbg(ql_dbg_disc, vha, 0x2017,
3120 "Entries in ID list (%d).\n", entries);
3121 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
3122 (uint8_t *)ha->gid_list,
3123 entries * sizeof(struct gid_list_info));
1da177e4
LT		 3124
3125 /* Allocate temporary fcport for any new fcports discovered. */
e315cd28 3126 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 3127 if (new_fcport == NULL) {
7c3df132
SK		 3128 ql_log(ql_log_warn, vha, 0x2018,
3129 "Memory allocation failed for fcport.\n");
1da177e4
LT		 3130 rval = QLA_MEMORY_ALLOC_FAILED;
3131 goto cleanup_allocation;
3132 }
3133 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
3134
3135 /*
3136 * Mark local devices that were present with FCF_DEVICE_LOST for now.
3137 */
e315cd28 3138 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 3139 if (atomic_read(&fcport->state) == FCS_ONLINE &&
3140 fcport->port_type != FCT_BROADCAST &&
3141 (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
3142
7c3df132
SK		 3143 ql_dbg(ql_dbg_disc, vha, 0x2019,
3144 "Marking port lost loop_id=0x%04x.\n",
3145 fcport->loop_id);
1da177e4 3146
ec426e10 3147 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
1da177e4
LT		 3148 }
3149 }
3150
3151 /* Add devices to port list. */
3152 id_iter = (char *)ha->gid_list;
3153 for (index = 0; index < entries; index++) {
3154 domain = ((struct gid_list_info *)id_iter)->domain;
3155 area = ((struct gid_list_info *)id_iter)->area;
3156 al_pa = ((struct gid_list_info *)id_iter)->al_pa;
abbd8870 3157 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1da177e4
LT		 3158 loop_id = (uint16_t)
3159 ((struct gid_list_info *)id_iter)->loop_id_2100;
abbd8870 3160 else
1da177e4
LT		 3161 loop_id = le16_to_cpu(
3162 ((struct gid_list_info *)id_iter)->loop_id);
abbd8870 3163 id_iter += ha->gid_list_info_size;
1da177e4
LT		 3164
3165 /* Bypass reserved domain fields. */
3166 if ((domain & 0xf0) == 0xf0)
3167 continue;
3168
3169 /* Bypass if not same domain and area of adapter. */
f7d289f6 3170 if (area && domain &&
e315cd28 3171 (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
1da177e4
LT		 3172 continue;
3173
3174 /* Bypass invalid local loop ID. */
3175 if (loop_id > LAST_LOCAL_LOOP_ID)
3176 continue;
3177
370d550e
AE		 3178 memset(new_fcport, 0, sizeof(fc_port_t));
3179
1da177e4
LT		 3180 /* Fill in member data. */
3181 new_fcport->d_id.b.domain = domain;
3182 new_fcport->d_id.b.area = area;
3183 new_fcport->d_id.b.al_pa = al_pa;
3184 new_fcport->loop_id = loop_id;
e315cd28 3185 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
1da177e4 3186 if (rval2 != QLA_SUCCESS) {
7c3df132
SK		 3187 ql_dbg(ql_dbg_disc, vha, 0x201a,
3188 "Failed to retrieve fcport information "
3189 "-- get_port_database=%x, loop_id=0x%04x.\n",
3190 rval2, new_fcport->loop_id);
3191 ql_dbg(ql_dbg_disc, vha, 0x201b,
3192 "Scheduling resync.\n");
e315cd28 3193 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1da177e4
LT		 3194 continue;
3195 }
3196
3197 /* Check for matching device in port list. */
3198 found = 0;
3199 fcport = NULL;
e315cd28 3200 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 3201 if (memcmp(new_fcport->port_name, fcport->port_name,
3202 WWN_SIZE))
3203 continue;
3204
ddb9b126 3205 fcport->flags &= ~FCF_FABRIC_DEVICE;
1da177e4
LT		 3206 fcport->loop_id = new_fcport->loop_id;
3207 fcport->port_type = new_fcport->port_type;
3208 fcport->d_id.b24 = new_fcport->d_id.b24;
3209 memcpy(fcport->node_name, new_fcport->node_name,
3210 WWN_SIZE);
3211
3212 found++;
3213 break;
3214 }
3215
3216 if (!found) {
3217 /* New device, add to fcports list. */
e315cd28 3218 list_add_tail(&new_fcport->list, &vha->vp_fcports);
1da177e4
LT		 3219
3220 /* Allocate a new replacement fcport. */
3221 fcport = new_fcport;
e315cd28 3222 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 3223 if (new_fcport == NULL) {
7c3df132
SK		 3224 ql_log(ql_log_warn, vha, 0x201c,
3225 "Failed to allocate memory for fcport.\n");
1da177e4
LT		 3226 rval = QLA_MEMORY_ALLOC_FAILED;
3227 goto cleanup_allocation;
3228 }
3229 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
3230 }
3231
d8b45213 3232 /* Base iIDMA settings on HBA port speed. */
a3cbdfad 3233 fcport->fp_speed = ha->link_data_rate;
d8b45213 3234
e315cd28 3235 qla2x00_update_fcport(vha, fcport);
1da177e4
LT		 3236
3237 found_devs++;
3238 }
3239
3240cleanup_allocation:
c9475cb0 3241 kfree(new_fcport);
1da177e4
LT		 3242
3243 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3244 ql_dbg(ql_dbg_disc, vha, 0x201d,
3245 "Configure local loop error exit: rval=%x.\n", rval);
1da177e4
LT		 3246 }
3247
1da177e4
LT		 3248 return (rval);
3249}
3250
d8b45213 3251static void
e315cd28 3252qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
d8b45213 3253{
d8b45213 3254 int rval;
93f2bd67 3255 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28 3256 struct qla_hw_data *ha = vha->hw;
d8b45213 3257
c76f2c01 3258 if (!IS_IIDMA_CAPABLE(ha))
d8b45213
AV		 3259 return;
3260
c9afb9a2
GM		 3261 if (atomic_read(&fcport->state) != FCS_ONLINE)
3262 return;
3263
39bd9622
AV		 3264 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
3265 fcport->fp_speed > ha->link_data_rate)
d8b45213
AV		 3266 return;
3267
e315cd28 3268 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
a3cbdfad 3269 mb);
d8b45213 3270 if (rval != QLA_SUCCESS) {
7c3df132 3271 ql_dbg(ql_dbg_disc, vha, 0x2004,
7b833558
OK		 3272 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
3273 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
d8b45213 3274 } else {
7c3df132 3275 ql_dbg(ql_dbg_disc, vha, 0x2005,
7b833558 3276 "iIDMA adjusted to %s GB/s on %8phN.\n",
d0297c9a 3277 qla2x00_get_link_speed_str(ha, fcport->fp_speed),
7b833558 3278 fcport->port_name);
d8b45213
AV		 3279 }
3280}
3281
23be331d 3282static void
e315cd28 3283qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
8482e118
AV		 3284{
3285 struct fc_rport_identifiers rport_ids;
bdf79621 3286 struct fc_rport *rport;
044d78e1 3287 unsigned long flags;
8482e118 3288
f8b02a85
AV		 3289 rport_ids.node_name = wwn_to_u64(fcport->node_name);
3290 rport_ids.port_name = wwn_to_u64(fcport->port_name);
8482e118
AV		 3291 rport_ids.port_id = fcport->d_id.b.domain << 16 |
3292 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
77d74143 3293 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
e315cd28 3294 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
77d74143 3295 if (!rport) {
7c3df132
SK		 3296 ql_log(ql_log_warn, vha, 0x2006,
3297 "Unable to allocate fc remote port.\n");
77d74143
AV		 3298 return;
3299 }
2d70c103
NB		 3300 /*
3301 * Create target mode FC NEXUS in qla_target.c if target mode is
3302 * enabled..
3303 */
ba9f6f64 3304
2d70c103
NB		 3305 qlt_fc_port_added(vha, fcport);
3306
044d78e1 3307 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
19a7b4ae 3308 *((fc_port_t **)rport->dd_data) = fcport;
044d78e1 3309 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
d97994dc 3310
ad3e0eda 3311 rport->supported_classes = fcport->supported_classes;
77d74143 3312
8482e118
AV		 3313 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
3314 if (fcport->port_type == FCT_INITIATOR)
3315 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
3316 if (fcport->port_type == FCT_TARGET)
3317 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
77d74143 3318 fc_remote_port_rolechg(rport, rport_ids.roles);
1da177e4
LT		 3319}
3320
23be331d
AB		 3321/*
3322 * qla2x00_update_fcport
3323 * Updates device on list.
3324 *
3325 * Input:
3326 * ha = adapter block pointer.
3327 * fcport = port structure pointer.
3328 *
3329 * Return:
3330 * 0 - Success
3331 * BIT_0 - error
3332 *
3333 * Context:
3334 * Kernel context.
3335 */
3336void
e315cd28 3337qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
23be331d 3338{
e315cd28 3339 fcport->vha = vha;
8ae6d9c7
GM		 3340
3341 if (IS_QLAFX00(vha->hw)) {
3342 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
3343 qla2x00_reg_remote_port(vha, fcport);
3344 return;
3345 }
23be331d 3346 fcport->login_retry = 0;
5ff1d584 3347 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
23be331d 3348
1f93da52 3349 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
e315cd28 3350 qla2x00_iidma_fcport(vha, fcport);
21090cbe 3351 qla24xx_update_fcport_fcp_prio(vha, fcport);
e315cd28 3352 qla2x00_reg_remote_port(vha, fcport);
23be331d
AB		 3353}
3354
1da177e4
LT		 3355/*
3356 * qla2x00_configure_fabric
3357 * Setup SNS devices with loop ID's.
3358 *
3359 * Input:
3360 * ha = adapter block pointer.
3361 *
3362 * Returns:
3363 * 0 = success.
3364 * BIT_0 = error
3365 */
3366static int
e315cd28 3367qla2x00_configure_fabric(scsi_qla_host_t *vha)
1da177e4 3368{
b3b02e6e 3369 int rval;
e452ceb6 3370 fc_port_t *fcport, *fcptemp;
1da177e4
LT		 3371 uint16_t next_loopid;
3372 uint16_t mb[MAILBOX_REGISTER_COUNT];
0107109e 3373 uint16_t loop_id;
1da177e4 3374 LIST_HEAD(new_fcports);
e315cd28
AC		 3375 struct qla_hw_data *ha = vha->hw;
3376 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
df673274 3377 int discovery_gen;
1da177e4
LT		 3378
3379 /* If FL port exists, then SNS is present */
e428924c 3380 if (IS_FWI2_CAPABLE(ha))
0107109e
AV		 3381 loop_id = NPH_F_PORT;
3382 else
3383 loop_id = SNS_FL_PORT;
e315cd28 3384 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
1da177e4 3385 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3386 ql_dbg(ql_dbg_disc, vha, 0x201f,
3387 "MBX_GET_PORT_NAME failed, No FL Port.\n");
1da177e4 3388
e315cd28 3389 vha->device_flags &= ~SWITCH_FOUND;
1da177e4
LT		 3390 return (QLA_SUCCESS);
3391 }
e315cd28 3392 vha->device_flags |= SWITCH_FOUND;
1da177e4 3393
1da177e4 3394 do {
cca5335c
AV		 3395 /* FDMI support. */
3396 if (ql2xfdmienable &&
e315cd28
AC		 3397 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
3398 qla2x00_fdmi_register(vha);
cca5335c 3399
1da177e4 3400 /* Ensure we are logged into the SNS. */
e428924c 3401 if (IS_FWI2_CAPABLE(ha))
0107109e
AV		 3402 loop_id = NPH_SNS;
3403 else
3404 loop_id = SIMPLE_NAME_SERVER;
0b91d116
CD		 3405 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
3406 0xfc, mb, BIT_1|BIT_0);
3407 if (rval != QLA_SUCCESS) {
3408 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
e452ceb6 3409 return rval;
0b91d116 3410 }
1da177e4 3411 if (mb[0] != MBS_COMMAND_COMPLETE) {
7c3df132
SK		 3412 ql_dbg(ql_dbg_disc, vha, 0x2042,
3413 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x "
3414 "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1],
3415 mb[2], mb[6], mb[7]);
1da177e4
LT		 3416 return (QLA_SUCCESS);
3417 }
3418
e315cd28
AC		 3419 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
3420 if (qla2x00_rft_id(vha)) {
1da177e4 3421 /* EMPTY */
7c3df132
SK		 3422 ql_dbg(ql_dbg_disc, vha, 0x2045,
3423 "Register FC-4 TYPE failed.\n");
1da177e4 3424 }
e315cd28 3425 if (qla2x00_rff_id(vha)) {
1da177e4 3426 /* EMPTY */
7c3df132
SK		 3427 ql_dbg(ql_dbg_disc, vha, 0x2049,
3428 "Register FC-4 Features failed.\n");
1da177e4 3429 }
e315cd28 3430 if (qla2x00_rnn_id(vha)) {
1da177e4 3431 /* EMPTY */
7c3df132
SK		 3432 ql_dbg(ql_dbg_disc, vha, 0x204f,
3433 "Register Node Name failed.\n");
e315cd28 3434 } else if (qla2x00_rsnn_nn(vha)) {
1da177e4 3435 /* EMPTY */
7c3df132
SK		 3436 ql_dbg(ql_dbg_disc, vha, 0x2053,
3437 "Register Symobilic Node Name failed.\n");
1da177e4
LT		 3438 }
3439 }
3440
827210ba
JC		 3441#define QLA_FCPORT_SCAN 1
3442#define QLA_FCPORT_FOUND 2
3443
3444 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3445 fcport->scan_state = QLA_FCPORT_SCAN;
3446 }
3447
df673274
AP		 3448 /* Mark the time right before querying FW for connected ports.
3449 * This process is long, asynchronous and by the time it's done,
3450 * collected information might not be accurate anymore. E.g.
3451 * disconnected port might have re-connected and a brand new
3452 * session has been created. In this case session's generation
3453 * will be newer than discovery_gen. */
3454 qlt_do_generation_tick(vha, &discovery_gen);
3455
e315cd28 3456 rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
1da177e4
LT		 3457 if (rval != QLA_SUCCESS)
3458 break;
3459
e452ceb6
JC		 3460 /*
3461 * Logout all previous fabric devices marked lost, except
3462 * FCP2 devices.
3463 */
e315cd28
AC		 3464 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3465 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1da177e4
LT		 3466 break;
3467
3468 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
3469 continue;
3470
b2032fd5
RD		 3471 if (fcport->scan_state == QLA_FCPORT_SCAN) {
3472 if (qla_ini_mode_enabled(base_vha) &&
3473 atomic_read(&fcport->state) == FCS_ONLINE) {
3474 qla2x00_mark_device_lost(vha, fcport,
3475 ql2xplogiabsentdevice, 0);
3476 if (fcport->loop_id != FC_NO_LOOP_ID &&
3477 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
3478 fcport->port_type != FCT_INITIATOR &&
3479 fcport->port_type != FCT_BROADCAST) {
3480 ha->isp_ops->fabric_logout(vha,
3481 fcport->loop_id,
3482 fcport->d_id.b.domain,
3483 fcport->d_id.b.area,
3484 fcport->d_id.b.al_pa);
3485 qla2x00_clear_loop_id(fcport);
3486 }
3487 } else if (!qla_ini_mode_enabled(base_vha)) {
3488 /*
3489 * In target mode, explicitly kill
3490 * sessions and log out of devices
3491 * that are gone, so that we don't
3492 * end up with an initiator using the
3493 * wrong ACL (if the fabric recycles
3494 * an FC address and we have a stale
3495 * session around) and so that we don't
3496 * report initiators that are no longer
3497 * on the fabric.
3498 */
3499 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf077,
3500 "port gone, logging out/killing session: "
3501 "%8phC state 0x%x flags 0x%x fc4_type 0x%x "
3502 "scan_state %d\n",
3503 fcport->port_name,
3504 atomic_read(&fcport->state),
3505 fcport->flags, fcport->fc4_type,
3506 fcport->scan_state);
df673274
AP		 3507 qlt_fc_port_deleted(vha, fcport,
3508 discovery_gen);
1da177e4
LT		 3509 }
3510 }
e452ceb6 3511 }
1da177e4 3512
e452ceb6
JC		 3513 /* Starting free loop ID. */
3514 next_loopid = ha->min_external_loopid;
3515
3516 /*
3517 * Scan through our port list and login entries that need to be
3518 * logged in.
3519 */
3520 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3521 if (atomic_read(&vha->loop_down_timer) ||
3522 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3523 break;
3524
3525 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
3526 (fcport->flags & FCF_LOGIN_NEEDED) == 0)
3527 continue;
3528
b2032fd5
RD		 3529 /*
3530 * If we're not an initiator, skip looking for devices
3531 * and logging in. There's no reason for us to do it,
3532 * and it seems to actively cause problems in target
3533 * mode if we race with the initiator logging into us
3534 * (we might get the "port ID used" status back from
3535 * our login command and log out the initiator, which
3536 * seems to cause havoc).
3537 */
3538 if (!qla_ini_mode_enabled(base_vha)) {
3539 if (fcport->scan_state == QLA_FCPORT_FOUND) {
3540 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf078,
3541 "port %8phC state 0x%x flags 0x%x fc4_type 0x%x "
3542 "scan_state %d (initiator mode disabled; skipping "
3543 "login)\n", fcport->port_name,
3544 atomic_read(&fcport->state),
3545 fcport->flags, fcport->fc4_type,
3546 fcport->scan_state);
3547 }
3548 continue;
3549 }
3550
e452ceb6
JC		 3551 if (fcport->loop_id == FC_NO_LOOP_ID) {
3552 fcport->loop_id = next_loopid;
3553 rval = qla2x00_find_new_loop_id(
3554 base_vha, fcport);
3555 if (rval != QLA_SUCCESS) {
3556 /* Ran out of IDs to use */
3557 break;
1da177e4
LT		 3558 }
3559 }
e452ceb6
JC		 3560 /* Login and update database */
3561 qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
3562 }
3563
3564 /* Exit if out of loop IDs. */
3565 if (rval != QLA_SUCCESS) {
3566 break;
3567 }
3568
3569 /*
3570 * Login and add the new devices to our port list.
3571 */
3572 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
3573 if (atomic_read(&vha->loop_down_timer) ||
3574 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3575 break;
3576
b2032fd5
RD		 3577 /*
3578 * If we're not an initiator, skip looking for devices
3579 * and logging in. There's no reason for us to do it,
3580 * and it seems to actively cause problems in target
3581 * mode if we race with the initiator logging into us
3582 * (we might get the "port ID used" status back from
3583 * our login command and log out the initiator, which
3584 * seems to cause havoc).
3585 */
3586 if (qla_ini_mode_enabled(base_vha)) {
3587 /* Find a new loop ID to use. */
3588 fcport->loop_id = next_loopid;
3589 rval = qla2x00_find_new_loop_id(base_vha,
3590 fcport);
3591 if (rval != QLA_SUCCESS) {
3592 /* Ran out of IDs to use */
3593 break;
3594 }
1da177e4 3595
b2032fd5
RD		 3596 /* Login and update database */
3597 qla2x00_fabric_dev_login(vha, fcport,
3598 &next_loopid);
3599 } else {
3600 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf079,
3601 "new port %8phC state 0x%x flags 0x%x fc4_type "
3602 "0x%x scan_state %d (initiator mode disabled; "
3603 "skipping login)\n",
3604 fcport->port_name,
3605 atomic_read(&fcport->state),
3606 fcport->flags, fcport->fc4_type,
3607 fcport->scan_state);
3608 }
e452ceb6
JC		 3609
3610 list_move_tail(&fcport->list, &vha->vp_fcports);
1da177e4
LT		 3611 }
3612 } while (0);
3613
e452ceb6
JC		 3614 /* Free all new device structures not processed. */
3615 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
3616 list_del(&fcport->list);
3617 kfree(fcport);
3618 }
3619
1da177e4 3620 if (rval) {
7c3df132
SK		 3621 ql_dbg(ql_dbg_disc, vha, 0x2068,
3622 "Configure fabric error exit rval=%d.\n", rval);
1da177e4
LT		 3623 }
3624
3625 return (rval);
3626}
3627
1da177e4
LT		 3628/*
3629 * qla2x00_find_all_fabric_devs
3630 *
3631 * Input:
3632 * ha = adapter block pointer.
3633 * dev = database device entry pointer.
3634 *
3635 * Returns:
3636 * 0 = success.
3637 *
3638 * Context:
3639 * Kernel context.
3640 */
3641static int
e315cd28
AC		 3642qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
3643 struct list_head *new_fcports)
1da177e4
LT		 3644{
3645 int rval;
3646 uint16_t loop_id;
3647 fc_port_t *fcport, *new_fcport, *fcptemp;
3648 int found;
3649
3650 sw_info_t *swl;
3651 int swl_idx;
3652 int first_dev, last_dev;
1516ef44 3653 port_id_t wrap = {}, nxt_d_id;
e315cd28 3654 struct qla_hw_data *ha = vha->hw;
bb4cf5b7 3655 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
1da177e4
LT		 3656
3657 rval = QLA_SUCCESS;
3658
3659 /* Try GID_PT to get device list, else GAN. */
7a67735b 3660 if (!ha->swl)
642ef983 3661 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
7a67735b
AV		 3662 GFP_KERNEL);
3663 swl = ha->swl;
bbfbbbc1 3664 if (!swl) {
1da177e4 3665 /*EMPTY*/
7c3df132
SK		 3666 ql_dbg(ql_dbg_disc, vha, 0x2054,
3667 "GID_PT allocations failed, fallback on GA_NXT.\n");
1da177e4 3668 } else {
642ef983 3669 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
e315cd28 3670 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
1da177e4 3671 swl = NULL;
e315cd28 3672 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
1da177e4 3673 swl = NULL;
e315cd28 3674 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
1da177e4 3675 swl = NULL;
e5896bd5 3676 } else if (ql2xiidmaenable &&
e315cd28
AC		 3677 qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
3678 qla2x00_gpsc(vha, swl);
1da177e4 3679 }
e8c72ba5
CD		 3680
3681 /* If other queries succeeded probe for FC-4 type */
3682 if (swl)
3683 qla2x00_gff_id(vha, swl);
1da177e4
LT		 3684 }
3685 swl_idx = 0;
3686
3687 /* Allocate temporary fcport for any new fcports discovered. */
e315cd28 3688 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 3689 if (new_fcport == NULL) {
7c3df132
SK		 3690 ql_log(ql_log_warn, vha, 0x205e,
3691 "Failed to allocate memory for fcport.\n");
1da177e4
LT		 3692 return (QLA_MEMORY_ALLOC_FAILED);
3693 }
3694 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
1da177e4
LT		 3695 /* Set start port ID scan at adapter ID. */
3696 first_dev = 1;
3697 last_dev = 0;
3698
3699 /* Starting free loop ID. */
e315cd28
AC		 3700 loop_id = ha->min_external_loopid;
3701 for (; loop_id <= ha->max_loop_id; loop_id++) {
3702 if (qla2x00_is_reserved_id(vha, loop_id))
1da177e4
LT		 3703 continue;
3704
3a6478df
GM		 3705 if (ha->current_topology == ISP_CFG_FL &&
3706 (atomic_read(&vha->loop_down_timer) ||
3707 LOOP_TRANSITION(vha))) {
bb2d52b2
AV		 3708 atomic_set(&vha->loop_down_timer, 0);
3709 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3710 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1da177e4 3711 break;
bb2d52b2 3712 }
1da177e4
LT		 3713
3714 if (swl != NULL) {
3715 if (last_dev) {
3716 wrap.b24 = new_fcport->d_id.b24;
3717 } else {
3718 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
3719 memcpy(new_fcport->node_name,
3720 swl[swl_idx].node_name, WWN_SIZE);
3721 memcpy(new_fcport->port_name,
3722 swl[swl_idx].port_name, WWN_SIZE);
d8b45213
AV		 3723 memcpy(new_fcport->fabric_port_name,
3724 swl[swl_idx].fabric_port_name, WWN_SIZE);
3725 new_fcport->fp_speed = swl[swl_idx].fp_speed;
e8c72ba5 3726 new_fcport->fc4_type = swl[swl_idx].fc4_type;
1da177e4
LT		 3727
3728 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
3729 last_dev = 1;
3730 }
3731 swl_idx++;
3732 }
3733 } else {
3734 /* Send GA_NXT to the switch */
e315cd28 3735 rval = qla2x00_ga_nxt(vha, new_fcport);
1da177e4 3736 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3737 ql_log(ql_log_warn, vha, 0x2064,
3738 "SNS scan failed -- assuming "
3739 "zero-entry result.\n");
1da177e4
LT		 3740 list_for_each_entry_safe(fcport, fcptemp,
3741 new_fcports, list) {
3742 list_del(&fcport->list);
3743 kfree(fcport);
3744 }
3745 rval = QLA_SUCCESS;
3746 break;
3747 }
3748 }
3749
3750 /* If wrap on switch device list, exit. */
3751 if (first_dev) {
3752 wrap.b24 = new_fcport->d_id.b24;
3753 first_dev = 0;
3754 } else if (new_fcport->d_id.b24 == wrap.b24) {
7c3df132
SK		 3755 ql_dbg(ql_dbg_disc, vha, 0x2065,
3756 "Device wrap (%02x%02x%02x).\n",
3757 new_fcport->d_id.b.domain,
3758 new_fcport->d_id.b.area,
3759 new_fcport->d_id.b.al_pa);
1da177e4
LT		 3760 break;
3761 }
3762
2c3dfe3f 3763 /* Bypass if same physical adapter. */
e315cd28 3764 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
1da177e4
LT		 3765 continue;
3766
2c3dfe3f 3767 /* Bypass virtual ports of the same host. */
bb4cf5b7
CD		 3768 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
3769 continue;
2c3dfe3f 3770
f7d289f6
AV		 3771 /* Bypass if same domain and area of adapter. */
3772 if (((new_fcport->d_id.b24 & 0xffff00) ==
e315cd28 3773 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
f7d289f6
AV		 3774 ISP_CFG_FL)
3775 continue;
3776
1da177e4
LT		 3777 /* Bypass reserved domain fields. */
3778 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
3779 continue;
3780
e8c72ba5 3781 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
4da26e16
CD		 3782 if (ql2xgffidenable &&
3783 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
3784 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
e8c72ba5
CD		 3785 continue;
3786
1da177e4
LT		 3787 /* Locate matching device in database. */
3788 found = 0;
e315cd28 3789 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 3790 if (memcmp(new_fcport->port_name, fcport->port_name,
3791 WWN_SIZE))
3792 continue;
3793
827210ba 3794 fcport->scan_state = QLA_FCPORT_FOUND;
b3b02e6e 3795
1da177e4
LT		 3796 found++;
3797
d8b45213
AV		 3798 /* Update port state. */
3799 memcpy(fcport->fabric_port_name,
3800 new_fcport->fabric_port_name, WWN_SIZE);
3801 fcport->fp_speed = new_fcport->fp_speed;
3802
1da177e4 3803 /*
b2032fd5
RD		 3804 * If address the same and state FCS_ONLINE
3805 * (or in target mode), nothing changed.
1da177e4
LT		 3806 */
3807 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
b2032fd5
RD		 3808 (atomic_read(&fcport->state) == FCS_ONLINE ||
3809 !qla_ini_mode_enabled(base_vha))) {
1da177e4
LT		 3810 break;
3811 }
3812
3813 /*
3814 * If device was not a fabric device before.
3815 */
3816 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
3817 fcport->d_id.b24 = new_fcport->d_id.b24;
5f16b331 3818 qla2x00_clear_loop_id(fcport);
1da177e4
LT		 3819 fcport->flags |= (FCF_FABRIC_DEVICE |
3820 FCF_LOGIN_NEEDED);
1da177e4
LT		 3821 break;
3822 }
3823
3824 /*
3825 * Port ID changed or device was marked to be updated;
3826 * Log it out if still logged in and mark it for
3827 * relogin later.
3828 */
b2032fd5
RD		 3829 if (!qla_ini_mode_enabled(base_vha)) {
3830 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
3831 "port changed FC ID, %8phC"
3832 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
3833 fcport->port_name,
3834 fcport->d_id.b.domain,
3835 fcport->d_id.b.area,
3836 fcport->d_id.b.al_pa,
3837 fcport->loop_id,
3838 new_fcport->d_id.b.domain,
3839 new_fcport->d_id.b.area,
3840 new_fcport->d_id.b.al_pa);
3841 fcport->d_id.b24 = new_fcport->d_id.b24;
3842 break;
3843 }
3844
1da177e4
LT		 3845 fcport->d_id.b24 = new_fcport->d_id.b24;
3846 fcport->flags |= FCF_LOGIN_NEEDED;
3847 if (fcport->loop_id != FC_NO_LOOP_ID &&
f08b7251 3848 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
0eba25df 3849 (fcport->flags & FCF_ASYNC_SENT) == 0 &&
1da177e4
LT		 3850 fcport->port_type != FCT_INITIATOR &&
3851 fcport->port_type != FCT_BROADCAST) {
e315cd28 3852 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 3853 fcport->d_id.b.domain, fcport->d_id.b.area,
3854 fcport->d_id.b.al_pa);
5f16b331 3855 qla2x00_clear_loop_id(fcport);
1da177e4
LT		 3856 }
3857
3858 break;
3859 }
3860
3861 if (found)
3862 continue;
1da177e4 3863 /* If device was not in our fcports list, then add it. */
b2032fd5 3864 new_fcport->scan_state = QLA_FCPORT_FOUND;
1da177e4
LT		 3865 list_add_tail(&new_fcport->list, new_fcports);
3866
3867 /* Allocate a new replacement fcport. */
3868 nxt_d_id.b24 = new_fcport->d_id.b24;
e315cd28 3869 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 3870 if (new_fcport == NULL) {
7c3df132
SK		 3871 ql_log(ql_log_warn, vha, 0x2066,
3872 "Memory allocation failed for fcport.\n");
1da177e4
LT		 3873 return (QLA_MEMORY_ALLOC_FAILED);
3874 }
3875 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
3876 new_fcport->d_id.b24 = nxt_d_id.b24;
3877 }
3878
c9475cb0 3879 kfree(new_fcport);
1da177e4 3880
1da177e4
LT		 3881 return (rval);
3882}
3883
3884/*
3885 * qla2x00_find_new_loop_id
3886 * Scan through our port list and find a new usable loop ID.
3887 *
3888 * Input:
3889 * ha: adapter state pointer.
3890 * dev: port structure pointer.
3891 *
3892 * Returns:
3893 * qla2x00 local function return status code.
3894 *
3895 * Context:
3896 * Kernel context.
3897 */
03bcfb57 3898int
e315cd28 3899qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
1da177e4
LT		 3900{
3901 int rval;
e315cd28 3902 struct qla_hw_data *ha = vha->hw;
feafb7b1 3903 unsigned long flags = 0;
1da177e4
LT		 3904
3905 rval = QLA_SUCCESS;
3906
5f16b331 3907 spin_lock_irqsave(&ha->vport_slock, flags);
1da177e4 3908
5f16b331
CD		 3909 dev->loop_id = find_first_zero_bit(ha->loop_id_map,
3910 LOOPID_MAP_SIZE);
3911 if (dev->loop_id >= LOOPID_MAP_SIZE ||
3912 qla2x00_is_reserved_id(vha, dev->loop_id)) {
3913 dev->loop_id = FC_NO_LOOP_ID;
3914 rval = QLA_FUNCTION_FAILED;
3915 } else
3916 set_bit(dev->loop_id, ha->loop_id_map);
1da177e4 3917
5f16b331 3918 spin_unlock_irqrestore(&ha->vport_slock, flags);
1da177e4 3919
5f16b331
CD		 3920 if (rval == QLA_SUCCESS)
3921 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
3922 "Assigning new loopid=%x, portid=%x.\n",
3923 dev->loop_id, dev->d_id.b24);
3924 else
3925 ql_log(ql_log_warn, dev->vha, 0x2087,
3926 "No loop_id's available, portid=%x.\n",
3927 dev->d_id.b24);
1da177e4
LT		 3928
3929 return (rval);
3930}
3931
1da177e4
LT		 3932/*
3933 * qla2x00_fabric_dev_login
3934 * Login fabric target device and update FC port database.
3935 *
3936 * Input:
3937 * ha: adapter state pointer.
3938 * fcport: port structure list pointer.
3939 * next_loopid: contains value of a new loop ID that can be used
3940 * by the next login attempt.
3941 *
3942 * Returns:
3943 * qla2x00 local function return status code.
3944 *
3945 * Context:
3946 * Kernel context.
3947 */
3948static int
e315cd28 3949qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
1da177e4
LT		 3950 uint16_t *next_loopid)
3951{
3952 int rval;
3953 int retry;
0107109e 3954 uint8_t opts;
e315cd28 3955 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 3956
3957 rval = QLA_SUCCESS;
3958 retry = 0;
3959
ac280b67 3960 if (IS_ALOGIO_CAPABLE(ha)) {
5ff1d584
AV		 3961 if (fcport->flags & FCF_ASYNC_SENT)
3962 return rval;
3963 fcport->flags |= FCF_ASYNC_SENT;
ac280b67
AV		 3964 rval = qla2x00_post_async_login_work(vha, fcport, NULL);
3965 if (!rval)
3966 return rval;
3967 }
3968
5ff1d584 3969 fcport->flags &= ~FCF_ASYNC_SENT;
e315cd28 3970 rval = qla2x00_fabric_login(vha, fcport, next_loopid);
1da177e4 3971 if (rval == QLA_SUCCESS) {
f08b7251 3972 /* Send an ADISC to FCP2 devices.*/
0107109e 3973 opts = 0;
f08b7251 3974 if (fcport->flags & FCF_FCP2_DEVICE)
0107109e 3975 opts |= BIT_1;
e315cd28 3976 rval = qla2x00_get_port_database(vha, fcport, opts);
1da177e4 3977 if (rval != QLA_SUCCESS) {
e315cd28 3978 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 3979 fcport->d_id.b.domain, fcport->d_id.b.area,
3980 fcport->d_id.b.al_pa);
e315cd28 3981 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1da177e4 3982 } else {
e315cd28 3983 qla2x00_update_fcport(vha, fcport);
1da177e4 3984 }
0b91d116
CD		 3985 } else {
3986 /* Retry Login. */
3987 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1da177e4
LT		 3988 }
3989
3990 return (rval);
3991}
3992
3993/*
3994 * qla2x00_fabric_login
3995 * Issue fabric login command.
3996 *
3997 * Input:
3998 * ha = adapter block pointer.
3999 * device = pointer to FC device type structure.
4000 *
4001 * Returns:
4002 * 0 - Login successfully
4003 * 1 - Login failed
4004 * 2 - Initiator device
4005 * 3 - Fatal error
4006 */
4007int
e315cd28 4008qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
1da177e4
LT		 4009 uint16_t *next_loopid)
4010{
4011 int rval;
4012 int retry;
4013 uint16_t tmp_loopid;
4014 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28 4015 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 4016
4017 retry = 0;
4018 tmp_loopid = 0;
4019
4020 for (;;) {
7c3df132
SK		 4021 ql_dbg(ql_dbg_disc, vha, 0x2000,
4022 "Trying Fabric Login w/loop id 0x%04x for port "
4023 "%02x%02x%02x.\n",
4024 fcport->loop_id, fcport->d_id.b.domain,
4025 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1da177e4
LT		 4026
4027 /* Login fcport on switch. */
0b91d116 4028 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
1da177e4
LT		 4029 fcport->d_id.b.domain, fcport->d_id.b.area,
4030 fcport->d_id.b.al_pa, mb, BIT_0);
0b91d116
CD		 4031 if (rval != QLA_SUCCESS) {
4032 return rval;
4033 }
1da177e4
LT		 4034 if (mb[0] == MBS_PORT_ID_USED) {
4035 /*
4036 * Device has another loop ID. The firmware team
0107109e
AV		 4037 * recommends the driver perform an implicit login with
4038 * the specified ID again. The ID we just used is save
4039 * here so we return with an ID that can be tried by
4040 * the next login.
1da177e4
LT		 4041 */
4042 retry++;
4043 tmp_loopid = fcport->loop_id;
4044 fcport->loop_id = mb[1];
4045
7c3df132
SK		 4046 ql_dbg(ql_dbg_disc, vha, 0x2001,
4047 "Fabric Login: port in use - next loop "
4048 "id=0x%04x, port id= %02x%02x%02x.\n",
1da177e4 4049 fcport->loop_id, fcport->d_id.b.domain,
7c3df132 4050 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1da177e4
LT		 4051
4052 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
4053 /*
4054 * Login succeeded.
4055 */
4056 if (retry) {
4057 /* A retry occurred before. */
4058 *next_loopid = tmp_loopid;
4059 } else {
4060 /*
4061 * No retry occurred before. Just increment the
4062 * ID value for next login.
4063 */
4064 *next_loopid = (fcport->loop_id + 1);
4065 }
4066
4067 if (mb[1] & BIT_0) {
4068 fcport->port_type = FCT_INITIATOR;
4069 } else {
4070 fcport->port_type = FCT_TARGET;
4071 if (mb[1] & BIT_1) {
8474f3a0 4072 fcport->flags |= FCF_FCP2_DEVICE;
1da177e4
LT		 4073 }
4074 }
4075
ad3e0eda
AV		 4076 if (mb[10] & BIT_0)
4077 fcport->supported_classes |= FC_COS_CLASS2;
4078 if (mb[10] & BIT_1)
4079 fcport->supported_classes |= FC_COS_CLASS3;
4080
2d70c103
NB		 4081 if (IS_FWI2_CAPABLE(ha)) {
4082 if (mb[10] & BIT_7)
4083 fcport->flags |=
4084 FCF_CONF_COMP_SUPPORTED;
4085 }
4086
1da177e4
LT		 4087 rval = QLA_SUCCESS;
4088 break;
4089 } else if (mb[0] == MBS_LOOP_ID_USED) {
4090 /*
4091 * Loop ID already used, try next loop ID.
4092 */
4093 fcport->loop_id++;
e315cd28 4094 rval = qla2x00_find_new_loop_id(vha, fcport);
1da177e4
LT		 4095 if (rval != QLA_SUCCESS) {
4096 /* Ran out of loop IDs to use */
4097 break;
4098 }
4099 } else if (mb[0] == MBS_COMMAND_ERROR) {
4100 /*
4101 * Firmware possibly timed out during login. If NO
4102 * retries are left to do then the device is declared
4103 * dead.
4104 */
4105 *next_loopid = fcport->loop_id;
e315cd28 4106 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 4107 fcport->d_id.b.domain, fcport->d_id.b.area,
4108 fcport->d_id.b.al_pa);
e315cd28 4109 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1da177e4
LT		 4110
4111 rval = 1;
4112 break;
4113 } else {
4114 /*
4115 * unrecoverable / not handled error
4116 */
7c3df132
SK		 4117 ql_dbg(ql_dbg_disc, vha, 0x2002,
4118 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
4119 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
4120 fcport->d_id.b.area, fcport->d_id.b.al_pa,
4121 fcport->loop_id, jiffies);
1da177e4
LT		 4122
4123 *next_loopid = fcport->loop_id;
e315cd28 4124 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 4125 fcport->d_id.b.domain, fcport->d_id.b.area,
4126 fcport->d_id.b.al_pa);
5f16b331 4127 qla2x00_clear_loop_id(fcport);
0eedfcf0 4128 fcport->login_retry = 0;
1da177e4
LT		 4129
4130 rval = 3;
4131 break;
4132 }
4133 }
4134
4135 return (rval);
4136}
4137
4138/*
4139 * qla2x00_local_device_login
4140 * Issue local device login command.
4141 *
4142 * Input:
4143 * ha = adapter block pointer.
4144 * loop_id = loop id of device to login to.
4145 *
4146 * Returns (Where's the #define!!!!):
4147 * 0 - Login successfully
4148 * 1 - Login failed
4149 * 3 - Fatal error
4150 */
4151int
e315cd28 4152qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
1da177e4
LT		 4153{
4154 int rval;
4155 uint16_t mb[MAILBOX_REGISTER_COUNT];
4156
4157 memset(mb, 0, sizeof(mb));
e315cd28 4158 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
1da177e4
LT		 4159 if (rval == QLA_SUCCESS) {
4160 /* Interrogate mailbox registers for any errors */
4161 if (mb[0] == MBS_COMMAND_ERROR)
4162 rval = 1;
4163 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
4164 /* device not in PCB table */
4165 rval = 3;
4166 }
4167
4168 return (rval);
4169}
4170
4171/*
4172 * qla2x00_loop_resync
4173 * Resync with fibre channel devices.
4174 *
4175 * Input:
4176 * ha = adapter block pointer.
4177 *
4178 * Returns:
4179 * 0 = success
4180 */
4181int
e315cd28 4182qla2x00_loop_resync(scsi_qla_host_t *vha)
1da177e4 4183{
73208dfd 4184 int rval = QLA_SUCCESS;
1da177e4 4185 uint32_t wait_time;
67c2e93a
AC		 4186 struct req_que *req;
4187 struct rsp_que *rsp;
4188
7163ea81 4189 if (vha->hw->flags.cpu_affinity_enabled)
67c2e93a
AC		 4190 req = vha->hw->req_q_map[0];
4191 else
4192 req = vha->req;
4193 rsp = req->rsp;
1da177e4 4194
e315cd28
AC		 4195 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4196 if (vha->flags.online) {
4197 if (!(rval = qla2x00_fw_ready(vha))) {
1da177e4
LT		 4198 /* Wait at most MAX_TARGET RSCNs for a stable link. */
4199 wait_time = 256;
4200 do {
8ae6d9c7
GM		 4201 if (!IS_QLAFX00(vha->hw)) {
4202 /*
4203 * Issue a marker after FW becomes
4204 * ready.
4205 */
4206 qla2x00_marker(vha, req, rsp, 0, 0,
4207 MK_SYNC_ALL);
4208 vha->marker_needed = 0;
4209 }
1da177e4
LT		 4210
4211 /* Remap devices on Loop. */
e315cd28 4212 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1da177e4 4213
8ae6d9c7
GM		 4214 if (IS_QLAFX00(vha->hw))
4215 qlafx00_configure_devices(vha);
4216 else
4217 qla2x00_configure_loop(vha);
4218
1da177e4 4219 wait_time--;
e315cd28
AC		 4220 } while (!atomic_read(&vha->loop_down_timer) &&
4221 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
4222 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
4223 &vha->dpc_flags)));
1da177e4 4224 }
1da177e4
LT		 4225 }
4226
e315cd28 4227 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
1da177e4 4228 return (QLA_FUNCTION_FAILED);
1da177e4 4229
e315cd28 4230 if (rval)
7c3df132
SK		 4231 ql_dbg(ql_dbg_disc, vha, 0x206c,
4232 "%s *** FAILED ***.\n", __func__);
1da177e4
LT		 4233
4234 return (rval);
4235}
4236
579d12b5
SK		 4237/*
4238* qla2x00_perform_loop_resync
4239* Description: This function will set the appropriate flags and call
4240* qla2x00_loop_resync. If successful loop will be resynced
4241* Arguments : scsi_qla_host_t pointer
4242* returm : Success or Failure
4243*/
4244
4245int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
4246{
4247 int32_t rval = 0;
4248
4249 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
4250 /*Configure the flags so that resync happens properly*/
4251 atomic_set(&ha->loop_down_timer, 0);
4252 if (!(ha->device_flags & DFLG_NO_CABLE)) {
4253 atomic_set(&ha->loop_state, LOOP_UP);
4254 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
4255 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
4256 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
4257
4258 rval = qla2x00_loop_resync(ha);
4259 } else
4260 atomic_set(&ha->loop_state, LOOP_DEAD);
4261
4262 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
4263 }
4264
4265 return rval;
4266}
4267
d97994dc 4268void
67becc00 4269qla2x00_update_fcports(scsi_qla_host_t *base_vha)
d97994dc
AV		 4270{
4271 fc_port_t *fcport;
feafb7b1
AE		 4272 struct scsi_qla_host *vha;
4273 struct qla_hw_data *ha = base_vha->hw;
4274 unsigned long flags;
d97994dc 4275
feafb7b1 4276 spin_lock_irqsave(&ha->vport_slock, flags);
d97994dc 4277 /* Go with deferred removal of rport references. */
feafb7b1
AE		 4278 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
4279 atomic_inc(&vha->vref_count);
4280 list_for_each_entry(fcport, &vha->vp_fcports, list) {
8ae598d0 4281 if (fcport->drport &&
feafb7b1
AE		 4282 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
4283 spin_unlock_irqrestore(&ha->vport_slock, flags);
67becc00 4284 qla2x00_rport_del(fcport);
df673274
AP		 4285
4286 /*
4287 * Release the target mode FC NEXUS in
4288 * qla_target.c, if target mod is enabled.
4289 */
4290 qlt_fc_port_deleted(vha, fcport,
4291 base_vha->total_fcport_update_gen);
4292
feafb7b1
AE		 4293 spin_lock_irqsave(&ha->vport_slock, flags);
4294 }
4295 }
4296 atomic_dec(&vha->vref_count);
4297 }
4298 spin_unlock_irqrestore(&ha->vport_slock, flags);
d97994dc
AV		 4299}
4300
7d613ac6
SV		 4301/* Assumes idc_lock always held on entry */
4302void
4303qla83xx_reset_ownership(scsi_qla_host_t *vha)
4304{
4305 struct qla_hw_data *ha = vha->hw;
4306 uint32_t drv_presence, drv_presence_mask;
4307 uint32_t dev_part_info1, dev_part_info2, class_type;
4308 uint32_t class_type_mask = 0x3;
4309 uint16_t fcoe_other_function = 0xffff, i;
4310
7ec0effd
AD		 4311 if (IS_QLA8044(ha)) {
4312 drv_presence = qla8044_rd_direct(vha,
4313 QLA8044_CRB_DRV_ACTIVE_INDEX);
4314 dev_part_info1 = qla8044_rd_direct(vha,
4315 QLA8044_CRB_DEV_PART_INFO_INDEX);
4316 dev_part_info2 = qla8044_rd_direct(vha,
4317 QLA8044_CRB_DEV_PART_INFO2);
4318 } else {
4319 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4320 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
4321 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
4322 }
7d613ac6
SV		 4323 for (i = 0; i < 8; i++) {
4324 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
4325 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
4326 (i != ha->portnum)) {
4327 fcoe_other_function = i;
4328 break;
4329 }
4330 }
4331 if (fcoe_other_function == 0xffff) {
4332 for (i = 0; i < 8; i++) {
4333 class_type = ((dev_part_info2 >> (i * 4)) &
4334 class_type_mask);
4335 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
4336 ((i + 8) != ha->portnum)) {
4337 fcoe_other_function = i + 8;
4338 break;
4339 }
4340 }
4341 }
4342 /*
4343 * Prepare drv-presence mask based on fcoe functions present.
4344 * However consider only valid physical fcoe function numbers (0-15).
4345 */
4346 drv_presence_mask = ~((1 << (ha->portnum)) |
4347 ((fcoe_other_function == 0xffff) ?
4348 0 : (1 << (fcoe_other_function))));
4349
4350 /* We are the reset owner iff:
4351 * - No other protocol drivers present.
4352 * - This is the lowest among fcoe functions. */
4353 if (!(drv_presence & drv_presence_mask) &&
4354 (ha->portnum < fcoe_other_function)) {
4355 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
4356 "This host is Reset owner.\n");
4357 ha->flags.nic_core_reset_owner = 1;
4358 }
4359}
4360
fa492630 4361static int
7d613ac6
SV		 4362__qla83xx_set_drv_ack(scsi_qla_host_t *vha)
4363{
4364 int rval = QLA_SUCCESS;
4365 struct qla_hw_data *ha = vha->hw;
4366 uint32_t drv_ack;
4367
4368 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4369 if (rval == QLA_SUCCESS) {
4370 drv_ack |= (1 << ha->portnum);
4371 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
4372 }
4373
4374 return rval;
4375}
4376
fa492630 4377static int
7d613ac6
SV		 4378__qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
4379{
4380 int rval = QLA_SUCCESS;
4381 struct qla_hw_data *ha = vha->hw;
4382 uint32_t drv_ack;
4383
4384 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4385 if (rval == QLA_SUCCESS) {
4386 drv_ack &= ~(1 << ha->portnum);
4387 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
4388 }
4389
4390 return rval;
4391}
4392
fa492630 4393static const char *
7d613ac6
SV		 4394qla83xx_dev_state_to_string(uint32_t dev_state)
4395{
4396 switch (dev_state) {
4397 case QLA8XXX_DEV_COLD:
4398 return "COLD/RE-INIT";
4399 case QLA8XXX_DEV_INITIALIZING:
4400 return "INITIALIZING";
4401 case QLA8XXX_DEV_READY:
4402 return "READY";
4403 case QLA8XXX_DEV_NEED_RESET:
4404 return "NEED RESET";
4405 case QLA8XXX_DEV_NEED_QUIESCENT:
4406 return "NEED QUIESCENT";
4407 case QLA8XXX_DEV_FAILED:
4408 return "FAILED";
4409 case QLA8XXX_DEV_QUIESCENT:
4410 return "QUIESCENT";
4411 default:
4412 return "Unknown";
4413 }
4414}
4415
4416/* Assumes idc-lock always held on entry */
4417void
4418qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
4419{
4420 struct qla_hw_data *ha = vha->hw;
4421 uint32_t idc_audit_reg = 0, duration_secs = 0;
4422
4423 switch (audit_type) {
4424 case IDC_AUDIT_TIMESTAMP:
4425 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
4426 idc_audit_reg = (ha->portnum) |
4427 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
4428 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
4429 break;
4430
4431 case IDC_AUDIT_COMPLETION:
4432 duration_secs = ((jiffies_to_msecs(jiffies) -
4433 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
4434 idc_audit_reg = (ha->portnum) |
4435 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
4436 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
4437 break;
4438
4439 default:
4440 ql_log(ql_log_warn, vha, 0xb078,
4441 "Invalid audit type specified.\n");
4442 break;
4443 }
4444}
4445
4446/* Assumes idc_lock always held on entry */
fa492630 4447static int
7d613ac6
SV		 4448qla83xx_initiating_reset(scsi_qla_host_t *vha)
4449{
4450 struct qla_hw_data *ha = vha->hw;
4451 uint32_t idc_control, dev_state;
4452
4453 __qla83xx_get_idc_control(vha, &idc_control);
4454 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
4455 ql_log(ql_log_info, vha, 0xb080,
4456 "NIC Core reset has been disabled. idc-control=0x%x\n",
4457 idc_control);
4458 return QLA_FUNCTION_FAILED;
4459 }
4460
4461 /* Set NEED-RESET iff in READY state and we are the reset-owner */
4462 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4463 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
4464 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
4465 QLA8XXX_DEV_NEED_RESET);
4466 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
4467 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
4468 } else {
4469 const char *state = qla83xx_dev_state_to_string(dev_state);
4470 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
4471
4472 /* SV: XXX: Is timeout required here? */
4473 /* Wait for IDC state change READY -> NEED_RESET */
4474 while (dev_state == QLA8XXX_DEV_READY) {
4475 qla83xx_idc_unlock(vha, 0);
4476 msleep(200);
4477 qla83xx_idc_lock(vha, 0);
4478 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4479 }
4480 }
4481
4482 /* Send IDC ack by writing to drv-ack register */
4483 __qla83xx_set_drv_ack(vha);
4484
4485 return QLA_SUCCESS;
4486}
4487
4488int
4489__qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
4490{
4491 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
4492}
4493
7d613ac6
SV		 4494int
4495__qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
4496{
4497 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
4498}
4499
fa492630 4500static int
7d613ac6
SV		 4501qla83xx_check_driver_presence(scsi_qla_host_t *vha)
4502{
4503 uint32_t drv_presence = 0;
4504 struct qla_hw_data *ha = vha->hw;
4505
4506 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4507 if (drv_presence & (1 << ha->portnum))
4508 return QLA_SUCCESS;
4509 else
4510 return QLA_TEST_FAILED;
4511}
4512
4513int
4514qla83xx_nic_core_reset(scsi_qla_host_t *vha)
4515{
4516 int rval = QLA_SUCCESS;
4517 struct qla_hw_data *ha = vha->hw;
4518
4519 ql_dbg(ql_dbg_p3p, vha, 0xb058,
4520 "Entered %s().\n", __func__);
4521
4522 if (vha->device_flags & DFLG_DEV_FAILED) {
4523 ql_log(ql_log_warn, vha, 0xb059,
4524 "Device in unrecoverable FAILED state.\n");
4525 return QLA_FUNCTION_FAILED;
4526 }
4527
4528 qla83xx_idc_lock(vha, 0);
4529
4530 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
4531 ql_log(ql_log_warn, vha, 0xb05a,
4532 "Function=0x%x has been removed from IDC participation.\n",
4533 ha->portnum);
4534 rval = QLA_FUNCTION_FAILED;
4535 goto exit;
4536 }
4537
4538 qla83xx_reset_ownership(vha);
4539
4540 rval = qla83xx_initiating_reset(vha);
4541
4542 /*
4543 * Perform reset if we are the reset-owner,
4544 * else wait till IDC state changes to READY/FAILED.
4545 */
4546 if (rval == QLA_SUCCESS) {
4547 rval = qla83xx_idc_state_handler(vha);
4548
4549 if (rval == QLA_SUCCESS)
4550 ha->flags.nic_core_hung = 0;
4551 __qla83xx_clear_drv_ack(vha);
4552 }
4553
4554exit:
4555 qla83xx_idc_unlock(vha, 0);
4556
4557 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
4558
4559 return rval;
4560}
4561
81178772
SK		 4562int
4563qla2xxx_mctp_dump(scsi_qla_host_t *vha)
4564{
4565 struct qla_hw_data *ha = vha->hw;
4566 int rval = QLA_FUNCTION_FAILED;
4567
4568 if (!IS_MCTP_CAPABLE(ha)) {
4569 /* This message can be removed from the final version */
4570 ql_log(ql_log_info, vha, 0x506d,
4571 "This board is not MCTP capable\n");
4572 return rval;
4573 }
4574
4575 if (!ha->mctp_dump) {
4576 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
4577 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
4578
4579 if (!ha->mctp_dump) {
4580 ql_log(ql_log_warn, vha, 0x506e,
4581 "Failed to allocate memory for mctp dump\n");
4582 return rval;
4583 }
4584 }
4585
4586#define MCTP_DUMP_STR_ADDR 0x00000000
4587 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
4588 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
4589 if (rval != QLA_SUCCESS) {
4590 ql_log(ql_log_warn, vha, 0x506f,
4591 "Failed to capture mctp dump\n");
4592 } else {
4593 ql_log(ql_log_info, vha, 0x5070,
4594 "Mctp dump capture for host (%ld/%p).\n",
4595 vha->host_no, ha->mctp_dump);
4596 ha->mctp_dumped = 1;
4597 }
4598
409ee0fe 4599 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
81178772
SK		 4600 ha->flags.nic_core_reset_hdlr_active = 1;
4601 rval = qla83xx_restart_nic_firmware(vha);
4602 if (rval)
4603 /* NIC Core reset failed. */
4604 ql_log(ql_log_warn, vha, 0x5071,
4605 "Failed to restart nic firmware\n");
4606 else
4607 ql_dbg(ql_dbg_p3p, vha, 0xb084,
4608 "Restarted NIC firmware successfully.\n");
4609 ha->flags.nic_core_reset_hdlr_active = 0;
4610 }
4611
4612 return rval;
4613
4614}
4615
579d12b5 4616/*
8fcd6b8b 4617* qla2x00_quiesce_io
579d12b5
SK		 4618* Description: This function will block the new I/Os
4619* Its not aborting any I/Os as context
4620* is not destroyed during quiescence
4621* Arguments: scsi_qla_host_t
4622* return : void
4623*/
4624void
8fcd6b8b 4625qla2x00_quiesce_io(scsi_qla_host_t *vha)
579d12b5
SK		 4626{
4627 struct qla_hw_data *ha = vha->hw;
4628 struct scsi_qla_host *vp;
4629
8fcd6b8b
CD		 4630 ql_dbg(ql_dbg_dpc, vha, 0x401d,
4631 "Quiescing I/O - ha=%p.\n", ha);
579d12b5
SK		 4632
4633 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
4634 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
4635 atomic_set(&vha->loop_state, LOOP_DOWN);
4636 qla2x00_mark_all_devices_lost(vha, 0);
4637 list_for_each_entry(vp, &ha->vp_list, list)
8fcd6b8b 4638 qla2x00_mark_all_devices_lost(vp, 0);
579d12b5
SK		 4639 } else {
4640 if (!atomic_read(&vha->loop_down_timer))
4641 atomic_set(&vha->loop_down_timer,
4642 LOOP_DOWN_TIME);
4643 }
4644 /* Wait for pending cmds to complete */
4645 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
4646}
4647
a9083016
GM		 4648void
4649qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
4650{
4651 struct qla_hw_data *ha = vha->hw;
579d12b5 4652 struct scsi_qla_host *vp;
feafb7b1 4653 unsigned long flags;
6aef87be 4654 fc_port_t *fcport;
a9083016 4655
e46ef004
SK		 4656 /* For ISP82XX, driver waits for completion of the commands.
4657 * online flag should be set.
4658 */
7ec0effd 4659 if (!(IS_P3P_TYPE(ha)))
e46ef004 4660 vha->flags.online = 0;
a9083016
GM		 4661 ha->flags.chip_reset_done = 0;
4662 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2be21fa2 4663 vha->qla_stats.total_isp_aborts++;
a9083016 4664
7c3df132
SK		 4665 ql_log(ql_log_info, vha, 0x00af,
4666 "Performing ISP error recovery - ha=%p.\n", ha);
a9083016 4667
e46ef004
SK		 4668 /* For ISP82XX, reset_chip is just disabling interrupts.
4669 * Driver waits for the completion of the commands.
4670 * the interrupts need to be enabled.
4671 */
7ec0effd 4672 if (!(IS_P3P_TYPE(ha)))
a9083016
GM		 4673 ha->isp_ops->reset_chip(vha);
4674
4675 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
4676 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
4677 atomic_set(&vha->loop_state, LOOP_DOWN);
4678 qla2x00_mark_all_devices_lost(vha, 0);
feafb7b1
AE		 4679
4680 spin_lock_irqsave(&ha->vport_slock, flags);
579d12b5 4681 list_for_each_entry(vp, &ha->vp_list, list) {
feafb7b1
AE		 4682 atomic_inc(&vp->vref_count);
4683 spin_unlock_irqrestore(&ha->vport_slock, flags);
4684
a9083016 4685 qla2x00_mark_all_devices_lost(vp, 0);
feafb7b1
AE		 4686
4687 spin_lock_irqsave(&ha->vport_slock, flags);
4688 atomic_dec(&vp->vref_count);
4689 }
4690 spin_unlock_irqrestore(&ha->vport_slock, flags);
a9083016
GM		 4691 } else {
4692 if (!atomic_read(&vha->loop_down_timer))
4693 atomic_set(&vha->loop_down_timer,
4694 LOOP_DOWN_TIME);
4695 }
4696
6aef87be
AV		 4697 /* Clear all async request states across all VPs. */
4698 list_for_each_entry(fcport, &vha->vp_fcports, list)
4699 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
4700 spin_lock_irqsave(&ha->vport_slock, flags);
4701 list_for_each_entry(vp, &ha->vp_list, list) {
4702 atomic_inc(&vp->vref_count);
4703 spin_unlock_irqrestore(&ha->vport_slock, flags);
4704
4705 list_for_each_entry(fcport, &vp->vp_fcports, list)
4706 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
4707
4708 spin_lock_irqsave(&ha->vport_slock, flags);
4709 atomic_dec(&vp->vref_count);
4710 }
4711 spin_unlock_irqrestore(&ha->vport_slock, flags);
4712
bddd2d65
LC		 4713 if (!ha->flags.eeh_busy) {
4714 /* Make sure for ISP 82XX IO DMA is complete */
7ec0effd 4715 if (IS_P3P_TYPE(ha)) {
7190575f 4716 qla82xx_chip_reset_cleanup(vha);
7c3df132
SK		 4717 ql_log(ql_log_info, vha, 0x00b4,
4718 "Done chip reset cleanup.\n");
a9083016 4719
e46ef004
SK		 4720 /* Done waiting for pending commands.
4721 * Reset the online flag.
4722 */
4723 vha->flags.online = 0;
4d78c973 4724 }
a9083016 4725
bddd2d65
LC		 4726 /* Requeue all commands in outstanding command list. */
4727 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
4728 }
b6a029e1
AE		 4729
4730 ha->chip_reset++;
4731 /* memory barrier */
4732 wmb();
a9083016
GM		 4733}
4734
1da177e4
LT		 4735/*
4736* qla2x00_abort_isp
4737* Resets ISP and aborts all outstanding commands.
4738*
4739* Input:
4740* ha = adapter block pointer.
4741*
4742* Returns:
4743* 0 = success
4744*/
4745int
e315cd28 4746qla2x00_abort_isp(scsi_qla_host_t *vha)
1da177e4 4747{
476e8978 4748 int rval;
1da177e4 4749 uint8_t status = 0;
e315cd28
AC		 4750 struct qla_hw_data *ha = vha->hw;
4751 struct scsi_qla_host *vp;
73208dfd 4752 struct req_que *req = ha->req_q_map[0];
feafb7b1 4753 unsigned long flags;
1da177e4 4754
e315cd28 4755 if (vha->flags.online) {
a9083016 4756 qla2x00_abort_isp_cleanup(vha);
1da177e4 4757
a6171297
SV		 4758 if (IS_QLA8031(ha)) {
4759 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
4760 "Clearing fcoe driver presence.\n");
4761 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
4762 ql_dbg(ql_dbg_p3p, vha, 0xb073,
4763 "Error while clearing DRV-Presence.\n");
4764 }
4765
85880801
AV		 4766 if (unlikely(pci_channel_offline(ha->pdev) &&
4767 ha->flags.pci_channel_io_perm_failure)) {
4768 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4769 status = 0;
4770 return status;
4771 }
4772
73208dfd 4773 ha->isp_ops->get_flash_version(vha, req->ring);
30c47662 4774
e315cd28 4775 ha->isp_ops->nvram_config(vha);
1da177e4 4776
e315cd28
AC		 4777 if (!qla2x00_restart_isp(vha)) {
4778 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4 4779
e315cd28 4780 if (!atomic_read(&vha->loop_down_timer)) {
1da177e4
LT		 4781 /*
4782 * Issue marker command only when we are going
4783 * to start the I/O .
4784 */
e315cd28 4785 vha->marker_needed = 1;
1da177e4
LT		 4786 }
4787
e315cd28 4788 vha->flags.online = 1;
1da177e4 4789
fd34f556 4790 ha->isp_ops->enable_intrs(ha);
1da177e4 4791
fa2a1ce5 4792 ha->isp_abort_cnt = 0;
e315cd28 4793 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
476e8978 4794
6246b8a1
GM		 4795 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
4796 qla2x00_get_fw_version(vha);
df613b96
AV		 4797 if (ha->fce) {
4798 ha->flags.fce_enabled = 1;
4799 memset(ha->fce, 0,
4800 fce_calc_size(ha->fce_bufs));
e315cd28 4801 rval = qla2x00_enable_fce_trace(vha,
df613b96
AV		 4802 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
4803 &ha->fce_bufs);
4804 if (rval) {
7c3df132 4805 ql_log(ql_log_warn, vha, 0x8033,
df613b96
AV		 4806 "Unable to reinitialize FCE "
4807 "(%d).\n", rval);
4808 ha->flags.fce_enabled = 0;
4809 }
4810 }
436a7b11
AV		 4811
4812 if (ha->eft) {
4813 memset(ha->eft, 0, EFT_SIZE);
e315cd28 4814 rval = qla2x00_enable_eft_trace(vha,
436a7b11
AV		 4815 ha->eft_dma, EFT_NUM_BUFFERS);
4816 if (rval) {
7c3df132 4817 ql_log(ql_log_warn, vha, 0x8034,
436a7b11
AV		 4818 "Unable to reinitialize EFT "
4819 "(%d).\n", rval);
4820 }
4821 }
1da177e4 4822 } else { /* failed the ISP abort */
e315cd28
AC		 4823 vha->flags.online = 1;
4824 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
1da177e4 4825 if (ha->isp_abort_cnt == 0) {
7c3df132
SK		 4826 ql_log(ql_log_fatal, vha, 0x8035,
4827 "ISP error recover failed - "
4828 "board disabled.\n");
fa2a1ce5 4829 /*
1da177e4
LT		 4830 * The next call disables the board
4831 * completely.
4832 */
e315cd28
AC		 4833 ha->isp_ops->reset_adapter(vha);
4834 vha->flags.online = 0;
1da177e4 4835 clear_bit(ISP_ABORT_RETRY,
e315cd28 4836 &vha->dpc_flags);
1da177e4
LT		 4837 status = 0;
4838 } else { /* schedule another ISP abort */
4839 ha->isp_abort_cnt--;
7c3df132
SK		 4840 ql_dbg(ql_dbg_taskm, vha, 0x8020,
4841 "ISP abort - retry remaining %d.\n",
4842 ha->isp_abort_cnt);
1da177e4
LT		 4843 status = 1;
4844 }
4845 } else {
4846 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
7c3df132
SK		 4847 ql_dbg(ql_dbg_taskm, vha, 0x8021,
4848 "ISP error recovery - retrying (%d) "
4849 "more times.\n", ha->isp_abort_cnt);
e315cd28 4850 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
1da177e4
LT		 4851 status = 1;
4852 }
4853 }
fa2a1ce5 4854
1da177e4
LT		 4855 }
4856
e315cd28 4857 if (!status) {
7c3df132 4858 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
feafb7b1
AE		 4859
4860 spin_lock_irqsave(&ha->vport_slock, flags);
4861 list_for_each_entry(vp, &ha->vp_list, list) {
4862 if (vp->vp_idx) {
4863 atomic_inc(&vp->vref_count);
4864 spin_unlock_irqrestore(&ha->vport_slock, flags);
4865
e315cd28 4866 qla2x00_vp_abort_isp(vp);
feafb7b1
AE		 4867
4868 spin_lock_irqsave(&ha->vport_slock, flags);
4869 atomic_dec(&vp->vref_count);
4870 }
e315cd28 4871 }
feafb7b1
AE		 4872 spin_unlock_irqrestore(&ha->vport_slock, flags);
4873
7d613ac6
SV		 4874 if (IS_QLA8031(ha)) {
4875 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
4876 "Setting back fcoe driver presence.\n");
4877 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
4878 ql_dbg(ql_dbg_p3p, vha, 0xb074,
4879 "Error while setting DRV-Presence.\n");
4880 }
e315cd28 4881 } else {
d8424f68
JP		 4882 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
4883 __func__);
1da177e4
LT		 4884 }
4885
4886 return(status);
4887}
4888
4889/*
4890* qla2x00_restart_isp
4891* restarts the ISP after a reset
4892*
4893* Input:
4894* ha = adapter block pointer.
4895*
4896* Returns:
4897* 0 = success
4898*/
4899static int
e315cd28 4900qla2x00_restart_isp(scsi_qla_host_t *vha)
1da177e4 4901{
c6b2fca8 4902 int status = 0;
e315cd28 4903 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 4904 struct req_que *req = ha->req_q_map[0];
4905 struct rsp_que *rsp = ha->rsp_q_map[0];
2d70c103 4906 unsigned long flags;
1da177e4
LT		 4907
4908 /* If firmware needs to be loaded */
e315cd28
AC		 4909 if (qla2x00_isp_firmware(vha)) {
4910 vha->flags.online = 0;
4911 status = ha->isp_ops->chip_diag(vha);
4912 if (!status)
4913 status = qla2x00_setup_chip(vha);
1da177e4
LT		 4914 }
4915
e315cd28
AC		 4916 if (!status && !(status = qla2x00_init_rings(vha))) {
4917 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
2533cf67 4918 ha->flags.chip_reset_done = 1;
7108b76e 4919
73208dfd
AC		 4920 /* Initialize the queues in use */
4921 qla25xx_init_queues(ha);
4922
e315cd28
AC		 4923 status = qla2x00_fw_ready(vha);
4924 if (!status) {
0107109e 4925 /* Issue a marker after FW becomes ready. */
73208dfd 4926 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
0107109e 4927
e315cd28 4928 vha->flags.online = 1;
2d70c103
NB		 4929
4930 /*
4931 * Process any ATIO queue entries that came in
4932 * while we weren't online.
4933 */
4934 spin_lock_irqsave(&ha->hardware_lock, flags);
4935 if (qla_tgt_mode_enabled(vha))
4936 qlt_24xx_process_atio_queue(vha);
4937 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4938
7108b76e 4939 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1da177e4
LT		 4940 }
4941
4942 /* if no cable then assume it's good */
e315cd28 4943 if ((vha->device_flags & DFLG_NO_CABLE))
1da177e4 4944 status = 0;
1da177e4
LT		 4945 }
4946 return (status);
4947}
4948
73208dfd
AC		 4949static int
4950qla25xx_init_queues(struct qla_hw_data *ha)
4951{
4952 struct rsp_que *rsp = NULL;
4953 struct req_que *req = NULL;
4954 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
4955 int ret = -1;
4956 int i;
4957
2afa19a9 4958 for (i = 1; i < ha->max_rsp_queues; i++) {
73208dfd
AC		 4959 rsp = ha->rsp_q_map[i];
4960 if (rsp) {
4961 rsp->options &= ~BIT_0;
618a7523 4962 ret = qla25xx_init_rsp_que(base_vha, rsp);
73208dfd 4963 if (ret != QLA_SUCCESS)
7c3df132
SK		 4964 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
4965 "%s Rsp que: %d init failed.\n",
4966 __func__, rsp->id);
73208dfd 4967 else
7c3df132
SK		 4968 ql_dbg(ql_dbg_init, base_vha, 0x0100,
4969 "%s Rsp que: %d inited.\n",
4970 __func__, rsp->id);
73208dfd 4971 }
2afa19a9
AC		 4972 }
4973 for (i = 1; i < ha->max_req_queues; i++) {
73208dfd
AC		 4974 req = ha->req_q_map[i];
4975 if (req) {
29bdccbe 4976 /* Clear outstanding commands array. */
73208dfd 4977 req->options &= ~BIT_0;
618a7523 4978 ret = qla25xx_init_req_que(base_vha, req);
73208dfd 4979 if (ret != QLA_SUCCESS)
7c3df132
SK		 4980 ql_dbg(ql_dbg_init, base_vha, 0x0101,
4981 "%s Req que: %d init failed.\n",
4982 __func__, req->id);
73208dfd 4983 else
7c3df132
SK		 4984 ql_dbg(ql_dbg_init, base_vha, 0x0102,
4985 "%s Req que: %d inited.\n",
4986 __func__, req->id);
73208dfd
AC		 4987 }
4988 }
4989 return ret;
4990}
4991
1da177e4
LT		 4992/*
4993* qla2x00_reset_adapter
4994* Reset adapter.
4995*
4996* Input:
4997* ha = adapter block pointer.
4998*/
abbd8870 4999void
e315cd28 5000qla2x00_reset_adapter(scsi_qla_host_t *vha)
1da177e4
LT		 5001{
5002 unsigned long flags = 0;
e315cd28 5003 struct qla_hw_data *ha = vha->hw;
3d71644c 5004 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 5005
e315cd28 5006 vha->flags.online = 0;
fd34f556 5007 ha->isp_ops->disable_intrs(ha);
1da177e4 5008
1da177e4
LT		 5009 spin_lock_irqsave(&ha->hardware_lock, flags);
5010 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
5011 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
5012 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
5013 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
5014 spin_unlock_irqrestore(&ha->hardware_lock, flags);
5015}
0107109e
AV		 5016
5017void
e315cd28 5018qla24xx_reset_adapter(scsi_qla_host_t *vha)
0107109e
AV		 5019{
5020 unsigned long flags = 0;
e315cd28 5021 struct qla_hw_data *ha = vha->hw;
0107109e
AV		 5022 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
5023
7ec0effd 5024 if (IS_P3P_TYPE(ha))
a9083016
GM		 5025 return;
5026
e315cd28 5027 vha->flags.online = 0;
fd34f556 5028 ha->isp_ops->disable_intrs(ha);
0107109e
AV		 5029
5030 spin_lock_irqsave(&ha->hardware_lock, flags);
5031 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
5032 RD_REG_DWORD(&reg->hccr);
5033 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
5034 RD_REG_DWORD(&reg->hccr);
5035 spin_unlock_irqrestore(&ha->hardware_lock, flags);
09ff36d3
AV		 5036
5037 if (IS_NOPOLLING_TYPE(ha))
5038 ha->isp_ops->enable_intrs(ha);
0107109e
AV		 5039}
5040
4e08df3f
DM		 5041/* On sparc systems, obtain port and node WWN from firmware
5042 * properties.
5043 */
e315cd28
AC		 5044static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
5045 struct nvram_24xx *nv)
4e08df3f
DM		 5046{
5047#ifdef CONFIG_SPARC
e315cd28 5048 struct qla_hw_data *ha = vha->hw;
4e08df3f 5049 struct pci_dev *pdev = ha->pdev;
15576bc8
DM		 5050 struct device_node *dp = pci_device_to_OF_node(pdev);
5051 const u8 *val;
4e08df3f
DM		 5052 int len;
5053
5054 val = of_get_property(dp, "port-wwn", &len);
5055 if (val && len >= WWN_SIZE)
5056 memcpy(nv->port_name, val, WWN_SIZE);
5057
5058 val = of_get_property(dp, "node-wwn", &len);
5059 if (val && len >= WWN_SIZE)
5060 memcpy(nv->node_name, val, WWN_SIZE);
5061#endif
5062}
5063
0107109e 5064int
e315cd28 5065qla24xx_nvram_config(scsi_qla_host_t *vha)
0107109e 5066{
4e08df3f 5067 int rval;
0107109e
AV		 5068 struct init_cb_24xx *icb;
5069 struct nvram_24xx *nv;
5070 uint32_t *dptr;
5071 uint8_t *dptr1, *dptr2;
5072 uint32_t chksum;
5073 uint16_t cnt;
e315cd28 5074 struct qla_hw_data *ha = vha->hw;
0107109e 5075
4e08df3f 5076 rval = QLA_SUCCESS;
0107109e 5077 icb = (struct init_cb_24xx *)ha->init_cb;
281afe19 5078 nv = ha->nvram;
0107109e
AV		 5079
5080 /* Determine NVRAM starting address. */
f73cb695 5081 if (ha->port_no == 0) {
e5b68a61
AC		 5082 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
5083 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
5084 } else {
0107109e 5085 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
6f641790
AV		 5086 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
5087 }
f73cb695 5088
e5b68a61
AC		 5089 ha->nvram_size = sizeof(struct nvram_24xx);
5090 ha->vpd_size = FA_NVRAM_VPD_SIZE;
0107109e 5091
281afe19
SJ		 5092 /* Get VPD data into cache */
5093 ha->vpd = ha->nvram + VPD_OFFSET;
e315cd28 5094 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
281afe19
SJ		 5095 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
5096
5097 /* Get NVRAM data into cache and calculate checksum. */
0107109e 5098 dptr = (uint32_t *)nv;
e315cd28 5099 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
0107109e
AV		 5100 ha->nvram_size);
5101 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
5102 chksum += le32_to_cpu(*dptr++);
5103
7c3df132
SK		 5104 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
5105 "Contents of NVRAM\n");
5106 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
5107 (uint8_t *)nv, ha->nvram_size);
0107109e
AV		 5108
5109 /* Bad NVRAM data, set defaults parameters. */
5110 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
5111 || nv->id[3] != ' ' ||
5112 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
5113 /* Reset NVRAM data. */
7c3df132 5114 ql_log(ql_log_warn, vha, 0x006b,
9e336520 5115 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
7c3df132
SK		 5116 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version);
5117 ql_log(ql_log_warn, vha, 0x006c,
5118 "Falling back to functioning (yet invalid -- WWPN) "
5119 "defaults.\n");
4e08df3f
DM		 5120
5121 /*
5122 * Set default initialization control block.
5123 */
5124 memset(nv, 0, ha->nvram_size);
5125 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
5126 nv->version = __constant_cpu_to_le16(ICB_VERSION);
98aee70d 5127 nv->frame_payload_size = 2048;
4e08df3f
DM		 5128 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
5129 nv->exchange_count = __constant_cpu_to_le16(0);
5130 nv->hard_address = __constant_cpu_to_le16(124);
5131 nv->port_name[0] = 0x21;
f73cb695 5132 nv->port_name[1] = 0x00 + ha->port_no + 1;
4e08df3f
DM		 5133 nv->port_name[2] = 0x00;
5134 nv->port_name[3] = 0xe0;
5135 nv->port_name[4] = 0x8b;
5136 nv->port_name[5] = 0x1c;
5137 nv->port_name[6] = 0x55;
5138 nv->port_name[7] = 0x86;
5139 nv->node_name[0] = 0x20;
5140 nv->node_name[1] = 0x00;
5141 nv->node_name[2] = 0x00;
5142 nv->node_name[3] = 0xe0;
5143 nv->node_name[4] = 0x8b;
5144 nv->node_name[5] = 0x1c;
5145 nv->node_name[6] = 0x55;
5146 nv->node_name[7] = 0x86;
e315cd28 5147 qla24xx_nvram_wwn_from_ofw(vha, nv);
4e08df3f
DM		 5148 nv->login_retry_count = __constant_cpu_to_le16(8);
5149 nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
5150 nv->login_timeout = __constant_cpu_to_le16(0);
5151 nv->firmware_options_1 =
5152 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
5153 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
5154 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
5155 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
5156 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
5157 nv->efi_parameters = __constant_cpu_to_le32(0);
5158 nv->reset_delay = 5;
5159 nv->max_luns_per_target = __constant_cpu_to_le16(128);
5160 nv->port_down_retry_count = __constant_cpu_to_le16(30);
5161 nv->link_down_timeout = __constant_cpu_to_le16(30);
5162
5163 rval = 1;
0107109e
AV		 5164 }
5165
2d70c103
NB		 5166 if (!qla_ini_mode_enabled(vha)) {
5167 /* Don't enable full login after initial LIP */
5168 nv->firmware_options_1 &= __constant_cpu_to_le32(~BIT_13);
5169 /* Don't enable LIP full login for initiator */
5170 nv->host_p &= __constant_cpu_to_le32(~BIT_10);
5171 }
5172
5173 qlt_24xx_config_nvram_stage1(vha, nv);
5174
0107109e 5175 /* Reset Initialization control block */
e315cd28 5176 memset(icb, 0, ha->init_cb_size);
0107109e
AV		 5177
5178 /* Copy 1st segment. */
5179 dptr1 = (uint8_t *)icb;
5180 dptr2 = (uint8_t *)&nv->version;
5181 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
5182 while (cnt--)
5183 *dptr1++ = *dptr2++;
5184
5185 icb->login_retry_count = nv->login_retry_count;
3ea66e28 5186 icb->link_down_on_nos = nv->link_down_on_nos;
0107109e
AV		 5187
5188 /* Copy 2nd segment. */
5189 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
5190 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
5191 cnt = (uint8_t *)&icb->reserved_3 -
5192 (uint8_t *)&icb->interrupt_delay_timer;
5193 while (cnt--)
5194 *dptr1++ = *dptr2++;
5195
5196 /*
5197 * Setup driver NVRAM options.
5198 */
e315cd28 5199 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
9bb9fcf2 5200 "QLA2462");
0107109e 5201
2d70c103
NB		 5202 qlt_24xx_config_nvram_stage2(vha, icb);
5203
5341e868 5204 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
2d70c103 5205 /* Use alternate WWN? */
5341e868
AV		 5206 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
5207 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
5208 }
5209
0107109e 5210 /* Prepare nodename */
fd0e7e4d 5211 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
0107109e
AV		 5212 /*
5213 * Firmware will apply the following mask if the nodename was
5214 * not provided.
5215 */
5216 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
5217 icb->node_name[0] &= 0xF0;
5218 }
5219
5220 /* Set host adapter parameters. */
5221 ha->flags.disable_risc_code_load = 0;
0c8c39af
AV		 5222 ha->flags.enable_lip_reset = 0;
5223 ha->flags.enable_lip_full_login =
5224 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
5225 ha->flags.enable_target_reset =
5226 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
0107109e 5227 ha->flags.enable_led_scheme = 0;
d4c760c2 5228 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
0107109e 5229
fd0e7e4d
AV		 5230 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
5231 (BIT_6 | BIT_5 | BIT_4)) >> 4;
0107109e
AV		 5232
5233 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
5234 sizeof(ha->fw_seriallink_options24));
5235
5236 /* save HBA serial number */
5237 ha->serial0 = icb->port_name[5];
5238 ha->serial1 = icb->port_name[6];
5239 ha->serial2 = icb->port_name[7];
e315cd28
AC		 5240 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
5241 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
0107109e 5242
bc8fb3cb
AV		 5243 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
5244
0107109e
AV		 5245 ha->retry_count = le16_to_cpu(nv->login_retry_count);
5246
5247 /* Set minimum login_timeout to 4 seconds. */
5248 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
5249 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
5250 if (le16_to_cpu(nv->login_timeout) < 4)
5251 nv->login_timeout = __constant_cpu_to_le16(4);
5252 ha->login_timeout = le16_to_cpu(nv->login_timeout);
c6852c4c 5253 icb->login_timeout = nv->login_timeout;
0107109e 5254
00a537b8
AV		 5255 /* Set minimum RATOV to 100 tenths of a second. */
5256 ha->r_a_tov = 100;
0107109e
AV		 5257
5258 ha->loop_reset_delay = nv->reset_delay;
5259
5260 /* Link Down Timeout = 0:
5261 *
5262 * When Port Down timer expires we will start returning
5263 * I/O's to OS with "DID_NO_CONNECT".
5264 *
5265 * Link Down Timeout != 0:
5266 *
5267 * The driver waits for the link to come up after link down
5268 * before returning I/Os to OS with "DID_NO_CONNECT".
5269 */
5270 if (le16_to_cpu(nv->link_down_timeout) == 0) {
5271 ha->loop_down_abort_time =
5272 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
5273 } else {
5274 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
5275 ha->loop_down_abort_time =
5276 (LOOP_DOWN_TIME - ha->link_down_timeout);
5277 }
5278
5279 /* Need enough time to try and get the port back. */
5280 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
5281 if (qlport_down_retry)
5282 ha->port_down_retry_count = qlport_down_retry;
5283
5284 /* Set login_retry_count */
5285 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
5286 if (ha->port_down_retry_count ==
5287 le16_to_cpu(nv->port_down_retry_count) &&
5288 ha->port_down_retry_count > 3)
5289 ha->login_retry_count = ha->port_down_retry_count;
5290 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
5291 ha->login_retry_count = ha->port_down_retry_count;
5292 if (ql2xloginretrycount)
5293 ha->login_retry_count = ql2xloginretrycount;
5294
4fdfefe5 5295 /* Enable ZIO. */
e315cd28 5296 if (!vha->flags.init_done) {
4fdfefe5
AV		 5297 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
5298 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
5299 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
5300 le16_to_cpu(icb->interrupt_delay_timer): 2;
5301 }
5302 icb->firmware_options_2 &= __constant_cpu_to_le32(
5303 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
e315cd28 5304 vha->flags.process_response_queue = 0;
4fdfefe5 5305 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4a59f71d
AV		 5306 ha->zio_mode = QLA_ZIO_MODE_6;
5307
7c3df132 5308 ql_log(ql_log_info, vha, 0x006f,
4fdfefe5
AV		 5309 "ZIO mode %d enabled; timer delay (%d us).\n",
5310 ha->zio_mode, ha->zio_timer * 100);
5311
5312 icb->firmware_options_2 |= cpu_to_le32(
5313 (uint32_t)ha->zio_mode);
5314 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
e315cd28 5315 vha->flags.process_response_queue = 1;
4fdfefe5
AV		 5316 }
5317
4e08df3f 5318 if (rval) {
7c3df132
SK		 5319 ql_log(ql_log_warn, vha, 0x0070,
5320 "NVRAM configuration failed.\n");
4e08df3f
DM		 5321 }
5322 return (rval);
0107109e
AV		 5323}
5324
413975a0 5325static int
cbc8eb67
AV		 5326qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
5327 uint32_t faddr)
d1c61909 5328{
73208dfd 5329 int rval = QLA_SUCCESS;
d1c61909 5330 int segments, fragment;
d1c61909
AV		 5331 uint32_t *dcode, dlen;
5332 uint32_t risc_addr;
5333 uint32_t risc_size;
5334 uint32_t i;
e315cd28 5335 struct qla_hw_data *ha = vha->hw;
73208dfd 5336 struct req_que *req = ha->req_q_map[0];
eaac30be 5337
7c3df132 5338 ql_dbg(ql_dbg_init, vha, 0x008b,
cfb0919c 5339 "FW: Loading firmware from flash (%x).\n", faddr);
eaac30be 5340
d1c61909
AV		 5341 rval = QLA_SUCCESS;
5342
5343 segments = FA_RISC_CODE_SEGMENTS;
73208dfd 5344 dcode = (uint32_t *)req->ring;
d1c61909
AV		 5345 *srisc_addr = 0;
5346
5347 /* Validate firmware image by checking version. */
e315cd28 5348 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
d1c61909
AV		 5349 for (i = 0; i < 4; i++)
5350 dcode[i] = be32_to_cpu(dcode[i]);
5351 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
5352 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
5353 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
5354 dcode[3] == 0)) {
7c3df132
SK		 5355 ql_log(ql_log_fatal, vha, 0x008c,
5356 "Unable to verify the integrity of flash firmware "
5357 "image.\n");
5358 ql_log(ql_log_fatal, vha, 0x008d,
5359 "Firmware data: %08x %08x %08x %08x.\n",
5360 dcode[0], dcode[1], dcode[2], dcode[3]);
d1c61909
AV		 5361
5362 return QLA_FUNCTION_FAILED;
5363 }
5364
5365 while (segments && rval == QLA_SUCCESS) {
5366 /* Read segment's load information. */
e315cd28 5367 qla24xx_read_flash_data(vha, dcode, faddr, 4);
d1c61909
AV		 5368
5369 risc_addr = be32_to_cpu(dcode[2]);
5370 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
5371 risc_size = be32_to_cpu(dcode[3]);
5372
5373 fragment = 0;
5374 while (risc_size > 0 && rval == QLA_SUCCESS) {
5375 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
5376 if (dlen > risc_size)
5377 dlen = risc_size;
5378
7c3df132
SK		 5379 ql_dbg(ql_dbg_init, vha, 0x008e,
5380 "Loading risc segment@ risc addr %x "
5381 "number of dwords 0x%x offset 0x%x.\n",
5382 risc_addr, dlen, faddr);
d1c61909 5383
e315cd28 5384 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
d1c61909
AV		 5385 for (i = 0; i < dlen; i++)
5386 dcode[i] = swab32(dcode[i]);
5387
73208dfd 5388 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
d1c61909
AV		 5389 dlen);
5390 if (rval) {
7c3df132
SK		 5391 ql_log(ql_log_fatal, vha, 0x008f,
5392 "Failed to load segment %d of firmware.\n",
5393 fragment);
f261f7af 5394 return QLA_FUNCTION_FAILED;
d1c61909
AV		 5395 }
5396
5397 faddr += dlen;
5398 risc_addr += dlen;
5399 risc_size -= dlen;
5400 fragment++;
5401 }
5402
5403 /* Next segment. */
5404 segments--;
5405 }
5406
f73cb695
CD		 5407 if (!IS_QLA27XX(ha))
5408 return rval;
5409
5410 if (ha->fw_dump_template)
5411 vfree(ha->fw_dump_template);
5412 ha->fw_dump_template = NULL;
5413 ha->fw_dump_template_len = 0;
5414
5415 ql_dbg(ql_dbg_init, vha, 0x0161,
5416 "Loading fwdump template from %x\n", faddr);
5417 qla24xx_read_flash_data(vha, dcode, faddr, 7);
5418 risc_size = be32_to_cpu(dcode[2]);
5419 ql_dbg(ql_dbg_init, vha, 0x0162,
5420 "-> array size %x dwords\n", risc_size);
5421 if (risc_size == 0 || risc_size == ~0)
5422 goto default_template;
5423
5424 dlen = (risc_size - 8) * sizeof(*dcode);
5425 ql_dbg(ql_dbg_init, vha, 0x0163,
5426 "-> template allocating %x bytes...\n", dlen);
5427 ha->fw_dump_template = vmalloc(dlen);
5428 if (!ha->fw_dump_template) {
5429 ql_log(ql_log_warn, vha, 0x0164,
5430 "Failed fwdump template allocate %x bytes.\n", risc_size);
5431 goto default_template;
5432 }
5433
5434 faddr += 7;
5435 risc_size -= 8;
5436 dcode = ha->fw_dump_template;
5437 qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
5438 for (i = 0; i < risc_size; i++)
5439 dcode[i] = le32_to_cpu(dcode[i]);
5440
5441 if (!qla27xx_fwdt_template_valid(dcode)) {
5442 ql_log(ql_log_warn, vha, 0x0165,
5443 "Failed fwdump template validate\n");
5444 goto default_template;
5445 }
5446
5447 dlen = qla27xx_fwdt_template_size(dcode);
5448 ql_dbg(ql_dbg_init, vha, 0x0166,
5449 "-> template size %x bytes\n", dlen);
5450 if (dlen > risc_size * sizeof(*dcode)) {
5451 ql_log(ql_log_warn, vha, 0x0167,
97ea702b
CD		 5452 "Failed fwdump template exceeds array by %x bytes\n",
5453 (uint32_t)(dlen - risc_size * sizeof(*dcode)));
f73cb695
CD		 5454 goto default_template;
5455 }
5456 ha->fw_dump_template_len = dlen;
5457 return rval;
5458
5459default_template:
5460 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n");
5461 if (ha->fw_dump_template)
5462 vfree(ha->fw_dump_template);
5463 ha->fw_dump_template = NULL;
5464 ha->fw_dump_template_len = 0;
5465
5466 dlen = qla27xx_fwdt_template_default_size();
5467 ql_dbg(ql_dbg_init, vha, 0x0169,
5468 "-> template allocating %x bytes...\n", dlen);
5469 ha->fw_dump_template = vmalloc(dlen);
5470 if (!ha->fw_dump_template) {
5471 ql_log(ql_log_warn, vha, 0x016a,
5472 "Failed fwdump template allocate %x bytes.\n", risc_size);
5473 goto failed_template;
5474 }
5475
5476 dcode = ha->fw_dump_template;
5477 risc_size = dlen / sizeof(*dcode);
5478 memcpy(dcode, qla27xx_fwdt_template_default(), dlen);
5479 for (i = 0; i < risc_size; i++)
5480 dcode[i] = be32_to_cpu(dcode[i]);
5481
5482 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
5483 ql_log(ql_log_warn, vha, 0x016b,
5484 "Failed fwdump template validate\n");
5485 goto failed_template;
5486 }
5487
5488 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
5489 ql_dbg(ql_dbg_init, vha, 0x016c,
5490 "-> template size %x bytes\n", dlen);
5491 ha->fw_dump_template_len = dlen;
5492 return rval;
5493
5494failed_template:
5495 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n");
5496 if (ha->fw_dump_template)
5497 vfree(ha->fw_dump_template);
5498 ha->fw_dump_template = NULL;
5499 ha->fw_dump_template_len = 0;
d1c61909
AV		 5500 return rval;
5501}
5502
e9454a88 5503#define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
d1c61909 5504
0107109e 5505int
e315cd28 5506qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5433383e
AV		 5507{
5508 int rval;
5509 int i, fragment;
5510 uint16_t *wcode, *fwcode;
5511 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
5512 struct fw_blob *blob;
e315cd28 5513 struct qla_hw_data *ha = vha->hw;
73208dfd 5514 struct req_que *req = ha->req_q_map[0];
5433383e
AV		 5515
5516 /* Load firmware blob. */
e315cd28 5517 blob = qla2x00_request_firmware(vha);
5433383e 5518 if (!blob) {
7c3df132 5519 ql_log(ql_log_info, vha, 0x0083,
94bcf830 5520 "Firmware image unavailable.\n");
7c3df132
SK		 5521 ql_log(ql_log_info, vha, 0x0084,
5522 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
5433383e
AV		 5523 return QLA_FUNCTION_FAILED;
5524 }
5525
5526 rval = QLA_SUCCESS;
5527
73208dfd 5528 wcode = (uint16_t *)req->ring;
5433383e
AV		 5529 *srisc_addr = 0;
5530 fwcode = (uint16_t *)blob->fw->data;
5531 fwclen = 0;
5532
5533 /* Validate firmware image by checking version. */
5534 if (blob->fw->size < 8 * sizeof(uint16_t)) {
7c3df132
SK		 5535 ql_log(ql_log_fatal, vha, 0x0085,
5536 "Unable to verify integrity of firmware image (%Zd).\n",
5433383e
AV		 5537 blob->fw->size);
5538 goto fail_fw_integrity;
5539 }
5540 for (i = 0; i < 4; i++)
5541 wcode[i] = be16_to_cpu(fwcode[i + 4]);
5542 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
5543 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
5544 wcode[2] == 0 && wcode[3] == 0)) {
7c3df132
SK		 5545 ql_log(ql_log_fatal, vha, 0x0086,
5546 "Unable to verify integrity of firmware image.\n");
5547 ql_log(ql_log_fatal, vha, 0x0087,
5548 "Firmware data: %04x %04x %04x %04x.\n",
5549 wcode[0], wcode[1], wcode[2], wcode[3]);
5433383e
AV		 5550 goto fail_fw_integrity;
5551 }
5552
5553 seg = blob->segs;
5554 while (*seg && rval == QLA_SUCCESS) {
5555 risc_addr = *seg;
5556 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
5557 risc_size = be16_to_cpu(fwcode[3]);
5558
5559 /* Validate firmware image size. */
5560 fwclen += risc_size * sizeof(uint16_t);
5561 if (blob->fw->size < fwclen) {
7c3df132 5562 ql_log(ql_log_fatal, vha, 0x0088,
5433383e 5563 "Unable to verify integrity of firmware image "
7c3df132 5564 "(%Zd).\n", blob->fw->size);
5433383e
AV		 5565 goto fail_fw_integrity;
5566 }
5567
5568 fragment = 0;
5569 while (risc_size > 0 && rval == QLA_SUCCESS) {
5570 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
5571 if (wlen > risc_size)
5572 wlen = risc_size;
7c3df132
SK		 5573 ql_dbg(ql_dbg_init, vha, 0x0089,
5574 "Loading risc segment@ risc addr %x number of "
5575 "words 0x%x.\n", risc_addr, wlen);
5433383e
AV		 5576
5577 for (i = 0; i < wlen; i++)
5578 wcode[i] = swab16(fwcode[i]);
5579
73208dfd 5580 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5433383e
AV		 5581 wlen);
5582 if (rval) {
7c3df132
SK		 5583 ql_log(ql_log_fatal, vha, 0x008a,
5584 "Failed to load segment %d of firmware.\n",
5585 fragment);
5433383e
AV		 5586 break;
5587 }
5588
5589 fwcode += wlen;
5590 risc_addr += wlen;
5591 risc_size -= wlen;
5592 fragment++;
5593 }
5594
5595 /* Next segment. */
5596 seg++;
5597 }
5598 return rval;
5599
5600fail_fw_integrity:
5601 return QLA_FUNCTION_FAILED;
5602}
5603
eaac30be
AV		 5604static int
5605qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
0107109e
AV		 5606{
5607 int rval;
5608 int segments, fragment;
5609 uint32_t *dcode, dlen;
5610 uint32_t risc_addr;
5611 uint32_t risc_size;
5612 uint32_t i;
5433383e 5613 struct fw_blob *blob;
f73cb695
CD		 5614 const uint32_t *fwcode;
5615 uint32_t fwclen;
e315cd28 5616 struct qla_hw_data *ha = vha->hw;
73208dfd 5617 struct req_que *req = ha->req_q_map[0];
0107109e 5618
5433383e 5619 /* Load firmware blob. */
e315cd28 5620 blob = qla2x00_request_firmware(vha);
5433383e 5621 if (!blob) {
7c3df132 5622 ql_log(ql_log_warn, vha, 0x0090,
94bcf830 5623 "Firmware image unavailable.\n");
7c3df132
SK		 5624 ql_log(ql_log_warn, vha, 0x0091,
5625 "Firmware images can be retrieved from: "
5626 QLA_FW_URL ".\n");
d1c61909 5627
eaac30be 5628 return QLA_FUNCTION_FAILED;
0107109e
AV		 5629 }
5630
cfb0919c
CD		 5631 ql_dbg(ql_dbg_init, vha, 0x0092,
5632 "FW: Loading via request-firmware.\n");
eaac30be 5633
0107109e
AV		 5634 rval = QLA_SUCCESS;
5635
5636 segments = FA_RISC_CODE_SEGMENTS;
73208dfd 5637 dcode = (uint32_t *)req->ring;
0107109e 5638 *srisc_addr = 0;
5433383e 5639 fwcode = (uint32_t *)blob->fw->data;
0107109e
AV		 5640 fwclen = 0;
5641
5642 /* Validate firmware image by checking version. */
5433383e 5643 if (blob->fw->size < 8 * sizeof(uint32_t)) {
7c3df132
SK		 5644 ql_log(ql_log_fatal, vha, 0x0093,
5645 "Unable to verify integrity of firmware image (%Zd).\n",
5433383e 5646 blob->fw->size);
f73cb695 5647 return QLA_FUNCTION_FAILED;
0107109e
AV		 5648 }
5649 for (i = 0; i < 4; i++)
5650 dcode[i] = be32_to_cpu(fwcode[i + 4]);
5651 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
5652 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
5653 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
5654 dcode[3] == 0)) {
7c3df132
SK		 5655 ql_log(ql_log_fatal, vha, 0x0094,
5656 "Unable to verify integrity of firmware image (%Zd).\n",
5657 blob->fw->size);
5658 ql_log(ql_log_fatal, vha, 0x0095,
5659 "Firmware data: %08x %08x %08x %08x.\n",
5660 dcode[0], dcode[1], dcode[2], dcode[3]);
f73cb695 5661 return QLA_FUNCTION_FAILED;
0107109e
AV		 5662 }
5663
5664 while (segments && rval == QLA_SUCCESS) {
5665 risc_addr = be32_to_cpu(fwcode[2]);
5666 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
5667 risc_size = be32_to_cpu(fwcode[3]);
5668
5669 /* Validate firmware image size. */
5670 fwclen += risc_size * sizeof(uint32_t);
5433383e 5671 if (blob->fw->size < fwclen) {
7c3df132 5672 ql_log(ql_log_fatal, vha, 0x0096,
5433383e 5673 "Unable to verify integrity of firmware image "
7c3df132 5674 "(%Zd).\n", blob->fw->size);
f73cb695 5675 return QLA_FUNCTION_FAILED;
0107109e
AV		 5676 }
5677
5678 fragment = 0;
5679 while (risc_size > 0 && rval == QLA_SUCCESS) {
5680 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
5681 if (dlen > risc_size)
5682 dlen = risc_size;
5683
7c3df132
SK		 5684 ql_dbg(ql_dbg_init, vha, 0x0097,
5685 "Loading risc segment@ risc addr %x "
5686 "number of dwords 0x%x.\n", risc_addr, dlen);
0107109e
AV		 5687
5688 for (i = 0; i < dlen; i++)
5689 dcode[i] = swab32(fwcode[i]);
5690
73208dfd 5691 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
590f98e5 5692 dlen);
0107109e 5693 if (rval) {
7c3df132
SK		 5694 ql_log(ql_log_fatal, vha, 0x0098,
5695 "Failed to load segment %d of firmware.\n",
5696 fragment);
f261f7af 5697 return QLA_FUNCTION_FAILED;
0107109e
AV		 5698 }
5699
5700 fwcode += dlen;
5701 risc_addr += dlen;
5702 risc_size -= dlen;
5703 fragment++;
5704 }
5705
5706 /* Next segment. */
5707 segments--;
5708 }
f73cb695
CD		 5709
5710 if (!IS_QLA27XX(ha))
5711 return rval;
5712
5713 if (ha->fw_dump_template)
5714 vfree(ha->fw_dump_template);
5715 ha->fw_dump_template = NULL;
5716 ha->fw_dump_template_len = 0;
5717
5718 ql_dbg(ql_dbg_init, vha, 0x171,
97ea702b
CD		 5719 "Loading fwdump template from %x\n",
5720 (uint32_t)((void *)fwcode - (void *)blob->fw->data));
f73cb695
CD		 5721 risc_size = be32_to_cpu(fwcode[2]);
5722 ql_dbg(ql_dbg_init, vha, 0x172,
5723 "-> array size %x dwords\n", risc_size);
5724 if (risc_size == 0 || risc_size == ~0)
5725 goto default_template;
5726
5727 dlen = (risc_size - 8) * sizeof(*fwcode);
5728 ql_dbg(ql_dbg_init, vha, 0x0173,
5729 "-> template allocating %x bytes...\n", dlen);
5730 ha->fw_dump_template = vmalloc(dlen);
5731 if (!ha->fw_dump_template) {
5732 ql_log(ql_log_warn, vha, 0x0174,
5733 "Failed fwdump template allocate %x bytes.\n", risc_size);
5734 goto default_template;
5735 }
5736
5737 fwcode += 7;
5738 risc_size -= 8;
5739 dcode = ha->fw_dump_template;
5740 for (i = 0; i < risc_size; i++)
5741 dcode[i] = le32_to_cpu(fwcode[i]);
5742
5743 if (!qla27xx_fwdt_template_valid(dcode)) {
5744 ql_log(ql_log_warn, vha, 0x0175,
5745 "Failed fwdump template validate\n");
5746 goto default_template;
5747 }
5748
5749 dlen = qla27xx_fwdt_template_size(dcode);
5750 ql_dbg(ql_dbg_init, vha, 0x0176,
5751 "-> template size %x bytes\n", dlen);
5752 if (dlen > risc_size * sizeof(*fwcode)) {
5753 ql_log(ql_log_warn, vha, 0x0177,
97ea702b
CD		 5754 "Failed fwdump template exceeds array by %x bytes\n",
5755 (uint32_t)(dlen - risc_size * sizeof(*fwcode)));
f73cb695
CD		 5756 goto default_template;
5757 }
5758 ha->fw_dump_template_len = dlen;
0107109e
AV		 5759 return rval;
5760
f73cb695
CD		 5761default_template:
5762 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n");
5763 if (ha->fw_dump_template)
5764 vfree(ha->fw_dump_template);
5765 ha->fw_dump_template = NULL;
5766 ha->fw_dump_template_len = 0;
5767
5768 dlen = qla27xx_fwdt_template_default_size();
5769 ql_dbg(ql_dbg_init, vha, 0x0179,
5770 "-> template allocating %x bytes...\n", dlen);
5771 ha->fw_dump_template = vmalloc(dlen);
5772 if (!ha->fw_dump_template) {
5773 ql_log(ql_log_warn, vha, 0x017a,
5774 "Failed fwdump template allocate %x bytes.\n", risc_size);
5775 goto failed_template;
5776 }
5777
5778 dcode = ha->fw_dump_template;
5779 risc_size = dlen / sizeof(*fwcode);
5780 fwcode = qla27xx_fwdt_template_default();
5781 for (i = 0; i < risc_size; i++)
5782 dcode[i] = be32_to_cpu(fwcode[i]);
5783
5784 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
5785 ql_log(ql_log_warn, vha, 0x017b,
5786 "Failed fwdump template validate\n");
5787 goto failed_template;
5788 }
5789
5790 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
5791 ql_dbg(ql_dbg_init, vha, 0x017c,
5792 "-> template size %x bytes\n", dlen);
5793 ha->fw_dump_template_len = dlen;
5794 return rval;
5795
5796failed_template:
5797 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n");
5798 if (ha->fw_dump_template)
5799 vfree(ha->fw_dump_template);
5800 ha->fw_dump_template = NULL;
5801 ha->fw_dump_template_len = 0;
5802 return rval;
0107109e 5803}
18c6c127 5804
eaac30be
AV		 5805int
5806qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5807{
5808 int rval;
5809
e337d907
AV		 5810 if (ql2xfwloadbin == 1)
5811 return qla81xx_load_risc(vha, srisc_addr);
5812
eaac30be
AV		 5813 /*
5814 * FW Load priority:
5815 * 1) Firmware via request-firmware interface (.bin file).
5816 * 2) Firmware residing in flash.
5817 */
5818 rval = qla24xx_load_risc_blob(vha, srisc_addr);
5819 if (rval == QLA_SUCCESS)
5820 return rval;
5821
cbc8eb67
AV		 5822 return qla24xx_load_risc_flash(vha, srisc_addr,
5823 vha->hw->flt_region_fw);
eaac30be
AV		 5824}
5825
5826int
5827qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5828{
5829 int rval;
cbc8eb67 5830 struct qla_hw_data *ha = vha->hw;
eaac30be 5831
e337d907 5832 if (ql2xfwloadbin == 2)
cbc8eb67 5833 goto try_blob_fw;
e337d907 5834
eaac30be
AV		 5835 /*
5836 * FW Load priority:
5837 * 1) Firmware residing in flash.
5838 * 2) Firmware via request-firmware interface (.bin file).
cbc8eb67 5839 * 3) Golden-Firmware residing in flash -- limited operation.
eaac30be 5840 */
cbc8eb67 5841 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
eaac30be
AV		 5842 if (rval == QLA_SUCCESS)
5843 return rval;
5844
cbc8eb67
AV		 5845try_blob_fw:
5846 rval = qla24xx_load_risc_blob(vha, srisc_addr);
5847 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
5848 return rval;
5849
7c3df132
SK		 5850 ql_log(ql_log_info, vha, 0x0099,
5851 "Attempting to fallback to golden firmware.\n");
cbc8eb67
AV		 5852 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
5853 if (rval != QLA_SUCCESS)
5854 return rval;
5855
7c3df132 5856 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n");
cbc8eb67 5857 ha->flags.running_gold_fw = 1;
cbc8eb67 5858 return rval;
eaac30be
AV		 5859}
5860
18c6c127 5861void
e315cd28 5862qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
18c6c127
AV		 5863{
5864 int ret, retries;
e315cd28 5865 struct qla_hw_data *ha = vha->hw;
18c6c127 5866
85880801
AV		 5867 if (ha->flags.pci_channel_io_perm_failure)
5868 return;
e428924c 5869 if (!IS_FWI2_CAPABLE(ha))
18c6c127 5870 return;
75edf81d
AV		 5871 if (!ha->fw_major_version)
5872 return;
18c6c127 5873
e315cd28 5874 ret = qla2x00_stop_firmware(vha);
7c7f1f29 5875 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
b469a7cb 5876 ret != QLA_INVALID_COMMAND && retries ; retries--) {
e315cd28
AC		 5877 ha->isp_ops->reset_chip(vha);
5878 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
18c6c127 5879 continue;
e315cd28 5880 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
18c6c127 5881 continue;
7c3df132
SK		 5882 ql_log(ql_log_info, vha, 0x8015,
5883 "Attempting retry of stop-firmware command.\n");
e315cd28 5884 ret = qla2x00_stop_firmware(vha);
18c6c127
AV		 5885 }
5886}
2c3dfe3f
SJ		 5887
5888int
e315cd28 5889qla24xx_configure_vhba(scsi_qla_host_t *vha)
2c3dfe3f
SJ		 5890{
5891 int rval = QLA_SUCCESS;
0b91d116 5892 int rval2;
2c3dfe3f 5893 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28
AC		 5894 struct qla_hw_data *ha = vha->hw;
5895 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
67c2e93a
AC		 5896 struct req_que *req;
5897 struct rsp_que *rsp;
2c3dfe3f 5898
e315cd28 5899 if (!vha->vp_idx)
2c3dfe3f
SJ		 5900 return -EINVAL;
5901
e315cd28 5902 rval = qla2x00_fw_ready(base_vha);
7163ea81 5903 if (ha->flags.cpu_affinity_enabled)
67c2e93a
AC		 5904 req = ha->req_q_map[0];
5905 else
5906 req = vha->req;
5907 rsp = req->rsp;
5908
2c3dfe3f 5909 if (rval == QLA_SUCCESS) {
e315cd28 5910 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
73208dfd 5911 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
2c3dfe3f
SJ		 5912 }
5913
e315cd28 5914 vha->flags.management_server_logged_in = 0;
2c3dfe3f
SJ		 5915
5916 /* Login to SNS first */
0b91d116
CD		 5917 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
5918 BIT_1);
5919 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
5920 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
5921 ql_dbg(ql_dbg_init, vha, 0x0120,
5922 "Failed SNS login: loop_id=%x, rval2=%d\n",
5923 NPH_SNS, rval2);
5924 else
5925 ql_dbg(ql_dbg_init, vha, 0x0103,
5926 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
5927 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
5928 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
2c3dfe3f
SJ		 5929 return (QLA_FUNCTION_FAILED);
5930 }
5931
e315cd28
AC		 5932 atomic_set(&vha->loop_down_timer, 0);
5933 atomic_set(&vha->loop_state, LOOP_UP);
5934 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5935 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5936 rval = qla2x00_loop_resync(base_vha);
2c3dfe3f
SJ		 5937
5938 return rval;
5939}
4d4df193
HK		 5940
5941/* 84XX Support **************************************************************/
5942
5943static LIST_HEAD(qla_cs84xx_list);
5944static DEFINE_MUTEX(qla_cs84xx_mutex);
5945
5946static struct qla_chip_state_84xx *
e315cd28 5947qla84xx_get_chip(struct scsi_qla_host *vha)
4d4df193
HK		 5948{
5949 struct qla_chip_state_84xx *cs84xx;
e315cd28 5950 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 5951
5952 mutex_lock(&qla_cs84xx_mutex);
5953
5954 /* Find any shared 84xx chip. */
5955 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
5956 if (cs84xx->bus == ha->pdev->bus) {
5957 kref_get(&cs84xx->kref);
5958 goto done;
5959 }
5960 }
5961
5962 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
5963 if (!cs84xx)
5964 goto done;
5965
5966 kref_init(&cs84xx->kref);
5967 spin_lock_init(&cs84xx->access_lock);
5968 mutex_init(&cs84xx->fw_update_mutex);
5969 cs84xx->bus = ha->pdev->bus;
5970
5971 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
5972done:
5973 mutex_unlock(&qla_cs84xx_mutex);
5974 return cs84xx;
5975}
5976
5977static void
5978__qla84xx_chip_release(struct kref *kref)
5979{
5980 struct qla_chip_state_84xx *cs84xx =
5981 container_of(kref, struct qla_chip_state_84xx, kref);
5982
5983 mutex_lock(&qla_cs84xx_mutex);
5984 list_del(&cs84xx->list);
5985 mutex_unlock(&qla_cs84xx_mutex);
5986 kfree(cs84xx);
5987}
5988
5989void
e315cd28 5990qla84xx_put_chip(struct scsi_qla_host *vha)
4d4df193 5991{
e315cd28 5992 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 5993 if (ha->cs84xx)
5994 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
5995}
5996
5997static int
e315cd28 5998qla84xx_init_chip(scsi_qla_host_t *vha)
4d4df193
HK		 5999{
6000 int rval;
6001 uint16_t status[2];
e315cd28 6002 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 6003
6004 mutex_lock(&ha->cs84xx->fw_update_mutex);
6005
e315cd28 6006 rval = qla84xx_verify_chip(vha, status);
4d4df193
HK		 6007
6008 mutex_unlock(&ha->cs84xx->fw_update_mutex);
6009
6010 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
6011 QLA_SUCCESS;
6012}
3a03eb79
AV		 6013
6014/* 81XX Support **************************************************************/
6015
6016int
6017qla81xx_nvram_config(scsi_qla_host_t *vha)
6018{
6019 int rval;
6020 struct init_cb_81xx *icb;
6021 struct nvram_81xx *nv;
6022 uint32_t *dptr;
6023 uint8_t *dptr1, *dptr2;
6024 uint32_t chksum;
6025 uint16_t cnt;
6026 struct qla_hw_data *ha = vha->hw;
6027
6028 rval = QLA_SUCCESS;
6029 icb = (struct init_cb_81xx *)ha->init_cb;
6030 nv = ha->nvram;
6031
6032 /* Determine NVRAM starting address. */
6033 ha->nvram_size = sizeof(struct nvram_81xx);
3a03eb79 6034 ha->vpd_size = FA_NVRAM_VPD_SIZE;
7ec0effd
AD		 6035 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
6036 ha->vpd_size = FA_VPD_SIZE_82XX;
3a03eb79
AV		 6037
6038 /* Get VPD data into cache */
6039 ha->vpd = ha->nvram + VPD_OFFSET;
3d79038f
AV		 6040 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
6041 ha->vpd_size);
3a03eb79
AV		 6042
6043 /* Get NVRAM data into cache and calculate checksum. */
3d79038f 6044 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
3a03eb79 6045 ha->nvram_size);
3d79038f 6046 dptr = (uint32_t *)nv;
3a03eb79
AV		 6047 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
6048 chksum += le32_to_cpu(*dptr++);
6049
7c3df132
SK		 6050 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
6051 "Contents of NVRAM:\n");
6052 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
6053 (uint8_t *)nv, ha->nvram_size);
3a03eb79
AV		 6054
6055 /* Bad NVRAM data, set defaults parameters. */
6056 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
6057 || nv->id[3] != ' ' ||
6058 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
6059 /* Reset NVRAM data. */
7c3df132 6060 ql_log(ql_log_info, vha, 0x0073,
9e336520 6061 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
7c3df132 6062 "version=0x%x.\n", chksum, nv->id[0],
3a03eb79 6063 le16_to_cpu(nv->nvram_version));
7c3df132
SK		 6064 ql_log(ql_log_info, vha, 0x0074,
6065 "Falling back to functioning (yet invalid -- WWPN) "
6066 "defaults.\n");
3a03eb79
AV		 6067
6068 /*
6069 * Set default initialization control block.
6070 */
6071 memset(nv, 0, ha->nvram_size);
6072 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
6073 nv->version = __constant_cpu_to_le16(ICB_VERSION);
98aee70d 6074 nv->frame_payload_size = 2048;
3a03eb79
AV		 6075 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
6076 nv->exchange_count = __constant_cpu_to_le16(0);
6077 nv->port_name[0] = 0x21;
f73cb695 6078 nv->port_name[1] = 0x00 + ha->port_no + 1;
3a03eb79
AV		 6079 nv->port_name[2] = 0x00;
6080 nv->port_name[3] = 0xe0;
6081 nv->port_name[4] = 0x8b;
6082 nv->port_name[5] = 0x1c;
6083 nv->port_name[6] = 0x55;
6084 nv->port_name[7] = 0x86;
6085 nv->node_name[0] = 0x20;
6086 nv->node_name[1] = 0x00;
6087 nv->node_name[2] = 0x00;
6088 nv->node_name[3] = 0xe0;
6089 nv->node_name[4] = 0x8b;
6090 nv->node_name[5] = 0x1c;
6091 nv->node_name[6] = 0x55;
6092 nv->node_name[7] = 0x86;
6093 nv->login_retry_count = __constant_cpu_to_le16(8);
6094 nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
6095 nv->login_timeout = __constant_cpu_to_le16(0);
6096 nv->firmware_options_1 =
6097 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
6098 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
6099 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
6100 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
6101 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
6102 nv->efi_parameters = __constant_cpu_to_le32(0);
6103 nv->reset_delay = 5;
6104 nv->max_luns_per_target = __constant_cpu_to_le16(128);
6105 nv->port_down_retry_count = __constant_cpu_to_le16(30);
6246b8a1 6106 nv->link_down_timeout = __constant_cpu_to_le16(180);
eeebcc92 6107 nv->enode_mac[0] = 0x00;
6246b8a1
GM		 6108 nv->enode_mac[1] = 0xC0;
6109 nv->enode_mac[2] = 0xDD;
3a03eb79
AV		 6110 nv->enode_mac[3] = 0x04;
6111 nv->enode_mac[4] = 0x05;
f73cb695 6112 nv->enode_mac[5] = 0x06 + ha->port_no + 1;
3a03eb79
AV		 6113
6114 rval = 1;
6115 }
6116
9e522cd8
AE		 6117 if (IS_T10_PI_CAPABLE(ha))
6118 nv->frame_payload_size &= ~7;
6119
aa230bc5
AE		 6120 qlt_81xx_config_nvram_stage1(vha, nv);
6121
3a03eb79 6122 /* Reset Initialization control block */
773120e4 6123 memset(icb, 0, ha->init_cb_size);
3a03eb79
AV		 6124
6125 /* Copy 1st segment. */
6126 dptr1 = (uint8_t *)icb;
6127 dptr2 = (uint8_t *)&nv->version;
6128 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
6129 while (cnt--)
6130 *dptr1++ = *dptr2++;
6131
6132 icb->login_retry_count = nv->login_retry_count;
6133
6134 /* Copy 2nd segment. */
6135 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
6136 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
6137 cnt = (uint8_t *)&icb->reserved_5 -
6138 (uint8_t *)&icb->interrupt_delay_timer;
6139 while (cnt--)
6140 *dptr1++ = *dptr2++;
6141
6142 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
6143 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
6144 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
69e5f1ea
AV		 6145 icb->enode_mac[0] = 0x00;
6146 icb->enode_mac[1] = 0xC0;
6147 icb->enode_mac[2] = 0xDD;
3a03eb79
AV		 6148 icb->enode_mac[3] = 0x04;
6149 icb->enode_mac[4] = 0x05;
f73cb695 6150 icb->enode_mac[5] = 0x06 + ha->port_no + 1;
3a03eb79
AV		 6151 }
6152
b64b0e8f
AV		 6153 /* Use extended-initialization control block. */
6154 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
6155
3a03eb79
AV		 6156 /*
6157 * Setup driver NVRAM options.
6158 */
6159 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
a9083016 6160 "QLE8XXX");
3a03eb79 6161
aa230bc5
AE		 6162 qlt_81xx_config_nvram_stage2(vha, icb);
6163
3a03eb79
AV		 6164 /* Use alternate WWN? */
6165 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
6166 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
6167 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
6168 }
6169
6170 /* Prepare nodename */
6171 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
6172 /*
6173 * Firmware will apply the following mask if the nodename was
6174 * not provided.
6175 */
6176 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
6177 icb->node_name[0] &= 0xF0;
6178 }
6179
6180 /* Set host adapter parameters. */
6181 ha->flags.disable_risc_code_load = 0;
6182 ha->flags.enable_lip_reset = 0;
6183 ha->flags.enable_lip_full_login =
6184 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
6185 ha->flags.enable_target_reset =
6186 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
6187 ha->flags.enable_led_scheme = 0;
6188 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
6189
6190 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
6191 (BIT_6 | BIT_5 | BIT_4)) >> 4;
6192
6193 /* save HBA serial number */
6194 ha->serial0 = icb->port_name[5];
6195 ha->serial1 = icb->port_name[6];
6196 ha->serial2 = icb->port_name[7];
6197 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
6198 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
6199
6200 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
6201
6202 ha->retry_count = le16_to_cpu(nv->login_retry_count);
6203
6204 /* Set minimum login_timeout to 4 seconds. */
6205 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
6206 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
6207 if (le16_to_cpu(nv->login_timeout) < 4)
6208 nv->login_timeout = __constant_cpu_to_le16(4);
6209 ha->login_timeout = le16_to_cpu(nv->login_timeout);
6210 icb->login_timeout = nv->login_timeout;
6211
6212 /* Set minimum RATOV to 100 tenths of a second. */
6213 ha->r_a_tov = 100;
6214
6215 ha->loop_reset_delay = nv->reset_delay;
6216
6217 /* Link Down Timeout = 0:
6218 *
7ec0effd 6219 * When Port Down timer expires we will start returning
3a03eb79
AV		 6220 * I/O's to OS with "DID_NO_CONNECT".
6221 *
6222 * Link Down Timeout != 0:
6223 *
6224 * The driver waits for the link to come up after link down
6225 * before returning I/Os to OS with "DID_NO_CONNECT".
6226 */
6227 if (le16_to_cpu(nv->link_down_timeout) == 0) {
6228 ha->loop_down_abort_time =
6229 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
6230 } else {
6231 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
6232 ha->loop_down_abort_time =
6233 (LOOP_DOWN_TIME - ha->link_down_timeout);
6234 }
6235
6236 /* Need enough time to try and get the port back. */
6237 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
6238 if (qlport_down_retry)
6239 ha->port_down_retry_count = qlport_down_retry;
6240
6241 /* Set login_retry_count */
6242 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
6243 if (ha->port_down_retry_count ==
6244 le16_to_cpu(nv->port_down_retry_count) &&
6245 ha->port_down_retry_count > 3)
6246 ha->login_retry_count = ha->port_down_retry_count;
6247 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
6248 ha->login_retry_count = ha->port_down_retry_count;
6249 if (ql2xloginretrycount)
6250 ha->login_retry_count = ql2xloginretrycount;
6251
6246b8a1 6252 /* if not running MSI-X we need handshaking on interrupts */
f73cb695 6253 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha)))
6246b8a1
GM		 6254 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_22);
6255
3a03eb79
AV		 6256 /* Enable ZIO. */
6257 if (!vha->flags.init_done) {
6258 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
6259 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
6260 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
6261 le16_to_cpu(icb->interrupt_delay_timer): 2;
6262 }
6263 icb->firmware_options_2 &= __constant_cpu_to_le32(
6264 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
6265 vha->flags.process_response_queue = 0;
6266 if (ha->zio_mode != QLA_ZIO_DISABLED) {
6267 ha->zio_mode = QLA_ZIO_MODE_6;
6268
7c3df132 6269 ql_log(ql_log_info, vha, 0x0075,
3a03eb79 6270 "ZIO mode %d enabled; timer delay (%d us).\n",
7c3df132
SK		 6271 ha->zio_mode,
6272 ha->zio_timer * 100);
3a03eb79
AV		 6273
6274 icb->firmware_options_2 |= cpu_to_le32(
6275 (uint32_t)ha->zio_mode);
6276 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
6277 vha->flags.process_response_queue = 1;
6278 }
6279
6280 if (rval) {
7c3df132
SK		 6281 ql_log(ql_log_warn, vha, 0x0076,
6282 "NVRAM configuration failed.\n");
3a03eb79
AV		 6283 }
6284 return (rval);
6285}
6286
a9083016
GM		 6287int
6288qla82xx_restart_isp(scsi_qla_host_t *vha)
6289{
6290 int status, rval;
a9083016
GM		 6291 struct qla_hw_data *ha = vha->hw;
6292 struct req_que *req = ha->req_q_map[0];
6293 struct rsp_que *rsp = ha->rsp_q_map[0];
6294 struct scsi_qla_host *vp;
feafb7b1 6295 unsigned long flags;
a9083016
GM		 6296
6297 status = qla2x00_init_rings(vha);
6298 if (!status) {
6299 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6300 ha->flags.chip_reset_done = 1;
6301
6302 status = qla2x00_fw_ready(vha);
6303 if (!status) {
a9083016
GM		 6304 /* Issue a marker after FW becomes ready. */
6305 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
a9083016 6306 vha->flags.online = 1;
7108b76e 6307 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
a9083016
GM		 6308 }
6309
6310 /* if no cable then assume it's good */
6311 if ((vha->device_flags & DFLG_NO_CABLE))
6312 status = 0;
a9083016
GM		 6313 }
6314
6315 if (!status) {
6316 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6317
6318 if (!atomic_read(&vha->loop_down_timer)) {
6319 /*
6320 * Issue marker command only when we are going
6321 * to start the I/O .
6322 */
6323 vha->marker_needed = 1;
6324 }
6325
a9083016
GM		 6326 ha->isp_ops->enable_intrs(ha);
6327
6328 ha->isp_abort_cnt = 0;
6329 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6330
53296788 6331 /* Update the firmware version */
3173167f 6332 status = qla82xx_check_md_needed(vha);
53296788 6333
a9083016
GM		 6334 if (ha->fce) {
6335 ha->flags.fce_enabled = 1;
6336 memset(ha->fce, 0,
6337 fce_calc_size(ha->fce_bufs));
6338 rval = qla2x00_enable_fce_trace(vha,
6339 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
6340 &ha->fce_bufs);
6341 if (rval) {
cfb0919c 6342 ql_log(ql_log_warn, vha, 0x8001,
7c3df132
SK		 6343 "Unable to reinitialize FCE (%d).\n",
6344 rval);
a9083016
GM		 6345 ha->flags.fce_enabled = 0;
6346 }
6347 }
6348
6349 if (ha->eft) {
6350 memset(ha->eft, 0, EFT_SIZE);
6351 rval = qla2x00_enable_eft_trace(vha,
6352 ha->eft_dma, EFT_NUM_BUFFERS);
6353 if (rval) {
cfb0919c 6354 ql_log(ql_log_warn, vha, 0x8010,
7c3df132
SK		 6355 "Unable to reinitialize EFT (%d).\n",
6356 rval);
a9083016
GM		 6357 }
6358 }
a9083016
GM		 6359 }
6360
6361 if (!status) {
cfb0919c 6362 ql_dbg(ql_dbg_taskm, vha, 0x8011,
7c3df132 6363 "qla82xx_restart_isp succeeded.\n");
feafb7b1
AE		 6364
6365 spin_lock_irqsave(&ha->vport_slock, flags);
6366 list_for_each_entry(vp, &ha->vp_list, list) {
6367 if (vp->vp_idx) {
6368 atomic_inc(&vp->vref_count);
6369 spin_unlock_irqrestore(&ha->vport_slock, flags);
6370
a9083016 6371 qla2x00_vp_abort_isp(vp);
feafb7b1
AE		 6372
6373 spin_lock_irqsave(&ha->vport_slock, flags);
6374 atomic_dec(&vp->vref_count);
6375 }
a9083016 6376 }
feafb7b1
AE		 6377 spin_unlock_irqrestore(&ha->vport_slock, flags);
6378
a9083016 6379 } else {
cfb0919c 6380 ql_log(ql_log_warn, vha, 0x8016,
7c3df132 6381 "qla82xx_restart_isp **** FAILED ****.\n");
a9083016
GM		 6382 }
6383
6384 return status;
6385}
6386
3a03eb79 6387void
ae97c91e 6388qla81xx_update_fw_options(scsi_qla_host_t *vha)
3a03eb79 6389{
ae97c91e
AV		 6390 struct qla_hw_data *ha = vha->hw;
6391
6392 if (!ql2xetsenable)
6393 return;
6394
6395 /* Enable ETS Burst. */
6396 memset(ha->fw_options, 0, sizeof(ha->fw_options));
6397 ha->fw_options[2] |= BIT_9;
6398 qla2x00_set_fw_options(vha, ha->fw_options);
3a03eb79 6399}
09ff701a
SR		 6400
6401/*
6402 * qla24xx_get_fcp_prio
6403 * Gets the fcp cmd priority value for the logged in port.
6404 * Looks for a match of the port descriptors within
6405 * each of the fcp prio config entries. If a match is found,
6406 * the tag (priority) value is returned.
6407 *
6408 * Input:
21090cbe 6409 * vha = scsi host structure pointer.
09ff701a
SR		 6410 * fcport = port structure pointer.
6411 *
6412 * Return:
6c452a45 6413 * non-zero (if found)
f28a0a96 6414 * -1 (if not found)
09ff701a
SR		 6415 *
6416 * Context:
6417 * Kernel context
6418 */
f28a0a96 6419static int
09ff701a
SR		 6420qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
6421{
6422 int i, entries;
6423 uint8_t pid_match, wwn_match;
f28a0a96 6424 int priority;
09ff701a
SR		 6425 uint32_t pid1, pid2;
6426 uint64_t wwn1, wwn2;
6427 struct qla_fcp_prio_entry *pri_entry;
6428 struct qla_hw_data *ha = vha->hw;
6429
6430 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
f28a0a96 6431 return -1;
09ff701a 6432
f28a0a96 6433 priority = -1;
09ff701a
SR		 6434 entries = ha->fcp_prio_cfg->num_entries;
6435 pri_entry = &ha->fcp_prio_cfg->entry[0];
6436
6437 for (i = 0; i < entries; i++) {
6438 pid_match = wwn_match = 0;
6439
6440 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
6441 pri_entry++;
6442 continue;
6443 }
6444
6445 /* check source pid for a match */
6446 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
6447 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
6448 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
6449 if (pid1 == INVALID_PORT_ID)
6450 pid_match++;
6451 else if (pid1 == pid2)
6452 pid_match++;
6453 }
6454
6455 /* check destination pid for a match */
6456 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
6457 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
6458 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
6459 if (pid1 == INVALID_PORT_ID)
6460 pid_match++;
6461 else if (pid1 == pid2)
6462 pid_match++;
6463 }
6464
6465 /* check source WWN for a match */
6466 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
6467 wwn1 = wwn_to_u64(vha->port_name);
6468 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
6469 if (wwn2 == (uint64_t)-1)
6470 wwn_match++;
6471 else if (wwn1 == wwn2)
6472 wwn_match++;
6473 }
6474
6475 /* check destination WWN for a match */
6476 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
6477 wwn1 = wwn_to_u64(fcport->port_name);
6478 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
6479 if (wwn2 == (uint64_t)-1)
6480 wwn_match++;
6481 else if (wwn1 == wwn2)
6482 wwn_match++;
6483 }
6484
6485 if (pid_match == 2 || wwn_match == 2) {
6486 /* Found a matching entry */
6487 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
6488 priority = pri_entry->tag;
6489 break;
6490 }
6491
6492 pri_entry++;
6493 }
6494
6495 return priority;
6496}
6497
6498/*
6499 * qla24xx_update_fcport_fcp_prio
6500 * Activates fcp priority for the logged in fc port
6501 *
6502 * Input:
21090cbe 6503 * vha = scsi host structure pointer.
09ff701a
SR		 6504 * fcp = port structure pointer.
6505 *
6506 * Return:
6507 * QLA_SUCCESS or QLA_FUNCTION_FAILED
6508 *
6509 * Context:
6510 * Kernel context.
6511 */
6512int
21090cbe 6513qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
09ff701a
SR		 6514{
6515 int ret;
f28a0a96 6516 int priority;
09ff701a
SR		 6517 uint16_t mb[5];
6518
21090cbe
MI		 6519 if (fcport->port_type != FCT_TARGET ||
6520 fcport->loop_id == FC_NO_LOOP_ID)
09ff701a
SR		 6521 return QLA_FUNCTION_FAILED;
6522
21090cbe 6523 priority = qla24xx_get_fcp_prio(vha, fcport);
f28a0a96
AV		 6524 if (priority < 0)
6525 return QLA_FUNCTION_FAILED;
6526
7ec0effd 6527 if (IS_P3P_TYPE(vha->hw)) {
a00f6296
SK		 6528 fcport->fcp_prio = priority & 0xf;
6529 return QLA_SUCCESS;
6530 }
6531
21090cbe 6532 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
cfb0919c
CD		 6533 if (ret == QLA_SUCCESS) {
6534 if (fcport->fcp_prio != priority)
6535 ql_dbg(ql_dbg_user, vha, 0x709e,
6536 "Updated FCP_CMND priority - value=%d loop_id=%d "
6537 "port_id=%02x%02x%02x.\n", priority,
6538 fcport->loop_id, fcport->d_id.b.domain,
6539 fcport->d_id.b.area, fcport->d_id.b.al_pa);
a00f6296 6540 fcport->fcp_prio = priority & 0xf;
cfb0919c 6541 } else
7c3df132 6542 ql_dbg(ql_dbg_user, vha, 0x704f,
cfb0919c
CD		 6543 "Unable to update FCP_CMND priority - ret=0x%x for "
6544 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
6545 fcport->d_id.b.domain, fcport->d_id.b.area,
6546 fcport->d_id.b.al_pa);
09ff701a
SR		 6547 return ret;
6548}
6549
6550/*
6551 * qla24xx_update_all_fcp_prio
6552 * Activates fcp priority for all the logged in ports
6553 *
6554 * Input:
6555 * ha = adapter block pointer.
6556 *
6557 * Return:
6558 * QLA_SUCCESS or QLA_FUNCTION_FAILED
6559 *
6560 * Context:
6561 * Kernel context.
6562 */
6563int
6564qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
6565{
6566 int ret;
6567 fc_port_t *fcport;
6568
6569 ret = QLA_FUNCTION_FAILED;
6570 /* We need to set priority for all logged in ports */
6571 list_for_each_entry(fcport, &vha->vp_fcports, list)
6572 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
6573
6574 return ret;
6575}
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