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Commit | Line | Data |
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1da177e4 | 1 | /* |
fa90c54f | 2 | * QLogic Fibre Channel HBA Driver |
01e58d8e | 3 | * Copyright (c) 2003-2008 QLogic Corporation |
1da177e4 | 4 | * |
fa90c54f | 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
1da177e4 LT |
6 | */ |
7 | #include "qla_def.h" | |
73208dfd | 8 | #include "qla_gbl.h" |
1da177e4 LT |
9 | |
10 | #include <linux/delay.h> | |
0107109e | 11 | #include <linux/vmalloc.h> |
1da177e4 LT |
12 | |
13 | #include "qla_devtbl.h" | |
14 | ||
4e08df3f DM |
15 | #ifdef CONFIG_SPARC |
16 | #include <asm/prom.h> | |
4e08df3f DM |
17 | #endif |
18 | ||
1da177e4 LT |
19 | /* |
20 | * QLogic ISP2x00 Hardware Support Function Prototypes. | |
21 | */ | |
1da177e4 | 22 | static int qla2x00_isp_firmware(scsi_qla_host_t *); |
1da177e4 | 23 | static int qla2x00_setup_chip(scsi_qla_host_t *); |
1da177e4 LT |
24 | static int qla2x00_init_rings(scsi_qla_host_t *); |
25 | static int qla2x00_fw_ready(scsi_qla_host_t *); | |
26 | static int qla2x00_configure_hba(scsi_qla_host_t *); | |
1da177e4 LT |
27 | static int qla2x00_configure_loop(scsi_qla_host_t *); |
28 | static int qla2x00_configure_local_loop(scsi_qla_host_t *); | |
1da177e4 LT |
29 | static int qla2x00_configure_fabric(scsi_qla_host_t *); |
30 | static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *); | |
31 | static int qla2x00_device_resync(scsi_qla_host_t *); | |
32 | static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *, | |
33 | uint16_t *); | |
1da177e4 LT |
34 | |
35 | static int qla2x00_restart_isp(scsi_qla_host_t *); | |
1da177e4 | 36 | |
e315cd28 | 37 | static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *); |
413975a0 | 38 | |
4d4df193 HK |
39 | static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); |
40 | static int qla84xx_init_chip(scsi_qla_host_t *); | |
73208dfd | 41 | static int qla25xx_init_queues(struct qla_hw_data *); |
4d4df193 | 42 | |
ac280b67 AV |
43 | /* SRB Extensions ---------------------------------------------------------- */ |
44 | ||
45 | static void | |
46 | qla2x00_ctx_sp_timeout(unsigned long __data) | |
47 | { | |
48 | srb_t *sp = (srb_t *)__data; | |
49 | struct srb_ctx *ctx; | |
50 | fc_port_t *fcport = sp->fcport; | |
51 | struct qla_hw_data *ha = fcport->vha->hw; | |
52 | struct req_que *req; | |
53 | unsigned long flags; | |
54 | ||
55 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
56 | req = ha->req_q_map[0]; | |
57 | req->outstanding_cmds[sp->handle] = NULL; | |
58 | ctx = sp->ctx; | |
59 | ctx->timeout(sp); | |
60 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
61 | ||
62 | ctx->free(sp); | |
63 | } | |
64 | ||
9a069e19 | 65 | void |
ac280b67 AV |
66 | qla2x00_ctx_sp_free(srb_t *sp) |
67 | { | |
68 | struct srb_ctx *ctx = sp->ctx; | |
69 | ||
70 | kfree(ctx); | |
71 | mempool_free(sp, sp->fcport->vha->hw->srb_mempool); | |
72 | } | |
73 | ||
74 | inline srb_t * | |
75 | qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size, | |
76 | unsigned long tmo) | |
77 | { | |
78 | srb_t *sp; | |
79 | struct qla_hw_data *ha = vha->hw; | |
80 | struct srb_ctx *ctx; | |
81 | ||
82 | sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL); | |
83 | if (!sp) | |
84 | goto done; | |
85 | ctx = kzalloc(size, GFP_KERNEL); | |
86 | if (!ctx) { | |
87 | mempool_free(sp, ha->srb_mempool); | |
88 | goto done; | |
89 | } | |
90 | ||
91 | memset(sp, 0, sizeof(*sp)); | |
92 | sp->fcport = fcport; | |
93 | sp->ctx = ctx; | |
94 | ctx->free = qla2x00_ctx_sp_free; | |
95 | ||
96 | init_timer(&ctx->timer); | |
97 | if (!tmo) | |
98 | goto done; | |
99 | ctx->timer.expires = jiffies + tmo * HZ; | |
100 | ctx->timer.data = (unsigned long)sp; | |
101 | ctx->timer.function = qla2x00_ctx_sp_timeout; | |
102 | add_timer(&ctx->timer); | |
103 | done: | |
104 | return sp; | |
105 | } | |
106 | ||
107 | /* Asynchronous Login/Logout Routines -------------------------------------- */ | |
108 | ||
109 | #define ELS_TMO_2_RATOV(ha) ((ha)->r_a_tov / 10 * 2) | |
110 | ||
111 | static void | |
112 | qla2x00_async_logio_timeout(srb_t *sp) | |
113 | { | |
114 | fc_port_t *fcport = sp->fcport; | |
115 | struct srb_logio *lio = sp->ctx; | |
116 | ||
117 | DEBUG2(printk(KERN_WARNING | |
118 | "scsi(%ld:%x): Async-%s timeout.\n", | |
119 | fcport->vha->host_no, sp->handle, | |
120 | lio->ctx.type == SRB_LOGIN_CMD ? "login": "logout")); | |
121 | ||
122 | if (lio->ctx.type == SRB_LOGIN_CMD) | |
123 | qla2x00_post_async_logout_work(fcport->vha, fcport, NULL); | |
124 | } | |
125 | ||
126 | int | |
127 | qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, | |
128 | uint16_t *data) | |
129 | { | |
130 | struct qla_hw_data *ha = vha->hw; | |
131 | srb_t *sp; | |
132 | struct srb_logio *lio; | |
133 | int rval; | |
134 | ||
135 | rval = QLA_FUNCTION_FAILED; | |
136 | sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_logio), | |
137 | ELS_TMO_2_RATOV(ha) + 2); | |
138 | if (!sp) | |
139 | goto done; | |
140 | ||
141 | lio = sp->ctx; | |
142 | lio->ctx.type = SRB_LOGIN_CMD; | |
143 | lio->ctx.timeout = qla2x00_async_logio_timeout; | |
144 | lio->flags |= SRB_LOGIN_COND_PLOGI; | |
145 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) | |
146 | lio->flags |= SRB_LOGIN_RETRIED; | |
147 | rval = qla2x00_start_sp(sp); | |
148 | if (rval != QLA_SUCCESS) | |
149 | goto done_free_sp; | |
150 | ||
151 | DEBUG2(printk(KERN_DEBUG | |
152 | "scsi(%ld:%x): Async-login - loop-id=%x portid=%02x%02x%02x " | |
153 | "retries=%d.\n", fcport->vha->host_no, sp->handle, fcport->loop_id, | |
154 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
155 | fcport->login_retry)); | |
156 | return rval; | |
157 | ||
158 | done_free_sp: | |
159 | del_timer_sync(&lio->ctx.timer); | |
160 | lio->ctx.free(sp); | |
161 | done: | |
162 | return rval; | |
163 | } | |
164 | ||
165 | int | |
166 | qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) | |
167 | { | |
168 | struct qla_hw_data *ha = vha->hw; | |
169 | srb_t *sp; | |
170 | struct srb_logio *lio; | |
171 | int rval; | |
172 | ||
173 | rval = QLA_FUNCTION_FAILED; | |
174 | sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_logio), | |
175 | ELS_TMO_2_RATOV(ha) + 2); | |
176 | if (!sp) | |
177 | goto done; | |
178 | ||
179 | lio = sp->ctx; | |
180 | lio->ctx.type = SRB_LOGOUT_CMD; | |
181 | lio->ctx.timeout = qla2x00_async_logio_timeout; | |
182 | rval = qla2x00_start_sp(sp); | |
183 | if (rval != QLA_SUCCESS) | |
184 | goto done_free_sp; | |
185 | ||
186 | DEBUG2(printk(KERN_DEBUG | |
187 | "scsi(%ld:%x): Async-logout - loop-id=%x portid=%02x%02x%02x.\n", | |
188 | fcport->vha->host_no, sp->handle, fcport->loop_id, | |
189 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa)); | |
190 | return rval; | |
191 | ||
192 | done_free_sp: | |
193 | del_timer_sync(&lio->ctx.timer); | |
194 | lio->ctx.free(sp); | |
195 | done: | |
196 | return rval; | |
197 | } | |
198 | ||
199 | int | |
200 | qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport, | |
201 | uint16_t *data) | |
202 | { | |
203 | int rval; | |
204 | uint8_t opts = 0; | |
205 | ||
206 | switch (data[0]) { | |
207 | case MBS_COMMAND_COMPLETE: | |
f08b7251 | 208 | if (fcport->flags & FCF_FCP2_DEVICE) |
ac280b67 AV |
209 | opts |= BIT_1; |
210 | rval = qla2x00_get_port_database(vha, fcport, opts); | |
211 | if (rval != QLA_SUCCESS) | |
212 | qla2x00_mark_device_lost(vha, fcport, 1, 0); | |
213 | else | |
214 | qla2x00_update_fcport(vha, fcport); | |
215 | break; | |
216 | case MBS_COMMAND_ERROR: | |
217 | if (data[1] & QLA_LOGIO_LOGIN_RETRIED) | |
218 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | |
219 | else | |
220 | qla2x00_mark_device_lost(vha, fcport, 1, 0); | |
221 | break; | |
222 | case MBS_PORT_ID_USED: | |
223 | fcport->loop_id = data[1]; | |
224 | qla2x00_post_async_login_work(vha, fcport, NULL); | |
225 | break; | |
226 | case MBS_LOOP_ID_USED: | |
227 | fcport->loop_id++; | |
228 | rval = qla2x00_find_new_loop_id(vha, fcport); | |
229 | if (rval != QLA_SUCCESS) { | |
230 | qla2x00_mark_device_lost(vha, fcport, 1, 0); | |
231 | break; | |
232 | } | |
233 | qla2x00_post_async_login_work(vha, fcport, NULL); | |
234 | break; | |
235 | } | |
236 | return QLA_SUCCESS; | |
237 | } | |
238 | ||
239 | int | |
240 | qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, | |
241 | uint16_t *data) | |
242 | { | |
243 | qla2x00_mark_device_lost(vha, fcport, 1, 0); | |
244 | return QLA_SUCCESS; | |
245 | } | |
246 | ||
1da177e4 LT |
247 | /****************************************************************************/ |
248 | /* QLogic ISP2x00 Hardware Support Functions. */ | |
249 | /****************************************************************************/ | |
250 | ||
251 | /* | |
252 | * qla2x00_initialize_adapter | |
253 | * Initialize board. | |
254 | * | |
255 | * Input: | |
256 | * ha = adapter block pointer. | |
257 | * | |
258 | * Returns: | |
259 | * 0 = success | |
260 | */ | |
261 | int | |
e315cd28 | 262 | qla2x00_initialize_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
263 | { |
264 | int rval; | |
e315cd28 | 265 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 266 | struct req_que *req = ha->req_q_map[0]; |
2533cf67 | 267 | |
1da177e4 | 268 | /* Clear adapter flags. */ |
e315cd28 | 269 | vha->flags.online = 0; |
2533cf67 | 270 | ha->flags.chip_reset_done = 0; |
e315cd28 | 271 | vha->flags.reset_active = 0; |
85880801 AV |
272 | ha->flags.pci_channel_io_perm_failure = 0; |
273 | ha->flags.eeh_busy = 0; | |
e315cd28 AC |
274 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); |
275 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
276 | vha->device_flags = DFLG_NO_CABLE; | |
277 | vha->dpc_flags = 0; | |
278 | vha->flags.management_server_logged_in = 0; | |
279 | vha->marker_needed = 0; | |
1da177e4 LT |
280 | ha->isp_abort_cnt = 0; |
281 | ha->beacon_blink_led = 0; | |
282 | ||
73208dfd AC |
283 | set_bit(0, ha->req_qid_map); |
284 | set_bit(0, ha->rsp_qid_map); | |
285 | ||
0107109e | 286 | qla_printk(KERN_INFO, ha, "Configuring PCI space...\n"); |
e315cd28 | 287 | rval = ha->isp_ops->pci_config(vha); |
1da177e4 | 288 | if (rval) { |
7c98a046 | 289 | DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n", |
e315cd28 | 290 | vha->host_no)); |
1da177e4 LT |
291 | return (rval); |
292 | } | |
293 | ||
e315cd28 | 294 | ha->isp_ops->reset_chip(vha); |
1da177e4 | 295 | |
e315cd28 | 296 | rval = qla2xxx_get_flash_info(vha); |
c00d8994 AV |
297 | if (rval) { |
298 | DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n", | |
e315cd28 | 299 | vha->host_no)); |
c00d8994 AV |
300 | return (rval); |
301 | } | |
302 | ||
73208dfd | 303 | ha->isp_ops->get_flash_version(vha, req->ring); |
30c47662 | 304 | |
1da177e4 | 305 | qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n"); |
0107109e | 306 | |
e315cd28 | 307 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 308 | |
d4c760c2 AV |
309 | if (ha->flags.disable_serdes) { |
310 | /* Mask HBA via NVRAM settings? */ | |
311 | qla_printk(KERN_INFO, ha, "Masking HBA WWPN " | |
312 | "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n", | |
e315cd28 AC |
313 | vha->port_name[0], vha->port_name[1], |
314 | vha->port_name[2], vha->port_name[3], | |
315 | vha->port_name[4], vha->port_name[5], | |
316 | vha->port_name[6], vha->port_name[7]); | |
d4c760c2 AV |
317 | return QLA_FUNCTION_FAILED; |
318 | } | |
319 | ||
1da177e4 LT |
320 | qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n"); |
321 | ||
e315cd28 AC |
322 | if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { |
323 | rval = ha->isp_ops->chip_diag(vha); | |
d19044c3 AV |
324 | if (rval) |
325 | return (rval); | |
e315cd28 | 326 | rval = qla2x00_setup_chip(vha); |
d19044c3 AV |
327 | if (rval) |
328 | return (rval); | |
1da177e4 | 329 | } |
4d4df193 | 330 | if (IS_QLA84XX(ha)) { |
e315cd28 | 331 | ha->cs84xx = qla84xx_get_chip(vha); |
4d4df193 HK |
332 | if (!ha->cs84xx) { |
333 | qla_printk(KERN_ERR, ha, | |
334 | "Unable to configure ISP84XX.\n"); | |
335 | return QLA_FUNCTION_FAILED; | |
336 | } | |
337 | } | |
e315cd28 | 338 | rval = qla2x00_init_rings(vha); |
2533cf67 | 339 | ha->flags.chip_reset_done = 1; |
1da177e4 | 340 | |
9a069e19 GM |
341 | if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { |
342 | /* Issue verify 84xx FW IOCB to complete 84xx initialization */ | |
343 | rval = qla84xx_init_chip(vha); | |
344 | if (rval != QLA_SUCCESS) { | |
345 | qla_printk(KERN_ERR, ha, | |
346 | "Unable to initialize ISP84XX.\n"); | |
347 | qla84xx_put_chip(vha); | |
348 | } | |
349 | } | |
350 | ||
1da177e4 LT |
351 | return (rval); |
352 | } | |
353 | ||
354 | /** | |
abbd8870 | 355 | * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. |
1da177e4 LT |
356 | * @ha: HA context |
357 | * | |
358 | * Returns 0 on success. | |
359 | */ | |
abbd8870 | 360 | int |
e315cd28 | 361 | qla2100_pci_config(scsi_qla_host_t *vha) |
1da177e4 | 362 | { |
a157b101 | 363 | uint16_t w; |
abbd8870 | 364 | unsigned long flags; |
e315cd28 | 365 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 366 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 367 | |
1da177e4 | 368 | pci_set_master(ha->pdev); |
af6177d8 | 369 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 370 | |
1da177e4 | 371 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 372 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
abbd8870 AV |
373 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
374 | ||
737faece | 375 | pci_disable_rom(ha->pdev); |
1da177e4 LT |
376 | |
377 | /* Get PCI bus information. */ | |
378 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 379 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
1da177e4 LT |
380 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
381 | ||
abbd8870 AV |
382 | return QLA_SUCCESS; |
383 | } | |
1da177e4 | 384 | |
abbd8870 AV |
385 | /** |
386 | * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. | |
387 | * @ha: HA context | |
388 | * | |
389 | * Returns 0 on success. | |
390 | */ | |
391 | int | |
e315cd28 | 392 | qla2300_pci_config(scsi_qla_host_t *vha) |
abbd8870 | 393 | { |
a157b101 | 394 | uint16_t w; |
abbd8870 AV |
395 | unsigned long flags = 0; |
396 | uint32_t cnt; | |
e315cd28 | 397 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 398 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 399 | |
abbd8870 | 400 | pci_set_master(ha->pdev); |
af6177d8 | 401 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 402 | |
abbd8870 | 403 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 404 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
1da177e4 | 405 | |
abbd8870 AV |
406 | if (IS_QLA2322(ha) || IS_QLA6322(ha)) |
407 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
a157b101 | 408 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
1da177e4 | 409 | |
abbd8870 AV |
410 | /* |
411 | * If this is a 2300 card and not 2312, reset the | |
412 | * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, | |
413 | * the 2310 also reports itself as a 2300 so we need to get the | |
414 | * fb revision level -- a 6 indicates it really is a 2300 and | |
415 | * not a 2310. | |
416 | */ | |
417 | if (IS_QLA2300(ha)) { | |
418 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1da177e4 | 419 | |
abbd8870 | 420 | /* Pause RISC. */ |
3d71644c | 421 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); |
abbd8870 | 422 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 423 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) |
abbd8870 | 424 | break; |
1da177e4 | 425 | |
abbd8870 AV |
426 | udelay(10); |
427 | } | |
1da177e4 | 428 | |
abbd8870 | 429 | /* Select FPM registers. */ |
3d71644c AV |
430 | WRT_REG_WORD(®->ctrl_status, 0x20); |
431 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
432 | |
433 | /* Get the fb rev level */ | |
3d71644c | 434 | ha->fb_rev = RD_FB_CMD_REG(ha, reg); |
abbd8870 AV |
435 | |
436 | if (ha->fb_rev == FPM_2300) | |
a157b101 | 437 | pci_clear_mwi(ha->pdev); |
abbd8870 AV |
438 | |
439 | /* Deselect FPM registers. */ | |
3d71644c AV |
440 | WRT_REG_WORD(®->ctrl_status, 0x0); |
441 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
442 | |
443 | /* Release RISC module. */ | |
3d71644c | 444 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); |
abbd8870 | 445 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 446 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) |
abbd8870 AV |
447 | break; |
448 | ||
449 | udelay(10); | |
1da177e4 | 450 | } |
1da177e4 | 451 | |
abbd8870 AV |
452 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
453 | } | |
1da177e4 | 454 | |
abbd8870 AV |
455 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); |
456 | ||
737faece | 457 | pci_disable_rom(ha->pdev); |
1da177e4 | 458 | |
abbd8870 AV |
459 | /* Get PCI bus information. */ |
460 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 461 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
abbd8870 AV |
462 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
463 | ||
464 | return QLA_SUCCESS; | |
1da177e4 LT |
465 | } |
466 | ||
0107109e AV |
467 | /** |
468 | * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. | |
469 | * @ha: HA context | |
470 | * | |
471 | * Returns 0 on success. | |
472 | */ | |
473 | int | |
e315cd28 | 474 | qla24xx_pci_config(scsi_qla_host_t *vha) |
0107109e | 475 | { |
a157b101 | 476 | uint16_t w; |
0107109e | 477 | unsigned long flags = 0; |
e315cd28 | 478 | struct qla_hw_data *ha = vha->hw; |
0107109e | 479 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
0107109e AV |
480 | |
481 | pci_set_master(ha->pdev); | |
af6177d8 | 482 | pci_try_set_mwi(ha->pdev); |
0107109e AV |
483 | |
484 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
a157b101 | 485 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
0107109e AV |
486 | w &= ~PCI_COMMAND_INTX_DISABLE; |
487 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
488 | ||
489 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); | |
490 | ||
491 | /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ | |
f85ec187 AV |
492 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) |
493 | pcix_set_mmrbc(ha->pdev, 2048); | |
0107109e AV |
494 | |
495 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
f85ec187 AV |
496 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) |
497 | pcie_set_readrq(ha->pdev, 2048); | |
0107109e | 498 | |
737faece | 499 | pci_disable_rom(ha->pdev); |
0107109e | 500 | |
44c10138 | 501 | ha->chip_revision = ha->pdev->revision; |
a8488abe | 502 | |
0107109e AV |
503 | /* Get PCI bus information. */ |
504 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
505 | ha->pci_attr = RD_REG_DWORD(®->ctrl_status); | |
506 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
507 | ||
508 | return QLA_SUCCESS; | |
509 | } | |
510 | ||
c3a2f0df AV |
511 | /** |
512 | * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. | |
513 | * @ha: HA context | |
514 | * | |
515 | * Returns 0 on success. | |
516 | */ | |
517 | int | |
e315cd28 | 518 | qla25xx_pci_config(scsi_qla_host_t *vha) |
c3a2f0df AV |
519 | { |
520 | uint16_t w; | |
e315cd28 | 521 | struct qla_hw_data *ha = vha->hw; |
c3a2f0df AV |
522 | |
523 | pci_set_master(ha->pdev); | |
524 | pci_try_set_mwi(ha->pdev); | |
525 | ||
526 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
527 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); | |
528 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
529 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
530 | ||
531 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
532 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) | |
533 | pcie_set_readrq(ha->pdev, 2048); | |
534 | ||
737faece | 535 | pci_disable_rom(ha->pdev); |
c3a2f0df AV |
536 | |
537 | ha->chip_revision = ha->pdev->revision; | |
538 | ||
539 | return QLA_SUCCESS; | |
540 | } | |
541 | ||
1da177e4 LT |
542 | /** |
543 | * qla2x00_isp_firmware() - Choose firmware image. | |
544 | * @ha: HA context | |
545 | * | |
546 | * Returns 0 on success. | |
547 | */ | |
548 | static int | |
e315cd28 | 549 | qla2x00_isp_firmware(scsi_qla_host_t *vha) |
1da177e4 LT |
550 | { |
551 | int rval; | |
42e421b1 AV |
552 | uint16_t loop_id, topo, sw_cap; |
553 | uint8_t domain, area, al_pa; | |
e315cd28 | 554 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
555 | |
556 | /* Assume loading risc code */ | |
fa2a1ce5 | 557 | rval = QLA_FUNCTION_FAILED; |
1da177e4 LT |
558 | |
559 | if (ha->flags.disable_risc_code_load) { | |
560 | DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n", | |
e315cd28 | 561 | vha->host_no)); |
1da177e4 LT |
562 | qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n"); |
563 | ||
564 | /* Verify checksum of loaded RISC code. */ | |
e315cd28 | 565 | rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); |
42e421b1 AV |
566 | if (rval == QLA_SUCCESS) { |
567 | /* And, verify we are not in ROM code. */ | |
e315cd28 | 568 | rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, |
42e421b1 AV |
569 | &area, &domain, &topo, &sw_cap); |
570 | } | |
1da177e4 LT |
571 | } |
572 | ||
573 | if (rval) { | |
574 | DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n", | |
e315cd28 | 575 | vha->host_no)); |
1da177e4 LT |
576 | } |
577 | ||
578 | return (rval); | |
579 | } | |
580 | ||
581 | /** | |
582 | * qla2x00_reset_chip() - Reset ISP chip. | |
583 | * @ha: HA context | |
584 | * | |
585 | * Returns 0 on success. | |
586 | */ | |
abbd8870 | 587 | void |
e315cd28 | 588 | qla2x00_reset_chip(scsi_qla_host_t *vha) |
1da177e4 LT |
589 | { |
590 | unsigned long flags = 0; | |
e315cd28 | 591 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 592 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 593 | uint32_t cnt; |
1da177e4 LT |
594 | uint16_t cmd; |
595 | ||
85880801 AV |
596 | if (unlikely(pci_channel_offline(ha->pdev))) |
597 | return; | |
598 | ||
fd34f556 | 599 | ha->isp_ops->disable_intrs(ha); |
1da177e4 LT |
600 | |
601 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
602 | ||
603 | /* Turn off master enable */ | |
604 | cmd = 0; | |
605 | pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); | |
606 | cmd &= ~PCI_COMMAND_MASTER; | |
607 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
608 | ||
609 | if (!IS_QLA2100(ha)) { | |
610 | /* Pause RISC. */ | |
611 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); | |
612 | if (IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
613 | for (cnt = 0; cnt < 30000; cnt++) { | |
614 | if ((RD_REG_WORD(®->hccr) & | |
615 | HCCR_RISC_PAUSE) != 0) | |
616 | break; | |
617 | udelay(100); | |
618 | } | |
619 | } else { | |
620 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
621 | udelay(10); | |
622 | } | |
623 | ||
624 | /* Select FPM registers. */ | |
625 | WRT_REG_WORD(®->ctrl_status, 0x20); | |
626 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
627 | ||
628 | /* FPM Soft Reset. */ | |
629 | WRT_REG_WORD(®->fpm_diag_config, 0x100); | |
630 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
631 | ||
632 | /* Toggle Fpm Reset. */ | |
633 | if (!IS_QLA2200(ha)) { | |
634 | WRT_REG_WORD(®->fpm_diag_config, 0x0); | |
635 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
636 | } | |
637 | ||
638 | /* Select frame buffer registers. */ | |
639 | WRT_REG_WORD(®->ctrl_status, 0x10); | |
640 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
641 | ||
642 | /* Reset frame buffer FIFOs. */ | |
643 | if (IS_QLA2200(ha)) { | |
644 | WRT_FB_CMD_REG(ha, reg, 0xa000); | |
645 | RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ | |
646 | } else { | |
647 | WRT_FB_CMD_REG(ha, reg, 0x00fc); | |
648 | ||
649 | /* Read back fb_cmd until zero or 3 seconds max */ | |
650 | for (cnt = 0; cnt < 3000; cnt++) { | |
651 | if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) | |
652 | break; | |
653 | udelay(100); | |
654 | } | |
655 | } | |
656 | ||
657 | /* Select RISC module registers. */ | |
658 | WRT_REG_WORD(®->ctrl_status, 0); | |
659 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
660 | ||
661 | /* Reset RISC processor. */ | |
662 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
663 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
664 | ||
665 | /* Release RISC processor. */ | |
666 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
667 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
668 | } | |
669 | ||
670 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
671 | WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); | |
672 | ||
673 | /* Reset ISP chip. */ | |
674 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
675 | ||
676 | /* Wait for RISC to recover from reset. */ | |
677 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
678 | /* | |
679 | * It is necessary to for a delay here since the card doesn't | |
680 | * respond to PCI reads during a reset. On some architectures | |
681 | * this will result in an MCA. | |
682 | */ | |
683 | udelay(20); | |
684 | for (cnt = 30000; cnt; cnt--) { | |
685 | if ((RD_REG_WORD(®->ctrl_status) & | |
686 | CSR_ISP_SOFT_RESET) == 0) | |
687 | break; | |
688 | udelay(100); | |
689 | } | |
690 | } else | |
691 | udelay(10); | |
692 | ||
693 | /* Reset RISC processor. */ | |
694 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
695 | ||
696 | WRT_REG_WORD(®->semaphore, 0); | |
697 | ||
698 | /* Release RISC processor. */ | |
699 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
700 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
701 | ||
702 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
703 | for (cnt = 0; cnt < 30000; cnt++) { | |
ffb39f03 | 704 | if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) |
1da177e4 | 705 | break; |
1da177e4 LT |
706 | |
707 | udelay(100); | |
708 | } | |
709 | } else | |
710 | udelay(100); | |
711 | ||
712 | /* Turn on master enable */ | |
713 | cmd |= PCI_COMMAND_MASTER; | |
714 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
715 | ||
716 | /* Disable RISC pause on FPM parity error. */ | |
717 | if (!IS_QLA2100(ha)) { | |
718 | WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); | |
719 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
720 | } | |
721 | ||
722 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
723 | } | |
724 | ||
0107109e | 725 | /** |
88c26663 | 726 | * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. |
0107109e AV |
727 | * @ha: HA context |
728 | * | |
729 | * Returns 0 on success. | |
730 | */ | |
88c26663 | 731 | static inline void |
e315cd28 | 732 | qla24xx_reset_risc(scsi_qla_host_t *vha) |
0107109e AV |
733 | { |
734 | unsigned long flags = 0; | |
e315cd28 | 735 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
736 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
737 | uint32_t cnt, d2; | |
335a1cc9 | 738 | uint16_t wd; |
0107109e | 739 | |
0107109e AV |
740 | spin_lock_irqsave(&ha->hardware_lock, flags); |
741 | ||
742 | /* Reset RISC. */ | |
743 | WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
744 | for (cnt = 0; cnt < 30000; cnt++) { | |
745 | if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) | |
746 | break; | |
747 | ||
748 | udelay(10); | |
749 | } | |
750 | ||
751 | WRT_REG_DWORD(®->ctrl_status, | |
752 | CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
335a1cc9 | 753 | pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); |
88c26663 | 754 | |
335a1cc9 | 755 | udelay(100); |
88c26663 | 756 | /* Wait for firmware to complete NVRAM accesses. */ |
88c26663 AV |
757 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); |
758 | for (cnt = 10000 ; cnt && d2; cnt--) { | |
759 | udelay(5); | |
760 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
761 | barrier(); | |
762 | } | |
763 | ||
335a1cc9 | 764 | /* Wait for soft-reset to complete. */ |
0107109e AV |
765 | d2 = RD_REG_DWORD(®->ctrl_status); |
766 | for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) { | |
767 | udelay(5); | |
768 | d2 = RD_REG_DWORD(®->ctrl_status); | |
769 | barrier(); | |
770 | } | |
771 | ||
772 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); | |
773 | RD_REG_DWORD(®->hccr); | |
774 | ||
775 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
776 | RD_REG_DWORD(®->hccr); | |
777 | ||
778 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); | |
779 | RD_REG_DWORD(®->hccr); | |
780 | ||
781 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
782 | for (cnt = 6000000 ; cnt && d2; cnt--) { | |
783 | udelay(5); | |
784 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
785 | barrier(); | |
786 | } | |
787 | ||
788 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
124f85e6 AV |
789 | |
790 | if (IS_NOPOLLING_TYPE(ha)) | |
791 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
792 | } |
793 | ||
88c26663 AV |
794 | /** |
795 | * qla24xx_reset_chip() - Reset ISP24xx chip. | |
796 | * @ha: HA context | |
797 | * | |
798 | * Returns 0 on success. | |
799 | */ | |
800 | void | |
e315cd28 | 801 | qla24xx_reset_chip(scsi_qla_host_t *vha) |
88c26663 | 802 | { |
e315cd28 | 803 | struct qla_hw_data *ha = vha->hw; |
85880801 AV |
804 | |
805 | if (pci_channel_offline(ha->pdev) && | |
806 | ha->flags.pci_channel_io_perm_failure) { | |
807 | return; | |
808 | } | |
809 | ||
fd34f556 | 810 | ha->isp_ops->disable_intrs(ha); |
88c26663 AV |
811 | |
812 | /* Perform RISC reset. */ | |
e315cd28 | 813 | qla24xx_reset_risc(vha); |
88c26663 AV |
814 | } |
815 | ||
1da177e4 LT |
816 | /** |
817 | * qla2x00_chip_diag() - Test chip for proper operation. | |
818 | * @ha: HA context | |
819 | * | |
820 | * Returns 0 on success. | |
821 | */ | |
abbd8870 | 822 | int |
e315cd28 | 823 | qla2x00_chip_diag(scsi_qla_host_t *vha) |
1da177e4 LT |
824 | { |
825 | int rval; | |
e315cd28 | 826 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 827 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 LT |
828 | unsigned long flags = 0; |
829 | uint16_t data; | |
830 | uint32_t cnt; | |
831 | uint16_t mb[5]; | |
73208dfd | 832 | struct req_que *req = ha->req_q_map[0]; |
1da177e4 LT |
833 | |
834 | /* Assume a failed state */ | |
835 | rval = QLA_FUNCTION_FAILED; | |
836 | ||
837 | DEBUG3(printk("scsi(%ld): Testing device at %lx.\n", | |
e315cd28 | 838 | vha->host_no, (u_long)®->flash_address)); |
1da177e4 LT |
839 | |
840 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
841 | ||
842 | /* Reset ISP chip. */ | |
843 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
844 | ||
845 | /* | |
846 | * We need to have a delay here since the card will not respond while | |
847 | * in reset causing an MCA on some architectures. | |
848 | */ | |
849 | udelay(20); | |
850 | data = qla2x00_debounce_register(®->ctrl_status); | |
851 | for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { | |
852 | udelay(5); | |
853 | data = RD_REG_WORD(®->ctrl_status); | |
854 | barrier(); | |
855 | } | |
856 | ||
857 | if (!cnt) | |
858 | goto chip_diag_failed; | |
859 | ||
860 | DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n", | |
7640335e | 861 | vha->host_no)); |
1da177e4 LT |
862 | |
863 | /* Reset RISC processor. */ | |
864 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
865 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
866 | ||
867 | /* Workaround for QLA2312 PCI parity error */ | |
868 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
869 | data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); | |
870 | for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { | |
871 | udelay(5); | |
872 | data = RD_MAILBOX_REG(ha, reg, 0); | |
fa2a1ce5 | 873 | barrier(); |
1da177e4 LT |
874 | } |
875 | } else | |
876 | udelay(10); | |
877 | ||
878 | if (!cnt) | |
879 | goto chip_diag_failed; | |
880 | ||
881 | /* Check product ID of chip */ | |
7640335e | 882 | DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no)); |
1da177e4 LT |
883 | |
884 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
885 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
886 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
887 | mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); | |
888 | if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || | |
889 | mb[3] != PROD_ID_3) { | |
890 | qla_printk(KERN_WARNING, ha, | |
891 | "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]); | |
892 | ||
893 | goto chip_diag_failed; | |
894 | } | |
895 | ha->product_id[0] = mb[1]; | |
896 | ha->product_id[1] = mb[2]; | |
897 | ha->product_id[2] = mb[3]; | |
898 | ha->product_id[3] = mb[4]; | |
899 | ||
900 | /* Adjust fw RISC transfer size */ | |
73208dfd | 901 | if (req->length > 1024) |
1da177e4 LT |
902 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; |
903 | else | |
904 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * | |
73208dfd | 905 | req->length; |
1da177e4 LT |
906 | |
907 | if (IS_QLA2200(ha) && | |
908 | RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { | |
909 | /* Limit firmware transfer size with a 2200A */ | |
910 | DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n", | |
e315cd28 | 911 | vha->host_no)); |
1da177e4 | 912 | |
ea5b6382 | 913 | ha->device_type |= DT_ISP2200A; |
1da177e4 LT |
914 | ha->fw_transfer_size = 128; |
915 | } | |
916 | ||
917 | /* Wrap Incoming Mailboxes Test. */ | |
918 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
919 | ||
e315cd28 AC |
920 | DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no)); |
921 | rval = qla2x00_mbx_reg_test(vha); | |
1da177e4 LT |
922 | if (rval) { |
923 | DEBUG(printk("scsi(%ld): Failed mailbox send register test\n", | |
e315cd28 | 924 | vha->host_no)); |
1da177e4 LT |
925 | qla_printk(KERN_WARNING, ha, |
926 | "Failed mailbox send register test\n"); | |
927 | } | |
928 | else { | |
929 | /* Flag a successful rval */ | |
930 | rval = QLA_SUCCESS; | |
931 | } | |
932 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
933 | ||
934 | chip_diag_failed: | |
935 | if (rval) | |
936 | DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED " | |
e315cd28 | 937 | "****\n", vha->host_no)); |
1da177e4 LT |
938 | |
939 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
940 | ||
941 | return (rval); | |
942 | } | |
943 | ||
0107109e AV |
944 | /** |
945 | * qla24xx_chip_diag() - Test ISP24xx for proper operation. | |
946 | * @ha: HA context | |
947 | * | |
948 | * Returns 0 on success. | |
949 | */ | |
950 | int | |
e315cd28 | 951 | qla24xx_chip_diag(scsi_qla_host_t *vha) |
0107109e AV |
952 | { |
953 | int rval; | |
e315cd28 | 954 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 955 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 956 | |
73208dfd | 957 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; |
0107109e | 958 | |
e315cd28 | 959 | rval = qla2x00_mbx_reg_test(vha); |
0107109e AV |
960 | if (rval) { |
961 | DEBUG(printk("scsi(%ld): Failed mailbox send register test\n", | |
e315cd28 | 962 | vha->host_no)); |
0107109e AV |
963 | qla_printk(KERN_WARNING, ha, |
964 | "Failed mailbox send register test\n"); | |
965 | } else { | |
966 | /* Flag a successful rval */ | |
967 | rval = QLA_SUCCESS; | |
968 | } | |
969 | ||
970 | return rval; | |
971 | } | |
972 | ||
a7a167bf | 973 | void |
e315cd28 | 974 | qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) |
0107109e | 975 | { |
a7a167bf AV |
976 | int rval; |
977 | uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, | |
73208dfd | 978 | eft_size, fce_size, mq_size; |
df613b96 AV |
979 | dma_addr_t tc_dma; |
980 | void *tc; | |
e315cd28 | 981 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
982 | struct req_que *req = ha->req_q_map[0]; |
983 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
a7a167bf AV |
984 | |
985 | if (ha->fw_dump) { | |
986 | qla_printk(KERN_WARNING, ha, | |
987 | "Firmware dump previously allocated.\n"); | |
988 | return; | |
989 | } | |
d4e3e04d | 990 | |
0107109e | 991 | ha->fw_dumped = 0; |
73208dfd | 992 | fixed_size = mem_size = eft_size = fce_size = mq_size = 0; |
d4e3e04d | 993 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { |
a7a167bf | 994 | fixed_size = sizeof(struct qla2100_fw_dump); |
d4e3e04d | 995 | } else if (IS_QLA23XX(ha)) { |
a7a167bf AV |
996 | fixed_size = offsetof(struct qla2300_fw_dump, data_ram); |
997 | mem_size = (ha->fw_memory_size - 0x11000 + 1) * | |
998 | sizeof(uint16_t); | |
e428924c | 999 | } else if (IS_FWI2_CAPABLE(ha)) { |
3a03eb79 AV |
1000 | if (IS_QLA81XX(ha)) |
1001 | fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); | |
1002 | else if (IS_QLA25XX(ha)) | |
1003 | fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); | |
1004 | else | |
1005 | fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); | |
a7a167bf AV |
1006 | mem_size = (ha->fw_memory_size - 0x100000 + 1) * |
1007 | sizeof(uint32_t); | |
73208dfd AC |
1008 | if (ha->mqenable) |
1009 | mq_size = sizeof(struct qla2xxx_mq_chain); | |
df613b96 | 1010 | /* Allocate memory for Fibre Channel Event Buffer. */ |
3a03eb79 | 1011 | if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)) |
436a7b11 | 1012 | goto try_eft; |
df613b96 AV |
1013 | |
1014 | tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, | |
1015 | GFP_KERNEL); | |
1016 | if (!tc) { | |
1017 | qla_printk(KERN_WARNING, ha, "Unable to allocate " | |
1018 | "(%d KB) for FCE.\n", FCE_SIZE / 1024); | |
17d98630 | 1019 | goto try_eft; |
df613b96 AV |
1020 | } |
1021 | ||
1022 | memset(tc, 0, FCE_SIZE); | |
e315cd28 | 1023 | rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, |
df613b96 AV |
1024 | ha->fce_mb, &ha->fce_bufs); |
1025 | if (rval) { | |
1026 | qla_printk(KERN_WARNING, ha, "Unable to initialize " | |
1027 | "FCE (%d).\n", rval); | |
1028 | dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, | |
1029 | tc_dma); | |
1030 | ha->flags.fce_enabled = 0; | |
17d98630 | 1031 | goto try_eft; |
df613b96 AV |
1032 | } |
1033 | ||
1034 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n", | |
1035 | FCE_SIZE / 1024); | |
1036 | ||
7d9dade3 | 1037 | fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; |
df613b96 AV |
1038 | ha->flags.fce_enabled = 1; |
1039 | ha->fce_dma = tc_dma; | |
1040 | ha->fce = tc; | |
436a7b11 AV |
1041 | try_eft: |
1042 | /* Allocate memory for Extended Trace Buffer. */ | |
1043 | tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, | |
1044 | GFP_KERNEL); | |
1045 | if (!tc) { | |
1046 | qla_printk(KERN_WARNING, ha, "Unable to allocate " | |
1047 | "(%d KB) for EFT.\n", EFT_SIZE / 1024); | |
1048 | goto cont_alloc; | |
1049 | } | |
1050 | ||
1051 | memset(tc, 0, EFT_SIZE); | |
e315cd28 | 1052 | rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); |
436a7b11 AV |
1053 | if (rval) { |
1054 | qla_printk(KERN_WARNING, ha, "Unable to initialize " | |
1055 | "EFT (%d).\n", rval); | |
1056 | dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, | |
1057 | tc_dma); | |
1058 | goto cont_alloc; | |
1059 | } | |
1060 | ||
1061 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n", | |
1062 | EFT_SIZE / 1024); | |
1063 | ||
1064 | eft_size = EFT_SIZE; | |
1065 | ha->eft_dma = tc_dma; | |
1066 | ha->eft = tc; | |
d4e3e04d | 1067 | } |
a7a167bf | 1068 | cont_alloc: |
73208dfd AC |
1069 | req_q_size = req->length * sizeof(request_t); |
1070 | rsp_q_size = rsp->length * sizeof(response_t); | |
a7a167bf AV |
1071 | |
1072 | dump_size = offsetof(struct qla2xxx_fw_dump, isp); | |
2afa19a9 | 1073 | dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; |
bb99de67 AV |
1074 | ha->chain_offset = dump_size; |
1075 | dump_size += mq_size + fce_size; | |
d4e3e04d AV |
1076 | |
1077 | ha->fw_dump = vmalloc(dump_size); | |
a7a167bf | 1078 | if (!ha->fw_dump) { |
0107109e | 1079 | qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for " |
d4e3e04d | 1080 | "firmware dump!!!\n", dump_size / 1024); |
a7a167bf AV |
1081 | |
1082 | if (ha->eft) { | |
1083 | dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft, | |
1084 | ha->eft_dma); | |
1085 | ha->eft = NULL; | |
1086 | ha->eft_dma = 0; | |
1087 | } | |
1088 | return; | |
1089 | } | |
a7a167bf AV |
1090 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n", |
1091 | dump_size / 1024); | |
1092 | ||
1093 | ha->fw_dump_len = dump_size; | |
1094 | ha->fw_dump->signature[0] = 'Q'; | |
1095 | ha->fw_dump->signature[1] = 'L'; | |
1096 | ha->fw_dump->signature[2] = 'G'; | |
1097 | ha->fw_dump->signature[3] = 'C'; | |
1098 | ha->fw_dump->version = __constant_htonl(1); | |
1099 | ||
1100 | ha->fw_dump->fixed_size = htonl(fixed_size); | |
1101 | ha->fw_dump->mem_size = htonl(mem_size); | |
1102 | ha->fw_dump->req_q_size = htonl(req_q_size); | |
1103 | ha->fw_dump->rsp_q_size = htonl(rsp_q_size); | |
1104 | ||
1105 | ha->fw_dump->eft_size = htonl(eft_size); | |
1106 | ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); | |
1107 | ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); | |
1108 | ||
1109 | ha->fw_dump->header_size = | |
1110 | htonl(offsetof(struct qla2xxx_fw_dump, isp)); | |
0107109e AV |
1111 | } |
1112 | ||
18e7555a AV |
1113 | static int |
1114 | qla81xx_mpi_sync(scsi_qla_host_t *vha) | |
1115 | { | |
1116 | #define MPS_MASK 0xe0 | |
1117 | int rval; | |
1118 | uint16_t dc; | |
1119 | uint32_t dw; | |
1120 | struct qla_hw_data *ha = vha->hw; | |
1121 | ||
1122 | if (!IS_QLA81XX(vha->hw)) | |
1123 | return QLA_SUCCESS; | |
1124 | ||
1125 | rval = qla2x00_write_ram_word(vha, 0x7c00, 1); | |
1126 | if (rval != QLA_SUCCESS) { | |
1127 | DEBUG2(qla_printk(KERN_WARNING, ha, | |
1128 | "Sync-MPI: Unable to acquire semaphore.\n")); | |
1129 | goto done; | |
1130 | } | |
1131 | ||
1132 | pci_read_config_word(vha->hw->pdev, 0x54, &dc); | |
1133 | rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); | |
1134 | if (rval != QLA_SUCCESS) { | |
1135 | DEBUG2(qla_printk(KERN_WARNING, ha, | |
1136 | "Sync-MPI: Unable to read sync.\n")); | |
1137 | goto done_release; | |
1138 | } | |
1139 | ||
1140 | dc &= MPS_MASK; | |
1141 | if (dc == (dw & MPS_MASK)) | |
1142 | goto done_release; | |
1143 | ||
1144 | dw &= ~MPS_MASK; | |
1145 | dw |= dc; | |
1146 | rval = qla2x00_write_ram_word(vha, 0x7a15, dw); | |
1147 | if (rval != QLA_SUCCESS) { | |
1148 | DEBUG2(qla_printk(KERN_WARNING, ha, | |
1149 | "Sync-MPI: Unable to gain sync.\n")); | |
1150 | } | |
1151 | ||
1152 | done_release: | |
1153 | rval = qla2x00_write_ram_word(vha, 0x7c00, 0); | |
1154 | if (rval != QLA_SUCCESS) { | |
1155 | DEBUG2(qla_printk(KERN_WARNING, ha, | |
1156 | "Sync-MPI: Unable to release semaphore.\n")); | |
1157 | } | |
1158 | ||
1159 | done: | |
1160 | return rval; | |
1161 | } | |
1162 | ||
1da177e4 LT |
1163 | /** |
1164 | * qla2x00_setup_chip() - Load and start RISC firmware. | |
1165 | * @ha: HA context | |
1166 | * | |
1167 | * Returns 0 on success. | |
1168 | */ | |
1169 | static int | |
e315cd28 | 1170 | qla2x00_setup_chip(scsi_qla_host_t *vha) |
1da177e4 | 1171 | { |
0107109e AV |
1172 | int rval; |
1173 | uint32_t srisc_address = 0; | |
e315cd28 | 1174 | struct qla_hw_data *ha = vha->hw; |
3db0652e AV |
1175 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1176 | unsigned long flags; | |
dda772e8 | 1177 | uint16_t fw_major_version; |
3db0652e AV |
1178 | |
1179 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { | |
1180 | /* Disable SRAM, Instruction RAM and GP RAM parity. */ | |
1181 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1182 | WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); | |
1183 | RD_REG_WORD(®->hccr); | |
1184 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1185 | } | |
1da177e4 | 1186 | |
18e7555a AV |
1187 | qla81xx_mpi_sync(vha); |
1188 | ||
1da177e4 | 1189 | /* Load firmware sequences */ |
e315cd28 | 1190 | rval = ha->isp_ops->load_risc(vha, &srisc_address); |
0107109e | 1191 | if (rval == QLA_SUCCESS) { |
1da177e4 | 1192 | DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC " |
e315cd28 | 1193 | "code.\n", vha->host_no)); |
1da177e4 | 1194 | |
e315cd28 | 1195 | rval = qla2x00_verify_checksum(vha, srisc_address); |
1da177e4 LT |
1196 | if (rval == QLA_SUCCESS) { |
1197 | /* Start firmware execution. */ | |
1198 | DEBUG(printk("scsi(%ld): Checksum OK, start " | |
e315cd28 | 1199 | "firmware.\n", vha->host_no)); |
1da177e4 | 1200 | |
e315cd28 | 1201 | rval = qla2x00_execute_fw(vha, srisc_address); |
1da177e4 | 1202 | /* Retrieve firmware information. */ |
dda772e8 AV |
1203 | if (rval == QLA_SUCCESS) { |
1204 | fw_major_version = ha->fw_major_version; | |
ca9e9c3e | 1205 | rval = qla2x00_get_fw_version(vha, |
1da177e4 LT |
1206 | &ha->fw_major_version, |
1207 | &ha->fw_minor_version, | |
1208 | &ha->fw_subminor_version, | |
3a03eb79 | 1209 | &ha->fw_attributes, &ha->fw_memory_size, |
55a96158 AV |
1210 | ha->mpi_version, &ha->mpi_capabilities, |
1211 | ha->phy_version); | |
ca9e9c3e AV |
1212 | if (rval != QLA_SUCCESS) |
1213 | goto failed; | |
2c3dfe3f | 1214 | ha->flags.npiv_supported = 0; |
e315cd28 | 1215 | if (IS_QLA2XXX_MIDTYPE(ha) && |
946fb891 | 1216 | (ha->fw_attributes & BIT_2)) { |
2c3dfe3f | 1217 | ha->flags.npiv_supported = 1; |
4d0ea247 SJ |
1218 | if ((!ha->max_npiv_vports) || |
1219 | ((ha->max_npiv_vports + 1) % | |
eb66dc60 | 1220 | MIN_MULTI_ID_FABRIC)) |
4d0ea247 | 1221 | ha->max_npiv_vports = |
eb66dc60 | 1222 | MIN_MULTI_ID_FABRIC - 1; |
4d0ea247 | 1223 | } |
24a08138 AV |
1224 | qla2x00_get_resource_cnts(vha, NULL, |
1225 | &ha->fw_xcb_count, NULL, NULL, | |
f3a0a77e | 1226 | &ha->max_npiv_vports, NULL); |
d743de66 AV |
1227 | |
1228 | if (!fw_major_version && ql2xallocfwdump) | |
1229 | qla2x00_alloc_fw_dump(vha); | |
1da177e4 LT |
1230 | } |
1231 | } else { | |
1232 | DEBUG2(printk(KERN_INFO | |
1233 | "scsi(%ld): ISP Firmware failed checksum.\n", | |
e315cd28 | 1234 | vha->host_no)); |
1da177e4 LT |
1235 | } |
1236 | } | |
1237 | ||
3db0652e AV |
1238 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { |
1239 | /* Enable proper parity. */ | |
1240 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1241 | if (IS_QLA2300(ha)) | |
1242 | /* SRAM parity */ | |
1243 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); | |
1244 | else | |
1245 | /* SRAM, Instruction RAM and GP RAM parity */ | |
1246 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); | |
1247 | RD_REG_WORD(®->hccr); | |
1248 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1249 | } | |
1250 | ||
1d2874de JC |
1251 | if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { |
1252 | uint32_t size; | |
1253 | ||
1254 | rval = qla81xx_fac_get_sector_size(vha, &size); | |
1255 | if (rval == QLA_SUCCESS) { | |
1256 | ha->flags.fac_supported = 1; | |
1257 | ha->fdt_block_size = size << 2; | |
1258 | } else { | |
1259 | qla_printk(KERN_ERR, ha, | |
1260 | "Unsupported FAC firmware (%d.%02d.%02d).\n", | |
1261 | ha->fw_major_version, ha->fw_minor_version, | |
1262 | ha->fw_subminor_version); | |
1263 | } | |
1264 | } | |
ca9e9c3e | 1265 | failed: |
1da177e4 LT |
1266 | if (rval) { |
1267 | DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n", | |
e315cd28 | 1268 | vha->host_no)); |
1da177e4 LT |
1269 | } |
1270 | ||
1271 | return (rval); | |
1272 | } | |
1273 | ||
1274 | /** | |
1275 | * qla2x00_init_response_q_entries() - Initializes response queue entries. | |
1276 | * @ha: HA context | |
1277 | * | |
1278 | * Beginning of request ring has initialization control block already built | |
1279 | * by nvram config routine. | |
1280 | * | |
1281 | * Returns 0 on success. | |
1282 | */ | |
73208dfd AC |
1283 | void |
1284 | qla2x00_init_response_q_entries(struct rsp_que *rsp) | |
1da177e4 LT |
1285 | { |
1286 | uint16_t cnt; | |
1287 | response_t *pkt; | |
1288 | ||
2afa19a9 AC |
1289 | rsp->ring_ptr = rsp->ring; |
1290 | rsp->ring_index = 0; | |
1291 | rsp->status_srb = NULL; | |
e315cd28 AC |
1292 | pkt = rsp->ring_ptr; |
1293 | for (cnt = 0; cnt < rsp->length; cnt++) { | |
1da177e4 LT |
1294 | pkt->signature = RESPONSE_PROCESSED; |
1295 | pkt++; | |
1296 | } | |
1da177e4 LT |
1297 | } |
1298 | ||
1299 | /** | |
1300 | * qla2x00_update_fw_options() - Read and process firmware options. | |
1301 | * @ha: HA context | |
1302 | * | |
1303 | * Returns 0 on success. | |
1304 | */ | |
abbd8870 | 1305 | void |
e315cd28 | 1306 | qla2x00_update_fw_options(scsi_qla_host_t *vha) |
1da177e4 LT |
1307 | { |
1308 | uint16_t swing, emphasis, tx_sens, rx_sens; | |
e315cd28 | 1309 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1310 | |
1311 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
e315cd28 | 1312 | qla2x00_get_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1313 | |
1314 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) | |
1315 | return; | |
1316 | ||
1317 | /* Serial Link options. */ | |
1318 | DEBUG3(printk("scsi(%ld): Serial link options:\n", | |
e315cd28 | 1319 | vha->host_no)); |
1da177e4 LT |
1320 | DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options, |
1321 | sizeof(ha->fw_seriallink_options))); | |
1322 | ||
1323 | ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; | |
1324 | if (ha->fw_seriallink_options[3] & BIT_2) { | |
1325 | ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; | |
1326 | ||
1327 | /* 1G settings */ | |
1328 | swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); | |
1329 | emphasis = (ha->fw_seriallink_options[2] & | |
1330 | (BIT_4 | BIT_3)) >> 3; | |
1331 | tx_sens = ha->fw_seriallink_options[0] & | |
fa2a1ce5 | 1332 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1333 | rx_sens = (ha->fw_seriallink_options[0] & |
1334 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1335 | ha->fw_options[10] = (emphasis << 14) | (swing << 8); | |
1336 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1337 | if (rx_sens == 0x0) | |
1338 | rx_sens = 0x3; | |
1339 | ha->fw_options[10] |= (tx_sens << 4) | rx_sens; | |
1340 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1341 | ha->fw_options[10] |= BIT_5 | | |
1342 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1343 | (tx_sens & (BIT_1 | BIT_0)); | |
1344 | ||
1345 | /* 2G settings */ | |
1346 | swing = (ha->fw_seriallink_options[2] & | |
1347 | (BIT_7 | BIT_6 | BIT_5)) >> 5; | |
1348 | emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); | |
1349 | tx_sens = ha->fw_seriallink_options[1] & | |
fa2a1ce5 | 1350 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1351 | rx_sens = (ha->fw_seriallink_options[1] & |
1352 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1353 | ha->fw_options[11] = (emphasis << 14) | (swing << 8); | |
1354 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1355 | if (rx_sens == 0x0) | |
1356 | rx_sens = 0x3; | |
1357 | ha->fw_options[11] |= (tx_sens << 4) | rx_sens; | |
1358 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1359 | ha->fw_options[11] |= BIT_5 | | |
1360 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1361 | (tx_sens & (BIT_1 | BIT_0)); | |
1362 | } | |
1363 | ||
1364 | /* FCP2 options. */ | |
1365 | /* Return command IOCBs without waiting for an ABTS to complete. */ | |
1366 | ha->fw_options[3] |= BIT_13; | |
1367 | ||
1368 | /* LED scheme. */ | |
1369 | if (ha->flags.enable_led_scheme) | |
1370 | ha->fw_options[2] |= BIT_12; | |
1371 | ||
48c02fde AV |
1372 | /* Detect ISP6312. */ |
1373 | if (IS_QLA6312(ha)) | |
1374 | ha->fw_options[2] |= BIT_13; | |
1375 | ||
1da177e4 | 1376 | /* Update firmware options. */ |
e315cd28 | 1377 | qla2x00_set_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1378 | } |
1379 | ||
0107109e | 1380 | void |
e315cd28 | 1381 | qla24xx_update_fw_options(scsi_qla_host_t *vha) |
0107109e AV |
1382 | { |
1383 | int rval; | |
e315cd28 | 1384 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
1385 | |
1386 | /* Update Serial Link options. */ | |
f94097ed | 1387 | if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) |
0107109e AV |
1388 | return; |
1389 | ||
e315cd28 | 1390 | rval = qla2x00_set_serdes_params(vha, |
f94097ed AV |
1391 | le16_to_cpu(ha->fw_seriallink_options24[1]), |
1392 | le16_to_cpu(ha->fw_seriallink_options24[2]), | |
1393 | le16_to_cpu(ha->fw_seriallink_options24[3])); | |
0107109e AV |
1394 | if (rval != QLA_SUCCESS) { |
1395 | qla_printk(KERN_WARNING, ha, | |
1396 | "Unable to update Serial Link options (%x).\n", rval); | |
1397 | } | |
1398 | } | |
1399 | ||
abbd8870 | 1400 | void |
e315cd28 | 1401 | qla2x00_config_rings(struct scsi_qla_host *vha) |
abbd8870 | 1402 | { |
e315cd28 | 1403 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 1404 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
73208dfd AC |
1405 | struct req_que *req = ha->req_q_map[0]; |
1406 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
abbd8870 AV |
1407 | |
1408 | /* Setup ring parameters in initialization control block. */ | |
1409 | ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1410 | ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1411 | ha->init_cb->request_q_length = cpu_to_le16(req->length); |
1412 | ha->init_cb->response_q_length = cpu_to_le16(rsp->length); | |
1413 | ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1414 | ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1415 | ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1416 | ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
abbd8870 AV |
1417 | |
1418 | WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); | |
1419 | WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); | |
1420 | WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); | |
1421 | WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); | |
1422 | RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ | |
1423 | } | |
1424 | ||
0107109e | 1425 | void |
e315cd28 | 1426 | qla24xx_config_rings(struct scsi_qla_host *vha) |
0107109e | 1427 | { |
e315cd28 | 1428 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
1429 | device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0); |
1430 | struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; | |
1431 | struct qla_msix_entry *msix; | |
0107109e | 1432 | struct init_cb_24xx *icb; |
73208dfd AC |
1433 | uint16_t rid = 0; |
1434 | struct req_que *req = ha->req_q_map[0]; | |
1435 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
0107109e | 1436 | |
73208dfd | 1437 | /* Setup ring parameters in initialization control block. */ |
0107109e AV |
1438 | icb = (struct init_cb_24xx *)ha->init_cb; |
1439 | icb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1440 | icb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1441 | icb->request_q_length = cpu_to_le16(req->length); |
1442 | icb->response_q_length = cpu_to_le16(rsp->length); | |
1443 | icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1444 | icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1445 | icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1446 | icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
0107109e | 1447 | |
73208dfd AC |
1448 | if (ha->mqenable) { |
1449 | icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS); | |
1450 | icb->rid = __constant_cpu_to_le16(rid); | |
1451 | if (ha->flags.msix_enabled) { | |
1452 | msix = &ha->msix_entries[1]; | |
1453 | DEBUG2_17(printk(KERN_INFO | |
2afa19a9 | 1454 | "Registering vector 0x%x for base que\n", msix->entry)); |
73208dfd AC |
1455 | icb->msix = cpu_to_le16(msix->entry); |
1456 | } | |
1457 | /* Use alternate PCI bus number */ | |
1458 | if (MSB(rid)) | |
1459 | icb->firmware_options_2 |= | |
1460 | __constant_cpu_to_le32(BIT_19); | |
1461 | /* Use alternate PCI devfn */ | |
1462 | if (LSB(rid)) | |
1463 | icb->firmware_options_2 |= | |
1464 | __constant_cpu_to_le32(BIT_18); | |
1465 | ||
3155754a AC |
1466 | /* Use Disable MSIX Handshake mode for capable adapters */ |
1467 | if (IS_MSIX_NACK_CAPABLE(ha)) { | |
1468 | icb->firmware_options_2 &= | |
1469 | __constant_cpu_to_le32(~BIT_22); | |
1470 | ha->flags.disable_msix_handshake = 1; | |
1471 | qla_printk(KERN_INFO, ha, | |
1472 | "MSIX Handshake Disable Mode turned on\n"); | |
1473 | } else { | |
1474 | icb->firmware_options_2 |= | |
1475 | __constant_cpu_to_le32(BIT_22); | |
1476 | } | |
73208dfd | 1477 | icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23); |
73208dfd AC |
1478 | |
1479 | WRT_REG_DWORD(®->isp25mq.req_q_in, 0); | |
1480 | WRT_REG_DWORD(®->isp25mq.req_q_out, 0); | |
1481 | WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); | |
1482 | WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); | |
1483 | } else { | |
1484 | WRT_REG_DWORD(®->isp24.req_q_in, 0); | |
1485 | WRT_REG_DWORD(®->isp24.req_q_out, 0); | |
1486 | WRT_REG_DWORD(®->isp24.rsp_q_in, 0); | |
1487 | WRT_REG_DWORD(®->isp24.rsp_q_out, 0); | |
1488 | } | |
1489 | /* PCI posting */ | |
1490 | RD_REG_DWORD(&ioreg->hccr); | |
0107109e AV |
1491 | } |
1492 | ||
1da177e4 LT |
1493 | /** |
1494 | * qla2x00_init_rings() - Initializes firmware. | |
1495 | * @ha: HA context | |
1496 | * | |
1497 | * Beginning of request ring has initialization control block already built | |
1498 | * by nvram config routine. | |
1499 | * | |
1500 | * Returns 0 on success. | |
1501 | */ | |
1502 | static int | |
e315cd28 | 1503 | qla2x00_init_rings(scsi_qla_host_t *vha) |
1da177e4 LT |
1504 | { |
1505 | int rval; | |
1506 | unsigned long flags = 0; | |
29bdccbe | 1507 | int cnt, que; |
e315cd28 | 1508 | struct qla_hw_data *ha = vha->hw; |
29bdccbe AC |
1509 | struct req_que *req; |
1510 | struct rsp_que *rsp; | |
1511 | struct scsi_qla_host *vp; | |
2c3dfe3f SJ |
1512 | struct mid_init_cb_24xx *mid_init_cb = |
1513 | (struct mid_init_cb_24xx *) ha->init_cb; | |
1da177e4 LT |
1514 | |
1515 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1516 | ||
1517 | /* Clear outstanding commands array. */ | |
2afa19a9 | 1518 | for (que = 0; que < ha->max_req_queues; que++) { |
29bdccbe AC |
1519 | req = ha->req_q_map[que]; |
1520 | if (!req) | |
1521 | continue; | |
2afa19a9 | 1522 | for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) |
29bdccbe | 1523 | req->outstanding_cmds[cnt] = NULL; |
1da177e4 | 1524 | |
2afa19a9 | 1525 | req->current_outstanding_cmd = 1; |
1da177e4 | 1526 | |
29bdccbe AC |
1527 | /* Initialize firmware. */ |
1528 | req->ring_ptr = req->ring; | |
1529 | req->ring_index = 0; | |
1530 | req->cnt = req->length; | |
1531 | } | |
1da177e4 | 1532 | |
2afa19a9 | 1533 | for (que = 0; que < ha->max_rsp_queues; que++) { |
29bdccbe AC |
1534 | rsp = ha->rsp_q_map[que]; |
1535 | if (!rsp) | |
1536 | continue; | |
29bdccbe AC |
1537 | /* Initialize response queue entries */ |
1538 | qla2x00_init_response_q_entries(rsp); | |
1539 | } | |
1da177e4 | 1540 | |
29bdccbe AC |
1541 | /* Clear RSCN queue. */ |
1542 | list_for_each_entry(vp, &ha->vp_list, list) { | |
1543 | vp->rscn_in_ptr = 0; | |
1544 | vp->rscn_out_ptr = 0; | |
1545 | } | |
e315cd28 | 1546 | ha->isp_ops->config_rings(vha); |
1da177e4 LT |
1547 | |
1548 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1549 | ||
1550 | /* Update any ISP specific firmware options before initialization. */ | |
e315cd28 | 1551 | ha->isp_ops->update_fw_options(vha); |
1da177e4 | 1552 | |
e315cd28 | 1553 | DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no)); |
2c3dfe3f | 1554 | |
605aa2bc LC |
1555 | if (ha->flags.npiv_supported) { |
1556 | if (ha->operating_mode == LOOP) | |
1557 | ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; | |
c48339de | 1558 | mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); |
605aa2bc LC |
1559 | } |
1560 | ||
24a08138 AV |
1561 | if (IS_FWI2_CAPABLE(ha)) { |
1562 | mid_init_cb->options = __constant_cpu_to_le16(BIT_1); | |
1563 | mid_init_cb->init_cb.execution_throttle = | |
1564 | cpu_to_le16(ha->fw_xcb_count); | |
1565 | } | |
2c3dfe3f | 1566 | |
e315cd28 | 1567 | rval = qla2x00_init_firmware(vha, ha->init_cb_size); |
1da177e4 LT |
1568 | if (rval) { |
1569 | DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n", | |
e315cd28 | 1570 | vha->host_no)); |
1da177e4 LT |
1571 | } else { |
1572 | DEBUG3(printk("scsi(%ld): Init firmware -- success.\n", | |
e315cd28 | 1573 | vha->host_no)); |
1da177e4 LT |
1574 | } |
1575 | ||
1576 | return (rval); | |
1577 | } | |
1578 | ||
1579 | /** | |
1580 | * qla2x00_fw_ready() - Waits for firmware ready. | |
1581 | * @ha: HA context | |
1582 | * | |
1583 | * Returns 0 on success. | |
1584 | */ | |
1585 | static int | |
e315cd28 | 1586 | qla2x00_fw_ready(scsi_qla_host_t *vha) |
1da177e4 LT |
1587 | { |
1588 | int rval; | |
4d4df193 | 1589 | unsigned long wtime, mtime, cs84xx_time; |
1da177e4 LT |
1590 | uint16_t min_wait; /* Minimum wait time if loop is down */ |
1591 | uint16_t wait_time; /* Wait time if loop is coming ready */ | |
656e8912 | 1592 | uint16_t state[5]; |
e315cd28 | 1593 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1594 | |
1595 | rval = QLA_SUCCESS; | |
1596 | ||
1597 | /* 20 seconds for loop down. */ | |
fa2a1ce5 | 1598 | min_wait = 20; |
1da177e4 LT |
1599 | |
1600 | /* | |
1601 | * Firmware should take at most one RATOV to login, plus 5 seconds for | |
1602 | * our own processing. | |
1603 | */ | |
1604 | if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { | |
1605 | wait_time = min_wait; | |
1606 | } | |
1607 | ||
1608 | /* Min wait time if loop down */ | |
1609 | mtime = jiffies + (min_wait * HZ); | |
1610 | ||
1611 | /* wait time before firmware ready */ | |
1612 | wtime = jiffies + (wait_time * HZ); | |
1613 | ||
1614 | /* Wait for ISP to finish LIP */ | |
e315cd28 | 1615 | if (!vha->flags.init_done) |
1da177e4 LT |
1616 | qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n"); |
1617 | ||
1618 | DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n", | |
e315cd28 | 1619 | vha->host_no)); |
1da177e4 LT |
1620 | |
1621 | do { | |
e315cd28 | 1622 | rval = qla2x00_get_firmware_state(vha, state); |
1da177e4 | 1623 | if (rval == QLA_SUCCESS) { |
4d4df193 | 1624 | if (state[0] < FSTATE_LOSS_OF_SYNC) { |
e315cd28 | 1625 | vha->device_flags &= ~DFLG_NO_CABLE; |
1da177e4 | 1626 | } |
4d4df193 HK |
1627 | if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { |
1628 | DEBUG16(printk("scsi(%ld): fw_state=%x " | |
e315cd28 | 1629 | "84xx=%x.\n", vha->host_no, state[0], |
4d4df193 HK |
1630 | state[2])); |
1631 | if ((state[2] & FSTATE_LOGGED_IN) && | |
1632 | (state[2] & FSTATE_WAITING_FOR_VERIFY)) { | |
1633 | DEBUG16(printk("scsi(%ld): Sending " | |
e315cd28 | 1634 | "verify iocb.\n", vha->host_no)); |
4d4df193 HK |
1635 | |
1636 | cs84xx_time = jiffies; | |
e315cd28 | 1637 | rval = qla84xx_init_chip(vha); |
4d4df193 HK |
1638 | if (rval != QLA_SUCCESS) |
1639 | break; | |
1640 | ||
1641 | /* Add time taken to initialize. */ | |
1642 | cs84xx_time = jiffies - cs84xx_time; | |
1643 | wtime += cs84xx_time; | |
1644 | mtime += cs84xx_time; | |
1645 | DEBUG16(printk("scsi(%ld): Increasing " | |
1646 | "wait time by %ld. New time %ld\n", | |
e315cd28 | 1647 | vha->host_no, cs84xx_time, wtime)); |
4d4df193 HK |
1648 | } |
1649 | } else if (state[0] == FSTATE_READY) { | |
1da177e4 | 1650 | DEBUG(printk("scsi(%ld): F/W Ready - OK \n", |
e315cd28 | 1651 | vha->host_no)); |
1da177e4 | 1652 | |
e315cd28 | 1653 | qla2x00_get_retry_cnt(vha, &ha->retry_count, |
1da177e4 LT |
1654 | &ha->login_timeout, &ha->r_a_tov); |
1655 | ||
1656 | rval = QLA_SUCCESS; | |
1657 | break; | |
1658 | } | |
1659 | ||
1660 | rval = QLA_FUNCTION_FAILED; | |
1661 | ||
e315cd28 | 1662 | if (atomic_read(&vha->loop_down_timer) && |
4d4df193 | 1663 | state[0] != FSTATE_READY) { |
1da177e4 | 1664 | /* Loop down. Timeout on min_wait for states |
fa2a1ce5 AV |
1665 | * other than Wait for Login. |
1666 | */ | |
1da177e4 LT |
1667 | if (time_after_eq(jiffies, mtime)) { |
1668 | qla_printk(KERN_INFO, ha, | |
1669 | "Cable is unplugged...\n"); | |
1670 | ||
e315cd28 | 1671 | vha->device_flags |= DFLG_NO_CABLE; |
1da177e4 LT |
1672 | break; |
1673 | } | |
1674 | } | |
1675 | } else { | |
1676 | /* Mailbox cmd failed. Timeout on min_wait. */ | |
1677 | if (time_after_eq(jiffies, mtime)) | |
1678 | break; | |
1679 | } | |
1680 | ||
1681 | if (time_after_eq(jiffies, wtime)) | |
1682 | break; | |
1683 | ||
1684 | /* Delay for a while */ | |
1685 | msleep(500); | |
1686 | ||
1687 | DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n", | |
e315cd28 | 1688 | vha->host_no, state[0], jiffies)); |
1da177e4 LT |
1689 | } while (1); |
1690 | ||
656e8912 AV |
1691 | DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n", |
1692 | vha->host_no, state[0], state[1], state[2], state[3], state[4], | |
1693 | jiffies)); | |
1da177e4 LT |
1694 | |
1695 | if (rval) { | |
1696 | DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n", | |
e315cd28 | 1697 | vha->host_no)); |
1da177e4 LT |
1698 | } |
1699 | ||
1700 | return (rval); | |
1701 | } | |
1702 | ||
1703 | /* | |
1704 | * qla2x00_configure_hba | |
1705 | * Setup adapter context. | |
1706 | * | |
1707 | * Input: | |
1708 | * ha = adapter state pointer. | |
1709 | * | |
1710 | * Returns: | |
1711 | * 0 = success | |
1712 | * | |
1713 | * Context: | |
1714 | * Kernel context. | |
1715 | */ | |
1716 | static int | |
e315cd28 | 1717 | qla2x00_configure_hba(scsi_qla_host_t *vha) |
1da177e4 LT |
1718 | { |
1719 | int rval; | |
1720 | uint16_t loop_id; | |
1721 | uint16_t topo; | |
2c3dfe3f | 1722 | uint16_t sw_cap; |
1da177e4 LT |
1723 | uint8_t al_pa; |
1724 | uint8_t area; | |
1725 | uint8_t domain; | |
1726 | char connect_type[22]; | |
e315cd28 | 1727 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1728 | |
1729 | /* Get host addresses. */ | |
e315cd28 | 1730 | rval = qla2x00_get_adapter_id(vha, |
2c3dfe3f | 1731 | &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); |
1da177e4 | 1732 | if (rval != QLA_SUCCESS) { |
e315cd28 | 1733 | if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || |
33135aa2 RA |
1734 | (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { |
1735 | DEBUG2(printk("%s(%ld) Loop is in a transition state\n", | |
e315cd28 | 1736 | __func__, vha->host_no)); |
33135aa2 RA |
1737 | } else { |
1738 | qla_printk(KERN_WARNING, ha, | |
1739 | "ERROR -- Unable to get host loop ID.\n"); | |
e315cd28 | 1740 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
33135aa2 | 1741 | } |
1da177e4 LT |
1742 | return (rval); |
1743 | } | |
1744 | ||
1745 | if (topo == 4) { | |
1746 | qla_printk(KERN_INFO, ha, | |
1747 | "Cannot get topology - retrying.\n"); | |
1748 | return (QLA_FUNCTION_FAILED); | |
1749 | } | |
1750 | ||
e315cd28 | 1751 | vha->loop_id = loop_id; |
1da177e4 LT |
1752 | |
1753 | /* initialize */ | |
1754 | ha->min_external_loopid = SNS_FIRST_LOOP_ID; | |
1755 | ha->operating_mode = LOOP; | |
2c3dfe3f | 1756 | ha->switch_cap = 0; |
1da177e4 LT |
1757 | |
1758 | switch (topo) { | |
1759 | case 0: | |
1760 | DEBUG3(printk("scsi(%ld): HBA in NL topology.\n", | |
e315cd28 | 1761 | vha->host_no)); |
1da177e4 LT |
1762 | ha->current_topology = ISP_CFG_NL; |
1763 | strcpy(connect_type, "(Loop)"); | |
1764 | break; | |
1765 | ||
1766 | case 1: | |
1767 | DEBUG3(printk("scsi(%ld): HBA in FL topology.\n", | |
e315cd28 | 1768 | vha->host_no)); |
2c3dfe3f | 1769 | ha->switch_cap = sw_cap; |
1da177e4 LT |
1770 | ha->current_topology = ISP_CFG_FL; |
1771 | strcpy(connect_type, "(FL_Port)"); | |
1772 | break; | |
1773 | ||
1774 | case 2: | |
1775 | DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n", | |
e315cd28 | 1776 | vha->host_no)); |
1da177e4 LT |
1777 | ha->operating_mode = P2P; |
1778 | ha->current_topology = ISP_CFG_N; | |
1779 | strcpy(connect_type, "(N_Port-to-N_Port)"); | |
1780 | break; | |
1781 | ||
1782 | case 3: | |
1783 | DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n", | |
e315cd28 | 1784 | vha->host_no)); |
2c3dfe3f | 1785 | ha->switch_cap = sw_cap; |
1da177e4 LT |
1786 | ha->operating_mode = P2P; |
1787 | ha->current_topology = ISP_CFG_F; | |
1788 | strcpy(connect_type, "(F_Port)"); | |
1789 | break; | |
1790 | ||
1791 | default: | |
1792 | DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. " | |
1793 | "Using NL.\n", | |
e315cd28 | 1794 | vha->host_no, topo)); |
1da177e4 LT |
1795 | ha->current_topology = ISP_CFG_NL; |
1796 | strcpy(connect_type, "(Loop)"); | |
1797 | break; | |
1798 | } | |
1799 | ||
1800 | /* Save Host port and loop ID. */ | |
1801 | /* byte order - Big Endian */ | |
e315cd28 AC |
1802 | vha->d_id.b.domain = domain; |
1803 | vha->d_id.b.area = area; | |
1804 | vha->d_id.b.al_pa = al_pa; | |
1da177e4 | 1805 | |
e315cd28 | 1806 | if (!vha->flags.init_done) |
1da177e4 LT |
1807 | qla_printk(KERN_INFO, ha, |
1808 | "Topology - %s, Host Loop address 0x%x\n", | |
e315cd28 | 1809 | connect_type, vha->loop_id); |
1da177e4 LT |
1810 | |
1811 | if (rval) { | |
e315cd28 | 1812 | DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no)); |
1da177e4 | 1813 | } else { |
e315cd28 | 1814 | DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no)); |
1da177e4 LT |
1815 | } |
1816 | ||
1817 | return(rval); | |
1818 | } | |
1819 | ||
9bb9fcf2 | 1820 | static inline void |
e315cd28 AC |
1821 | qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, |
1822 | char *def) | |
9bb9fcf2 AV |
1823 | { |
1824 | char *st, *en; | |
1825 | uint16_t index; | |
e315cd28 | 1826 | struct qla_hw_data *ha = vha->hw; |
ab671149 AV |
1827 | int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && |
1828 | !IS_QLA81XX(ha); | |
9bb9fcf2 AV |
1829 | |
1830 | if (memcmp(model, BINZERO, len) != 0) { | |
1831 | strncpy(ha->model_number, model, len); | |
1832 | st = en = ha->model_number; | |
1833 | en += len - 1; | |
1834 | while (en > st) { | |
1835 | if (*en != 0x20 && *en != 0x00) | |
1836 | break; | |
1837 | *en-- = '\0'; | |
1838 | } | |
1839 | ||
1840 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
1841 | if (use_tbl && |
1842 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 | 1843 | index < QLA_MODEL_NAMES) |
1ee27146 JC |
1844 | strncpy(ha->model_desc, |
1845 | qla2x00_model_name[index * 2 + 1], | |
1846 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
1847 | } else { |
1848 | index = (ha->pdev->subsystem_device & 0xff); | |
7d0dba17 AV |
1849 | if (use_tbl && |
1850 | ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
9bb9fcf2 AV |
1851 | index < QLA_MODEL_NAMES) { |
1852 | strcpy(ha->model_number, | |
1853 | qla2x00_model_name[index * 2]); | |
1ee27146 JC |
1854 | strncpy(ha->model_desc, |
1855 | qla2x00_model_name[index * 2 + 1], | |
1856 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
1857 | } else { |
1858 | strcpy(ha->model_number, def); | |
1859 | } | |
1860 | } | |
1ee27146 | 1861 | if (IS_FWI2_CAPABLE(ha)) |
e315cd28 | 1862 | qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, |
1ee27146 | 1863 | sizeof(ha->model_desc)); |
9bb9fcf2 AV |
1864 | } |
1865 | ||
4e08df3f DM |
1866 | /* On sparc systems, obtain port and node WWN from firmware |
1867 | * properties. | |
1868 | */ | |
e315cd28 | 1869 | static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) |
4e08df3f DM |
1870 | { |
1871 | #ifdef CONFIG_SPARC | |
e315cd28 | 1872 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 1873 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
1874 | struct device_node *dp = pci_device_to_OF_node(pdev); |
1875 | const u8 *val; | |
4e08df3f DM |
1876 | int len; |
1877 | ||
1878 | val = of_get_property(dp, "port-wwn", &len); | |
1879 | if (val && len >= WWN_SIZE) | |
1880 | memcpy(nv->port_name, val, WWN_SIZE); | |
1881 | ||
1882 | val = of_get_property(dp, "node-wwn", &len); | |
1883 | if (val && len >= WWN_SIZE) | |
1884 | memcpy(nv->node_name, val, WWN_SIZE); | |
1885 | #endif | |
1886 | } | |
1887 | ||
1da177e4 LT |
1888 | /* |
1889 | * NVRAM configuration for ISP 2xxx | |
1890 | * | |
1891 | * Input: | |
1892 | * ha = adapter block pointer. | |
1893 | * | |
1894 | * Output: | |
1895 | * initialization control block in response_ring | |
1896 | * host adapters parameters in host adapter block | |
1897 | * | |
1898 | * Returns: | |
1899 | * 0 = success. | |
1900 | */ | |
abbd8870 | 1901 | int |
e315cd28 | 1902 | qla2x00_nvram_config(scsi_qla_host_t *vha) |
1da177e4 | 1903 | { |
4e08df3f | 1904 | int rval; |
0107109e AV |
1905 | uint8_t chksum = 0; |
1906 | uint16_t cnt; | |
1907 | uint8_t *dptr1, *dptr2; | |
e315cd28 | 1908 | struct qla_hw_data *ha = vha->hw; |
0107109e | 1909 | init_cb_t *icb = ha->init_cb; |
281afe19 SJ |
1910 | nvram_t *nv = ha->nvram; |
1911 | uint8_t *ptr = ha->nvram; | |
3d71644c | 1912 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 1913 | |
4e08df3f DM |
1914 | rval = QLA_SUCCESS; |
1915 | ||
1da177e4 | 1916 | /* Determine NVRAM starting address. */ |
0107109e | 1917 | ha->nvram_size = sizeof(nvram_t); |
1da177e4 LT |
1918 | ha->nvram_base = 0; |
1919 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) | |
1920 | if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) | |
1921 | ha->nvram_base = 0x80; | |
1922 | ||
1923 | /* Get NVRAM data and calculate checksum. */ | |
e315cd28 | 1924 | ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); |
0107109e AV |
1925 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) |
1926 | chksum += *ptr++; | |
1da177e4 | 1927 | |
e315cd28 | 1928 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no)); |
281afe19 | 1929 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
1da177e4 LT |
1930 | |
1931 | /* Bad NVRAM data, set defaults parameters. */ | |
1932 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || | |
1933 | nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { | |
1934 | /* Reset NVRAM data. */ | |
1935 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
1936 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
1937 | nv->nvram_version); | |
4e08df3f DM |
1938 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " |
1939 | "invalid -- WWPN) defaults.\n"); | |
1940 | ||
1941 | /* | |
1942 | * Set default initialization control block. | |
1943 | */ | |
1944 | memset(nv, 0, ha->nvram_size); | |
1945 | nv->parameter_block_version = ICB_VERSION; | |
1946 | ||
1947 | if (IS_QLA23XX(ha)) { | |
1948 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
1949 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
1950 | nv->add_firmware_options[0] = BIT_5; | |
1951 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
1952 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
1953 | nv->special_options[1] = BIT_7; | |
1954 | } else if (IS_QLA2200(ha)) { | |
1955 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
1956 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
1957 | nv->add_firmware_options[0] = BIT_5; | |
1958 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
1959 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
1960 | } else if (IS_QLA2100(ha)) { | |
1961 | nv->firmware_options[0] = BIT_3 | BIT_1; | |
1962 | nv->firmware_options[1] = BIT_5; | |
1963 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
1964 | } | |
1965 | ||
1966 | nv->max_iocb_allocation = __constant_cpu_to_le16(256); | |
1967 | nv->execution_throttle = __constant_cpu_to_le16(16); | |
1968 | nv->retry_count = 8; | |
1969 | nv->retry_delay = 1; | |
1970 | ||
1971 | nv->port_name[0] = 33; | |
1972 | nv->port_name[3] = 224; | |
1973 | nv->port_name[4] = 139; | |
1974 | ||
e315cd28 | 1975 | qla2xxx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
1976 | |
1977 | nv->login_timeout = 4; | |
1978 | ||
1979 | /* | |
1980 | * Set default host adapter parameters | |
1981 | */ | |
1982 | nv->host_p[1] = BIT_2; | |
1983 | nv->reset_delay = 5; | |
1984 | nv->port_down_retry_count = 8; | |
1985 | nv->max_luns_per_target = __constant_cpu_to_le16(8); | |
1986 | nv->link_down_timeout = 60; | |
1987 | ||
1988 | rval = 1; | |
1da177e4 LT |
1989 | } |
1990 | ||
1991 | #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) | |
1992 | /* | |
1993 | * The SN2 does not provide BIOS emulation which means you can't change | |
1994 | * potentially bogus BIOS settings. Force the use of default settings | |
1995 | * for link rate and frame size. Hope that the rest of the settings | |
1996 | * are valid. | |
1997 | */ | |
1998 | if (ia64_platform_is("sn2")) { | |
1999 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
2000 | if (IS_QLA23XX(ha)) | |
2001 | nv->special_options[1] = BIT_7; | |
2002 | } | |
2003 | #endif | |
2004 | ||
2005 | /* Reset Initialization control block */ | |
0107109e | 2006 | memset(icb, 0, ha->init_cb_size); |
1da177e4 LT |
2007 | |
2008 | /* | |
2009 | * Setup driver NVRAM options. | |
2010 | */ | |
2011 | nv->firmware_options[0] |= (BIT_6 | BIT_1); | |
2012 | nv->firmware_options[0] &= ~(BIT_5 | BIT_4); | |
2013 | nv->firmware_options[1] |= (BIT_5 | BIT_0); | |
2014 | nv->firmware_options[1] &= ~BIT_4; | |
2015 | ||
2016 | if (IS_QLA23XX(ha)) { | |
2017 | nv->firmware_options[0] |= BIT_2; | |
2018 | nv->firmware_options[0] &= ~BIT_3; | |
0107109e | 2019 | nv->add_firmware_options[1] |= BIT_5 | BIT_4; |
1da177e4 LT |
2020 | |
2021 | if (IS_QLA2300(ha)) { | |
2022 | if (ha->fb_rev == FPM_2310) { | |
2023 | strcpy(ha->model_number, "QLA2310"); | |
2024 | } else { | |
2025 | strcpy(ha->model_number, "QLA2300"); | |
2026 | } | |
2027 | } else { | |
e315cd28 | 2028 | qla2x00_set_model_info(vha, nv->model_number, |
9bb9fcf2 | 2029 | sizeof(nv->model_number), "QLA23xx"); |
1da177e4 LT |
2030 | } |
2031 | } else if (IS_QLA2200(ha)) { | |
2032 | nv->firmware_options[0] |= BIT_2; | |
2033 | /* | |
2034 | * 'Point-to-point preferred, else loop' is not a safe | |
2035 | * connection mode setting. | |
2036 | */ | |
2037 | if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == | |
2038 | (BIT_5 | BIT_4)) { | |
2039 | /* Force 'loop preferred, else point-to-point'. */ | |
2040 | nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); | |
2041 | nv->add_firmware_options[0] |= BIT_5; | |
2042 | } | |
2043 | strcpy(ha->model_number, "QLA22xx"); | |
2044 | } else /*if (IS_QLA2100(ha))*/ { | |
2045 | strcpy(ha->model_number, "QLA2100"); | |
2046 | } | |
2047 | ||
2048 | /* | |
2049 | * Copy over NVRAM RISC parameter block to initialization control block. | |
2050 | */ | |
2051 | dptr1 = (uint8_t *)icb; | |
2052 | dptr2 = (uint8_t *)&nv->parameter_block_version; | |
2053 | cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; | |
2054 | while (cnt--) | |
2055 | *dptr1++ = *dptr2++; | |
2056 | ||
2057 | /* Copy 2nd half. */ | |
2058 | dptr1 = (uint8_t *)icb->add_firmware_options; | |
2059 | cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; | |
2060 | while (cnt--) | |
2061 | *dptr1++ = *dptr2++; | |
2062 | ||
5341e868 AV |
2063 | /* Use alternate WWN? */ |
2064 | if (nv->host_p[1] & BIT_7) { | |
2065 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
2066 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
2067 | } | |
2068 | ||
1da177e4 LT |
2069 | /* Prepare nodename */ |
2070 | if ((icb->firmware_options[1] & BIT_6) == 0) { | |
2071 | /* | |
2072 | * Firmware will apply the following mask if the nodename was | |
2073 | * not provided. | |
2074 | */ | |
2075 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
2076 | icb->node_name[0] &= 0xF0; | |
2077 | } | |
2078 | ||
2079 | /* | |
2080 | * Set host adapter parameters. | |
2081 | */ | |
0181944f | 2082 | if (nv->host_p[0] & BIT_7) |
11010fec | 2083 | ql2xextended_error_logging = 1; |
1da177e4 LT |
2084 | ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); |
2085 | /* Always load RISC code on non ISP2[12]00 chips. */ | |
2086 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) | |
2087 | ha->flags.disable_risc_code_load = 0; | |
2088 | ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); | |
2089 | ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); | |
2090 | ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); | |
06c22bd1 | 2091 | ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; |
d4c760c2 | 2092 | ha->flags.disable_serdes = 0; |
1da177e4 LT |
2093 | |
2094 | ha->operating_mode = | |
2095 | (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
2096 | ||
2097 | memcpy(ha->fw_seriallink_options, nv->seriallink_options, | |
2098 | sizeof(ha->fw_seriallink_options)); | |
2099 | ||
2100 | /* save HBA serial number */ | |
2101 | ha->serial0 = icb->port_name[5]; | |
2102 | ha->serial1 = icb->port_name[6]; | |
2103 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
2104 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
2105 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
1da177e4 LT |
2106 | |
2107 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
2108 | ||
2109 | ha->retry_count = nv->retry_count; | |
2110 | ||
2111 | /* Set minimum login_timeout to 4 seconds. */ | |
2112 | if (nv->login_timeout < ql2xlogintimeout) | |
2113 | nv->login_timeout = ql2xlogintimeout; | |
2114 | if (nv->login_timeout < 4) | |
2115 | nv->login_timeout = 4; | |
2116 | ha->login_timeout = nv->login_timeout; | |
2117 | icb->login_timeout = nv->login_timeout; | |
2118 | ||
00a537b8 AV |
2119 | /* Set minimum RATOV to 100 tenths of a second. */ |
2120 | ha->r_a_tov = 100; | |
1da177e4 | 2121 | |
1da177e4 LT |
2122 | ha->loop_reset_delay = nv->reset_delay; |
2123 | ||
1da177e4 LT |
2124 | /* Link Down Timeout = 0: |
2125 | * | |
2126 | * When Port Down timer expires we will start returning | |
2127 | * I/O's to OS with "DID_NO_CONNECT". | |
2128 | * | |
2129 | * Link Down Timeout != 0: | |
2130 | * | |
2131 | * The driver waits for the link to come up after link down | |
2132 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
fa2a1ce5 | 2133 | */ |
1da177e4 LT |
2134 | if (nv->link_down_timeout == 0) { |
2135 | ha->loop_down_abort_time = | |
354d6b21 | 2136 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); |
1da177e4 LT |
2137 | } else { |
2138 | ha->link_down_timeout = nv->link_down_timeout; | |
2139 | ha->loop_down_abort_time = | |
2140 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
fa2a1ce5 | 2141 | } |
1da177e4 | 2142 | |
1da177e4 LT |
2143 | /* |
2144 | * Need enough time to try and get the port back. | |
2145 | */ | |
2146 | ha->port_down_retry_count = nv->port_down_retry_count; | |
2147 | if (qlport_down_retry) | |
2148 | ha->port_down_retry_count = qlport_down_retry; | |
2149 | /* Set login_retry_count */ | |
2150 | ha->login_retry_count = nv->retry_count; | |
2151 | if (ha->port_down_retry_count == nv->port_down_retry_count && | |
2152 | ha->port_down_retry_count > 3) | |
2153 | ha->login_retry_count = ha->port_down_retry_count; | |
2154 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
2155 | ha->login_retry_count = ha->port_down_retry_count; | |
2156 | if (ql2xloginretrycount) | |
2157 | ha->login_retry_count = ql2xloginretrycount; | |
2158 | ||
1da177e4 LT |
2159 | icb->lun_enables = __constant_cpu_to_le16(0); |
2160 | icb->command_resource_count = 0; | |
2161 | icb->immediate_notify_resource_count = 0; | |
2162 | icb->timeout = __constant_cpu_to_le16(0); | |
2163 | ||
2164 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { | |
2165 | /* Enable RIO */ | |
2166 | icb->firmware_options[0] &= ~BIT_3; | |
2167 | icb->add_firmware_options[0] &= | |
2168 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
2169 | icb->add_firmware_options[0] |= BIT_2; | |
2170 | icb->response_accumulation_timer = 3; | |
2171 | icb->interrupt_delay_timer = 5; | |
2172 | ||
e315cd28 | 2173 | vha->flags.process_response_queue = 1; |
1da177e4 | 2174 | } else { |
4fdfefe5 | 2175 | /* Enable ZIO. */ |
e315cd28 | 2176 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
2177 | ha->zio_mode = icb->add_firmware_options[0] & |
2178 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
2179 | ha->zio_timer = icb->interrupt_delay_timer ? | |
2180 | icb->interrupt_delay_timer: 2; | |
2181 | } | |
1da177e4 LT |
2182 | icb->add_firmware_options[0] &= |
2183 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
e315cd28 | 2184 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 2185 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d AV |
2186 | ha->zio_mode = QLA_ZIO_MODE_6; |
2187 | ||
4fdfefe5 | 2188 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer " |
e315cd28 | 2189 | "delay (%d us).\n", vha->host_no, ha->zio_mode, |
4fdfefe5 | 2190 | ha->zio_timer * 100)); |
1da177e4 | 2191 | qla_printk(KERN_INFO, ha, |
4fdfefe5 AV |
2192 | "ZIO mode %d enabled; timer delay (%d us).\n", |
2193 | ha->zio_mode, ha->zio_timer * 100); | |
1da177e4 | 2194 | |
4fdfefe5 AV |
2195 | icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; |
2196 | icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; | |
e315cd28 | 2197 | vha->flags.process_response_queue = 1; |
1da177e4 LT |
2198 | } |
2199 | } | |
2200 | ||
4e08df3f DM |
2201 | if (rval) { |
2202 | DEBUG2_3(printk(KERN_WARNING | |
e315cd28 | 2203 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); |
4e08df3f DM |
2204 | } |
2205 | return (rval); | |
1da177e4 LT |
2206 | } |
2207 | ||
19a7b4ae JSEC |
2208 | static void |
2209 | qla2x00_rport_del(void *data) | |
2210 | { | |
2211 | fc_port_t *fcport = data; | |
d97994dc | 2212 | struct fc_rport *rport; |
d97994dc | 2213 | |
e315cd28 | 2214 | spin_lock_irq(fcport->vha->host->host_lock); |
ac280b67 | 2215 | rport = fcport->drport ? fcport->drport: fcport->rport; |
d97994dc | 2216 | fcport->drport = NULL; |
e315cd28 | 2217 | spin_unlock_irq(fcport->vha->host->host_lock); |
d97994dc AV |
2218 | if (rport) |
2219 | fc_remote_port_delete(rport); | |
19a7b4ae JSEC |
2220 | } |
2221 | ||
1da177e4 LT |
2222 | /** |
2223 | * qla2x00_alloc_fcport() - Allocate a generic fcport. | |
2224 | * @ha: HA context | |
2225 | * @flags: allocation flags | |
2226 | * | |
2227 | * Returns a pointer to the allocated fcport, or NULL, if none available. | |
2228 | */ | |
9a069e19 | 2229 | fc_port_t * |
e315cd28 | 2230 | qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) |
1da177e4 LT |
2231 | { |
2232 | fc_port_t *fcport; | |
2233 | ||
bbfbbbc1 MK |
2234 | fcport = kzalloc(sizeof(fc_port_t), flags); |
2235 | if (!fcport) | |
2236 | return NULL; | |
1da177e4 LT |
2237 | |
2238 | /* Setup fcport template structure. */ | |
e315cd28 AC |
2239 | fcport->vha = vha; |
2240 | fcport->vp_idx = vha->vp_idx; | |
1da177e4 LT |
2241 | fcport->port_type = FCT_UNKNOWN; |
2242 | fcport->loop_id = FC_NO_LOOP_ID; | |
1da177e4 | 2243 | atomic_set(&fcport->state, FCS_UNCONFIGURED); |
ad3e0eda | 2244 | fcport->supported_classes = FC_COS_UNSPECIFIED; |
1da177e4 | 2245 | |
bbfbbbc1 | 2246 | return fcport; |
1da177e4 LT |
2247 | } |
2248 | ||
2249 | /* | |
2250 | * qla2x00_configure_loop | |
2251 | * Updates Fibre Channel Device Database with what is actually on loop. | |
2252 | * | |
2253 | * Input: | |
2254 | * ha = adapter block pointer. | |
2255 | * | |
2256 | * Returns: | |
2257 | * 0 = success. | |
2258 | * 1 = error. | |
2259 | * 2 = database was full and device was not configured. | |
2260 | */ | |
2261 | static int | |
e315cd28 | 2262 | qla2x00_configure_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
2263 | { |
2264 | int rval; | |
2265 | unsigned long flags, save_flags; | |
e315cd28 | 2266 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2267 | rval = QLA_SUCCESS; |
2268 | ||
2269 | /* Get Initiator ID */ | |
e315cd28 AC |
2270 | if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { |
2271 | rval = qla2x00_configure_hba(vha); | |
1da177e4 LT |
2272 | if (rval != QLA_SUCCESS) { |
2273 | DEBUG(printk("scsi(%ld): Unable to configure HBA.\n", | |
e315cd28 | 2274 | vha->host_no)); |
1da177e4 LT |
2275 | return (rval); |
2276 | } | |
2277 | } | |
2278 | ||
e315cd28 | 2279 | save_flags = flags = vha->dpc_flags; |
1da177e4 | 2280 | DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n", |
e315cd28 | 2281 | vha->host_no, flags)); |
1da177e4 LT |
2282 | |
2283 | /* | |
2284 | * If we have both an RSCN and PORT UPDATE pending then handle them | |
2285 | * both at the same time. | |
2286 | */ | |
e315cd28 AC |
2287 | clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
2288 | clear_bit(RSCN_UPDATE, &vha->dpc_flags); | |
1da177e4 | 2289 | |
3064ff39 MH |
2290 | qla2x00_get_data_rate(vha); |
2291 | ||
1da177e4 LT |
2292 | /* Determine what we need to do */ |
2293 | if (ha->current_topology == ISP_CFG_FL && | |
2294 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2295 | ||
e315cd28 | 2296 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2297 | set_bit(RSCN_UPDATE, &flags); |
2298 | ||
2299 | } else if (ha->current_topology == ISP_CFG_F && | |
2300 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2301 | ||
e315cd28 | 2302 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2303 | set_bit(RSCN_UPDATE, &flags); |
2304 | clear_bit(LOCAL_LOOP_UPDATE, &flags); | |
21333b48 AV |
2305 | |
2306 | } else if (ha->current_topology == ISP_CFG_N) { | |
2307 | clear_bit(RSCN_UPDATE, &flags); | |
1da177e4 | 2308 | |
e315cd28 | 2309 | } else if (!vha->flags.online || |
1da177e4 LT |
2310 | (test_bit(ABORT_ISP_ACTIVE, &flags))) { |
2311 | ||
e315cd28 | 2312 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2313 | set_bit(RSCN_UPDATE, &flags); |
2314 | set_bit(LOCAL_LOOP_UPDATE, &flags); | |
2315 | } | |
2316 | ||
2317 | if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { | |
e315cd28 | 2318 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) |
1da177e4 | 2319 | rval = QLA_FUNCTION_FAILED; |
e315cd28 AC |
2320 | else |
2321 | rval = qla2x00_configure_local_loop(vha); | |
1da177e4 LT |
2322 | } |
2323 | ||
2324 | if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { | |
e315cd28 | 2325 | if (LOOP_TRANSITION(vha)) |
1da177e4 | 2326 | rval = QLA_FUNCTION_FAILED; |
e315cd28 AC |
2327 | else |
2328 | rval = qla2x00_configure_fabric(vha); | |
1da177e4 LT |
2329 | } |
2330 | ||
2331 | if (rval == QLA_SUCCESS) { | |
e315cd28 AC |
2332 | if (atomic_read(&vha->loop_down_timer) || |
2333 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { | |
1da177e4 LT |
2334 | rval = QLA_FUNCTION_FAILED; |
2335 | } else { | |
e315cd28 | 2336 | atomic_set(&vha->loop_state, LOOP_READY); |
1da177e4 | 2337 | |
e315cd28 | 2338 | DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no)); |
1da177e4 LT |
2339 | } |
2340 | } | |
2341 | ||
2342 | if (rval) { | |
2343 | DEBUG2_3(printk("%s(%ld): *** FAILED ***\n", | |
e315cd28 | 2344 | __func__, vha->host_no)); |
1da177e4 LT |
2345 | } else { |
2346 | DEBUG3(printk("%s: exiting normally\n", __func__)); | |
2347 | } | |
2348 | ||
cc3ef7bc | 2349 | /* Restore state if a resync event occurred during processing */ |
e315cd28 | 2350 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { |
1da177e4 | 2351 | if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) |
e315cd28 | 2352 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
f4658b6c | 2353 | if (test_bit(RSCN_UPDATE, &save_flags)) { |
e315cd28 | 2354 | set_bit(RSCN_UPDATE, &vha->dpc_flags); |
f4658b6c AV |
2355 | vha->flags.rscn_queue_overflow = 1; |
2356 | } | |
1da177e4 LT |
2357 | } |
2358 | ||
2359 | return (rval); | |
2360 | } | |
2361 | ||
2362 | ||
2363 | ||
2364 | /* | |
2365 | * qla2x00_configure_local_loop | |
2366 | * Updates Fibre Channel Device Database with local loop devices. | |
2367 | * | |
2368 | * Input: | |
2369 | * ha = adapter block pointer. | |
2370 | * | |
2371 | * Returns: | |
2372 | * 0 = success. | |
2373 | */ | |
2374 | static int | |
e315cd28 | 2375 | qla2x00_configure_local_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
2376 | { |
2377 | int rval, rval2; | |
2378 | int found_devs; | |
2379 | int found; | |
2380 | fc_port_t *fcport, *new_fcport; | |
2381 | ||
2382 | uint16_t index; | |
2383 | uint16_t entries; | |
2384 | char *id_iter; | |
2385 | uint16_t loop_id; | |
2386 | uint8_t domain, area, al_pa; | |
e315cd28 | 2387 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2388 | |
2389 | found_devs = 0; | |
2390 | new_fcport = NULL; | |
2391 | entries = MAX_FIBRE_DEVICES; | |
2392 | ||
e315cd28 AC |
2393 | DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no)); |
2394 | DEBUG3(qla2x00_get_fcal_position_map(vha, NULL)); | |
1da177e4 LT |
2395 | |
2396 | /* Get list of logged in devices. */ | |
2397 | memset(ha->gid_list, 0, GID_LIST_SIZE); | |
e315cd28 | 2398 | rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, |
1da177e4 LT |
2399 | &entries); |
2400 | if (rval != QLA_SUCCESS) | |
2401 | goto cleanup_allocation; | |
2402 | ||
2403 | DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n", | |
7640335e | 2404 | vha->host_no, entries)); |
1da177e4 LT |
2405 | DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list, |
2406 | entries * sizeof(struct gid_list_info))); | |
2407 | ||
2408 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 2409 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 LT |
2410 | if (new_fcport == NULL) { |
2411 | rval = QLA_MEMORY_ALLOC_FAILED; | |
2412 | goto cleanup_allocation; | |
2413 | } | |
2414 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2415 | ||
2416 | /* | |
2417 | * Mark local devices that were present with FCF_DEVICE_LOST for now. | |
2418 | */ | |
e315cd28 | 2419 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2420 | if (atomic_read(&fcport->state) == FCS_ONLINE && |
2421 | fcport->port_type != FCT_BROADCAST && | |
2422 | (fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
2423 | ||
2424 | DEBUG(printk("scsi(%ld): Marking port lost, " | |
2425 | "loop_id=0x%04x\n", | |
e315cd28 | 2426 | vha->host_no, fcport->loop_id)); |
1da177e4 LT |
2427 | |
2428 | atomic_set(&fcport->state, FCS_DEVICE_LOST); | |
1da177e4 LT |
2429 | } |
2430 | } | |
2431 | ||
2432 | /* Add devices to port list. */ | |
2433 | id_iter = (char *)ha->gid_list; | |
2434 | for (index = 0; index < entries; index++) { | |
2435 | domain = ((struct gid_list_info *)id_iter)->domain; | |
2436 | area = ((struct gid_list_info *)id_iter)->area; | |
2437 | al_pa = ((struct gid_list_info *)id_iter)->al_pa; | |
abbd8870 | 2438 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) |
1da177e4 LT |
2439 | loop_id = (uint16_t) |
2440 | ((struct gid_list_info *)id_iter)->loop_id_2100; | |
abbd8870 | 2441 | else |
1da177e4 LT |
2442 | loop_id = le16_to_cpu( |
2443 | ((struct gid_list_info *)id_iter)->loop_id); | |
abbd8870 | 2444 | id_iter += ha->gid_list_info_size; |
1da177e4 LT |
2445 | |
2446 | /* Bypass reserved domain fields. */ | |
2447 | if ((domain & 0xf0) == 0xf0) | |
2448 | continue; | |
2449 | ||
2450 | /* Bypass if not same domain and area of adapter. */ | |
f7d289f6 | 2451 | if (area && domain && |
e315cd28 | 2452 | (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) |
1da177e4 LT |
2453 | continue; |
2454 | ||
2455 | /* Bypass invalid local loop ID. */ | |
2456 | if (loop_id > LAST_LOCAL_LOOP_ID) | |
2457 | continue; | |
2458 | ||
2459 | /* Fill in member data. */ | |
2460 | new_fcport->d_id.b.domain = domain; | |
2461 | new_fcport->d_id.b.area = area; | |
2462 | new_fcport->d_id.b.al_pa = al_pa; | |
2463 | new_fcport->loop_id = loop_id; | |
e315cd28 AC |
2464 | new_fcport->vp_idx = vha->vp_idx; |
2465 | rval2 = qla2x00_get_port_database(vha, new_fcport, 0); | |
1da177e4 LT |
2466 | if (rval2 != QLA_SUCCESS) { |
2467 | DEBUG2(printk("scsi(%ld): Failed to retrieve fcport " | |
2468 | "information -- get_port_database=%x, " | |
2469 | "loop_id=0x%04x\n", | |
e315cd28 | 2470 | vha->host_no, rval2, new_fcport->loop_id)); |
c9d02acf | 2471 | DEBUG2(printk("scsi(%ld): Scheduling resync...\n", |
e315cd28 AC |
2472 | vha->host_no)); |
2473 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
2474 | continue; |
2475 | } | |
2476 | ||
2477 | /* Check for matching device in port list. */ | |
2478 | found = 0; | |
2479 | fcport = NULL; | |
e315cd28 | 2480 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2481 | if (memcmp(new_fcport->port_name, fcport->port_name, |
2482 | WWN_SIZE)) | |
2483 | continue; | |
2484 | ||
ddb9b126 | 2485 | fcport->flags &= ~FCF_FABRIC_DEVICE; |
1da177e4 LT |
2486 | fcport->loop_id = new_fcport->loop_id; |
2487 | fcport->port_type = new_fcport->port_type; | |
2488 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
2489 | memcpy(fcport->node_name, new_fcport->node_name, | |
2490 | WWN_SIZE); | |
2491 | ||
2492 | found++; | |
2493 | break; | |
2494 | } | |
2495 | ||
2496 | if (!found) { | |
2497 | /* New device, add to fcports list. */ | |
e315cd28 AC |
2498 | if (vha->vp_idx) { |
2499 | new_fcport->vha = vha; | |
2500 | new_fcport->vp_idx = vha->vp_idx; | |
2c3dfe3f | 2501 | } |
e315cd28 | 2502 | list_add_tail(&new_fcport->list, &vha->vp_fcports); |
1da177e4 LT |
2503 | |
2504 | /* Allocate a new replacement fcport. */ | |
2505 | fcport = new_fcport; | |
e315cd28 | 2506 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 LT |
2507 | if (new_fcport == NULL) { |
2508 | rval = QLA_MEMORY_ALLOC_FAILED; | |
2509 | goto cleanup_allocation; | |
2510 | } | |
2511 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2512 | } | |
2513 | ||
d8b45213 | 2514 | /* Base iIDMA settings on HBA port speed. */ |
a3cbdfad | 2515 | fcport->fp_speed = ha->link_data_rate; |
d8b45213 | 2516 | |
e315cd28 | 2517 | qla2x00_update_fcport(vha, fcport); |
1da177e4 LT |
2518 | |
2519 | found_devs++; | |
2520 | } | |
2521 | ||
2522 | cleanup_allocation: | |
c9475cb0 | 2523 | kfree(new_fcport); |
1da177e4 LT |
2524 | |
2525 | if (rval != QLA_SUCCESS) { | |
2526 | DEBUG2(printk("scsi(%ld): Configure local loop error exit: " | |
e315cd28 | 2527 | "rval=%x\n", vha->host_no, rval)); |
1da177e4 LT |
2528 | } |
2529 | ||
1da177e4 LT |
2530 | return (rval); |
2531 | } | |
2532 | ||
d8b45213 | 2533 | static void |
e315cd28 | 2534 | qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
d8b45213 AV |
2535 | { |
2536 | #define LS_UNKNOWN 2 | |
9f8fddee AV |
2537 | static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" }; |
2538 | char *link_speed; | |
d8b45213 | 2539 | int rval; |
1bb39548 | 2540 | uint16_t mb[4]; |
e315cd28 | 2541 | struct qla_hw_data *ha = vha->hw; |
d8b45213 | 2542 | |
c76f2c01 | 2543 | if (!IS_IIDMA_CAPABLE(ha)) |
d8b45213 AV |
2544 | return; |
2545 | ||
39bd9622 AV |
2546 | if (fcport->fp_speed == PORT_SPEED_UNKNOWN || |
2547 | fcport->fp_speed > ha->link_data_rate) | |
d8b45213 AV |
2548 | return; |
2549 | ||
e315cd28 | 2550 | rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, |
a3cbdfad | 2551 | mb); |
d8b45213 AV |
2552 | if (rval != QLA_SUCCESS) { |
2553 | DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA " | |
2554 | "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n", | |
e315cd28 | 2555 | vha->host_no, fcport->port_name[0], fcport->port_name[1], |
d8b45213 AV |
2556 | fcport->port_name[2], fcport->port_name[3], |
2557 | fcport->port_name[4], fcport->port_name[5], | |
2558 | fcport->port_name[6], fcport->port_name[7], rval, | |
a3cbdfad | 2559 | fcport->fp_speed, mb[0], mb[1])); |
d8b45213 | 2560 | } else { |
9f8fddee AV |
2561 | link_speed = link_speeds[LS_UNKNOWN]; |
2562 | if (fcport->fp_speed < 5) | |
2563 | link_speed = link_speeds[fcport->fp_speed]; | |
2564 | else if (fcport->fp_speed == 0x13) | |
2565 | link_speed = link_speeds[5]; | |
d8b45213 AV |
2566 | DEBUG2(qla_printk(KERN_INFO, ha, |
2567 | "iIDMA adjusted to %s GB/s on " | |
2568 | "%02x%02x%02x%02x%02x%02x%02x%02x.\n", | |
9f8fddee | 2569 | link_speed, fcport->port_name[0], |
d8b45213 AV |
2570 | fcport->port_name[1], fcport->port_name[2], |
2571 | fcport->port_name[3], fcport->port_name[4], | |
2572 | fcport->port_name[5], fcport->port_name[6], | |
2573 | fcport->port_name[7])); | |
2574 | } | |
2575 | } | |
2576 | ||
23be331d | 2577 | static void |
e315cd28 | 2578 | qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) |
8482e118 AV |
2579 | { |
2580 | struct fc_rport_identifiers rport_ids; | |
bdf79621 | 2581 | struct fc_rport *rport; |
e315cd28 | 2582 | struct qla_hw_data *ha = vha->hw; |
8482e118 | 2583 | |
ac280b67 | 2584 | qla2x00_rport_del(fcport); |
8482e118 | 2585 | |
f8b02a85 AV |
2586 | rport_ids.node_name = wwn_to_u64(fcport->node_name); |
2587 | rport_ids.port_name = wwn_to_u64(fcport->port_name); | |
8482e118 AV |
2588 | rport_ids.port_id = fcport->d_id.b.domain << 16 | |
2589 | fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; | |
77d74143 | 2590 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
e315cd28 | 2591 | fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); |
77d74143 AV |
2592 | if (!rport) { |
2593 | qla_printk(KERN_WARNING, ha, | |
2594 | "Unable to allocate fc remote port!\n"); | |
2595 | return; | |
2596 | } | |
e315cd28 | 2597 | spin_lock_irq(fcport->vha->host->host_lock); |
19a7b4ae | 2598 | *((fc_port_t **)rport->dd_data) = fcport; |
e315cd28 | 2599 | spin_unlock_irq(fcport->vha->host->host_lock); |
d97994dc | 2600 | |
ad3e0eda | 2601 | rport->supported_classes = fcport->supported_classes; |
77d74143 | 2602 | |
8482e118 AV |
2603 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
2604 | if (fcport->port_type == FCT_INITIATOR) | |
2605 | rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; | |
2606 | if (fcport->port_type == FCT_TARGET) | |
2607 | rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; | |
77d74143 | 2608 | fc_remote_port_rolechg(rport, rport_ids.roles); |
1da177e4 LT |
2609 | } |
2610 | ||
23be331d AB |
2611 | /* |
2612 | * qla2x00_update_fcport | |
2613 | * Updates device on list. | |
2614 | * | |
2615 | * Input: | |
2616 | * ha = adapter block pointer. | |
2617 | * fcport = port structure pointer. | |
2618 | * | |
2619 | * Return: | |
2620 | * 0 - Success | |
2621 | * BIT_0 - error | |
2622 | * | |
2623 | * Context: | |
2624 | * Kernel context. | |
2625 | */ | |
2626 | void | |
e315cd28 | 2627 | qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
23be331d | 2628 | { |
e315cd28 | 2629 | struct qla_hw_data *ha = vha->hw; |
2c3dfe3f | 2630 | |
e315cd28 | 2631 | fcport->vha = vha; |
23be331d | 2632 | fcport->login_retry = 0; |
e315cd28 | 2633 | fcport->port_login_retry_count = ha->port_down_retry_count * |
23be331d | 2634 | PORT_RETRY_TIME; |
e315cd28 | 2635 | atomic_set(&fcport->port_down_timer, ha->port_down_retry_count * |
23be331d AB |
2636 | PORT_RETRY_TIME); |
2637 | fcport->flags &= ~FCF_LOGIN_NEEDED; | |
2638 | ||
e315cd28 | 2639 | qla2x00_iidma_fcport(vha, fcport); |
23be331d AB |
2640 | |
2641 | atomic_set(&fcport->state, FCS_ONLINE); | |
2642 | ||
e315cd28 | 2643 | qla2x00_reg_remote_port(vha, fcport); |
23be331d AB |
2644 | } |
2645 | ||
1da177e4 LT |
2646 | /* |
2647 | * qla2x00_configure_fabric | |
2648 | * Setup SNS devices with loop ID's. | |
2649 | * | |
2650 | * Input: | |
2651 | * ha = adapter block pointer. | |
2652 | * | |
2653 | * Returns: | |
2654 | * 0 = success. | |
2655 | * BIT_0 = error | |
2656 | */ | |
2657 | static int | |
e315cd28 | 2658 | qla2x00_configure_fabric(scsi_qla_host_t *vha) |
1da177e4 LT |
2659 | { |
2660 | int rval, rval2; | |
2661 | fc_port_t *fcport, *fcptemp; | |
2662 | uint16_t next_loopid; | |
2663 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
0107109e | 2664 | uint16_t loop_id; |
1da177e4 | 2665 | LIST_HEAD(new_fcports); |
e315cd28 AC |
2666 | struct qla_hw_data *ha = vha->hw; |
2667 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
1da177e4 LT |
2668 | |
2669 | /* If FL port exists, then SNS is present */ | |
e428924c | 2670 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2671 | loop_id = NPH_F_PORT; |
2672 | else | |
2673 | loop_id = SNS_FL_PORT; | |
e315cd28 | 2674 | rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); |
1da177e4 LT |
2675 | if (rval != QLA_SUCCESS) { |
2676 | DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL " | |
e315cd28 | 2677 | "Port\n", vha->host_no)); |
1da177e4 | 2678 | |
e315cd28 | 2679 | vha->device_flags &= ~SWITCH_FOUND; |
1da177e4 LT |
2680 | return (QLA_SUCCESS); |
2681 | } | |
e315cd28 | 2682 | vha->device_flags |= SWITCH_FOUND; |
1da177e4 LT |
2683 | |
2684 | /* Mark devices that need re-synchronization. */ | |
e315cd28 | 2685 | rval2 = qla2x00_device_resync(vha); |
1da177e4 LT |
2686 | if (rval2 == QLA_RSCNS_HANDLED) { |
2687 | /* No point doing the scan, just continue. */ | |
2688 | return (QLA_SUCCESS); | |
2689 | } | |
2690 | do { | |
cca5335c AV |
2691 | /* FDMI support. */ |
2692 | if (ql2xfdmienable && | |
e315cd28 AC |
2693 | test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) |
2694 | qla2x00_fdmi_register(vha); | |
cca5335c | 2695 | |
1da177e4 | 2696 | /* Ensure we are logged into the SNS. */ |
e428924c | 2697 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2698 | loop_id = NPH_SNS; |
2699 | else | |
2700 | loop_id = SIMPLE_NAME_SERVER; | |
e315cd28 | 2701 | ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, |
abbd8870 | 2702 | 0xfc, mb, BIT_1 | BIT_0); |
1da177e4 LT |
2703 | if (mb[0] != MBS_COMMAND_COMPLETE) { |
2704 | DEBUG2(qla_printk(KERN_INFO, ha, | |
2705 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " | |
0107109e | 2706 | "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id, |
1da177e4 LT |
2707 | mb[0], mb[1], mb[2], mb[6], mb[7])); |
2708 | return (QLA_SUCCESS); | |
2709 | } | |
2710 | ||
e315cd28 AC |
2711 | if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { |
2712 | if (qla2x00_rft_id(vha)) { | |
1da177e4 LT |
2713 | /* EMPTY */ |
2714 | DEBUG2(printk("scsi(%ld): Register FC-4 " | |
e315cd28 | 2715 | "TYPE failed.\n", vha->host_no)); |
1da177e4 | 2716 | } |
e315cd28 | 2717 | if (qla2x00_rff_id(vha)) { |
1da177e4 LT |
2718 | /* EMPTY */ |
2719 | DEBUG2(printk("scsi(%ld): Register FC-4 " | |
e315cd28 | 2720 | "Features failed.\n", vha->host_no)); |
1da177e4 | 2721 | } |
e315cd28 | 2722 | if (qla2x00_rnn_id(vha)) { |
1da177e4 LT |
2723 | /* EMPTY */ |
2724 | DEBUG2(printk("scsi(%ld): Register Node Name " | |
e315cd28 AC |
2725 | "failed.\n", vha->host_no)); |
2726 | } else if (qla2x00_rsnn_nn(vha)) { | |
1da177e4 LT |
2727 | /* EMPTY */ |
2728 | DEBUG2(printk("scsi(%ld): Register Symbolic " | |
e315cd28 | 2729 | "Node Name failed.\n", vha->host_no)); |
1da177e4 LT |
2730 | } |
2731 | } | |
2732 | ||
e315cd28 | 2733 | rval = qla2x00_find_all_fabric_devs(vha, &new_fcports); |
1da177e4 LT |
2734 | if (rval != QLA_SUCCESS) |
2735 | break; | |
2736 | ||
2737 | /* | |
2738 | * Logout all previous fabric devices marked lost, except | |
f08b7251 | 2739 | * FCP2 devices. |
1da177e4 | 2740 | */ |
e315cd28 AC |
2741 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
2742 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
2743 | break; |
2744 | ||
2745 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) | |
2746 | continue; | |
2747 | ||
2748 | if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) { | |
e315cd28 | 2749 | qla2x00_mark_device_lost(vha, fcport, |
d97994dc | 2750 | ql2xplogiabsentdevice, 0); |
1da177e4 | 2751 | if (fcport->loop_id != FC_NO_LOOP_ID && |
f08b7251 | 2752 | (fcport->flags & FCF_FCP2_DEVICE) == 0 && |
1da177e4 LT |
2753 | fcport->port_type != FCT_INITIATOR && |
2754 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 2755 | ha->isp_ops->fabric_logout(vha, |
1c7c6357 AV |
2756 | fcport->loop_id, |
2757 | fcport->d_id.b.domain, | |
2758 | fcport->d_id.b.area, | |
2759 | fcport->d_id.b.al_pa); | |
1da177e4 LT |
2760 | fcport->loop_id = FC_NO_LOOP_ID; |
2761 | } | |
2762 | } | |
2763 | } | |
2764 | ||
2765 | /* Starting free loop ID. */ | |
e315cd28 | 2766 | next_loopid = ha->min_external_loopid; |
1da177e4 LT |
2767 | |
2768 | /* | |
2769 | * Scan through our port list and login entries that need to be | |
2770 | * logged in. | |
2771 | */ | |
e315cd28 AC |
2772 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
2773 | if (atomic_read(&vha->loop_down_timer) || | |
2774 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
2775 | break; |
2776 | ||
2777 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || | |
2778 | (fcport->flags & FCF_LOGIN_NEEDED) == 0) | |
2779 | continue; | |
2780 | ||
2781 | if (fcport->loop_id == FC_NO_LOOP_ID) { | |
2782 | fcport->loop_id = next_loopid; | |
d4486fd6 | 2783 | rval = qla2x00_find_new_loop_id( |
e315cd28 | 2784 | base_vha, fcport); |
1da177e4 LT |
2785 | if (rval != QLA_SUCCESS) { |
2786 | /* Ran out of IDs to use */ | |
2787 | break; | |
2788 | } | |
2789 | } | |
1da177e4 | 2790 | /* Login and update database */ |
e315cd28 | 2791 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
1da177e4 LT |
2792 | } |
2793 | ||
2794 | /* Exit if out of loop IDs. */ | |
2795 | if (rval != QLA_SUCCESS) { | |
2796 | break; | |
2797 | } | |
2798 | ||
2799 | /* | |
2800 | * Login and add the new devices to our port list. | |
2801 | */ | |
2802 | list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { | |
e315cd28 AC |
2803 | if (atomic_read(&vha->loop_down_timer) || |
2804 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
2805 | break; |
2806 | ||
2807 | /* Find a new loop ID to use. */ | |
2808 | fcport->loop_id = next_loopid; | |
e315cd28 | 2809 | rval = qla2x00_find_new_loop_id(base_vha, fcport); |
1da177e4 LT |
2810 | if (rval != QLA_SUCCESS) { |
2811 | /* Ran out of IDs to use */ | |
2812 | break; | |
2813 | } | |
2814 | ||
bdf79621 | 2815 | /* Login and update database */ |
e315cd28 AC |
2816 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
2817 | ||
2818 | if (vha->vp_idx) { | |
2819 | fcport->vha = vha; | |
2820 | fcport->vp_idx = vha->vp_idx; | |
2821 | } | |
2822 | list_move_tail(&fcport->list, &vha->vp_fcports); | |
1da177e4 LT |
2823 | } |
2824 | } while (0); | |
2825 | ||
2826 | /* Free all new device structures not processed. */ | |
2827 | list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { | |
2828 | list_del(&fcport->list); | |
2829 | kfree(fcport); | |
2830 | } | |
2831 | ||
2832 | if (rval) { | |
2833 | DEBUG2(printk("scsi(%ld): Configure fabric error exit: " | |
e315cd28 | 2834 | "rval=%d\n", vha->host_no, rval)); |
1da177e4 LT |
2835 | } |
2836 | ||
2837 | return (rval); | |
2838 | } | |
2839 | ||
2840 | ||
2841 | /* | |
2842 | * qla2x00_find_all_fabric_devs | |
2843 | * | |
2844 | * Input: | |
2845 | * ha = adapter block pointer. | |
2846 | * dev = database device entry pointer. | |
2847 | * | |
2848 | * Returns: | |
2849 | * 0 = success. | |
2850 | * | |
2851 | * Context: | |
2852 | * Kernel context. | |
2853 | */ | |
2854 | static int | |
e315cd28 AC |
2855 | qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha, |
2856 | struct list_head *new_fcports) | |
1da177e4 LT |
2857 | { |
2858 | int rval; | |
2859 | uint16_t loop_id; | |
2860 | fc_port_t *fcport, *new_fcport, *fcptemp; | |
2861 | int found; | |
2862 | ||
2863 | sw_info_t *swl; | |
2864 | int swl_idx; | |
2865 | int first_dev, last_dev; | |
2866 | port_id_t wrap, nxt_d_id; | |
e315cd28 AC |
2867 | struct qla_hw_data *ha = vha->hw; |
2868 | struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev); | |
ee546b6e | 2869 | struct scsi_qla_host *tvp; |
1da177e4 LT |
2870 | |
2871 | rval = QLA_SUCCESS; | |
2872 | ||
2873 | /* Try GID_PT to get device list, else GAN. */ | |
4b89258c | 2874 | swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL); |
bbfbbbc1 | 2875 | if (!swl) { |
1da177e4 LT |
2876 | /*EMPTY*/ |
2877 | DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback " | |
e315cd28 | 2878 | "on GA_NXT\n", vha->host_no)); |
1da177e4 | 2879 | } else { |
e315cd28 | 2880 | if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
2881 | kfree(swl); |
2882 | swl = NULL; | |
e315cd28 | 2883 | } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
2884 | kfree(swl); |
2885 | swl = NULL; | |
e315cd28 | 2886 | } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
2887 | kfree(swl); |
2888 | swl = NULL; | |
e5896bd5 | 2889 | } else if (ql2xiidmaenable && |
e315cd28 AC |
2890 | qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) { |
2891 | qla2x00_gpsc(vha, swl); | |
1da177e4 LT |
2892 | } |
2893 | } | |
2894 | swl_idx = 0; | |
2895 | ||
2896 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 2897 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 2898 | if (new_fcport == NULL) { |
c9475cb0 | 2899 | kfree(swl); |
1da177e4 LT |
2900 | return (QLA_MEMORY_ALLOC_FAILED); |
2901 | } | |
2902 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
2903 | /* Set start port ID scan at adapter ID. */ |
2904 | first_dev = 1; | |
2905 | last_dev = 0; | |
2906 | ||
2907 | /* Starting free loop ID. */ | |
e315cd28 AC |
2908 | loop_id = ha->min_external_loopid; |
2909 | for (; loop_id <= ha->max_loop_id; loop_id++) { | |
2910 | if (qla2x00_is_reserved_id(vha, loop_id)) | |
1da177e4 LT |
2911 | continue; |
2912 | ||
bb2d52b2 AV |
2913 | if (atomic_read(&vha->loop_down_timer) || |
2914 | LOOP_TRANSITION(vha)) { | |
2915 | atomic_set(&vha->loop_down_timer, 0); | |
2916 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
2917 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
1da177e4 | 2918 | break; |
bb2d52b2 | 2919 | } |
1da177e4 LT |
2920 | |
2921 | if (swl != NULL) { | |
2922 | if (last_dev) { | |
2923 | wrap.b24 = new_fcport->d_id.b24; | |
2924 | } else { | |
2925 | new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; | |
2926 | memcpy(new_fcport->node_name, | |
2927 | swl[swl_idx].node_name, WWN_SIZE); | |
2928 | memcpy(new_fcport->port_name, | |
2929 | swl[swl_idx].port_name, WWN_SIZE); | |
d8b45213 AV |
2930 | memcpy(new_fcport->fabric_port_name, |
2931 | swl[swl_idx].fabric_port_name, WWN_SIZE); | |
2932 | new_fcport->fp_speed = swl[swl_idx].fp_speed; | |
1da177e4 LT |
2933 | |
2934 | if (swl[swl_idx].d_id.b.rsvd_1 != 0) { | |
2935 | last_dev = 1; | |
2936 | } | |
2937 | swl_idx++; | |
2938 | } | |
2939 | } else { | |
2940 | /* Send GA_NXT to the switch */ | |
e315cd28 | 2941 | rval = qla2x00_ga_nxt(vha, new_fcport); |
1da177e4 LT |
2942 | if (rval != QLA_SUCCESS) { |
2943 | qla_printk(KERN_WARNING, ha, | |
2944 | "SNS scan failed -- assuming zero-entry " | |
2945 | "result...\n"); | |
2946 | list_for_each_entry_safe(fcport, fcptemp, | |
2947 | new_fcports, list) { | |
2948 | list_del(&fcport->list); | |
2949 | kfree(fcport); | |
2950 | } | |
2951 | rval = QLA_SUCCESS; | |
2952 | break; | |
2953 | } | |
2954 | } | |
2955 | ||
2956 | /* If wrap on switch device list, exit. */ | |
2957 | if (first_dev) { | |
2958 | wrap.b24 = new_fcport->d_id.b24; | |
2959 | first_dev = 0; | |
2960 | } else if (new_fcport->d_id.b24 == wrap.b24) { | |
2961 | DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n", | |
e315cd28 | 2962 | vha->host_no, new_fcport->d_id.b.domain, |
1da177e4 LT |
2963 | new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa)); |
2964 | break; | |
2965 | } | |
2966 | ||
2c3dfe3f | 2967 | /* Bypass if same physical adapter. */ |
e315cd28 | 2968 | if (new_fcport->d_id.b24 == base_vha->d_id.b24) |
1da177e4 LT |
2969 | continue; |
2970 | ||
2c3dfe3f | 2971 | /* Bypass virtual ports of the same host. */ |
e315cd28 AC |
2972 | found = 0; |
2973 | if (ha->num_vhosts) { | |
ee546b6e | 2974 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
2975 | if (new_fcport->d_id.b24 == vp->d_id.b24) { |
2976 | found = 1; | |
2c3dfe3f | 2977 | break; |
e315cd28 | 2978 | } |
2c3dfe3f | 2979 | } |
e315cd28 | 2980 | if (found) |
2c3dfe3f SJ |
2981 | continue; |
2982 | } | |
2983 | ||
f7d289f6 AV |
2984 | /* Bypass if same domain and area of adapter. */ |
2985 | if (((new_fcport->d_id.b24 & 0xffff00) == | |
e315cd28 | 2986 | (vha->d_id.b24 & 0xffff00)) && ha->current_topology == |
f7d289f6 AV |
2987 | ISP_CFG_FL) |
2988 | continue; | |
2989 | ||
1da177e4 LT |
2990 | /* Bypass reserved domain fields. */ |
2991 | if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) | |
2992 | continue; | |
2993 | ||
2994 | /* Locate matching device in database. */ | |
2995 | found = 0; | |
e315cd28 | 2996 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2997 | if (memcmp(new_fcport->port_name, fcport->port_name, |
2998 | WWN_SIZE)) | |
2999 | continue; | |
3000 | ||
3001 | found++; | |
3002 | ||
d8b45213 AV |
3003 | /* Update port state. */ |
3004 | memcpy(fcport->fabric_port_name, | |
3005 | new_fcport->fabric_port_name, WWN_SIZE); | |
3006 | fcport->fp_speed = new_fcport->fp_speed; | |
3007 | ||
1da177e4 LT |
3008 | /* |
3009 | * If address the same and state FCS_ONLINE, nothing | |
3010 | * changed. | |
3011 | */ | |
3012 | if (fcport->d_id.b24 == new_fcport->d_id.b24 && | |
3013 | atomic_read(&fcport->state) == FCS_ONLINE) { | |
3014 | break; | |
3015 | } | |
3016 | ||
3017 | /* | |
3018 | * If device was not a fabric device before. | |
3019 | */ | |
3020 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
3021 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
3022 | fcport->loop_id = FC_NO_LOOP_ID; | |
3023 | fcport->flags |= (FCF_FABRIC_DEVICE | | |
3024 | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
3025 | break; |
3026 | } | |
3027 | ||
3028 | /* | |
3029 | * Port ID changed or device was marked to be updated; | |
3030 | * Log it out if still logged in and mark it for | |
3031 | * relogin later. | |
3032 | */ | |
3033 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
3034 | fcport->flags |= FCF_LOGIN_NEEDED; | |
3035 | if (fcport->loop_id != FC_NO_LOOP_ID && | |
f08b7251 | 3036 | (fcport->flags & FCF_FCP2_DEVICE) == 0 && |
1da177e4 LT |
3037 | fcport->port_type != FCT_INITIATOR && |
3038 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 3039 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3040 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3041 | fcport->d_id.b.al_pa); | |
1da177e4 LT |
3042 | fcport->loop_id = FC_NO_LOOP_ID; |
3043 | } | |
3044 | ||
3045 | break; | |
3046 | } | |
3047 | ||
3048 | if (found) | |
3049 | continue; | |
1da177e4 LT |
3050 | /* If device was not in our fcports list, then add it. */ |
3051 | list_add_tail(&new_fcport->list, new_fcports); | |
3052 | ||
3053 | /* Allocate a new replacement fcport. */ | |
3054 | nxt_d_id.b24 = new_fcport->d_id.b24; | |
e315cd28 | 3055 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 3056 | if (new_fcport == NULL) { |
c9475cb0 | 3057 | kfree(swl); |
1da177e4 LT |
3058 | return (QLA_MEMORY_ALLOC_FAILED); |
3059 | } | |
3060 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
3061 | new_fcport->d_id.b24 = nxt_d_id.b24; | |
3062 | } | |
3063 | ||
c9475cb0 JJ |
3064 | kfree(swl); |
3065 | kfree(new_fcport); | |
1da177e4 | 3066 | |
1da177e4 LT |
3067 | return (rval); |
3068 | } | |
3069 | ||
3070 | /* | |
3071 | * qla2x00_find_new_loop_id | |
3072 | * Scan through our port list and find a new usable loop ID. | |
3073 | * | |
3074 | * Input: | |
3075 | * ha: adapter state pointer. | |
3076 | * dev: port structure pointer. | |
3077 | * | |
3078 | * Returns: | |
3079 | * qla2x00 local function return status code. | |
3080 | * | |
3081 | * Context: | |
3082 | * Kernel context. | |
3083 | */ | |
413975a0 | 3084 | static int |
e315cd28 | 3085 | qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) |
1da177e4 LT |
3086 | { |
3087 | int rval; | |
3088 | int found; | |
3089 | fc_port_t *fcport; | |
3090 | uint16_t first_loop_id; | |
e315cd28 AC |
3091 | struct qla_hw_data *ha = vha->hw; |
3092 | struct scsi_qla_host *vp; | |
ee546b6e | 3093 | struct scsi_qla_host *tvp; |
1da177e4 LT |
3094 | |
3095 | rval = QLA_SUCCESS; | |
3096 | ||
3097 | /* Save starting loop ID. */ | |
3098 | first_loop_id = dev->loop_id; | |
3099 | ||
3100 | for (;;) { | |
3101 | /* Skip loop ID if already used by adapter. */ | |
e315cd28 | 3102 | if (dev->loop_id == vha->loop_id) |
1da177e4 | 3103 | dev->loop_id++; |
1da177e4 LT |
3104 | |
3105 | /* Skip reserved loop IDs. */ | |
e315cd28 | 3106 | while (qla2x00_is_reserved_id(vha, dev->loop_id)) |
1da177e4 | 3107 | dev->loop_id++; |
1da177e4 LT |
3108 | |
3109 | /* Reset loop ID if passed the end. */ | |
e315cd28 | 3110 | if (dev->loop_id > ha->max_loop_id) { |
1da177e4 LT |
3111 | /* first loop ID. */ |
3112 | dev->loop_id = ha->min_external_loopid; | |
3113 | } | |
3114 | ||
3115 | /* Check for loop ID being already in use. */ | |
3116 | found = 0; | |
3117 | fcport = NULL; | |
ee546b6e | 3118 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
3119 | list_for_each_entry(fcport, &vp->vp_fcports, list) { |
3120 | if (fcport->loop_id == dev->loop_id && | |
3121 | fcport != dev) { | |
3122 | /* ID possibly in use */ | |
3123 | found++; | |
3124 | break; | |
3125 | } | |
1da177e4 | 3126 | } |
e315cd28 AC |
3127 | if (found) |
3128 | break; | |
1da177e4 LT |
3129 | } |
3130 | ||
3131 | /* If not in use then it is free to use. */ | |
3132 | if (!found) { | |
3133 | break; | |
3134 | } | |
3135 | ||
3136 | /* ID in use. Try next value. */ | |
3137 | dev->loop_id++; | |
3138 | ||
3139 | /* If wrap around. No free ID to use. */ | |
3140 | if (dev->loop_id == first_loop_id) { | |
3141 | dev->loop_id = FC_NO_LOOP_ID; | |
3142 | rval = QLA_FUNCTION_FAILED; | |
3143 | break; | |
3144 | } | |
3145 | } | |
3146 | ||
3147 | return (rval); | |
3148 | } | |
3149 | ||
3150 | /* | |
3151 | * qla2x00_device_resync | |
3152 | * Marks devices in the database that needs resynchronization. | |
3153 | * | |
3154 | * Input: | |
3155 | * ha = adapter block pointer. | |
3156 | * | |
3157 | * Context: | |
3158 | * Kernel context. | |
3159 | */ | |
3160 | static int | |
e315cd28 | 3161 | qla2x00_device_resync(scsi_qla_host_t *vha) |
1da177e4 LT |
3162 | { |
3163 | int rval; | |
1da177e4 LT |
3164 | uint32_t mask; |
3165 | fc_port_t *fcport; | |
3166 | uint32_t rscn_entry; | |
3167 | uint8_t rscn_out_iter; | |
3168 | uint8_t format; | |
3169 | port_id_t d_id; | |
3170 | ||
3171 | rval = QLA_RSCNS_HANDLED; | |
3172 | ||
e315cd28 AC |
3173 | while (vha->rscn_out_ptr != vha->rscn_in_ptr || |
3174 | vha->flags.rscn_queue_overflow) { | |
1da177e4 | 3175 | |
e315cd28 | 3176 | rscn_entry = vha->rscn_queue[vha->rscn_out_ptr]; |
1da177e4 LT |
3177 | format = MSB(MSW(rscn_entry)); |
3178 | d_id.b.domain = LSB(MSW(rscn_entry)); | |
3179 | d_id.b.area = MSB(LSW(rscn_entry)); | |
3180 | d_id.b.al_pa = LSB(LSW(rscn_entry)); | |
3181 | ||
3182 | DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = " | |
3183 | "[%02x/%02x%02x%02x].\n", | |
e315cd28 | 3184 | vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain, |
1da177e4 LT |
3185 | d_id.b.area, d_id.b.al_pa)); |
3186 | ||
e315cd28 AC |
3187 | vha->rscn_out_ptr++; |
3188 | if (vha->rscn_out_ptr == MAX_RSCN_COUNT) | |
3189 | vha->rscn_out_ptr = 0; | |
1da177e4 LT |
3190 | |
3191 | /* Skip duplicate entries. */ | |
e315cd28 AC |
3192 | for (rscn_out_iter = vha->rscn_out_ptr; |
3193 | !vha->flags.rscn_queue_overflow && | |
3194 | rscn_out_iter != vha->rscn_in_ptr; | |
1da177e4 LT |
3195 | rscn_out_iter = (rscn_out_iter == |
3196 | (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) { | |
3197 | ||
e315cd28 | 3198 | if (rscn_entry != vha->rscn_queue[rscn_out_iter]) |
1da177e4 LT |
3199 | break; |
3200 | ||
3201 | DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue " | |
e315cd28 | 3202 | "entry found at [%d].\n", vha->host_no, |
1da177e4 LT |
3203 | rscn_out_iter)); |
3204 | ||
e315cd28 | 3205 | vha->rscn_out_ptr = rscn_out_iter; |
1da177e4 LT |
3206 | } |
3207 | ||
3208 | /* Queue overflow, set switch default case. */ | |
e315cd28 | 3209 | if (vha->flags.rscn_queue_overflow) { |
1da177e4 | 3210 | DEBUG(printk("scsi(%ld): device_resync: rscn " |
e315cd28 | 3211 | "overflow.\n", vha->host_no)); |
1da177e4 LT |
3212 | |
3213 | format = 3; | |
e315cd28 | 3214 | vha->flags.rscn_queue_overflow = 0; |
1da177e4 LT |
3215 | } |
3216 | ||
3217 | switch (format) { | |
3218 | case 0: | |
1da177e4 LT |
3219 | mask = 0xffffff; |
3220 | break; | |
3221 | case 1: | |
3222 | mask = 0xffff00; | |
3223 | break; | |
3224 | case 2: | |
3225 | mask = 0xff0000; | |
3226 | break; | |
3227 | default: | |
3228 | mask = 0x0; | |
3229 | d_id.b24 = 0; | |
e315cd28 | 3230 | vha->rscn_out_ptr = vha->rscn_in_ptr; |
1da177e4 LT |
3231 | break; |
3232 | } | |
3233 | ||
3234 | rval = QLA_SUCCESS; | |
3235 | ||
e315cd28 | 3236 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
3237 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || |
3238 | (fcport->d_id.b24 & mask) != d_id.b24 || | |
3239 | fcport->port_type == FCT_BROADCAST) | |
3240 | continue; | |
3241 | ||
3242 | if (atomic_read(&fcport->state) == FCS_ONLINE) { | |
3243 | if (format != 3 || | |
3244 | fcport->port_type != FCT_INITIATOR) { | |
e315cd28 | 3245 | qla2x00_mark_device_lost(vha, fcport, |
d97994dc | 3246 | 0, 0); |
1da177e4 LT |
3247 | } |
3248 | } | |
1da177e4 LT |
3249 | } |
3250 | } | |
3251 | return (rval); | |
3252 | } | |
3253 | ||
3254 | /* | |
3255 | * qla2x00_fabric_dev_login | |
3256 | * Login fabric target device and update FC port database. | |
3257 | * | |
3258 | * Input: | |
3259 | * ha: adapter state pointer. | |
3260 | * fcport: port structure list pointer. | |
3261 | * next_loopid: contains value of a new loop ID that can be used | |
3262 | * by the next login attempt. | |
3263 | * | |
3264 | * Returns: | |
3265 | * qla2x00 local function return status code. | |
3266 | * | |
3267 | * Context: | |
3268 | * Kernel context. | |
3269 | */ | |
3270 | static int | |
e315cd28 | 3271 | qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
3272 | uint16_t *next_loopid) |
3273 | { | |
3274 | int rval; | |
3275 | int retry; | |
0107109e | 3276 | uint8_t opts; |
e315cd28 | 3277 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3278 | |
3279 | rval = QLA_SUCCESS; | |
3280 | retry = 0; | |
3281 | ||
ac280b67 AV |
3282 | if (IS_ALOGIO_CAPABLE(ha)) { |
3283 | rval = qla2x00_post_async_login_work(vha, fcport, NULL); | |
3284 | if (!rval) | |
3285 | return rval; | |
3286 | } | |
3287 | ||
e315cd28 | 3288 | rval = qla2x00_fabric_login(vha, fcport, next_loopid); |
1da177e4 | 3289 | if (rval == QLA_SUCCESS) { |
f08b7251 | 3290 | /* Send an ADISC to FCP2 devices.*/ |
0107109e | 3291 | opts = 0; |
f08b7251 | 3292 | if (fcport->flags & FCF_FCP2_DEVICE) |
0107109e | 3293 | opts |= BIT_1; |
e315cd28 | 3294 | rval = qla2x00_get_port_database(vha, fcport, opts); |
1da177e4 | 3295 | if (rval != QLA_SUCCESS) { |
e315cd28 | 3296 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3297 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3298 | fcport->d_id.b.al_pa); | |
e315cd28 | 3299 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 | 3300 | } else { |
e315cd28 | 3301 | qla2x00_update_fcport(vha, fcport); |
1da177e4 LT |
3302 | } |
3303 | } | |
3304 | ||
3305 | return (rval); | |
3306 | } | |
3307 | ||
3308 | /* | |
3309 | * qla2x00_fabric_login | |
3310 | * Issue fabric login command. | |
3311 | * | |
3312 | * Input: | |
3313 | * ha = adapter block pointer. | |
3314 | * device = pointer to FC device type structure. | |
3315 | * | |
3316 | * Returns: | |
3317 | * 0 - Login successfully | |
3318 | * 1 - Login failed | |
3319 | * 2 - Initiator device | |
3320 | * 3 - Fatal error | |
3321 | */ | |
3322 | int | |
e315cd28 | 3323 | qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
3324 | uint16_t *next_loopid) |
3325 | { | |
3326 | int rval; | |
3327 | int retry; | |
3328 | uint16_t tmp_loopid; | |
3329 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
e315cd28 | 3330 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3331 | |
3332 | retry = 0; | |
3333 | tmp_loopid = 0; | |
3334 | ||
3335 | for (;;) { | |
3336 | DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x " | |
3337 | "for port %02x%02x%02x.\n", | |
e315cd28 | 3338 | vha->host_no, fcport->loop_id, fcport->d_id.b.domain, |
1da177e4 LT |
3339 | fcport->d_id.b.area, fcport->d_id.b.al_pa)); |
3340 | ||
3341 | /* Login fcport on switch. */ | |
e315cd28 | 3342 | ha->isp_ops->fabric_login(vha, fcport->loop_id, |
1da177e4 LT |
3343 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3344 | fcport->d_id.b.al_pa, mb, BIT_0); | |
3345 | if (mb[0] == MBS_PORT_ID_USED) { | |
3346 | /* | |
3347 | * Device has another loop ID. The firmware team | |
0107109e AV |
3348 | * recommends the driver perform an implicit login with |
3349 | * the specified ID again. The ID we just used is save | |
3350 | * here so we return with an ID that can be tried by | |
3351 | * the next login. | |
1da177e4 LT |
3352 | */ |
3353 | retry++; | |
3354 | tmp_loopid = fcport->loop_id; | |
3355 | fcport->loop_id = mb[1]; | |
3356 | ||
3357 | DEBUG(printk("Fabric Login: port in use - next " | |
3358 | "loop id=0x%04x, port Id=%02x%02x%02x.\n", | |
3359 | fcport->loop_id, fcport->d_id.b.domain, | |
3360 | fcport->d_id.b.area, fcport->d_id.b.al_pa)); | |
3361 | ||
3362 | } else if (mb[0] == MBS_COMMAND_COMPLETE) { | |
3363 | /* | |
3364 | * Login succeeded. | |
3365 | */ | |
3366 | if (retry) { | |
3367 | /* A retry occurred before. */ | |
3368 | *next_loopid = tmp_loopid; | |
3369 | } else { | |
3370 | /* | |
3371 | * No retry occurred before. Just increment the | |
3372 | * ID value for next login. | |
3373 | */ | |
3374 | *next_loopid = (fcport->loop_id + 1); | |
3375 | } | |
3376 | ||
3377 | if (mb[1] & BIT_0) { | |
3378 | fcport->port_type = FCT_INITIATOR; | |
3379 | } else { | |
3380 | fcport->port_type = FCT_TARGET; | |
3381 | if (mb[1] & BIT_1) { | |
8474f3a0 | 3382 | fcport->flags |= FCF_FCP2_DEVICE; |
1da177e4 LT |
3383 | } |
3384 | } | |
3385 | ||
ad3e0eda AV |
3386 | if (mb[10] & BIT_0) |
3387 | fcport->supported_classes |= FC_COS_CLASS2; | |
3388 | if (mb[10] & BIT_1) | |
3389 | fcport->supported_classes |= FC_COS_CLASS3; | |
3390 | ||
1da177e4 LT |
3391 | rval = QLA_SUCCESS; |
3392 | break; | |
3393 | } else if (mb[0] == MBS_LOOP_ID_USED) { | |
3394 | /* | |
3395 | * Loop ID already used, try next loop ID. | |
3396 | */ | |
3397 | fcport->loop_id++; | |
e315cd28 | 3398 | rval = qla2x00_find_new_loop_id(vha, fcport); |
1da177e4 LT |
3399 | if (rval != QLA_SUCCESS) { |
3400 | /* Ran out of loop IDs to use */ | |
3401 | break; | |
3402 | } | |
3403 | } else if (mb[0] == MBS_COMMAND_ERROR) { | |
3404 | /* | |
3405 | * Firmware possibly timed out during login. If NO | |
3406 | * retries are left to do then the device is declared | |
3407 | * dead. | |
3408 | */ | |
3409 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3410 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3411 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3412 | fcport->d_id.b.al_pa); | |
e315cd28 | 3413 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 LT |
3414 | |
3415 | rval = 1; | |
3416 | break; | |
3417 | } else { | |
3418 | /* | |
3419 | * unrecoverable / not handled error | |
3420 | */ | |
3421 | DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x " | |
fa2a1ce5 | 3422 | "loop_id=%x jiffies=%lx.\n", |
e315cd28 | 3423 | __func__, vha->host_no, mb[0], |
1da177e4 LT |
3424 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3425 | fcport->d_id.b.al_pa, fcport->loop_id, jiffies)); | |
3426 | ||
3427 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3428 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3429 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3430 | fcport->d_id.b.al_pa); | |
1da177e4 | 3431 | fcport->loop_id = FC_NO_LOOP_ID; |
0eedfcf0 | 3432 | fcport->login_retry = 0; |
1da177e4 LT |
3433 | |
3434 | rval = 3; | |
3435 | break; | |
3436 | } | |
3437 | } | |
3438 | ||
3439 | return (rval); | |
3440 | } | |
3441 | ||
3442 | /* | |
3443 | * qla2x00_local_device_login | |
3444 | * Issue local device login command. | |
3445 | * | |
3446 | * Input: | |
3447 | * ha = adapter block pointer. | |
3448 | * loop_id = loop id of device to login to. | |
3449 | * | |
3450 | * Returns (Where's the #define!!!!): | |
3451 | * 0 - Login successfully | |
3452 | * 1 - Login failed | |
3453 | * 3 - Fatal error | |
3454 | */ | |
3455 | int | |
e315cd28 | 3456 | qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) |
1da177e4 LT |
3457 | { |
3458 | int rval; | |
3459 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
3460 | ||
3461 | memset(mb, 0, sizeof(mb)); | |
e315cd28 | 3462 | rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); |
1da177e4 LT |
3463 | if (rval == QLA_SUCCESS) { |
3464 | /* Interrogate mailbox registers for any errors */ | |
3465 | if (mb[0] == MBS_COMMAND_ERROR) | |
3466 | rval = 1; | |
3467 | else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) | |
3468 | /* device not in PCB table */ | |
3469 | rval = 3; | |
3470 | } | |
3471 | ||
3472 | return (rval); | |
3473 | } | |
3474 | ||
3475 | /* | |
3476 | * qla2x00_loop_resync | |
3477 | * Resync with fibre channel devices. | |
3478 | * | |
3479 | * Input: | |
3480 | * ha = adapter block pointer. | |
3481 | * | |
3482 | * Returns: | |
3483 | * 0 = success | |
3484 | */ | |
3485 | int | |
e315cd28 | 3486 | qla2x00_loop_resync(scsi_qla_host_t *vha) |
1da177e4 | 3487 | { |
73208dfd | 3488 | int rval = QLA_SUCCESS; |
1da177e4 | 3489 | uint32_t wait_time; |
67c2e93a AC |
3490 | struct req_que *req; |
3491 | struct rsp_que *rsp; | |
3492 | ||
7163ea81 | 3493 | if (vha->hw->flags.cpu_affinity_enabled) |
67c2e93a AC |
3494 | req = vha->hw->req_q_map[0]; |
3495 | else | |
3496 | req = vha->req; | |
3497 | rsp = req->rsp; | |
1da177e4 | 3498 | |
e315cd28 AC |
3499 | atomic_set(&vha->loop_state, LOOP_UPDATE); |
3500 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
3501 | if (vha->flags.online) { | |
3502 | if (!(rval = qla2x00_fw_ready(vha))) { | |
1da177e4 LT |
3503 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
3504 | wait_time = 256; | |
3505 | do { | |
e315cd28 | 3506 | atomic_set(&vha->loop_state, LOOP_UPDATE); |
1da177e4 | 3507 | |
0107109e | 3508 | /* Issue a marker after FW becomes ready. */ |
73208dfd AC |
3509 | qla2x00_marker(vha, req, rsp, 0, 0, |
3510 | MK_SYNC_ALL); | |
e315cd28 | 3511 | vha->marker_needed = 0; |
1da177e4 LT |
3512 | |
3513 | /* Remap devices on Loop. */ | |
e315cd28 | 3514 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1da177e4 | 3515 | |
e315cd28 | 3516 | qla2x00_configure_loop(vha); |
1da177e4 | 3517 | wait_time--; |
e315cd28 AC |
3518 | } while (!atomic_read(&vha->loop_down_timer) && |
3519 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
3520 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
3521 | &vha->dpc_flags))); | |
1da177e4 | 3522 | } |
1da177e4 LT |
3523 | } |
3524 | ||
e315cd28 | 3525 | if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) |
1da177e4 | 3526 | return (QLA_FUNCTION_FAILED); |
1da177e4 | 3527 | |
e315cd28 | 3528 | if (rval) |
1da177e4 | 3529 | DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__)); |
1da177e4 LT |
3530 | |
3531 | return (rval); | |
3532 | } | |
3533 | ||
d97994dc | 3534 | void |
67becc00 | 3535 | qla2x00_update_fcports(scsi_qla_host_t *base_vha) |
d97994dc AV |
3536 | { |
3537 | fc_port_t *fcport; | |
67becc00 | 3538 | struct scsi_qla_host *tvp, *vha; |
d97994dc AV |
3539 | |
3540 | /* Go with deferred removal of rport references. */ | |
67becc00 AV |
3541 | list_for_each_entry_safe(vha, tvp, &base_vha->hw->vp_list, list) |
3542 | list_for_each_entry(fcport, &vha->vp_fcports, list) | |
3543 | if (fcport && fcport->drport && | |
3544 | atomic_read(&fcport->state) != FCS_UNCONFIGURED) | |
3545 | qla2x00_rport_del(fcport); | |
d97994dc AV |
3546 | } |
3547 | ||
1da177e4 LT |
3548 | /* |
3549 | * qla2x00_abort_isp | |
3550 | * Resets ISP and aborts all outstanding commands. | |
3551 | * | |
3552 | * Input: | |
3553 | * ha = adapter block pointer. | |
3554 | * | |
3555 | * Returns: | |
3556 | * 0 = success | |
3557 | */ | |
3558 | int | |
e315cd28 | 3559 | qla2x00_abort_isp(scsi_qla_host_t *vha) |
1da177e4 | 3560 | { |
476e8978 | 3561 | int rval; |
1da177e4 | 3562 | uint8_t status = 0; |
e315cd28 AC |
3563 | struct qla_hw_data *ha = vha->hw; |
3564 | struct scsi_qla_host *vp; | |
ee546b6e | 3565 | struct scsi_qla_host *tvp; |
73208dfd | 3566 | struct req_que *req = ha->req_q_map[0]; |
1da177e4 | 3567 | |
e315cd28 AC |
3568 | if (vha->flags.online) { |
3569 | vha->flags.online = 0; | |
2533cf67 | 3570 | ha->flags.chip_reset_done = 0; |
e315cd28 | 3571 | clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
e5f5f6f7 | 3572 | ha->qla_stats.total_isp_aborts++; |
1da177e4 LT |
3573 | |
3574 | qla_printk(KERN_INFO, ha, | |
3575 | "Performing ISP error recovery - ha= %p.\n", ha); | |
e315cd28 AC |
3576 | ha->isp_ops->reset_chip(vha); |
3577 | ||
3578 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
3579 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { | |
3580 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
3581 | qla2x00_mark_all_devices_lost(vha, 0); | |
1da177e4 | 3582 | } else { |
e315cd28 AC |
3583 | if (!atomic_read(&vha->loop_down_timer)) |
3584 | atomic_set(&vha->loop_down_timer, | |
1da177e4 LT |
3585 | LOOP_DOWN_TIME); |
3586 | } | |
3587 | ||
1da177e4 | 3588 | /* Requeue all commands in outstanding command list. */ |
e315cd28 | 3589 | qla2x00_abort_all_cmds(vha, DID_RESET << 16); |
1da177e4 | 3590 | |
85880801 AV |
3591 | if (unlikely(pci_channel_offline(ha->pdev) && |
3592 | ha->flags.pci_channel_io_perm_failure)) { | |
3593 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
3594 | status = 0; | |
3595 | return status; | |
3596 | } | |
3597 | ||
73208dfd | 3598 | ha->isp_ops->get_flash_version(vha, req->ring); |
30c47662 | 3599 | |
e315cd28 | 3600 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 3601 | |
e315cd28 AC |
3602 | if (!qla2x00_restart_isp(vha)) { |
3603 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
1da177e4 | 3604 | |
e315cd28 | 3605 | if (!atomic_read(&vha->loop_down_timer)) { |
1da177e4 LT |
3606 | /* |
3607 | * Issue marker command only when we are going | |
3608 | * to start the I/O . | |
3609 | */ | |
e315cd28 | 3610 | vha->marker_needed = 1; |
1da177e4 LT |
3611 | } |
3612 | ||
e315cd28 | 3613 | vha->flags.online = 1; |
1da177e4 | 3614 | |
fd34f556 | 3615 | ha->isp_ops->enable_intrs(ha); |
1da177e4 | 3616 | |
fa2a1ce5 | 3617 | ha->isp_abort_cnt = 0; |
e315cd28 | 3618 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
476e8978 | 3619 | |
29c5397f LC |
3620 | if (IS_QLA81XX(ha)) |
3621 | qla2x00_get_fw_version(vha, | |
3622 | &ha->fw_major_version, | |
3623 | &ha->fw_minor_version, | |
3624 | &ha->fw_subminor_version, | |
3625 | &ha->fw_attributes, &ha->fw_memory_size, | |
3626 | ha->mpi_version, &ha->mpi_capabilities, | |
3627 | ha->phy_version); | |
3628 | ||
df613b96 AV |
3629 | if (ha->fce) { |
3630 | ha->flags.fce_enabled = 1; | |
3631 | memset(ha->fce, 0, | |
3632 | fce_calc_size(ha->fce_bufs)); | |
e315cd28 | 3633 | rval = qla2x00_enable_fce_trace(vha, |
df613b96 AV |
3634 | ha->fce_dma, ha->fce_bufs, ha->fce_mb, |
3635 | &ha->fce_bufs); | |
3636 | if (rval) { | |
3637 | qla_printk(KERN_WARNING, ha, | |
3638 | "Unable to reinitialize FCE " | |
3639 | "(%d).\n", rval); | |
3640 | ha->flags.fce_enabled = 0; | |
3641 | } | |
3642 | } | |
436a7b11 AV |
3643 | |
3644 | if (ha->eft) { | |
3645 | memset(ha->eft, 0, EFT_SIZE); | |
e315cd28 | 3646 | rval = qla2x00_enable_eft_trace(vha, |
436a7b11 AV |
3647 | ha->eft_dma, EFT_NUM_BUFFERS); |
3648 | if (rval) { | |
3649 | qla_printk(KERN_WARNING, ha, | |
3650 | "Unable to reinitialize EFT " | |
3651 | "(%d).\n", rval); | |
3652 | } | |
3653 | } | |
1da177e4 | 3654 | } else { /* failed the ISP abort */ |
e315cd28 AC |
3655 | vha->flags.online = 1; |
3656 | if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { | |
1da177e4 LT |
3657 | if (ha->isp_abort_cnt == 0) { |
3658 | qla_printk(KERN_WARNING, ha, | |
3659 | "ISP error recovery failed - " | |
3660 | "board disabled\n"); | |
fa2a1ce5 | 3661 | /* |
1da177e4 LT |
3662 | * The next call disables the board |
3663 | * completely. | |
3664 | */ | |
e315cd28 AC |
3665 | ha->isp_ops->reset_adapter(vha); |
3666 | vha->flags.online = 0; | |
1da177e4 | 3667 | clear_bit(ISP_ABORT_RETRY, |
e315cd28 | 3668 | &vha->dpc_flags); |
1da177e4 LT |
3669 | status = 0; |
3670 | } else { /* schedule another ISP abort */ | |
3671 | ha->isp_abort_cnt--; | |
3672 | DEBUG(printk("qla%ld: ISP abort - " | |
0107109e | 3673 | "retry remaining %d\n", |
e315cd28 | 3674 | vha->host_no, ha->isp_abort_cnt)); |
1da177e4 LT |
3675 | status = 1; |
3676 | } | |
3677 | } else { | |
3678 | ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; | |
3679 | DEBUG(printk("qla2x00(%ld): ISP error recovery " | |
3680 | "- retrying (%d) more times\n", | |
e315cd28 AC |
3681 | vha->host_no, ha->isp_abort_cnt)); |
3682 | set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
1da177e4 LT |
3683 | status = 1; |
3684 | } | |
3685 | } | |
fa2a1ce5 | 3686 | |
1da177e4 LT |
3687 | } |
3688 | ||
e315cd28 AC |
3689 | if (!status) { |
3690 | DEBUG(printk(KERN_INFO | |
3691 | "qla2x00_abort_isp(%ld): succeeded.\n", | |
3692 | vha->host_no)); | |
ee546b6e | 3693 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
3694 | if (vp->vp_idx) |
3695 | qla2x00_vp_abort_isp(vp); | |
3696 | } | |
3697 | } else { | |
1da177e4 LT |
3698 | qla_printk(KERN_INFO, ha, |
3699 | "qla2x00_abort_isp: **** FAILED ****\n"); | |
1da177e4 LT |
3700 | } |
3701 | ||
3702 | return(status); | |
3703 | } | |
3704 | ||
3705 | /* | |
3706 | * qla2x00_restart_isp | |
3707 | * restarts the ISP after a reset | |
3708 | * | |
3709 | * Input: | |
3710 | * ha = adapter block pointer. | |
3711 | * | |
3712 | * Returns: | |
3713 | * 0 = success | |
3714 | */ | |
3715 | static int | |
e315cd28 | 3716 | qla2x00_restart_isp(scsi_qla_host_t *vha) |
1da177e4 | 3717 | { |
c6b2fca8 | 3718 | int status = 0; |
1da177e4 | 3719 | uint32_t wait_time; |
e315cd28 | 3720 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
3721 | struct req_que *req = ha->req_q_map[0]; |
3722 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
1da177e4 LT |
3723 | |
3724 | /* If firmware needs to be loaded */ | |
e315cd28 AC |
3725 | if (qla2x00_isp_firmware(vha)) { |
3726 | vha->flags.online = 0; | |
3727 | status = ha->isp_ops->chip_diag(vha); | |
3728 | if (!status) | |
3729 | status = qla2x00_setup_chip(vha); | |
1da177e4 LT |
3730 | } |
3731 | ||
e315cd28 AC |
3732 | if (!status && !(status = qla2x00_init_rings(vha))) { |
3733 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
2533cf67 | 3734 | ha->flags.chip_reset_done = 1; |
73208dfd AC |
3735 | /* Initialize the queues in use */ |
3736 | qla25xx_init_queues(ha); | |
3737 | ||
e315cd28 AC |
3738 | status = qla2x00_fw_ready(vha); |
3739 | if (!status) { | |
1da177e4 | 3740 | DEBUG(printk("%s(): Start configure loop, " |
744f11fd | 3741 | "status = %d\n", __func__, status)); |
0107109e AV |
3742 | |
3743 | /* Issue a marker after FW becomes ready. */ | |
73208dfd | 3744 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
0107109e | 3745 | |
e315cd28 | 3746 | vha->flags.online = 1; |
1da177e4 LT |
3747 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
3748 | wait_time = 256; | |
3749 | do { | |
e315cd28 AC |
3750 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
3751 | qla2x00_configure_loop(vha); | |
1da177e4 | 3752 | wait_time--; |
e315cd28 AC |
3753 | } while (!atomic_read(&vha->loop_down_timer) && |
3754 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
3755 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
3756 | &vha->dpc_flags))); | |
1da177e4 LT |
3757 | } |
3758 | ||
3759 | /* if no cable then assume it's good */ | |
e315cd28 | 3760 | if ((vha->device_flags & DFLG_NO_CABLE)) |
1da177e4 LT |
3761 | status = 0; |
3762 | ||
3763 | DEBUG(printk("%s(): Configure loop done, status = 0x%x\n", | |
3764 | __func__, | |
744f11fd | 3765 | status)); |
1da177e4 LT |
3766 | } |
3767 | return (status); | |
3768 | } | |
3769 | ||
73208dfd AC |
3770 | static int |
3771 | qla25xx_init_queues(struct qla_hw_data *ha) | |
3772 | { | |
3773 | struct rsp_que *rsp = NULL; | |
3774 | struct req_que *req = NULL; | |
3775 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
3776 | int ret = -1; | |
3777 | int i; | |
3778 | ||
2afa19a9 | 3779 | for (i = 1; i < ha->max_rsp_queues; i++) { |
73208dfd AC |
3780 | rsp = ha->rsp_q_map[i]; |
3781 | if (rsp) { | |
3782 | rsp->options &= ~BIT_0; | |
618a7523 | 3783 | ret = qla25xx_init_rsp_que(base_vha, rsp); |
73208dfd AC |
3784 | if (ret != QLA_SUCCESS) |
3785 | DEBUG2_17(printk(KERN_WARNING | |
3786 | "%s Rsp que:%d init failed\n", __func__, | |
3787 | rsp->id)); | |
3788 | else | |
3789 | DEBUG2_17(printk(KERN_INFO | |
3790 | "%s Rsp que:%d inited\n", __func__, | |
3791 | rsp->id)); | |
3792 | } | |
2afa19a9 AC |
3793 | } |
3794 | for (i = 1; i < ha->max_req_queues; i++) { | |
73208dfd AC |
3795 | req = ha->req_q_map[i]; |
3796 | if (req) { | |
29bdccbe | 3797 | /* Clear outstanding commands array. */ |
73208dfd | 3798 | req->options &= ~BIT_0; |
618a7523 | 3799 | ret = qla25xx_init_req_que(base_vha, req); |
73208dfd AC |
3800 | if (ret != QLA_SUCCESS) |
3801 | DEBUG2_17(printk(KERN_WARNING | |
3802 | "%s Req que:%d init failed\n", __func__, | |
3803 | req->id)); | |
3804 | else | |
3805 | DEBUG2_17(printk(KERN_WARNING | |
29bdccbe | 3806 | "%s Req que:%d inited\n", __func__, |
73208dfd AC |
3807 | req->id)); |
3808 | } | |
3809 | } | |
3810 | return ret; | |
3811 | } | |
3812 | ||
1da177e4 LT |
3813 | /* |
3814 | * qla2x00_reset_adapter | |
3815 | * Reset adapter. | |
3816 | * | |
3817 | * Input: | |
3818 | * ha = adapter block pointer. | |
3819 | */ | |
abbd8870 | 3820 | void |
e315cd28 | 3821 | qla2x00_reset_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
3822 | { |
3823 | unsigned long flags = 0; | |
e315cd28 | 3824 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 3825 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 3826 | |
e315cd28 | 3827 | vha->flags.online = 0; |
fd34f556 | 3828 | ha->isp_ops->disable_intrs(ha); |
1da177e4 | 3829 | |
1da177e4 LT |
3830 | spin_lock_irqsave(&ha->hardware_lock, flags); |
3831 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
3832 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
3833 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
3834 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
3835 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
3836 | } | |
0107109e AV |
3837 | |
3838 | void | |
e315cd28 | 3839 | qla24xx_reset_adapter(scsi_qla_host_t *vha) |
0107109e AV |
3840 | { |
3841 | unsigned long flags = 0; | |
e315cd28 | 3842 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
3843 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
3844 | ||
e315cd28 | 3845 | vha->flags.online = 0; |
fd34f556 | 3846 | ha->isp_ops->disable_intrs(ha); |
0107109e AV |
3847 | |
3848 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3849 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); | |
3850 | RD_REG_DWORD(®->hccr); | |
3851 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
3852 | RD_REG_DWORD(®->hccr); | |
3853 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
09ff36d3 AV |
3854 | |
3855 | if (IS_NOPOLLING_TYPE(ha)) | |
3856 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
3857 | } |
3858 | ||
4e08df3f DM |
3859 | /* On sparc systems, obtain port and node WWN from firmware |
3860 | * properties. | |
3861 | */ | |
e315cd28 AC |
3862 | static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, |
3863 | struct nvram_24xx *nv) | |
4e08df3f DM |
3864 | { |
3865 | #ifdef CONFIG_SPARC | |
e315cd28 | 3866 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 3867 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
3868 | struct device_node *dp = pci_device_to_OF_node(pdev); |
3869 | const u8 *val; | |
4e08df3f DM |
3870 | int len; |
3871 | ||
3872 | val = of_get_property(dp, "port-wwn", &len); | |
3873 | if (val && len >= WWN_SIZE) | |
3874 | memcpy(nv->port_name, val, WWN_SIZE); | |
3875 | ||
3876 | val = of_get_property(dp, "node-wwn", &len); | |
3877 | if (val && len >= WWN_SIZE) | |
3878 | memcpy(nv->node_name, val, WWN_SIZE); | |
3879 | #endif | |
3880 | } | |
3881 | ||
0107109e | 3882 | int |
e315cd28 | 3883 | qla24xx_nvram_config(scsi_qla_host_t *vha) |
0107109e | 3884 | { |
4e08df3f | 3885 | int rval; |
0107109e AV |
3886 | struct init_cb_24xx *icb; |
3887 | struct nvram_24xx *nv; | |
3888 | uint32_t *dptr; | |
3889 | uint8_t *dptr1, *dptr2; | |
3890 | uint32_t chksum; | |
3891 | uint16_t cnt; | |
e315cd28 | 3892 | struct qla_hw_data *ha = vha->hw; |
0107109e | 3893 | |
4e08df3f | 3894 | rval = QLA_SUCCESS; |
0107109e | 3895 | icb = (struct init_cb_24xx *)ha->init_cb; |
281afe19 | 3896 | nv = ha->nvram; |
0107109e AV |
3897 | |
3898 | /* Determine NVRAM starting address. */ | |
e5b68a61 AC |
3899 | if (ha->flags.port0) { |
3900 | ha->nvram_base = FA_NVRAM_FUNC0_ADDR; | |
3901 | ha->vpd_base = FA_NVRAM_VPD0_ADDR; | |
3902 | } else { | |
0107109e | 3903 | ha->nvram_base = FA_NVRAM_FUNC1_ADDR; |
6f641790 AV |
3904 | ha->vpd_base = FA_NVRAM_VPD1_ADDR; |
3905 | } | |
e5b68a61 AC |
3906 | ha->nvram_size = sizeof(struct nvram_24xx); |
3907 | ha->vpd_size = FA_NVRAM_VPD_SIZE; | |
0107109e | 3908 | |
281afe19 SJ |
3909 | /* Get VPD data into cache */ |
3910 | ha->vpd = ha->nvram + VPD_OFFSET; | |
e315cd28 | 3911 | ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, |
281afe19 SJ |
3912 | ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); |
3913 | ||
3914 | /* Get NVRAM data into cache and calculate checksum. */ | |
0107109e | 3915 | dptr = (uint32_t *)nv; |
e315cd28 | 3916 | ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, |
0107109e AV |
3917 | ha->nvram_size); |
3918 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) | |
3919 | chksum += le32_to_cpu(*dptr++); | |
3920 | ||
7640335e | 3921 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no)); |
281afe19 | 3922 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
0107109e AV |
3923 | |
3924 | /* Bad NVRAM data, set defaults parameters. */ | |
3925 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
3926 | || nv->id[3] != ' ' || | |
3927 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
3928 | /* Reset NVRAM data. */ | |
3929 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
3930 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
3931 | le16_to_cpu(nv->nvram_version)); | |
4e08df3f DM |
3932 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " |
3933 | "invalid -- WWPN) defaults.\n"); | |
3934 | ||
3935 | /* | |
3936 | * Set default initialization control block. | |
3937 | */ | |
3938 | memset(nv, 0, ha->nvram_size); | |
3939 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
3940 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
3941 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
3942 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
3943 | nv->exchange_count = __constant_cpu_to_le16(0); | |
3944 | nv->hard_address = __constant_cpu_to_le16(124); | |
3945 | nv->port_name[0] = 0x21; | |
e5b68a61 | 3946 | nv->port_name[1] = 0x00 + ha->port_no; |
4e08df3f DM |
3947 | nv->port_name[2] = 0x00; |
3948 | nv->port_name[3] = 0xe0; | |
3949 | nv->port_name[4] = 0x8b; | |
3950 | nv->port_name[5] = 0x1c; | |
3951 | nv->port_name[6] = 0x55; | |
3952 | nv->port_name[7] = 0x86; | |
3953 | nv->node_name[0] = 0x20; | |
3954 | nv->node_name[1] = 0x00; | |
3955 | nv->node_name[2] = 0x00; | |
3956 | nv->node_name[3] = 0xe0; | |
3957 | nv->node_name[4] = 0x8b; | |
3958 | nv->node_name[5] = 0x1c; | |
3959 | nv->node_name[6] = 0x55; | |
3960 | nv->node_name[7] = 0x86; | |
e315cd28 | 3961 | qla24xx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
3962 | nv->login_retry_count = __constant_cpu_to_le16(8); |
3963 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
3964 | nv->login_timeout = __constant_cpu_to_le16(0); | |
3965 | nv->firmware_options_1 = | |
3966 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
3967 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
3968 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
3969 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
3970 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
3971 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
3972 | nv->reset_delay = 5; | |
3973 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
3974 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
3975 | nv->link_down_timeout = __constant_cpu_to_le16(30); | |
3976 | ||
3977 | rval = 1; | |
0107109e AV |
3978 | } |
3979 | ||
3980 | /* Reset Initialization control block */ | |
e315cd28 | 3981 | memset(icb, 0, ha->init_cb_size); |
0107109e AV |
3982 | |
3983 | /* Copy 1st segment. */ | |
3984 | dptr1 = (uint8_t *)icb; | |
3985 | dptr2 = (uint8_t *)&nv->version; | |
3986 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
3987 | while (cnt--) | |
3988 | *dptr1++ = *dptr2++; | |
3989 | ||
3990 | icb->login_retry_count = nv->login_retry_count; | |
3ea66e28 | 3991 | icb->link_down_on_nos = nv->link_down_on_nos; |
0107109e AV |
3992 | |
3993 | /* Copy 2nd segment. */ | |
3994 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
3995 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
3996 | cnt = (uint8_t *)&icb->reserved_3 - | |
3997 | (uint8_t *)&icb->interrupt_delay_timer; | |
3998 | while (cnt--) | |
3999 | *dptr1++ = *dptr2++; | |
4000 | ||
4001 | /* | |
4002 | * Setup driver NVRAM options. | |
4003 | */ | |
e315cd28 | 4004 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), |
9bb9fcf2 | 4005 | "QLA2462"); |
0107109e | 4006 | |
5341e868 AV |
4007 | /* Use alternate WWN? */ |
4008 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
4009 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
4010 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
4011 | } | |
4012 | ||
0107109e | 4013 | /* Prepare nodename */ |
fd0e7e4d | 4014 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { |
0107109e AV |
4015 | /* |
4016 | * Firmware will apply the following mask if the nodename was | |
4017 | * not provided. | |
4018 | */ | |
4019 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
4020 | icb->node_name[0] &= 0xF0; | |
4021 | } | |
4022 | ||
4023 | /* Set host adapter parameters. */ | |
4024 | ha->flags.disable_risc_code_load = 0; | |
0c8c39af AV |
4025 | ha->flags.enable_lip_reset = 0; |
4026 | ha->flags.enable_lip_full_login = | |
4027 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
4028 | ha->flags.enable_target_reset = | |
4029 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
0107109e | 4030 | ha->flags.enable_led_scheme = 0; |
d4c760c2 | 4031 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; |
0107109e | 4032 | |
fd0e7e4d AV |
4033 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & |
4034 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
0107109e AV |
4035 | |
4036 | memcpy(ha->fw_seriallink_options24, nv->seriallink_options, | |
4037 | sizeof(ha->fw_seriallink_options24)); | |
4038 | ||
4039 | /* save HBA serial number */ | |
4040 | ha->serial0 = icb->port_name[5]; | |
4041 | ha->serial1 = icb->port_name[6]; | |
4042 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
4043 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
4044 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
0107109e | 4045 | |
bc8fb3cb AV |
4046 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); |
4047 | ||
0107109e AV |
4048 | ha->retry_count = le16_to_cpu(nv->login_retry_count); |
4049 | ||
4050 | /* Set minimum login_timeout to 4 seconds. */ | |
4051 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
4052 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
4053 | if (le16_to_cpu(nv->login_timeout) < 4) | |
4054 | nv->login_timeout = __constant_cpu_to_le16(4); | |
4055 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
c6852c4c | 4056 | icb->login_timeout = nv->login_timeout; |
0107109e | 4057 | |
00a537b8 AV |
4058 | /* Set minimum RATOV to 100 tenths of a second. */ |
4059 | ha->r_a_tov = 100; | |
0107109e AV |
4060 | |
4061 | ha->loop_reset_delay = nv->reset_delay; | |
4062 | ||
4063 | /* Link Down Timeout = 0: | |
4064 | * | |
4065 | * When Port Down timer expires we will start returning | |
4066 | * I/O's to OS with "DID_NO_CONNECT". | |
4067 | * | |
4068 | * Link Down Timeout != 0: | |
4069 | * | |
4070 | * The driver waits for the link to come up after link down | |
4071 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
4072 | */ | |
4073 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
4074 | ha->loop_down_abort_time = | |
4075 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
4076 | } else { | |
4077 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
4078 | ha->loop_down_abort_time = | |
4079 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
4080 | } | |
4081 | ||
4082 | /* Need enough time to try and get the port back. */ | |
4083 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
4084 | if (qlport_down_retry) | |
4085 | ha->port_down_retry_count = qlport_down_retry; | |
4086 | ||
4087 | /* Set login_retry_count */ | |
4088 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
4089 | if (ha->port_down_retry_count == | |
4090 | le16_to_cpu(nv->port_down_retry_count) && | |
4091 | ha->port_down_retry_count > 3) | |
4092 | ha->login_retry_count = ha->port_down_retry_count; | |
4093 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
4094 | ha->login_retry_count = ha->port_down_retry_count; | |
4095 | if (ql2xloginretrycount) | |
4096 | ha->login_retry_count = ql2xloginretrycount; | |
4097 | ||
4fdfefe5 | 4098 | /* Enable ZIO. */ |
e315cd28 | 4099 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
4100 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & |
4101 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
4102 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
4103 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
4104 | } | |
4105 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
4106 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
e315cd28 | 4107 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 4108 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d AV |
4109 | ha->zio_mode = QLA_ZIO_MODE_6; |
4110 | ||
4fdfefe5 | 4111 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay " |
e315cd28 | 4112 | "(%d us).\n", vha->host_no, ha->zio_mode, |
4fdfefe5 AV |
4113 | ha->zio_timer * 100)); |
4114 | qla_printk(KERN_INFO, ha, | |
4115 | "ZIO mode %d enabled; timer delay (%d us).\n", | |
4116 | ha->zio_mode, ha->zio_timer * 100); | |
4117 | ||
4118 | icb->firmware_options_2 |= cpu_to_le32( | |
4119 | (uint32_t)ha->zio_mode); | |
4120 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
e315cd28 | 4121 | vha->flags.process_response_queue = 1; |
4fdfefe5 AV |
4122 | } |
4123 | ||
4e08df3f DM |
4124 | if (rval) { |
4125 | DEBUG2_3(printk(KERN_WARNING | |
e315cd28 | 4126 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); |
4e08df3f DM |
4127 | } |
4128 | return (rval); | |
0107109e AV |
4129 | } |
4130 | ||
413975a0 | 4131 | static int |
cbc8eb67 AV |
4132 | qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, |
4133 | uint32_t faddr) | |
d1c61909 | 4134 | { |
73208dfd | 4135 | int rval = QLA_SUCCESS; |
d1c61909 | 4136 | int segments, fragment; |
d1c61909 AV |
4137 | uint32_t *dcode, dlen; |
4138 | uint32_t risc_addr; | |
4139 | uint32_t risc_size; | |
4140 | uint32_t i; | |
e315cd28 | 4141 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4142 | struct req_que *req = ha->req_q_map[0]; |
eaac30be AV |
4143 | |
4144 | qla_printk(KERN_INFO, ha, | |
cbc8eb67 | 4145 | "FW: Loading from flash (%x)...\n", faddr); |
eaac30be | 4146 | |
d1c61909 AV |
4147 | rval = QLA_SUCCESS; |
4148 | ||
4149 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 4150 | dcode = (uint32_t *)req->ring; |
d1c61909 AV |
4151 | *srisc_addr = 0; |
4152 | ||
4153 | /* Validate firmware image by checking version. */ | |
e315cd28 | 4154 | qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); |
d1c61909 AV |
4155 | for (i = 0; i < 4; i++) |
4156 | dcode[i] = be32_to_cpu(dcode[i]); | |
4157 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
4158 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
4159 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
4160 | dcode[3] == 0)) { | |
4161 | qla_printk(KERN_WARNING, ha, | |
4162 | "Unable to verify integrity of flash firmware image!\n"); | |
4163 | qla_printk(KERN_WARNING, ha, | |
4164 | "Firmware data: %08x %08x %08x %08x!\n", dcode[0], | |
4165 | dcode[1], dcode[2], dcode[3]); | |
4166 | ||
4167 | return QLA_FUNCTION_FAILED; | |
4168 | } | |
4169 | ||
4170 | while (segments && rval == QLA_SUCCESS) { | |
4171 | /* Read segment's load information. */ | |
e315cd28 | 4172 | qla24xx_read_flash_data(vha, dcode, faddr, 4); |
d1c61909 AV |
4173 | |
4174 | risc_addr = be32_to_cpu(dcode[2]); | |
4175 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
4176 | risc_size = be32_to_cpu(dcode[3]); | |
4177 | ||
4178 | fragment = 0; | |
4179 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4180 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
4181 | if (dlen > risc_size) | |
4182 | dlen = risc_size; | |
4183 | ||
4184 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
4185 | "addr %x, number of dwords 0x%x, offset 0x%x.\n", | |
e315cd28 | 4186 | vha->host_no, risc_addr, dlen, faddr)); |
d1c61909 | 4187 | |
e315cd28 | 4188 | qla24xx_read_flash_data(vha, dcode, faddr, dlen); |
d1c61909 AV |
4189 | for (i = 0; i < dlen; i++) |
4190 | dcode[i] = swab32(dcode[i]); | |
4191 | ||
73208dfd | 4192 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
d1c61909 AV |
4193 | dlen); |
4194 | if (rval) { | |
4195 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 4196 | "segment %d of firmware\n", vha->host_no, |
d1c61909 AV |
4197 | fragment)); |
4198 | qla_printk(KERN_WARNING, ha, | |
4199 | "[ERROR] Failed to load segment %d of " | |
4200 | "firmware\n", fragment); | |
4201 | break; | |
4202 | } | |
4203 | ||
4204 | faddr += dlen; | |
4205 | risc_addr += dlen; | |
4206 | risc_size -= dlen; | |
4207 | fragment++; | |
4208 | } | |
4209 | ||
4210 | /* Next segment. */ | |
4211 | segments--; | |
4212 | } | |
4213 | ||
4214 | return rval; | |
4215 | } | |
4216 | ||
d1c61909 AV |
4217 | #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/" |
4218 | ||
0107109e | 4219 | int |
e315cd28 | 4220 | qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) |
5433383e AV |
4221 | { |
4222 | int rval; | |
4223 | int i, fragment; | |
4224 | uint16_t *wcode, *fwcode; | |
4225 | uint32_t risc_addr, risc_size, fwclen, wlen, *seg; | |
4226 | struct fw_blob *blob; | |
e315cd28 | 4227 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4228 | struct req_que *req = ha->req_q_map[0]; |
5433383e AV |
4229 | |
4230 | /* Load firmware blob. */ | |
e315cd28 | 4231 | blob = qla2x00_request_firmware(vha); |
5433383e AV |
4232 | if (!blob) { |
4233 | qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n"); | |
d1c61909 AV |
4234 | qla_printk(KERN_ERR, ha, "Firmware images can be retrieved " |
4235 | "from: " QLA_FW_URL ".\n"); | |
5433383e AV |
4236 | return QLA_FUNCTION_FAILED; |
4237 | } | |
4238 | ||
4239 | rval = QLA_SUCCESS; | |
4240 | ||
73208dfd | 4241 | wcode = (uint16_t *)req->ring; |
5433383e AV |
4242 | *srisc_addr = 0; |
4243 | fwcode = (uint16_t *)blob->fw->data; | |
4244 | fwclen = 0; | |
4245 | ||
4246 | /* Validate firmware image by checking version. */ | |
4247 | if (blob->fw->size < 8 * sizeof(uint16_t)) { | |
4248 | qla_printk(KERN_WARNING, ha, | |
4249 | "Unable to verify integrity of firmware image (%Zd)!\n", | |
4250 | blob->fw->size); | |
4251 | goto fail_fw_integrity; | |
4252 | } | |
4253 | for (i = 0; i < 4; i++) | |
4254 | wcode[i] = be16_to_cpu(fwcode[i + 4]); | |
4255 | if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && | |
4256 | wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && | |
4257 | wcode[2] == 0 && wcode[3] == 0)) { | |
4258 | qla_printk(KERN_WARNING, ha, | |
4259 | "Unable to verify integrity of firmware image!\n"); | |
4260 | qla_printk(KERN_WARNING, ha, | |
4261 | "Firmware data: %04x %04x %04x %04x!\n", wcode[0], | |
4262 | wcode[1], wcode[2], wcode[3]); | |
4263 | goto fail_fw_integrity; | |
4264 | } | |
4265 | ||
4266 | seg = blob->segs; | |
4267 | while (*seg && rval == QLA_SUCCESS) { | |
4268 | risc_addr = *seg; | |
4269 | *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; | |
4270 | risc_size = be16_to_cpu(fwcode[3]); | |
4271 | ||
4272 | /* Validate firmware image size. */ | |
4273 | fwclen += risc_size * sizeof(uint16_t); | |
4274 | if (blob->fw->size < fwclen) { | |
4275 | qla_printk(KERN_WARNING, ha, | |
4276 | "Unable to verify integrity of firmware image " | |
4277 | "(%Zd)!\n", blob->fw->size); | |
4278 | goto fail_fw_integrity; | |
4279 | } | |
4280 | ||
4281 | fragment = 0; | |
4282 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4283 | wlen = (uint16_t)(ha->fw_transfer_size >> 1); | |
4284 | if (wlen > risc_size) | |
4285 | wlen = risc_size; | |
4286 | ||
4287 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
e315cd28 | 4288 | "addr %x, number of words 0x%x.\n", vha->host_no, |
5433383e AV |
4289 | risc_addr, wlen)); |
4290 | ||
4291 | for (i = 0; i < wlen; i++) | |
4292 | wcode[i] = swab16(fwcode[i]); | |
4293 | ||
73208dfd | 4294 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
5433383e AV |
4295 | wlen); |
4296 | if (rval) { | |
4297 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 4298 | "segment %d of firmware\n", vha->host_no, |
5433383e AV |
4299 | fragment)); |
4300 | qla_printk(KERN_WARNING, ha, | |
4301 | "[ERROR] Failed to load segment %d of " | |
4302 | "firmware\n", fragment); | |
4303 | break; | |
4304 | } | |
4305 | ||
4306 | fwcode += wlen; | |
4307 | risc_addr += wlen; | |
4308 | risc_size -= wlen; | |
4309 | fragment++; | |
4310 | } | |
4311 | ||
4312 | /* Next segment. */ | |
4313 | seg++; | |
4314 | } | |
4315 | return rval; | |
4316 | ||
4317 | fail_fw_integrity: | |
4318 | return QLA_FUNCTION_FAILED; | |
4319 | } | |
4320 | ||
eaac30be AV |
4321 | static int |
4322 | qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
0107109e AV |
4323 | { |
4324 | int rval; | |
4325 | int segments, fragment; | |
4326 | uint32_t *dcode, dlen; | |
4327 | uint32_t risc_addr; | |
4328 | uint32_t risc_size; | |
4329 | uint32_t i; | |
5433383e | 4330 | struct fw_blob *blob; |
0107109e | 4331 | uint32_t *fwcode, fwclen; |
e315cd28 | 4332 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4333 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 4334 | |
5433383e | 4335 | /* Load firmware blob. */ |
e315cd28 | 4336 | blob = qla2x00_request_firmware(vha); |
5433383e AV |
4337 | if (!blob) { |
4338 | qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n"); | |
d1c61909 AV |
4339 | qla_printk(KERN_ERR, ha, "Firmware images can be retrieved " |
4340 | "from: " QLA_FW_URL ".\n"); | |
4341 | ||
eaac30be | 4342 | return QLA_FUNCTION_FAILED; |
0107109e AV |
4343 | } |
4344 | ||
eaac30be AV |
4345 | qla_printk(KERN_INFO, ha, |
4346 | "FW: Loading via request-firmware...\n"); | |
4347 | ||
0107109e AV |
4348 | rval = QLA_SUCCESS; |
4349 | ||
4350 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 4351 | dcode = (uint32_t *)req->ring; |
0107109e | 4352 | *srisc_addr = 0; |
5433383e | 4353 | fwcode = (uint32_t *)blob->fw->data; |
0107109e AV |
4354 | fwclen = 0; |
4355 | ||
4356 | /* Validate firmware image by checking version. */ | |
5433383e | 4357 | if (blob->fw->size < 8 * sizeof(uint32_t)) { |
0107109e | 4358 | qla_printk(KERN_WARNING, ha, |
5433383e AV |
4359 | "Unable to verify integrity of firmware image (%Zd)!\n", |
4360 | blob->fw->size); | |
0107109e AV |
4361 | goto fail_fw_integrity; |
4362 | } | |
4363 | for (i = 0; i < 4; i++) | |
4364 | dcode[i] = be32_to_cpu(fwcode[i + 4]); | |
4365 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
4366 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
4367 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
4368 | dcode[3] == 0)) { | |
4369 | qla_printk(KERN_WARNING, ha, | |
5433383e | 4370 | "Unable to verify integrity of firmware image!\n"); |
0107109e AV |
4371 | qla_printk(KERN_WARNING, ha, |
4372 | "Firmware data: %08x %08x %08x %08x!\n", dcode[0], | |
4373 | dcode[1], dcode[2], dcode[3]); | |
4374 | goto fail_fw_integrity; | |
4375 | } | |
4376 | ||
4377 | while (segments && rval == QLA_SUCCESS) { | |
4378 | risc_addr = be32_to_cpu(fwcode[2]); | |
4379 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
4380 | risc_size = be32_to_cpu(fwcode[3]); | |
4381 | ||
4382 | /* Validate firmware image size. */ | |
4383 | fwclen += risc_size * sizeof(uint32_t); | |
5433383e | 4384 | if (blob->fw->size < fwclen) { |
0107109e | 4385 | qla_printk(KERN_WARNING, ha, |
5433383e AV |
4386 | "Unable to verify integrity of firmware image " |
4387 | "(%Zd)!\n", blob->fw->size); | |
4388 | ||
0107109e AV |
4389 | goto fail_fw_integrity; |
4390 | } | |
4391 | ||
4392 | fragment = 0; | |
4393 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4394 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
4395 | if (dlen > risc_size) | |
4396 | dlen = risc_size; | |
4397 | ||
4398 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
e315cd28 | 4399 | "addr %x, number of dwords 0x%x.\n", vha->host_no, |
0107109e AV |
4400 | risc_addr, dlen)); |
4401 | ||
4402 | for (i = 0; i < dlen; i++) | |
4403 | dcode[i] = swab32(fwcode[i]); | |
4404 | ||
73208dfd | 4405 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
590f98e5 | 4406 | dlen); |
0107109e AV |
4407 | if (rval) { |
4408 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 4409 | "segment %d of firmware\n", vha->host_no, |
0107109e AV |
4410 | fragment)); |
4411 | qla_printk(KERN_WARNING, ha, | |
4412 | "[ERROR] Failed to load segment %d of " | |
4413 | "firmware\n", fragment); | |
4414 | break; | |
4415 | } | |
4416 | ||
4417 | fwcode += dlen; | |
4418 | risc_addr += dlen; | |
4419 | risc_size -= dlen; | |
4420 | fragment++; | |
4421 | } | |
4422 | ||
4423 | /* Next segment. */ | |
4424 | segments--; | |
4425 | } | |
0107109e AV |
4426 | return rval; |
4427 | ||
4428 | fail_fw_integrity: | |
0107109e | 4429 | return QLA_FUNCTION_FAILED; |
0107109e | 4430 | } |
18c6c127 | 4431 | |
eaac30be AV |
4432 | int |
4433 | qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4434 | { | |
4435 | int rval; | |
4436 | ||
e337d907 AV |
4437 | if (ql2xfwloadbin == 1) |
4438 | return qla81xx_load_risc(vha, srisc_addr); | |
4439 | ||
eaac30be AV |
4440 | /* |
4441 | * FW Load priority: | |
4442 | * 1) Firmware via request-firmware interface (.bin file). | |
4443 | * 2) Firmware residing in flash. | |
4444 | */ | |
4445 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4446 | if (rval == QLA_SUCCESS) | |
4447 | return rval; | |
4448 | ||
cbc8eb67 AV |
4449 | return qla24xx_load_risc_flash(vha, srisc_addr, |
4450 | vha->hw->flt_region_fw); | |
eaac30be AV |
4451 | } |
4452 | ||
4453 | int | |
4454 | qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4455 | { | |
4456 | int rval; | |
cbc8eb67 | 4457 | struct qla_hw_data *ha = vha->hw; |
eaac30be | 4458 | |
e337d907 | 4459 | if (ql2xfwloadbin == 2) |
cbc8eb67 | 4460 | goto try_blob_fw; |
e337d907 | 4461 | |
eaac30be AV |
4462 | /* |
4463 | * FW Load priority: | |
4464 | * 1) Firmware residing in flash. | |
4465 | * 2) Firmware via request-firmware interface (.bin file). | |
cbc8eb67 | 4466 | * 3) Golden-Firmware residing in flash -- limited operation. |
eaac30be | 4467 | */ |
cbc8eb67 | 4468 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); |
eaac30be AV |
4469 | if (rval == QLA_SUCCESS) |
4470 | return rval; | |
4471 | ||
cbc8eb67 AV |
4472 | try_blob_fw: |
4473 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4474 | if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) | |
4475 | return rval; | |
4476 | ||
4477 | qla_printk(KERN_ERR, ha, | |
4478 | "FW: Attempting to fallback to golden firmware...\n"); | |
4479 | rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); | |
4480 | if (rval != QLA_SUCCESS) | |
4481 | return rval; | |
4482 | ||
4483 | qla_printk(KERN_ERR, ha, | |
4484 | "FW: Please update operational firmware...\n"); | |
4485 | ha->flags.running_gold_fw = 1; | |
4486 | ||
4487 | return rval; | |
eaac30be AV |
4488 | } |
4489 | ||
18c6c127 | 4490 | void |
e315cd28 | 4491 | qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) |
18c6c127 AV |
4492 | { |
4493 | int ret, retries; | |
e315cd28 | 4494 | struct qla_hw_data *ha = vha->hw; |
18c6c127 | 4495 | |
85880801 AV |
4496 | if (ha->flags.pci_channel_io_perm_failure) |
4497 | return; | |
e428924c | 4498 | if (!IS_FWI2_CAPABLE(ha)) |
18c6c127 | 4499 | return; |
75edf81d AV |
4500 | if (!ha->fw_major_version) |
4501 | return; | |
18c6c127 | 4502 | |
e315cd28 | 4503 | ret = qla2x00_stop_firmware(vha); |
7c7f1f29 | 4504 | for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && |
b469a7cb | 4505 | ret != QLA_INVALID_COMMAND && retries ; retries--) { |
e315cd28 AC |
4506 | ha->isp_ops->reset_chip(vha); |
4507 | if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) | |
18c6c127 | 4508 | continue; |
e315cd28 | 4509 | if (qla2x00_setup_chip(vha) != QLA_SUCCESS) |
18c6c127 AV |
4510 | continue; |
4511 | qla_printk(KERN_INFO, ha, | |
4512 | "Attempting retry of stop-firmware command...\n"); | |
e315cd28 | 4513 | ret = qla2x00_stop_firmware(vha); |
18c6c127 AV |
4514 | } |
4515 | } | |
2c3dfe3f SJ |
4516 | |
4517 | int | |
e315cd28 | 4518 | qla24xx_configure_vhba(scsi_qla_host_t *vha) |
2c3dfe3f SJ |
4519 | { |
4520 | int rval = QLA_SUCCESS; | |
4521 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
e315cd28 AC |
4522 | struct qla_hw_data *ha = vha->hw; |
4523 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
67c2e93a AC |
4524 | struct req_que *req; |
4525 | struct rsp_que *rsp; | |
2c3dfe3f | 4526 | |
e315cd28 | 4527 | if (!vha->vp_idx) |
2c3dfe3f SJ |
4528 | return -EINVAL; |
4529 | ||
e315cd28 | 4530 | rval = qla2x00_fw_ready(base_vha); |
7163ea81 | 4531 | if (ha->flags.cpu_affinity_enabled) |
67c2e93a AC |
4532 | req = ha->req_q_map[0]; |
4533 | else | |
4534 | req = vha->req; | |
4535 | rsp = req->rsp; | |
4536 | ||
2c3dfe3f | 4537 | if (rval == QLA_SUCCESS) { |
e315cd28 | 4538 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
73208dfd | 4539 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
2c3dfe3f SJ |
4540 | } |
4541 | ||
e315cd28 | 4542 | vha->flags.management_server_logged_in = 0; |
2c3dfe3f SJ |
4543 | |
4544 | /* Login to SNS first */ | |
e315cd28 | 4545 | ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1); |
2c3dfe3f SJ |
4546 | if (mb[0] != MBS_COMMAND_COMPLETE) { |
4547 | DEBUG15(qla_printk(KERN_INFO, ha, | |
4548 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " | |
4549 | "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS, | |
4550 | mb[0], mb[1], mb[2], mb[6], mb[7])); | |
4551 | return (QLA_FUNCTION_FAILED); | |
4552 | } | |
4553 | ||
e315cd28 AC |
4554 | atomic_set(&vha->loop_down_timer, 0); |
4555 | atomic_set(&vha->loop_state, LOOP_UP); | |
4556 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
4557 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
4558 | rval = qla2x00_loop_resync(base_vha); | |
2c3dfe3f SJ |
4559 | |
4560 | return rval; | |
4561 | } | |
4d4df193 HK |
4562 | |
4563 | /* 84XX Support **************************************************************/ | |
4564 | ||
4565 | static LIST_HEAD(qla_cs84xx_list); | |
4566 | static DEFINE_MUTEX(qla_cs84xx_mutex); | |
4567 | ||
4568 | static struct qla_chip_state_84xx * | |
e315cd28 | 4569 | qla84xx_get_chip(struct scsi_qla_host *vha) |
4d4df193 HK |
4570 | { |
4571 | struct qla_chip_state_84xx *cs84xx; | |
e315cd28 | 4572 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4573 | |
4574 | mutex_lock(&qla_cs84xx_mutex); | |
4575 | ||
4576 | /* Find any shared 84xx chip. */ | |
4577 | list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { | |
4578 | if (cs84xx->bus == ha->pdev->bus) { | |
4579 | kref_get(&cs84xx->kref); | |
4580 | goto done; | |
4581 | } | |
4582 | } | |
4583 | ||
4584 | cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); | |
4585 | if (!cs84xx) | |
4586 | goto done; | |
4587 | ||
4588 | kref_init(&cs84xx->kref); | |
4589 | spin_lock_init(&cs84xx->access_lock); | |
4590 | mutex_init(&cs84xx->fw_update_mutex); | |
4591 | cs84xx->bus = ha->pdev->bus; | |
4592 | ||
4593 | list_add_tail(&cs84xx->list, &qla_cs84xx_list); | |
4594 | done: | |
4595 | mutex_unlock(&qla_cs84xx_mutex); | |
4596 | return cs84xx; | |
4597 | } | |
4598 | ||
4599 | static void | |
4600 | __qla84xx_chip_release(struct kref *kref) | |
4601 | { | |
4602 | struct qla_chip_state_84xx *cs84xx = | |
4603 | container_of(kref, struct qla_chip_state_84xx, kref); | |
4604 | ||
4605 | mutex_lock(&qla_cs84xx_mutex); | |
4606 | list_del(&cs84xx->list); | |
4607 | mutex_unlock(&qla_cs84xx_mutex); | |
4608 | kfree(cs84xx); | |
4609 | } | |
4610 | ||
4611 | void | |
e315cd28 | 4612 | qla84xx_put_chip(struct scsi_qla_host *vha) |
4d4df193 | 4613 | { |
e315cd28 | 4614 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4615 | if (ha->cs84xx) |
4616 | kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); | |
4617 | } | |
4618 | ||
4619 | static int | |
e315cd28 | 4620 | qla84xx_init_chip(scsi_qla_host_t *vha) |
4d4df193 HK |
4621 | { |
4622 | int rval; | |
4623 | uint16_t status[2]; | |
e315cd28 | 4624 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4625 | |
4626 | mutex_lock(&ha->cs84xx->fw_update_mutex); | |
4627 | ||
e315cd28 | 4628 | rval = qla84xx_verify_chip(vha, status); |
4d4df193 HK |
4629 | |
4630 | mutex_unlock(&ha->cs84xx->fw_update_mutex); | |
4631 | ||
4632 | return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: | |
4633 | QLA_SUCCESS; | |
4634 | } | |
3a03eb79 AV |
4635 | |
4636 | /* 81XX Support **************************************************************/ | |
4637 | ||
4638 | int | |
4639 | qla81xx_nvram_config(scsi_qla_host_t *vha) | |
4640 | { | |
4641 | int rval; | |
4642 | struct init_cb_81xx *icb; | |
4643 | struct nvram_81xx *nv; | |
4644 | uint32_t *dptr; | |
4645 | uint8_t *dptr1, *dptr2; | |
4646 | uint32_t chksum; | |
4647 | uint16_t cnt; | |
4648 | struct qla_hw_data *ha = vha->hw; | |
4649 | ||
4650 | rval = QLA_SUCCESS; | |
4651 | icb = (struct init_cb_81xx *)ha->init_cb; | |
4652 | nv = ha->nvram; | |
4653 | ||
4654 | /* Determine NVRAM starting address. */ | |
4655 | ha->nvram_size = sizeof(struct nvram_81xx); | |
3a03eb79 | 4656 | ha->vpd_size = FA_NVRAM_VPD_SIZE; |
3a03eb79 AV |
4657 | |
4658 | /* Get VPD data into cache */ | |
4659 | ha->vpd = ha->nvram + VPD_OFFSET; | |
3d79038f AV |
4660 | ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, |
4661 | ha->vpd_size); | |
3a03eb79 AV |
4662 | |
4663 | /* Get NVRAM data into cache and calculate checksum. */ | |
3d79038f | 4664 | ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, |
3a03eb79 | 4665 | ha->nvram_size); |
3d79038f | 4666 | dptr = (uint32_t *)nv; |
3a03eb79 AV |
4667 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) |
4668 | chksum += le32_to_cpu(*dptr++); | |
4669 | ||
7640335e | 4670 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no)); |
3a03eb79 AV |
4671 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
4672 | ||
4673 | /* Bad NVRAM data, set defaults parameters. */ | |
4674 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
4675 | || nv->id[3] != ' ' || | |
4676 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
4677 | /* Reset NVRAM data. */ | |
4678 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
4679 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
4680 | le16_to_cpu(nv->nvram_version)); | |
4681 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " | |
4682 | "invalid -- WWPN) defaults.\n"); | |
4683 | ||
4684 | /* | |
4685 | * Set default initialization control block. | |
4686 | */ | |
4687 | memset(nv, 0, ha->nvram_size); | |
4688 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
4689 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
4690 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
4691 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
4692 | nv->exchange_count = __constant_cpu_to_le16(0); | |
4693 | nv->port_name[0] = 0x21; | |
e5b68a61 | 4694 | nv->port_name[1] = 0x00 + ha->port_no; |
3a03eb79 AV |
4695 | nv->port_name[2] = 0x00; |
4696 | nv->port_name[3] = 0xe0; | |
4697 | nv->port_name[4] = 0x8b; | |
4698 | nv->port_name[5] = 0x1c; | |
4699 | nv->port_name[6] = 0x55; | |
4700 | nv->port_name[7] = 0x86; | |
4701 | nv->node_name[0] = 0x20; | |
4702 | nv->node_name[1] = 0x00; | |
4703 | nv->node_name[2] = 0x00; | |
4704 | nv->node_name[3] = 0xe0; | |
4705 | nv->node_name[4] = 0x8b; | |
4706 | nv->node_name[5] = 0x1c; | |
4707 | nv->node_name[6] = 0x55; | |
4708 | nv->node_name[7] = 0x86; | |
4709 | nv->login_retry_count = __constant_cpu_to_le16(8); | |
4710 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
4711 | nv->login_timeout = __constant_cpu_to_le16(0); | |
4712 | nv->firmware_options_1 = | |
4713 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
4714 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
4715 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
4716 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
4717 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
4718 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
4719 | nv->reset_delay = 5; | |
4720 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
4721 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
4722 | nv->link_down_timeout = __constant_cpu_to_le16(30); | |
eeebcc92 | 4723 | nv->enode_mac[0] = 0x00; |
3a03eb79 AV |
4724 | nv->enode_mac[1] = 0x02; |
4725 | nv->enode_mac[2] = 0x03; | |
4726 | nv->enode_mac[3] = 0x04; | |
4727 | nv->enode_mac[4] = 0x05; | |
e5b68a61 | 4728 | nv->enode_mac[5] = 0x06 + ha->port_no; |
3a03eb79 AV |
4729 | |
4730 | rval = 1; | |
4731 | } | |
4732 | ||
4733 | /* Reset Initialization control block */ | |
4734 | memset(icb, 0, sizeof(struct init_cb_81xx)); | |
4735 | ||
4736 | /* Copy 1st segment. */ | |
4737 | dptr1 = (uint8_t *)icb; | |
4738 | dptr2 = (uint8_t *)&nv->version; | |
4739 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
4740 | while (cnt--) | |
4741 | *dptr1++ = *dptr2++; | |
4742 | ||
4743 | icb->login_retry_count = nv->login_retry_count; | |
4744 | ||
4745 | /* Copy 2nd segment. */ | |
4746 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
4747 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
4748 | cnt = (uint8_t *)&icb->reserved_5 - | |
4749 | (uint8_t *)&icb->interrupt_delay_timer; | |
4750 | while (cnt--) | |
4751 | *dptr1++ = *dptr2++; | |
4752 | ||
4753 | memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); | |
4754 | /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ | |
4755 | if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { | |
4756 | icb->enode_mac[0] = 0x01; | |
4757 | icb->enode_mac[1] = 0x02; | |
4758 | icb->enode_mac[2] = 0x03; | |
4759 | icb->enode_mac[3] = 0x04; | |
4760 | icb->enode_mac[4] = 0x05; | |
e5b68a61 | 4761 | icb->enode_mac[5] = 0x06 + ha->port_no; |
3a03eb79 AV |
4762 | } |
4763 | ||
b64b0e8f AV |
4764 | /* Use extended-initialization control block. */ |
4765 | memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); | |
4766 | ||
3a03eb79 AV |
4767 | /* |
4768 | * Setup driver NVRAM options. | |
4769 | */ | |
4770 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), | |
4771 | "QLE81XX"); | |
4772 | ||
4773 | /* Use alternate WWN? */ | |
4774 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
4775 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
4776 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
4777 | } | |
4778 | ||
4779 | /* Prepare nodename */ | |
4780 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { | |
4781 | /* | |
4782 | * Firmware will apply the following mask if the nodename was | |
4783 | * not provided. | |
4784 | */ | |
4785 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
4786 | icb->node_name[0] &= 0xF0; | |
4787 | } | |
4788 | ||
4789 | /* Set host adapter parameters. */ | |
4790 | ha->flags.disable_risc_code_load = 0; | |
4791 | ha->flags.enable_lip_reset = 0; | |
4792 | ha->flags.enable_lip_full_login = | |
4793 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
4794 | ha->flags.enable_target_reset = | |
4795 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
4796 | ha->flags.enable_led_scheme = 0; | |
4797 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; | |
4798 | ||
4799 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & | |
4800 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
4801 | ||
4802 | /* save HBA serial number */ | |
4803 | ha->serial0 = icb->port_name[5]; | |
4804 | ha->serial1 = icb->port_name[6]; | |
4805 | ha->serial2 = icb->port_name[7]; | |
4806 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); | |
4807 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
4808 | ||
4809 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
4810 | ||
4811 | ha->retry_count = le16_to_cpu(nv->login_retry_count); | |
4812 | ||
4813 | /* Set minimum login_timeout to 4 seconds. */ | |
4814 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
4815 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
4816 | if (le16_to_cpu(nv->login_timeout) < 4) | |
4817 | nv->login_timeout = __constant_cpu_to_le16(4); | |
4818 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
4819 | icb->login_timeout = nv->login_timeout; | |
4820 | ||
4821 | /* Set minimum RATOV to 100 tenths of a second. */ | |
4822 | ha->r_a_tov = 100; | |
4823 | ||
4824 | ha->loop_reset_delay = nv->reset_delay; | |
4825 | ||
4826 | /* Link Down Timeout = 0: | |
4827 | * | |
4828 | * When Port Down timer expires we will start returning | |
4829 | * I/O's to OS with "DID_NO_CONNECT". | |
4830 | * | |
4831 | * Link Down Timeout != 0: | |
4832 | * | |
4833 | * The driver waits for the link to come up after link down | |
4834 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
4835 | */ | |
4836 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
4837 | ha->loop_down_abort_time = | |
4838 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
4839 | } else { | |
4840 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
4841 | ha->loop_down_abort_time = | |
4842 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
4843 | } | |
4844 | ||
4845 | /* Need enough time to try and get the port back. */ | |
4846 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
4847 | if (qlport_down_retry) | |
4848 | ha->port_down_retry_count = qlport_down_retry; | |
4849 | ||
4850 | /* Set login_retry_count */ | |
4851 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
4852 | if (ha->port_down_retry_count == | |
4853 | le16_to_cpu(nv->port_down_retry_count) && | |
4854 | ha->port_down_retry_count > 3) | |
4855 | ha->login_retry_count = ha->port_down_retry_count; | |
4856 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
4857 | ha->login_retry_count = ha->port_down_retry_count; | |
4858 | if (ql2xloginretrycount) | |
4859 | ha->login_retry_count = ql2xloginretrycount; | |
4860 | ||
4861 | /* Enable ZIO. */ | |
4862 | if (!vha->flags.init_done) { | |
4863 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & | |
4864 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
4865 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
4866 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
4867 | } | |
4868 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
4869 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
4870 | vha->flags.process_response_queue = 0; | |
4871 | if (ha->zio_mode != QLA_ZIO_DISABLED) { | |
4872 | ha->zio_mode = QLA_ZIO_MODE_6; | |
4873 | ||
4874 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay " | |
4875 | "(%d us).\n", vha->host_no, ha->zio_mode, | |
4876 | ha->zio_timer * 100)); | |
4877 | qla_printk(KERN_INFO, ha, | |
4878 | "ZIO mode %d enabled; timer delay (%d us).\n", | |
4879 | ha->zio_mode, ha->zio_timer * 100); | |
4880 | ||
4881 | icb->firmware_options_2 |= cpu_to_le32( | |
4882 | (uint32_t)ha->zio_mode); | |
4883 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
4884 | vha->flags.process_response_queue = 1; | |
4885 | } | |
4886 | ||
4887 | if (rval) { | |
4888 | DEBUG2_3(printk(KERN_WARNING | |
4889 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); | |
4890 | } | |
4891 | return (rval); | |
4892 | } | |
4893 | ||
4894 | void | |
ae97c91e | 4895 | qla81xx_update_fw_options(scsi_qla_host_t *vha) |
3a03eb79 | 4896 | { |
ae97c91e AV |
4897 | struct qla_hw_data *ha = vha->hw; |
4898 | ||
4899 | if (!ql2xetsenable) | |
4900 | return; | |
4901 | ||
4902 | /* Enable ETS Burst. */ | |
4903 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
4904 | ha->fw_options[2] |= BIT_9; | |
4905 | qla2x00_set_fw_options(vha, ha->fw_options); | |
3a03eb79 | 4906 | } |