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Commit | Line | Data |
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1da177e4 | 1 | /* |
fa90c54f | 2 | * QLogic Fibre Channel HBA Driver |
1e63395c | 3 | * Copyright (c) 2003-2013 QLogic Corporation |
1da177e4 | 4 | * |
fa90c54f | 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
1da177e4 LT |
6 | */ |
7 | #include "qla_def.h" | |
2d70c103 | 8 | #include "qla_target.h" |
1da177e4 | 9 | |
05236a05 | 10 | #include <linux/delay.h> |
5a0e3ad6 | 11 | #include <linux/slab.h> |
df7baa50 | 12 | #include <scsi/scsi_tcq.h> |
9a069e19 | 13 | #include <scsi/scsi_bsg_fc.h> |
bad75002 | 14 | #include <scsi/scsi_eh.h> |
df7baa50 | 15 | |
1da177e4 | 16 | static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t); |
73208dfd | 17 | static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *); |
2afa19a9 | 18 | static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *); |
73208dfd AC |
19 | static void qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *, |
20 | sts_entry_t *); | |
9a853f71 | 21 | |
1da177e4 LT |
22 | /** |
23 | * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200. | |
24 | * @irq: | |
25 | * @dev_id: SCSI driver HA context | |
1da177e4 LT |
26 | * |
27 | * Called by system whenever the host adapter generates an interrupt. | |
28 | * | |
29 | * Returns handled flag. | |
30 | */ | |
31 | irqreturn_t | |
7d12e780 | 32 | qla2100_intr_handler(int irq, void *dev_id) |
1da177e4 | 33 | { |
e315cd28 AC |
34 | scsi_qla_host_t *vha; |
35 | struct qla_hw_data *ha; | |
3d71644c | 36 | struct device_reg_2xxx __iomem *reg; |
1da177e4 | 37 | int status; |
1da177e4 | 38 | unsigned long iter; |
14e660e6 | 39 | uint16_t hccr; |
9a853f71 | 40 | uint16_t mb[4]; |
e315cd28 | 41 | struct rsp_que *rsp; |
43fac4d9 | 42 | unsigned long flags; |
1da177e4 | 43 | |
e315cd28 AC |
44 | rsp = (struct rsp_que *) dev_id; |
45 | if (!rsp) { | |
3256b435 CD |
46 | ql_log(ql_log_info, NULL, 0x505d, |
47 | "%s: NULL response queue pointer.\n", __func__); | |
1da177e4 LT |
48 | return (IRQ_NONE); |
49 | } | |
50 | ||
e315cd28 | 51 | ha = rsp->hw; |
3d71644c | 52 | reg = &ha->iobase->isp; |
1da177e4 LT |
53 | status = 0; |
54 | ||
43fac4d9 | 55 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2afa19a9 | 56 | vha = pci_get_drvdata(ha->pdev); |
1da177e4 | 57 | for (iter = 50; iter--; ) { |
14e660e6 | 58 | hccr = RD_REG_WORD(®->hccr); |
f3ddac19 CD |
59 | /* Check for PCI disconnection */ |
60 | if (hccr == 0xffff) { | |
61 | /* | |
62 | * Schedule this on the default system workqueue so that | |
63 | * all the adapter workqueues and the DPC thread can be | |
64 | * shutdown cleanly. | |
65 | */ | |
66 | schedule_work(&ha->board_disable); | |
67 | break; | |
68 | } | |
14e660e6 SJ |
69 | if (hccr & HCCR_RISC_PAUSE) { |
70 | if (pci_channel_offline(ha->pdev)) | |
71 | break; | |
72 | ||
73 | /* | |
74 | * Issue a "HARD" reset in order for the RISC interrupt | |
a06a0f8e | 75 | * bit to be cleared. Schedule a big hammer to get |
14e660e6 SJ |
76 | * out of the RISC PAUSED state. |
77 | */ | |
78 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
79 | RD_REG_WORD(®->hccr); | |
80 | ||
e315cd28 AC |
81 | ha->isp_ops->fw_dump(vha, 1); |
82 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
14e660e6 SJ |
83 | break; |
84 | } else if ((RD_REG_WORD(®->istatus) & ISR_RISC_INT) == 0) | |
1da177e4 LT |
85 | break; |
86 | ||
87 | if (RD_REG_WORD(®->semaphore) & BIT_0) { | |
88 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
89 | RD_REG_WORD(®->hccr); | |
90 | ||
91 | /* Get mailbox data. */ | |
9a853f71 AV |
92 | mb[0] = RD_MAILBOX_REG(ha, reg, 0); |
93 | if (mb[0] > 0x3fff && mb[0] < 0x8000) { | |
e315cd28 | 94 | qla2x00_mbx_completion(vha, mb[0]); |
1da177e4 | 95 | status |= MBX_INTERRUPT; |
9a853f71 AV |
96 | } else if (mb[0] > 0x7fff && mb[0] < 0xc000) { |
97 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
98 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
99 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
73208dfd | 100 | qla2x00_async_event(vha, rsp, mb); |
1da177e4 LT |
101 | } else { |
102 | /*EMPTY*/ | |
7c3df132 SK |
103 | ql_dbg(ql_dbg_async, vha, 0x5025, |
104 | "Unrecognized interrupt type (%d).\n", | |
105 | mb[0]); | |
1da177e4 LT |
106 | } |
107 | /* Release mailbox registers. */ | |
108 | WRT_REG_WORD(®->semaphore, 0); | |
109 | RD_REG_WORD(®->semaphore); | |
110 | } else { | |
73208dfd | 111 | qla2x00_process_response_queue(rsp); |
1da177e4 LT |
112 | |
113 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
114 | RD_REG_WORD(®->hccr); | |
115 | } | |
116 | } | |
36439832 | 117 | qla2x00_handle_mbx_completion(ha, status); |
43fac4d9 | 118 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
1da177e4 | 119 | |
1da177e4 LT |
120 | return (IRQ_HANDLED); |
121 | } | |
122 | ||
f3ddac19 CD |
123 | bool |
124 | qla2x00_check_reg_for_disconnect(scsi_qla_host_t *vha, uint32_t reg) | |
125 | { | |
126 | /* Check for PCI disconnection */ | |
127 | if (reg == 0xffffffff) { | |
128 | /* | |
129 | * Schedule this on the default system workqueue so that all the | |
130 | * adapter workqueues and the DPC thread can be shutdown | |
131 | * cleanly. | |
132 | */ | |
133 | schedule_work(&vha->hw->board_disable); | |
134 | return true; | |
135 | } else | |
136 | return false; | |
137 | } | |
138 | ||
1da177e4 LT |
139 | /** |
140 | * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx. | |
141 | * @irq: | |
142 | * @dev_id: SCSI driver HA context | |
1da177e4 LT |
143 | * |
144 | * Called by system whenever the host adapter generates an interrupt. | |
145 | * | |
146 | * Returns handled flag. | |
147 | */ | |
148 | irqreturn_t | |
7d12e780 | 149 | qla2300_intr_handler(int irq, void *dev_id) |
1da177e4 | 150 | { |
e315cd28 | 151 | scsi_qla_host_t *vha; |
3d71644c | 152 | struct device_reg_2xxx __iomem *reg; |
1da177e4 | 153 | int status; |
1da177e4 LT |
154 | unsigned long iter; |
155 | uint32_t stat; | |
1da177e4 | 156 | uint16_t hccr; |
9a853f71 | 157 | uint16_t mb[4]; |
e315cd28 AC |
158 | struct rsp_que *rsp; |
159 | struct qla_hw_data *ha; | |
43fac4d9 | 160 | unsigned long flags; |
1da177e4 | 161 | |
e315cd28 AC |
162 | rsp = (struct rsp_que *) dev_id; |
163 | if (!rsp) { | |
3256b435 CD |
164 | ql_log(ql_log_info, NULL, 0x5058, |
165 | "%s: NULL response queue pointer.\n", __func__); | |
1da177e4 LT |
166 | return (IRQ_NONE); |
167 | } | |
168 | ||
e315cd28 | 169 | ha = rsp->hw; |
3d71644c | 170 | reg = &ha->iobase->isp; |
1da177e4 LT |
171 | status = 0; |
172 | ||
43fac4d9 | 173 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2afa19a9 | 174 | vha = pci_get_drvdata(ha->pdev); |
1da177e4 LT |
175 | for (iter = 50; iter--; ) { |
176 | stat = RD_REG_DWORD(®->u.isp2300.host_status); | |
f3ddac19 CD |
177 | if (qla2x00_check_reg_for_disconnect(vha, stat)) |
178 | break; | |
1da177e4 | 179 | if (stat & HSR_RISC_PAUSED) { |
85880801 | 180 | if (unlikely(pci_channel_offline(ha->pdev))) |
14e660e6 SJ |
181 | break; |
182 | ||
1da177e4 | 183 | hccr = RD_REG_WORD(®->hccr); |
f3ddac19 | 184 | |
1da177e4 | 185 | if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8)) |
7c3df132 SK |
186 | ql_log(ql_log_warn, vha, 0x5026, |
187 | "Parity error -- HCCR=%x, Dumping " | |
188 | "firmware.\n", hccr); | |
1da177e4 | 189 | else |
7c3df132 SK |
190 | ql_log(ql_log_warn, vha, 0x5027, |
191 | "RISC paused -- HCCR=%x, Dumping " | |
192 | "firmware.\n", hccr); | |
1da177e4 LT |
193 | |
194 | /* | |
195 | * Issue a "HARD" reset in order for the RISC | |
196 | * interrupt bit to be cleared. Schedule a big | |
a06a0f8e | 197 | * hammer to get out of the RISC PAUSED state. |
1da177e4 LT |
198 | */ |
199 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
200 | RD_REG_WORD(®->hccr); | |
07f31805 | 201 | |
e315cd28 AC |
202 | ha->isp_ops->fw_dump(vha, 1); |
203 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
204 | break; |
205 | } else if ((stat & HSR_RISC_INT) == 0) | |
206 | break; | |
207 | ||
1da177e4 | 208 | switch (stat & 0xff) { |
1da177e4 LT |
209 | case 0x1: |
210 | case 0x2: | |
211 | case 0x10: | |
212 | case 0x11: | |
e315cd28 | 213 | qla2x00_mbx_completion(vha, MSW(stat)); |
1da177e4 LT |
214 | status |= MBX_INTERRUPT; |
215 | ||
216 | /* Release mailbox registers. */ | |
217 | WRT_REG_WORD(®->semaphore, 0); | |
218 | break; | |
219 | case 0x12: | |
9a853f71 AV |
220 | mb[0] = MSW(stat); |
221 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
222 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
223 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
73208dfd | 224 | qla2x00_async_event(vha, rsp, mb); |
9a853f71 AV |
225 | break; |
226 | case 0x13: | |
73208dfd | 227 | qla2x00_process_response_queue(rsp); |
1da177e4 LT |
228 | break; |
229 | case 0x15: | |
9a853f71 AV |
230 | mb[0] = MBA_CMPLT_1_16BIT; |
231 | mb[1] = MSW(stat); | |
73208dfd | 232 | qla2x00_async_event(vha, rsp, mb); |
1da177e4 LT |
233 | break; |
234 | case 0x16: | |
9a853f71 AV |
235 | mb[0] = MBA_SCSI_COMPLETION; |
236 | mb[1] = MSW(stat); | |
237 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
73208dfd | 238 | qla2x00_async_event(vha, rsp, mb); |
1da177e4 LT |
239 | break; |
240 | default: | |
7c3df132 SK |
241 | ql_dbg(ql_dbg_async, vha, 0x5028, |
242 | "Unrecognized interrupt type (%d).\n", stat & 0xff); | |
1da177e4 LT |
243 | break; |
244 | } | |
245 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
246 | RD_REG_WORD_RELAXED(®->hccr); | |
247 | } | |
36439832 | 248 | qla2x00_handle_mbx_completion(ha, status); |
43fac4d9 | 249 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
1da177e4 | 250 | |
1da177e4 LT |
251 | return (IRQ_HANDLED); |
252 | } | |
253 | ||
254 | /** | |
255 | * qla2x00_mbx_completion() - Process mailbox command completions. | |
256 | * @ha: SCSI driver HA context | |
257 | * @mb0: Mailbox0 register | |
258 | */ | |
259 | static void | |
e315cd28 | 260 | qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0) |
1da177e4 LT |
261 | { |
262 | uint16_t cnt; | |
4fa94f83 | 263 | uint32_t mboxes; |
1da177e4 | 264 | uint16_t __iomem *wptr; |
e315cd28 | 265 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 266 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 267 | |
4fa94f83 AV |
268 | /* Read all mbox registers? */ |
269 | mboxes = (1 << ha->mbx_count) - 1; | |
270 | if (!ha->mcp) | |
a720101d | 271 | ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n"); |
4fa94f83 AV |
272 | else |
273 | mboxes = ha->mcp->in_mb; | |
274 | ||
1da177e4 LT |
275 | /* Load return mailbox registers. */ |
276 | ha->flags.mbox_int = 1; | |
277 | ha->mailbox_out[0] = mb0; | |
4fa94f83 | 278 | mboxes >>= 1; |
1da177e4 LT |
279 | wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1); |
280 | ||
281 | for (cnt = 1; cnt < ha->mbx_count; cnt++) { | |
fa2a1ce5 | 282 | if (IS_QLA2200(ha) && cnt == 8) |
1da177e4 | 283 | wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8); |
4fa94f83 | 284 | if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0)) |
1da177e4 | 285 | ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr); |
4fa94f83 | 286 | else if (mboxes & BIT_0) |
1da177e4 | 287 | ha->mailbox_out[cnt] = RD_REG_WORD(wptr); |
fa2a1ce5 | 288 | |
1da177e4 | 289 | wptr++; |
4fa94f83 | 290 | mboxes >>= 1; |
1da177e4 | 291 | } |
1da177e4 LT |
292 | } |
293 | ||
8a659571 AV |
294 | static void |
295 | qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr) | |
296 | { | |
297 | static char *event[] = | |
298 | { "Complete", "Request Notification", "Time Extension" }; | |
299 | int rval; | |
300 | struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24; | |
9e5054ec | 301 | struct device_reg_82xx __iomem *reg82 = &vha->hw->iobase->isp82; |
8a659571 AV |
302 | uint16_t __iomem *wptr; |
303 | uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS]; | |
304 | ||
305 | /* Seed data -- mailbox1 -> mailbox7. */ | |
9e5054ec CD |
306 | if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw)) |
307 | wptr = (uint16_t __iomem *)®24->mailbox1; | |
308 | else if (IS_QLA8044(vha->hw)) | |
309 | wptr = (uint16_t __iomem *)®82->mailbox_out[1]; | |
310 | else | |
311 | return; | |
312 | ||
8a659571 AV |
313 | for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++) |
314 | mb[cnt] = RD_REG_WORD(wptr); | |
315 | ||
7c3df132 | 316 | ql_dbg(ql_dbg_async, vha, 0x5021, |
6246b8a1 | 317 | "Inter-Driver Communication %s -- " |
7c3df132 SK |
318 | "%04x %04x %04x %04x %04x %04x %04x.\n", |
319 | event[aen & 0xff], mb[0], mb[1], mb[2], mb[3], | |
320 | mb[4], mb[5], mb[6]); | |
454073c9 SV |
321 | switch (aen) { |
322 | /* Handle IDC Error completion case. */ | |
323 | case MBA_IDC_COMPLETE: | |
324 | if (mb[1] >> 15) { | |
325 | vha->hw->flags.idc_compl_status = 1; | |
9aaf2cea | 326 | if (vha->hw->notify_dcbx_comp && !vha->vp_idx) |
454073c9 SV |
327 | complete(&vha->hw->dcbx_comp); |
328 | } | |
329 | break; | |
330 | ||
331 | case MBA_IDC_NOTIFY: | |
332 | /* Acknowledgement needed? [Notify && non-zero timeout]. */ | |
333 | timeout = (descr >> 8) & 0xf; | |
334 | ql_dbg(ql_dbg_async, vha, 0x5022, | |
335 | "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n", | |
336 | vha->host_no, event[aen & 0xff], timeout); | |
337 | ||
338 | if (!timeout) | |
339 | return; | |
340 | rval = qla2x00_post_idc_ack_work(vha, mb); | |
341 | if (rval != QLA_SUCCESS) | |
342 | ql_log(ql_log_warn, vha, 0x5023, | |
343 | "IDC failed to post ACK.\n"); | |
344 | break; | |
345 | case MBA_IDC_TIME_EXT: | |
346 | vha->hw->idc_extend_tmo = descr; | |
347 | ql_dbg(ql_dbg_async, vha, 0x5087, | |
348 | "%lu Inter-Driver Communication %s -- " | |
349 | "Extend timeout by=%d.\n", | |
350 | vha->host_no, event[aen & 0xff], vha->hw->idc_extend_tmo); | |
351 | break; | |
bf5b8ad7 | 352 | } |
8a659571 AV |
353 | } |
354 | ||
daae62a3 | 355 | #define LS_UNKNOWN 2 |
d0297c9a JC |
356 | const char * |
357 | qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed) | |
daae62a3 | 358 | { |
d0297c9a JC |
359 | static const char * const link_speeds[] = { |
360 | "1", "2", "?", "4", "8", "16", "10" | |
361 | }; | |
daae62a3 CD |
362 | |
363 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) | |
d0297c9a JC |
364 | return link_speeds[0]; |
365 | else if (speed == 0x13) | |
366 | return link_speeds[6]; | |
367 | else if (speed < 6) | |
368 | return link_speeds[speed]; | |
369 | else | |
370 | return link_speeds[LS_UNKNOWN]; | |
daae62a3 CD |
371 | } |
372 | ||
fa492630 | 373 | static void |
7d613ac6 SV |
374 | qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb) |
375 | { | |
376 | struct qla_hw_data *ha = vha->hw; | |
377 | ||
378 | /* | |
379 | * 8200 AEN Interpretation: | |
380 | * mb[0] = AEN code | |
381 | * mb[1] = AEN Reason code | |
382 | * mb[2] = LSW of Peg-Halt Status-1 Register | |
383 | * mb[6] = MSW of Peg-Halt Status-1 Register | |
384 | * mb[3] = LSW of Peg-Halt Status-2 register | |
385 | * mb[7] = MSW of Peg-Halt Status-2 register | |
386 | * mb[4] = IDC Device-State Register value | |
387 | * mb[5] = IDC Driver-Presence Register value | |
388 | */ | |
389 | ql_dbg(ql_dbg_async, vha, 0x506b, "AEN Code: mb[0] = 0x%x AEN reason: " | |
390 | "mb[1] = 0x%x PH-status1: mb[2] = 0x%x PH-status1: mb[6] = 0x%x.\n", | |
391 | mb[0], mb[1], mb[2], mb[6]); | |
392 | ql_dbg(ql_dbg_async, vha, 0x506c, "PH-status2: mb[3] = 0x%x " | |
393 | "PH-status2: mb[7] = 0x%x Device-State: mb[4] = 0x%x " | |
394 | "Drv-Presence: mb[5] = 0x%x.\n", mb[3], mb[7], mb[4], mb[5]); | |
395 | ||
396 | if (mb[1] & (IDC_PEG_HALT_STATUS_CHANGE | IDC_NIC_FW_REPORTED_FAILURE | | |
397 | IDC_HEARTBEAT_FAILURE)) { | |
398 | ha->flags.nic_core_hung = 1; | |
399 | ql_log(ql_log_warn, vha, 0x5060, | |
400 | "83XX: F/W Error Reported: Check if reset required.\n"); | |
401 | ||
402 | if (mb[1] & IDC_PEG_HALT_STATUS_CHANGE) { | |
403 | uint32_t protocol_engine_id, fw_err_code, err_level; | |
404 | ||
405 | /* | |
406 | * IDC_PEG_HALT_STATUS_CHANGE interpretation: | |
407 | * - PEG-Halt Status-1 Register: | |
408 | * (LSW = mb[2], MSW = mb[6]) | |
409 | * Bits 0-7 = protocol-engine ID | |
410 | * Bits 8-28 = f/w error code | |
411 | * Bits 29-31 = Error-level | |
412 | * Error-level 0x1 = Non-Fatal error | |
413 | * Error-level 0x2 = Recoverable Fatal error | |
414 | * Error-level 0x4 = UnRecoverable Fatal error | |
415 | * - PEG-Halt Status-2 Register: | |
416 | * (LSW = mb[3], MSW = mb[7]) | |
417 | */ | |
418 | protocol_engine_id = (mb[2] & 0xff); | |
419 | fw_err_code = (((mb[2] & 0xff00) >> 8) | | |
420 | ((mb[6] & 0x1fff) << 8)); | |
421 | err_level = ((mb[6] & 0xe000) >> 13); | |
422 | ql_log(ql_log_warn, vha, 0x5061, "PegHalt Status-1 " | |
423 | "Register: protocol_engine_id=0x%x " | |
424 | "fw_err_code=0x%x err_level=0x%x.\n", | |
425 | protocol_engine_id, fw_err_code, err_level); | |
426 | ql_log(ql_log_warn, vha, 0x5062, "PegHalt Status-2 " | |
427 | "Register: 0x%x%x.\n", mb[7], mb[3]); | |
428 | if (err_level == ERR_LEVEL_NON_FATAL) { | |
429 | ql_log(ql_log_warn, vha, 0x5063, | |
430 | "Not a fatal error, f/w has recovered " | |
431 | "iteself.\n"); | |
432 | } else if (err_level == ERR_LEVEL_RECOVERABLE_FATAL) { | |
433 | ql_log(ql_log_fatal, vha, 0x5064, | |
434 | "Recoverable Fatal error: Chip reset " | |
435 | "required.\n"); | |
436 | qla83xx_schedule_work(vha, | |
437 | QLA83XX_NIC_CORE_RESET); | |
438 | } else if (err_level == ERR_LEVEL_UNRECOVERABLE_FATAL) { | |
439 | ql_log(ql_log_fatal, vha, 0x5065, | |
440 | "Unrecoverable Fatal error: Set FAILED " | |
441 | "state, reboot required.\n"); | |
442 | qla83xx_schedule_work(vha, | |
443 | QLA83XX_NIC_CORE_UNRECOVERABLE); | |
444 | } | |
445 | } | |
446 | ||
447 | if (mb[1] & IDC_NIC_FW_REPORTED_FAILURE) { | |
448 | uint16_t peg_fw_state, nw_interface_link_up; | |
449 | uint16_t nw_interface_signal_detect, sfp_status; | |
450 | uint16_t htbt_counter, htbt_monitor_enable; | |
451 | uint16_t sfp_additonal_info, sfp_multirate; | |
452 | uint16_t sfp_tx_fault, link_speed, dcbx_status; | |
453 | ||
454 | /* | |
455 | * IDC_NIC_FW_REPORTED_FAILURE interpretation: | |
456 | * - PEG-to-FC Status Register: | |
457 | * (LSW = mb[2], MSW = mb[6]) | |
458 | * Bits 0-7 = Peg-Firmware state | |
459 | * Bit 8 = N/W Interface Link-up | |
460 | * Bit 9 = N/W Interface signal detected | |
461 | * Bits 10-11 = SFP Status | |
462 | * SFP Status 0x0 = SFP+ transceiver not expected | |
463 | * SFP Status 0x1 = SFP+ transceiver not present | |
464 | * SFP Status 0x2 = SFP+ transceiver invalid | |
465 | * SFP Status 0x3 = SFP+ transceiver present and | |
466 | * valid | |
467 | * Bits 12-14 = Heartbeat Counter | |
468 | * Bit 15 = Heartbeat Monitor Enable | |
469 | * Bits 16-17 = SFP Additional Info | |
470 | * SFP info 0x0 = Unregocnized transceiver for | |
471 | * Ethernet | |
472 | * SFP info 0x1 = SFP+ brand validation failed | |
473 | * SFP info 0x2 = SFP+ speed validation failed | |
474 | * SFP info 0x3 = SFP+ access error | |
475 | * Bit 18 = SFP Multirate | |
476 | * Bit 19 = SFP Tx Fault | |
477 | * Bits 20-22 = Link Speed | |
478 | * Bits 23-27 = Reserved | |
479 | * Bits 28-30 = DCBX Status | |
480 | * DCBX Status 0x0 = DCBX Disabled | |
481 | * DCBX Status 0x1 = DCBX Enabled | |
482 | * DCBX Status 0x2 = DCBX Exchange error | |
483 | * Bit 31 = Reserved | |
484 | */ | |
485 | peg_fw_state = (mb[2] & 0x00ff); | |
486 | nw_interface_link_up = ((mb[2] & 0x0100) >> 8); | |
487 | nw_interface_signal_detect = ((mb[2] & 0x0200) >> 9); | |
488 | sfp_status = ((mb[2] & 0x0c00) >> 10); | |
489 | htbt_counter = ((mb[2] & 0x7000) >> 12); | |
490 | htbt_monitor_enable = ((mb[2] & 0x8000) >> 15); | |
491 | sfp_additonal_info = (mb[6] & 0x0003); | |
492 | sfp_multirate = ((mb[6] & 0x0004) >> 2); | |
493 | sfp_tx_fault = ((mb[6] & 0x0008) >> 3); | |
494 | link_speed = ((mb[6] & 0x0070) >> 4); | |
495 | dcbx_status = ((mb[6] & 0x7000) >> 12); | |
496 | ||
497 | ql_log(ql_log_warn, vha, 0x5066, | |
498 | "Peg-to-Fc Status Register:\n" | |
499 | "peg_fw_state=0x%x, nw_interface_link_up=0x%x, " | |
500 | "nw_interface_signal_detect=0x%x" | |
501 | "\nsfp_statis=0x%x.\n ", peg_fw_state, | |
502 | nw_interface_link_up, nw_interface_signal_detect, | |
503 | sfp_status); | |
504 | ql_log(ql_log_warn, vha, 0x5067, | |
505 | "htbt_counter=0x%x, htbt_monitor_enable=0x%x, " | |
506 | "sfp_additonal_info=0x%x, sfp_multirate=0x%x.\n ", | |
507 | htbt_counter, htbt_monitor_enable, | |
508 | sfp_additonal_info, sfp_multirate); | |
509 | ql_log(ql_log_warn, vha, 0x5068, | |
510 | "sfp_tx_fault=0x%x, link_state=0x%x, " | |
511 | "dcbx_status=0x%x.\n", sfp_tx_fault, link_speed, | |
512 | dcbx_status); | |
513 | ||
514 | qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET); | |
515 | } | |
516 | ||
517 | if (mb[1] & IDC_HEARTBEAT_FAILURE) { | |
518 | ql_log(ql_log_warn, vha, 0x5069, | |
519 | "Heartbeat Failure encountered, chip reset " | |
520 | "required.\n"); | |
521 | ||
522 | qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET); | |
523 | } | |
524 | } | |
525 | ||
526 | if (mb[1] & IDC_DEVICE_STATE_CHANGE) { | |
527 | ql_log(ql_log_info, vha, 0x506a, | |
528 | "IDC Device-State changed = 0x%x.\n", mb[4]); | |
6c3943cd SK |
529 | if (ha->flags.nic_core_reset_owner) |
530 | return; | |
7d613ac6 SV |
531 | qla83xx_schedule_work(vha, MBA_IDC_AEN); |
532 | } | |
533 | } | |
534 | ||
bb4cf5b7 CD |
535 | int |
536 | qla2x00_is_a_vp_did(scsi_qla_host_t *vha, uint32_t rscn_entry) | |
537 | { | |
538 | struct qla_hw_data *ha = vha->hw; | |
539 | scsi_qla_host_t *vp; | |
540 | uint32_t vp_did; | |
541 | unsigned long flags; | |
542 | int ret = 0; | |
543 | ||
544 | if (!ha->num_vhosts) | |
545 | return ret; | |
546 | ||
547 | spin_lock_irqsave(&ha->vport_slock, flags); | |
548 | list_for_each_entry(vp, &ha->vp_list, list) { | |
549 | vp_did = vp->d_id.b24; | |
550 | if (vp_did == rscn_entry) { | |
551 | ret = 1; | |
552 | break; | |
553 | } | |
554 | } | |
555 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
556 | ||
557 | return ret; | |
558 | } | |
559 | ||
1da177e4 LT |
560 | /** |
561 | * qla2x00_async_event() - Process aynchronous events. | |
562 | * @ha: SCSI driver HA context | |
9a853f71 | 563 | * @mb: Mailbox registers (0 - 3) |
1da177e4 | 564 | */ |
2c3dfe3f | 565 | void |
73208dfd | 566 | qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb) |
1da177e4 | 567 | { |
1da177e4 | 568 | uint16_t handle_cnt; |
bdab23da | 569 | uint16_t cnt, mbx; |
1da177e4 | 570 | uint32_t handles[5]; |
e315cd28 | 571 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 572 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
bdab23da | 573 | struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24; |
bc5c2aad | 574 | struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82; |
1da177e4 | 575 | uint32_t rscn_entry, host_pid; |
4d4df193 | 576 | unsigned long flags; |
1da177e4 LT |
577 | |
578 | /* Setup to process RIO completion. */ | |
579 | handle_cnt = 0; | |
6246b8a1 | 580 | if (IS_CNA_CAPABLE(ha)) |
3a03eb79 | 581 | goto skip_rio; |
1da177e4 LT |
582 | switch (mb[0]) { |
583 | case MBA_SCSI_COMPLETION: | |
9a853f71 | 584 | handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1])); |
1da177e4 LT |
585 | handle_cnt = 1; |
586 | break; | |
587 | case MBA_CMPLT_1_16BIT: | |
9a853f71 | 588 | handles[0] = mb[1]; |
1da177e4 LT |
589 | handle_cnt = 1; |
590 | mb[0] = MBA_SCSI_COMPLETION; | |
591 | break; | |
592 | case MBA_CMPLT_2_16BIT: | |
9a853f71 AV |
593 | handles[0] = mb[1]; |
594 | handles[1] = mb[2]; | |
1da177e4 LT |
595 | handle_cnt = 2; |
596 | mb[0] = MBA_SCSI_COMPLETION; | |
597 | break; | |
598 | case MBA_CMPLT_3_16BIT: | |
9a853f71 AV |
599 | handles[0] = mb[1]; |
600 | handles[1] = mb[2]; | |
601 | handles[2] = mb[3]; | |
1da177e4 LT |
602 | handle_cnt = 3; |
603 | mb[0] = MBA_SCSI_COMPLETION; | |
604 | break; | |
605 | case MBA_CMPLT_4_16BIT: | |
9a853f71 AV |
606 | handles[0] = mb[1]; |
607 | handles[1] = mb[2]; | |
608 | handles[2] = mb[3]; | |
1da177e4 LT |
609 | handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6); |
610 | handle_cnt = 4; | |
611 | mb[0] = MBA_SCSI_COMPLETION; | |
612 | break; | |
613 | case MBA_CMPLT_5_16BIT: | |
9a853f71 AV |
614 | handles[0] = mb[1]; |
615 | handles[1] = mb[2]; | |
616 | handles[2] = mb[3]; | |
1da177e4 LT |
617 | handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6); |
618 | handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7); | |
619 | handle_cnt = 5; | |
620 | mb[0] = MBA_SCSI_COMPLETION; | |
621 | break; | |
622 | case MBA_CMPLT_2_32BIT: | |
9a853f71 | 623 | handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1])); |
1da177e4 LT |
624 | handles[1] = le32_to_cpu( |
625 | ((uint32_t)(RD_MAILBOX_REG(ha, reg, 7) << 16)) | | |
626 | RD_MAILBOX_REG(ha, reg, 6)); | |
627 | handle_cnt = 2; | |
628 | mb[0] = MBA_SCSI_COMPLETION; | |
629 | break; | |
630 | default: | |
631 | break; | |
632 | } | |
3a03eb79 | 633 | skip_rio: |
1da177e4 LT |
634 | switch (mb[0]) { |
635 | case MBA_SCSI_COMPLETION: /* Fast Post */ | |
e315cd28 | 636 | if (!vha->flags.online) |
1da177e4 LT |
637 | break; |
638 | ||
639 | for (cnt = 0; cnt < handle_cnt; cnt++) | |
73208dfd AC |
640 | qla2x00_process_completed_request(vha, rsp->req, |
641 | handles[cnt]); | |
1da177e4 LT |
642 | break; |
643 | ||
644 | case MBA_RESET: /* Reset */ | |
7c3df132 SK |
645 | ql_dbg(ql_dbg_async, vha, 0x5002, |
646 | "Asynchronous RESET.\n"); | |
1da177e4 | 647 | |
e315cd28 | 648 | set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
649 | break; |
650 | ||
651 | case MBA_SYSTEM_ERR: /* System Error */ | |
6246b8a1 GM |
652 | mbx = (IS_QLA81XX(ha) || IS_QLA83XX(ha)) ? |
653 | RD_REG_WORD(®24->mailbox7) : 0; | |
7c3df132 | 654 | ql_log(ql_log_warn, vha, 0x5003, |
bdab23da AV |
655 | "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh " |
656 | "mbx7=%xh.\n", mb[1], mb[2], mb[3], mbx); | |
1da177e4 | 657 | |
e315cd28 | 658 | ha->isp_ops->fw_dump(vha, 1); |
1da177e4 | 659 | |
e428924c | 660 | if (IS_FWI2_CAPABLE(ha)) { |
9a853f71 | 661 | if (mb[1] == 0 && mb[2] == 0) { |
7c3df132 | 662 | ql_log(ql_log_fatal, vha, 0x5004, |
9a853f71 AV |
663 | "Unrecoverable Hardware Error: adapter " |
664 | "marked OFFLINE!\n"); | |
e315cd28 | 665 | vha->flags.online = 0; |
6246b8a1 | 666 | vha->device_flags |= DFLG_DEV_FAILED; |
b1d46989 | 667 | } else { |
25985edc | 668 | /* Check to see if MPI timeout occurred */ |
b1d46989 MI |
669 | if ((mbx & MBX_3) && (ha->flags.port0)) |
670 | set_bit(MPI_RESET_NEEDED, | |
671 | &vha->dpc_flags); | |
672 | ||
e315cd28 | 673 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
b1d46989 | 674 | } |
9a853f71 | 675 | } else if (mb[1] == 0) { |
7c3df132 | 676 | ql_log(ql_log_fatal, vha, 0x5005, |
1da177e4 LT |
677 | "Unrecoverable Hardware Error: adapter marked " |
678 | "OFFLINE!\n"); | |
e315cd28 | 679 | vha->flags.online = 0; |
6246b8a1 | 680 | vha->device_flags |= DFLG_DEV_FAILED; |
1da177e4 | 681 | } else |
e315cd28 | 682 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
683 | break; |
684 | ||
685 | case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */ | |
7c3df132 SK |
686 | ql_log(ql_log_warn, vha, 0x5006, |
687 | "ISP Request Transfer Error (%x).\n", mb[1]); | |
1da177e4 | 688 | |
e315cd28 | 689 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
690 | break; |
691 | ||
692 | case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */ | |
7c3df132 SK |
693 | ql_log(ql_log_warn, vha, 0x5007, |
694 | "ISP Response Transfer Error.\n"); | |
1da177e4 | 695 | |
e315cd28 | 696 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
697 | break; |
698 | ||
699 | case MBA_WAKEUP_THRES: /* Request Queue Wake-up */ | |
7c3df132 SK |
700 | ql_dbg(ql_dbg_async, vha, 0x5008, |
701 | "Asynchronous WAKEUP_THRES.\n"); | |
1da177e4 | 702 | |
2d70c103 | 703 | break; |
1da177e4 | 704 | case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */ |
cfb0919c | 705 | ql_dbg(ql_dbg_async, vha, 0x5009, |
7c3df132 | 706 | "LIP occurred (%x).\n", mb[1]); |
1da177e4 | 707 | |
e315cd28 AC |
708 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
709 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
710 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
711 | qla2x00_mark_all_devices_lost(vha, 1); | |
1da177e4 LT |
712 | } |
713 | ||
e315cd28 AC |
714 | if (vha->vp_idx) { |
715 | atomic_set(&vha->vp_state, VP_FAILED); | |
716 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
717 | } |
718 | ||
e315cd28 AC |
719 | set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags); |
720 | set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags); | |
1da177e4 | 721 | |
e315cd28 AC |
722 | vha->flags.management_server_logged_in = 0; |
723 | qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]); | |
1da177e4 LT |
724 | break; |
725 | ||
726 | case MBA_LOOP_UP: /* Loop Up Event */ | |
daae62a3 | 727 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) |
d8b45213 | 728 | ha->link_data_rate = PORT_SPEED_1GB; |
daae62a3 | 729 | else |
1da177e4 | 730 | ha->link_data_rate = mb[1]; |
1da177e4 | 731 | |
cfb0919c | 732 | ql_dbg(ql_dbg_async, vha, 0x500a, |
daae62a3 | 733 | "LOOP UP detected (%s Gbps).\n", |
d0297c9a | 734 | qla2x00_get_link_speed_str(ha, ha->link_data_rate)); |
1da177e4 | 735 | |
e315cd28 AC |
736 | vha->flags.management_server_logged_in = 0; |
737 | qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate); | |
1da177e4 LT |
738 | break; |
739 | ||
740 | case MBA_LOOP_DOWN: /* Loop Down Event */ | |
6246b8a1 GM |
741 | mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha)) |
742 | ? RD_REG_WORD(®24->mailbox4) : 0; | |
7ec0effd AD |
743 | mbx = (IS_P3P_TYPE(ha)) ? RD_REG_WORD(®82->mailbox_out[4]) |
744 | : mbx; | |
cfb0919c | 745 | ql_dbg(ql_dbg_async, vha, 0x500b, |
7c3df132 SK |
746 | "LOOP DOWN detected (%x %x %x %x).\n", |
747 | mb[1], mb[2], mb[3], mbx); | |
1da177e4 | 748 | |
e315cd28 AC |
749 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
750 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
751 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
752 | vha->device_flags |= DFLG_NO_CABLE; | |
753 | qla2x00_mark_all_devices_lost(vha, 1); | |
1da177e4 LT |
754 | } |
755 | ||
e315cd28 AC |
756 | if (vha->vp_idx) { |
757 | atomic_set(&vha->vp_state, VP_FAILED); | |
758 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
759 | } |
760 | ||
e315cd28 | 761 | vha->flags.management_server_logged_in = 0; |
d8b45213 | 762 | ha->link_data_rate = PORT_SPEED_UNKNOWN; |
e315cd28 | 763 | qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0); |
1da177e4 LT |
764 | break; |
765 | ||
766 | case MBA_LIP_RESET: /* LIP reset occurred */ | |
cfb0919c | 767 | ql_dbg(ql_dbg_async, vha, 0x500c, |
cc3ef7bc | 768 | "LIP reset occurred (%x).\n", mb[1]); |
1da177e4 | 769 | |
e315cd28 AC |
770 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
771 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
772 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
773 | qla2x00_mark_all_devices_lost(vha, 1); | |
1da177e4 LT |
774 | } |
775 | ||
e315cd28 AC |
776 | if (vha->vp_idx) { |
777 | atomic_set(&vha->vp_state, VP_FAILED); | |
778 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
779 | } |
780 | ||
e315cd28 | 781 | set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
782 | |
783 | ha->operating_mode = LOOP; | |
e315cd28 AC |
784 | vha->flags.management_server_logged_in = 0; |
785 | qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]); | |
1da177e4 LT |
786 | break; |
787 | ||
3a03eb79 | 788 | /* case MBA_DCBX_COMPLETE: */ |
1da177e4 LT |
789 | case MBA_POINT_TO_POINT: /* Point-to-Point */ |
790 | if (IS_QLA2100(ha)) | |
791 | break; | |
792 | ||
7ec0effd | 793 | if (IS_CNA_CAPABLE(ha)) { |
7c3df132 SK |
794 | ql_dbg(ql_dbg_async, vha, 0x500d, |
795 | "DCBX Completed -- %04x %04x %04x.\n", | |
796 | mb[1], mb[2], mb[3]); | |
9aaf2cea | 797 | if (ha->notify_dcbx_comp && !vha->vp_idx) |
23f2ebd1 SR |
798 | complete(&ha->dcbx_comp); |
799 | ||
800 | } else | |
7c3df132 SK |
801 | ql_dbg(ql_dbg_async, vha, 0x500e, |
802 | "Asynchronous P2P MODE received.\n"); | |
1da177e4 LT |
803 | |
804 | /* | |
805 | * Until there's a transition from loop down to loop up, treat | |
806 | * this as loop down only. | |
807 | */ | |
e315cd28 AC |
808 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
809 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
810 | if (!atomic_read(&vha->loop_down_timer)) | |
811 | atomic_set(&vha->loop_down_timer, | |
1da177e4 | 812 | LOOP_DOWN_TIME); |
e315cd28 | 813 | qla2x00_mark_all_devices_lost(vha, 1); |
1da177e4 LT |
814 | } |
815 | ||
e315cd28 AC |
816 | if (vha->vp_idx) { |
817 | atomic_set(&vha->vp_state, VP_FAILED); | |
818 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
819 | } |
820 | ||
e315cd28 AC |
821 | if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) |
822 | set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
823 | ||
824 | set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags); | |
825 | set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags); | |
4346b149 AV |
826 | |
827 | ha->flags.gpsc_supported = 1; | |
e315cd28 | 828 | vha->flags.management_server_logged_in = 0; |
1da177e4 LT |
829 | break; |
830 | ||
831 | case MBA_CHG_IN_CONNECTION: /* Change in connection mode */ | |
832 | if (IS_QLA2100(ha)) | |
833 | break; | |
834 | ||
cfb0919c | 835 | ql_dbg(ql_dbg_async, vha, 0x500f, |
1da177e4 LT |
836 | "Configuration change detected: value=%x.\n", mb[1]); |
837 | ||
e315cd28 AC |
838 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
839 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
840 | if (!atomic_read(&vha->loop_down_timer)) | |
841 | atomic_set(&vha->loop_down_timer, | |
1da177e4 | 842 | LOOP_DOWN_TIME); |
e315cd28 | 843 | qla2x00_mark_all_devices_lost(vha, 1); |
1da177e4 LT |
844 | } |
845 | ||
e315cd28 AC |
846 | if (vha->vp_idx) { |
847 | atomic_set(&vha->vp_state, VP_FAILED); | |
848 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
849 | } |
850 | ||
e315cd28 AC |
851 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
852 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
1da177e4 LT |
853 | break; |
854 | ||
855 | case MBA_PORT_UPDATE: /* Port database update */ | |
55903b9d SV |
856 | /* |
857 | * Handle only global and vn-port update events | |
858 | * | |
859 | * Relevant inputs: | |
860 | * mb[1] = N_Port handle of changed port | |
861 | * OR 0xffff for global event | |
862 | * mb[2] = New login state | |
863 | * 7 = Port logged out | |
864 | * mb[3] = LSB is vp_idx, 0xff = all vps | |
865 | * | |
866 | * Skip processing if: | |
867 | * Event is global, vp_idx is NOT all vps, | |
868 | * vp_idx does not match | |
869 | * Event is not global, vp_idx does not match | |
870 | */ | |
12cec63e AV |
871 | if (IS_QLA2XXX_MIDTYPE(ha) && |
872 | ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) || | |
873 | (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff)) | |
874 | break; | |
73208dfd | 875 | |
9764ff88 AV |
876 | /* Global event -- port logout or port unavailable. */ |
877 | if (mb[1] == 0xffff && mb[2] == 0x7) { | |
7c3df132 SK |
878 | ql_dbg(ql_dbg_async, vha, 0x5010, |
879 | "Port unavailable %04x %04x %04x.\n", | |
880 | mb[1], mb[2], mb[3]); | |
daae62a3 CD |
881 | ql_log(ql_log_warn, vha, 0x505e, |
882 | "Link is offline.\n"); | |
9764ff88 AV |
883 | |
884 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { | |
885 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
886 | atomic_set(&vha->loop_down_timer, | |
887 | LOOP_DOWN_TIME); | |
888 | vha->device_flags |= DFLG_NO_CABLE; | |
889 | qla2x00_mark_all_devices_lost(vha, 1); | |
890 | } | |
891 | ||
892 | if (vha->vp_idx) { | |
893 | atomic_set(&vha->vp_state, VP_FAILED); | |
894 | fc_vport_set_state(vha->fc_vport, | |
895 | FC_VPORT_FAILED); | |
faadc5e7 | 896 | qla2x00_mark_all_devices_lost(vha, 1); |
9764ff88 AV |
897 | } |
898 | ||
899 | vha->flags.management_server_logged_in = 0; | |
900 | ha->link_data_rate = PORT_SPEED_UNKNOWN; | |
901 | break; | |
902 | } | |
903 | ||
1da177e4 | 904 | /* |
cc3ef7bc | 905 | * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET |
1da177e4 LT |
906 | * event etc. earlier indicating loop is down) then process |
907 | * it. Otherwise ignore it and Wait for RSCN to come in. | |
908 | */ | |
e315cd28 | 909 | atomic_set(&vha->loop_down_timer, 0); |
79cc785f | 910 | if (mb[1] != 0xffff || (mb[2] != 0x6 && mb[2] != 0x4)) { |
7c3df132 SK |
911 | ql_dbg(ql_dbg_async, vha, 0x5011, |
912 | "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n", | |
913 | mb[1], mb[2], mb[3]); | |
2d70c103 NB |
914 | |
915 | qlt_async_event(mb[0], vha, mb); | |
1da177e4 LT |
916 | break; |
917 | } | |
918 | ||
7c3df132 SK |
919 | ql_dbg(ql_dbg_async, vha, 0x5012, |
920 | "Port database changed %04x %04x %04x.\n", | |
921 | mb[1], mb[2], mb[3]); | |
daae62a3 CD |
922 | ql_log(ql_log_warn, vha, 0x505f, |
923 | "Link is operational (%s Gbps).\n", | |
d0297c9a | 924 | qla2x00_get_link_speed_str(ha, ha->link_data_rate)); |
1da177e4 LT |
925 | |
926 | /* | |
927 | * Mark all devices as missing so we will login again. | |
928 | */ | |
e315cd28 | 929 | atomic_set(&vha->loop_state, LOOP_UP); |
1da177e4 | 930 | |
e315cd28 | 931 | qla2x00_mark_all_devices_lost(vha, 1); |
1da177e4 | 932 | |
2d70c103 NB |
933 | if (vha->vp_idx == 0 && !qla_ini_mode_enabled(vha)) |
934 | set_bit(SCR_PENDING, &vha->dpc_flags); | |
935 | ||
e315cd28 AC |
936 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
937 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
2d70c103 NB |
938 | |
939 | qlt_async_event(mb[0], vha, mb); | |
1da177e4 LT |
940 | break; |
941 | ||
942 | case MBA_RSCN_UPDATE: /* State Change Registration */ | |
3c397400 | 943 | /* Check if the Vport has issued a SCR */ |
e315cd28 | 944 | if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags)) |
3c397400 SJ |
945 | break; |
946 | /* Only handle SCNs for our Vport index. */ | |
0d6e61bc | 947 | if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff)) |
3c397400 | 948 | break; |
0d6e61bc | 949 | |
7c3df132 SK |
950 | ql_dbg(ql_dbg_async, vha, 0x5013, |
951 | "RSCN database changed -- %04x %04x %04x.\n", | |
952 | mb[1], mb[2], mb[3]); | |
1da177e4 | 953 | |
59d72d87 | 954 | rscn_entry = ((mb[1] & 0xff) << 16) | mb[2]; |
e315cd28 AC |
955 | host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8) |
956 | | vha->d_id.b.al_pa; | |
1da177e4 | 957 | if (rscn_entry == host_pid) { |
7c3df132 SK |
958 | ql_dbg(ql_dbg_async, vha, 0x5014, |
959 | "Ignoring RSCN update to local host " | |
960 | "port ID (%06x).\n", host_pid); | |
1da177e4 LT |
961 | break; |
962 | } | |
963 | ||
59d72d87 RA |
964 | /* Ignore reserved bits from RSCN-payload. */ |
965 | rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2]; | |
1da177e4 | 966 | |
bb4cf5b7 CD |
967 | /* Skip RSCNs for virtual ports on the same physical port */ |
968 | if (qla2x00_is_a_vp_did(vha, rscn_entry)) | |
969 | break; | |
970 | ||
e315cd28 AC |
971 | atomic_set(&vha->loop_down_timer, 0); |
972 | vha->flags.management_server_logged_in = 0; | |
1da177e4 | 973 | |
e315cd28 AC |
974 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
975 | set_bit(RSCN_UPDATE, &vha->dpc_flags); | |
976 | qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry); | |
1da177e4 LT |
977 | break; |
978 | ||
979 | /* case MBA_RIO_RESPONSE: */ | |
980 | case MBA_ZIO_RESPONSE: | |
7c3df132 SK |
981 | ql_dbg(ql_dbg_async, vha, 0x5015, |
982 | "[R|Z]IO update completion.\n"); | |
1da177e4 | 983 | |
e428924c | 984 | if (IS_FWI2_CAPABLE(ha)) |
2afa19a9 | 985 | qla24xx_process_response_queue(vha, rsp); |
4fdfefe5 | 986 | else |
73208dfd | 987 | qla2x00_process_response_queue(rsp); |
1da177e4 | 988 | break; |
9a853f71 AV |
989 | |
990 | case MBA_DISCARD_RND_FRAME: | |
7c3df132 SK |
991 | ql_dbg(ql_dbg_async, vha, 0x5016, |
992 | "Discard RND Frame -- %04x %04x %04x.\n", | |
993 | mb[1], mb[2], mb[3]); | |
9a853f71 | 994 | break; |
45ebeb56 AV |
995 | |
996 | case MBA_TRACE_NOTIFICATION: | |
7c3df132 SK |
997 | ql_dbg(ql_dbg_async, vha, 0x5017, |
998 | "Trace Notification -- %04x %04x.\n", mb[1], mb[2]); | |
45ebeb56 | 999 | break; |
4d4df193 HK |
1000 | |
1001 | case MBA_ISP84XX_ALERT: | |
7c3df132 SK |
1002 | ql_dbg(ql_dbg_async, vha, 0x5018, |
1003 | "ISP84XX Alert Notification -- %04x %04x %04x.\n", | |
1004 | mb[1], mb[2], mb[3]); | |
4d4df193 HK |
1005 | |
1006 | spin_lock_irqsave(&ha->cs84xx->access_lock, flags); | |
1007 | switch (mb[1]) { | |
1008 | case A84_PANIC_RECOVERY: | |
7c3df132 SK |
1009 | ql_log(ql_log_info, vha, 0x5019, |
1010 | "Alert 84XX: panic recovery %04x %04x.\n", | |
1011 | mb[2], mb[3]); | |
4d4df193 HK |
1012 | break; |
1013 | case A84_OP_LOGIN_COMPLETE: | |
1014 | ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2]; | |
7c3df132 SK |
1015 | ql_log(ql_log_info, vha, 0x501a, |
1016 | "Alert 84XX: firmware version %x.\n", | |
1017 | ha->cs84xx->op_fw_version); | |
4d4df193 HK |
1018 | break; |
1019 | case A84_DIAG_LOGIN_COMPLETE: | |
1020 | ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2]; | |
7c3df132 SK |
1021 | ql_log(ql_log_info, vha, 0x501b, |
1022 | "Alert 84XX: diagnostic firmware version %x.\n", | |
1023 | ha->cs84xx->diag_fw_version); | |
4d4df193 HK |
1024 | break; |
1025 | case A84_GOLD_LOGIN_COMPLETE: | |
1026 | ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2]; | |
1027 | ha->cs84xx->fw_update = 1; | |
7c3df132 SK |
1028 | ql_log(ql_log_info, vha, 0x501c, |
1029 | "Alert 84XX: gold firmware version %x.\n", | |
1030 | ha->cs84xx->gold_fw_version); | |
4d4df193 HK |
1031 | break; |
1032 | default: | |
7c3df132 SK |
1033 | ql_log(ql_log_warn, vha, 0x501d, |
1034 | "Alert 84xx: Invalid Alert %04x %04x %04x.\n", | |
4d4df193 HK |
1035 | mb[1], mb[2], mb[3]); |
1036 | } | |
1037 | spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags); | |
1038 | break; | |
3a03eb79 | 1039 | case MBA_DCBX_START: |
7c3df132 SK |
1040 | ql_dbg(ql_dbg_async, vha, 0x501e, |
1041 | "DCBX Started -- %04x %04x %04x.\n", | |
1042 | mb[1], mb[2], mb[3]); | |
3a03eb79 AV |
1043 | break; |
1044 | case MBA_DCBX_PARAM_UPDATE: | |
7c3df132 SK |
1045 | ql_dbg(ql_dbg_async, vha, 0x501f, |
1046 | "DCBX Parameters Updated -- %04x %04x %04x.\n", | |
1047 | mb[1], mb[2], mb[3]); | |
3a03eb79 AV |
1048 | break; |
1049 | case MBA_FCF_CONF_ERR: | |
7c3df132 SK |
1050 | ql_dbg(ql_dbg_async, vha, 0x5020, |
1051 | "FCF Configuration Error -- %04x %04x %04x.\n", | |
1052 | mb[1], mb[2], mb[3]); | |
3a03eb79 | 1053 | break; |
3a03eb79 | 1054 | case MBA_IDC_NOTIFY: |
7ec0effd | 1055 | if (IS_QLA8031(vha->hw) || IS_QLA8044(ha)) { |
67b2a31f CD |
1056 | mb[4] = RD_REG_WORD(®24->mailbox4); |
1057 | if (((mb[2] & 0x7fff) == MBC_PORT_RESET || | |
1058 | (mb[2] & 0x7fff) == MBC_SET_PORT_CONFIG) && | |
1059 | (mb[4] & INTERNAL_LOOPBACK_MASK) != 0) { | |
8fcd6b8b | 1060 | set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags); |
67b2a31f CD |
1061 | /* |
1062 | * Extend loop down timer since port is active. | |
1063 | */ | |
1064 | if (atomic_read(&vha->loop_state) == LOOP_DOWN) | |
1065 | atomic_set(&vha->loop_down_timer, | |
1066 | LOOP_DOWN_TIME); | |
8fcd6b8b CD |
1067 | qla2xxx_wake_dpc(vha); |
1068 | } | |
67b2a31f | 1069 | } |
8fcd6b8b | 1070 | case MBA_IDC_COMPLETE: |
9aaf2cea | 1071 | if (ha->notify_lb_portup_comp && !vha->vp_idx) |
f356bef1 CD |
1072 | complete(&ha->lb_portup_comp); |
1073 | /* Fallthru */ | |
3a03eb79 | 1074 | case MBA_IDC_TIME_EXT: |
7ec0effd AD |
1075 | if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || |
1076 | IS_QLA8044(ha)) | |
7d613ac6 SV |
1077 | qla81xx_idc_event(vha, mb[0], mb[1]); |
1078 | break; | |
1079 | ||
1080 | case MBA_IDC_AEN: | |
1081 | mb[4] = RD_REG_WORD(®24->mailbox4); | |
1082 | mb[5] = RD_REG_WORD(®24->mailbox5); | |
1083 | mb[6] = RD_REG_WORD(®24->mailbox6); | |
1084 | mb[7] = RD_REG_WORD(®24->mailbox7); | |
1085 | qla83xx_handle_8200_aen(vha, mb); | |
3a03eb79 | 1086 | break; |
7d613ac6 | 1087 | |
6246b8a1 GM |
1088 | default: |
1089 | ql_dbg(ql_dbg_async, vha, 0x5057, | |
1090 | "Unknown AEN:%04x %04x %04x %04x\n", | |
1091 | mb[0], mb[1], mb[2], mb[3]); | |
1da177e4 | 1092 | } |
2c3dfe3f | 1093 | |
2d70c103 NB |
1094 | qlt_async_event(mb[0], vha, mb); |
1095 | ||
e315cd28 | 1096 | if (!vha->vp_idx && ha->num_vhosts) |
73208dfd | 1097 | qla2x00_alert_all_vps(rsp, mb); |
1da177e4 LT |
1098 | } |
1099 | ||
1100 | /** | |
1101 | * qla2x00_process_completed_request() - Process a Fast Post response. | |
1102 | * @ha: SCSI driver HA context | |
1103 | * @index: SRB index | |
1104 | */ | |
8ae6d9c7 | 1105 | void |
73208dfd | 1106 | qla2x00_process_completed_request(struct scsi_qla_host *vha, |
8ae6d9c7 | 1107 | struct req_que *req, uint32_t index) |
1da177e4 LT |
1108 | { |
1109 | srb_t *sp; | |
e315cd28 | 1110 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1111 | |
1112 | /* Validate handle. */ | |
8d93f550 | 1113 | if (index >= req->num_outstanding_cmds) { |
7c3df132 SK |
1114 | ql_log(ql_log_warn, vha, 0x3014, |
1115 | "Invalid SCSI command index (%x).\n", index); | |
1da177e4 | 1116 | |
7ec0effd | 1117 | if (IS_P3P_TYPE(ha)) |
8f7daead GM |
1118 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); |
1119 | else | |
1120 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
1121 | return; |
1122 | } | |
1123 | ||
e315cd28 | 1124 | sp = req->outstanding_cmds[index]; |
1da177e4 LT |
1125 | if (sp) { |
1126 | /* Free outstanding command slot. */ | |
e315cd28 | 1127 | req->outstanding_cmds[index] = NULL; |
1da177e4 | 1128 | |
1da177e4 | 1129 | /* Save ISP completion status */ |
9ba56b95 | 1130 | sp->done(ha, sp, DID_OK << 16); |
1da177e4 | 1131 | } else { |
7c3df132 | 1132 | ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n"); |
1da177e4 | 1133 | |
7ec0effd | 1134 | if (IS_P3P_TYPE(ha)) |
8f7daead GM |
1135 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); |
1136 | else | |
1137 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
1138 | } |
1139 | } | |
1140 | ||
8ae6d9c7 | 1141 | srb_t * |
ac280b67 AV |
1142 | qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func, |
1143 | struct req_que *req, void *iocb) | |
1144 | { | |
1145 | struct qla_hw_data *ha = vha->hw; | |
1146 | sts_entry_t *pkt = iocb; | |
1147 | srb_t *sp = NULL; | |
1148 | uint16_t index; | |
1149 | ||
1150 | index = LSW(pkt->handle); | |
8d93f550 | 1151 | if (index >= req->num_outstanding_cmds) { |
7c3df132 SK |
1152 | ql_log(ql_log_warn, vha, 0x5031, |
1153 | "Invalid command index (%x).\n", index); | |
7ec0effd | 1154 | if (IS_P3P_TYPE(ha)) |
8f7daead GM |
1155 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); |
1156 | else | |
1157 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
ac280b67 AV |
1158 | goto done; |
1159 | } | |
1160 | sp = req->outstanding_cmds[index]; | |
1161 | if (!sp) { | |
7c3df132 SK |
1162 | ql_log(ql_log_warn, vha, 0x5032, |
1163 | "Invalid completion handle (%x) -- timed-out.\n", index); | |
ac280b67 AV |
1164 | return sp; |
1165 | } | |
1166 | if (sp->handle != index) { | |
7c3df132 SK |
1167 | ql_log(ql_log_warn, vha, 0x5033, |
1168 | "SRB handle (%x) mismatch %x.\n", sp->handle, index); | |
ac280b67 AV |
1169 | return NULL; |
1170 | } | |
9a069e19 | 1171 | |
ac280b67 | 1172 | req->outstanding_cmds[index] = NULL; |
9a069e19 | 1173 | |
ac280b67 AV |
1174 | done: |
1175 | return sp; | |
1176 | } | |
1177 | ||
1178 | static void | |
1179 | qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1180 | struct mbx_entry *mbx) | |
1181 | { | |
1182 | const char func[] = "MBX-IOCB"; | |
1183 | const char *type; | |
ac280b67 AV |
1184 | fc_port_t *fcport; |
1185 | srb_t *sp; | |
4916392b | 1186 | struct srb_iocb *lio; |
99b0bec7 | 1187 | uint16_t *data; |
5ff1d584 | 1188 | uint16_t status; |
ac280b67 AV |
1189 | |
1190 | sp = qla2x00_get_sp_from_handle(vha, func, req, mbx); | |
1191 | if (!sp) | |
1192 | return; | |
1193 | ||
9ba56b95 GM |
1194 | lio = &sp->u.iocb_cmd; |
1195 | type = sp->name; | |
ac280b67 | 1196 | fcport = sp->fcport; |
4916392b | 1197 | data = lio->u.logio.data; |
ac280b67 | 1198 | |
5ff1d584 | 1199 | data[0] = MBS_COMMAND_ERROR; |
4916392b | 1200 | data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? |
5ff1d584 | 1201 | QLA_LOGIO_LOGIN_RETRIED : 0; |
ac280b67 | 1202 | if (mbx->entry_status) { |
7c3df132 | 1203 | ql_dbg(ql_dbg_async, vha, 0x5043, |
cfb0919c | 1204 | "Async-%s error entry - hdl=%x portid=%02x%02x%02x " |
d3fa9e7d | 1205 | "entry-status=%x status=%x state-flag=%x " |
cfb0919c CD |
1206 | "status-flags=%x.\n", type, sp->handle, |
1207 | fcport->d_id.b.domain, fcport->d_id.b.area, | |
d3fa9e7d AV |
1208 | fcport->d_id.b.al_pa, mbx->entry_status, |
1209 | le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags), | |
7c3df132 | 1210 | le16_to_cpu(mbx->status_flags)); |
d3fa9e7d | 1211 | |
cfb0919c | 1212 | ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029, |
7c3df132 | 1213 | (uint8_t *)mbx, sizeof(*mbx)); |
ac280b67 | 1214 | |
99b0bec7 | 1215 | goto logio_done; |
ac280b67 AV |
1216 | } |
1217 | ||
5ff1d584 | 1218 | status = le16_to_cpu(mbx->status); |
9ba56b95 | 1219 | if (status == 0x30 && sp->type == SRB_LOGIN_CMD && |
5ff1d584 AV |
1220 | le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) |
1221 | status = 0; | |
1222 | if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) { | |
7c3df132 | 1223 | ql_dbg(ql_dbg_async, vha, 0x5045, |
cfb0919c CD |
1224 | "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n", |
1225 | type, sp->handle, fcport->d_id.b.domain, | |
1226 | fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
1227 | le16_to_cpu(mbx->mb1)); | |
ac280b67 AV |
1228 | |
1229 | data[0] = MBS_COMMAND_COMPLETE; | |
9ba56b95 | 1230 | if (sp->type == SRB_LOGIN_CMD) { |
99b0bec7 AV |
1231 | fcport->port_type = FCT_TARGET; |
1232 | if (le16_to_cpu(mbx->mb1) & BIT_0) | |
1233 | fcport->port_type = FCT_INITIATOR; | |
6ac52608 | 1234 | else if (le16_to_cpu(mbx->mb1) & BIT_1) |
99b0bec7 | 1235 | fcport->flags |= FCF_FCP2_DEVICE; |
5ff1d584 | 1236 | } |
99b0bec7 | 1237 | goto logio_done; |
ac280b67 AV |
1238 | } |
1239 | ||
1240 | data[0] = le16_to_cpu(mbx->mb0); | |
1241 | switch (data[0]) { | |
1242 | case MBS_PORT_ID_USED: | |
1243 | data[1] = le16_to_cpu(mbx->mb1); | |
1244 | break; | |
1245 | case MBS_LOOP_ID_USED: | |
1246 | break; | |
1247 | default: | |
1248 | data[0] = MBS_COMMAND_ERROR; | |
ac280b67 AV |
1249 | break; |
1250 | } | |
1251 | ||
7c3df132 | 1252 | ql_log(ql_log_warn, vha, 0x5046, |
cfb0919c CD |
1253 | "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x " |
1254 | "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle, | |
1255 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
1256 | status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1), | |
ac280b67 | 1257 | le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6), |
7c3df132 | 1258 | le16_to_cpu(mbx->mb7)); |
ac280b67 | 1259 | |
99b0bec7 | 1260 | logio_done: |
9ba56b95 | 1261 | sp->done(vha, sp, 0); |
ac280b67 AV |
1262 | } |
1263 | ||
9bc4f4fb HZ |
1264 | static void |
1265 | qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1266 | sts_entry_t *pkt, int iocb_type) | |
1267 | { | |
1268 | const char func[] = "CT_IOCB"; | |
1269 | const char *type; | |
9bc4f4fb | 1270 | srb_t *sp; |
9bc4f4fb HZ |
1271 | struct fc_bsg_job *bsg_job; |
1272 | uint16_t comp_status; | |
9ba56b95 | 1273 | int res; |
9bc4f4fb HZ |
1274 | |
1275 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
1276 | if (!sp) | |
1277 | return; | |
1278 | ||
9ba56b95 | 1279 | bsg_job = sp->u.bsg_job; |
9bc4f4fb | 1280 | |
9ba56b95 | 1281 | type = "ct pass-through"; |
9bc4f4fb HZ |
1282 | |
1283 | comp_status = le16_to_cpu(pkt->comp_status); | |
1284 | ||
1285 | /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT | |
1286 | * fc payload to the caller | |
1287 | */ | |
1288 | bsg_job->reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK; | |
1289 | bsg_job->reply_len = sizeof(struct fc_bsg_reply); | |
1290 | ||
1291 | if (comp_status != CS_COMPLETE) { | |
1292 | if (comp_status == CS_DATA_UNDERRUN) { | |
9ba56b95 | 1293 | res = DID_OK << 16; |
9bc4f4fb HZ |
1294 | bsg_job->reply->reply_payload_rcv_len = |
1295 | le16_to_cpu(((sts_entry_t *)pkt)->rsp_info_len); | |
1296 | ||
7c3df132 SK |
1297 | ql_log(ql_log_warn, vha, 0x5048, |
1298 | "CT pass-through-%s error " | |
9bc4f4fb | 1299 | "comp_status-status=0x%x total_byte = 0x%x.\n", |
7c3df132 SK |
1300 | type, comp_status, |
1301 | bsg_job->reply->reply_payload_rcv_len); | |
9bc4f4fb | 1302 | } else { |
7c3df132 SK |
1303 | ql_log(ql_log_warn, vha, 0x5049, |
1304 | "CT pass-through-%s error " | |
1305 | "comp_status-status=0x%x.\n", type, comp_status); | |
9ba56b95 | 1306 | res = DID_ERROR << 16; |
9bc4f4fb HZ |
1307 | bsg_job->reply->reply_payload_rcv_len = 0; |
1308 | } | |
cfb0919c | 1309 | ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035, |
7c3df132 | 1310 | (uint8_t *)pkt, sizeof(*pkt)); |
9bc4f4fb | 1311 | } else { |
9ba56b95 | 1312 | res = DID_OK << 16; |
9bc4f4fb HZ |
1313 | bsg_job->reply->reply_payload_rcv_len = |
1314 | bsg_job->reply_payload.payload_len; | |
1315 | bsg_job->reply_len = 0; | |
1316 | } | |
1317 | ||
9ba56b95 | 1318 | sp->done(vha, sp, res); |
9bc4f4fb HZ |
1319 | } |
1320 | ||
9a069e19 GM |
1321 | static void |
1322 | qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1323 | struct sts_entry_24xx *pkt, int iocb_type) | |
1324 | { | |
1325 | const char func[] = "ELS_CT_IOCB"; | |
1326 | const char *type; | |
9a069e19 | 1327 | srb_t *sp; |
9a069e19 GM |
1328 | struct fc_bsg_job *bsg_job; |
1329 | uint16_t comp_status; | |
1330 | uint32_t fw_status[3]; | |
1331 | uint8_t* fw_sts_ptr; | |
9ba56b95 | 1332 | int res; |
9a069e19 GM |
1333 | |
1334 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
1335 | if (!sp) | |
1336 | return; | |
9ba56b95 | 1337 | bsg_job = sp->u.bsg_job; |
9a069e19 GM |
1338 | |
1339 | type = NULL; | |
9ba56b95 | 1340 | switch (sp->type) { |
9a069e19 GM |
1341 | case SRB_ELS_CMD_RPT: |
1342 | case SRB_ELS_CMD_HST: | |
1343 | type = "els"; | |
1344 | break; | |
1345 | case SRB_CT_CMD: | |
1346 | type = "ct pass-through"; | |
1347 | break; | |
1348 | default: | |
37fed3ee | 1349 | ql_dbg(ql_dbg_user, vha, 0x503e, |
9ba56b95 | 1350 | "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type); |
9a069e19 GM |
1351 | return; |
1352 | } | |
1353 | ||
1354 | comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status); | |
1355 | fw_status[1] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_1); | |
1356 | fw_status[2] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_2); | |
1357 | ||
1358 | /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT | |
1359 | * fc payload to the caller | |
1360 | */ | |
1361 | bsg_job->reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK; | |
1362 | bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status); | |
1363 | ||
1364 | if (comp_status != CS_COMPLETE) { | |
1365 | if (comp_status == CS_DATA_UNDERRUN) { | |
9ba56b95 | 1366 | res = DID_OK << 16; |
9a069e19 | 1367 | bsg_job->reply->reply_payload_rcv_len = |
9ba56b95 | 1368 | le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->total_byte_count); |
9a069e19 | 1369 | |
37fed3ee | 1370 | ql_dbg(ql_dbg_user, vha, 0x503f, |
cfb0919c | 1371 | "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x " |
9a069e19 | 1372 | "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n", |
cfb0919c | 1373 | type, sp->handle, comp_status, fw_status[1], fw_status[2], |
7c3df132 SK |
1374 | le16_to_cpu(((struct els_sts_entry_24xx *) |
1375 | pkt)->total_byte_count)); | |
9a069e19 GM |
1376 | fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply); |
1377 | memcpy( fw_sts_ptr, fw_status, sizeof(fw_status)); | |
1378 | } | |
1379 | else { | |
37fed3ee | 1380 | ql_dbg(ql_dbg_user, vha, 0x5040, |
cfb0919c | 1381 | "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x " |
9a069e19 | 1382 | "error subcode 1=0x%x error subcode 2=0x%x.\n", |
cfb0919c | 1383 | type, sp->handle, comp_status, |
7c3df132 SK |
1384 | le16_to_cpu(((struct els_sts_entry_24xx *) |
1385 | pkt)->error_subcode_1), | |
1386 | le16_to_cpu(((struct els_sts_entry_24xx *) | |
1387 | pkt)->error_subcode_2)); | |
9ba56b95 | 1388 | res = DID_ERROR << 16; |
9a069e19 GM |
1389 | bsg_job->reply->reply_payload_rcv_len = 0; |
1390 | fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply); | |
1391 | memcpy( fw_sts_ptr, fw_status, sizeof(fw_status)); | |
1392 | } | |
37fed3ee | 1393 | ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056, |
7c3df132 | 1394 | (uint8_t *)pkt, sizeof(*pkt)); |
9a069e19 GM |
1395 | } |
1396 | else { | |
9ba56b95 | 1397 | res = DID_OK << 16; |
9a069e19 GM |
1398 | bsg_job->reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len; |
1399 | bsg_job->reply_len = 0; | |
1400 | } | |
1401 | ||
9ba56b95 | 1402 | sp->done(vha, sp, res); |
9a069e19 GM |
1403 | } |
1404 | ||
ac280b67 AV |
1405 | static void |
1406 | qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1407 | struct logio_entry_24xx *logio) | |
1408 | { | |
1409 | const char func[] = "LOGIO-IOCB"; | |
1410 | const char *type; | |
ac280b67 AV |
1411 | fc_port_t *fcport; |
1412 | srb_t *sp; | |
4916392b | 1413 | struct srb_iocb *lio; |
99b0bec7 | 1414 | uint16_t *data; |
ac280b67 AV |
1415 | uint32_t iop[2]; |
1416 | ||
1417 | sp = qla2x00_get_sp_from_handle(vha, func, req, logio); | |
1418 | if (!sp) | |
1419 | return; | |
1420 | ||
9ba56b95 GM |
1421 | lio = &sp->u.iocb_cmd; |
1422 | type = sp->name; | |
ac280b67 | 1423 | fcport = sp->fcport; |
4916392b | 1424 | data = lio->u.logio.data; |
ac280b67 | 1425 | |
5ff1d584 | 1426 | data[0] = MBS_COMMAND_ERROR; |
4916392b | 1427 | data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? |
5ff1d584 | 1428 | QLA_LOGIO_LOGIN_RETRIED : 0; |
ac280b67 | 1429 | if (logio->entry_status) { |
5e19ed90 | 1430 | ql_log(ql_log_warn, fcport->vha, 0x5034, |
cfb0919c | 1431 | "Async-%s error entry - hdl=%x" |
d3fa9e7d | 1432 | "portid=%02x%02x%02x entry-status=%x.\n", |
cfb0919c CD |
1433 | type, sp->handle, fcport->d_id.b.domain, |
1434 | fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
1435 | logio->entry_status); | |
1436 | ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d, | |
7c3df132 | 1437 | (uint8_t *)logio, sizeof(*logio)); |
ac280b67 | 1438 | |
99b0bec7 | 1439 | goto logio_done; |
ac280b67 AV |
1440 | } |
1441 | ||
1442 | if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) { | |
5e19ed90 | 1443 | ql_dbg(ql_dbg_async, fcport->vha, 0x5036, |
cfb0919c CD |
1444 | "Async-%s complete - hdl=%x portid=%02x%02x%02x " |
1445 | "iop0=%x.\n", type, sp->handle, fcport->d_id.b.domain, | |
1446 | fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
7c3df132 | 1447 | le32_to_cpu(logio->io_parameter[0])); |
ac280b67 AV |
1448 | |
1449 | data[0] = MBS_COMMAND_COMPLETE; | |
9ba56b95 | 1450 | if (sp->type != SRB_LOGIN_CMD) |
99b0bec7 | 1451 | goto logio_done; |
ac280b67 AV |
1452 | |
1453 | iop[0] = le32_to_cpu(logio->io_parameter[0]); | |
1454 | if (iop[0] & BIT_4) { | |
1455 | fcport->port_type = FCT_TARGET; | |
1456 | if (iop[0] & BIT_8) | |
8474f3a0 | 1457 | fcport->flags |= FCF_FCP2_DEVICE; |
b0cd579c | 1458 | } else if (iop[0] & BIT_5) |
ac280b67 | 1459 | fcport->port_type = FCT_INITIATOR; |
b0cd579c | 1460 | |
2d70c103 NB |
1461 | if (iop[0] & BIT_7) |
1462 | fcport->flags |= FCF_CONF_COMP_SUPPORTED; | |
1463 | ||
ac280b67 AV |
1464 | if (logio->io_parameter[7] || logio->io_parameter[8]) |
1465 | fcport->supported_classes |= FC_COS_CLASS2; | |
1466 | if (logio->io_parameter[9] || logio->io_parameter[10]) | |
1467 | fcport->supported_classes |= FC_COS_CLASS3; | |
1468 | ||
99b0bec7 | 1469 | goto logio_done; |
ac280b67 AV |
1470 | } |
1471 | ||
1472 | iop[0] = le32_to_cpu(logio->io_parameter[0]); | |
1473 | iop[1] = le32_to_cpu(logio->io_parameter[1]); | |
1474 | switch (iop[0]) { | |
1475 | case LSC_SCODE_PORTID_USED: | |
1476 | data[0] = MBS_PORT_ID_USED; | |
1477 | data[1] = LSW(iop[1]); | |
1478 | break; | |
1479 | case LSC_SCODE_NPORT_USED: | |
1480 | data[0] = MBS_LOOP_ID_USED; | |
1481 | break; | |
ac280b67 AV |
1482 | default: |
1483 | data[0] = MBS_COMMAND_ERROR; | |
ac280b67 AV |
1484 | break; |
1485 | } | |
1486 | ||
5e19ed90 | 1487 | ql_dbg(ql_dbg_async, fcport->vha, 0x5037, |
cfb0919c CD |
1488 | "Async-%s failed - hdl=%x portid=%02x%02x%02x comp=%x " |
1489 | "iop0=%x iop1=%x.\n", type, sp->handle, fcport->d_id.b.domain, | |
d3fa9e7d | 1490 | fcport->d_id.b.area, fcport->d_id.b.al_pa, |
ac280b67 AV |
1491 | le16_to_cpu(logio->comp_status), |
1492 | le32_to_cpu(logio->io_parameter[0]), | |
7c3df132 | 1493 | le32_to_cpu(logio->io_parameter[1])); |
ac280b67 | 1494 | |
99b0bec7 | 1495 | logio_done: |
9ba56b95 | 1496 | sp->done(vha, sp, 0); |
ac280b67 AV |
1497 | } |
1498 | ||
3822263e MI |
1499 | static void |
1500 | qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1501 | struct tsk_mgmt_entry *tsk) | |
1502 | { | |
1503 | const char func[] = "TMF-IOCB"; | |
1504 | const char *type; | |
1505 | fc_port_t *fcport; | |
1506 | srb_t *sp; | |
1507 | struct srb_iocb *iocb; | |
3822263e MI |
1508 | struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk; |
1509 | int error = 1; | |
1510 | ||
1511 | sp = qla2x00_get_sp_from_handle(vha, func, req, tsk); | |
1512 | if (!sp) | |
1513 | return; | |
1514 | ||
9ba56b95 GM |
1515 | iocb = &sp->u.iocb_cmd; |
1516 | type = sp->name; | |
3822263e MI |
1517 | fcport = sp->fcport; |
1518 | ||
1519 | if (sts->entry_status) { | |
5e19ed90 | 1520 | ql_log(ql_log_warn, fcport->vha, 0x5038, |
cfb0919c CD |
1521 | "Async-%s error - hdl=%x entry-status(%x).\n", |
1522 | type, sp->handle, sts->entry_status); | |
3822263e | 1523 | } else if (sts->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) { |
5e19ed90 | 1524 | ql_log(ql_log_warn, fcport->vha, 0x5039, |
cfb0919c CD |
1525 | "Async-%s error - hdl=%x completion status(%x).\n", |
1526 | type, sp->handle, sts->comp_status); | |
3822263e MI |
1527 | } else if (!(le16_to_cpu(sts->scsi_status) & |
1528 | SS_RESPONSE_INFO_LEN_VALID)) { | |
5e19ed90 | 1529 | ql_log(ql_log_warn, fcport->vha, 0x503a, |
cfb0919c CD |
1530 | "Async-%s error - hdl=%x no response info(%x).\n", |
1531 | type, sp->handle, sts->scsi_status); | |
3822263e | 1532 | } else if (le32_to_cpu(sts->rsp_data_len) < 4) { |
5e19ed90 | 1533 | ql_log(ql_log_warn, fcport->vha, 0x503b, |
cfb0919c CD |
1534 | "Async-%s error - hdl=%x not enough response(%d).\n", |
1535 | type, sp->handle, sts->rsp_data_len); | |
3822263e | 1536 | } else if (sts->data[3]) { |
5e19ed90 | 1537 | ql_log(ql_log_warn, fcport->vha, 0x503c, |
cfb0919c CD |
1538 | "Async-%s error - hdl=%x response(%x).\n", |
1539 | type, sp->handle, sts->data[3]); | |
3822263e MI |
1540 | } else { |
1541 | error = 0; | |
1542 | } | |
1543 | ||
1544 | if (error) { | |
1545 | iocb->u.tmf.data = error; | |
7c3df132 SK |
1546 | ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5055, |
1547 | (uint8_t *)sts, sizeof(*sts)); | |
3822263e MI |
1548 | } |
1549 | ||
9ba56b95 | 1550 | sp->done(vha, sp, 0); |
3822263e MI |
1551 | } |
1552 | ||
1da177e4 LT |
1553 | /** |
1554 | * qla2x00_process_response_queue() - Process response queue entries. | |
1555 | * @ha: SCSI driver HA context | |
1556 | */ | |
1557 | void | |
73208dfd | 1558 | qla2x00_process_response_queue(struct rsp_que *rsp) |
1da177e4 | 1559 | { |
73208dfd AC |
1560 | struct scsi_qla_host *vha; |
1561 | struct qla_hw_data *ha = rsp->hw; | |
3d71644c | 1562 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 LT |
1563 | sts_entry_t *pkt; |
1564 | uint16_t handle_cnt; | |
1565 | uint16_t cnt; | |
73208dfd | 1566 | |
2afa19a9 | 1567 | vha = pci_get_drvdata(ha->pdev); |
1da177e4 | 1568 | |
e315cd28 | 1569 | if (!vha->flags.online) |
1da177e4 LT |
1570 | return; |
1571 | ||
e315cd28 AC |
1572 | while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) { |
1573 | pkt = (sts_entry_t *)rsp->ring_ptr; | |
1da177e4 | 1574 | |
e315cd28 AC |
1575 | rsp->ring_index++; |
1576 | if (rsp->ring_index == rsp->length) { | |
1577 | rsp->ring_index = 0; | |
1578 | rsp->ring_ptr = rsp->ring; | |
1da177e4 | 1579 | } else { |
e315cd28 | 1580 | rsp->ring_ptr++; |
1da177e4 LT |
1581 | } |
1582 | ||
1583 | if (pkt->entry_status != 0) { | |
73208dfd | 1584 | qla2x00_error_entry(vha, rsp, pkt); |
1da177e4 LT |
1585 | ((response_t *)pkt)->signature = RESPONSE_PROCESSED; |
1586 | wmb(); | |
1587 | continue; | |
1588 | } | |
1589 | ||
1590 | switch (pkt->entry_type) { | |
1591 | case STATUS_TYPE: | |
73208dfd | 1592 | qla2x00_status_entry(vha, rsp, pkt); |
1da177e4 LT |
1593 | break; |
1594 | case STATUS_TYPE_21: | |
1595 | handle_cnt = ((sts21_entry_t *)pkt)->handle_count; | |
1596 | for (cnt = 0; cnt < handle_cnt; cnt++) { | |
73208dfd | 1597 | qla2x00_process_completed_request(vha, rsp->req, |
1da177e4 LT |
1598 | ((sts21_entry_t *)pkt)->handle[cnt]); |
1599 | } | |
1600 | break; | |
1601 | case STATUS_TYPE_22: | |
1602 | handle_cnt = ((sts22_entry_t *)pkt)->handle_count; | |
1603 | for (cnt = 0; cnt < handle_cnt; cnt++) { | |
73208dfd | 1604 | qla2x00_process_completed_request(vha, rsp->req, |
1da177e4 LT |
1605 | ((sts22_entry_t *)pkt)->handle[cnt]); |
1606 | } | |
1607 | break; | |
1608 | case STATUS_CONT_TYPE: | |
2afa19a9 | 1609 | qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt); |
1da177e4 | 1610 | break; |
ac280b67 AV |
1611 | case MBX_IOCB_TYPE: |
1612 | qla2x00_mbx_iocb_entry(vha, rsp->req, | |
1613 | (struct mbx_entry *)pkt); | |
3822263e | 1614 | break; |
9bc4f4fb HZ |
1615 | case CT_IOCB_TYPE: |
1616 | qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE); | |
1617 | break; | |
1da177e4 LT |
1618 | default: |
1619 | /* Type Not Supported. */ | |
7c3df132 SK |
1620 | ql_log(ql_log_warn, vha, 0x504a, |
1621 | "Received unknown response pkt type %x " | |
1da177e4 | 1622 | "entry status=%x.\n", |
7c3df132 | 1623 | pkt->entry_type, pkt->entry_status); |
1da177e4 LT |
1624 | break; |
1625 | } | |
1626 | ((response_t *)pkt)->signature = RESPONSE_PROCESSED; | |
1627 | wmb(); | |
1628 | } | |
1629 | ||
1630 | /* Adjust ring index */ | |
e315cd28 | 1631 | WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index); |
1da177e4 LT |
1632 | } |
1633 | ||
4733fcb1 | 1634 | static inline void |
5544213b | 1635 | qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len, |
9ba56b95 | 1636 | uint32_t sense_len, struct rsp_que *rsp, int res) |
4733fcb1 | 1637 | { |
7c3df132 | 1638 | struct scsi_qla_host *vha = sp->fcport->vha; |
9ba56b95 GM |
1639 | struct scsi_cmnd *cp = GET_CMD_SP(sp); |
1640 | uint32_t track_sense_len; | |
4733fcb1 AV |
1641 | |
1642 | if (sense_len >= SCSI_SENSE_BUFFERSIZE) | |
1643 | sense_len = SCSI_SENSE_BUFFERSIZE; | |
1644 | ||
9ba56b95 GM |
1645 | SET_CMD_SENSE_LEN(sp, sense_len); |
1646 | SET_CMD_SENSE_PTR(sp, cp->sense_buffer); | |
1647 | track_sense_len = sense_len; | |
1648 | ||
1649 | if (sense_len > par_sense_len) | |
5544213b | 1650 | sense_len = par_sense_len; |
4733fcb1 AV |
1651 | |
1652 | memcpy(cp->sense_buffer, sense_data, sense_len); | |
1653 | ||
9ba56b95 GM |
1654 | SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len); |
1655 | track_sense_len -= sense_len; | |
1656 | SET_CMD_SENSE_LEN(sp, track_sense_len); | |
1657 | ||
1658 | if (track_sense_len != 0) { | |
2afa19a9 | 1659 | rsp->status_srb = sp; |
9ba56b95 GM |
1660 | cp->result = res; |
1661 | } | |
4733fcb1 | 1662 | |
cfb0919c CD |
1663 | if (sense_len) { |
1664 | ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c, | |
1665 | "Check condition Sense data, nexus%ld:%d:%d cmd=%p.\n", | |
1666 | sp->fcport->vha->host_no, cp->device->id, cp->device->lun, | |
1667 | cp); | |
7c3df132 SK |
1668 | ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b, |
1669 | cp->sense_buffer, sense_len); | |
cfb0919c | 1670 | } |
4733fcb1 AV |
1671 | } |
1672 | ||
bad75002 AE |
1673 | struct scsi_dif_tuple { |
1674 | __be16 guard; /* Checksum */ | |
d6a03581 | 1675 | __be16 app_tag; /* APPL identifier */ |
bad75002 AE |
1676 | __be32 ref_tag; /* Target LBA or indirect LBA */ |
1677 | }; | |
1678 | ||
1679 | /* | |
1680 | * Checks the guard or meta-data for the type of error | |
1681 | * detected by the HBA. In case of errors, we set the | |
1682 | * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST | |
1683 | * to indicate to the kernel that the HBA detected error. | |
1684 | */ | |
8cb2049c | 1685 | static inline int |
bad75002 AE |
1686 | qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24) |
1687 | { | |
7c3df132 | 1688 | struct scsi_qla_host *vha = sp->fcport->vha; |
9ba56b95 | 1689 | struct scsi_cmnd *cmd = GET_CMD_SP(sp); |
8cb2049c AE |
1690 | uint8_t *ap = &sts24->data[12]; |
1691 | uint8_t *ep = &sts24->data[20]; | |
bad75002 AE |
1692 | uint32_t e_ref_tag, a_ref_tag; |
1693 | uint16_t e_app_tag, a_app_tag; | |
1694 | uint16_t e_guard, a_guard; | |
1695 | ||
8cb2049c AE |
1696 | /* |
1697 | * swab32 of the "data" field in the beginning of qla2x00_status_entry() | |
1698 | * would make guard field appear at offset 2 | |
1699 | */ | |
1700 | a_guard = le16_to_cpu(*(uint16_t *)(ap + 2)); | |
1701 | a_app_tag = le16_to_cpu(*(uint16_t *)(ap + 0)); | |
1702 | a_ref_tag = le32_to_cpu(*(uint32_t *)(ap + 4)); | |
1703 | e_guard = le16_to_cpu(*(uint16_t *)(ep + 2)); | |
1704 | e_app_tag = le16_to_cpu(*(uint16_t *)(ep + 0)); | |
1705 | e_ref_tag = le32_to_cpu(*(uint32_t *)(ep + 4)); | |
bad75002 | 1706 | |
7c3df132 SK |
1707 | ql_dbg(ql_dbg_io, vha, 0x3023, |
1708 | "iocb(s) %p Returned STATUS.\n", sts24); | |
bad75002 | 1709 | |
7c3df132 SK |
1710 | ql_dbg(ql_dbg_io, vha, 0x3024, |
1711 | "DIF ERROR in cmd 0x%x lba 0x%llx act ref" | |
bad75002 | 1712 | " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app" |
7c3df132 | 1713 | " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n", |
bad75002 | 1714 | cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag, |
7c3df132 | 1715 | a_app_tag, e_app_tag, a_guard, e_guard); |
bad75002 | 1716 | |
8cb2049c AE |
1717 | /* |
1718 | * Ignore sector if: | |
1719 | * For type 3: ref & app tag is all 'f's | |
1720 | * For type 0,1,2: app tag is all 'f's | |
1721 | */ | |
1722 | if ((a_app_tag == 0xffff) && | |
1723 | ((scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3) || | |
1724 | (a_ref_tag == 0xffffffff))) { | |
1725 | uint32_t blocks_done, resid; | |
1726 | sector_t lba_s = scsi_get_lba(cmd); | |
1727 | ||
1728 | /* 2TB boundary case covered automatically with this */ | |
1729 | blocks_done = e_ref_tag - (uint32_t)lba_s + 1; | |
1730 | ||
1731 | resid = scsi_bufflen(cmd) - (blocks_done * | |
1732 | cmd->device->sector_size); | |
1733 | ||
1734 | scsi_set_resid(cmd, resid); | |
1735 | cmd->result = DID_OK << 16; | |
1736 | ||
1737 | /* Update protection tag */ | |
1738 | if (scsi_prot_sg_count(cmd)) { | |
1739 | uint32_t i, j = 0, k = 0, num_ent; | |
1740 | struct scatterlist *sg; | |
1741 | struct sd_dif_tuple *spt; | |
1742 | ||
1743 | /* Patch the corresponding protection tags */ | |
1744 | scsi_for_each_prot_sg(cmd, sg, | |
1745 | scsi_prot_sg_count(cmd), i) { | |
1746 | num_ent = sg_dma_len(sg) / 8; | |
1747 | if (k + num_ent < blocks_done) { | |
1748 | k += num_ent; | |
1749 | continue; | |
1750 | } | |
1751 | j = blocks_done - k - 1; | |
1752 | k = blocks_done; | |
1753 | break; | |
1754 | } | |
1755 | ||
1756 | if (k != blocks_done) { | |
cfb0919c | 1757 | ql_log(ql_log_warn, vha, 0x302f, |
8ec9c7fb RD |
1758 | "unexpected tag values tag:lba=%x:%llx)\n", |
1759 | e_ref_tag, (unsigned long long)lba_s); | |
8cb2049c AE |
1760 | return 1; |
1761 | } | |
1762 | ||
1763 | spt = page_address(sg_page(sg)) + sg->offset; | |
1764 | spt += j; | |
1765 | ||
1766 | spt->app_tag = 0xffff; | |
1767 | if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3) | |
1768 | spt->ref_tag = 0xffffffff; | |
1769 | } | |
1770 | ||
1771 | return 0; | |
1772 | } | |
1773 | ||
bad75002 AE |
1774 | /* check guard */ |
1775 | if (e_guard != a_guard) { | |
1776 | scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, | |
1777 | 0x10, 0x1); | |
1778 | set_driver_byte(cmd, DRIVER_SENSE); | |
1779 | set_host_byte(cmd, DID_ABORT); | |
1780 | cmd->result |= SAM_STAT_CHECK_CONDITION << 1; | |
8cb2049c | 1781 | return 1; |
bad75002 AE |
1782 | } |
1783 | ||
e02587d7 AE |
1784 | /* check ref tag */ |
1785 | if (e_ref_tag != a_ref_tag) { | |
bad75002 | 1786 | scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, |
e02587d7 | 1787 | 0x10, 0x3); |
bad75002 AE |
1788 | set_driver_byte(cmd, DRIVER_SENSE); |
1789 | set_host_byte(cmd, DID_ABORT); | |
1790 | cmd->result |= SAM_STAT_CHECK_CONDITION << 1; | |
8cb2049c | 1791 | return 1; |
bad75002 AE |
1792 | } |
1793 | ||
e02587d7 AE |
1794 | /* check appl tag */ |
1795 | if (e_app_tag != a_app_tag) { | |
bad75002 | 1796 | scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, |
e02587d7 | 1797 | 0x10, 0x2); |
bad75002 AE |
1798 | set_driver_byte(cmd, DRIVER_SENSE); |
1799 | set_host_byte(cmd, DID_ABORT); | |
1800 | cmd->result |= SAM_STAT_CHECK_CONDITION << 1; | |
8cb2049c | 1801 | return 1; |
bad75002 | 1802 | } |
e02587d7 | 1803 | |
8cb2049c | 1804 | return 1; |
bad75002 AE |
1805 | } |
1806 | ||
a9b6f722 SK |
1807 | static void |
1808 | qla25xx_process_bidir_status_iocb(scsi_qla_host_t *vha, void *pkt, | |
1809 | struct req_que *req, uint32_t index) | |
1810 | { | |
1811 | struct qla_hw_data *ha = vha->hw; | |
1812 | srb_t *sp; | |
1813 | uint16_t comp_status; | |
1814 | uint16_t scsi_status; | |
1815 | uint16_t thread_id; | |
1816 | uint32_t rval = EXT_STATUS_OK; | |
1817 | struct fc_bsg_job *bsg_job = NULL; | |
1818 | sts_entry_t *sts; | |
1819 | struct sts_entry_24xx *sts24; | |
1820 | sts = (sts_entry_t *) pkt; | |
1821 | sts24 = (struct sts_entry_24xx *) pkt; | |
1822 | ||
1823 | /* Validate handle. */ | |
8d93f550 | 1824 | if (index >= req->num_outstanding_cmds) { |
a9b6f722 SK |
1825 | ql_log(ql_log_warn, vha, 0x70af, |
1826 | "Invalid SCSI completion handle 0x%x.\n", index); | |
1827 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1828 | return; | |
1829 | } | |
1830 | ||
1831 | sp = req->outstanding_cmds[index]; | |
1832 | if (sp) { | |
1833 | /* Free outstanding command slot. */ | |
1834 | req->outstanding_cmds[index] = NULL; | |
1835 | bsg_job = sp->u.bsg_job; | |
1836 | } else { | |
1837 | ql_log(ql_log_warn, vha, 0x70b0, | |
1838 | "Req:%d: Invalid ISP SCSI completion handle(0x%x)\n", | |
1839 | req->id, index); | |
1840 | ||
1841 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1842 | return; | |
1843 | } | |
1844 | ||
1845 | if (IS_FWI2_CAPABLE(ha)) { | |
1846 | comp_status = le16_to_cpu(sts24->comp_status); | |
1847 | scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK; | |
1848 | } else { | |
1849 | comp_status = le16_to_cpu(sts->comp_status); | |
1850 | scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK; | |
1851 | } | |
1852 | ||
1853 | thread_id = bsg_job->request->rqst_data.h_vendor.vendor_cmd[1]; | |
1854 | switch (comp_status) { | |
1855 | case CS_COMPLETE: | |
1856 | if (scsi_status == 0) { | |
1857 | bsg_job->reply->reply_payload_rcv_len = | |
1858 | bsg_job->reply_payload.payload_len; | |
fabbb8df JC |
1859 | vha->qla_stats.input_bytes += |
1860 | bsg_job->reply->reply_payload_rcv_len; | |
1861 | vha->qla_stats.input_requests++; | |
a9b6f722 SK |
1862 | rval = EXT_STATUS_OK; |
1863 | } | |
1864 | goto done; | |
1865 | ||
1866 | case CS_DATA_OVERRUN: | |
1867 | ql_dbg(ql_dbg_user, vha, 0x70b1, | |
1868 | "Command completed with date overrun thread_id=%d\n", | |
1869 | thread_id); | |
1870 | rval = EXT_STATUS_DATA_OVERRUN; | |
1871 | break; | |
1872 | ||
1873 | case CS_DATA_UNDERRUN: | |
1874 | ql_dbg(ql_dbg_user, vha, 0x70b2, | |
1875 | "Command completed with date underrun thread_id=%d\n", | |
1876 | thread_id); | |
1877 | rval = EXT_STATUS_DATA_UNDERRUN; | |
1878 | break; | |
1879 | case CS_BIDIR_RD_OVERRUN: | |
1880 | ql_dbg(ql_dbg_user, vha, 0x70b3, | |
1881 | "Command completed with read data overrun thread_id=%d\n", | |
1882 | thread_id); | |
1883 | rval = EXT_STATUS_DATA_OVERRUN; | |
1884 | break; | |
1885 | ||
1886 | case CS_BIDIR_RD_WR_OVERRUN: | |
1887 | ql_dbg(ql_dbg_user, vha, 0x70b4, | |
1888 | "Command completed with read and write data overrun " | |
1889 | "thread_id=%d\n", thread_id); | |
1890 | rval = EXT_STATUS_DATA_OVERRUN; | |
1891 | break; | |
1892 | ||
1893 | case CS_BIDIR_RD_OVERRUN_WR_UNDERRUN: | |
1894 | ql_dbg(ql_dbg_user, vha, 0x70b5, | |
1895 | "Command completed with read data over and write data " | |
1896 | "underrun thread_id=%d\n", thread_id); | |
1897 | rval = EXT_STATUS_DATA_OVERRUN; | |
1898 | break; | |
1899 | ||
1900 | case CS_BIDIR_RD_UNDERRUN: | |
1901 | ql_dbg(ql_dbg_user, vha, 0x70b6, | |
1902 | "Command completed with read data data underrun " | |
1903 | "thread_id=%d\n", thread_id); | |
1904 | rval = EXT_STATUS_DATA_UNDERRUN; | |
1905 | break; | |
1906 | ||
1907 | case CS_BIDIR_RD_UNDERRUN_WR_OVERRUN: | |
1908 | ql_dbg(ql_dbg_user, vha, 0x70b7, | |
1909 | "Command completed with read data under and write data " | |
1910 | "overrun thread_id=%d\n", thread_id); | |
1911 | rval = EXT_STATUS_DATA_UNDERRUN; | |
1912 | break; | |
1913 | ||
1914 | case CS_BIDIR_RD_WR_UNDERRUN: | |
1915 | ql_dbg(ql_dbg_user, vha, 0x70b8, | |
1916 | "Command completed with read and write data underrun " | |
1917 | "thread_id=%d\n", thread_id); | |
1918 | rval = EXT_STATUS_DATA_UNDERRUN; | |
1919 | break; | |
1920 | ||
1921 | case CS_BIDIR_DMA: | |
1922 | ql_dbg(ql_dbg_user, vha, 0x70b9, | |
1923 | "Command completed with data DMA error thread_id=%d\n", | |
1924 | thread_id); | |
1925 | rval = EXT_STATUS_DMA_ERR; | |
1926 | break; | |
1927 | ||
1928 | case CS_TIMEOUT: | |
1929 | ql_dbg(ql_dbg_user, vha, 0x70ba, | |
1930 | "Command completed with timeout thread_id=%d\n", | |
1931 | thread_id); | |
1932 | rval = EXT_STATUS_TIMEOUT; | |
1933 | break; | |
1934 | default: | |
1935 | ql_dbg(ql_dbg_user, vha, 0x70bb, | |
1936 | "Command completed with completion status=0x%x " | |
1937 | "thread_id=%d\n", comp_status, thread_id); | |
1938 | rval = EXT_STATUS_ERR; | |
1939 | break; | |
1940 | } | |
1941 | bsg_job->reply->reply_payload_rcv_len = 0; | |
1942 | ||
1943 | done: | |
1944 | /* Return the vendor specific reply to API */ | |
1945 | bsg_job->reply->reply_data.vendor_reply.vendor_rsp[0] = rval; | |
1946 | bsg_job->reply_len = sizeof(struct fc_bsg_reply); | |
1947 | /* Always return DID_OK, bsg will send the vendor specific response | |
1948 | * in this case only */ | |
1949 | sp->done(vha, sp, (DID_OK << 6)); | |
1950 | ||
1951 | } | |
1952 | ||
1da177e4 LT |
1953 | /** |
1954 | * qla2x00_status_entry() - Process a Status IOCB entry. | |
1955 | * @ha: SCSI driver HA context | |
1956 | * @pkt: Entry pointer | |
1957 | */ | |
1958 | static void | |
73208dfd | 1959 | qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt) |
1da177e4 | 1960 | { |
1da177e4 | 1961 | srb_t *sp; |
1da177e4 LT |
1962 | fc_port_t *fcport; |
1963 | struct scsi_cmnd *cp; | |
9a853f71 AV |
1964 | sts_entry_t *sts; |
1965 | struct sts_entry_24xx *sts24; | |
1da177e4 LT |
1966 | uint16_t comp_status; |
1967 | uint16_t scsi_status; | |
b7d2280c | 1968 | uint16_t ox_id; |
1da177e4 LT |
1969 | uint8_t lscsi_status; |
1970 | int32_t resid; | |
5544213b AV |
1971 | uint32_t sense_len, par_sense_len, rsp_info_len, resid_len, |
1972 | fw_resid_len; | |
9a853f71 | 1973 | uint8_t *rsp_info, *sense_data; |
e315cd28 | 1974 | struct qla_hw_data *ha = vha->hw; |
2afa19a9 AC |
1975 | uint32_t handle; |
1976 | uint16_t que; | |
1977 | struct req_que *req; | |
b7d2280c | 1978 | int logit = 1; |
9ba56b95 | 1979 | int res = 0; |
a9b6f722 | 1980 | uint16_t state_flags = 0; |
9a853f71 AV |
1981 | |
1982 | sts = (sts_entry_t *) pkt; | |
1983 | sts24 = (struct sts_entry_24xx *) pkt; | |
e428924c | 1984 | if (IS_FWI2_CAPABLE(ha)) { |
9a853f71 AV |
1985 | comp_status = le16_to_cpu(sts24->comp_status); |
1986 | scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK; | |
a9b6f722 | 1987 | state_flags = le16_to_cpu(sts24->state_flags); |
9a853f71 AV |
1988 | } else { |
1989 | comp_status = le16_to_cpu(sts->comp_status); | |
1990 | scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK; | |
1991 | } | |
2afa19a9 AC |
1992 | handle = (uint32_t) LSW(sts->handle); |
1993 | que = MSW(sts->handle); | |
1994 | req = ha->req_q_map[que]; | |
a9083016 | 1995 | |
36008cf1 CD |
1996 | /* Check for invalid queue pointer */ |
1997 | if (req == NULL || | |
1998 | que >= find_first_zero_bit(ha->req_qid_map, ha->max_req_queues)) { | |
1999 | ql_dbg(ql_dbg_io, vha, 0x3059, | |
2000 | "Invalid status handle (0x%x): Bad req pointer. req=%p, " | |
2001 | "que=%u.\n", sts->handle, req, que); | |
2002 | return; | |
2003 | } | |
2004 | ||
1da177e4 | 2005 | /* Validate handle. */ |
8d93f550 | 2006 | if (handle < req->num_outstanding_cmds) |
2afa19a9 | 2007 | sp = req->outstanding_cmds[handle]; |
8d93f550 | 2008 | else |
1da177e4 LT |
2009 | sp = NULL; |
2010 | ||
2011 | if (sp == NULL) { | |
cfb0919c | 2012 | ql_dbg(ql_dbg_io, vha, 0x3017, |
7c3df132 | 2013 | "Invalid status handle (0x%x).\n", sts->handle); |
1da177e4 | 2014 | |
7ec0effd | 2015 | if (IS_P3P_TYPE(ha)) |
8f7daead GM |
2016 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); |
2017 | else | |
2018 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
e315cd28 | 2019 | qla2xxx_wake_dpc(vha); |
1da177e4 LT |
2020 | return; |
2021 | } | |
a9b6f722 SK |
2022 | |
2023 | if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) { | |
2024 | qla25xx_process_bidir_status_iocb(vha, pkt, req, handle); | |
2025 | return; | |
2026 | } | |
2027 | ||
2028 | /* Fast path completion. */ | |
2029 | if (comp_status == CS_COMPLETE && scsi_status == 0) { | |
2030 | qla2x00_process_completed_request(vha, req, handle); | |
2031 | ||
2032 | return; | |
2033 | } | |
2034 | ||
2035 | req->outstanding_cmds[handle] = NULL; | |
9ba56b95 | 2036 | cp = GET_CMD_SP(sp); |
1da177e4 | 2037 | if (cp == NULL) { |
cfb0919c | 2038 | ql_dbg(ql_dbg_io, vha, 0x3018, |
7c3df132 SK |
2039 | "Command already returned (0x%x/%p).\n", |
2040 | sts->handle, sp); | |
1da177e4 LT |
2041 | |
2042 | return; | |
2043 | } | |
2044 | ||
8ae6d9c7 | 2045 | lscsi_status = scsi_status & STATUS_MASK; |
1da177e4 | 2046 | |
bdf79621 | 2047 | fcport = sp->fcport; |
1da177e4 | 2048 | |
b7d2280c | 2049 | ox_id = 0; |
5544213b AV |
2050 | sense_len = par_sense_len = rsp_info_len = resid_len = |
2051 | fw_resid_len = 0; | |
e428924c | 2052 | if (IS_FWI2_CAPABLE(ha)) { |
0f00a206 LC |
2053 | if (scsi_status & SS_SENSE_LEN_VALID) |
2054 | sense_len = le32_to_cpu(sts24->sense_len); | |
2055 | if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) | |
2056 | rsp_info_len = le32_to_cpu(sts24->rsp_data_len); | |
2057 | if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) | |
2058 | resid_len = le32_to_cpu(sts24->rsp_residual_count); | |
2059 | if (comp_status == CS_DATA_UNDERRUN) | |
2060 | fw_resid_len = le32_to_cpu(sts24->residual_len); | |
9a853f71 AV |
2061 | rsp_info = sts24->data; |
2062 | sense_data = sts24->data; | |
2063 | host_to_fcp_swap(sts24->data, sizeof(sts24->data)); | |
b7d2280c | 2064 | ox_id = le16_to_cpu(sts24->ox_id); |
5544213b | 2065 | par_sense_len = sizeof(sts24->data); |
9a853f71 | 2066 | } else { |
0f00a206 LC |
2067 | if (scsi_status & SS_SENSE_LEN_VALID) |
2068 | sense_len = le16_to_cpu(sts->req_sense_length); | |
2069 | if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) | |
2070 | rsp_info_len = le16_to_cpu(sts->rsp_info_len); | |
9a853f71 AV |
2071 | resid_len = le32_to_cpu(sts->residual_length); |
2072 | rsp_info = sts->rsp_info; | |
2073 | sense_data = sts->req_sense_data; | |
5544213b | 2074 | par_sense_len = sizeof(sts->req_sense_data); |
9a853f71 AV |
2075 | } |
2076 | ||
1da177e4 LT |
2077 | /* Check for any FCP transport errors. */ |
2078 | if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) { | |
9a853f71 | 2079 | /* Sense data lies beyond any FCP RESPONSE data. */ |
5544213b | 2080 | if (IS_FWI2_CAPABLE(ha)) { |
9a853f71 | 2081 | sense_data += rsp_info_len; |
5544213b AV |
2082 | par_sense_len -= rsp_info_len; |
2083 | } | |
9a853f71 | 2084 | if (rsp_info_len > 3 && rsp_info[3]) { |
5e19ed90 | 2085 | ql_dbg(ql_dbg_io, fcport->vha, 0x3019, |
7c3df132 SK |
2086 | "FCP I/O protocol failure (0x%x/0x%x).\n", |
2087 | rsp_info_len, rsp_info[3]); | |
1da177e4 | 2088 | |
9ba56b95 | 2089 | res = DID_BUS_BUSY << 16; |
b7d2280c | 2090 | goto out; |
1da177e4 LT |
2091 | } |
2092 | } | |
2093 | ||
3e8ce320 AV |
2094 | /* Check for overrun. */ |
2095 | if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE && | |
2096 | scsi_status & SS_RESIDUAL_OVER) | |
2097 | comp_status = CS_DATA_OVERRUN; | |
2098 | ||
1da177e4 LT |
2099 | /* |
2100 | * Based on Host and scsi status generate status code for Linux | |
2101 | */ | |
2102 | switch (comp_status) { | |
2103 | case CS_COMPLETE: | |
df7baa50 | 2104 | case CS_QUEUE_FULL: |
1da177e4 | 2105 | if (scsi_status == 0) { |
9ba56b95 | 2106 | res = DID_OK << 16; |
1da177e4 LT |
2107 | break; |
2108 | } | |
2109 | if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) { | |
9a853f71 | 2110 | resid = resid_len; |
385d70b4 | 2111 | scsi_set_resid(cp, resid); |
0da69df1 AV |
2112 | |
2113 | if (!lscsi_status && | |
385d70b4 | 2114 | ((unsigned)(scsi_bufflen(cp) - resid) < |
0da69df1 | 2115 | cp->underflow)) { |
5e19ed90 | 2116 | ql_dbg(ql_dbg_io, fcport->vha, 0x301a, |
7c3df132 | 2117 | "Mid-layer underflow " |
b7d2280c | 2118 | "detected (0x%x of 0x%x bytes).\n", |
7c3df132 | 2119 | resid, scsi_bufflen(cp)); |
0da69df1 | 2120 | |
9ba56b95 | 2121 | res = DID_ERROR << 16; |
0da69df1 AV |
2122 | break; |
2123 | } | |
1da177e4 | 2124 | } |
9ba56b95 | 2125 | res = DID_OK << 16 | lscsi_status; |
1da177e4 | 2126 | |
df7baa50 | 2127 | if (lscsi_status == SAM_STAT_TASK_SET_FULL) { |
5e19ed90 | 2128 | ql_dbg(ql_dbg_io, fcport->vha, 0x301b, |
7c3df132 | 2129 | "QUEUE FULL detected.\n"); |
df7baa50 AV |
2130 | break; |
2131 | } | |
b7d2280c | 2132 | logit = 0; |
1da177e4 LT |
2133 | if (lscsi_status != SS_CHECK_CONDITION) |
2134 | break; | |
2135 | ||
b80ca4f7 | 2136 | memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); |
1da177e4 LT |
2137 | if (!(scsi_status & SS_SENSE_LEN_VALID)) |
2138 | break; | |
2139 | ||
5544213b | 2140 | qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len, |
9ba56b95 | 2141 | rsp, res); |
1da177e4 LT |
2142 | break; |
2143 | ||
2144 | case CS_DATA_UNDERRUN: | |
ed17c71b | 2145 | /* Use F/W calculated residual length. */ |
0f00a206 LC |
2146 | resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len; |
2147 | scsi_set_resid(cp, resid); | |
2148 | if (scsi_status & SS_RESIDUAL_UNDER) { | |
2149 | if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) { | |
5e19ed90 | 2150 | ql_dbg(ql_dbg_io, fcport->vha, 0x301d, |
7c3df132 SK |
2151 | "Dropped frame(s) detected " |
2152 | "(0x%x of 0x%x bytes).\n", | |
2153 | resid, scsi_bufflen(cp)); | |
0f00a206 | 2154 | |
9ba56b95 | 2155 | res = DID_ERROR << 16 | lscsi_status; |
4e85e3d9 | 2156 | goto check_scsi_status; |
6acf8190 | 2157 | } |
ed17c71b | 2158 | |
0f00a206 LC |
2159 | if (!lscsi_status && |
2160 | ((unsigned)(scsi_bufflen(cp) - resid) < | |
2161 | cp->underflow)) { | |
5e19ed90 | 2162 | ql_dbg(ql_dbg_io, fcport->vha, 0x301e, |
7c3df132 | 2163 | "Mid-layer underflow " |
b7d2280c | 2164 | "detected (0x%x of 0x%x bytes).\n", |
7c3df132 | 2165 | resid, scsi_bufflen(cp)); |
e038a1be | 2166 | |
9ba56b95 | 2167 | res = DID_ERROR << 16; |
0f00a206 LC |
2168 | break; |
2169 | } | |
4aee5766 GM |
2170 | } else if (lscsi_status != SAM_STAT_TASK_SET_FULL && |
2171 | lscsi_status != SAM_STAT_BUSY) { | |
2172 | /* | |
2173 | * scsi status of task set and busy are considered to be | |
2174 | * task not completed. | |
2175 | */ | |
2176 | ||
5e19ed90 | 2177 | ql_dbg(ql_dbg_io, fcport->vha, 0x301f, |
7c3df132 | 2178 | "Dropped frame(s) detected (0x%x " |
4aee5766 GM |
2179 | "of 0x%x bytes).\n", resid, |
2180 | scsi_bufflen(cp)); | |
0f00a206 | 2181 | |
9ba56b95 | 2182 | res = DID_ERROR << 16 | lscsi_status; |
0374f55e | 2183 | goto check_scsi_status; |
4aee5766 GM |
2184 | } else { |
2185 | ql_dbg(ql_dbg_io, fcport->vha, 0x3030, | |
2186 | "scsi_status: 0x%x, lscsi_status: 0x%x\n", | |
2187 | scsi_status, lscsi_status); | |
1da177e4 LT |
2188 | } |
2189 | ||
9ba56b95 | 2190 | res = DID_OK << 16 | lscsi_status; |
b7d2280c | 2191 | logit = 0; |
0f00a206 | 2192 | |
0374f55e | 2193 | check_scsi_status: |
1da177e4 | 2194 | /* |
fa2a1ce5 | 2195 | * Check to see if SCSI Status is non zero. If so report SCSI |
1da177e4 LT |
2196 | * Status. |
2197 | */ | |
2198 | if (lscsi_status != 0) { | |
ffec28a3 | 2199 | if (lscsi_status == SAM_STAT_TASK_SET_FULL) { |
5e19ed90 | 2200 | ql_dbg(ql_dbg_io, fcport->vha, 0x3020, |
7c3df132 | 2201 | "QUEUE FULL detected.\n"); |
b7d2280c | 2202 | logit = 1; |
ffec28a3 AV |
2203 | break; |
2204 | } | |
1da177e4 LT |
2205 | if (lscsi_status != SS_CHECK_CONDITION) |
2206 | break; | |
2207 | ||
b80ca4f7 | 2208 | memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); |
1da177e4 LT |
2209 | if (!(scsi_status & SS_SENSE_LEN_VALID)) |
2210 | break; | |
2211 | ||
5544213b | 2212 | qla2x00_handle_sense(sp, sense_data, par_sense_len, |
9ba56b95 | 2213 | sense_len, rsp, res); |
1da177e4 LT |
2214 | } |
2215 | break; | |
2216 | ||
1da177e4 LT |
2217 | case CS_PORT_LOGGED_OUT: |
2218 | case CS_PORT_CONFIG_CHG: | |
2219 | case CS_PORT_BUSY: | |
2220 | case CS_INCOMPLETE: | |
2221 | case CS_PORT_UNAVAILABLE: | |
b7d2280c | 2222 | case CS_TIMEOUT: |
ff454b01 CD |
2223 | case CS_RESET: |
2224 | ||
056a4483 MC |
2225 | /* |
2226 | * We are going to have the fc class block the rport | |
2227 | * while we try to recover so instruct the mid layer | |
2228 | * to requeue until the class decides how to handle this. | |
2229 | */ | |
9ba56b95 | 2230 | res = DID_TRANSPORT_DISRUPTED << 16; |
b7d2280c AV |
2231 | |
2232 | if (comp_status == CS_TIMEOUT) { | |
2233 | if (IS_FWI2_CAPABLE(ha)) | |
2234 | break; | |
2235 | else if ((le16_to_cpu(sts->status_flags) & | |
2236 | SF_LOGOUT_SENT) == 0) | |
2237 | break; | |
2238 | } | |
2239 | ||
5e19ed90 | 2240 | ql_dbg(ql_dbg_io, fcport->vha, 0x3021, |
0e948975 CD |
2241 | "Port to be marked lost on fcport=%02x%02x%02x, current " |
2242 | "port state= %s.\n", fcport->d_id.b.domain, | |
2243 | fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
2244 | port_state_str[atomic_read(&fcport->state)]); | |
b7d2280c | 2245 | |
a7a28504 | 2246 | if (atomic_read(&fcport->state) == FCS_ONLINE) |
e315cd28 | 2247 | qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1); |
1da177e4 LT |
2248 | break; |
2249 | ||
1da177e4 | 2250 | case CS_ABORTED: |
9ba56b95 | 2251 | res = DID_RESET << 16; |
1da177e4 | 2252 | break; |
bad75002 AE |
2253 | |
2254 | case CS_DIF_ERROR: | |
8cb2049c | 2255 | logit = qla2x00_handle_dif_error(sp, sts24); |
fb6e4668 | 2256 | res = cp->result; |
bad75002 | 2257 | break; |
9e522cd8 AE |
2258 | |
2259 | case CS_TRANSPORT: | |
2260 | res = DID_ERROR << 16; | |
2261 | ||
2262 | if (!IS_PI_SPLIT_DET_CAPABLE(ha)) | |
2263 | break; | |
2264 | ||
2265 | if (state_flags & BIT_4) | |
2266 | scmd_printk(KERN_WARNING, cp, | |
2267 | "Unsupported device '%s' found.\n", | |
2268 | cp->device->vendor); | |
2269 | break; | |
2270 | ||
1da177e4 | 2271 | default: |
9ba56b95 | 2272 | res = DID_ERROR << 16; |
1da177e4 LT |
2273 | break; |
2274 | } | |
2275 | ||
b7d2280c AV |
2276 | out: |
2277 | if (logit) | |
5e19ed90 | 2278 | ql_dbg(ql_dbg_io, fcport->vha, 0x3022, |
7b833558 OK |
2279 | "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%d " |
2280 | "portid=%02x%02x%02x oxid=0x%x cdb=%10phN len=0x%x " | |
7c3df132 | 2281 | "rsp_info=0x%x resid=0x%x fw_resid=0x%x.\n", |
9ba56b95 | 2282 | comp_status, scsi_status, res, vha->host_no, |
cfb0919c CD |
2283 | cp->device->id, cp->device->lun, fcport->d_id.b.domain, |
2284 | fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id, | |
7b833558 | 2285 | cp->cmnd, scsi_bufflen(cp), rsp_info_len, |
7c3df132 | 2286 | resid_len, fw_resid_len); |
b7d2280c | 2287 | |
2afa19a9 | 2288 | if (rsp->status_srb == NULL) |
9ba56b95 | 2289 | sp->done(ha, sp, res); |
1da177e4 LT |
2290 | } |
2291 | ||
2292 | /** | |
2293 | * qla2x00_status_cont_entry() - Process a Status Continuations entry. | |
2294 | * @ha: SCSI driver HA context | |
2295 | * @pkt: Entry pointer | |
2296 | * | |
2297 | * Extended sense data. | |
2298 | */ | |
2299 | static void | |
2afa19a9 | 2300 | qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt) |
1da177e4 | 2301 | { |
9ba56b95 | 2302 | uint8_t sense_sz = 0; |
2afa19a9 | 2303 | struct qla_hw_data *ha = rsp->hw; |
7c3df132 | 2304 | struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev); |
9ba56b95 | 2305 | srb_t *sp = rsp->status_srb; |
1da177e4 | 2306 | struct scsi_cmnd *cp; |
9ba56b95 GM |
2307 | uint32_t sense_len; |
2308 | uint8_t *sense_ptr; | |
1da177e4 | 2309 | |
9ba56b95 GM |
2310 | if (!sp || !GET_CMD_SENSE_LEN(sp)) |
2311 | return; | |
1da177e4 | 2312 | |
9ba56b95 GM |
2313 | sense_len = GET_CMD_SENSE_LEN(sp); |
2314 | sense_ptr = GET_CMD_SENSE_PTR(sp); | |
1da177e4 | 2315 | |
9ba56b95 GM |
2316 | cp = GET_CMD_SP(sp); |
2317 | if (cp == NULL) { | |
2318 | ql_log(ql_log_warn, vha, 0x3025, | |
2319 | "cmd is NULL: already returned to OS (sp=%p).\n", sp); | |
1da177e4 | 2320 | |
9ba56b95 GM |
2321 | rsp->status_srb = NULL; |
2322 | return; | |
1da177e4 | 2323 | } |
1da177e4 | 2324 | |
9ba56b95 GM |
2325 | if (sense_len > sizeof(pkt->data)) |
2326 | sense_sz = sizeof(pkt->data); | |
2327 | else | |
2328 | sense_sz = sense_len; | |
c4631191 | 2329 | |
9ba56b95 GM |
2330 | /* Move sense data. */ |
2331 | if (IS_FWI2_CAPABLE(ha)) | |
2332 | host_to_fcp_swap(pkt->data, sizeof(pkt->data)); | |
2333 | memcpy(sense_ptr, pkt->data, sense_sz); | |
2334 | ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c, | |
2335 | sense_ptr, sense_sz); | |
c4631191 | 2336 | |
9ba56b95 GM |
2337 | sense_len -= sense_sz; |
2338 | sense_ptr += sense_sz; | |
c4631191 | 2339 | |
9ba56b95 GM |
2340 | SET_CMD_SENSE_PTR(sp, sense_ptr); |
2341 | SET_CMD_SENSE_LEN(sp, sense_len); | |
2342 | ||
2343 | /* Place command on done queue. */ | |
2344 | if (sense_len == 0) { | |
2345 | rsp->status_srb = NULL; | |
2346 | sp->done(ha, sp, cp->result); | |
c4631191 | 2347 | } |
c4631191 GM |
2348 | } |
2349 | ||
1da177e4 LT |
2350 | /** |
2351 | * qla2x00_error_entry() - Process an error entry. | |
2352 | * @ha: SCSI driver HA context | |
2353 | * @pkt: Entry pointer | |
2354 | */ | |
2355 | static void | |
73208dfd | 2356 | qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt) |
1da177e4 LT |
2357 | { |
2358 | srb_t *sp; | |
e315cd28 | 2359 | struct qla_hw_data *ha = vha->hw; |
c4631191 | 2360 | const char func[] = "ERROR-IOCB"; |
2afa19a9 | 2361 | uint16_t que = MSW(pkt->handle); |
a6fe35c0 | 2362 | struct req_que *req = NULL; |
9ba56b95 | 2363 | int res = DID_ERROR << 16; |
7c3df132 | 2364 | |
9ba56b95 GM |
2365 | ql_dbg(ql_dbg_async, vha, 0x502a, |
2366 | "type of error status in response: 0x%x\n", pkt->entry_status); | |
2367 | ||
a6fe35c0 AE |
2368 | if (que >= ha->max_req_queues || !ha->req_q_map[que]) |
2369 | goto fatal; | |
2370 | ||
2371 | req = ha->req_q_map[que]; | |
2372 | ||
9ba56b95 GM |
2373 | if (pkt->entry_status & RF_BUSY) |
2374 | res = DID_BUS_BUSY << 16; | |
1da177e4 | 2375 | |
c4631191 | 2376 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); |
a6fe35c0 | 2377 | if (sp) { |
9ba56b95 | 2378 | sp->done(ha, sp, res); |
a6fe35c0 | 2379 | return; |
1da177e4 | 2380 | } |
a6fe35c0 AE |
2381 | fatal: |
2382 | ql_log(ql_log_warn, vha, 0x5030, | |
2383 | "Error entry - invalid handle/queue.\n"); | |
2384 | ||
7ec0effd | 2385 | if (IS_P3P_TYPE(ha)) |
a6fe35c0 AE |
2386 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); |
2387 | else | |
2388 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
2389 | qla2xxx_wake_dpc(vha); | |
1da177e4 LT |
2390 | } |
2391 | ||
9a853f71 AV |
2392 | /** |
2393 | * qla24xx_mbx_completion() - Process mailbox command completions. | |
2394 | * @ha: SCSI driver HA context | |
2395 | * @mb0: Mailbox0 register | |
2396 | */ | |
2397 | static void | |
e315cd28 | 2398 | qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0) |
9a853f71 AV |
2399 | { |
2400 | uint16_t cnt; | |
4fa94f83 | 2401 | uint32_t mboxes; |
9a853f71 | 2402 | uint16_t __iomem *wptr; |
e315cd28 | 2403 | struct qla_hw_data *ha = vha->hw; |
9a853f71 AV |
2404 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
2405 | ||
4fa94f83 AV |
2406 | /* Read all mbox registers? */ |
2407 | mboxes = (1 << ha->mbx_count) - 1; | |
2408 | if (!ha->mcp) | |
a720101d | 2409 | ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n"); |
4fa94f83 AV |
2410 | else |
2411 | mboxes = ha->mcp->in_mb; | |
2412 | ||
9a853f71 AV |
2413 | /* Load return mailbox registers. */ |
2414 | ha->flags.mbox_int = 1; | |
2415 | ha->mailbox_out[0] = mb0; | |
4fa94f83 | 2416 | mboxes >>= 1; |
9a853f71 AV |
2417 | wptr = (uint16_t __iomem *)®->mailbox1; |
2418 | ||
2419 | for (cnt = 1; cnt < ha->mbx_count; cnt++) { | |
4fa94f83 AV |
2420 | if (mboxes & BIT_0) |
2421 | ha->mailbox_out[cnt] = RD_REG_WORD(wptr); | |
2422 | ||
2423 | mboxes >>= 1; | |
9a853f71 AV |
2424 | wptr++; |
2425 | } | |
9a853f71 AV |
2426 | } |
2427 | ||
2428 | /** | |
2429 | * qla24xx_process_response_queue() - Process response queue entries. | |
2430 | * @ha: SCSI driver HA context | |
2431 | */ | |
2afa19a9 AC |
2432 | void qla24xx_process_response_queue(struct scsi_qla_host *vha, |
2433 | struct rsp_que *rsp) | |
9a853f71 | 2434 | { |
9a853f71 | 2435 | struct sts_entry_24xx *pkt; |
a9083016 | 2436 | struct qla_hw_data *ha = vha->hw; |
9a853f71 | 2437 | |
e315cd28 | 2438 | if (!vha->flags.online) |
9a853f71 AV |
2439 | return; |
2440 | ||
e315cd28 AC |
2441 | while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) { |
2442 | pkt = (struct sts_entry_24xx *)rsp->ring_ptr; | |
9a853f71 | 2443 | |
e315cd28 AC |
2444 | rsp->ring_index++; |
2445 | if (rsp->ring_index == rsp->length) { | |
2446 | rsp->ring_index = 0; | |
2447 | rsp->ring_ptr = rsp->ring; | |
9a853f71 | 2448 | } else { |
e315cd28 | 2449 | rsp->ring_ptr++; |
9a853f71 AV |
2450 | } |
2451 | ||
2452 | if (pkt->entry_status != 0) { | |
73208dfd | 2453 | qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt); |
2d70c103 NB |
2454 | |
2455 | (void)qlt_24xx_process_response_error(vha, pkt); | |
2456 | ||
9a853f71 AV |
2457 | ((response_t *)pkt)->signature = RESPONSE_PROCESSED; |
2458 | wmb(); | |
2459 | continue; | |
2460 | } | |
2461 | ||
2462 | switch (pkt->entry_type) { | |
2463 | case STATUS_TYPE: | |
73208dfd | 2464 | qla2x00_status_entry(vha, rsp, pkt); |
9a853f71 AV |
2465 | break; |
2466 | case STATUS_CONT_TYPE: | |
2afa19a9 | 2467 | qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt); |
9a853f71 | 2468 | break; |
2c3dfe3f | 2469 | case VP_RPT_ID_IOCB_TYPE: |
e315cd28 | 2470 | qla24xx_report_id_acquisition(vha, |
2c3dfe3f SJ |
2471 | (struct vp_rpt_id_entry_24xx *)pkt); |
2472 | break; | |
ac280b67 AV |
2473 | case LOGINOUT_PORT_IOCB_TYPE: |
2474 | qla24xx_logio_entry(vha, rsp->req, | |
2475 | (struct logio_entry_24xx *)pkt); | |
2476 | break; | |
3822263e MI |
2477 | case TSK_MGMT_IOCB_TYPE: |
2478 | qla24xx_tm_iocb_entry(vha, rsp->req, | |
2479 | (struct tsk_mgmt_entry *)pkt); | |
2480 | break; | |
9a069e19 GM |
2481 | case CT_IOCB_TYPE: |
2482 | qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE); | |
9a069e19 GM |
2483 | break; |
2484 | case ELS_IOCB_TYPE: | |
2485 | qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE); | |
2486 | break; | |
2d70c103 NB |
2487 | case ABTS_RECV_24XX: |
2488 | /* ensure that the ATIO queue is empty */ | |
2489 | qlt_24xx_process_atio_queue(vha); | |
2490 | case ABTS_RESP_24XX: | |
2491 | case CTIO_TYPE7: | |
2492 | case NOTIFY_ACK_TYPE: | |
2493 | qlt_response_pkt_all_vps(vha, (response_t *)pkt); | |
2494 | break; | |
54883291 SK |
2495 | case MARKER_TYPE: |
2496 | /* Do nothing in this case, this check is to prevent it | |
2497 | * from falling into default case | |
2498 | */ | |
2499 | break; | |
9a853f71 AV |
2500 | default: |
2501 | /* Type Not Supported. */ | |
7c3df132 SK |
2502 | ql_dbg(ql_dbg_async, vha, 0x5042, |
2503 | "Received unknown response pkt type %x " | |
9a853f71 | 2504 | "entry status=%x.\n", |
7c3df132 | 2505 | pkt->entry_type, pkt->entry_status); |
9a853f71 AV |
2506 | break; |
2507 | } | |
2508 | ((response_t *)pkt)->signature = RESPONSE_PROCESSED; | |
2509 | wmb(); | |
2510 | } | |
2511 | ||
2512 | /* Adjust ring index */ | |
7ec0effd | 2513 | if (IS_P3P_TYPE(ha)) { |
a9083016 GM |
2514 | struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; |
2515 | WRT_REG_DWORD(®->rsp_q_out[0], rsp->ring_index); | |
2516 | } else | |
2517 | WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index); | |
9a853f71 AV |
2518 | } |
2519 | ||
05236a05 | 2520 | static void |
e315cd28 | 2521 | qla2xxx_check_risc_status(scsi_qla_host_t *vha) |
05236a05 AV |
2522 | { |
2523 | int rval; | |
2524 | uint32_t cnt; | |
e315cd28 | 2525 | struct qla_hw_data *ha = vha->hw; |
05236a05 AV |
2526 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
2527 | ||
6246b8a1 | 2528 | if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha)) |
05236a05 AV |
2529 | return; |
2530 | ||
2531 | rval = QLA_SUCCESS; | |
2532 | WRT_REG_DWORD(®->iobase_addr, 0x7C00); | |
2533 | RD_REG_DWORD(®->iobase_addr); | |
2534 | WRT_REG_DWORD(®->iobase_window, 0x0001); | |
2535 | for (cnt = 10000; (RD_REG_DWORD(®->iobase_window) & BIT_0) == 0 && | |
2536 | rval == QLA_SUCCESS; cnt--) { | |
2537 | if (cnt) { | |
2538 | WRT_REG_DWORD(®->iobase_window, 0x0001); | |
2539 | udelay(10); | |
2540 | } else | |
2541 | rval = QLA_FUNCTION_TIMEOUT; | |
2542 | } | |
2543 | if (rval == QLA_SUCCESS) | |
2544 | goto next_test; | |
2545 | ||
b2ec76c5 | 2546 | rval = QLA_SUCCESS; |
05236a05 AV |
2547 | WRT_REG_DWORD(®->iobase_window, 0x0003); |
2548 | for (cnt = 100; (RD_REG_DWORD(®->iobase_window) & BIT_0) == 0 && | |
2549 | rval == QLA_SUCCESS; cnt--) { | |
2550 | if (cnt) { | |
2551 | WRT_REG_DWORD(®->iobase_window, 0x0003); | |
2552 | udelay(10); | |
2553 | } else | |
2554 | rval = QLA_FUNCTION_TIMEOUT; | |
2555 | } | |
2556 | if (rval != QLA_SUCCESS) | |
2557 | goto done; | |
2558 | ||
2559 | next_test: | |
2560 | if (RD_REG_DWORD(®->iobase_c8) & BIT_3) | |
7c3df132 SK |
2561 | ql_log(ql_log_info, vha, 0x504c, |
2562 | "Additional code -- 0x55AA.\n"); | |
05236a05 AV |
2563 | |
2564 | done: | |
2565 | WRT_REG_DWORD(®->iobase_window, 0x0000); | |
2566 | RD_REG_DWORD(®->iobase_window); | |
2567 | } | |
2568 | ||
9a853f71 | 2569 | /** |
6246b8a1 | 2570 | * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx. |
9a853f71 AV |
2571 | * @irq: |
2572 | * @dev_id: SCSI driver HA context | |
9a853f71 AV |
2573 | * |
2574 | * Called by system whenever the host adapter generates an interrupt. | |
2575 | * | |
2576 | * Returns handled flag. | |
2577 | */ | |
2578 | irqreturn_t | |
7d12e780 | 2579 | qla24xx_intr_handler(int irq, void *dev_id) |
9a853f71 | 2580 | { |
e315cd28 AC |
2581 | scsi_qla_host_t *vha; |
2582 | struct qla_hw_data *ha; | |
9a853f71 AV |
2583 | struct device_reg_24xx __iomem *reg; |
2584 | int status; | |
9a853f71 AV |
2585 | unsigned long iter; |
2586 | uint32_t stat; | |
2587 | uint32_t hccr; | |
7d613ac6 | 2588 | uint16_t mb[8]; |
e315cd28 | 2589 | struct rsp_que *rsp; |
43fac4d9 | 2590 | unsigned long flags; |
9a853f71 | 2591 | |
e315cd28 AC |
2592 | rsp = (struct rsp_que *) dev_id; |
2593 | if (!rsp) { | |
3256b435 CD |
2594 | ql_log(ql_log_info, NULL, 0x5059, |
2595 | "%s: NULL response queue pointer.\n", __func__); | |
9a853f71 AV |
2596 | return IRQ_NONE; |
2597 | } | |
2598 | ||
e315cd28 | 2599 | ha = rsp->hw; |
9a853f71 AV |
2600 | reg = &ha->iobase->isp24; |
2601 | status = 0; | |
2602 | ||
85880801 AV |
2603 | if (unlikely(pci_channel_offline(ha->pdev))) |
2604 | return IRQ_HANDLED; | |
2605 | ||
43fac4d9 | 2606 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2afa19a9 | 2607 | vha = pci_get_drvdata(ha->pdev); |
9a853f71 AV |
2608 | for (iter = 50; iter--; ) { |
2609 | stat = RD_REG_DWORD(®->host_status); | |
f3ddac19 CD |
2610 | if (qla2x00_check_reg_for_disconnect(vha, stat)) |
2611 | break; | |
9a853f71 | 2612 | if (stat & HSRX_RISC_PAUSED) { |
85880801 | 2613 | if (unlikely(pci_channel_offline(ha->pdev))) |
14e660e6 SJ |
2614 | break; |
2615 | ||
9a853f71 AV |
2616 | hccr = RD_REG_DWORD(®->hccr); |
2617 | ||
7c3df132 SK |
2618 | ql_log(ql_log_warn, vha, 0x504b, |
2619 | "RISC paused -- HCCR=%x, Dumping firmware.\n", | |
2620 | hccr); | |
05236a05 | 2621 | |
e315cd28 | 2622 | qla2xxx_check_risc_status(vha); |
05236a05 | 2623 | |
e315cd28 AC |
2624 | ha->isp_ops->fw_dump(vha, 1); |
2625 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
9a853f71 AV |
2626 | break; |
2627 | } else if ((stat & HSRX_RISC_INT) == 0) | |
2628 | break; | |
2629 | ||
2630 | switch (stat & 0xff) { | |
fafbda9f AE |
2631 | case INTR_ROM_MB_SUCCESS: |
2632 | case INTR_ROM_MB_FAILED: | |
2633 | case INTR_MB_SUCCESS: | |
2634 | case INTR_MB_FAILED: | |
e315cd28 | 2635 | qla24xx_mbx_completion(vha, MSW(stat)); |
9a853f71 AV |
2636 | status |= MBX_INTERRUPT; |
2637 | ||
2638 | break; | |
fafbda9f | 2639 | case INTR_ASYNC_EVENT: |
9a853f71 AV |
2640 | mb[0] = MSW(stat); |
2641 | mb[1] = RD_REG_WORD(®->mailbox1); | |
2642 | mb[2] = RD_REG_WORD(®->mailbox2); | |
2643 | mb[3] = RD_REG_WORD(®->mailbox3); | |
73208dfd | 2644 | qla2x00_async_event(vha, rsp, mb); |
9a853f71 | 2645 | break; |
fafbda9f AE |
2646 | case INTR_RSP_QUE_UPDATE: |
2647 | case INTR_RSP_QUE_UPDATE_83XX: | |
2afa19a9 | 2648 | qla24xx_process_response_queue(vha, rsp); |
9a853f71 | 2649 | break; |
fafbda9f | 2650 | case INTR_ATIO_QUE_UPDATE: |
2d70c103 NB |
2651 | qlt_24xx_process_atio_queue(vha); |
2652 | break; | |
fafbda9f | 2653 | case INTR_ATIO_RSP_QUE_UPDATE: |
2d70c103 NB |
2654 | qlt_24xx_process_atio_queue(vha); |
2655 | qla24xx_process_response_queue(vha, rsp); | |
2656 | break; | |
9a853f71 | 2657 | default: |
7c3df132 SK |
2658 | ql_dbg(ql_dbg_async, vha, 0x504f, |
2659 | "Unrecognized interrupt type (%d).\n", stat * 0xff); | |
9a853f71 AV |
2660 | break; |
2661 | } | |
2662 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); | |
2663 | RD_REG_DWORD_RELAXED(®->hccr); | |
cb860bbd GM |
2664 | if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1))) |
2665 | ndelay(3500); | |
9a853f71 | 2666 | } |
36439832 | 2667 | qla2x00_handle_mbx_completion(ha, status); |
43fac4d9 | 2668 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
9a853f71 | 2669 | |
9a853f71 AV |
2670 | return IRQ_HANDLED; |
2671 | } | |
2672 | ||
a8488abe AV |
2673 | static irqreturn_t |
2674 | qla24xx_msix_rsp_q(int irq, void *dev_id) | |
2675 | { | |
e315cd28 AC |
2676 | struct qla_hw_data *ha; |
2677 | struct rsp_que *rsp; | |
a8488abe | 2678 | struct device_reg_24xx __iomem *reg; |
2afa19a9 | 2679 | struct scsi_qla_host *vha; |
0f19bc68 | 2680 | unsigned long flags; |
f3ddac19 | 2681 | uint32_t stat = 0; |
a8488abe | 2682 | |
e315cd28 AC |
2683 | rsp = (struct rsp_que *) dev_id; |
2684 | if (!rsp) { | |
3256b435 CD |
2685 | ql_log(ql_log_info, NULL, 0x505a, |
2686 | "%s: NULL response queue pointer.\n", __func__); | |
e315cd28 AC |
2687 | return IRQ_NONE; |
2688 | } | |
2689 | ha = rsp->hw; | |
a8488abe AV |
2690 | reg = &ha->iobase->isp24; |
2691 | ||
0f19bc68 | 2692 | spin_lock_irqsave(&ha->hardware_lock, flags); |
a8488abe | 2693 | |
a67093d4 | 2694 | vha = pci_get_drvdata(ha->pdev); |
f3ddac19 CD |
2695 | /* |
2696 | * Use host_status register to check to PCI disconnection before we | |
2697 | * we process the response queue. | |
2698 | */ | |
2699 | stat = RD_REG_DWORD(®->host_status); | |
2700 | if (qla2x00_check_reg_for_disconnect(vha, stat)) | |
2701 | goto out; | |
2afa19a9 | 2702 | qla24xx_process_response_queue(vha, rsp); |
3155754a | 2703 | if (!ha->flags.disable_msix_handshake) { |
eb94114b AC |
2704 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); |
2705 | RD_REG_DWORD_RELAXED(®->hccr); | |
2706 | } | |
f3ddac19 | 2707 | out: |
0f19bc68 | 2708 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
a8488abe AV |
2709 | |
2710 | return IRQ_HANDLED; | |
2711 | } | |
2712 | ||
68ca949c AC |
2713 | static irqreturn_t |
2714 | qla25xx_msix_rsp_q(int irq, void *dev_id) | |
2715 | { | |
2716 | struct qla_hw_data *ha; | |
f3ddac19 | 2717 | scsi_qla_host_t *vha; |
68ca949c | 2718 | struct rsp_que *rsp; |
3155754a | 2719 | struct device_reg_24xx __iomem *reg; |
0f19bc68 | 2720 | unsigned long flags; |
f3ddac19 | 2721 | uint32_t hccr = 0; |
68ca949c AC |
2722 | |
2723 | rsp = (struct rsp_que *) dev_id; | |
2724 | if (!rsp) { | |
3256b435 CD |
2725 | ql_log(ql_log_info, NULL, 0x505b, |
2726 | "%s: NULL response queue pointer.\n", __func__); | |
68ca949c AC |
2727 | return IRQ_NONE; |
2728 | } | |
2729 | ha = rsp->hw; | |
f3ddac19 | 2730 | vha = pci_get_drvdata(ha->pdev); |
68ca949c | 2731 | |
3155754a | 2732 | /* Clear the interrupt, if enabled, for this response queue */ |
d424754c | 2733 | if (!ha->flags.disable_msix_handshake) { |
3155754a | 2734 | reg = &ha->iobase->isp24; |
0f19bc68 | 2735 | spin_lock_irqsave(&ha->hardware_lock, flags); |
3155754a | 2736 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); |
f3ddac19 | 2737 | hccr = RD_REG_DWORD_RELAXED(®->hccr); |
0f19bc68 | 2738 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
3155754a | 2739 | } |
f3ddac19 CD |
2740 | if (qla2x00_check_reg_for_disconnect(vha, hccr)) |
2741 | goto out; | |
68ca949c AC |
2742 | queue_work_on((int) (rsp->id - 1), ha->wq, &rsp->q_work); |
2743 | ||
f3ddac19 | 2744 | out: |
68ca949c AC |
2745 | return IRQ_HANDLED; |
2746 | } | |
2747 | ||
a8488abe AV |
2748 | static irqreturn_t |
2749 | qla24xx_msix_default(int irq, void *dev_id) | |
2750 | { | |
e315cd28 AC |
2751 | scsi_qla_host_t *vha; |
2752 | struct qla_hw_data *ha; | |
2753 | struct rsp_que *rsp; | |
a8488abe AV |
2754 | struct device_reg_24xx __iomem *reg; |
2755 | int status; | |
a8488abe AV |
2756 | uint32_t stat; |
2757 | uint32_t hccr; | |
7d613ac6 | 2758 | uint16_t mb[8]; |
0f19bc68 | 2759 | unsigned long flags; |
a8488abe | 2760 | |
e315cd28 AC |
2761 | rsp = (struct rsp_que *) dev_id; |
2762 | if (!rsp) { | |
3256b435 CD |
2763 | ql_log(ql_log_info, NULL, 0x505c, |
2764 | "%s: NULL response queue pointer.\n", __func__); | |
e315cd28 AC |
2765 | return IRQ_NONE; |
2766 | } | |
2767 | ha = rsp->hw; | |
a8488abe AV |
2768 | reg = &ha->iobase->isp24; |
2769 | status = 0; | |
2770 | ||
0f19bc68 | 2771 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2afa19a9 | 2772 | vha = pci_get_drvdata(ha->pdev); |
87f27015 | 2773 | do { |
a8488abe | 2774 | stat = RD_REG_DWORD(®->host_status); |
f3ddac19 CD |
2775 | if (qla2x00_check_reg_for_disconnect(vha, stat)) |
2776 | break; | |
a8488abe | 2777 | if (stat & HSRX_RISC_PAUSED) { |
85880801 | 2778 | if (unlikely(pci_channel_offline(ha->pdev))) |
14e660e6 SJ |
2779 | break; |
2780 | ||
a8488abe AV |
2781 | hccr = RD_REG_DWORD(®->hccr); |
2782 | ||
7c3df132 SK |
2783 | ql_log(ql_log_info, vha, 0x5050, |
2784 | "RISC paused -- HCCR=%x, Dumping firmware.\n", | |
2785 | hccr); | |
05236a05 | 2786 | |
e315cd28 | 2787 | qla2xxx_check_risc_status(vha); |
05236a05 | 2788 | |
e315cd28 AC |
2789 | ha->isp_ops->fw_dump(vha, 1); |
2790 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
a8488abe AV |
2791 | break; |
2792 | } else if ((stat & HSRX_RISC_INT) == 0) | |
2793 | break; | |
2794 | ||
2795 | switch (stat & 0xff) { | |
fafbda9f AE |
2796 | case INTR_ROM_MB_SUCCESS: |
2797 | case INTR_ROM_MB_FAILED: | |
2798 | case INTR_MB_SUCCESS: | |
2799 | case INTR_MB_FAILED: | |
e315cd28 | 2800 | qla24xx_mbx_completion(vha, MSW(stat)); |
a8488abe AV |
2801 | status |= MBX_INTERRUPT; |
2802 | ||
2803 | break; | |
fafbda9f | 2804 | case INTR_ASYNC_EVENT: |
a8488abe AV |
2805 | mb[0] = MSW(stat); |
2806 | mb[1] = RD_REG_WORD(®->mailbox1); | |
2807 | mb[2] = RD_REG_WORD(®->mailbox2); | |
2808 | mb[3] = RD_REG_WORD(®->mailbox3); | |
73208dfd | 2809 | qla2x00_async_event(vha, rsp, mb); |
a8488abe | 2810 | break; |
fafbda9f AE |
2811 | case INTR_RSP_QUE_UPDATE: |
2812 | case INTR_RSP_QUE_UPDATE_83XX: | |
2afa19a9 | 2813 | qla24xx_process_response_queue(vha, rsp); |
a8488abe | 2814 | break; |
fafbda9f | 2815 | case INTR_ATIO_QUE_UPDATE: |
2d70c103 NB |
2816 | qlt_24xx_process_atio_queue(vha); |
2817 | break; | |
fafbda9f | 2818 | case INTR_ATIO_RSP_QUE_UPDATE: |
2d70c103 NB |
2819 | qlt_24xx_process_atio_queue(vha); |
2820 | qla24xx_process_response_queue(vha, rsp); | |
2821 | break; | |
a8488abe | 2822 | default: |
7c3df132 SK |
2823 | ql_dbg(ql_dbg_async, vha, 0x5051, |
2824 | "Unrecognized interrupt type (%d).\n", stat & 0xff); | |
a8488abe AV |
2825 | break; |
2826 | } | |
2827 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); | |
87f27015 | 2828 | } while (0); |
36439832 | 2829 | qla2x00_handle_mbx_completion(ha, status); |
0f19bc68 | 2830 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
a8488abe | 2831 | |
a8488abe AV |
2832 | return IRQ_HANDLED; |
2833 | } | |
2834 | ||
2835 | /* Interrupt handling helpers. */ | |
2836 | ||
2837 | struct qla_init_msix_entry { | |
a8488abe | 2838 | const char *name; |
476834c2 | 2839 | irq_handler_t handler; |
a8488abe AV |
2840 | }; |
2841 | ||
68ca949c | 2842 | static struct qla_init_msix_entry msix_entries[3] = { |
2afa19a9 AC |
2843 | { "qla2xxx (default)", qla24xx_msix_default }, |
2844 | { "qla2xxx (rsp_q)", qla24xx_msix_rsp_q }, | |
68ca949c | 2845 | { "qla2xxx (multiq)", qla25xx_msix_rsp_q }, |
a8488abe AV |
2846 | }; |
2847 | ||
a9083016 GM |
2848 | static struct qla_init_msix_entry qla82xx_msix_entries[2] = { |
2849 | { "qla2xxx (default)", qla82xx_msix_default }, | |
2850 | { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q }, | |
2851 | }; | |
2852 | ||
aa230bc5 AE |
2853 | static struct qla_init_msix_entry qla83xx_msix_entries[3] = { |
2854 | { "qla2xxx (default)", qla24xx_msix_default }, | |
2855 | { "qla2xxx (rsp_q)", qla24xx_msix_rsp_q }, | |
2856 | { "qla2xxx (atio_q)", qla83xx_msix_atio_q }, | |
2857 | }; | |
2858 | ||
a8488abe | 2859 | static void |
e315cd28 | 2860 | qla24xx_disable_msix(struct qla_hw_data *ha) |
a8488abe AV |
2861 | { |
2862 | int i; | |
2863 | struct qla_msix_entry *qentry; | |
7c3df132 | 2864 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
a8488abe | 2865 | |
73208dfd AC |
2866 | for (i = 0; i < ha->msix_count; i++) { |
2867 | qentry = &ha->msix_entries[i]; | |
a8488abe | 2868 | if (qentry->have_irq) |
73208dfd | 2869 | free_irq(qentry->vector, qentry->rsp); |
a8488abe AV |
2870 | } |
2871 | pci_disable_msix(ha->pdev); | |
73208dfd AC |
2872 | kfree(ha->msix_entries); |
2873 | ha->msix_entries = NULL; | |
2874 | ha->flags.msix_enabled = 0; | |
7c3df132 SK |
2875 | ql_dbg(ql_dbg_init, vha, 0x0042, |
2876 | "Disabled the MSI.\n"); | |
a8488abe AV |
2877 | } |
2878 | ||
2879 | static int | |
73208dfd | 2880 | qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp) |
a8488abe | 2881 | { |
ad038fa8 | 2882 | #define MIN_MSIX_COUNT 2 |
f324777e | 2883 | #define ATIO_VECTOR 2 |
a8488abe | 2884 | int i, ret; |
73208dfd | 2885 | struct msix_entry *entries; |
a8488abe | 2886 | struct qla_msix_entry *qentry; |
7c3df132 | 2887 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
73208dfd AC |
2888 | |
2889 | entries = kzalloc(sizeof(struct msix_entry) * ha->msix_count, | |
a9083016 | 2890 | GFP_KERNEL); |
7c3df132 SK |
2891 | if (!entries) { |
2892 | ql_log(ql_log_warn, vha, 0x00bc, | |
2893 | "Failed to allocate memory for msix_entry.\n"); | |
73208dfd | 2894 | return -ENOMEM; |
7c3df132 | 2895 | } |
a8488abe | 2896 | |
73208dfd AC |
2897 | for (i = 0; i < ha->msix_count; i++) |
2898 | entries[i].entry = i; | |
a8488abe | 2899 | |
73208dfd | 2900 | ret = pci_enable_msix(ha->pdev, entries, ha->msix_count); |
a8488abe | 2901 | if (ret) { |
ad038fa8 LC |
2902 | if (ret < MIN_MSIX_COUNT) |
2903 | goto msix_failed; | |
2904 | ||
7c3df132 SK |
2905 | ql_log(ql_log_warn, vha, 0x00c6, |
2906 | "MSI-X: Failed to enable support " | |
2907 | "-- %d/%d\n Retry with %d vectors.\n", | |
2908 | ha->msix_count, ret, ret); | |
73208dfd AC |
2909 | ha->msix_count = ret; |
2910 | ret = pci_enable_msix(ha->pdev, entries, ha->msix_count); | |
2911 | if (ret) { | |
ad038fa8 | 2912 | msix_failed: |
7c3df132 SK |
2913 | ql_log(ql_log_fatal, vha, 0x00c7, |
2914 | "MSI-X: Failed to enable support, " | |
2915 | "giving up -- %d/%d.\n", | |
2916 | ha->msix_count, ret); | |
73208dfd AC |
2917 | goto msix_out; |
2918 | } | |
2afa19a9 | 2919 | ha->max_rsp_queues = ha->msix_count - 1; |
73208dfd AC |
2920 | } |
2921 | ha->msix_entries = kzalloc(sizeof(struct qla_msix_entry) * | |
2922 | ha->msix_count, GFP_KERNEL); | |
2923 | if (!ha->msix_entries) { | |
7c3df132 SK |
2924 | ql_log(ql_log_fatal, vha, 0x00c8, |
2925 | "Failed to allocate memory for ha->msix_entries.\n"); | |
73208dfd | 2926 | ret = -ENOMEM; |
a8488abe AV |
2927 | goto msix_out; |
2928 | } | |
2929 | ha->flags.msix_enabled = 1; | |
2930 | ||
73208dfd AC |
2931 | for (i = 0; i < ha->msix_count; i++) { |
2932 | qentry = &ha->msix_entries[i]; | |
2933 | qentry->vector = entries[i].vector; | |
2934 | qentry->entry = entries[i].entry; | |
a8488abe | 2935 | qentry->have_irq = 0; |
73208dfd | 2936 | qentry->rsp = NULL; |
a8488abe AV |
2937 | } |
2938 | ||
2afa19a9 | 2939 | /* Enable MSI-X vectors for the base queue */ |
f324777e | 2940 | for (i = 0; i < 2; i++) { |
2afa19a9 | 2941 | qentry = &ha->msix_entries[i]; |
f324777e | 2942 | if (IS_P3P_TYPE(ha)) |
a9083016 GM |
2943 | ret = request_irq(qentry->vector, |
2944 | qla82xx_msix_entries[i].handler, | |
2945 | 0, qla82xx_msix_entries[i].name, rsp); | |
f324777e | 2946 | else |
a9083016 GM |
2947 | ret = request_irq(qentry->vector, |
2948 | msix_entries[i].handler, | |
2949 | 0, msix_entries[i].name, rsp); | |
f324777e CD |
2950 | if (ret) |
2951 | goto msix_register_fail; | |
2952 | qentry->have_irq = 1; | |
2953 | qentry->rsp = rsp; | |
2954 | rsp->msix = qentry; | |
2955 | } | |
2956 | ||
2957 | /* | |
2958 | * If target mode is enable, also request the vector for the ATIO | |
2959 | * queue. | |
2960 | */ | |
2961 | if (QLA_TGT_MODE_ENABLED() && IS_ATIO_MSIX_CAPABLE(ha)) { | |
2962 | qentry = &ha->msix_entries[ATIO_VECTOR]; | |
2963 | ret = request_irq(qentry->vector, | |
2964 | qla83xx_msix_entries[ATIO_VECTOR].handler, | |
2965 | 0, qla83xx_msix_entries[ATIO_VECTOR].name, rsp); | |
2afa19a9 AC |
2966 | qentry->have_irq = 1; |
2967 | qentry->rsp = rsp; | |
2968 | rsp->msix = qentry; | |
73208dfd | 2969 | } |
73208dfd | 2970 | |
f324777e CD |
2971 | msix_register_fail: |
2972 | if (ret) { | |
2973 | ql_log(ql_log_fatal, vha, 0x00cb, | |
2974 | "MSI-X: unable to register handler -- %x/%d.\n", | |
2975 | qentry->vector, ret); | |
2976 | qla24xx_disable_msix(ha); | |
2977 | ha->mqenable = 0; | |
2978 | goto msix_out; | |
2979 | } | |
2980 | ||
73208dfd | 2981 | /* Enable MSI-X vector for response queue update for queue 0 */ |
6246b8a1 GM |
2982 | if (IS_QLA83XX(ha)) { |
2983 | if (ha->msixbase && ha->mqiobase && | |
2984 | (ha->max_rsp_queues > 1 || ha->max_req_queues > 1)) | |
2985 | ha->mqenable = 1; | |
2986 | } else | |
2987 | if (ha->mqiobase | |
2988 | && (ha->max_rsp_queues > 1 || ha->max_req_queues > 1)) | |
2989 | ha->mqenable = 1; | |
7c3df132 SK |
2990 | ql_dbg(ql_dbg_multiq, vha, 0xc005, |
2991 | "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n", | |
2992 | ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues); | |
2993 | ql_dbg(ql_dbg_init, vha, 0x0055, | |
2994 | "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n", | |
2995 | ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues); | |
73208dfd | 2996 | |
a8488abe | 2997 | msix_out: |
73208dfd | 2998 | kfree(entries); |
a8488abe AV |
2999 | return ret; |
3000 | } | |
3001 | ||
3002 | int | |
73208dfd | 3003 | qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp) |
a8488abe | 3004 | { |
7fa3e239 | 3005 | int ret = QLA_FUNCTION_FAILED; |
963b0fdd | 3006 | device_reg_t __iomem *reg = ha->iobase; |
7c3df132 | 3007 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
a8488abe AV |
3008 | |
3009 | /* If possible, enable MSI-X. */ | |
6246b8a1 | 3010 | if (!IS_QLA2432(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) && |
8ae6d9c7 | 3011 | !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) && !IS_QLAFX00(ha)) |
6377a7ae BH |
3012 | goto skip_msi; |
3013 | ||
3014 | if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP && | |
3015 | (ha->pdev->subsystem_device == 0x7040 || | |
3016 | ha->pdev->subsystem_device == 0x7041 || | |
3017 | ha->pdev->subsystem_device == 0x1705)) { | |
7c3df132 SK |
3018 | ql_log(ql_log_warn, vha, 0x0034, |
3019 | "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n", | |
6377a7ae | 3020 | ha->pdev->subsystem_vendor, |
7c3df132 | 3021 | ha->pdev->subsystem_device); |
6377a7ae BH |
3022 | goto skip_msi; |
3023 | } | |
a8488abe | 3024 | |
42cd4f5d | 3025 | if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) { |
7c3df132 SK |
3026 | ql_log(ql_log_warn, vha, 0x0035, |
3027 | "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n", | |
42cd4f5d | 3028 | ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX); |
a8488abe AV |
3029 | goto skip_msix; |
3030 | } | |
3031 | ||
73208dfd | 3032 | ret = qla24xx_enable_msix(ha, rsp); |
a8488abe | 3033 | if (!ret) { |
7c3df132 SK |
3034 | ql_dbg(ql_dbg_init, vha, 0x0036, |
3035 | "MSI-X: Enabled (0x%X, 0x%X).\n", | |
3036 | ha->chip_revision, ha->fw_attributes); | |
963b0fdd | 3037 | goto clear_risc_ints; |
a8488abe | 3038 | } |
7fa3e239 | 3039 | |
a8488abe | 3040 | skip_msix: |
cbedb601 | 3041 | |
7fa3e239 SC |
3042 | ql_log(ql_log_info, vha, 0x0037, |
3043 | "Falling back-to MSI mode -%d.\n", ret); | |
3044 | ||
3a03eb79 | 3045 | if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) && |
7ec0effd | 3046 | !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha)) |
cbedb601 AV |
3047 | goto skip_msi; |
3048 | ||
3049 | ret = pci_enable_msi(ha->pdev); | |
3050 | if (!ret) { | |
7c3df132 SK |
3051 | ql_dbg(ql_dbg_init, vha, 0x0038, |
3052 | "MSI: Enabled.\n"); | |
cbedb601 | 3053 | ha->flags.msi_enabled = 1; |
a9083016 | 3054 | } else |
7c3df132 | 3055 | ql_log(ql_log_warn, vha, 0x0039, |
7fa3e239 SC |
3056 | "Falling back-to INTa mode -- %d.\n", ret); |
3057 | skip_msi: | |
a033b655 GM |
3058 | |
3059 | /* Skip INTx on ISP82xx. */ | |
3060 | if (!ha->flags.msi_enabled && IS_QLA82XX(ha)) | |
3061 | return QLA_FUNCTION_FAILED; | |
3062 | ||
fd34f556 | 3063 | ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler, |
7992abfc MH |
3064 | ha->flags.msi_enabled ? 0 : IRQF_SHARED, |
3065 | QLA2XXX_DRIVER_NAME, rsp); | |
963b0fdd | 3066 | if (ret) { |
7c3df132 | 3067 | ql_log(ql_log_warn, vha, 0x003a, |
a8488abe AV |
3068 | "Failed to reserve interrupt %d already in use.\n", |
3069 | ha->pdev->irq); | |
963b0fdd | 3070 | goto fail; |
8ae6d9c7 | 3071 | } else if (!ha->flags.msi_enabled) { |
68d91cbd SK |
3072 | ql_dbg(ql_dbg_init, vha, 0x0125, |
3073 | "INTa mode: Enabled.\n"); | |
8ae6d9c7 GM |
3074 | ha->flags.mr_intr_valid = 1; |
3075 | } | |
7992abfc | 3076 | |
963b0fdd AV |
3077 | clear_risc_ints: |
3078 | ||
c6952483 | 3079 | spin_lock_irq(&ha->hardware_lock); |
c1114953 | 3080 | if (!IS_FWI2_CAPABLE(ha)) |
963b0fdd | 3081 | WRT_REG_WORD(®->isp.semaphore, 0); |
c6952483 | 3082 | spin_unlock_irq(&ha->hardware_lock); |
a8488abe | 3083 | |
963b0fdd | 3084 | fail: |
a8488abe AV |
3085 | return ret; |
3086 | } | |
3087 | ||
3088 | void | |
e315cd28 | 3089 | qla2x00_free_irqs(scsi_qla_host_t *vha) |
a8488abe | 3090 | { |
e315cd28 | 3091 | struct qla_hw_data *ha = vha->hw; |
9a347ff4 CD |
3092 | struct rsp_que *rsp; |
3093 | ||
3094 | /* | |
3095 | * We need to check that ha->rsp_q_map is valid in case we are called | |
3096 | * from a probe failure context. | |
3097 | */ | |
3098 | if (!ha->rsp_q_map || !ha->rsp_q_map[0]) | |
3099 | return; | |
3100 | rsp = ha->rsp_q_map[0]; | |
a8488abe AV |
3101 | |
3102 | if (ha->flags.msix_enabled) | |
3103 | qla24xx_disable_msix(ha); | |
90a86fc0 | 3104 | else if (ha->flags.msi_enabled) { |
e315cd28 | 3105 | free_irq(ha->pdev->irq, rsp); |
cbedb601 | 3106 | pci_disable_msi(ha->pdev); |
90a86fc0 JC |
3107 | } else |
3108 | free_irq(ha->pdev->irq, rsp); | |
a8488abe | 3109 | } |
e315cd28 | 3110 | |
73208dfd AC |
3111 | |
3112 | int qla25xx_request_irq(struct rsp_que *rsp) | |
3113 | { | |
3114 | struct qla_hw_data *ha = rsp->hw; | |
2afa19a9 | 3115 | struct qla_init_msix_entry *intr = &msix_entries[2]; |
73208dfd | 3116 | struct qla_msix_entry *msix = rsp->msix; |
7c3df132 | 3117 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
73208dfd AC |
3118 | int ret; |
3119 | ||
3120 | ret = request_irq(msix->vector, intr->handler, 0, intr->name, rsp); | |
3121 | if (ret) { | |
7c3df132 SK |
3122 | ql_log(ql_log_fatal, vha, 0x00e6, |
3123 | "MSI-X: Unable to register handler -- %x/%d.\n", | |
3124 | msix->vector, ret); | |
73208dfd AC |
3125 | return ret; |
3126 | } | |
3127 | msix->have_irq = 1; | |
3128 | msix->rsp = rsp; | |
3129 | return ret; | |
3130 | } |