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Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
fa90c54f | 2 | * QLogic Fibre Channel HBA Driver |
bd21eaf9 | 3 | * Copyright (c) 2003-2014 QLogic Corporation |
1da177e4 | 4 | * |
fa90c54f | 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
1da177e4 LT |
6 | */ |
7 | #include "qla_def.h" | |
2d70c103 | 8 | #include "qla_target.h" |
1da177e4 LT |
9 | |
10 | #include <linux/delay.h> | |
5a0e3ad6 | 11 | #include <linux/gfp.h> |
1da177e4 | 12 | |
1da177e4 LT |
13 | |
14 | /* | |
15 | * qla2x00_mailbox_command | |
16 | * Issue mailbox command and waits for completion. | |
17 | * | |
18 | * Input: | |
19 | * ha = adapter block pointer. | |
20 | * mcp = driver internal mbx struct pointer. | |
21 | * | |
22 | * Output: | |
23 | * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data. | |
24 | * | |
25 | * Returns: | |
26 | * 0 : QLA_SUCCESS = cmd performed success | |
27 | * 1 : QLA_FUNCTION_FAILED (error encountered) | |
28 | * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered) | |
29 | * | |
30 | * Context: | |
31 | * Kernel context. | |
32 | */ | |
33 | static int | |
7b867cf7 | 34 | qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp) |
1da177e4 | 35 | { |
d14e72fb | 36 | int rval, i; |
1da177e4 | 37 | unsigned long flags = 0; |
f73cb695 | 38 | device_reg_t *reg; |
1c7c6357 | 39 | uint8_t abort_active; |
2c3dfe3f | 40 | uint8_t io_lock_on; |
cdbb0a4f | 41 | uint16_t command = 0; |
1da177e4 LT |
42 | uint16_t *iptr; |
43 | uint16_t __iomem *optr; | |
44 | uint32_t cnt; | |
45 | uint32_t mboxes; | |
d14e72fb | 46 | uint16_t __iomem *mbx_reg; |
1da177e4 | 47 | unsigned long wait_time; |
7b867cf7 AC |
48 | struct qla_hw_data *ha = vha->hw; |
49 | scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); | |
2c3dfe3f | 50 | |
d14e72fb | 51 | |
5e19ed90 | 52 | ql_dbg(ql_dbg_mbx, vha, 0x1000, "Entered %s.\n", __func__); |
7c3df132 SK |
53 | |
54 | if (ha->pdev->error_state > pci_channel_io_frozen) { | |
5e19ed90 | 55 | ql_log(ql_log_warn, vha, 0x1001, |
7c3df132 SK |
56 | "error_state is greater than pci_channel_io_frozen, " |
57 | "exiting.\n"); | |
b9b12f73 | 58 | return QLA_FUNCTION_TIMEOUT; |
7c3df132 | 59 | } |
b9b12f73 | 60 | |
a9083016 | 61 | if (vha->device_flags & DFLG_DEV_FAILED) { |
5e19ed90 | 62 | ql_log(ql_log_warn, vha, 0x1002, |
7c3df132 | 63 | "Device in failed state, exiting.\n"); |
a9083016 GM |
64 | return QLA_FUNCTION_TIMEOUT; |
65 | } | |
66 | ||
2c3dfe3f | 67 | reg = ha->iobase; |
7b867cf7 | 68 | io_lock_on = base_vha->flags.init_done; |
1da177e4 LT |
69 | |
70 | rval = QLA_SUCCESS; | |
7b867cf7 | 71 | abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); |
1c7c6357 | 72 | |
1da177e4 | 73 | |
85880801 | 74 | if (ha->flags.pci_channel_io_perm_failure) { |
5e19ed90 | 75 | ql_log(ql_log_warn, vha, 0x1003, |
7c3df132 | 76 | "Perm failure on EEH timeout MBX, exiting.\n"); |
85880801 AV |
77 | return QLA_FUNCTION_TIMEOUT; |
78 | } | |
79 | ||
7ec0effd | 80 | if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) { |
862cd01e GM |
81 | /* Setting Link-Down error */ |
82 | mcp->mb[0] = MBS_LINK_DOWN_ERROR; | |
5e19ed90 | 83 | ql_log(ql_log_warn, vha, 0x1004, |
7c3df132 | 84 | "FW hung = %d.\n", ha->flags.isp82xx_fw_hung); |
1806fcd5 | 85 | return QLA_FUNCTION_TIMEOUT; |
862cd01e GM |
86 | } |
87 | ||
1da177e4 | 88 | /* |
1c7c6357 AV |
89 | * Wait for active mailbox commands to finish by waiting at most tov |
90 | * seconds. This is to serialize actual issuing of mailbox cmds during | |
91 | * non ISP abort time. | |
1da177e4 | 92 | */ |
8eca3f39 AV |
93 | if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) { |
94 | /* Timeout occurred. Return error. */ | |
5e19ed90 | 95 | ql_log(ql_log_warn, vha, 0x1005, |
d8c0d546 CD |
96 | "Cmd access timeout, cmd=0x%x, Exiting.\n", |
97 | mcp->mb[0]); | |
8eca3f39 | 98 | return QLA_FUNCTION_TIMEOUT; |
1da177e4 LT |
99 | } |
100 | ||
101 | ha->flags.mbox_busy = 1; | |
102 | /* Save mailbox command for debug */ | |
103 | ha->mcp = mcp; | |
104 | ||
5e19ed90 | 105 | ql_dbg(ql_dbg_mbx, vha, 0x1006, |
7c3df132 | 106 | "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]); |
1da177e4 LT |
107 | |
108 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
109 | ||
110 | /* Load mailbox registers. */ | |
7ec0effd | 111 | if (IS_P3P_TYPE(ha)) |
a9083016 | 112 | optr = (uint16_t __iomem *)®->isp82.mailbox_in[0]; |
7ec0effd | 113 | else if (IS_FWI2_CAPABLE(ha) && !(IS_P3P_TYPE(ha))) |
1c7c6357 AV |
114 | optr = (uint16_t __iomem *)®->isp24.mailbox0; |
115 | else | |
116 | optr = (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 0); | |
1da177e4 LT |
117 | |
118 | iptr = mcp->mb; | |
119 | command = mcp->mb[0]; | |
120 | mboxes = mcp->out_mb; | |
121 | ||
7b711623 | 122 | ql_dbg(ql_dbg_mbx, vha, 0x1111, |
0e31a2c8 | 123 | "Mailbox registers (OUT):\n"); |
1da177e4 LT |
124 | for (cnt = 0; cnt < ha->mbx_count; cnt++) { |
125 | if (IS_QLA2200(ha) && cnt == 8) | |
1c7c6357 AV |
126 | optr = |
127 | (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 8); | |
0e31a2c8 JC |
128 | if (mboxes & BIT_0) { |
129 | ql_dbg(ql_dbg_mbx, vha, 0x1112, | |
130 | "mbox[%d]<-0x%04x\n", cnt, *iptr); | |
1da177e4 | 131 | WRT_REG_WORD(optr, *iptr); |
0e31a2c8 | 132 | } |
1da177e4 LT |
133 | |
134 | mboxes >>= 1; | |
135 | optr++; | |
136 | iptr++; | |
137 | } | |
138 | ||
5e19ed90 | 139 | ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1117, |
7c3df132 | 140 | "I/O Address = %p.\n", optr); |
1da177e4 LT |
141 | |
142 | /* Issue set host interrupt command to send cmd out. */ | |
143 | ha->flags.mbox_int = 0; | |
144 | clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); | |
145 | ||
146 | /* Unlock mbx registers and wait for interrupt */ | |
5e19ed90 | 147 | ql_dbg(ql_dbg_mbx, vha, 0x100f, |
7c3df132 SK |
148 | "Going to unlock irq & waiting for interrupts. " |
149 | "jiffies=%lx.\n", jiffies); | |
1da177e4 LT |
150 | |
151 | /* Wait for mbx cmd completion until timeout */ | |
152 | ||
124f85e6 | 153 | if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) { |
1da177e4 LT |
154 | set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); |
155 | ||
7ec0effd | 156 | if (IS_P3P_TYPE(ha)) { |
a9083016 GM |
157 | if (RD_REG_DWORD(®->isp82.hint) & |
158 | HINT_MBX_INT_PENDING) { | |
159 | spin_unlock_irqrestore(&ha->hardware_lock, | |
160 | flags); | |
8937f2f1 | 161 | ha->flags.mbox_busy = 0; |
5e19ed90 | 162 | ql_dbg(ql_dbg_mbx, vha, 0x1010, |
7c3df132 | 163 | "Pending mailbox timeout, exiting.\n"); |
cdbb0a4f SV |
164 | rval = QLA_FUNCTION_TIMEOUT; |
165 | goto premature_exit; | |
a9083016 GM |
166 | } |
167 | WRT_REG_DWORD(®->isp82.hint, HINT_MBX_INT_PENDING); | |
168 | } else if (IS_FWI2_CAPABLE(ha)) | |
1c7c6357 AV |
169 | WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT); |
170 | else | |
171 | WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT); | |
1da177e4 LT |
172 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
173 | ||
754d1243 GM |
174 | if (!wait_for_completion_timeout(&ha->mbx_intr_comp, |
175 | mcp->tov * HZ)) { | |
176 | ql_dbg(ql_dbg_mbx, vha, 0x117a, | |
177 | "cmd=%x Timeout.\n", command); | |
178 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
179 | clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); | |
180 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
181 | } | |
1da177e4 | 182 | } else { |
5e19ed90 | 183 | ql_dbg(ql_dbg_mbx, vha, 0x1011, |
7c3df132 | 184 | "Cmd=%x Polling Mode.\n", command); |
1da177e4 | 185 | |
7ec0effd | 186 | if (IS_P3P_TYPE(ha)) { |
a9083016 GM |
187 | if (RD_REG_DWORD(®->isp82.hint) & |
188 | HINT_MBX_INT_PENDING) { | |
189 | spin_unlock_irqrestore(&ha->hardware_lock, | |
190 | flags); | |
8937f2f1 | 191 | ha->flags.mbox_busy = 0; |
5e19ed90 | 192 | ql_dbg(ql_dbg_mbx, vha, 0x1012, |
7c3df132 | 193 | "Pending mailbox timeout, exiting.\n"); |
cdbb0a4f SV |
194 | rval = QLA_FUNCTION_TIMEOUT; |
195 | goto premature_exit; | |
a9083016 GM |
196 | } |
197 | WRT_REG_DWORD(®->isp82.hint, HINT_MBX_INT_PENDING); | |
198 | } else if (IS_FWI2_CAPABLE(ha)) | |
1c7c6357 AV |
199 | WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT); |
200 | else | |
201 | WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT); | |
1da177e4 | 202 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
1da177e4 LT |
203 | |
204 | wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */ | |
205 | while (!ha->flags.mbox_int) { | |
206 | if (time_after(jiffies, wait_time)) | |
207 | break; | |
208 | ||
209 | /* Check for pending interrupts. */ | |
73208dfd | 210 | qla2x00_poll(ha->rsp_q_map[0]); |
1da177e4 | 211 | |
85880801 AV |
212 | if (!ha->flags.mbox_int && |
213 | !(IS_QLA2200(ha) && | |
214 | command == MBC_LOAD_RISC_RAM_EXTENDED)) | |
59989831 | 215 | msleep(10); |
1da177e4 | 216 | } /* while */ |
5e19ed90 | 217 | ql_dbg(ql_dbg_mbx, vha, 0x1013, |
7c3df132 SK |
218 | "Waited %d sec.\n", |
219 | (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ)); | |
1da177e4 LT |
220 | } |
221 | ||
1da177e4 LT |
222 | /* Check whether we timed out */ |
223 | if (ha->flags.mbox_int) { | |
224 | uint16_t *iptr2; | |
225 | ||
5e19ed90 | 226 | ql_dbg(ql_dbg_mbx, vha, 0x1014, |
7c3df132 | 227 | "Cmd=%x completed.\n", command); |
1da177e4 LT |
228 | |
229 | /* Got interrupt. Clear the flag. */ | |
230 | ha->flags.mbox_int = 0; | |
231 | clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); | |
232 | ||
7ec0effd | 233 | if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) { |
cdbb0a4f SV |
234 | ha->flags.mbox_busy = 0; |
235 | /* Setting Link-Down error */ | |
236 | mcp->mb[0] = MBS_LINK_DOWN_ERROR; | |
237 | ha->mcp = NULL; | |
238 | rval = QLA_FUNCTION_FAILED; | |
5e19ed90 | 239 | ql_log(ql_log_warn, vha, 0x1015, |
7c3df132 | 240 | "FW hung = %d.\n", ha->flags.isp82xx_fw_hung); |
cdbb0a4f SV |
241 | goto premature_exit; |
242 | } | |
243 | ||
354d6b21 | 244 | if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE) |
1da177e4 | 245 | rval = QLA_FUNCTION_FAILED; |
1da177e4 LT |
246 | |
247 | /* Load return mailbox registers. */ | |
248 | iptr2 = mcp->mb; | |
249 | iptr = (uint16_t *)&ha->mailbox_out[0]; | |
250 | mboxes = mcp->in_mb; | |
0e31a2c8 JC |
251 | |
252 | ql_dbg(ql_dbg_mbx, vha, 0x1113, | |
253 | "Mailbox registers (IN):\n"); | |
1da177e4 | 254 | for (cnt = 0; cnt < ha->mbx_count; cnt++) { |
0e31a2c8 | 255 | if (mboxes & BIT_0) { |
1da177e4 | 256 | *iptr2 = *iptr; |
0e31a2c8 JC |
257 | ql_dbg(ql_dbg_mbx, vha, 0x1114, |
258 | "mbox[%d]->0x%04x\n", cnt, *iptr2); | |
259 | } | |
1da177e4 LT |
260 | |
261 | mboxes >>= 1; | |
262 | iptr2++; | |
263 | iptr++; | |
264 | } | |
265 | } else { | |
266 | ||
1c7c6357 AV |
267 | uint16_t mb0; |
268 | uint32_t ictrl; | |
269 | ||
e428924c | 270 | if (IS_FWI2_CAPABLE(ha)) { |
1c7c6357 AV |
271 | mb0 = RD_REG_WORD(®->isp24.mailbox0); |
272 | ictrl = RD_REG_DWORD(®->isp24.ictrl); | |
273 | } else { | |
cca5335c | 274 | mb0 = RD_MAILBOX_REG(ha, ®->isp, 0); |
1c7c6357 AV |
275 | ictrl = RD_REG_WORD(®->isp.ictrl); |
276 | } | |
5e19ed90 | 277 | ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119, |
5f28d2d7 SK |
278 | "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx " |
279 | "mb[0]=0x%x\n", command, ictrl, jiffies, mb0); | |
5e19ed90 | 280 | ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019); |
1da177e4 | 281 | |
f55bfc88 CD |
282 | /* |
283 | * Attempt to capture a firmware dump for further analysis | |
b8eb4136 CD |
284 | * of the current firmware state. We do not need to do this |
285 | * if we are intentionally generating a dump. | |
f55bfc88 | 286 | */ |
b8eb4136 CD |
287 | if (mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) |
288 | ha->isp_ops->fw_dump(vha, 0); | |
f55bfc88 | 289 | |
1da177e4 LT |
290 | rval = QLA_FUNCTION_TIMEOUT; |
291 | } | |
292 | ||
1da177e4 LT |
293 | ha->flags.mbox_busy = 0; |
294 | ||
295 | /* Clean up */ | |
296 | ha->mcp = NULL; | |
297 | ||
124f85e6 | 298 | if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) { |
5e19ed90 | 299 | ql_dbg(ql_dbg_mbx, vha, 0x101a, |
7c3df132 | 300 | "Checking for additional resp interrupt.\n"); |
1da177e4 LT |
301 | |
302 | /* polling mode for non isp_abort commands. */ | |
73208dfd | 303 | qla2x00_poll(ha->rsp_q_map[0]); |
1da177e4 LT |
304 | } |
305 | ||
1c7c6357 AV |
306 | if (rval == QLA_FUNCTION_TIMEOUT && |
307 | mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) { | |
85880801 AV |
308 | if (!io_lock_on || (mcp->flags & IOCTL_CMD) || |
309 | ha->flags.eeh_busy) { | |
1da177e4 | 310 | /* not in dpc. schedule it for dpc to take over. */ |
5e19ed90 | 311 | ql_dbg(ql_dbg_mbx, vha, 0x101b, |
7c3df132 | 312 | "Timeout, schedule isp_abort_needed.\n"); |
cdbb0a4f SV |
313 | |
314 | if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) && | |
315 | !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) && | |
316 | !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { | |
63154916 GM |
317 | if (IS_QLA82XX(ha)) { |
318 | ql_dbg(ql_dbg_mbx, vha, 0x112a, | |
319 | "disabling pause transmit on port " | |
320 | "0 & 1.\n"); | |
321 | qla82xx_wr_32(ha, | |
322 | QLA82XX_CRB_NIU + 0x98, | |
323 | CRB_NIU_XG_PAUSE_CTL_P0| | |
324 | CRB_NIU_XG_PAUSE_CTL_P1); | |
325 | } | |
7c3df132 | 326 | ql_log(ql_log_info, base_vha, 0x101c, |
24d9ee85 | 327 | "Mailbox cmd timeout occurred, cmd=0x%x, " |
d8c0d546 CD |
328 | "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP " |
329 | "abort.\n", command, mcp->mb[0], | |
330 | ha->flags.eeh_busy); | |
cdbb0a4f SV |
331 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
332 | qla2xxx_wake_dpc(vha); | |
333 | } | |
1da177e4 | 334 | } else if (!abort_active) { |
1da177e4 | 335 | /* call abort directly since we are in the DPC thread */ |
5e19ed90 | 336 | ql_dbg(ql_dbg_mbx, vha, 0x101d, |
7c3df132 | 337 | "Timeout, calling abort_isp.\n"); |
cdbb0a4f SV |
338 | |
339 | if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) && | |
340 | !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) && | |
341 | !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { | |
63154916 GM |
342 | if (IS_QLA82XX(ha)) { |
343 | ql_dbg(ql_dbg_mbx, vha, 0x112b, | |
344 | "disabling pause transmit on port " | |
345 | "0 & 1.\n"); | |
346 | qla82xx_wr_32(ha, | |
347 | QLA82XX_CRB_NIU + 0x98, | |
348 | CRB_NIU_XG_PAUSE_CTL_P0| | |
349 | CRB_NIU_XG_PAUSE_CTL_P1); | |
350 | } | |
7c3df132 | 351 | ql_log(ql_log_info, base_vha, 0x101e, |
24d9ee85 | 352 | "Mailbox cmd timeout occurred, cmd=0x%x, " |
d8c0d546 CD |
353 | "mb[0]=0x%x. Scheduling ISP abort ", |
354 | command, mcp->mb[0]); | |
cdbb0a4f SV |
355 | set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags); |
356 | clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
d3360960 GM |
357 | /* Allow next mbx cmd to come in. */ |
358 | complete(&ha->mbx_cmd_comp); | |
cdbb0a4f SV |
359 | if (ha->isp_ops->abort_isp(vha)) { |
360 | /* Failed. retry later. */ | |
361 | set_bit(ISP_ABORT_NEEDED, | |
362 | &vha->dpc_flags); | |
363 | } | |
364 | clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags); | |
5e19ed90 | 365 | ql_dbg(ql_dbg_mbx, vha, 0x101f, |
7c3df132 | 366 | "Finished abort_isp.\n"); |
d3360960 | 367 | goto mbx_done; |
1da177e4 | 368 | } |
1da177e4 LT |
369 | } |
370 | } | |
371 | ||
cdbb0a4f | 372 | premature_exit: |
1da177e4 | 373 | /* Allow next mbx cmd to come in. */ |
8eca3f39 | 374 | complete(&ha->mbx_cmd_comp); |
1da177e4 | 375 | |
d3360960 | 376 | mbx_done: |
1da177e4 | 377 | if (rval) { |
34c5801d | 378 | ql_dbg(ql_dbg_disc, base_vha, 0x1020, |
6246b8a1 GM |
379 | "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x, cmd=%x ****.\n", |
380 | mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command); | |
d14e72fb HM |
381 | |
382 | ql_dbg(ql_dbg_disc, vha, 0x1115, | |
383 | "host status: 0x%x, flags:0x%lx, intr ctrl reg:0x%x, intr status:0x%x\n", | |
384 | RD_REG_DWORD(®->isp24.host_status), | |
385 | ha->fw_dump_cap_flags, | |
386 | RD_REG_DWORD(®->isp24.ictrl), | |
387 | RD_REG_DWORD(®->isp24.istatus)); | |
388 | ||
389 | mbx_reg = ®->isp24.mailbox0; | |
390 | for (i = 0; i < 6; i++) | |
391 | ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x1116, | |
392 | "mbox[%d] 0x%04x\n", i, RD_REG_WORD(mbx_reg++)); | |
1da177e4 | 393 | } else { |
7c3df132 | 394 | ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__); |
1da177e4 LT |
395 | } |
396 | ||
1da177e4 LT |
397 | return rval; |
398 | } | |
399 | ||
1da177e4 | 400 | int |
7b867cf7 | 401 | qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr, |
590f98e5 | 402 | uint32_t risc_code_size) |
1da177e4 LT |
403 | { |
404 | int rval; | |
7b867cf7 | 405 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
406 | mbx_cmd_t mc; |
407 | mbx_cmd_t *mcp = &mc; | |
1da177e4 | 408 | |
5f28d2d7 SK |
409 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1022, |
410 | "Entered %s.\n", __func__); | |
1da177e4 | 411 | |
e428924c | 412 | if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) { |
590f98e5 AV |
413 | mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED; |
414 | mcp->mb[8] = MSW(risc_addr); | |
415 | mcp->out_mb = MBX_8|MBX_0; | |
1da177e4 | 416 | } else { |
590f98e5 AV |
417 | mcp->mb[0] = MBC_LOAD_RISC_RAM; |
418 | mcp->out_mb = MBX_0; | |
1da177e4 | 419 | } |
1da177e4 LT |
420 | mcp->mb[1] = LSW(risc_addr); |
421 | mcp->mb[2] = MSW(req_dma); | |
422 | mcp->mb[3] = LSW(req_dma); | |
1da177e4 LT |
423 | mcp->mb[6] = MSW(MSD(req_dma)); |
424 | mcp->mb[7] = LSW(MSD(req_dma)); | |
590f98e5 | 425 | mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1; |
e428924c | 426 | if (IS_FWI2_CAPABLE(ha)) { |
1c7c6357 AV |
427 | mcp->mb[4] = MSW(risc_code_size); |
428 | mcp->mb[5] = LSW(risc_code_size); | |
429 | mcp->out_mb |= MBX_5|MBX_4; | |
430 | } else { | |
431 | mcp->mb[4] = LSW(risc_code_size); | |
432 | mcp->out_mb |= MBX_4; | |
433 | } | |
434 | ||
1da177e4 | 435 | mcp->in_mb = MBX_0; |
b93480e3 | 436 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 437 | mcp->flags = 0; |
7b867cf7 | 438 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 | 439 | |
1da177e4 | 440 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
441 | ql_dbg(ql_dbg_mbx, vha, 0x1023, |
442 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
1da177e4 | 443 | } else { |
5f28d2d7 SK |
444 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1024, |
445 | "Done %s.\n", __func__); | |
1da177e4 LT |
446 | } |
447 | ||
448 | return rval; | |
449 | } | |
450 | ||
cad454b1 | 451 | #define EXTENDED_BB_CREDITS BIT_0 |
1da177e4 LT |
452 | /* |
453 | * qla2x00_execute_fw | |
1c7c6357 | 454 | * Start adapter firmware. |
1da177e4 LT |
455 | * |
456 | * Input: | |
1c7c6357 AV |
457 | * ha = adapter block pointer. |
458 | * TARGET_QUEUE_LOCK must be released. | |
459 | * ADAPTER_STATE_LOCK must be released. | |
1da177e4 LT |
460 | * |
461 | * Returns: | |
1c7c6357 | 462 | * qla2x00 local function return status code. |
1da177e4 LT |
463 | * |
464 | * Context: | |
1c7c6357 | 465 | * Kernel context. |
1da177e4 LT |
466 | */ |
467 | int | |
7b867cf7 | 468 | qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr) |
1da177e4 LT |
469 | { |
470 | int rval; | |
7b867cf7 | 471 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
472 | mbx_cmd_t mc; |
473 | mbx_cmd_t *mcp = &mc; | |
474 | ||
5f28d2d7 SK |
475 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1025, |
476 | "Entered %s.\n", __func__); | |
1da177e4 LT |
477 | |
478 | mcp->mb[0] = MBC_EXECUTE_FIRMWARE; | |
1c7c6357 AV |
479 | mcp->out_mb = MBX_0; |
480 | mcp->in_mb = MBX_0; | |
e428924c | 481 | if (IS_FWI2_CAPABLE(ha)) { |
1c7c6357 AV |
482 | mcp->mb[1] = MSW(risc_addr); |
483 | mcp->mb[2] = LSW(risc_addr); | |
484 | mcp->mb[3] = 0; | |
f73cb695 CD |
485 | if (IS_QLA25XX(ha) || IS_QLA81XX(ha) || IS_QLA83XX(ha) || |
486 | IS_QLA27XX(ha)) { | |
cad454b1 SV |
487 | struct nvram_81xx *nv = ha->nvram; |
488 | mcp->mb[4] = (nv->enhanced_features & | |
489 | EXTENDED_BB_CREDITS); | |
490 | } else | |
491 | mcp->mb[4] = 0; | |
b0d6cabd HM |
492 | |
493 | if (ha->flags.exlogins_enabled) | |
494 | mcp->mb[4] |= ENABLE_EXTENDED_LOGIN; | |
495 | ||
2f56a7f1 HM |
496 | if (ha->flags.exchoffld_enabled) |
497 | mcp->mb[4] |= ENABLE_EXCHANGE_OFFLD; | |
498 | ||
8b3253d1 | 499 | mcp->out_mb |= MBX_4|MBX_3|MBX_2|MBX_1; |
1c7c6357 AV |
500 | mcp->in_mb |= MBX_1; |
501 | } else { | |
502 | mcp->mb[1] = LSW(risc_addr); | |
503 | mcp->out_mb |= MBX_1; | |
504 | if (IS_QLA2322(ha) || IS_QLA6322(ha)) { | |
505 | mcp->mb[2] = 0; | |
506 | mcp->out_mb |= MBX_2; | |
507 | } | |
1da177e4 LT |
508 | } |
509 | ||
b93480e3 | 510 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 511 | mcp->flags = 0; |
7b867cf7 | 512 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 | 513 | |
1c7c6357 | 514 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
515 | ql_dbg(ql_dbg_mbx, vha, 0x1026, |
516 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
1c7c6357 | 517 | } else { |
e428924c | 518 | if (IS_FWI2_CAPABLE(ha)) { |
5f28d2d7 | 519 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1027, |
7c3df132 | 520 | "Done exchanges=%x.\n", mcp->mb[1]); |
1c7c6357 | 521 | } else { |
5f28d2d7 SK |
522 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1028, |
523 | "Done %s.\n", __func__); | |
1c7c6357 AV |
524 | } |
525 | } | |
1da177e4 LT |
526 | |
527 | return rval; | |
528 | } | |
529 | ||
b0d6cabd HM |
530 | /* |
531 | * qla_get_exlogin_status | |
532 | * Get extended login status | |
533 | * uses the memory offload control/status Mailbox | |
534 | * | |
535 | * Input: | |
536 | * ha: adapter state pointer. | |
537 | * fwopt: firmware options | |
538 | * | |
539 | * Returns: | |
540 | * qla2x00 local function status | |
541 | * | |
542 | * Context: | |
543 | * Kernel context. | |
544 | */ | |
545 | #define FETCH_XLOGINS_STAT 0x8 | |
546 | int | |
547 | qla_get_exlogin_status(scsi_qla_host_t *vha, uint16_t *buf_sz, | |
548 | uint16_t *ex_logins_cnt) | |
549 | { | |
550 | int rval; | |
551 | mbx_cmd_t mc; | |
552 | mbx_cmd_t *mcp = &mc; | |
553 | ||
554 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118f, | |
555 | "Entered %s\n", __func__); | |
556 | ||
557 | memset(mcp->mb, 0 , sizeof(mcp->mb)); | |
558 | mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT; | |
559 | mcp->mb[1] = FETCH_XLOGINS_STAT; | |
560 | mcp->out_mb = MBX_1|MBX_0; | |
561 | mcp->in_mb = MBX_10|MBX_4|MBX_0; | |
562 | mcp->tov = MBX_TOV_SECONDS; | |
563 | mcp->flags = 0; | |
564 | ||
565 | rval = qla2x00_mailbox_command(vha, mcp); | |
566 | if (rval != QLA_SUCCESS) { | |
567 | ql_dbg(ql_dbg_mbx, vha, 0x1115, "Failed=%x.\n", rval); | |
568 | } else { | |
569 | *buf_sz = mcp->mb[4]; | |
570 | *ex_logins_cnt = mcp->mb[10]; | |
571 | ||
572 | ql_log(ql_log_info, vha, 0x1190, | |
573 | "buffer size 0x%x, exchange login count=%d\n", | |
574 | mcp->mb[4], mcp->mb[10]); | |
575 | ||
576 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1116, | |
577 | "Done %s.\n", __func__); | |
578 | } | |
579 | ||
580 | return rval; | |
581 | } | |
582 | ||
583 | /* | |
584 | * qla_set_exlogin_mem_cfg | |
585 | * set extended login memory configuration | |
586 | * Mbx needs to be issues before init_cb is set | |
587 | * | |
588 | * Input: | |
589 | * ha: adapter state pointer. | |
590 | * buffer: buffer pointer | |
591 | * phys_addr: physical address of buffer | |
592 | * size: size of buffer | |
593 | * TARGET_QUEUE_LOCK must be released | |
594 | * ADAPTER_STATE_LOCK must be release | |
595 | * | |
596 | * Returns: | |
597 | * qla2x00 local funxtion status code. | |
598 | * | |
599 | * Context: | |
600 | * Kernel context. | |
601 | */ | |
602 | #define CONFIG_XLOGINS_MEM 0x3 | |
603 | int | |
604 | qla_set_exlogin_mem_cfg(scsi_qla_host_t *vha, dma_addr_t phys_addr) | |
605 | { | |
606 | int rval; | |
607 | mbx_cmd_t mc; | |
608 | mbx_cmd_t *mcp = &mc; | |
609 | struct qla_hw_data *ha = vha->hw; | |
610 | int configured_count; | |
611 | ||
612 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111a, | |
613 | "Entered %s.\n", __func__); | |
614 | ||
615 | memset(mcp->mb, 0 , sizeof(mcp->mb)); | |
616 | mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT; | |
617 | mcp->mb[1] = CONFIG_XLOGINS_MEM; | |
618 | mcp->mb[2] = MSW(phys_addr); | |
619 | mcp->mb[3] = LSW(phys_addr); | |
620 | mcp->mb[6] = MSW(MSD(phys_addr)); | |
621 | mcp->mb[7] = LSW(MSD(phys_addr)); | |
622 | mcp->mb[8] = MSW(ha->exlogin_size); | |
623 | mcp->mb[9] = LSW(ha->exlogin_size); | |
624 | mcp->out_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; | |
625 | mcp->in_mb = MBX_11|MBX_0; | |
626 | mcp->tov = MBX_TOV_SECONDS; | |
627 | mcp->flags = 0; | |
628 | rval = qla2x00_mailbox_command(vha, mcp); | |
629 | if (rval != QLA_SUCCESS) { | |
630 | /*EMPTY*/ | |
631 | ql_dbg(ql_dbg_mbx, vha, 0x111b, "Failed=%x.\n", rval); | |
632 | } else { | |
633 | configured_count = mcp->mb[11]; | |
634 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118c, | |
635 | "Done %s.\n", __func__); | |
636 | } | |
637 | ||
638 | return rval; | |
639 | } | |
640 | ||
2f56a7f1 HM |
641 | /* |
642 | * qla_get_exchoffld_status | |
643 | * Get exchange offload status | |
644 | * uses the memory offload control/status Mailbox | |
645 | * | |
646 | * Input: | |
647 | * ha: adapter state pointer. | |
648 | * fwopt: firmware options | |
649 | * | |
650 | * Returns: | |
651 | * qla2x00 local function status | |
652 | * | |
653 | * Context: | |
654 | * Kernel context. | |
655 | */ | |
656 | #define FETCH_XCHOFFLD_STAT 0x2 | |
657 | int | |
658 | qla_get_exchoffld_status(scsi_qla_host_t *vha, uint16_t *buf_sz, | |
659 | uint16_t *ex_logins_cnt) | |
660 | { | |
661 | int rval; | |
662 | mbx_cmd_t mc; | |
663 | mbx_cmd_t *mcp = &mc; | |
664 | ||
665 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1019, | |
666 | "Entered %s\n", __func__); | |
667 | ||
668 | memset(mcp->mb, 0 , sizeof(mcp->mb)); | |
669 | mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT; | |
670 | mcp->mb[1] = FETCH_XCHOFFLD_STAT; | |
671 | mcp->out_mb = MBX_1|MBX_0; | |
672 | mcp->in_mb = MBX_10|MBX_4|MBX_0; | |
673 | mcp->tov = MBX_TOV_SECONDS; | |
674 | mcp->flags = 0; | |
675 | ||
676 | rval = qla2x00_mailbox_command(vha, mcp); | |
677 | if (rval != QLA_SUCCESS) { | |
678 | ql_dbg(ql_dbg_mbx, vha, 0x1155, "Failed=%x.\n", rval); | |
679 | } else { | |
680 | *buf_sz = mcp->mb[4]; | |
681 | *ex_logins_cnt = mcp->mb[10]; | |
682 | ||
683 | ql_log(ql_log_info, vha, 0x118e, | |
684 | "buffer size 0x%x, exchange offload count=%d\n", | |
685 | mcp->mb[4], mcp->mb[10]); | |
686 | ||
687 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1156, | |
688 | "Done %s.\n", __func__); | |
689 | } | |
690 | ||
691 | return rval; | |
692 | } | |
693 | ||
694 | /* | |
695 | * qla_set_exchoffld_mem_cfg | |
696 | * Set exchange offload memory configuration | |
697 | * Mbx needs to be issues before init_cb is set | |
698 | * | |
699 | * Input: | |
700 | * ha: adapter state pointer. | |
701 | * buffer: buffer pointer | |
702 | * phys_addr: physical address of buffer | |
703 | * size: size of buffer | |
704 | * TARGET_QUEUE_LOCK must be released | |
705 | * ADAPTER_STATE_LOCK must be release | |
706 | * | |
707 | * Returns: | |
708 | * qla2x00 local funxtion status code. | |
709 | * | |
710 | * Context: | |
711 | * Kernel context. | |
712 | */ | |
713 | #define CONFIG_XCHOFFLD_MEM 0x3 | |
714 | int | |
715 | qla_set_exchoffld_mem_cfg(scsi_qla_host_t *vha, dma_addr_t phys_addr) | |
716 | { | |
717 | int rval; | |
718 | mbx_cmd_t mc; | |
719 | mbx_cmd_t *mcp = &mc; | |
720 | struct qla_hw_data *ha = vha->hw; | |
721 | ||
722 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1157, | |
723 | "Entered %s.\n", __func__); | |
724 | ||
725 | memset(mcp->mb, 0 , sizeof(mcp->mb)); | |
726 | mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT; | |
727 | mcp->mb[1] = CONFIG_XCHOFFLD_MEM; | |
728 | mcp->mb[2] = MSW(phys_addr); | |
729 | mcp->mb[3] = LSW(phys_addr); | |
730 | mcp->mb[6] = MSW(MSD(phys_addr)); | |
731 | mcp->mb[7] = LSW(MSD(phys_addr)); | |
732 | mcp->mb[8] = MSW(ha->exlogin_size); | |
733 | mcp->mb[9] = LSW(ha->exlogin_size); | |
734 | mcp->out_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; | |
735 | mcp->in_mb = MBX_11|MBX_0; | |
736 | mcp->tov = MBX_TOV_SECONDS; | |
737 | mcp->flags = 0; | |
738 | rval = qla2x00_mailbox_command(vha, mcp); | |
739 | if (rval != QLA_SUCCESS) { | |
740 | /*EMPTY*/ | |
741 | ql_dbg(ql_dbg_mbx, vha, 0x1158, "Failed=%x.\n", rval); | |
742 | } else { | |
743 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1192, | |
744 | "Done %s.\n", __func__); | |
745 | } | |
746 | ||
747 | return rval; | |
748 | } | |
749 | ||
1da177e4 LT |
750 | /* |
751 | * qla2x00_get_fw_version | |
752 | * Get firmware version. | |
753 | * | |
754 | * Input: | |
755 | * ha: adapter state pointer. | |
756 | * major: pointer for major number. | |
757 | * minor: pointer for minor number. | |
758 | * subminor: pointer for subminor number. | |
759 | * | |
760 | * Returns: | |
761 | * qla2x00 local function return status code. | |
762 | * | |
763 | * Context: | |
764 | * Kernel context. | |
765 | */ | |
ca9e9c3e | 766 | int |
6246b8a1 | 767 | qla2x00_get_fw_version(scsi_qla_host_t *vha) |
1da177e4 LT |
768 | { |
769 | int rval; | |
770 | mbx_cmd_t mc; | |
771 | mbx_cmd_t *mcp = &mc; | |
6246b8a1 | 772 | struct qla_hw_data *ha = vha->hw; |
1da177e4 | 773 | |
5f28d2d7 SK |
774 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1029, |
775 | "Entered %s.\n", __func__); | |
1da177e4 LT |
776 | |
777 | mcp->mb[0] = MBC_GET_FIRMWARE_VERSION; | |
778 | mcp->out_mb = MBX_0; | |
779 | mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
7ec0effd | 780 | if (IS_QLA81XX(vha->hw) || IS_QLA8031(ha) || IS_QLA8044(ha)) |
55a96158 | 781 | mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8; |
fb0effee | 782 | if (IS_FWI2_CAPABLE(ha)) |
6246b8a1 | 783 | mcp->in_mb |= MBX_17|MBX_16|MBX_15; |
f73cb695 | 784 | if (IS_QLA27XX(ha)) |
03aa868c SC |
785 | mcp->in_mb |= MBX_23 | MBX_22 | MBX_21 | MBX_20 | MBX_19 | |
786 | MBX_18 | MBX_14 | MBX_13 | MBX_11 | MBX_10 | MBX_9 | MBX_8; | |
787 | ||
1da177e4 | 788 | mcp->flags = 0; |
b93480e3 | 789 | mcp->tov = MBX_TOV_SECONDS; |
7b867cf7 | 790 | rval = qla2x00_mailbox_command(vha, mcp); |
ca9e9c3e AV |
791 | if (rval != QLA_SUCCESS) |
792 | goto failed; | |
1da177e4 LT |
793 | |
794 | /* Return mailbox data. */ | |
6246b8a1 GM |
795 | ha->fw_major_version = mcp->mb[1]; |
796 | ha->fw_minor_version = mcp->mb[2]; | |
797 | ha->fw_subminor_version = mcp->mb[3]; | |
798 | ha->fw_attributes = mcp->mb[6]; | |
7b867cf7 | 799 | if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw)) |
6246b8a1 | 800 | ha->fw_memory_size = 0x1FFFF; /* Defaults to 128KB. */ |
1da177e4 | 801 | else |
6246b8a1 | 802 | ha->fw_memory_size = (mcp->mb[5] << 16) | mcp->mb[4]; |
03aa868c | 803 | |
7ec0effd | 804 | if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || IS_QLA8044(ha)) { |
6246b8a1 GM |
805 | ha->mpi_version[0] = mcp->mb[10] & 0xff; |
806 | ha->mpi_version[1] = mcp->mb[11] >> 8; | |
807 | ha->mpi_version[2] = mcp->mb[11] & 0xff; | |
808 | ha->mpi_capabilities = (mcp->mb[12] << 16) | mcp->mb[13]; | |
809 | ha->phy_version[0] = mcp->mb[8] & 0xff; | |
810 | ha->phy_version[1] = mcp->mb[9] >> 8; | |
811 | ha->phy_version[2] = mcp->mb[9] & 0xff; | |
812 | } | |
03aa868c | 813 | |
81178772 SK |
814 | if (IS_FWI2_CAPABLE(ha)) { |
815 | ha->fw_attributes_h = mcp->mb[15]; | |
816 | ha->fw_attributes_ext[0] = mcp->mb[16]; | |
817 | ha->fw_attributes_ext[1] = mcp->mb[17]; | |
818 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1139, | |
819 | "%s: FW_attributes Upper: 0x%x, Lower: 0x%x.\n", | |
820 | __func__, mcp->mb[15], mcp->mb[6]); | |
821 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x112f, | |
822 | "%s: Ext_FwAttributes Upper: 0x%x, Lower: 0x%x.\n", | |
823 | __func__, mcp->mb[17], mcp->mb[16]); | |
2f56a7f1 | 824 | |
b0d6cabd HM |
825 | if (ha->fw_attributes_h & 0x4) |
826 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118d, | |
827 | "%s: Firmware supports Extended Login 0x%x\n", | |
828 | __func__, ha->fw_attributes_h); | |
2f56a7f1 HM |
829 | |
830 | if (ha->fw_attributes_h & 0x8) | |
831 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1191, | |
832 | "%s: Firmware supports Exchange Offload 0x%x\n", | |
833 | __func__, ha->fw_attributes_h); | |
3a03eb79 | 834 | } |
03aa868c | 835 | |
f73cb695 | 836 | if (IS_QLA27XX(ha)) { |
03aa868c SC |
837 | ha->mpi_version[0] = mcp->mb[10] & 0xff; |
838 | ha->mpi_version[1] = mcp->mb[11] >> 8; | |
839 | ha->mpi_version[2] = mcp->mb[11] & 0xff; | |
840 | ha->pep_version[0] = mcp->mb[13] & 0xff; | |
841 | ha->pep_version[1] = mcp->mb[14] >> 8; | |
842 | ha->pep_version[2] = mcp->mb[14] & 0xff; | |
f73cb695 CD |
843 | ha->fw_shared_ram_start = (mcp->mb[19] << 16) | mcp->mb[18]; |
844 | ha->fw_shared_ram_end = (mcp->mb[21] << 16) | mcp->mb[20]; | |
845 | } | |
6246b8a1 | 846 | |
ca9e9c3e | 847 | failed: |
1da177e4 LT |
848 | if (rval != QLA_SUCCESS) { |
849 | /*EMPTY*/ | |
7c3df132 | 850 | ql_dbg(ql_dbg_mbx, vha, 0x102a, "Failed=%x.\n", rval); |
1da177e4 LT |
851 | } else { |
852 | /*EMPTY*/ | |
5f28d2d7 SK |
853 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102b, |
854 | "Done %s.\n", __func__); | |
1da177e4 | 855 | } |
ca9e9c3e | 856 | return rval; |
1da177e4 LT |
857 | } |
858 | ||
859 | /* | |
860 | * qla2x00_get_fw_options | |
861 | * Set firmware options. | |
862 | * | |
863 | * Input: | |
864 | * ha = adapter block pointer. | |
865 | * fwopt = pointer for firmware options. | |
866 | * | |
867 | * Returns: | |
868 | * qla2x00 local function return status code. | |
869 | * | |
870 | * Context: | |
871 | * Kernel context. | |
872 | */ | |
873 | int | |
7b867cf7 | 874 | qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts) |
1da177e4 LT |
875 | { |
876 | int rval; | |
877 | mbx_cmd_t mc; | |
878 | mbx_cmd_t *mcp = &mc; | |
879 | ||
5f28d2d7 SK |
880 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102c, |
881 | "Entered %s.\n", __func__); | |
1da177e4 LT |
882 | |
883 | mcp->mb[0] = MBC_GET_FIRMWARE_OPTION; | |
884 | mcp->out_mb = MBX_0; | |
885 | mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0; | |
b93480e3 | 886 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 887 | mcp->flags = 0; |
7b867cf7 | 888 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
889 | |
890 | if (rval != QLA_SUCCESS) { | |
891 | /*EMPTY*/ | |
7c3df132 | 892 | ql_dbg(ql_dbg_mbx, vha, 0x102d, "Failed=%x.\n", rval); |
1da177e4 | 893 | } else { |
1c7c6357 | 894 | fwopts[0] = mcp->mb[0]; |
1da177e4 LT |
895 | fwopts[1] = mcp->mb[1]; |
896 | fwopts[2] = mcp->mb[2]; | |
897 | fwopts[3] = mcp->mb[3]; | |
898 | ||
5f28d2d7 SK |
899 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102e, |
900 | "Done %s.\n", __func__); | |
1da177e4 LT |
901 | } |
902 | ||
903 | return rval; | |
904 | } | |
905 | ||
906 | ||
907 | /* | |
908 | * qla2x00_set_fw_options | |
909 | * Set firmware options. | |
910 | * | |
911 | * Input: | |
912 | * ha = adapter block pointer. | |
913 | * fwopt = pointer for firmware options. | |
914 | * | |
915 | * Returns: | |
916 | * qla2x00 local function return status code. | |
917 | * | |
918 | * Context: | |
919 | * Kernel context. | |
920 | */ | |
921 | int | |
7b867cf7 | 922 | qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts) |
1da177e4 LT |
923 | { |
924 | int rval; | |
925 | mbx_cmd_t mc; | |
926 | mbx_cmd_t *mcp = &mc; | |
927 | ||
5f28d2d7 SK |
928 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102f, |
929 | "Entered %s.\n", __func__); | |
1da177e4 LT |
930 | |
931 | mcp->mb[0] = MBC_SET_FIRMWARE_OPTION; | |
932 | mcp->mb[1] = fwopts[1]; | |
933 | mcp->mb[2] = fwopts[2]; | |
934 | mcp->mb[3] = fwopts[3]; | |
1c7c6357 | 935 | mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; |
1da177e4 | 936 | mcp->in_mb = MBX_0; |
7b867cf7 | 937 | if (IS_FWI2_CAPABLE(vha->hw)) { |
1c7c6357 AV |
938 | mcp->in_mb |= MBX_1; |
939 | } else { | |
940 | mcp->mb[10] = fwopts[10]; | |
941 | mcp->mb[11] = fwopts[11]; | |
942 | mcp->mb[12] = 0; /* Undocumented, but used */ | |
943 | mcp->out_mb |= MBX_12|MBX_11|MBX_10; | |
944 | } | |
b93480e3 | 945 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 946 | mcp->flags = 0; |
7b867cf7 | 947 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 | 948 | |
1c7c6357 AV |
949 | fwopts[0] = mcp->mb[0]; |
950 | ||
1da177e4 LT |
951 | if (rval != QLA_SUCCESS) { |
952 | /*EMPTY*/ | |
7c3df132 SK |
953 | ql_dbg(ql_dbg_mbx, vha, 0x1030, |
954 | "Failed=%x (%x/%x).\n", rval, mcp->mb[0], mcp->mb[1]); | |
1da177e4 LT |
955 | } else { |
956 | /*EMPTY*/ | |
5f28d2d7 SK |
957 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1031, |
958 | "Done %s.\n", __func__); | |
1da177e4 LT |
959 | } |
960 | ||
961 | return rval; | |
962 | } | |
963 | ||
964 | /* | |
965 | * qla2x00_mbx_reg_test | |
966 | * Mailbox register wrap test. | |
967 | * | |
968 | * Input: | |
969 | * ha = adapter block pointer. | |
970 | * TARGET_QUEUE_LOCK must be released. | |
971 | * ADAPTER_STATE_LOCK must be released. | |
972 | * | |
973 | * Returns: | |
974 | * qla2x00 local function return status code. | |
975 | * | |
976 | * Context: | |
977 | * Kernel context. | |
978 | */ | |
979 | int | |
7b867cf7 | 980 | qla2x00_mbx_reg_test(scsi_qla_host_t *vha) |
1da177e4 LT |
981 | { |
982 | int rval; | |
983 | mbx_cmd_t mc; | |
984 | mbx_cmd_t *mcp = &mc; | |
985 | ||
5f28d2d7 SK |
986 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1032, |
987 | "Entered %s.\n", __func__); | |
1da177e4 LT |
988 | |
989 | mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST; | |
990 | mcp->mb[1] = 0xAAAA; | |
991 | mcp->mb[2] = 0x5555; | |
992 | mcp->mb[3] = 0xAA55; | |
993 | mcp->mb[4] = 0x55AA; | |
994 | mcp->mb[5] = 0xA5A5; | |
995 | mcp->mb[6] = 0x5A5A; | |
996 | mcp->mb[7] = 0x2525; | |
997 | mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
998 | mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
b93480e3 | 999 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 1000 | mcp->flags = 0; |
7b867cf7 | 1001 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
1002 | |
1003 | if (rval == QLA_SUCCESS) { | |
1004 | if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 || | |
1005 | mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA) | |
1006 | rval = QLA_FUNCTION_FAILED; | |
1007 | if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A || | |
1008 | mcp->mb[7] != 0x2525) | |
1009 | rval = QLA_FUNCTION_FAILED; | |
1010 | } | |
1011 | ||
1012 | if (rval != QLA_SUCCESS) { | |
1013 | /*EMPTY*/ | |
7c3df132 | 1014 | ql_dbg(ql_dbg_mbx, vha, 0x1033, "Failed=%x.\n", rval); |
1da177e4 LT |
1015 | } else { |
1016 | /*EMPTY*/ | |
5f28d2d7 SK |
1017 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1034, |
1018 | "Done %s.\n", __func__); | |
1da177e4 LT |
1019 | } |
1020 | ||
1021 | return rval; | |
1022 | } | |
1023 | ||
1024 | /* | |
1025 | * qla2x00_verify_checksum | |
1026 | * Verify firmware checksum. | |
1027 | * | |
1028 | * Input: | |
1029 | * ha = adapter block pointer. | |
1030 | * TARGET_QUEUE_LOCK must be released. | |
1031 | * ADAPTER_STATE_LOCK must be released. | |
1032 | * | |
1033 | * Returns: | |
1034 | * qla2x00 local function return status code. | |
1035 | * | |
1036 | * Context: | |
1037 | * Kernel context. | |
1038 | */ | |
1039 | int | |
7b867cf7 | 1040 | qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr) |
1da177e4 LT |
1041 | { |
1042 | int rval; | |
1043 | mbx_cmd_t mc; | |
1044 | mbx_cmd_t *mcp = &mc; | |
1045 | ||
5f28d2d7 SK |
1046 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1035, |
1047 | "Entered %s.\n", __func__); | |
1da177e4 LT |
1048 | |
1049 | mcp->mb[0] = MBC_VERIFY_CHECKSUM; | |
1c7c6357 AV |
1050 | mcp->out_mb = MBX_0; |
1051 | mcp->in_mb = MBX_0; | |
7b867cf7 | 1052 | if (IS_FWI2_CAPABLE(vha->hw)) { |
1c7c6357 AV |
1053 | mcp->mb[1] = MSW(risc_addr); |
1054 | mcp->mb[2] = LSW(risc_addr); | |
1055 | mcp->out_mb |= MBX_2|MBX_1; | |
1056 | mcp->in_mb |= MBX_2|MBX_1; | |
1057 | } else { | |
1058 | mcp->mb[1] = LSW(risc_addr); | |
1059 | mcp->out_mb |= MBX_1; | |
1060 | mcp->in_mb |= MBX_1; | |
1061 | } | |
1062 | ||
b93480e3 | 1063 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 1064 | mcp->flags = 0; |
7b867cf7 | 1065 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
1066 | |
1067 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
1068 | ql_dbg(ql_dbg_mbx, vha, 0x1036, |
1069 | "Failed=%x chm sum=%x.\n", rval, IS_FWI2_CAPABLE(vha->hw) ? | |
1070 | (mcp->mb[2] << 16) | mcp->mb[1] : mcp->mb[1]); | |
1da177e4 | 1071 | } else { |
5f28d2d7 SK |
1072 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1037, |
1073 | "Done %s.\n", __func__); | |
1da177e4 LT |
1074 | } |
1075 | ||
1076 | return rval; | |
1077 | } | |
1078 | ||
1079 | /* | |
1080 | * qla2x00_issue_iocb | |
1081 | * Issue IOCB using mailbox command | |
1082 | * | |
1083 | * Input: | |
1084 | * ha = adapter state pointer. | |
1085 | * buffer = buffer pointer. | |
1086 | * phys_addr = physical address of buffer. | |
1087 | * size = size of buffer. | |
1088 | * TARGET_QUEUE_LOCK must be released. | |
1089 | * ADAPTER_STATE_LOCK must be released. | |
1090 | * | |
1091 | * Returns: | |
1092 | * qla2x00 local function return status code. | |
1093 | * | |
1094 | * Context: | |
1095 | * Kernel context. | |
1096 | */ | |
6e98016c | 1097 | int |
7b867cf7 | 1098 | qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer, |
4d4df193 | 1099 | dma_addr_t phys_addr, size_t size, uint32_t tov) |
1da177e4 LT |
1100 | { |
1101 | int rval; | |
1102 | mbx_cmd_t mc; | |
1103 | mbx_cmd_t *mcp = &mc; | |
1104 | ||
5f28d2d7 SK |
1105 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1038, |
1106 | "Entered %s.\n", __func__); | |
7c3df132 | 1107 | |
1da177e4 LT |
1108 | mcp->mb[0] = MBC_IOCB_COMMAND_A64; |
1109 | mcp->mb[1] = 0; | |
1110 | mcp->mb[2] = MSW(phys_addr); | |
1111 | mcp->mb[3] = LSW(phys_addr); | |
1112 | mcp->mb[6] = MSW(MSD(phys_addr)); | |
1113 | mcp->mb[7] = LSW(MSD(phys_addr)); | |
1114 | mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; | |
1115 | mcp->in_mb = MBX_2|MBX_0; | |
4d4df193 | 1116 | mcp->tov = tov; |
1da177e4 | 1117 | mcp->flags = 0; |
7b867cf7 | 1118 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
1119 | |
1120 | if (rval != QLA_SUCCESS) { | |
1121 | /*EMPTY*/ | |
7c3df132 | 1122 | ql_dbg(ql_dbg_mbx, vha, 0x1039, "Failed=%x.\n", rval); |
1da177e4 | 1123 | } else { |
8c958a99 AV |
1124 | sts_entry_t *sts_entry = (sts_entry_t *) buffer; |
1125 | ||
1126 | /* Mask reserved bits. */ | |
1127 | sts_entry->entry_status &= | |
7b867cf7 | 1128 | IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK; |
5f28d2d7 SK |
1129 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103a, |
1130 | "Done %s.\n", __func__); | |
1da177e4 LT |
1131 | } |
1132 | ||
1133 | return rval; | |
1134 | } | |
1135 | ||
4d4df193 | 1136 | int |
7b867cf7 | 1137 | qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr, |
4d4df193 HK |
1138 | size_t size) |
1139 | { | |
7b867cf7 | 1140 | return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size, |
4d4df193 HK |
1141 | MBX_TOV_SECONDS); |
1142 | } | |
1143 | ||
1da177e4 LT |
1144 | /* |
1145 | * qla2x00_abort_command | |
1146 | * Abort command aborts a specified IOCB. | |
1147 | * | |
1148 | * Input: | |
1149 | * ha = adapter block pointer. | |
1150 | * sp = SB structure pointer. | |
1151 | * | |
1152 | * Returns: | |
1153 | * qla2x00 local function return status code. | |
1154 | * | |
1155 | * Context: | |
1156 | * Kernel context. | |
1157 | */ | |
1158 | int | |
2afa19a9 | 1159 | qla2x00_abort_command(srb_t *sp) |
1da177e4 LT |
1160 | { |
1161 | unsigned long flags = 0; | |
1da177e4 | 1162 | int rval; |
73208dfd | 1163 | uint32_t handle = 0; |
1da177e4 LT |
1164 | mbx_cmd_t mc; |
1165 | mbx_cmd_t *mcp = &mc; | |
2afa19a9 AC |
1166 | fc_port_t *fcport = sp->fcport; |
1167 | scsi_qla_host_t *vha = fcport->vha; | |
7b867cf7 | 1168 | struct qla_hw_data *ha = vha->hw; |
2afa19a9 | 1169 | struct req_que *req = vha->req; |
9ba56b95 | 1170 | struct scsi_cmnd *cmd = GET_CMD_SP(sp); |
1da177e4 | 1171 | |
5f28d2d7 SK |
1172 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103b, |
1173 | "Entered %s.\n", __func__); | |
1da177e4 | 1174 | |
c9c5ced9 | 1175 | spin_lock_irqsave(&ha->hardware_lock, flags); |
8d93f550 | 1176 | for (handle = 1; handle < req->num_outstanding_cmds; handle++) { |
7b867cf7 | 1177 | if (req->outstanding_cmds[handle] == sp) |
1da177e4 LT |
1178 | break; |
1179 | } | |
c9c5ced9 | 1180 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
1da177e4 | 1181 | |
8d93f550 | 1182 | if (handle == req->num_outstanding_cmds) { |
1da177e4 LT |
1183 | /* command not found */ |
1184 | return QLA_FUNCTION_FAILED; | |
1185 | } | |
1186 | ||
1187 | mcp->mb[0] = MBC_ABORT_COMMAND; | |
1188 | if (HAS_EXTENDED_IDS(ha)) | |
1189 | mcp->mb[1] = fcport->loop_id; | |
1190 | else | |
1191 | mcp->mb[1] = fcport->loop_id << 8; | |
1192 | mcp->mb[2] = (uint16_t)handle; | |
1193 | mcp->mb[3] = (uint16_t)(handle >> 16); | |
9ba56b95 | 1194 | mcp->mb[6] = (uint16_t)cmd->device->lun; |
1da177e4 LT |
1195 | mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; |
1196 | mcp->in_mb = MBX_0; | |
b93480e3 | 1197 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 1198 | mcp->flags = 0; |
7b867cf7 | 1199 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
1200 | |
1201 | if (rval != QLA_SUCCESS) { | |
7c3df132 | 1202 | ql_dbg(ql_dbg_mbx, vha, 0x103c, "Failed=%x.\n", rval); |
1da177e4 | 1203 | } else { |
5f28d2d7 SK |
1204 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103d, |
1205 | "Done %s.\n", __func__); | |
1da177e4 LT |
1206 | } |
1207 | ||
1208 | return rval; | |
1209 | } | |
1210 | ||
1da177e4 | 1211 | int |
9cb78c16 | 1212 | qla2x00_abort_target(struct fc_port *fcport, uint64_t l, int tag) |
1da177e4 | 1213 | { |
523ec773 | 1214 | int rval, rval2; |
1da177e4 LT |
1215 | mbx_cmd_t mc; |
1216 | mbx_cmd_t *mcp = &mc; | |
7b867cf7 | 1217 | scsi_qla_host_t *vha; |
73208dfd AC |
1218 | struct req_que *req; |
1219 | struct rsp_que *rsp; | |
1da177e4 | 1220 | |
523ec773 | 1221 | l = l; |
7b867cf7 | 1222 | vha = fcport->vha; |
7c3df132 | 1223 | |
5f28d2d7 SK |
1224 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103e, |
1225 | "Entered %s.\n", __func__); | |
7c3df132 | 1226 | |
7e2b895b GM |
1227 | req = vha->hw->req_q_map[0]; |
1228 | rsp = req->rsp; | |
1da177e4 | 1229 | mcp->mb[0] = MBC_ABORT_TARGET; |
523ec773 | 1230 | mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0; |
7b867cf7 | 1231 | if (HAS_EXTENDED_IDS(vha->hw)) { |
1da177e4 LT |
1232 | mcp->mb[1] = fcport->loop_id; |
1233 | mcp->mb[10] = 0; | |
1234 | mcp->out_mb |= MBX_10; | |
1235 | } else { | |
1236 | mcp->mb[1] = fcport->loop_id << 8; | |
1237 | } | |
7b867cf7 AC |
1238 | mcp->mb[2] = vha->hw->loop_reset_delay; |
1239 | mcp->mb[9] = vha->vp_idx; | |
1da177e4 LT |
1240 | |
1241 | mcp->in_mb = MBX_0; | |
b93480e3 | 1242 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 1243 | mcp->flags = 0; |
7b867cf7 | 1244 | rval = qla2x00_mailbox_command(vha, mcp); |
523ec773 | 1245 | if (rval != QLA_SUCCESS) { |
5f28d2d7 SK |
1246 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103f, |
1247 | "Failed=%x.\n", rval); | |
523ec773 AV |
1248 | } |
1249 | ||
1250 | /* Issue marker IOCB. */ | |
73208dfd AC |
1251 | rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, 0, |
1252 | MK_SYNC_ID); | |
523ec773 | 1253 | if (rval2 != QLA_SUCCESS) { |
7c3df132 SK |
1254 | ql_dbg(ql_dbg_mbx, vha, 0x1040, |
1255 | "Failed to issue marker IOCB (%x).\n", rval2); | |
523ec773 | 1256 | } else { |
5f28d2d7 SK |
1257 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1041, |
1258 | "Done %s.\n", __func__); | |
523ec773 AV |
1259 | } |
1260 | ||
1261 | return rval; | |
1262 | } | |
1263 | ||
1264 | int | |
9cb78c16 | 1265 | qla2x00_lun_reset(struct fc_port *fcport, uint64_t l, int tag) |
523ec773 AV |
1266 | { |
1267 | int rval, rval2; | |
1268 | mbx_cmd_t mc; | |
1269 | mbx_cmd_t *mcp = &mc; | |
7b867cf7 | 1270 | scsi_qla_host_t *vha; |
73208dfd AC |
1271 | struct req_que *req; |
1272 | struct rsp_que *rsp; | |
523ec773 | 1273 | |
7b867cf7 | 1274 | vha = fcport->vha; |
7c3df132 | 1275 | |
5f28d2d7 SK |
1276 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1042, |
1277 | "Entered %s.\n", __func__); | |
7c3df132 | 1278 | |
7e2b895b GM |
1279 | req = vha->hw->req_q_map[0]; |
1280 | rsp = req->rsp; | |
523ec773 AV |
1281 | mcp->mb[0] = MBC_LUN_RESET; |
1282 | mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0; | |
7b867cf7 | 1283 | if (HAS_EXTENDED_IDS(vha->hw)) |
523ec773 AV |
1284 | mcp->mb[1] = fcport->loop_id; |
1285 | else | |
1286 | mcp->mb[1] = fcport->loop_id << 8; | |
9cb78c16 | 1287 | mcp->mb[2] = (u32)l; |
523ec773 | 1288 | mcp->mb[3] = 0; |
7b867cf7 | 1289 | mcp->mb[9] = vha->vp_idx; |
1da177e4 | 1290 | |
523ec773 | 1291 | mcp->in_mb = MBX_0; |
b93480e3 | 1292 | mcp->tov = MBX_TOV_SECONDS; |
523ec773 | 1293 | mcp->flags = 0; |
7b867cf7 | 1294 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 | 1295 | if (rval != QLA_SUCCESS) { |
7c3df132 | 1296 | ql_dbg(ql_dbg_mbx, vha, 0x1043, "Failed=%x.\n", rval); |
523ec773 AV |
1297 | } |
1298 | ||
1299 | /* Issue marker IOCB. */ | |
73208dfd AC |
1300 | rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l, |
1301 | MK_SYNC_ID_LUN); | |
523ec773 | 1302 | if (rval2 != QLA_SUCCESS) { |
7c3df132 SK |
1303 | ql_dbg(ql_dbg_mbx, vha, 0x1044, |
1304 | "Failed to issue marker IOCB (%x).\n", rval2); | |
1da177e4 | 1305 | } else { |
5f28d2d7 SK |
1306 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1045, |
1307 | "Done %s.\n", __func__); | |
1da177e4 LT |
1308 | } |
1309 | ||
1310 | return rval; | |
1311 | } | |
1da177e4 | 1312 | |
1da177e4 LT |
1313 | /* |
1314 | * qla2x00_get_adapter_id | |
1315 | * Get adapter ID and topology. | |
1316 | * | |
1317 | * Input: | |
1318 | * ha = adapter block pointer. | |
1319 | * id = pointer for loop ID. | |
1320 | * al_pa = pointer for AL_PA. | |
1321 | * area = pointer for area. | |
1322 | * domain = pointer for domain. | |
1323 | * top = pointer for topology. | |
1324 | * TARGET_QUEUE_LOCK must be released. | |
1325 | * ADAPTER_STATE_LOCK must be released. | |
1326 | * | |
1327 | * Returns: | |
1328 | * qla2x00 local function return status code. | |
1329 | * | |
1330 | * Context: | |
1331 | * Kernel context. | |
1332 | */ | |
1333 | int | |
7b867cf7 | 1334 | qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa, |
2c3dfe3f | 1335 | uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap) |
1da177e4 LT |
1336 | { |
1337 | int rval; | |
1338 | mbx_cmd_t mc; | |
1339 | mbx_cmd_t *mcp = &mc; | |
1340 | ||
5f28d2d7 SK |
1341 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1046, |
1342 | "Entered %s.\n", __func__); | |
1da177e4 LT |
1343 | |
1344 | mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID; | |
7b867cf7 | 1345 | mcp->mb[9] = vha->vp_idx; |
eb66dc60 | 1346 | mcp->out_mb = MBX_9|MBX_0; |
2c3dfe3f | 1347 | mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; |
6246b8a1 | 1348 | if (IS_CNA_CAPABLE(vha->hw)) |
bad7001c | 1349 | mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10; |
7c9c4766 JC |
1350 | if (IS_FWI2_CAPABLE(vha->hw)) |
1351 | mcp->in_mb |= MBX_19|MBX_18|MBX_17|MBX_16; | |
b93480e3 | 1352 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 1353 | mcp->flags = 0; |
7b867cf7 | 1354 | rval = qla2x00_mailbox_command(vha, mcp); |
33135aa2 RA |
1355 | if (mcp->mb[0] == MBS_COMMAND_ERROR) |
1356 | rval = QLA_COMMAND_ERROR; | |
42e421b1 AV |
1357 | else if (mcp->mb[0] == MBS_INVALID_COMMAND) |
1358 | rval = QLA_INVALID_COMMAND; | |
1da177e4 LT |
1359 | |
1360 | /* Return data. */ | |
1361 | *id = mcp->mb[1]; | |
1362 | *al_pa = LSB(mcp->mb[2]); | |
1363 | *area = MSB(mcp->mb[2]); | |
1364 | *domain = LSB(mcp->mb[3]); | |
1365 | *top = mcp->mb[6]; | |
2c3dfe3f | 1366 | *sw_cap = mcp->mb[7]; |
1da177e4 LT |
1367 | |
1368 | if (rval != QLA_SUCCESS) { | |
1369 | /*EMPTY*/ | |
7c3df132 | 1370 | ql_dbg(ql_dbg_mbx, vha, 0x1047, "Failed=%x.\n", rval); |
1da177e4 | 1371 | } else { |
5f28d2d7 SK |
1372 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1048, |
1373 | "Done %s.\n", __func__); | |
bad7001c | 1374 | |
6246b8a1 | 1375 | if (IS_CNA_CAPABLE(vha->hw)) { |
bad7001c AV |
1376 | vha->fcoe_vlan_id = mcp->mb[9] & 0xfff; |
1377 | vha->fcoe_fcf_idx = mcp->mb[10]; | |
1378 | vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8; | |
1379 | vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff; | |
1380 | vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8; | |
1381 | vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff; | |
1382 | vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8; | |
1383 | vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff; | |
1384 | } | |
7c9c4766 | 1385 | /* If FA-WWN supported */ |
d6b9b42b SK |
1386 | if (IS_FAWWN_CAPABLE(vha->hw)) { |
1387 | if (mcp->mb[7] & BIT_14) { | |
1388 | vha->port_name[0] = MSB(mcp->mb[16]); | |
1389 | vha->port_name[1] = LSB(mcp->mb[16]); | |
1390 | vha->port_name[2] = MSB(mcp->mb[17]); | |
1391 | vha->port_name[3] = LSB(mcp->mb[17]); | |
1392 | vha->port_name[4] = MSB(mcp->mb[18]); | |
1393 | vha->port_name[5] = LSB(mcp->mb[18]); | |
1394 | vha->port_name[6] = MSB(mcp->mb[19]); | |
1395 | vha->port_name[7] = LSB(mcp->mb[19]); | |
1396 | fc_host_port_name(vha->host) = | |
1397 | wwn_to_u64(vha->port_name); | |
1398 | ql_dbg(ql_dbg_mbx, vha, 0x10ca, | |
1399 | "FA-WWN acquired %016llx\n", | |
1400 | wwn_to_u64(vha->port_name)); | |
1401 | } | |
7c9c4766 | 1402 | } |
1da177e4 LT |
1403 | } |
1404 | ||
1405 | return rval; | |
1406 | } | |
1407 | ||
1408 | /* | |
1409 | * qla2x00_get_retry_cnt | |
1410 | * Get current firmware login retry count and delay. | |
1411 | * | |
1412 | * Input: | |
1413 | * ha = adapter block pointer. | |
1414 | * retry_cnt = pointer to login retry count. | |
1415 | * tov = pointer to login timeout value. | |
1416 | * | |
1417 | * Returns: | |
1418 | * qla2x00 local function return status code. | |
1419 | * | |
1420 | * Context: | |
1421 | * Kernel context. | |
1422 | */ | |
1423 | int | |
7b867cf7 | 1424 | qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov, |
1da177e4 LT |
1425 | uint16_t *r_a_tov) |
1426 | { | |
1427 | int rval; | |
1428 | uint16_t ratov; | |
1429 | mbx_cmd_t mc; | |
1430 | mbx_cmd_t *mcp = &mc; | |
1431 | ||
5f28d2d7 SK |
1432 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1049, |
1433 | "Entered %s.\n", __func__); | |
1da177e4 LT |
1434 | |
1435 | mcp->mb[0] = MBC_GET_RETRY_COUNT; | |
1436 | mcp->out_mb = MBX_0; | |
1437 | mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0; | |
b93480e3 | 1438 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 1439 | mcp->flags = 0; |
7b867cf7 | 1440 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
1441 | |
1442 | if (rval != QLA_SUCCESS) { | |
1443 | /*EMPTY*/ | |
7c3df132 SK |
1444 | ql_dbg(ql_dbg_mbx, vha, 0x104a, |
1445 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
1da177e4 LT |
1446 | } else { |
1447 | /* Convert returned data and check our values. */ | |
1448 | *r_a_tov = mcp->mb[3] / 2; | |
1449 | ratov = (mcp->mb[3]/2) / 10; /* mb[3] value is in 100ms */ | |
1450 | if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) { | |
1451 | /* Update to the larger values */ | |
1452 | *retry_cnt = (uint8_t)mcp->mb[1]; | |
1453 | *tov = ratov; | |
1454 | } | |
1455 | ||
5f28d2d7 | 1456 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104b, |
7c3df132 | 1457 | "Done %s mb3=%d ratov=%d.\n", __func__, mcp->mb[3], ratov); |
1da177e4 LT |
1458 | } |
1459 | ||
1460 | return rval; | |
1461 | } | |
1462 | ||
1463 | /* | |
1464 | * qla2x00_init_firmware | |
1465 | * Initialize adapter firmware. | |
1466 | * | |
1467 | * Input: | |
1468 | * ha = adapter block pointer. | |
1469 | * dptr = Initialization control block pointer. | |
1470 | * size = size of initialization control block. | |
1471 | * TARGET_QUEUE_LOCK must be released. | |
1472 | * ADAPTER_STATE_LOCK must be released. | |
1473 | * | |
1474 | * Returns: | |
1475 | * qla2x00 local function return status code. | |
1476 | * | |
1477 | * Context: | |
1478 | * Kernel context. | |
1479 | */ | |
1480 | int | |
7b867cf7 | 1481 | qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size) |
1da177e4 LT |
1482 | { |
1483 | int rval; | |
1484 | mbx_cmd_t mc; | |
1485 | mbx_cmd_t *mcp = &mc; | |
7b867cf7 | 1486 | struct qla_hw_data *ha = vha->hw; |
1da177e4 | 1487 | |
5f28d2d7 SK |
1488 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104c, |
1489 | "Entered %s.\n", __func__); | |
1da177e4 | 1490 | |
7ec0effd | 1491 | if (IS_P3P_TYPE(ha) && ql2xdbwr) |
8dfa4b5a | 1492 | qla82xx_wr_32(ha, (uintptr_t __force)ha->nxdb_wr_ptr, |
a9083016 GM |
1493 | (0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16))); |
1494 | ||
e6e074f1 | 1495 | if (ha->flags.npiv_supported) |
2c3dfe3f SJ |
1496 | mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE; |
1497 | else | |
1498 | mcp->mb[0] = MBC_INITIALIZE_FIRMWARE; | |
1499 | ||
b64b0e8f | 1500 | mcp->mb[1] = 0; |
1da177e4 LT |
1501 | mcp->mb[2] = MSW(ha->init_cb_dma); |
1502 | mcp->mb[3] = LSW(ha->init_cb_dma); | |
1da177e4 LT |
1503 | mcp->mb[6] = MSW(MSD(ha->init_cb_dma)); |
1504 | mcp->mb[7] = LSW(MSD(ha->init_cb_dma)); | |
b64b0e8f | 1505 | mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; |
4ef21bd4 | 1506 | if (ha->ex_init_cb && ha->ex_init_cb->ex_version) { |
b64b0e8f AV |
1507 | mcp->mb[1] = BIT_0; |
1508 | mcp->mb[10] = MSW(ha->ex_init_cb_dma); | |
1509 | mcp->mb[11] = LSW(ha->ex_init_cb_dma); | |
1510 | mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma)); | |
1511 | mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma)); | |
1512 | mcp->mb[14] = sizeof(*ha->ex_init_cb); | |
1513 | mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10; | |
1514 | } | |
6246b8a1 GM |
1515 | /* 1 and 2 should normally be captured. */ |
1516 | mcp->in_mb = MBX_2|MBX_1|MBX_0; | |
f73cb695 | 1517 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) |
6246b8a1 GM |
1518 | /* mb3 is additional info about the installed SFP. */ |
1519 | mcp->in_mb |= MBX_3; | |
1da177e4 LT |
1520 | mcp->buf_size = size; |
1521 | mcp->flags = MBX_DMA_OUT; | |
b93480e3 | 1522 | mcp->tov = MBX_TOV_SECONDS; |
7b867cf7 | 1523 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
1524 | |
1525 | if (rval != QLA_SUCCESS) { | |
1526 | /*EMPTY*/ | |
7c3df132 | 1527 | ql_dbg(ql_dbg_mbx, vha, 0x104d, |
6246b8a1 GM |
1528 | "Failed=%x mb[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x,.\n", |
1529 | rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3]); | |
1da177e4 LT |
1530 | } else { |
1531 | /*EMPTY*/ | |
5f28d2d7 SK |
1532 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104e, |
1533 | "Done %s.\n", __func__); | |
1da177e4 LT |
1534 | } |
1535 | ||
1536 | return rval; | |
1537 | } | |
1538 | ||
2d70c103 NB |
1539 | /* |
1540 | * qla2x00_get_node_name_list | |
1541 | * Issue get node name list mailbox command, kmalloc() | |
1542 | * and return the resulting list. Caller must kfree() it! | |
1543 | * | |
1544 | * Input: | |
1545 | * ha = adapter state pointer. | |
1546 | * out_data = resulting list | |
1547 | * out_len = length of the resulting list | |
1548 | * | |
1549 | * Returns: | |
1550 | * qla2x00 local function return status code. | |
1551 | * | |
1552 | * Context: | |
1553 | * Kernel context. | |
1554 | */ | |
1555 | int | |
1556 | qla2x00_get_node_name_list(scsi_qla_host_t *vha, void **out_data, int *out_len) | |
1557 | { | |
1558 | struct qla_hw_data *ha = vha->hw; | |
1559 | struct qla_port_24xx_data *list = NULL; | |
1560 | void *pmap; | |
1561 | mbx_cmd_t mc; | |
1562 | dma_addr_t pmap_dma; | |
1563 | ulong dma_size; | |
1564 | int rval, left; | |
1565 | ||
1566 | left = 1; | |
1567 | while (left > 0) { | |
1568 | dma_size = left * sizeof(*list); | |
1569 | pmap = dma_alloc_coherent(&ha->pdev->dev, dma_size, | |
1570 | &pmap_dma, GFP_KERNEL); | |
1571 | if (!pmap) { | |
1572 | ql_log(ql_log_warn, vha, 0x113f, | |
1573 | "%s(%ld): DMA Alloc failed of %ld\n", | |
1574 | __func__, vha->host_no, dma_size); | |
1575 | rval = QLA_MEMORY_ALLOC_FAILED; | |
1576 | goto out; | |
1577 | } | |
1578 | ||
1579 | mc.mb[0] = MBC_PORT_NODE_NAME_LIST; | |
1580 | mc.mb[1] = BIT_1 | BIT_3; | |
1581 | mc.mb[2] = MSW(pmap_dma); | |
1582 | mc.mb[3] = LSW(pmap_dma); | |
1583 | mc.mb[6] = MSW(MSD(pmap_dma)); | |
1584 | mc.mb[7] = LSW(MSD(pmap_dma)); | |
1585 | mc.mb[8] = dma_size; | |
1586 | mc.out_mb = MBX_0|MBX_1|MBX_2|MBX_3|MBX_6|MBX_7|MBX_8; | |
1587 | mc.in_mb = MBX_0|MBX_1; | |
1588 | mc.tov = 30; | |
1589 | mc.flags = MBX_DMA_IN; | |
1590 | ||
1591 | rval = qla2x00_mailbox_command(vha, &mc); | |
1592 | if (rval != QLA_SUCCESS) { | |
1593 | if ((mc.mb[0] == MBS_COMMAND_ERROR) && | |
1594 | (mc.mb[1] == 0xA)) { | |
1595 | left += le16_to_cpu(mc.mb[2]) / | |
1596 | sizeof(struct qla_port_24xx_data); | |
1597 | goto restart; | |
1598 | } | |
1599 | goto out_free; | |
1600 | } | |
1601 | ||
1602 | left = 0; | |
1603 | ||
c1818f17 | 1604 | list = kmemdup(pmap, dma_size, GFP_KERNEL); |
2d70c103 NB |
1605 | if (!list) { |
1606 | ql_log(ql_log_warn, vha, 0x1140, | |
1607 | "%s(%ld): failed to allocate node names list " | |
1608 | "structure.\n", __func__, vha->host_no); | |
1609 | rval = QLA_MEMORY_ALLOC_FAILED; | |
1610 | goto out_free; | |
1611 | } | |
1612 | ||
2d70c103 NB |
1613 | restart: |
1614 | dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma); | |
1615 | } | |
1616 | ||
1617 | *out_data = list; | |
1618 | *out_len = dma_size; | |
1619 | ||
1620 | out: | |
1621 | return rval; | |
1622 | ||
1623 | out_free: | |
1624 | dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma); | |
1625 | return rval; | |
1626 | } | |
1627 | ||
1da177e4 LT |
1628 | /* |
1629 | * qla2x00_get_port_database | |
1630 | * Issue normal/enhanced get port database mailbox command | |
1631 | * and copy device name as necessary. | |
1632 | * | |
1633 | * Input: | |
1634 | * ha = adapter state pointer. | |
1635 | * dev = structure pointer. | |
1636 | * opt = enhanced cmd option byte. | |
1637 | * | |
1638 | * Returns: | |
1639 | * qla2x00 local function return status code. | |
1640 | * | |
1641 | * Context: | |
1642 | * Kernel context. | |
1643 | */ | |
1644 | int | |
7b867cf7 | 1645 | qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt) |
1da177e4 LT |
1646 | { |
1647 | int rval; | |
1648 | mbx_cmd_t mc; | |
1649 | mbx_cmd_t *mcp = &mc; | |
1650 | port_database_t *pd; | |
1c7c6357 | 1651 | struct port_database_24xx *pd24; |
1da177e4 | 1652 | dma_addr_t pd_dma; |
7b867cf7 | 1653 | struct qla_hw_data *ha = vha->hw; |
1da177e4 | 1654 | |
5f28d2d7 SK |
1655 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104f, |
1656 | "Entered %s.\n", __func__); | |
1da177e4 | 1657 | |
1c7c6357 AV |
1658 | pd24 = NULL; |
1659 | pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); | |
1da177e4 | 1660 | if (pd == NULL) { |
7c3df132 SK |
1661 | ql_log(ql_log_warn, vha, 0x1050, |
1662 | "Failed to allocate port database structure.\n"); | |
1da177e4 LT |
1663 | return QLA_MEMORY_ALLOC_FAILED; |
1664 | } | |
1c7c6357 | 1665 | memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE)); |
1da177e4 | 1666 | |
1c7c6357 | 1667 | mcp->mb[0] = MBC_GET_PORT_DATABASE; |
e428924c | 1668 | if (opt != 0 && !IS_FWI2_CAPABLE(ha)) |
1da177e4 | 1669 | mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE; |
1da177e4 LT |
1670 | mcp->mb[2] = MSW(pd_dma); |
1671 | mcp->mb[3] = LSW(pd_dma); | |
1672 | mcp->mb[6] = MSW(MSD(pd_dma)); | |
1673 | mcp->mb[7] = LSW(MSD(pd_dma)); | |
7b867cf7 | 1674 | mcp->mb[9] = vha->vp_idx; |
2c3dfe3f | 1675 | mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0; |
1da177e4 | 1676 | mcp->in_mb = MBX_0; |
e428924c | 1677 | if (IS_FWI2_CAPABLE(ha)) { |
1c7c6357 AV |
1678 | mcp->mb[1] = fcport->loop_id; |
1679 | mcp->mb[10] = opt; | |
1680 | mcp->out_mb |= MBX_10|MBX_1; | |
1681 | mcp->in_mb |= MBX_1; | |
1682 | } else if (HAS_EXTENDED_IDS(ha)) { | |
1683 | mcp->mb[1] = fcport->loop_id; | |
1684 | mcp->mb[10] = opt; | |
1685 | mcp->out_mb |= MBX_10|MBX_1; | |
1686 | } else { | |
1687 | mcp->mb[1] = fcport->loop_id << 8 | opt; | |
1688 | mcp->out_mb |= MBX_1; | |
1689 | } | |
e428924c AV |
1690 | mcp->buf_size = IS_FWI2_CAPABLE(ha) ? |
1691 | PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE; | |
1da177e4 LT |
1692 | mcp->flags = MBX_DMA_IN; |
1693 | mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2); | |
7b867cf7 | 1694 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
1695 | if (rval != QLA_SUCCESS) |
1696 | goto gpd_error_out; | |
1697 | ||
e428924c | 1698 | if (IS_FWI2_CAPABLE(ha)) { |
0eba25df | 1699 | uint64_t zero = 0; |
1c7c6357 AV |
1700 | pd24 = (struct port_database_24xx *) pd; |
1701 | ||
1702 | /* Check for logged in state. */ | |
1703 | if (pd24->current_login_state != PDS_PRLI_COMPLETE && | |
1704 | pd24->last_login_state != PDS_PRLI_COMPLETE) { | |
7c3df132 SK |
1705 | ql_dbg(ql_dbg_mbx, vha, 0x1051, |
1706 | "Unable to verify login-state (%x/%x) for " | |
1707 | "loop_id %x.\n", pd24->current_login_state, | |
1708 | pd24->last_login_state, fcport->loop_id); | |
1c7c6357 AV |
1709 | rval = QLA_FUNCTION_FAILED; |
1710 | goto gpd_error_out; | |
1711 | } | |
1da177e4 | 1712 | |
0eba25df AE |
1713 | if (fcport->loop_id == FC_NO_LOOP_ID || |
1714 | (memcmp(fcport->port_name, (uint8_t *)&zero, 8) && | |
1715 | memcmp(fcport->port_name, pd24->port_name, 8))) { | |
1716 | /* We lost the device mid way. */ | |
1717 | rval = QLA_NOT_LOGGED_IN; | |
1718 | goto gpd_error_out; | |
1719 | } | |
1720 | ||
1c7c6357 AV |
1721 | /* Names are little-endian. */ |
1722 | memcpy(fcport->node_name, pd24->node_name, WWN_SIZE); | |
1723 | memcpy(fcport->port_name, pd24->port_name, WWN_SIZE); | |
1724 | ||
1725 | /* Get port_id of device. */ | |
1726 | fcport->d_id.b.domain = pd24->port_id[0]; | |
1727 | fcport->d_id.b.area = pd24->port_id[1]; | |
1728 | fcport->d_id.b.al_pa = pd24->port_id[2]; | |
1729 | fcport->d_id.b.rsvd_1 = 0; | |
1730 | ||
1731 | /* If not target must be initiator or unknown type. */ | |
1732 | if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0) | |
1733 | fcport->port_type = FCT_INITIATOR; | |
1734 | else | |
1735 | fcport->port_type = FCT_TARGET; | |
2d70c103 NB |
1736 | |
1737 | /* Passback COS information. */ | |
1738 | fcport->supported_classes = (pd24->flags & PDF_CLASS_2) ? | |
1739 | FC_COS_CLASS2 : FC_COS_CLASS3; | |
1740 | ||
1741 | if (pd24->prli_svc_param_word_3[0] & BIT_7) | |
1742 | fcport->flags |= FCF_CONF_COMP_SUPPORTED; | |
1c7c6357 | 1743 | } else { |
0eba25df AE |
1744 | uint64_t zero = 0; |
1745 | ||
1c7c6357 AV |
1746 | /* Check for logged in state. */ |
1747 | if (pd->master_state != PD_STATE_PORT_LOGGED_IN && | |
1748 | pd->slave_state != PD_STATE_PORT_LOGGED_IN) { | |
7c3df132 SK |
1749 | ql_dbg(ql_dbg_mbx, vha, 0x100a, |
1750 | "Unable to verify login-state (%x/%x) - " | |
1751 | "portid=%02x%02x%02x.\n", pd->master_state, | |
1752 | pd->slave_state, fcport->d_id.b.domain, | |
1753 | fcport->d_id.b.area, fcport->d_id.b.al_pa); | |
1c7c6357 AV |
1754 | rval = QLA_FUNCTION_FAILED; |
1755 | goto gpd_error_out; | |
1756 | } | |
1da177e4 | 1757 | |
0eba25df AE |
1758 | if (fcport->loop_id == FC_NO_LOOP_ID || |
1759 | (memcmp(fcport->port_name, (uint8_t *)&zero, 8) && | |
1760 | memcmp(fcport->port_name, pd->port_name, 8))) { | |
1761 | /* We lost the device mid way. */ | |
1762 | rval = QLA_NOT_LOGGED_IN; | |
1763 | goto gpd_error_out; | |
1764 | } | |
1765 | ||
1c7c6357 AV |
1766 | /* Names are little-endian. */ |
1767 | memcpy(fcport->node_name, pd->node_name, WWN_SIZE); | |
1768 | memcpy(fcport->port_name, pd->port_name, WWN_SIZE); | |
1769 | ||
1770 | /* Get port_id of device. */ | |
1771 | fcport->d_id.b.domain = pd->port_id[0]; | |
1772 | fcport->d_id.b.area = pd->port_id[3]; | |
1773 | fcport->d_id.b.al_pa = pd->port_id[2]; | |
1774 | fcport->d_id.b.rsvd_1 = 0; | |
1775 | ||
1c7c6357 AV |
1776 | /* If not target must be initiator or unknown type. */ |
1777 | if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0) | |
1778 | fcport->port_type = FCT_INITIATOR; | |
1779 | else | |
1780 | fcport->port_type = FCT_TARGET; | |
ad3e0eda AV |
1781 | |
1782 | /* Passback COS information. */ | |
1783 | fcport->supported_classes = (pd->options & BIT_4) ? | |
1784 | FC_COS_CLASS2: FC_COS_CLASS3; | |
1c7c6357 | 1785 | } |
1da177e4 LT |
1786 | |
1787 | gpd_error_out: | |
1788 | dma_pool_free(ha->s_dma_pool, pd, pd_dma); | |
1789 | ||
1790 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
1791 | ql_dbg(ql_dbg_mbx, vha, 0x1052, |
1792 | "Failed=%x mb[0]=%x mb[1]=%x.\n", rval, | |
1793 | mcp->mb[0], mcp->mb[1]); | |
1da177e4 | 1794 | } else { |
5f28d2d7 SK |
1795 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1053, |
1796 | "Done %s.\n", __func__); | |
1da177e4 LT |
1797 | } |
1798 | ||
1799 | return rval; | |
1800 | } | |
1801 | ||
1802 | /* | |
1803 | * qla2x00_get_firmware_state | |
1804 | * Get adapter firmware state. | |
1805 | * | |
1806 | * Input: | |
1807 | * ha = adapter block pointer. | |
1808 | * dptr = pointer for firmware state. | |
1809 | * TARGET_QUEUE_LOCK must be released. | |
1810 | * ADAPTER_STATE_LOCK must be released. | |
1811 | * | |
1812 | * Returns: | |
1813 | * qla2x00 local function return status code. | |
1814 | * | |
1815 | * Context: | |
1816 | * Kernel context. | |
1817 | */ | |
1818 | int | |
7b867cf7 | 1819 | qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states) |
1da177e4 LT |
1820 | { |
1821 | int rval; | |
1822 | mbx_cmd_t mc; | |
1823 | mbx_cmd_t *mcp = &mc; | |
1824 | ||
5f28d2d7 SK |
1825 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1054, |
1826 | "Entered %s.\n", __func__); | |
1da177e4 LT |
1827 | |
1828 | mcp->mb[0] = MBC_GET_FIRMWARE_STATE; | |
1829 | mcp->out_mb = MBX_0; | |
9d2683c0 | 1830 | if (IS_FWI2_CAPABLE(vha->hw)) |
b5a340dd | 1831 | mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; |
9d2683c0 AV |
1832 | else |
1833 | mcp->in_mb = MBX_1|MBX_0; | |
b93480e3 | 1834 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 1835 | mcp->flags = 0; |
7b867cf7 | 1836 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 | 1837 | |
4d4df193 HK |
1838 | /* Return firmware states. */ |
1839 | states[0] = mcp->mb[1]; | |
9d2683c0 AV |
1840 | if (IS_FWI2_CAPABLE(vha->hw)) { |
1841 | states[1] = mcp->mb[2]; | |
1842 | states[2] = mcp->mb[3]; | |
1843 | states[3] = mcp->mb[4]; | |
1844 | states[4] = mcp->mb[5]; | |
b5a340dd | 1845 | states[5] = mcp->mb[6]; /* DPORT status */ |
9d2683c0 | 1846 | } |
1da177e4 LT |
1847 | |
1848 | if (rval != QLA_SUCCESS) { | |
1849 | /*EMPTY*/ | |
7c3df132 | 1850 | ql_dbg(ql_dbg_mbx, vha, 0x1055, "Failed=%x.\n", rval); |
1da177e4 LT |
1851 | } else { |
1852 | /*EMPTY*/ | |
5f28d2d7 SK |
1853 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1056, |
1854 | "Done %s.\n", __func__); | |
1da177e4 LT |
1855 | } |
1856 | ||
1857 | return rval; | |
1858 | } | |
1859 | ||
1860 | /* | |
1861 | * qla2x00_get_port_name | |
1862 | * Issue get port name mailbox command. | |
1863 | * Returned name is in big endian format. | |
1864 | * | |
1865 | * Input: | |
1866 | * ha = adapter block pointer. | |
1867 | * loop_id = loop ID of device. | |
1868 | * name = pointer for name. | |
1869 | * TARGET_QUEUE_LOCK must be released. | |
1870 | * ADAPTER_STATE_LOCK must be released. | |
1871 | * | |
1872 | * Returns: | |
1873 | * qla2x00 local function return status code. | |
1874 | * | |
1875 | * Context: | |
1876 | * Kernel context. | |
1877 | */ | |
1878 | int | |
7b867cf7 | 1879 | qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name, |
1da177e4 LT |
1880 | uint8_t opt) |
1881 | { | |
1882 | int rval; | |
1883 | mbx_cmd_t mc; | |
1884 | mbx_cmd_t *mcp = &mc; | |
1885 | ||
5f28d2d7 SK |
1886 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1057, |
1887 | "Entered %s.\n", __func__); | |
1da177e4 LT |
1888 | |
1889 | mcp->mb[0] = MBC_GET_PORT_NAME; | |
7b867cf7 | 1890 | mcp->mb[9] = vha->vp_idx; |
2c3dfe3f | 1891 | mcp->out_mb = MBX_9|MBX_1|MBX_0; |
7b867cf7 | 1892 | if (HAS_EXTENDED_IDS(vha->hw)) { |
1da177e4 LT |
1893 | mcp->mb[1] = loop_id; |
1894 | mcp->mb[10] = opt; | |
1895 | mcp->out_mb |= MBX_10; | |
1896 | } else { | |
1897 | mcp->mb[1] = loop_id << 8 | opt; | |
1898 | } | |
1899 | ||
1900 | mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; | |
b93480e3 | 1901 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 1902 | mcp->flags = 0; |
7b867cf7 | 1903 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
1904 | |
1905 | if (rval != QLA_SUCCESS) { | |
1906 | /*EMPTY*/ | |
7c3df132 | 1907 | ql_dbg(ql_dbg_mbx, vha, 0x1058, "Failed=%x.\n", rval); |
1da177e4 LT |
1908 | } else { |
1909 | if (name != NULL) { | |
1910 | /* This function returns name in big endian. */ | |
1196ae02 RL |
1911 | name[0] = MSB(mcp->mb[2]); |
1912 | name[1] = LSB(mcp->mb[2]); | |
1913 | name[2] = MSB(mcp->mb[3]); | |
1914 | name[3] = LSB(mcp->mb[3]); | |
1915 | name[4] = MSB(mcp->mb[6]); | |
1916 | name[5] = LSB(mcp->mb[6]); | |
1917 | name[6] = MSB(mcp->mb[7]); | |
1918 | name[7] = LSB(mcp->mb[7]); | |
1da177e4 LT |
1919 | } |
1920 | ||
5f28d2d7 SK |
1921 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1059, |
1922 | "Done %s.\n", __func__); | |
1da177e4 LT |
1923 | } |
1924 | ||
1925 | return rval; | |
1926 | } | |
1927 | ||
61e1b269 JC |
1928 | /* |
1929 | * qla24xx_link_initialization | |
1930 | * Issue link initialization mailbox command. | |
1931 | * | |
1932 | * Input: | |
1933 | * ha = adapter block pointer. | |
1934 | * TARGET_QUEUE_LOCK must be released. | |
1935 | * ADAPTER_STATE_LOCK must be released. | |
1936 | * | |
1937 | * Returns: | |
1938 | * qla2x00 local function return status code. | |
1939 | * | |
1940 | * Context: | |
1941 | * Kernel context. | |
1942 | */ | |
1943 | int | |
1944 | qla24xx_link_initialize(scsi_qla_host_t *vha) | |
1945 | { | |
1946 | int rval; | |
1947 | mbx_cmd_t mc; | |
1948 | mbx_cmd_t *mcp = &mc; | |
1949 | ||
1950 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1152, | |
1951 | "Entered %s.\n", __func__); | |
1952 | ||
1953 | if (!IS_FWI2_CAPABLE(vha->hw) || IS_CNA_CAPABLE(vha->hw)) | |
1954 | return QLA_FUNCTION_FAILED; | |
1955 | ||
1956 | mcp->mb[0] = MBC_LINK_INITIALIZATION; | |
5a5c27b6 JC |
1957 | mcp->mb[1] = BIT_4; |
1958 | if (vha->hw->operating_mode == LOOP) | |
1959 | mcp->mb[1] |= BIT_6; | |
1960 | else | |
1961 | mcp->mb[1] |= BIT_5; | |
61e1b269 JC |
1962 | mcp->mb[2] = 0; |
1963 | mcp->mb[3] = 0; | |
1964 | mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; | |
1965 | mcp->in_mb = MBX_0; | |
1966 | mcp->tov = MBX_TOV_SECONDS; | |
1967 | mcp->flags = 0; | |
1968 | rval = qla2x00_mailbox_command(vha, mcp); | |
1969 | ||
1970 | if (rval != QLA_SUCCESS) { | |
1971 | ql_dbg(ql_dbg_mbx, vha, 0x1153, "Failed=%x.\n", rval); | |
1972 | } else { | |
1973 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1154, | |
1974 | "Done %s.\n", __func__); | |
1975 | } | |
1976 | ||
1977 | return rval; | |
1978 | } | |
1979 | ||
1da177e4 LT |
1980 | /* |
1981 | * qla2x00_lip_reset | |
1982 | * Issue LIP reset mailbox command. | |
1983 | * | |
1984 | * Input: | |
1985 | * ha = adapter block pointer. | |
1986 | * TARGET_QUEUE_LOCK must be released. | |
1987 | * ADAPTER_STATE_LOCK must be released. | |
1988 | * | |
1989 | * Returns: | |
1990 | * qla2x00 local function return status code. | |
1991 | * | |
1992 | * Context: | |
1993 | * Kernel context. | |
1994 | */ | |
1995 | int | |
7b867cf7 | 1996 | qla2x00_lip_reset(scsi_qla_host_t *vha) |
1da177e4 LT |
1997 | { |
1998 | int rval; | |
1999 | mbx_cmd_t mc; | |
2000 | mbx_cmd_t *mcp = &mc; | |
2001 | ||
5f28d2d7 SK |
2002 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105a, |
2003 | "Entered %s.\n", __func__); | |
1da177e4 | 2004 | |
6246b8a1 | 2005 | if (IS_CNA_CAPABLE(vha->hw)) { |
3a03eb79 AV |
2006 | /* Logout across all FCFs. */ |
2007 | mcp->mb[0] = MBC_LIP_FULL_LOGIN; | |
2008 | mcp->mb[1] = BIT_1; | |
2009 | mcp->mb[2] = 0; | |
2010 | mcp->out_mb = MBX_2|MBX_1|MBX_0; | |
2011 | } else if (IS_FWI2_CAPABLE(vha->hw)) { | |
1c7c6357 | 2012 | mcp->mb[0] = MBC_LIP_FULL_LOGIN; |
0c8c39af AV |
2013 | mcp->mb[1] = BIT_6; |
2014 | mcp->mb[2] = 0; | |
7b867cf7 | 2015 | mcp->mb[3] = vha->hw->loop_reset_delay; |
1c7c6357 | 2016 | mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; |
1da177e4 | 2017 | } else { |
1c7c6357 AV |
2018 | mcp->mb[0] = MBC_LIP_RESET; |
2019 | mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; | |
7b867cf7 | 2020 | if (HAS_EXTENDED_IDS(vha->hw)) { |
1c7c6357 AV |
2021 | mcp->mb[1] = 0x00ff; |
2022 | mcp->mb[10] = 0; | |
2023 | mcp->out_mb |= MBX_10; | |
2024 | } else { | |
2025 | mcp->mb[1] = 0xff00; | |
2026 | } | |
7b867cf7 | 2027 | mcp->mb[2] = vha->hw->loop_reset_delay; |
1c7c6357 | 2028 | mcp->mb[3] = 0; |
1da177e4 | 2029 | } |
1da177e4 | 2030 | mcp->in_mb = MBX_0; |
b93480e3 | 2031 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 2032 | mcp->flags = 0; |
7b867cf7 | 2033 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
2034 | |
2035 | if (rval != QLA_SUCCESS) { | |
2036 | /*EMPTY*/ | |
7c3df132 | 2037 | ql_dbg(ql_dbg_mbx, vha, 0x105b, "Failed=%x.\n", rval); |
1da177e4 LT |
2038 | } else { |
2039 | /*EMPTY*/ | |
5f28d2d7 SK |
2040 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105c, |
2041 | "Done %s.\n", __func__); | |
1da177e4 LT |
2042 | } |
2043 | ||
2044 | return rval; | |
2045 | } | |
2046 | ||
2047 | /* | |
2048 | * qla2x00_send_sns | |
2049 | * Send SNS command. | |
2050 | * | |
2051 | * Input: | |
2052 | * ha = adapter block pointer. | |
2053 | * sns = pointer for command. | |
2054 | * cmd_size = command size. | |
2055 | * buf_size = response/command size. | |
2056 | * TARGET_QUEUE_LOCK must be released. | |
2057 | * ADAPTER_STATE_LOCK must be released. | |
2058 | * | |
2059 | * Returns: | |
2060 | * qla2x00 local function return status code. | |
2061 | * | |
2062 | * Context: | |
2063 | * Kernel context. | |
2064 | */ | |
2065 | int | |
7b867cf7 | 2066 | qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address, |
1da177e4 LT |
2067 | uint16_t cmd_size, size_t buf_size) |
2068 | { | |
2069 | int rval; | |
2070 | mbx_cmd_t mc; | |
2071 | mbx_cmd_t *mcp = &mc; | |
2072 | ||
5f28d2d7 SK |
2073 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105d, |
2074 | "Entered %s.\n", __func__); | |
1da177e4 | 2075 | |
5f28d2d7 | 2076 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105e, |
7c3df132 SK |
2077 | "Retry cnt=%d ratov=%d total tov=%d.\n", |
2078 | vha->hw->retry_count, vha->hw->login_timeout, mcp->tov); | |
1da177e4 LT |
2079 | |
2080 | mcp->mb[0] = MBC_SEND_SNS_COMMAND; | |
2081 | mcp->mb[1] = cmd_size; | |
2082 | mcp->mb[2] = MSW(sns_phys_address); | |
2083 | mcp->mb[3] = LSW(sns_phys_address); | |
2084 | mcp->mb[6] = MSW(MSD(sns_phys_address)); | |
2085 | mcp->mb[7] = LSW(MSD(sns_phys_address)); | |
2086 | mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; | |
2087 | mcp->in_mb = MBX_0|MBX_1; | |
2088 | mcp->buf_size = buf_size; | |
2089 | mcp->flags = MBX_DMA_OUT|MBX_DMA_IN; | |
7b867cf7 AC |
2090 | mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2); |
2091 | rval = qla2x00_mailbox_command(vha, mcp); | |
1da177e4 LT |
2092 | |
2093 | if (rval != QLA_SUCCESS) { | |
2094 | /*EMPTY*/ | |
7c3df132 SK |
2095 | ql_dbg(ql_dbg_mbx, vha, 0x105f, |
2096 | "Failed=%x mb[0]=%x mb[1]=%x.\n", | |
2097 | rval, mcp->mb[0], mcp->mb[1]); | |
1da177e4 LT |
2098 | } else { |
2099 | /*EMPTY*/ | |
5f28d2d7 SK |
2100 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1060, |
2101 | "Done %s.\n", __func__); | |
1da177e4 LT |
2102 | } |
2103 | ||
2104 | return rval; | |
2105 | } | |
2106 | ||
1c7c6357 | 2107 | int |
7b867cf7 | 2108 | qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain, |
1c7c6357 AV |
2109 | uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt) |
2110 | { | |
2111 | int rval; | |
2112 | ||
2113 | struct logio_entry_24xx *lg; | |
2114 | dma_addr_t lg_dma; | |
2115 | uint32_t iop[2]; | |
7b867cf7 | 2116 | struct qla_hw_data *ha = vha->hw; |
2afa19a9 | 2117 | struct req_que *req; |
1c7c6357 | 2118 | |
5f28d2d7 SK |
2119 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1061, |
2120 | "Entered %s.\n", __func__); | |
1c7c6357 | 2121 | |
7163ea81 | 2122 | if (ha->flags.cpu_affinity_enabled) |
68ca949c AC |
2123 | req = ha->req_q_map[0]; |
2124 | else | |
2125 | req = vha->req; | |
2afa19a9 | 2126 | |
1c7c6357 AV |
2127 | lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma); |
2128 | if (lg == NULL) { | |
7c3df132 SK |
2129 | ql_log(ql_log_warn, vha, 0x1062, |
2130 | "Failed to allocate login IOCB.\n"); | |
1c7c6357 AV |
2131 | return QLA_MEMORY_ALLOC_FAILED; |
2132 | } | |
2133 | memset(lg, 0, sizeof(struct logio_entry_24xx)); | |
2134 | ||
2135 | lg->entry_type = LOGINOUT_PORT_IOCB_TYPE; | |
2136 | lg->entry_count = 1; | |
2afa19a9 | 2137 | lg->handle = MAKE_HANDLE(req->id, lg->handle); |
1c7c6357 | 2138 | lg->nport_handle = cpu_to_le16(loop_id); |
ad950360 | 2139 | lg->control_flags = cpu_to_le16(LCF_COMMAND_PLOGI); |
1c7c6357 | 2140 | if (opt & BIT_0) |
ad950360 | 2141 | lg->control_flags |= cpu_to_le16(LCF_COND_PLOGI); |
8baa51a6 | 2142 | if (opt & BIT_1) |
ad950360 | 2143 | lg->control_flags |= cpu_to_le16(LCF_SKIP_PRLI); |
1c7c6357 AV |
2144 | lg->port_id[0] = al_pa; |
2145 | lg->port_id[1] = area; | |
2146 | lg->port_id[2] = domain; | |
7b867cf7 | 2147 | lg->vp_index = vha->vp_idx; |
7f45dd0b AV |
2148 | rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0, |
2149 | (ha->r_a_tov / 10 * 2) + 2); | |
1c7c6357 | 2150 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
2151 | ql_dbg(ql_dbg_mbx, vha, 0x1063, |
2152 | "Failed to issue login IOCB (%x).\n", rval); | |
1c7c6357 | 2153 | } else if (lg->entry_status != 0) { |
7c3df132 SK |
2154 | ql_dbg(ql_dbg_mbx, vha, 0x1064, |
2155 | "Failed to complete IOCB -- error status (%x).\n", | |
2156 | lg->entry_status); | |
1c7c6357 | 2157 | rval = QLA_FUNCTION_FAILED; |
ad950360 | 2158 | } else if (lg->comp_status != cpu_to_le16(CS_COMPLETE)) { |
1c7c6357 AV |
2159 | iop[0] = le32_to_cpu(lg->io_parameter[0]); |
2160 | iop[1] = le32_to_cpu(lg->io_parameter[1]); | |
2161 | ||
7c3df132 SK |
2162 | ql_dbg(ql_dbg_mbx, vha, 0x1065, |
2163 | "Failed to complete IOCB -- completion status (%x) " | |
2164 | "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status), | |
2165 | iop[0], iop[1]); | |
1c7c6357 AV |
2166 | |
2167 | switch (iop[0]) { | |
2168 | case LSC_SCODE_PORTID_USED: | |
2169 | mb[0] = MBS_PORT_ID_USED; | |
2170 | mb[1] = LSW(iop[1]); | |
2171 | break; | |
2172 | case LSC_SCODE_NPORT_USED: | |
2173 | mb[0] = MBS_LOOP_ID_USED; | |
2174 | break; | |
2175 | case LSC_SCODE_NOLINK: | |
2176 | case LSC_SCODE_NOIOCB: | |
2177 | case LSC_SCODE_NOXCB: | |
2178 | case LSC_SCODE_CMD_FAILED: | |
2179 | case LSC_SCODE_NOFABRIC: | |
2180 | case LSC_SCODE_FW_NOT_READY: | |
2181 | case LSC_SCODE_NOT_LOGGED_IN: | |
2182 | case LSC_SCODE_NOPCB: | |
2183 | case LSC_SCODE_ELS_REJECT: | |
2184 | case LSC_SCODE_CMD_PARAM_ERR: | |
2185 | case LSC_SCODE_NONPORT: | |
2186 | case LSC_SCODE_LOGGED_IN: | |
2187 | case LSC_SCODE_NOFLOGI_ACC: | |
2188 | default: | |
2189 | mb[0] = MBS_COMMAND_ERROR; | |
2190 | break; | |
2191 | } | |
2192 | } else { | |
5f28d2d7 SK |
2193 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1066, |
2194 | "Done %s.\n", __func__); | |
1c7c6357 AV |
2195 | |
2196 | iop[0] = le32_to_cpu(lg->io_parameter[0]); | |
2197 | ||
2198 | mb[0] = MBS_COMMAND_COMPLETE; | |
2199 | mb[1] = 0; | |
2200 | if (iop[0] & BIT_4) { | |
2201 | if (iop[0] & BIT_8) | |
2202 | mb[1] |= BIT_1; | |
2203 | } else | |
2204 | mb[1] = BIT_0; | |
ad3e0eda AV |
2205 | |
2206 | /* Passback COS information. */ | |
2207 | mb[10] = 0; | |
2208 | if (lg->io_parameter[7] || lg->io_parameter[8]) | |
2209 | mb[10] |= BIT_0; /* Class 2. */ | |
2210 | if (lg->io_parameter[9] || lg->io_parameter[10]) | |
2211 | mb[10] |= BIT_1; /* Class 3. */ | |
ad950360 | 2212 | if (lg->io_parameter[0] & cpu_to_le32(BIT_7)) |
2d70c103 NB |
2213 | mb[10] |= BIT_7; /* Confirmed Completion |
2214 | * Allowed | |
2215 | */ | |
1c7c6357 AV |
2216 | } |
2217 | ||
2218 | dma_pool_free(ha->s_dma_pool, lg, lg_dma); | |
2219 | ||
2220 | return rval; | |
2221 | } | |
2222 | ||
1da177e4 LT |
2223 | /* |
2224 | * qla2x00_login_fabric | |
2225 | * Issue login fabric port mailbox command. | |
2226 | * | |
2227 | * Input: | |
2228 | * ha = adapter block pointer. | |
2229 | * loop_id = device loop ID. | |
2230 | * domain = device domain. | |
2231 | * area = device area. | |
2232 | * al_pa = device AL_PA. | |
2233 | * status = pointer for return status. | |
2234 | * opt = command options. | |
2235 | * TARGET_QUEUE_LOCK must be released. | |
2236 | * ADAPTER_STATE_LOCK must be released. | |
2237 | * | |
2238 | * Returns: | |
2239 | * qla2x00 local function return status code. | |
2240 | * | |
2241 | * Context: | |
2242 | * Kernel context. | |
2243 | */ | |
2244 | int | |
7b867cf7 | 2245 | qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain, |
1da177e4 LT |
2246 | uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt) |
2247 | { | |
2248 | int rval; | |
2249 | mbx_cmd_t mc; | |
2250 | mbx_cmd_t *mcp = &mc; | |
7b867cf7 | 2251 | struct qla_hw_data *ha = vha->hw; |
1da177e4 | 2252 | |
5f28d2d7 SK |
2253 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1067, |
2254 | "Entered %s.\n", __func__); | |
1da177e4 LT |
2255 | |
2256 | mcp->mb[0] = MBC_LOGIN_FABRIC_PORT; | |
2257 | mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; | |
2258 | if (HAS_EXTENDED_IDS(ha)) { | |
2259 | mcp->mb[1] = loop_id; | |
2260 | mcp->mb[10] = opt; | |
2261 | mcp->out_mb |= MBX_10; | |
2262 | } else { | |
2263 | mcp->mb[1] = (loop_id << 8) | opt; | |
2264 | } | |
2265 | mcp->mb[2] = domain; | |
2266 | mcp->mb[3] = area << 8 | al_pa; | |
2267 | ||
2268 | mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0; | |
2269 | mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2); | |
2270 | mcp->flags = 0; | |
7b867cf7 | 2271 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
2272 | |
2273 | /* Return mailbox statuses. */ | |
2274 | if (mb != NULL) { | |
2275 | mb[0] = mcp->mb[0]; | |
2276 | mb[1] = mcp->mb[1]; | |
2277 | mb[2] = mcp->mb[2]; | |
2278 | mb[6] = mcp->mb[6]; | |
2279 | mb[7] = mcp->mb[7]; | |
ad3e0eda AV |
2280 | /* COS retrieved from Get-Port-Database mailbox command. */ |
2281 | mb[10] = 0; | |
1da177e4 LT |
2282 | } |
2283 | ||
2284 | if (rval != QLA_SUCCESS) { | |
2285 | /* RLU tmp code: need to change main mailbox_command function to | |
2286 | * return ok even when the mailbox completion value is not | |
2287 | * SUCCESS. The caller needs to be responsible to interpret | |
2288 | * the return values of this mailbox command if we're not | |
2289 | * to change too much of the existing code. | |
2290 | */ | |
2291 | if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 || | |
2292 | mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 || | |
2293 | mcp->mb[0] == 0x4006) | |
2294 | rval = QLA_SUCCESS; | |
2295 | ||
2296 | /*EMPTY*/ | |
7c3df132 SK |
2297 | ql_dbg(ql_dbg_mbx, vha, 0x1068, |
2298 | "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n", | |
2299 | rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]); | |
1da177e4 LT |
2300 | } else { |
2301 | /*EMPTY*/ | |
5f28d2d7 SK |
2302 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1069, |
2303 | "Done %s.\n", __func__); | |
1da177e4 LT |
2304 | } |
2305 | ||
2306 | return rval; | |
2307 | } | |
2308 | ||
2309 | /* | |
2310 | * qla2x00_login_local_device | |
2311 | * Issue login loop port mailbox command. | |
fa2a1ce5 | 2312 | * |
1da177e4 LT |
2313 | * Input: |
2314 | * ha = adapter block pointer. | |
2315 | * loop_id = device loop ID. | |
2316 | * opt = command options. | |
fa2a1ce5 | 2317 | * |
1da177e4 LT |
2318 | * Returns: |
2319 | * Return status code. | |
fa2a1ce5 | 2320 | * |
1da177e4 LT |
2321 | * Context: |
2322 | * Kernel context. | |
fa2a1ce5 | 2323 | * |
1da177e4 LT |
2324 | */ |
2325 | int | |
7b867cf7 | 2326 | qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
2327 | uint16_t *mb_ret, uint8_t opt) |
2328 | { | |
2329 | int rval; | |
2330 | mbx_cmd_t mc; | |
2331 | mbx_cmd_t *mcp = &mc; | |
7b867cf7 | 2332 | struct qla_hw_data *ha = vha->hw; |
1da177e4 | 2333 | |
5f28d2d7 SK |
2334 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106a, |
2335 | "Entered %s.\n", __func__); | |
7c3df132 | 2336 | |
e428924c | 2337 | if (IS_FWI2_CAPABLE(ha)) |
7b867cf7 | 2338 | return qla24xx_login_fabric(vha, fcport->loop_id, |
9a52a57c AV |
2339 | fcport->d_id.b.domain, fcport->d_id.b.area, |
2340 | fcport->d_id.b.al_pa, mb_ret, opt); | |
2341 | ||
1da177e4 LT |
2342 | mcp->mb[0] = MBC_LOGIN_LOOP_PORT; |
2343 | if (HAS_EXTENDED_IDS(ha)) | |
9a52a57c | 2344 | mcp->mb[1] = fcport->loop_id; |
1da177e4 | 2345 | else |
9a52a57c | 2346 | mcp->mb[1] = fcport->loop_id << 8; |
1da177e4 LT |
2347 | mcp->mb[2] = opt; |
2348 | mcp->out_mb = MBX_2|MBX_1|MBX_0; | |
2349 | mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0; | |
2350 | mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2); | |
2351 | mcp->flags = 0; | |
7b867cf7 | 2352 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
2353 | |
2354 | /* Return mailbox statuses. */ | |
2355 | if (mb_ret != NULL) { | |
2356 | mb_ret[0] = mcp->mb[0]; | |
2357 | mb_ret[1] = mcp->mb[1]; | |
2358 | mb_ret[6] = mcp->mb[6]; | |
2359 | mb_ret[7] = mcp->mb[7]; | |
2360 | } | |
2361 | ||
2362 | if (rval != QLA_SUCCESS) { | |
2363 | /* AV tmp code: need to change main mailbox_command function to | |
2364 | * return ok even when the mailbox completion value is not | |
2365 | * SUCCESS. The caller needs to be responsible to interpret | |
2366 | * the return values of this mailbox command if we're not | |
2367 | * to change too much of the existing code. | |
2368 | */ | |
2369 | if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006) | |
2370 | rval = QLA_SUCCESS; | |
2371 | ||
7c3df132 SK |
2372 | ql_dbg(ql_dbg_mbx, vha, 0x106b, |
2373 | "Failed=%x mb[0]=%x mb[1]=%x mb[6]=%x mb[7]=%x.\n", | |
2374 | rval, mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]); | |
1da177e4 LT |
2375 | } else { |
2376 | /*EMPTY*/ | |
5f28d2d7 SK |
2377 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106c, |
2378 | "Done %s.\n", __func__); | |
1da177e4 LT |
2379 | } |
2380 | ||
2381 | return (rval); | |
2382 | } | |
2383 | ||
1c7c6357 | 2384 | int |
7b867cf7 | 2385 | qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain, |
1c7c6357 AV |
2386 | uint8_t area, uint8_t al_pa) |
2387 | { | |
2388 | int rval; | |
2389 | struct logio_entry_24xx *lg; | |
2390 | dma_addr_t lg_dma; | |
7b867cf7 | 2391 | struct qla_hw_data *ha = vha->hw; |
2afa19a9 | 2392 | struct req_que *req; |
1c7c6357 | 2393 | |
5f28d2d7 SK |
2394 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106d, |
2395 | "Entered %s.\n", __func__); | |
1c7c6357 AV |
2396 | |
2397 | lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma); | |
2398 | if (lg == NULL) { | |
7c3df132 SK |
2399 | ql_log(ql_log_warn, vha, 0x106e, |
2400 | "Failed to allocate logout IOCB.\n"); | |
1c7c6357 AV |
2401 | return QLA_MEMORY_ALLOC_FAILED; |
2402 | } | |
2403 | memset(lg, 0, sizeof(struct logio_entry_24xx)); | |
2404 | ||
2afa19a9 AC |
2405 | if (ql2xmaxqueues > 1) |
2406 | req = ha->req_q_map[0]; | |
2407 | else | |
2408 | req = vha->req; | |
1c7c6357 AV |
2409 | lg->entry_type = LOGINOUT_PORT_IOCB_TYPE; |
2410 | lg->entry_count = 1; | |
2afa19a9 | 2411 | lg->handle = MAKE_HANDLE(req->id, lg->handle); |
1c7c6357 AV |
2412 | lg->nport_handle = cpu_to_le16(loop_id); |
2413 | lg->control_flags = | |
ad950360 | 2414 | cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO| |
c8d6691b | 2415 | LCF_FREE_NPORT); |
1c7c6357 AV |
2416 | lg->port_id[0] = al_pa; |
2417 | lg->port_id[1] = area; | |
2418 | lg->port_id[2] = domain; | |
7b867cf7 | 2419 | lg->vp_index = vha->vp_idx; |
7f45dd0b AV |
2420 | rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0, |
2421 | (ha->r_a_tov / 10 * 2) + 2); | |
1c7c6357 | 2422 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
2423 | ql_dbg(ql_dbg_mbx, vha, 0x106f, |
2424 | "Failed to issue logout IOCB (%x).\n", rval); | |
1c7c6357 | 2425 | } else if (lg->entry_status != 0) { |
7c3df132 SK |
2426 | ql_dbg(ql_dbg_mbx, vha, 0x1070, |
2427 | "Failed to complete IOCB -- error status (%x).\n", | |
2428 | lg->entry_status); | |
1c7c6357 | 2429 | rval = QLA_FUNCTION_FAILED; |
ad950360 | 2430 | } else if (lg->comp_status != cpu_to_le16(CS_COMPLETE)) { |
7c3df132 SK |
2431 | ql_dbg(ql_dbg_mbx, vha, 0x1071, |
2432 | "Failed to complete IOCB -- completion status (%x) " | |
2433 | "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status), | |
1c7c6357 | 2434 | le32_to_cpu(lg->io_parameter[0]), |
7c3df132 | 2435 | le32_to_cpu(lg->io_parameter[1])); |
1c7c6357 AV |
2436 | } else { |
2437 | /*EMPTY*/ | |
5f28d2d7 SK |
2438 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1072, |
2439 | "Done %s.\n", __func__); | |
1c7c6357 AV |
2440 | } |
2441 | ||
2442 | dma_pool_free(ha->s_dma_pool, lg, lg_dma); | |
2443 | ||
2444 | return rval; | |
2445 | } | |
2446 | ||
1da177e4 LT |
2447 | /* |
2448 | * qla2x00_fabric_logout | |
2449 | * Issue logout fabric port mailbox command. | |
2450 | * | |
2451 | * Input: | |
2452 | * ha = adapter block pointer. | |
2453 | * loop_id = device loop ID. | |
2454 | * TARGET_QUEUE_LOCK must be released. | |
2455 | * ADAPTER_STATE_LOCK must be released. | |
2456 | * | |
2457 | * Returns: | |
2458 | * qla2x00 local function return status code. | |
2459 | * | |
2460 | * Context: | |
2461 | * Kernel context. | |
2462 | */ | |
2463 | int | |
7b867cf7 | 2464 | qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain, |
1c7c6357 | 2465 | uint8_t area, uint8_t al_pa) |
1da177e4 LT |
2466 | { |
2467 | int rval; | |
2468 | mbx_cmd_t mc; | |
2469 | mbx_cmd_t *mcp = &mc; | |
2470 | ||
5f28d2d7 SK |
2471 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1073, |
2472 | "Entered %s.\n", __func__); | |
1da177e4 LT |
2473 | |
2474 | mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT; | |
2475 | mcp->out_mb = MBX_1|MBX_0; | |
7b867cf7 | 2476 | if (HAS_EXTENDED_IDS(vha->hw)) { |
1da177e4 LT |
2477 | mcp->mb[1] = loop_id; |
2478 | mcp->mb[10] = 0; | |
2479 | mcp->out_mb |= MBX_10; | |
2480 | } else { | |
2481 | mcp->mb[1] = loop_id << 8; | |
2482 | } | |
2483 | ||
2484 | mcp->in_mb = MBX_1|MBX_0; | |
b93480e3 | 2485 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 2486 | mcp->flags = 0; |
7b867cf7 | 2487 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
2488 | |
2489 | if (rval != QLA_SUCCESS) { | |
2490 | /*EMPTY*/ | |
7c3df132 SK |
2491 | ql_dbg(ql_dbg_mbx, vha, 0x1074, |
2492 | "Failed=%x mb[1]=%x.\n", rval, mcp->mb[1]); | |
1da177e4 LT |
2493 | } else { |
2494 | /*EMPTY*/ | |
5f28d2d7 SK |
2495 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1075, |
2496 | "Done %s.\n", __func__); | |
1da177e4 LT |
2497 | } |
2498 | ||
2499 | return rval; | |
2500 | } | |
2501 | ||
2502 | /* | |
2503 | * qla2x00_full_login_lip | |
2504 | * Issue full login LIP mailbox command. | |
2505 | * | |
2506 | * Input: | |
2507 | * ha = adapter block pointer. | |
2508 | * TARGET_QUEUE_LOCK must be released. | |
2509 | * ADAPTER_STATE_LOCK must be released. | |
2510 | * | |
2511 | * Returns: | |
2512 | * qla2x00 local function return status code. | |
2513 | * | |
2514 | * Context: | |
2515 | * Kernel context. | |
2516 | */ | |
2517 | int | |
7b867cf7 | 2518 | qla2x00_full_login_lip(scsi_qla_host_t *vha) |
1da177e4 LT |
2519 | { |
2520 | int rval; | |
2521 | mbx_cmd_t mc; | |
2522 | mbx_cmd_t *mcp = &mc; | |
2523 | ||
5f28d2d7 SK |
2524 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1076, |
2525 | "Entered %s.\n", __func__); | |
1da177e4 LT |
2526 | |
2527 | mcp->mb[0] = MBC_LIP_FULL_LOGIN; | |
7b867cf7 | 2528 | mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_3 : 0; |
0c8c39af | 2529 | mcp->mb[2] = 0; |
1da177e4 LT |
2530 | mcp->mb[3] = 0; |
2531 | mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; | |
2532 | mcp->in_mb = MBX_0; | |
b93480e3 | 2533 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 2534 | mcp->flags = 0; |
7b867cf7 | 2535 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
2536 | |
2537 | if (rval != QLA_SUCCESS) { | |
2538 | /*EMPTY*/ | |
7c3df132 | 2539 | ql_dbg(ql_dbg_mbx, vha, 0x1077, "Failed=%x.\n", rval); |
1da177e4 LT |
2540 | } else { |
2541 | /*EMPTY*/ | |
5f28d2d7 SK |
2542 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1078, |
2543 | "Done %s.\n", __func__); | |
1da177e4 LT |
2544 | } |
2545 | ||
2546 | return rval; | |
2547 | } | |
2548 | ||
2549 | /* | |
2550 | * qla2x00_get_id_list | |
2551 | * | |
2552 | * Input: | |
2553 | * ha = adapter block pointer. | |
2554 | * | |
2555 | * Returns: | |
2556 | * qla2x00 local function return status code. | |
2557 | * | |
2558 | * Context: | |
2559 | * Kernel context. | |
2560 | */ | |
2561 | int | |
7b867cf7 | 2562 | qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma, |
1da177e4 LT |
2563 | uint16_t *entries) |
2564 | { | |
2565 | int rval; | |
2566 | mbx_cmd_t mc; | |
2567 | mbx_cmd_t *mcp = &mc; | |
2568 | ||
5f28d2d7 SK |
2569 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1079, |
2570 | "Entered %s.\n", __func__); | |
1da177e4 LT |
2571 | |
2572 | if (id_list == NULL) | |
2573 | return QLA_FUNCTION_FAILED; | |
2574 | ||
2575 | mcp->mb[0] = MBC_GET_ID_LIST; | |
1c7c6357 | 2576 | mcp->out_mb = MBX_0; |
7b867cf7 | 2577 | if (IS_FWI2_CAPABLE(vha->hw)) { |
1c7c6357 AV |
2578 | mcp->mb[2] = MSW(id_list_dma); |
2579 | mcp->mb[3] = LSW(id_list_dma); | |
2580 | mcp->mb[6] = MSW(MSD(id_list_dma)); | |
2581 | mcp->mb[7] = LSW(MSD(id_list_dma)); | |
247ec457 | 2582 | mcp->mb[8] = 0; |
7b867cf7 | 2583 | mcp->mb[9] = vha->vp_idx; |
2c3dfe3f | 2584 | mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2; |
1c7c6357 AV |
2585 | } else { |
2586 | mcp->mb[1] = MSW(id_list_dma); | |
2587 | mcp->mb[2] = LSW(id_list_dma); | |
2588 | mcp->mb[3] = MSW(MSD(id_list_dma)); | |
2589 | mcp->mb[6] = LSW(MSD(id_list_dma)); | |
2590 | mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1; | |
2591 | } | |
1da177e4 | 2592 | mcp->in_mb = MBX_1|MBX_0; |
b93480e3 | 2593 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 2594 | mcp->flags = 0; |
7b867cf7 | 2595 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
2596 | |
2597 | if (rval != QLA_SUCCESS) { | |
2598 | /*EMPTY*/ | |
7c3df132 | 2599 | ql_dbg(ql_dbg_mbx, vha, 0x107a, "Failed=%x.\n", rval); |
1da177e4 LT |
2600 | } else { |
2601 | *entries = mcp->mb[1]; | |
5f28d2d7 SK |
2602 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107b, |
2603 | "Done %s.\n", __func__); | |
1da177e4 LT |
2604 | } |
2605 | ||
2606 | return rval; | |
2607 | } | |
2608 | ||
2609 | /* | |
2610 | * qla2x00_get_resource_cnts | |
2611 | * Get current firmware resource counts. | |
2612 | * | |
2613 | * Input: | |
2614 | * ha = adapter block pointer. | |
2615 | * | |
2616 | * Returns: | |
2617 | * qla2x00 local function return status code. | |
2618 | * | |
2619 | * Context: | |
2620 | * Kernel context. | |
2621 | */ | |
2622 | int | |
7b867cf7 | 2623 | qla2x00_get_resource_cnts(scsi_qla_host_t *vha, uint16_t *cur_xchg_cnt, |
4d0ea247 | 2624 | uint16_t *orig_xchg_cnt, uint16_t *cur_iocb_cnt, |
f3a0a77e | 2625 | uint16_t *orig_iocb_cnt, uint16_t *max_npiv_vports, uint16_t *max_fcfs) |
1da177e4 LT |
2626 | { |
2627 | int rval; | |
2628 | mbx_cmd_t mc; | |
2629 | mbx_cmd_t *mcp = &mc; | |
2630 | ||
5f28d2d7 SK |
2631 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107c, |
2632 | "Entered %s.\n", __func__); | |
1da177e4 LT |
2633 | |
2634 | mcp->mb[0] = MBC_GET_RESOURCE_COUNTS; | |
2635 | mcp->out_mb = MBX_0; | |
4d0ea247 | 2636 | mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; |
f73cb695 | 2637 | if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw) || IS_QLA27XX(vha->hw)) |
f3a0a77e | 2638 | mcp->in_mb |= MBX_12; |
b93480e3 | 2639 | mcp->tov = MBX_TOV_SECONDS; |
1da177e4 | 2640 | mcp->flags = 0; |
7b867cf7 | 2641 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
2642 | |
2643 | if (rval != QLA_SUCCESS) { | |
2644 | /*EMPTY*/ | |
7c3df132 SK |
2645 | ql_dbg(ql_dbg_mbx, vha, 0x107d, |
2646 | "Failed mb[0]=%x.\n", mcp->mb[0]); | |
1da177e4 | 2647 | } else { |
5f28d2d7 | 2648 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107e, |
7c3df132 SK |
2649 | "Done %s mb1=%x mb2=%x mb3=%x mb6=%x mb7=%x mb10=%x " |
2650 | "mb11=%x mb12=%x.\n", __func__, mcp->mb[1], mcp->mb[2], | |
2651 | mcp->mb[3], mcp->mb[6], mcp->mb[7], mcp->mb[10], | |
2652 | mcp->mb[11], mcp->mb[12]); | |
1da177e4 LT |
2653 | |
2654 | if (cur_xchg_cnt) | |
2655 | *cur_xchg_cnt = mcp->mb[3]; | |
2656 | if (orig_xchg_cnt) | |
2657 | *orig_xchg_cnt = mcp->mb[6]; | |
2658 | if (cur_iocb_cnt) | |
2659 | *cur_iocb_cnt = mcp->mb[7]; | |
2660 | if (orig_iocb_cnt) | |
2661 | *orig_iocb_cnt = mcp->mb[10]; | |
7b867cf7 | 2662 | if (vha->hw->flags.npiv_supported && max_npiv_vports) |
4d0ea247 | 2663 | *max_npiv_vports = mcp->mb[11]; |
b20f02e1 HM |
2664 | if ((IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw) || |
2665 | IS_QLA27XX(vha->hw)) && max_fcfs) | |
f3a0a77e | 2666 | *max_fcfs = mcp->mb[12]; |
1da177e4 LT |
2667 | } |
2668 | ||
2669 | return (rval); | |
2670 | } | |
2671 | ||
1da177e4 LT |
2672 | /* |
2673 | * qla2x00_get_fcal_position_map | |
2674 | * Get FCAL (LILP) position map using mailbox command | |
2675 | * | |
2676 | * Input: | |
2677 | * ha = adapter state pointer. | |
2678 | * pos_map = buffer pointer (can be NULL). | |
2679 | * | |
2680 | * Returns: | |
2681 | * qla2x00 local function return status code. | |
2682 | * | |
2683 | * Context: | |
2684 | * Kernel context. | |
2685 | */ | |
2686 | int | |
7b867cf7 | 2687 | qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map) |
1da177e4 LT |
2688 | { |
2689 | int rval; | |
2690 | mbx_cmd_t mc; | |
2691 | mbx_cmd_t *mcp = &mc; | |
2692 | char *pmap; | |
2693 | dma_addr_t pmap_dma; | |
7b867cf7 | 2694 | struct qla_hw_data *ha = vha->hw; |
1da177e4 | 2695 | |
5f28d2d7 SK |
2696 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107f, |
2697 | "Entered %s.\n", __func__); | |
7c3df132 | 2698 | |
4b89258c | 2699 | pmap = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma); |
1da177e4 | 2700 | if (pmap == NULL) { |
7c3df132 SK |
2701 | ql_log(ql_log_warn, vha, 0x1080, |
2702 | "Memory alloc failed.\n"); | |
1da177e4 LT |
2703 | return QLA_MEMORY_ALLOC_FAILED; |
2704 | } | |
2705 | memset(pmap, 0, FCAL_MAP_SIZE); | |
2706 | ||
2707 | mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP; | |
2708 | mcp->mb[2] = MSW(pmap_dma); | |
2709 | mcp->mb[3] = LSW(pmap_dma); | |
2710 | mcp->mb[6] = MSW(MSD(pmap_dma)); | |
2711 | mcp->mb[7] = LSW(MSD(pmap_dma)); | |
2712 | mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0; | |
2713 | mcp->in_mb = MBX_1|MBX_0; | |
2714 | mcp->buf_size = FCAL_MAP_SIZE; | |
2715 | mcp->flags = MBX_DMA_IN; | |
2716 | mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2); | |
7b867cf7 | 2717 | rval = qla2x00_mailbox_command(vha, mcp); |
1da177e4 LT |
2718 | |
2719 | if (rval == QLA_SUCCESS) { | |
5f28d2d7 | 2720 | ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1081, |
7c3df132 SK |
2721 | "mb0/mb1=%x/%X FC/AL position map size (%x).\n", |
2722 | mcp->mb[0], mcp->mb[1], (unsigned)pmap[0]); | |
2723 | ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111d, | |
2724 | pmap, pmap[0] + 1); | |
1da177e4 LT |
2725 | |
2726 | if (pos_map) | |
2727 | memcpy(pos_map, pmap, FCAL_MAP_SIZE); | |
2728 | } | |
2729 | dma_pool_free(ha->s_dma_pool, pmap, pmap_dma); | |
2730 | ||
2731 | if (rval != QLA_SUCCESS) { | |
7c3df132 | 2732 | ql_dbg(ql_dbg_mbx, vha, 0x1082, "Failed=%x.\n", rval); |
1da177e4 | 2733 | } else { |
5f28d2d7 SK |
2734 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1083, |
2735 | "Done %s.\n", __func__); | |
1da177e4 LT |
2736 | } |
2737 | ||
2738 | return rval; | |
2739 | } | |
392e2f65 AV |
2740 | |
2741 | /* | |
2742 | * qla2x00_get_link_status | |
2743 | * | |
2744 | * Input: | |
2745 | * ha = adapter block pointer. | |
2746 | * loop_id = device loop ID. | |
2747 | * ret_buf = pointer to link status return buffer. | |
2748 | * | |
2749 | * Returns: | |
2750 | * 0 = success. | |
2751 | * BIT_0 = mem alloc error. | |
2752 | * BIT_1 = mailbox error. | |
2753 | */ | |
2754 | int | |
7b867cf7 | 2755 | qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id, |
43ef0580 | 2756 | struct link_statistics *stats, dma_addr_t stats_dma) |
392e2f65 AV |
2757 | { |
2758 | int rval; | |
2759 | mbx_cmd_t mc; | |
2760 | mbx_cmd_t *mcp = &mc; | |
43ef0580 | 2761 | uint32_t *siter, *diter, dwords; |
7b867cf7 | 2762 | struct qla_hw_data *ha = vha->hw; |
392e2f65 | 2763 | |
5f28d2d7 SK |
2764 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1084, |
2765 | "Entered %s.\n", __func__); | |
392e2f65 | 2766 | |
392e2f65 | 2767 | mcp->mb[0] = MBC_GET_LINK_STATUS; |
43ef0580 AV |
2768 | mcp->mb[2] = MSW(stats_dma); |
2769 | mcp->mb[3] = LSW(stats_dma); | |
2770 | mcp->mb[6] = MSW(MSD(stats_dma)); | |
2771 | mcp->mb[7] = LSW(MSD(stats_dma)); | |
392e2f65 AV |
2772 | mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0; |
2773 | mcp->in_mb = MBX_0; | |
e428924c | 2774 | if (IS_FWI2_CAPABLE(ha)) { |
392e2f65 AV |
2775 | mcp->mb[1] = loop_id; |
2776 | mcp->mb[4] = 0; | |
2777 | mcp->mb[10] = 0; | |
2778 | mcp->out_mb |= MBX_10|MBX_4|MBX_1; | |
2779 | mcp->in_mb |= MBX_1; | |
2780 | } else if (HAS_EXTENDED_IDS(ha)) { | |
2781 | mcp->mb[1] = loop_id; | |
2782 | mcp->mb[10] = 0; | |
2783 | mcp->out_mb |= MBX_10|MBX_1; | |
2784 | } else { | |
2785 | mcp->mb[1] = loop_id << 8; | |
2786 | mcp->out_mb |= MBX_1; | |
2787 | } | |
b93480e3 | 2788 | mcp->tov = MBX_TOV_SECONDS; |
392e2f65 | 2789 | mcp->flags = IOCTL_CMD; |
7b867cf7 | 2790 | rval = qla2x00_mailbox_command(vha, mcp); |
392e2f65 AV |
2791 | |
2792 | if (rval == QLA_SUCCESS) { | |
2793 | if (mcp->mb[0] != MBS_COMMAND_COMPLETE) { | |
7c3df132 SK |
2794 | ql_dbg(ql_dbg_mbx, vha, 0x1085, |
2795 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
43ef0580 | 2796 | rval = QLA_FUNCTION_FAILED; |
392e2f65 | 2797 | } else { |
43ef0580 | 2798 | /* Copy over data -- firmware data is LE. */ |
5f28d2d7 SK |
2799 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1086, |
2800 | "Done %s.\n", __func__); | |
43ef0580 AV |
2801 | dwords = offsetof(struct link_statistics, unused1) / 4; |
2802 | siter = diter = &stats->link_fail_cnt; | |
2803 | while (dwords--) | |
2804 | *diter++ = le32_to_cpu(*siter++); | |
392e2f65 AV |
2805 | } |
2806 | } else { | |
2807 | /* Failed. */ | |
7c3df132 | 2808 | ql_dbg(ql_dbg_mbx, vha, 0x1087, "Failed=%x.\n", rval); |
392e2f65 AV |
2809 | } |
2810 | ||
392e2f65 AV |
2811 | return rval; |
2812 | } | |
2813 | ||
2814 | int | |
7b867cf7 | 2815 | qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats, |
43ef0580 | 2816 | dma_addr_t stats_dma) |
1c7c6357 AV |
2817 | { |
2818 | int rval; | |
2819 | mbx_cmd_t mc; | |
2820 | mbx_cmd_t *mcp = &mc; | |
43ef0580 | 2821 | uint32_t *siter, *diter, dwords; |
1c7c6357 | 2822 | |
5f28d2d7 SK |
2823 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1088, |
2824 | "Entered %s.\n", __func__); | |
1c7c6357 | 2825 | |
1c7c6357 | 2826 | mcp->mb[0] = MBC_GET_LINK_PRIV_STATS; |
43ef0580 AV |
2827 | mcp->mb[2] = MSW(stats_dma); |
2828 | mcp->mb[3] = LSW(stats_dma); | |
2829 | mcp->mb[6] = MSW(MSD(stats_dma)); | |
2830 | mcp->mb[7] = LSW(MSD(stats_dma)); | |
2831 | mcp->mb[8] = sizeof(struct link_statistics) / 4; | |
7b867cf7 | 2832 | mcp->mb[9] = vha->vp_idx; |
1c7c6357 | 2833 | mcp->mb[10] = 0; |
43ef0580 | 2834 | mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0; |
1c7c6357 | 2835 | mcp->in_mb = MBX_2|MBX_1|MBX_0; |
b93480e3 | 2836 | mcp->tov = MBX_TOV_SECONDS; |
1c7c6357 | 2837 | mcp->flags = IOCTL_CMD; |
7b867cf7 | 2838 | rval = qla2x00_mailbox_command(vha, mcp); |
1c7c6357 AV |
2839 | |
2840 | if (rval == QLA_SUCCESS) { | |
2841 | if (mcp->mb[0] != MBS_COMMAND_COMPLETE) { | |
7c3df132 SK |
2842 | ql_dbg(ql_dbg_mbx, vha, 0x1089, |
2843 | "Failed mb[0]=%x.\n", mcp->mb[0]); | |
43ef0580 | 2844 | rval = QLA_FUNCTION_FAILED; |
1c7c6357 | 2845 | } else { |
5f28d2d7 SK |
2846 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108a, |
2847 | "Done %s.\n", __func__); | |
1c7c6357 | 2848 | /* Copy over data -- firmware data is LE. */ |
43ef0580 AV |
2849 | dwords = sizeof(struct link_statistics) / 4; |
2850 | siter = diter = &stats->link_fail_cnt; | |
1c7c6357 | 2851 | while (dwords--) |
43ef0580 | 2852 | *diter++ = le32_to_cpu(*siter++); |
1c7c6357 AV |
2853 | } |
2854 | } else { | |
2855 | /* Failed. */ | |
7c3df132 | 2856 | ql_dbg(ql_dbg_mbx, vha, 0x108b, "Failed=%x.\n", rval); |
1c7c6357 AV |
2857 | } |
2858 | ||
1c7c6357 AV |
2859 | return rval; |
2860 | } | |
1c7c6357 AV |
2861 | |
2862 | int | |
2afa19a9 | 2863 | qla24xx_abort_command(srb_t *sp) |
1c7c6357 AV |
2864 | { |
2865 | int rval; | |
1c7c6357 AV |
2866 | unsigned long flags = 0; |
2867 | ||
2868 | struct abort_entry_24xx *abt; | |
2869 | dma_addr_t abt_dma; | |
2870 | uint32_t handle; | |
2afa19a9 AC |
2871 | fc_port_t *fcport = sp->fcport; |
2872 | struct scsi_qla_host *vha = fcport->vha; | |
7b867cf7 | 2873 | struct qla_hw_data *ha = vha->hw; |
67c2e93a | 2874 | struct req_que *req = vha->req; |
1c7c6357 | 2875 | |
5f28d2d7 SK |
2876 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c, |
2877 | "Entered %s.\n", __func__); | |
1c7c6357 | 2878 | |
4440e46d AB |
2879 | if (ql2xasynctmfenable) |
2880 | return qla24xx_async_abort_command(sp); | |
2881 | ||
7b867cf7 | 2882 | spin_lock_irqsave(&ha->hardware_lock, flags); |
8d93f550 | 2883 | for (handle = 1; handle < req->num_outstanding_cmds; handle++) { |
7b867cf7 | 2884 | if (req->outstanding_cmds[handle] == sp) |
1c7c6357 AV |
2885 | break; |
2886 | } | |
7b867cf7 | 2887 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
8d93f550 | 2888 | if (handle == req->num_outstanding_cmds) { |
1c7c6357 AV |
2889 | /* Command not found. */ |
2890 | return QLA_FUNCTION_FAILED; | |
2891 | } | |
2892 | ||
2893 | abt = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma); | |
2894 | if (abt == NULL) { | |
7c3df132 SK |
2895 | ql_log(ql_log_warn, vha, 0x108d, |
2896 | "Failed to allocate abort IOCB.\n"); | |
1c7c6357 AV |
2897 | return QLA_MEMORY_ALLOC_FAILED; |
2898 | } | |
2899 | memset(abt, 0, sizeof(struct abort_entry_24xx)); | |
2900 | ||
2901 | abt->entry_type = ABORT_IOCB_TYPE; | |
2902 | abt->entry_count = 1; | |
2afa19a9 | 2903 | abt->handle = MAKE_HANDLE(req->id, abt->handle); |
1c7c6357 | 2904 | abt->nport_handle = cpu_to_le16(fcport->loop_id); |
a74ec14f | 2905 | abt->handle_to_abort = MAKE_HANDLE(req->id, handle); |
1c7c6357 AV |
2906 | abt->port_id[0] = fcport->d_id.b.al_pa; |
2907 | abt->port_id[1] = fcport->d_id.b.area; | |
2908 | abt->port_id[2] = fcport->d_id.b.domain; | |
c6d39e23 | 2909 | abt->vp_index = fcport->vha->vp_idx; |
73208dfd AC |
2910 | |
2911 | abt->req_que_no = cpu_to_le16(req->id); | |
2912 | ||
7b867cf7 | 2913 | rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0); |
1c7c6357 | 2914 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
2915 | ql_dbg(ql_dbg_mbx, vha, 0x108e, |
2916 | "Failed to issue IOCB (%x).\n", rval); | |
1c7c6357 | 2917 | } else if (abt->entry_status != 0) { |
7c3df132 SK |
2918 | ql_dbg(ql_dbg_mbx, vha, 0x108f, |
2919 | "Failed to complete IOCB -- error status (%x).\n", | |
2920 | abt->entry_status); | |
1c7c6357 | 2921 | rval = QLA_FUNCTION_FAILED; |
ad950360 | 2922 | } else if (abt->nport_handle != cpu_to_le16(0)) { |
7c3df132 SK |
2923 | ql_dbg(ql_dbg_mbx, vha, 0x1090, |
2924 | "Failed to complete IOCB -- completion status (%x).\n", | |
2925 | le16_to_cpu(abt->nport_handle)); | |
f934c9d0 CD |
2926 | if (abt->nport_handle == CS_IOCB_ERROR) |
2927 | rval = QLA_FUNCTION_PARAMETER_ERROR; | |
2928 | else | |
2929 | rval = QLA_FUNCTION_FAILED; | |
1c7c6357 | 2930 | } else { |
5f28d2d7 SK |
2931 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1091, |
2932 | "Done %s.\n", __func__); | |
1c7c6357 AV |
2933 | } |
2934 | ||
2935 | dma_pool_free(ha->s_dma_pool, abt, abt_dma); | |
2936 | ||
2937 | return rval; | |
2938 | } | |
2939 | ||
2940 | struct tsk_mgmt_cmd { | |
2941 | union { | |
2942 | struct tsk_mgmt_entry tsk; | |
2943 | struct sts_entry_24xx sts; | |
2944 | } p; | |
2945 | }; | |
2946 | ||
523ec773 AV |
2947 | static int |
2948 | __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport, | |
9cb78c16 | 2949 | uint64_t l, int tag) |
1c7c6357 | 2950 | { |
523ec773 | 2951 | int rval, rval2; |
1c7c6357 | 2952 | struct tsk_mgmt_cmd *tsk; |
9ca1d01f | 2953 | struct sts_entry_24xx *sts; |
1c7c6357 | 2954 | dma_addr_t tsk_dma; |
7b867cf7 AC |
2955 | scsi_qla_host_t *vha; |
2956 | struct qla_hw_data *ha; | |
73208dfd AC |
2957 | struct req_que *req; |
2958 | struct rsp_que *rsp; | |
1c7c6357 | 2959 | |
7b867cf7 AC |
2960 | vha = fcport->vha; |
2961 | ha = vha->hw; | |
2afa19a9 | 2962 | req = vha->req; |
7c3df132 | 2963 | |
5f28d2d7 SK |
2964 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1092, |
2965 | "Entered %s.\n", __func__); | |
7c3df132 | 2966 | |
7163ea81 | 2967 | if (ha->flags.cpu_affinity_enabled) |
68ca949c AC |
2968 | rsp = ha->rsp_q_map[tag + 1]; |
2969 | else | |
2970 | rsp = req->rsp; | |
7b867cf7 | 2971 | tsk = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma); |
1c7c6357 | 2972 | if (tsk == NULL) { |
7c3df132 SK |
2973 | ql_log(ql_log_warn, vha, 0x1093, |
2974 | "Failed to allocate task management IOCB.\n"); | |
1c7c6357 AV |
2975 | return QLA_MEMORY_ALLOC_FAILED; |
2976 | } | |
2977 | memset(tsk, 0, sizeof(struct tsk_mgmt_cmd)); | |
2978 | ||
2979 | tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE; | |
2980 | tsk->p.tsk.entry_count = 1; | |
2afa19a9 | 2981 | tsk->p.tsk.handle = MAKE_HANDLE(req->id, tsk->p.tsk.handle); |
1c7c6357 | 2982 | tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id); |
00a537b8 | 2983 | tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2); |
523ec773 | 2984 | tsk->p.tsk.control_flags = cpu_to_le32(type); |
1c7c6357 AV |
2985 | tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa; |
2986 | tsk->p.tsk.port_id[1] = fcport->d_id.b.area; | |
2987 | tsk->p.tsk.port_id[2] = fcport->d_id.b.domain; | |
c6d39e23 | 2988 | tsk->p.tsk.vp_index = fcport->vha->vp_idx; |
523ec773 AV |
2989 | if (type == TCF_LUN_RESET) { |
2990 | int_to_scsilun(l, &tsk->p.tsk.lun); | |
2991 | host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun, | |
2992 | sizeof(tsk->p.tsk.lun)); | |
2993 | } | |
2c3dfe3f | 2994 | |
9ca1d01f | 2995 | sts = &tsk->p.sts; |
7b867cf7 | 2996 | rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0); |
1c7c6357 | 2997 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
2998 | ql_dbg(ql_dbg_mbx, vha, 0x1094, |
2999 | "Failed to issue %s reset IOCB (%x).\n", name, rval); | |
9ca1d01f | 3000 | } else if (sts->entry_status != 0) { |
7c3df132 SK |
3001 | ql_dbg(ql_dbg_mbx, vha, 0x1095, |
3002 | "Failed to complete IOCB -- error status (%x).\n", | |
3003 | sts->entry_status); | |
1c7c6357 | 3004 | rval = QLA_FUNCTION_FAILED; |
ad950360 | 3005 | } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) { |
7c3df132 SK |
3006 | ql_dbg(ql_dbg_mbx, vha, 0x1096, |
3007 | "Failed to complete IOCB -- completion status (%x).\n", | |
3008 | le16_to_cpu(sts->comp_status)); | |
9ca1d01f | 3009 | rval = QLA_FUNCTION_FAILED; |
97dec564 AV |
3010 | } else if (le16_to_cpu(sts->scsi_status) & |
3011 | SS_RESPONSE_INFO_LEN_VALID) { | |
3012 | if (le32_to_cpu(sts->rsp_data_len) < 4) { | |
5f28d2d7 | 3013 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1097, |
7c3df132 SK |
3014 | "Ignoring inconsistent data length -- not enough " |
3015 | "response info (%d).\n", | |
3016 | le32_to_cpu(sts->rsp_data_len)); | |
97dec564 | 3017 | } else if (sts->data[3]) { |
7c3df132 SK |
3018 | ql_dbg(ql_dbg_mbx, vha, 0x1098, |
3019 | "Failed to complete IOCB -- response (%x).\n", | |
3020 | sts->data[3]); | |
97dec564 AV |
3021 | rval = QLA_FUNCTION_FAILED; |
3022 | } | |
1c7c6357 AV |
3023 | } |
3024 | ||
3025 | /* Issue marker IOCB. */ | |
73208dfd | 3026 | rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l, |
523ec773 AV |
3027 | type == TCF_LUN_RESET ? MK_SYNC_ID_LUN: MK_SYNC_ID); |
3028 | if (rval2 != QLA_SUCCESS) { | |
7c3df132 SK |
3029 | ql_dbg(ql_dbg_mbx, vha, 0x1099, |
3030 | "Failed to issue marker IOCB (%x).\n", rval2); | |
1c7c6357 | 3031 | } else { |
5f28d2d7 SK |
3032 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109a, |
3033 | "Done %s.\n", __func__); | |
1c7c6357 AV |
3034 | } |
3035 | ||
7b867cf7 | 3036 | dma_pool_free(ha->s_dma_pool, tsk, tsk_dma); |
1c7c6357 AV |
3037 | |
3038 | return rval; | |
3039 | } | |
3040 | ||
523ec773 | 3041 | int |
9cb78c16 | 3042 | qla24xx_abort_target(struct fc_port *fcport, uint64_t l, int tag) |
523ec773 | 3043 | { |
3822263e MI |
3044 | struct qla_hw_data *ha = fcport->vha->hw; |
3045 | ||
3046 | if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha)) | |
3047 | return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag); | |
3048 | ||
2afa19a9 | 3049 | return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag); |
523ec773 AV |
3050 | } |
3051 | ||
3052 | int | |
9cb78c16 | 3053 | qla24xx_lun_reset(struct fc_port *fcport, uint64_t l, int tag) |
523ec773 | 3054 | { |
3822263e MI |
3055 | struct qla_hw_data *ha = fcport->vha->hw; |
3056 | ||
3057 | if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha)) | |
3058 | return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag); | |
3059 | ||
2afa19a9 | 3060 | return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag); |
523ec773 AV |
3061 | } |
3062 | ||
1c7c6357 | 3063 | int |
7b867cf7 | 3064 | qla2x00_system_error(scsi_qla_host_t *vha) |
1c7c6357 AV |
3065 | { |
3066 | int rval; | |
3067 | mbx_cmd_t mc; | |
3068 | mbx_cmd_t *mcp = &mc; | |
7b867cf7 | 3069 | struct qla_hw_data *ha = vha->hw; |
1c7c6357 | 3070 | |
68af0811 | 3071 | if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha)) |
1c7c6357 AV |
3072 | return QLA_FUNCTION_FAILED; |
3073 | ||
5f28d2d7 SK |
3074 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109b, |
3075 | "Entered %s.\n", __func__); | |
1c7c6357 AV |
3076 | |
3077 | mcp->mb[0] = MBC_GEN_SYSTEM_ERROR; | |
3078 | mcp->out_mb = MBX_0; | |
3079 | mcp->in_mb = MBX_0; | |
3080 | mcp->tov = 5; | |
3081 | mcp->flags = 0; | |
7b867cf7 | 3082 | rval = qla2x00_mailbox_command(vha, mcp); |
1c7c6357 AV |
3083 | |
3084 | if (rval != QLA_SUCCESS) { | |
7c3df132 | 3085 | ql_dbg(ql_dbg_mbx, vha, 0x109c, "Failed=%x.\n", rval); |
1c7c6357 | 3086 | } else { |
5f28d2d7 SK |
3087 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109d, |
3088 | "Done %s.\n", __func__); | |
1c7c6357 AV |
3089 | } |
3090 | ||
3091 | return rval; | |
3092 | } | |
3093 | ||
db64e930 JC |
3094 | int |
3095 | qla2x00_write_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t data) | |
3096 | { | |
3097 | int rval; | |
3098 | mbx_cmd_t mc; | |
3099 | mbx_cmd_t *mcp = &mc; | |
3100 | ||
f299c7c2 JC |
3101 | if (!IS_QLA25XX(vha->hw) && !IS_QLA2031(vha->hw) && |
3102 | !IS_QLA27XX(vha->hw)) | |
db64e930 JC |
3103 | return QLA_FUNCTION_FAILED; |
3104 | ||
3105 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1182, | |
3106 | "Entered %s.\n", __func__); | |
3107 | ||
3108 | mcp->mb[0] = MBC_WRITE_SERDES; | |
3109 | mcp->mb[1] = addr; | |
064135e0 AV |
3110 | if (IS_QLA2031(vha->hw)) |
3111 | mcp->mb[2] = data & 0xff; | |
3112 | else | |
3113 | mcp->mb[2] = data; | |
3114 | ||
db64e930 JC |
3115 | mcp->mb[3] = 0; |
3116 | mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; | |
3117 | mcp->in_mb = MBX_0; | |
3118 | mcp->tov = MBX_TOV_SECONDS; | |
3119 | mcp->flags = 0; | |
3120 | rval = qla2x00_mailbox_command(vha, mcp); | |
3121 | ||
3122 | if (rval != QLA_SUCCESS) { | |
3123 | ql_dbg(ql_dbg_mbx, vha, 0x1183, | |
3124 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
3125 | } else { | |
3126 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1184, | |
3127 | "Done %s.\n", __func__); | |
3128 | } | |
3129 | ||
3130 | return rval; | |
3131 | } | |
3132 | ||
3133 | int | |
3134 | qla2x00_read_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t *data) | |
3135 | { | |
3136 | int rval; | |
3137 | mbx_cmd_t mc; | |
3138 | mbx_cmd_t *mcp = &mc; | |
3139 | ||
f299c7c2 JC |
3140 | if (!IS_QLA25XX(vha->hw) && !IS_QLA2031(vha->hw) && |
3141 | !IS_QLA27XX(vha->hw)) | |
db64e930 JC |
3142 | return QLA_FUNCTION_FAILED; |
3143 | ||
3144 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1185, | |
3145 | "Entered %s.\n", __func__); | |
3146 | ||
3147 | mcp->mb[0] = MBC_READ_SERDES; | |
3148 | mcp->mb[1] = addr; | |
3149 | mcp->mb[3] = 0; | |
3150 | mcp->out_mb = MBX_3|MBX_1|MBX_0; | |
3151 | mcp->in_mb = MBX_1|MBX_0; | |
3152 | mcp->tov = MBX_TOV_SECONDS; | |
3153 | mcp->flags = 0; | |
3154 | rval = qla2x00_mailbox_command(vha, mcp); | |
3155 | ||
064135e0 AV |
3156 | if (IS_QLA2031(vha->hw)) |
3157 | *data = mcp->mb[1] & 0xff; | |
3158 | else | |
3159 | *data = mcp->mb[1]; | |
db64e930 JC |
3160 | |
3161 | if (rval != QLA_SUCCESS) { | |
3162 | ql_dbg(ql_dbg_mbx, vha, 0x1186, | |
3163 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
3164 | } else { | |
3165 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1187, | |
3166 | "Done %s.\n", __func__); | |
3167 | } | |
3168 | ||
3169 | return rval; | |
3170 | } | |
3171 | ||
e8887c51 JC |
3172 | int |
3173 | qla8044_write_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t data) | |
3174 | { | |
3175 | int rval; | |
3176 | mbx_cmd_t mc; | |
3177 | mbx_cmd_t *mcp = &mc; | |
3178 | ||
3179 | if (!IS_QLA8044(vha->hw)) | |
3180 | return QLA_FUNCTION_FAILED; | |
3181 | ||
3182 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1186, | |
3183 | "Entered %s.\n", __func__); | |
3184 | ||
3185 | mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG; | |
3186 | mcp->mb[1] = HCS_WRITE_SERDES; | |
3187 | mcp->mb[3] = LSW(addr); | |
3188 | mcp->mb[4] = MSW(addr); | |
3189 | mcp->mb[5] = LSW(data); | |
3190 | mcp->mb[6] = MSW(data); | |
3191 | mcp->out_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_1|MBX_0; | |
3192 | mcp->in_mb = MBX_0; | |
3193 | mcp->tov = MBX_TOV_SECONDS; | |
3194 | mcp->flags = 0; | |
3195 | rval = qla2x00_mailbox_command(vha, mcp); | |
3196 | ||
3197 | if (rval != QLA_SUCCESS) { | |
3198 | ql_dbg(ql_dbg_mbx, vha, 0x1187, | |
3199 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
3200 | } else { | |
3201 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1188, | |
3202 | "Done %s.\n", __func__); | |
3203 | } | |
3204 | ||
3205 | return rval; | |
3206 | } | |
3207 | ||
3208 | int | |
3209 | qla8044_read_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t *data) | |
3210 | { | |
3211 | int rval; | |
3212 | mbx_cmd_t mc; | |
3213 | mbx_cmd_t *mcp = &mc; | |
3214 | ||
3215 | if (!IS_QLA8044(vha->hw)) | |
3216 | return QLA_FUNCTION_FAILED; | |
3217 | ||
3218 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1189, | |
3219 | "Entered %s.\n", __func__); | |
3220 | ||
3221 | mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG; | |
3222 | mcp->mb[1] = HCS_READ_SERDES; | |
3223 | mcp->mb[3] = LSW(addr); | |
3224 | mcp->mb[4] = MSW(addr); | |
3225 | mcp->out_mb = MBX_4|MBX_3|MBX_1|MBX_0; | |
3226 | mcp->in_mb = MBX_2|MBX_1|MBX_0; | |
3227 | mcp->tov = MBX_TOV_SECONDS; | |
3228 | mcp->flags = 0; | |
3229 | rval = qla2x00_mailbox_command(vha, mcp); | |
3230 | ||
3231 | *data = mcp->mb[2] << 16 | mcp->mb[1]; | |
3232 | ||
3233 | if (rval != QLA_SUCCESS) { | |
3234 | ql_dbg(ql_dbg_mbx, vha, 0x118a, | |
3235 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
3236 | } else { | |
3237 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118b, | |
3238 | "Done %s.\n", __func__); | |
3239 | } | |
3240 | ||
3241 | return rval; | |
3242 | } | |
3243 | ||
1c7c6357 AV |
3244 | /** |
3245 | * qla2x00_set_serdes_params() - | |
3246 | * @ha: HA context | |
3247 | * | |
3248 | * Returns | |
3249 | */ | |
3250 | int | |
7b867cf7 | 3251 | qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g, |
1c7c6357 AV |
3252 | uint16_t sw_em_2g, uint16_t sw_em_4g) |
3253 | { | |
3254 | int rval; | |
3255 | mbx_cmd_t mc; | |
3256 | mbx_cmd_t *mcp = &mc; | |
3257 | ||
5f28d2d7 SK |
3258 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109e, |
3259 | "Entered %s.\n", __func__); | |
1c7c6357 AV |
3260 | |
3261 | mcp->mb[0] = MBC_SERDES_PARAMS; | |
3262 | mcp->mb[1] = BIT_0; | |
fdbc6833 AV |
3263 | mcp->mb[2] = sw_em_1g | BIT_15; |
3264 | mcp->mb[3] = sw_em_2g | BIT_15; | |
3265 | mcp->mb[4] = sw_em_4g | BIT_15; | |
1c7c6357 AV |
3266 | mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; |
3267 | mcp->in_mb = MBX_0; | |
b93480e3 | 3268 | mcp->tov = MBX_TOV_SECONDS; |
1c7c6357 | 3269 | mcp->flags = 0; |
7b867cf7 | 3270 | rval = qla2x00_mailbox_command(vha, mcp); |
1c7c6357 AV |
3271 | |
3272 | if (rval != QLA_SUCCESS) { | |
3273 | /*EMPTY*/ | |
7c3df132 SK |
3274 | ql_dbg(ql_dbg_mbx, vha, 0x109f, |
3275 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
1c7c6357 AV |
3276 | } else { |
3277 | /*EMPTY*/ | |
5f28d2d7 SK |
3278 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a0, |
3279 | "Done %s.\n", __func__); | |
1c7c6357 AV |
3280 | } |
3281 | ||
3282 | return rval; | |
3283 | } | |
f6ef3b18 AV |
3284 | |
3285 | int | |
7b867cf7 | 3286 | qla2x00_stop_firmware(scsi_qla_host_t *vha) |
f6ef3b18 AV |
3287 | { |
3288 | int rval; | |
3289 | mbx_cmd_t mc; | |
3290 | mbx_cmd_t *mcp = &mc; | |
3291 | ||
7b867cf7 | 3292 | if (!IS_FWI2_CAPABLE(vha->hw)) |
f6ef3b18 AV |
3293 | return QLA_FUNCTION_FAILED; |
3294 | ||
5f28d2d7 SK |
3295 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a1, |
3296 | "Entered %s.\n", __func__); | |
f6ef3b18 AV |
3297 | |
3298 | mcp->mb[0] = MBC_STOP_FIRMWARE; | |
4ba988db AV |
3299 | mcp->mb[1] = 0; |
3300 | mcp->out_mb = MBX_1|MBX_0; | |
f6ef3b18 AV |
3301 | mcp->in_mb = MBX_0; |
3302 | mcp->tov = 5; | |
3303 | mcp->flags = 0; | |
7b867cf7 | 3304 | rval = qla2x00_mailbox_command(vha, mcp); |
f6ef3b18 AV |
3305 | |
3306 | if (rval != QLA_SUCCESS) { | |
7c3df132 | 3307 | ql_dbg(ql_dbg_mbx, vha, 0x10a2, "Failed=%x.\n", rval); |
b469a7cb AV |
3308 | if (mcp->mb[0] == MBS_INVALID_COMMAND) |
3309 | rval = QLA_INVALID_COMMAND; | |
f6ef3b18 | 3310 | } else { |
5f28d2d7 SK |
3311 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a3, |
3312 | "Done %s.\n", __func__); | |
f6ef3b18 AV |
3313 | } |
3314 | ||
3315 | return rval; | |
3316 | } | |
a7a167bf AV |
3317 | |
3318 | int | |
7b867cf7 | 3319 | qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma, |
a7a167bf AV |
3320 | uint16_t buffers) |
3321 | { | |
3322 | int rval; | |
3323 | mbx_cmd_t mc; | |
3324 | mbx_cmd_t *mcp = &mc; | |
3325 | ||
5f28d2d7 SK |
3326 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a4, |
3327 | "Entered %s.\n", __func__); | |
7c3df132 | 3328 | |
7b867cf7 | 3329 | if (!IS_FWI2_CAPABLE(vha->hw)) |
a7a167bf AV |
3330 | return QLA_FUNCTION_FAILED; |
3331 | ||
85880801 AV |
3332 | if (unlikely(pci_channel_offline(vha->hw->pdev))) |
3333 | return QLA_FUNCTION_FAILED; | |
3334 | ||
a7a167bf | 3335 | mcp->mb[0] = MBC_TRACE_CONTROL; |
00b6bd25 AV |
3336 | mcp->mb[1] = TC_EFT_ENABLE; |
3337 | mcp->mb[2] = LSW(eft_dma); | |
3338 | mcp->mb[3] = MSW(eft_dma); | |
3339 | mcp->mb[4] = LSW(MSD(eft_dma)); | |
3340 | mcp->mb[5] = MSW(MSD(eft_dma)); | |
3341 | mcp->mb[6] = buffers; | |
3342 | mcp->mb[7] = TC_AEN_DISABLE; | |
3343 | mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
a7a167bf | 3344 | mcp->in_mb = MBX_1|MBX_0; |
b93480e3 | 3345 | mcp->tov = MBX_TOV_SECONDS; |
a7a167bf | 3346 | mcp->flags = 0; |
7b867cf7 | 3347 | rval = qla2x00_mailbox_command(vha, mcp); |
00b6bd25 | 3348 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
3349 | ql_dbg(ql_dbg_mbx, vha, 0x10a5, |
3350 | "Failed=%x mb[0]=%x mb[1]=%x.\n", | |
3351 | rval, mcp->mb[0], mcp->mb[1]); | |
00b6bd25 | 3352 | } else { |
5f28d2d7 SK |
3353 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a6, |
3354 | "Done %s.\n", __func__); | |
00b6bd25 AV |
3355 | } |
3356 | ||
3357 | return rval; | |
3358 | } | |
a7a167bf | 3359 | |
00b6bd25 | 3360 | int |
7b867cf7 | 3361 | qla2x00_disable_eft_trace(scsi_qla_host_t *vha) |
00b6bd25 AV |
3362 | { |
3363 | int rval; | |
3364 | mbx_cmd_t mc; | |
3365 | mbx_cmd_t *mcp = &mc; | |
3366 | ||
5f28d2d7 SK |
3367 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a7, |
3368 | "Entered %s.\n", __func__); | |
7c3df132 | 3369 | |
7b867cf7 | 3370 | if (!IS_FWI2_CAPABLE(vha->hw)) |
00b6bd25 AV |
3371 | return QLA_FUNCTION_FAILED; |
3372 | ||
85880801 AV |
3373 | if (unlikely(pci_channel_offline(vha->hw->pdev))) |
3374 | return QLA_FUNCTION_FAILED; | |
3375 | ||
00b6bd25 AV |
3376 | mcp->mb[0] = MBC_TRACE_CONTROL; |
3377 | mcp->mb[1] = TC_EFT_DISABLE; | |
3378 | mcp->out_mb = MBX_1|MBX_0; | |
3379 | mcp->in_mb = MBX_1|MBX_0; | |
b93480e3 | 3380 | mcp->tov = MBX_TOV_SECONDS; |
00b6bd25 | 3381 | mcp->flags = 0; |
7b867cf7 | 3382 | rval = qla2x00_mailbox_command(vha, mcp); |
a7a167bf | 3383 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
3384 | ql_dbg(ql_dbg_mbx, vha, 0x10a8, |
3385 | "Failed=%x mb[0]=%x mb[1]=%x.\n", | |
3386 | rval, mcp->mb[0], mcp->mb[1]); | |
a7a167bf | 3387 | } else { |
5f28d2d7 SK |
3388 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a9, |
3389 | "Done %s.\n", __func__); | |
a7a167bf AV |
3390 | } |
3391 | ||
3392 | return rval; | |
3393 | } | |
3394 | ||
df613b96 | 3395 | int |
7b867cf7 | 3396 | qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma, |
df613b96 AV |
3397 | uint16_t buffers, uint16_t *mb, uint32_t *dwords) |
3398 | { | |
3399 | int rval; | |
3400 | mbx_cmd_t mc; | |
3401 | mbx_cmd_t *mcp = &mc; | |
3402 | ||
5f28d2d7 SK |
3403 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10aa, |
3404 | "Entered %s.\n", __func__); | |
7c3df132 | 3405 | |
6246b8a1 | 3406 | if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw) && |
f73cb695 | 3407 | !IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw)) |
df613b96 AV |
3408 | return QLA_FUNCTION_FAILED; |
3409 | ||
85880801 AV |
3410 | if (unlikely(pci_channel_offline(vha->hw->pdev))) |
3411 | return QLA_FUNCTION_FAILED; | |
3412 | ||
df613b96 AV |
3413 | mcp->mb[0] = MBC_TRACE_CONTROL; |
3414 | mcp->mb[1] = TC_FCE_ENABLE; | |
3415 | mcp->mb[2] = LSW(fce_dma); | |
3416 | mcp->mb[3] = MSW(fce_dma); | |
3417 | mcp->mb[4] = LSW(MSD(fce_dma)); | |
3418 | mcp->mb[5] = MSW(MSD(fce_dma)); | |
3419 | mcp->mb[6] = buffers; | |
3420 | mcp->mb[7] = TC_AEN_DISABLE; | |
3421 | mcp->mb[8] = 0; | |
3422 | mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE; | |
3423 | mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE; | |
3424 | mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2| | |
3425 | MBX_1|MBX_0; | |
3426 | mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
b93480e3 | 3427 | mcp->tov = MBX_TOV_SECONDS; |
df613b96 | 3428 | mcp->flags = 0; |
7b867cf7 | 3429 | rval = qla2x00_mailbox_command(vha, mcp); |
df613b96 | 3430 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
3431 | ql_dbg(ql_dbg_mbx, vha, 0x10ab, |
3432 | "Failed=%x mb[0]=%x mb[1]=%x.\n", | |
3433 | rval, mcp->mb[0], mcp->mb[1]); | |
df613b96 | 3434 | } else { |
5f28d2d7 SK |
3435 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ac, |
3436 | "Done %s.\n", __func__); | |
df613b96 AV |
3437 | |
3438 | if (mb) | |
3439 | memcpy(mb, mcp->mb, 8 * sizeof(*mb)); | |
3440 | if (dwords) | |
fa0926df | 3441 | *dwords = buffers; |
df613b96 AV |
3442 | } |
3443 | ||
3444 | return rval; | |
3445 | } | |
3446 | ||
3447 | int | |
7b867cf7 | 3448 | qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd) |
df613b96 AV |
3449 | { |
3450 | int rval; | |
3451 | mbx_cmd_t mc; | |
3452 | mbx_cmd_t *mcp = &mc; | |
3453 | ||
5f28d2d7 SK |
3454 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ad, |
3455 | "Entered %s.\n", __func__); | |
7c3df132 | 3456 | |
7b867cf7 | 3457 | if (!IS_FWI2_CAPABLE(vha->hw)) |
df613b96 AV |
3458 | return QLA_FUNCTION_FAILED; |
3459 | ||
85880801 AV |
3460 | if (unlikely(pci_channel_offline(vha->hw->pdev))) |
3461 | return QLA_FUNCTION_FAILED; | |
3462 | ||
df613b96 AV |
3463 | mcp->mb[0] = MBC_TRACE_CONTROL; |
3464 | mcp->mb[1] = TC_FCE_DISABLE; | |
3465 | mcp->mb[2] = TC_FCE_DISABLE_TRACE; | |
3466 | mcp->out_mb = MBX_2|MBX_1|MBX_0; | |
3467 | mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2| | |
3468 | MBX_1|MBX_0; | |
b93480e3 | 3469 | mcp->tov = MBX_TOV_SECONDS; |
df613b96 | 3470 | mcp->flags = 0; |
7b867cf7 | 3471 | rval = qla2x00_mailbox_command(vha, mcp); |
df613b96 | 3472 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
3473 | ql_dbg(ql_dbg_mbx, vha, 0x10ae, |
3474 | "Failed=%x mb[0]=%x mb[1]=%x.\n", | |
3475 | rval, mcp->mb[0], mcp->mb[1]); | |
df613b96 | 3476 | } else { |
5f28d2d7 SK |
3477 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10af, |
3478 | "Done %s.\n", __func__); | |
df613b96 AV |
3479 | |
3480 | if (wr) | |
3481 | *wr = (uint64_t) mcp->mb[5] << 48 | | |
3482 | (uint64_t) mcp->mb[4] << 32 | | |
3483 | (uint64_t) mcp->mb[3] << 16 | | |
3484 | (uint64_t) mcp->mb[2]; | |
3485 | if (rd) | |
3486 | *rd = (uint64_t) mcp->mb[9] << 48 | | |
3487 | (uint64_t) mcp->mb[8] << 32 | | |
3488 | (uint64_t) mcp->mb[7] << 16 | | |
3489 | (uint64_t) mcp->mb[6]; | |
3490 | } | |
3491 | ||
3492 | return rval; | |
3493 | } | |
3494 | ||
6e98016c GM |
3495 | int |
3496 | qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id, | |
3497 | uint16_t *port_speed, uint16_t *mb) | |
3498 | { | |
3499 | int rval; | |
3500 | mbx_cmd_t mc; | |
3501 | mbx_cmd_t *mcp = &mc; | |
3502 | ||
5f28d2d7 SK |
3503 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b0, |
3504 | "Entered %s.\n", __func__); | |
7c3df132 | 3505 | |
6e98016c GM |
3506 | if (!IS_IIDMA_CAPABLE(vha->hw)) |
3507 | return QLA_FUNCTION_FAILED; | |
3508 | ||
6e98016c GM |
3509 | mcp->mb[0] = MBC_PORT_PARAMS; |
3510 | mcp->mb[1] = loop_id; | |
3511 | mcp->mb[2] = mcp->mb[3] = 0; | |
3512 | mcp->mb[9] = vha->vp_idx; | |
3513 | mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0; | |
3514 | mcp->in_mb = MBX_3|MBX_1|MBX_0; | |
3515 | mcp->tov = MBX_TOV_SECONDS; | |
3516 | mcp->flags = 0; | |
3517 | rval = qla2x00_mailbox_command(vha, mcp); | |
3518 | ||
3519 | /* Return mailbox statuses. */ | |
3520 | if (mb != NULL) { | |
3521 | mb[0] = mcp->mb[0]; | |
3522 | mb[1] = mcp->mb[1]; | |
3523 | mb[3] = mcp->mb[3]; | |
3524 | } | |
3525 | ||
3526 | if (rval != QLA_SUCCESS) { | |
7c3df132 | 3527 | ql_dbg(ql_dbg_mbx, vha, 0x10b1, "Failed=%x.\n", rval); |
6e98016c | 3528 | } else { |
5f28d2d7 SK |
3529 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b2, |
3530 | "Done %s.\n", __func__); | |
6e98016c GM |
3531 | if (port_speed) |
3532 | *port_speed = mcp->mb[3]; | |
3533 | } | |
3534 | ||
3535 | return rval; | |
3536 | } | |
3537 | ||
d8b45213 | 3538 | int |
7b867cf7 | 3539 | qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id, |
d8b45213 AV |
3540 | uint16_t port_speed, uint16_t *mb) |
3541 | { | |
3542 | int rval; | |
3543 | mbx_cmd_t mc; | |
3544 | mbx_cmd_t *mcp = &mc; | |
3545 | ||
5f28d2d7 SK |
3546 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b3, |
3547 | "Entered %s.\n", __func__); | |
7c3df132 | 3548 | |
7b867cf7 | 3549 | if (!IS_IIDMA_CAPABLE(vha->hw)) |
d8b45213 AV |
3550 | return QLA_FUNCTION_FAILED; |
3551 | ||
d8b45213 AV |
3552 | mcp->mb[0] = MBC_PORT_PARAMS; |
3553 | mcp->mb[1] = loop_id; | |
3554 | mcp->mb[2] = BIT_0; | |
6246b8a1 | 3555 | if (IS_CNA_CAPABLE(vha->hw)) |
1bb39548 HZ |
3556 | mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0); |
3557 | else | |
3558 | mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0); | |
3559 | mcp->mb[9] = vha->vp_idx; | |
3560 | mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0; | |
3561 | mcp->in_mb = MBX_3|MBX_1|MBX_0; | |
b93480e3 | 3562 | mcp->tov = MBX_TOV_SECONDS; |
d8b45213 | 3563 | mcp->flags = 0; |
7b867cf7 | 3564 | rval = qla2x00_mailbox_command(vha, mcp); |
d8b45213 AV |
3565 | |
3566 | /* Return mailbox statuses. */ | |
3567 | if (mb != NULL) { | |
3568 | mb[0] = mcp->mb[0]; | |
3569 | mb[1] = mcp->mb[1]; | |
3570 | mb[3] = mcp->mb[3]; | |
d8b45213 AV |
3571 | } |
3572 | ||
3573 | if (rval != QLA_SUCCESS) { | |
5f28d2d7 SK |
3574 | ql_dbg(ql_dbg_mbx, vha, 0x10b4, |
3575 | "Failed=%x.\n", rval); | |
d8b45213 | 3576 | } else { |
5f28d2d7 SK |
3577 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b5, |
3578 | "Done %s.\n", __func__); | |
d8b45213 AV |
3579 | } |
3580 | ||
3581 | return rval; | |
3582 | } | |
2c3dfe3f | 3583 | |
2c3dfe3f | 3584 | void |
7b867cf7 | 3585 | qla24xx_report_id_acquisition(scsi_qla_host_t *vha, |
2c3dfe3f SJ |
3586 | struct vp_rpt_id_entry_24xx *rptid_entry) |
3587 | { | |
3588 | uint8_t vp_idx; | |
c6852c4c | 3589 | uint16_t stat = le16_to_cpu(rptid_entry->vp_idx); |
7b867cf7 AC |
3590 | struct qla_hw_data *ha = vha->hw; |
3591 | scsi_qla_host_t *vp; | |
feafb7b1 | 3592 | unsigned long flags; |
4ac8d4ca | 3593 | int found; |
2c3dfe3f | 3594 | |
5f28d2d7 SK |
3595 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b6, |
3596 | "Entered %s.\n", __func__); | |
7c3df132 | 3597 | |
2c3dfe3f SJ |
3598 | if (rptid_entry->entry_status != 0) |
3599 | return; | |
2c3dfe3f SJ |
3600 | |
3601 | if (rptid_entry->format == 0) { | |
5f28d2d7 | 3602 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b7, |
7c3df132 SK |
3603 | "Format 0 : Number of VPs setup %d, number of " |
3604 | "VPs acquired %d.\n", | |
3605 | MSB(le16_to_cpu(rptid_entry->vp_count)), | |
3606 | LSB(le16_to_cpu(rptid_entry->vp_count))); | |
5f28d2d7 | 3607 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b8, |
7c3df132 SK |
3608 | "Primary port id %02x%02x%02x.\n", |
3609 | rptid_entry->port_id[2], rptid_entry->port_id[1], | |
3610 | rptid_entry->port_id[0]); | |
2c3dfe3f | 3611 | } else if (rptid_entry->format == 1) { |
c6852c4c | 3612 | vp_idx = LSB(stat); |
5f28d2d7 | 3613 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b9, |
7c3df132 SK |
3614 | "Format 1: VP[%d] enabled - status %d - with " |
3615 | "port id %02x%02x%02x.\n", vp_idx, MSB(stat), | |
2c3dfe3f | 3616 | rptid_entry->port_id[2], rptid_entry->port_id[1], |
7c3df132 | 3617 | rptid_entry->port_id[0]); |
531a82d1 | 3618 | |
7c9c4766 JC |
3619 | /* FA-WWN is only for physical port */ |
3620 | if (!vp_idx) { | |
3621 | void *wwpn = ha->init_cb->port_name; | |
3622 | ||
3623 | if (!MSB(stat)) { | |
3624 | if (rptid_entry->vp_idx_map[1] & BIT_6) | |
3625 | wwpn = rptid_entry->reserved_4 + 8; | |
3626 | } | |
3627 | memcpy(vha->port_name, wwpn, WWN_SIZE); | |
3628 | fc_host_port_name(vha->host) = | |
3629 | wwn_to_u64(vha->port_name); | |
3630 | ql_dbg(ql_dbg_mbx, vha, 0x1018, | |
3631 | "FA-WWN portname %016llx (%x)\n", | |
3632 | fc_host_port_name(vha->host), MSB(stat)); | |
3633 | } | |
3634 | ||
531a82d1 | 3635 | vp = vha; |
7c9c4766 | 3636 | if (vp_idx == 0) |
531a82d1 | 3637 | goto reg_needed; |
2c3dfe3f | 3638 | |
681e014b | 3639 | if (MSB(stat) != 0 && MSB(stat) != 2) { |
7c3df132 SK |
3640 | ql_dbg(ql_dbg_mbx, vha, 0x10ba, |
3641 | "Could not acquire ID for VP[%d].\n", vp_idx); | |
2c3dfe3f | 3642 | return; |
81eb9b49 | 3643 | } |
2c3dfe3f | 3644 | |
4ac8d4ca | 3645 | found = 0; |
feafb7b1 | 3646 | spin_lock_irqsave(&ha->vport_slock, flags); |
4ac8d4ca AV |
3647 | list_for_each_entry(vp, &ha->vp_list, list) { |
3648 | if (vp_idx == vp->vp_idx) { | |
3649 | found = 1; | |
2c3dfe3f | 3650 | break; |
4ac8d4ca AV |
3651 | } |
3652 | } | |
feafb7b1 AE |
3653 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
3654 | ||
4ac8d4ca | 3655 | if (!found) |
2c3dfe3f SJ |
3656 | return; |
3657 | ||
7b867cf7 AC |
3658 | vp->d_id.b.domain = rptid_entry->port_id[2]; |
3659 | vp->d_id.b.area = rptid_entry->port_id[1]; | |
3660 | vp->d_id.b.al_pa = rptid_entry->port_id[0]; | |
2c3dfe3f SJ |
3661 | |
3662 | /* | |
3663 | * Cannot configure here as we are still sitting on the | |
3664 | * response queue. Handle it in dpc context. | |
3665 | */ | |
7b867cf7 | 3666 | set_bit(VP_IDX_ACQUIRED, &vp->vp_flags); |
2c3dfe3f | 3667 | |
531a82d1 AV |
3668 | reg_needed: |
3669 | set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags); | |
3670 | set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags); | |
3671 | set_bit(VP_DPC_NEEDED, &vha->dpc_flags); | |
7b867cf7 | 3672 | qla2xxx_wake_dpc(vha); |
2c3dfe3f SJ |
3673 | } |
3674 | } | |
3675 | ||
3676 | /* | |
3677 | * qla24xx_modify_vp_config | |
3678 | * Change VP configuration for vha | |
3679 | * | |
3680 | * Input: | |
3681 | * vha = adapter block pointer. | |
3682 | * | |
3683 | * Returns: | |
3684 | * qla2xxx local function return status code. | |
3685 | * | |
3686 | * Context: | |
3687 | * Kernel context. | |
3688 | */ | |
3689 | int | |
3690 | qla24xx_modify_vp_config(scsi_qla_host_t *vha) | |
3691 | { | |
3692 | int rval; | |
3693 | struct vp_config_entry_24xx *vpmod; | |
3694 | dma_addr_t vpmod_dma; | |
7b867cf7 AC |
3695 | struct qla_hw_data *ha = vha->hw; |
3696 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
2c3dfe3f SJ |
3697 | |
3698 | /* This can be called by the parent */ | |
2c3dfe3f | 3699 | |
5f28d2d7 SK |
3700 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10bb, |
3701 | "Entered %s.\n", __func__); | |
7c3df132 | 3702 | |
7b867cf7 | 3703 | vpmod = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma); |
2c3dfe3f | 3704 | if (!vpmod) { |
7c3df132 SK |
3705 | ql_log(ql_log_warn, vha, 0x10bc, |
3706 | "Failed to allocate modify VP IOCB.\n"); | |
2c3dfe3f SJ |
3707 | return QLA_MEMORY_ALLOC_FAILED; |
3708 | } | |
3709 | ||
3710 | memset(vpmod, 0, sizeof(struct vp_config_entry_24xx)); | |
3711 | vpmod->entry_type = VP_CONFIG_IOCB_TYPE; | |
3712 | vpmod->entry_count = 1; | |
3713 | vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS; | |
3714 | vpmod->vp_count = 1; | |
3715 | vpmod->vp_index1 = vha->vp_idx; | |
3716 | vpmod->options_idx1 = BIT_3|BIT_4|BIT_5; | |
2d70c103 NB |
3717 | |
3718 | qlt_modify_vp_config(vha, vpmod); | |
3719 | ||
2c3dfe3f SJ |
3720 | memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE); |
3721 | memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE); | |
3722 | vpmod->entry_count = 1; | |
3723 | ||
7b867cf7 | 3724 | rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0); |
2c3dfe3f | 3725 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
3726 | ql_dbg(ql_dbg_mbx, vha, 0x10bd, |
3727 | "Failed to issue VP config IOCB (%x).\n", rval); | |
2c3dfe3f | 3728 | } else if (vpmod->comp_status != 0) { |
7c3df132 SK |
3729 | ql_dbg(ql_dbg_mbx, vha, 0x10be, |
3730 | "Failed to complete IOCB -- error status (%x).\n", | |
3731 | vpmod->comp_status); | |
2c3dfe3f | 3732 | rval = QLA_FUNCTION_FAILED; |
ad950360 | 3733 | } else if (vpmod->comp_status != cpu_to_le16(CS_COMPLETE)) { |
7c3df132 SK |
3734 | ql_dbg(ql_dbg_mbx, vha, 0x10bf, |
3735 | "Failed to complete IOCB -- completion status (%x).\n", | |
3736 | le16_to_cpu(vpmod->comp_status)); | |
2c3dfe3f SJ |
3737 | rval = QLA_FUNCTION_FAILED; |
3738 | } else { | |
3739 | /* EMPTY */ | |
5f28d2d7 SK |
3740 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c0, |
3741 | "Done %s.\n", __func__); | |
2c3dfe3f SJ |
3742 | fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING); |
3743 | } | |
7b867cf7 | 3744 | dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma); |
2c3dfe3f SJ |
3745 | |
3746 | return rval; | |
3747 | } | |
3748 | ||
3749 | /* | |
3750 | * qla24xx_control_vp | |
3751 | * Enable a virtual port for given host | |
3752 | * | |
3753 | * Input: | |
3754 | * ha = adapter block pointer. | |
3755 | * vhba = virtual adapter (unused) | |
3756 | * index = index number for enabled VP | |
3757 | * | |
3758 | * Returns: | |
3759 | * qla2xxx local function return status code. | |
3760 | * | |
3761 | * Context: | |
3762 | * Kernel context. | |
3763 | */ | |
3764 | int | |
3765 | qla24xx_control_vp(scsi_qla_host_t *vha, int cmd) | |
3766 | { | |
3767 | int rval; | |
3768 | int map, pos; | |
3769 | struct vp_ctrl_entry_24xx *vce; | |
3770 | dma_addr_t vce_dma; | |
7b867cf7 | 3771 | struct qla_hw_data *ha = vha->hw; |
2c3dfe3f | 3772 | int vp_index = vha->vp_idx; |
7b867cf7 | 3773 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); |
2c3dfe3f | 3774 | |
5f28d2d7 | 3775 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c1, |
7c3df132 | 3776 | "Entered %s enabling index %d.\n", __func__, vp_index); |
2c3dfe3f | 3777 | |
eb66dc60 | 3778 | if (vp_index == 0 || vp_index >= ha->max_npiv_vports) |
2c3dfe3f SJ |
3779 | return QLA_PARAMETER_ERROR; |
3780 | ||
3781 | vce = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vce_dma); | |
3782 | if (!vce) { | |
7c3df132 SK |
3783 | ql_log(ql_log_warn, vha, 0x10c2, |
3784 | "Failed to allocate VP control IOCB.\n"); | |
2c3dfe3f SJ |
3785 | return QLA_MEMORY_ALLOC_FAILED; |
3786 | } | |
3787 | memset(vce, 0, sizeof(struct vp_ctrl_entry_24xx)); | |
3788 | ||
3789 | vce->entry_type = VP_CTRL_IOCB_TYPE; | |
3790 | vce->entry_count = 1; | |
3791 | vce->command = cpu_to_le16(cmd); | |
ad950360 | 3792 | vce->vp_count = cpu_to_le16(1); |
2c3dfe3f SJ |
3793 | |
3794 | /* index map in firmware starts with 1; decrement index | |
3795 | * this is ok as we never use index 0 | |
3796 | */ | |
3797 | map = (vp_index - 1) / 8; | |
3798 | pos = (vp_index - 1) & 7; | |
6c2f527c | 3799 | mutex_lock(&ha->vport_lock); |
2c3dfe3f | 3800 | vce->vp_idx_map[map] |= 1 << pos; |
6c2f527c | 3801 | mutex_unlock(&ha->vport_lock); |
2c3dfe3f | 3802 | |
7b867cf7 | 3803 | rval = qla2x00_issue_iocb(base_vha, vce, vce_dma, 0); |
2c3dfe3f | 3804 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
3805 | ql_dbg(ql_dbg_mbx, vha, 0x10c3, |
3806 | "Failed to issue VP control IOCB (%x).\n", rval); | |
2c3dfe3f | 3807 | } else if (vce->entry_status != 0) { |
7c3df132 SK |
3808 | ql_dbg(ql_dbg_mbx, vha, 0x10c4, |
3809 | "Failed to complete IOCB -- error status (%x).\n", | |
2c3dfe3f SJ |
3810 | vce->entry_status); |
3811 | rval = QLA_FUNCTION_FAILED; | |
ad950360 | 3812 | } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) { |
7c3df132 SK |
3813 | ql_dbg(ql_dbg_mbx, vha, 0x10c5, |
3814 | "Failed to complet IOCB -- completion status (%x).\n", | |
2c3dfe3f SJ |
3815 | le16_to_cpu(vce->comp_status)); |
3816 | rval = QLA_FUNCTION_FAILED; | |
3817 | } else { | |
5f28d2d7 SK |
3818 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c6, |
3819 | "Done %s.\n", __func__); | |
2c3dfe3f SJ |
3820 | } |
3821 | ||
3822 | dma_pool_free(ha->s_dma_pool, vce, vce_dma); | |
3823 | ||
3824 | return rval; | |
3825 | } | |
3826 | ||
3827 | /* | |
3828 | * qla2x00_send_change_request | |
3829 | * Receive or disable RSCN request from fabric controller | |
3830 | * | |
3831 | * Input: | |
3832 | * ha = adapter block pointer | |
3833 | * format = registration format: | |
3834 | * 0 - Reserved | |
3835 | * 1 - Fabric detected registration | |
3836 | * 2 - N_port detected registration | |
3837 | * 3 - Full registration | |
3838 | * FF - clear registration | |
3839 | * vp_idx = Virtual port index | |
3840 | * | |
3841 | * Returns: | |
3842 | * qla2x00 local function return status code. | |
3843 | * | |
3844 | * Context: | |
3845 | * Kernel Context | |
3846 | */ | |
3847 | ||
3848 | int | |
7b867cf7 | 3849 | qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format, |
2c3dfe3f SJ |
3850 | uint16_t vp_idx) |
3851 | { | |
3852 | int rval; | |
3853 | mbx_cmd_t mc; | |
3854 | mbx_cmd_t *mcp = &mc; | |
3855 | ||
5f28d2d7 SK |
3856 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c7, |
3857 | "Entered %s.\n", __func__); | |
7c3df132 | 3858 | |
2c3dfe3f SJ |
3859 | mcp->mb[0] = MBC_SEND_CHANGE_REQUEST; |
3860 | mcp->mb[1] = format; | |
3861 | mcp->mb[9] = vp_idx; | |
3862 | mcp->out_mb = MBX_9|MBX_1|MBX_0; | |
3863 | mcp->in_mb = MBX_0|MBX_1; | |
3864 | mcp->tov = MBX_TOV_SECONDS; | |
3865 | mcp->flags = 0; | |
7b867cf7 | 3866 | rval = qla2x00_mailbox_command(vha, mcp); |
2c3dfe3f SJ |
3867 | |
3868 | if (rval == QLA_SUCCESS) { | |
3869 | if (mcp->mb[0] != MBS_COMMAND_COMPLETE) { | |
3870 | rval = BIT_1; | |
3871 | } | |
3872 | } else | |
3873 | rval = BIT_1; | |
3874 | ||
3875 | return rval; | |
3876 | } | |
338c9161 AV |
3877 | |
3878 | int | |
7b867cf7 | 3879 | qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr, |
338c9161 AV |
3880 | uint32_t size) |
3881 | { | |
3882 | int rval; | |
3883 | mbx_cmd_t mc; | |
3884 | mbx_cmd_t *mcp = &mc; | |
3885 | ||
5f28d2d7 SK |
3886 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1009, |
3887 | "Entered %s.\n", __func__); | |
338c9161 | 3888 | |
7b867cf7 | 3889 | if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) { |
338c9161 AV |
3890 | mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED; |
3891 | mcp->mb[8] = MSW(addr); | |
3892 | mcp->out_mb = MBX_8|MBX_0; | |
3893 | } else { | |
3894 | mcp->mb[0] = MBC_DUMP_RISC_RAM; | |
3895 | mcp->out_mb = MBX_0; | |
3896 | } | |
3897 | mcp->mb[1] = LSW(addr); | |
3898 | mcp->mb[2] = MSW(req_dma); | |
3899 | mcp->mb[3] = LSW(req_dma); | |
3900 | mcp->mb[6] = MSW(MSD(req_dma)); | |
3901 | mcp->mb[7] = LSW(MSD(req_dma)); | |
3902 | mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1; | |
7b867cf7 | 3903 | if (IS_FWI2_CAPABLE(vha->hw)) { |
338c9161 AV |
3904 | mcp->mb[4] = MSW(size); |
3905 | mcp->mb[5] = LSW(size); | |
3906 | mcp->out_mb |= MBX_5|MBX_4; | |
3907 | } else { | |
3908 | mcp->mb[4] = LSW(size); | |
3909 | mcp->out_mb |= MBX_4; | |
3910 | } | |
3911 | ||
3912 | mcp->in_mb = MBX_0; | |
b93480e3 | 3913 | mcp->tov = MBX_TOV_SECONDS; |
338c9161 | 3914 | mcp->flags = 0; |
7b867cf7 | 3915 | rval = qla2x00_mailbox_command(vha, mcp); |
338c9161 AV |
3916 | |
3917 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
3918 | ql_dbg(ql_dbg_mbx, vha, 0x1008, |
3919 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
338c9161 | 3920 | } else { |
5f28d2d7 SK |
3921 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1007, |
3922 | "Done %s.\n", __func__); | |
338c9161 AV |
3923 | } |
3924 | ||
3925 | return rval; | |
3926 | } | |
4d4df193 HK |
3927 | /* 84XX Support **************************************************************/ |
3928 | ||
3929 | struct cs84xx_mgmt_cmd { | |
3930 | union { | |
3931 | struct verify_chip_entry_84xx req; | |
3932 | struct verify_chip_rsp_84xx rsp; | |
3933 | } p; | |
3934 | }; | |
3935 | ||
3936 | int | |
7b867cf7 | 3937 | qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status) |
4d4df193 HK |
3938 | { |
3939 | int rval, retry; | |
3940 | struct cs84xx_mgmt_cmd *mn; | |
3941 | dma_addr_t mn_dma; | |
3942 | uint16_t options; | |
3943 | unsigned long flags; | |
7b867cf7 | 3944 | struct qla_hw_data *ha = vha->hw; |
4d4df193 | 3945 | |
5f28d2d7 SK |
3946 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c8, |
3947 | "Entered %s.\n", __func__); | |
4d4df193 HK |
3948 | |
3949 | mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma); | |
3950 | if (mn == NULL) { | |
4d4df193 HK |
3951 | return QLA_MEMORY_ALLOC_FAILED; |
3952 | } | |
3953 | ||
3954 | /* Force Update? */ | |
3955 | options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0; | |
3956 | /* Diagnostic firmware? */ | |
3957 | /* options |= MENLO_DIAG_FW; */ | |
3958 | /* We update the firmware with only one data sequence. */ | |
3959 | options |= VCO_END_OF_DATA; | |
3960 | ||
4d4df193 | 3961 | do { |
c1ec1f1b | 3962 | retry = 0; |
4d4df193 HK |
3963 | memset(mn, 0, sizeof(*mn)); |
3964 | mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE; | |
3965 | mn->p.req.entry_count = 1; | |
3966 | mn->p.req.options = cpu_to_le16(options); | |
3967 | ||
7c3df132 SK |
3968 | ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111c, |
3969 | "Dump of Verify Request.\n"); | |
3970 | ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111e, | |
3971 | (uint8_t *)mn, sizeof(*mn)); | |
4d4df193 | 3972 | |
7b867cf7 | 3973 | rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120); |
4d4df193 | 3974 | if (rval != QLA_SUCCESS) { |
7c3df132 SK |
3975 | ql_dbg(ql_dbg_mbx, vha, 0x10cb, |
3976 | "Failed to issue verify IOCB (%x).\n", rval); | |
4d4df193 HK |
3977 | goto verify_done; |
3978 | } | |
3979 | ||
7c3df132 SK |
3980 | ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1110, |
3981 | "Dump of Verify Response.\n"); | |
3982 | ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1118, | |
3983 | (uint8_t *)mn, sizeof(*mn)); | |
4d4df193 HK |
3984 | |
3985 | status[0] = le16_to_cpu(mn->p.rsp.comp_status); | |
3986 | status[1] = status[0] == CS_VCS_CHIP_FAILURE ? | |
3987 | le16_to_cpu(mn->p.rsp.failure_code) : 0; | |
5f28d2d7 | 3988 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ce, |
7c3df132 | 3989 | "cs=%x fc=%x.\n", status[0], status[1]); |
4d4df193 HK |
3990 | |
3991 | if (status[0] != CS_COMPLETE) { | |
3992 | rval = QLA_FUNCTION_FAILED; | |
3993 | if (!(options & VCO_DONT_UPDATE_FW)) { | |
7c3df132 SK |
3994 | ql_dbg(ql_dbg_mbx, vha, 0x10cf, |
3995 | "Firmware update failed. Retrying " | |
3996 | "without update firmware.\n"); | |
4d4df193 HK |
3997 | options |= VCO_DONT_UPDATE_FW; |
3998 | options &= ~VCO_FORCE_UPDATE; | |
3999 | retry = 1; | |
4000 | } | |
4001 | } else { | |
5f28d2d7 | 4002 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d0, |
7c3df132 SK |
4003 | "Firmware updated to %x.\n", |
4004 | le32_to_cpu(mn->p.rsp.fw_ver)); | |
4d4df193 HK |
4005 | |
4006 | /* NOTE: we only update OP firmware. */ | |
4007 | spin_lock_irqsave(&ha->cs84xx->access_lock, flags); | |
4008 | ha->cs84xx->op_fw_version = | |
4009 | le32_to_cpu(mn->p.rsp.fw_ver); | |
4010 | spin_unlock_irqrestore(&ha->cs84xx->access_lock, | |
4011 | flags); | |
4012 | } | |
4013 | } while (retry); | |
4014 | ||
4015 | verify_done: | |
4016 | dma_pool_free(ha->s_dma_pool, mn, mn_dma); | |
4017 | ||
4018 | if (rval != QLA_SUCCESS) { | |
5f28d2d7 SK |
4019 | ql_dbg(ql_dbg_mbx, vha, 0x10d1, |
4020 | "Failed=%x.\n", rval); | |
4d4df193 | 4021 | } else { |
5f28d2d7 SK |
4022 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d2, |
4023 | "Done %s.\n", __func__); | |
4d4df193 HK |
4024 | } |
4025 | ||
4026 | return rval; | |
4027 | } | |
73208dfd AC |
4028 | |
4029 | int | |
618a7523 | 4030 | qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req) |
73208dfd AC |
4031 | { |
4032 | int rval; | |
4033 | unsigned long flags; | |
4034 | mbx_cmd_t mc; | |
4035 | mbx_cmd_t *mcp = &mc; | |
73208dfd AC |
4036 | struct qla_hw_data *ha = vha->hw; |
4037 | ||
5f28d2d7 SK |
4038 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d3, |
4039 | "Entered %s.\n", __func__); | |
7c3df132 | 4040 | |
7c6300e3 JC |
4041 | if (IS_SHADOW_REG_CAPABLE(ha)) |
4042 | req->options |= BIT_13; | |
4043 | ||
73208dfd | 4044 | mcp->mb[0] = MBC_INITIALIZE_MULTIQ; |
618a7523 | 4045 | mcp->mb[1] = req->options; |
73208dfd AC |
4046 | mcp->mb[2] = MSW(LSD(req->dma)); |
4047 | mcp->mb[3] = LSW(LSD(req->dma)); | |
4048 | mcp->mb[6] = MSW(MSD(req->dma)); | |
4049 | mcp->mb[7] = LSW(MSD(req->dma)); | |
4050 | mcp->mb[5] = req->length; | |
4051 | if (req->rsp) | |
4052 | mcp->mb[10] = req->rsp->id; | |
4053 | mcp->mb[12] = req->qos; | |
4054 | mcp->mb[11] = req->vp_idx; | |
4055 | mcp->mb[13] = req->rid; | |
f73cb695 | 4056 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) |
6246b8a1 | 4057 | mcp->mb[15] = 0; |
73208dfd | 4058 | |
73208dfd AC |
4059 | mcp->mb[4] = req->id; |
4060 | /* que in ptr index */ | |
4061 | mcp->mb[8] = 0; | |
4062 | /* que out ptr index */ | |
7c6300e3 | 4063 | mcp->mb[9] = *req->out_ptr = 0; |
73208dfd AC |
4064 | mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7| |
4065 | MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
4066 | mcp->in_mb = MBX_0; | |
4067 | mcp->flags = MBX_DMA_OUT; | |
6246b8a1 GM |
4068 | mcp->tov = MBX_TOV_SECONDS * 2; |
4069 | ||
f73cb695 | 4070 | if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) |
6246b8a1 | 4071 | mcp->in_mb |= MBX_1; |
ba4828b7 | 4072 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { |
6246b8a1 GM |
4073 | mcp->out_mb |= MBX_15; |
4074 | /* debug q create issue in SR-IOV */ | |
4075 | mcp->in_mb |= MBX_9 | MBX_8 | MBX_7; | |
4076 | } | |
73208dfd AC |
4077 | |
4078 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
618a7523 | 4079 | if (!(req->options & BIT_0)) { |
da9b1d5c | 4080 | WRT_REG_DWORD(req->req_q_in, 0); |
29db41c3 | 4081 | if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) |
da9b1d5c | 4082 | WRT_REG_DWORD(req->req_q_out, 0); |
73208dfd AC |
4083 | } |
4084 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
4085 | ||
17d98630 | 4086 | rval = qla2x00_mailbox_command(vha, mcp); |
7c3df132 SK |
4087 | if (rval != QLA_SUCCESS) { |
4088 | ql_dbg(ql_dbg_mbx, vha, 0x10d4, | |
4089 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
4090 | } else { | |
5f28d2d7 SK |
4091 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d5, |
4092 | "Done %s.\n", __func__); | |
7c3df132 SK |
4093 | } |
4094 | ||
73208dfd AC |
4095 | return rval; |
4096 | } | |
4097 | ||
4098 | int | |
618a7523 | 4099 | qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp) |
73208dfd AC |
4100 | { |
4101 | int rval; | |
4102 | unsigned long flags; | |
4103 | mbx_cmd_t mc; | |
4104 | mbx_cmd_t *mcp = &mc; | |
73208dfd AC |
4105 | struct qla_hw_data *ha = vha->hw; |
4106 | ||
5f28d2d7 SK |
4107 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d6, |
4108 | "Entered %s.\n", __func__); | |
7c3df132 | 4109 | |
7c6300e3 JC |
4110 | if (IS_SHADOW_REG_CAPABLE(ha)) |
4111 | rsp->options |= BIT_13; | |
4112 | ||
73208dfd | 4113 | mcp->mb[0] = MBC_INITIALIZE_MULTIQ; |
618a7523 | 4114 | mcp->mb[1] = rsp->options; |
73208dfd AC |
4115 | mcp->mb[2] = MSW(LSD(rsp->dma)); |
4116 | mcp->mb[3] = LSW(LSD(rsp->dma)); | |
4117 | mcp->mb[6] = MSW(MSD(rsp->dma)); | |
4118 | mcp->mb[7] = LSW(MSD(rsp->dma)); | |
4119 | mcp->mb[5] = rsp->length; | |
444786d7 | 4120 | mcp->mb[14] = rsp->msix->entry; |
73208dfd | 4121 | mcp->mb[13] = rsp->rid; |
f73cb695 | 4122 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) |
6246b8a1 | 4123 | mcp->mb[15] = 0; |
73208dfd | 4124 | |
73208dfd AC |
4125 | mcp->mb[4] = rsp->id; |
4126 | /* que in ptr index */ | |
7c6300e3 | 4127 | mcp->mb[8] = *rsp->in_ptr = 0; |
73208dfd AC |
4128 | /* que out ptr index */ |
4129 | mcp->mb[9] = 0; | |
2afa19a9 | 4130 | mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7 |
73208dfd AC |
4131 | |MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; |
4132 | mcp->in_mb = MBX_0; | |
4133 | mcp->flags = MBX_DMA_OUT; | |
6246b8a1 GM |
4134 | mcp->tov = MBX_TOV_SECONDS * 2; |
4135 | ||
4136 | if (IS_QLA81XX(ha)) { | |
4137 | mcp->out_mb |= MBX_12|MBX_11|MBX_10; | |
4138 | mcp->in_mb |= MBX_1; | |
f73cb695 | 4139 | } else if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { |
6246b8a1 GM |
4140 | mcp->out_mb |= MBX_15|MBX_12|MBX_11|MBX_10; |
4141 | mcp->in_mb |= MBX_1; | |
4142 | /* debug q create issue in SR-IOV */ | |
4143 | mcp->in_mb |= MBX_9 | MBX_8 | MBX_7; | |
4144 | } | |
73208dfd AC |
4145 | |
4146 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
618a7523 | 4147 | if (!(rsp->options & BIT_0)) { |
da9b1d5c | 4148 | WRT_REG_DWORD(rsp->rsp_q_out, 0); |
b20f02e1 | 4149 | if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) |
da9b1d5c | 4150 | WRT_REG_DWORD(rsp->rsp_q_in, 0); |
73208dfd AC |
4151 | } |
4152 | ||
4153 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
4154 | ||
17d98630 | 4155 | rval = qla2x00_mailbox_command(vha, mcp); |
7c3df132 SK |
4156 | if (rval != QLA_SUCCESS) { |
4157 | ql_dbg(ql_dbg_mbx, vha, 0x10d7, | |
4158 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
4159 | } else { | |
5f28d2d7 SK |
4160 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d8, |
4161 | "Done %s.\n", __func__); | |
7c3df132 SK |
4162 | } |
4163 | ||
73208dfd AC |
4164 | return rval; |
4165 | } | |
4166 | ||
8a659571 AV |
4167 | int |
4168 | qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb) | |
4169 | { | |
4170 | int rval; | |
4171 | mbx_cmd_t mc; | |
4172 | mbx_cmd_t *mcp = &mc; | |
4173 | ||
5f28d2d7 SK |
4174 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d9, |
4175 | "Entered %s.\n", __func__); | |
8a659571 AV |
4176 | |
4177 | mcp->mb[0] = MBC_IDC_ACK; | |
4178 | memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t)); | |
4179 | mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
4180 | mcp->in_mb = MBX_0; | |
4181 | mcp->tov = MBX_TOV_SECONDS; | |
4182 | mcp->flags = 0; | |
4183 | rval = qla2x00_mailbox_command(vha, mcp); | |
4184 | ||
4185 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4186 | ql_dbg(ql_dbg_mbx, vha, 0x10da, |
4187 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
8a659571 | 4188 | } else { |
5f28d2d7 SK |
4189 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10db, |
4190 | "Done %s.\n", __func__); | |
8a659571 AV |
4191 | } |
4192 | ||
4193 | return rval; | |
4194 | } | |
1d2874de JC |
4195 | |
4196 | int | |
4197 | qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size) | |
4198 | { | |
4199 | int rval; | |
4200 | mbx_cmd_t mc; | |
4201 | mbx_cmd_t *mcp = &mc; | |
4202 | ||
5f28d2d7 SK |
4203 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10dc, |
4204 | "Entered %s.\n", __func__); | |
7c3df132 | 4205 | |
f73cb695 CD |
4206 | if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) && |
4207 | !IS_QLA27XX(vha->hw)) | |
1d2874de JC |
4208 | return QLA_FUNCTION_FAILED; |
4209 | ||
1d2874de JC |
4210 | mcp->mb[0] = MBC_FLASH_ACCESS_CTRL; |
4211 | mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE; | |
4212 | mcp->out_mb = MBX_1|MBX_0; | |
4213 | mcp->in_mb = MBX_1|MBX_0; | |
4214 | mcp->tov = MBX_TOV_SECONDS; | |
4215 | mcp->flags = 0; | |
4216 | rval = qla2x00_mailbox_command(vha, mcp); | |
4217 | ||
4218 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4219 | ql_dbg(ql_dbg_mbx, vha, 0x10dd, |
4220 | "Failed=%x mb[0]=%x mb[1]=%x.\n", | |
4221 | rval, mcp->mb[0], mcp->mb[1]); | |
1d2874de | 4222 | } else { |
5f28d2d7 SK |
4223 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10de, |
4224 | "Done %s.\n", __func__); | |
1d2874de JC |
4225 | *sector_size = mcp->mb[1]; |
4226 | } | |
4227 | ||
4228 | return rval; | |
4229 | } | |
4230 | ||
4231 | int | |
4232 | qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable) | |
4233 | { | |
4234 | int rval; | |
4235 | mbx_cmd_t mc; | |
4236 | mbx_cmd_t *mcp = &mc; | |
4237 | ||
f73cb695 CD |
4238 | if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) && |
4239 | !IS_QLA27XX(vha->hw)) | |
1d2874de JC |
4240 | return QLA_FUNCTION_FAILED; |
4241 | ||
5f28d2d7 SK |
4242 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10df, |
4243 | "Entered %s.\n", __func__); | |
1d2874de JC |
4244 | |
4245 | mcp->mb[0] = MBC_FLASH_ACCESS_CTRL; | |
4246 | mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE : | |
4247 | FAC_OPT_CMD_WRITE_PROTECT; | |
4248 | mcp->out_mb = MBX_1|MBX_0; | |
4249 | mcp->in_mb = MBX_1|MBX_0; | |
4250 | mcp->tov = MBX_TOV_SECONDS; | |
4251 | mcp->flags = 0; | |
4252 | rval = qla2x00_mailbox_command(vha, mcp); | |
4253 | ||
4254 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4255 | ql_dbg(ql_dbg_mbx, vha, 0x10e0, |
4256 | "Failed=%x mb[0]=%x mb[1]=%x.\n", | |
4257 | rval, mcp->mb[0], mcp->mb[1]); | |
1d2874de | 4258 | } else { |
5f28d2d7 SK |
4259 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e1, |
4260 | "Done %s.\n", __func__); | |
1d2874de JC |
4261 | } |
4262 | ||
4263 | return rval; | |
4264 | } | |
4265 | ||
4266 | int | |
4267 | qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish) | |
4268 | { | |
4269 | int rval; | |
4270 | mbx_cmd_t mc; | |
4271 | mbx_cmd_t *mcp = &mc; | |
4272 | ||
f73cb695 CD |
4273 | if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) && |
4274 | !IS_QLA27XX(vha->hw)) | |
1d2874de JC |
4275 | return QLA_FUNCTION_FAILED; |
4276 | ||
5f28d2d7 SK |
4277 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2, |
4278 | "Entered %s.\n", __func__); | |
1d2874de JC |
4279 | |
4280 | mcp->mb[0] = MBC_FLASH_ACCESS_CTRL; | |
4281 | mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR; | |
4282 | mcp->mb[2] = LSW(start); | |
4283 | mcp->mb[3] = MSW(start); | |
4284 | mcp->mb[4] = LSW(finish); | |
4285 | mcp->mb[5] = MSW(finish); | |
4286 | mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
4287 | mcp->in_mb = MBX_2|MBX_1|MBX_0; | |
4288 | mcp->tov = MBX_TOV_SECONDS; | |
4289 | mcp->flags = 0; | |
4290 | rval = qla2x00_mailbox_command(vha, mcp); | |
4291 | ||
4292 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4293 | ql_dbg(ql_dbg_mbx, vha, 0x10e3, |
4294 | "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n", | |
4295 | rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]); | |
1d2874de | 4296 | } else { |
5f28d2d7 SK |
4297 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4, |
4298 | "Done %s.\n", __func__); | |
1d2874de JC |
4299 | } |
4300 | ||
4301 | return rval; | |
4302 | } | |
6e181be5 LC |
4303 | |
4304 | int | |
4305 | qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha) | |
4306 | { | |
4307 | int rval = 0; | |
4308 | mbx_cmd_t mc; | |
4309 | mbx_cmd_t *mcp = &mc; | |
4310 | ||
5f28d2d7 SK |
4311 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e5, |
4312 | "Entered %s.\n", __func__); | |
6e181be5 LC |
4313 | |
4314 | mcp->mb[0] = MBC_RESTART_MPI_FW; | |
4315 | mcp->out_mb = MBX_0; | |
4316 | mcp->in_mb = MBX_0|MBX_1; | |
4317 | mcp->tov = MBX_TOV_SECONDS; | |
4318 | mcp->flags = 0; | |
4319 | rval = qla2x00_mailbox_command(vha, mcp); | |
4320 | ||
4321 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4322 | ql_dbg(ql_dbg_mbx, vha, 0x10e6, |
4323 | "Failed=%x mb[0]=%x mb[1]=%x.\n", | |
4324 | rval, mcp->mb[0], mcp->mb[1]); | |
6e181be5 | 4325 | } else { |
5f28d2d7 SK |
4326 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e7, |
4327 | "Done %s.\n", __func__); | |
6e181be5 LC |
4328 | } |
4329 | ||
4330 | return rval; | |
4331 | } | |
ad0ecd61 | 4332 | |
c46e65c7 JC |
4333 | int |
4334 | qla82xx_set_driver_version(scsi_qla_host_t *vha, char *version) | |
4335 | { | |
4336 | int rval; | |
4337 | mbx_cmd_t mc; | |
4338 | mbx_cmd_t *mcp = &mc; | |
4339 | int i; | |
4340 | int len; | |
4341 | uint16_t *str; | |
4342 | struct qla_hw_data *ha = vha->hw; | |
4343 | ||
4344 | if (!IS_P3P_TYPE(ha)) | |
4345 | return QLA_FUNCTION_FAILED; | |
4346 | ||
4347 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117b, | |
4348 | "Entered %s.\n", __func__); | |
4349 | ||
4350 | str = (void *)version; | |
4351 | len = strlen(version); | |
4352 | ||
4353 | mcp->mb[0] = MBC_SET_RNID_PARAMS; | |
4354 | mcp->mb[1] = RNID_TYPE_SET_VERSION << 8; | |
4355 | mcp->out_mb = MBX_1|MBX_0; | |
4356 | for (i = 4; i < 16 && len; i++, str++, len -= 2) { | |
4357 | mcp->mb[i] = cpu_to_le16p(str); | |
4358 | mcp->out_mb |= 1<<i; | |
4359 | } | |
4360 | for (; i < 16; i++) { | |
4361 | mcp->mb[i] = 0; | |
4362 | mcp->out_mb |= 1<<i; | |
4363 | } | |
4364 | mcp->in_mb = MBX_1|MBX_0; | |
4365 | mcp->tov = MBX_TOV_SECONDS; | |
4366 | mcp->flags = 0; | |
4367 | rval = qla2x00_mailbox_command(vha, mcp); | |
4368 | ||
4369 | if (rval != QLA_SUCCESS) { | |
4370 | ql_dbg(ql_dbg_mbx, vha, 0x117c, | |
4371 | "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]); | |
4372 | } else { | |
4373 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117d, | |
4374 | "Done %s.\n", __func__); | |
4375 | } | |
4376 | ||
4377 | return rval; | |
4378 | } | |
4379 | ||
4380 | int | |
4381 | qla25xx_set_driver_version(scsi_qla_host_t *vha, char *version) | |
4382 | { | |
4383 | int rval; | |
4384 | mbx_cmd_t mc; | |
4385 | mbx_cmd_t *mcp = &mc; | |
4386 | int len; | |
4387 | uint16_t dwlen; | |
4388 | uint8_t *str; | |
4389 | dma_addr_t str_dma; | |
4390 | struct qla_hw_data *ha = vha->hw; | |
4391 | ||
4392 | if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha) || | |
4393 | IS_P3P_TYPE(ha)) | |
4394 | return QLA_FUNCTION_FAILED; | |
4395 | ||
4396 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117e, | |
4397 | "Entered %s.\n", __func__); | |
4398 | ||
4399 | str = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &str_dma); | |
4400 | if (!str) { | |
4401 | ql_log(ql_log_warn, vha, 0x117f, | |
4402 | "Failed to allocate driver version param.\n"); | |
4403 | return QLA_MEMORY_ALLOC_FAILED; | |
4404 | } | |
4405 | ||
4406 | memcpy(str, "\x7\x3\x11\x0", 4); | |
4407 | dwlen = str[0]; | |
4408 | len = dwlen * 4 - 4; | |
4409 | memset(str + 4, 0, len); | |
4410 | if (len > strlen(version)) | |
4411 | len = strlen(version); | |
4412 | memcpy(str + 4, version, len); | |
4413 | ||
4414 | mcp->mb[0] = MBC_SET_RNID_PARAMS; | |
4415 | mcp->mb[1] = RNID_TYPE_SET_VERSION << 8 | dwlen; | |
4416 | mcp->mb[2] = MSW(LSD(str_dma)); | |
4417 | mcp->mb[3] = LSW(LSD(str_dma)); | |
4418 | mcp->mb[6] = MSW(MSD(str_dma)); | |
4419 | mcp->mb[7] = LSW(MSD(str_dma)); | |
4420 | mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; | |
4421 | mcp->in_mb = MBX_1|MBX_0; | |
4422 | mcp->tov = MBX_TOV_SECONDS; | |
4423 | mcp->flags = 0; | |
4424 | rval = qla2x00_mailbox_command(vha, mcp); | |
4425 | ||
4426 | if (rval != QLA_SUCCESS) { | |
4427 | ql_dbg(ql_dbg_mbx, vha, 0x1180, | |
4428 | "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]); | |
4429 | } else { | |
4430 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1181, | |
4431 | "Done %s.\n", __func__); | |
4432 | } | |
4433 | ||
4434 | dma_pool_free(ha->s_dma_pool, str, str_dma); | |
4435 | ||
4436 | return rval; | |
4437 | } | |
4438 | ||
fe52f6e1 JC |
4439 | static int |
4440 | qla2x00_read_asic_temperature(scsi_qla_host_t *vha, uint16_t *temp) | |
4441 | { | |
4442 | int rval; | |
4443 | mbx_cmd_t mc; | |
4444 | mbx_cmd_t *mcp = &mc; | |
4445 | ||
4446 | if (!IS_FWI2_CAPABLE(vha->hw)) | |
4447 | return QLA_FUNCTION_FAILED; | |
4448 | ||
4449 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159, | |
4450 | "Entered %s.\n", __func__); | |
4451 | ||
4452 | mcp->mb[0] = MBC_GET_RNID_PARAMS; | |
4453 | mcp->mb[1] = RNID_TYPE_ASIC_TEMP << 8; | |
4454 | mcp->out_mb = MBX_1|MBX_0; | |
4455 | mcp->in_mb = MBX_1|MBX_0; | |
4456 | mcp->tov = MBX_TOV_SECONDS; | |
4457 | mcp->flags = 0; | |
4458 | rval = qla2x00_mailbox_command(vha, mcp); | |
4459 | *temp = mcp->mb[1]; | |
4460 | ||
4461 | if (rval != QLA_SUCCESS) { | |
4462 | ql_dbg(ql_dbg_mbx, vha, 0x115a, | |
4463 | "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]); | |
4464 | } else { | |
4465 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b, | |
4466 | "Done %s.\n", __func__); | |
4467 | } | |
4468 | ||
4469 | return rval; | |
4470 | } | |
4471 | ||
ad0ecd61 | 4472 | int |
6766df9e JC |
4473 | qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp, |
4474 | uint16_t dev, uint16_t off, uint16_t len, uint16_t opt) | |
ad0ecd61 JC |
4475 | { |
4476 | int rval; | |
4477 | mbx_cmd_t mc; | |
4478 | mbx_cmd_t *mcp = &mc; | |
6766df9e JC |
4479 | struct qla_hw_data *ha = vha->hw; |
4480 | ||
5f28d2d7 SK |
4481 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8, |
4482 | "Entered %s.\n", __func__); | |
7c3df132 | 4483 | |
6766df9e JC |
4484 | if (!IS_FWI2_CAPABLE(ha)) |
4485 | return QLA_FUNCTION_FAILED; | |
ad0ecd61 | 4486 | |
6766df9e JC |
4487 | if (len == 1) |
4488 | opt |= BIT_0; | |
4489 | ||
ad0ecd61 JC |
4490 | mcp->mb[0] = MBC_READ_SFP; |
4491 | mcp->mb[1] = dev; | |
4492 | mcp->mb[2] = MSW(sfp_dma); | |
4493 | mcp->mb[3] = LSW(sfp_dma); | |
4494 | mcp->mb[6] = MSW(MSD(sfp_dma)); | |
4495 | mcp->mb[7] = LSW(MSD(sfp_dma)); | |
4496 | mcp->mb[8] = len; | |
6766df9e | 4497 | mcp->mb[9] = off; |
ad0ecd61 JC |
4498 | mcp->mb[10] = opt; |
4499 | mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; | |
1bff6cc8 | 4500 | mcp->in_mb = MBX_1|MBX_0; |
ad0ecd61 JC |
4501 | mcp->tov = MBX_TOV_SECONDS; |
4502 | mcp->flags = 0; | |
4503 | rval = qla2x00_mailbox_command(vha, mcp); | |
4504 | ||
4505 | if (opt & BIT_0) | |
6766df9e | 4506 | *sfp = mcp->mb[1]; |
ad0ecd61 JC |
4507 | |
4508 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4509 | ql_dbg(ql_dbg_mbx, vha, 0x10e9, |
4510 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
ad0ecd61 | 4511 | } else { |
5f28d2d7 SK |
4512 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea, |
4513 | "Done %s.\n", __func__); | |
ad0ecd61 JC |
4514 | } |
4515 | ||
4516 | return rval; | |
4517 | } | |
4518 | ||
4519 | int | |
6766df9e JC |
4520 | qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp, |
4521 | uint16_t dev, uint16_t off, uint16_t len, uint16_t opt) | |
ad0ecd61 JC |
4522 | { |
4523 | int rval; | |
4524 | mbx_cmd_t mc; | |
4525 | mbx_cmd_t *mcp = &mc; | |
6766df9e JC |
4526 | struct qla_hw_data *ha = vha->hw; |
4527 | ||
5f28d2d7 SK |
4528 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10eb, |
4529 | "Entered %s.\n", __func__); | |
7c3df132 | 4530 | |
6766df9e JC |
4531 | if (!IS_FWI2_CAPABLE(ha)) |
4532 | return QLA_FUNCTION_FAILED; | |
ad0ecd61 | 4533 | |
6766df9e JC |
4534 | if (len == 1) |
4535 | opt |= BIT_0; | |
4536 | ||
ad0ecd61 | 4537 | if (opt & BIT_0) |
6766df9e | 4538 | len = *sfp; |
ad0ecd61 JC |
4539 | |
4540 | mcp->mb[0] = MBC_WRITE_SFP; | |
4541 | mcp->mb[1] = dev; | |
4542 | mcp->mb[2] = MSW(sfp_dma); | |
4543 | mcp->mb[3] = LSW(sfp_dma); | |
4544 | mcp->mb[6] = MSW(MSD(sfp_dma)); | |
4545 | mcp->mb[7] = LSW(MSD(sfp_dma)); | |
4546 | mcp->mb[8] = len; | |
6766df9e | 4547 | mcp->mb[9] = off; |
ad0ecd61 JC |
4548 | mcp->mb[10] = opt; |
4549 | mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; | |
6766df9e | 4550 | mcp->in_mb = MBX_1|MBX_0; |
ad0ecd61 JC |
4551 | mcp->tov = MBX_TOV_SECONDS; |
4552 | mcp->flags = 0; | |
4553 | rval = qla2x00_mailbox_command(vha, mcp); | |
4554 | ||
4555 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4556 | ql_dbg(ql_dbg_mbx, vha, 0x10ec, |
4557 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
ad0ecd61 | 4558 | } else { |
5f28d2d7 SK |
4559 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ed, |
4560 | "Done %s.\n", __func__); | |
ad0ecd61 JC |
4561 | } |
4562 | ||
4563 | return rval; | |
4564 | } | |
ce0423f4 AV |
4565 | |
4566 | int | |
4567 | qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma, | |
4568 | uint16_t size_in_bytes, uint16_t *actual_size) | |
4569 | { | |
4570 | int rval; | |
4571 | mbx_cmd_t mc; | |
4572 | mbx_cmd_t *mcp = &mc; | |
4573 | ||
5f28d2d7 SK |
4574 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ee, |
4575 | "Entered %s.\n", __func__); | |
7c3df132 | 4576 | |
6246b8a1 | 4577 | if (!IS_CNA_CAPABLE(vha->hw)) |
ce0423f4 AV |
4578 | return QLA_FUNCTION_FAILED; |
4579 | ||
ce0423f4 AV |
4580 | mcp->mb[0] = MBC_GET_XGMAC_STATS; |
4581 | mcp->mb[2] = MSW(stats_dma); | |
4582 | mcp->mb[3] = LSW(stats_dma); | |
4583 | mcp->mb[6] = MSW(MSD(stats_dma)); | |
4584 | mcp->mb[7] = LSW(MSD(stats_dma)); | |
4585 | mcp->mb[8] = size_in_bytes >> 2; | |
4586 | mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0; | |
4587 | mcp->in_mb = MBX_2|MBX_1|MBX_0; | |
4588 | mcp->tov = MBX_TOV_SECONDS; | |
4589 | mcp->flags = 0; | |
4590 | rval = qla2x00_mailbox_command(vha, mcp); | |
4591 | ||
4592 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4593 | ql_dbg(ql_dbg_mbx, vha, 0x10ef, |
4594 | "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n", | |
4595 | rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]); | |
ce0423f4 | 4596 | } else { |
5f28d2d7 SK |
4597 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f0, |
4598 | "Done %s.\n", __func__); | |
7c3df132 | 4599 | |
ce0423f4 AV |
4600 | |
4601 | *actual_size = mcp->mb[2] << 2; | |
4602 | } | |
4603 | ||
4604 | return rval; | |
4605 | } | |
11bbc1d8 AV |
4606 | |
4607 | int | |
4608 | qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma, | |
4609 | uint16_t size) | |
4610 | { | |
4611 | int rval; | |
4612 | mbx_cmd_t mc; | |
4613 | mbx_cmd_t *mcp = &mc; | |
4614 | ||
5f28d2d7 SK |
4615 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f1, |
4616 | "Entered %s.\n", __func__); | |
7c3df132 | 4617 | |
6246b8a1 | 4618 | if (!IS_CNA_CAPABLE(vha->hw)) |
11bbc1d8 AV |
4619 | return QLA_FUNCTION_FAILED; |
4620 | ||
11bbc1d8 AV |
4621 | mcp->mb[0] = MBC_GET_DCBX_PARAMS; |
4622 | mcp->mb[1] = 0; | |
4623 | mcp->mb[2] = MSW(tlv_dma); | |
4624 | mcp->mb[3] = LSW(tlv_dma); | |
4625 | mcp->mb[6] = MSW(MSD(tlv_dma)); | |
4626 | mcp->mb[7] = LSW(MSD(tlv_dma)); | |
4627 | mcp->mb[8] = size; | |
4628 | mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; | |
4629 | mcp->in_mb = MBX_2|MBX_1|MBX_0; | |
4630 | mcp->tov = MBX_TOV_SECONDS; | |
4631 | mcp->flags = 0; | |
4632 | rval = qla2x00_mailbox_command(vha, mcp); | |
4633 | ||
4634 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4635 | ql_dbg(ql_dbg_mbx, vha, 0x10f2, |
4636 | "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n", | |
4637 | rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]); | |
11bbc1d8 | 4638 | } else { |
5f28d2d7 SK |
4639 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f3, |
4640 | "Done %s.\n", __func__); | |
11bbc1d8 AV |
4641 | } |
4642 | ||
4643 | return rval; | |
4644 | } | |
18e7555a AV |
4645 | |
4646 | int | |
4647 | qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data) | |
4648 | { | |
4649 | int rval; | |
4650 | mbx_cmd_t mc; | |
4651 | mbx_cmd_t *mcp = &mc; | |
4652 | ||
5f28d2d7 SK |
4653 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f4, |
4654 | "Entered %s.\n", __func__); | |
7c3df132 | 4655 | |
18e7555a AV |
4656 | if (!IS_FWI2_CAPABLE(vha->hw)) |
4657 | return QLA_FUNCTION_FAILED; | |
4658 | ||
18e7555a AV |
4659 | mcp->mb[0] = MBC_READ_RAM_EXTENDED; |
4660 | mcp->mb[1] = LSW(risc_addr); | |
4661 | mcp->mb[8] = MSW(risc_addr); | |
4662 | mcp->out_mb = MBX_8|MBX_1|MBX_0; | |
4663 | mcp->in_mb = MBX_3|MBX_2|MBX_0; | |
4664 | mcp->tov = 30; | |
4665 | mcp->flags = 0; | |
4666 | rval = qla2x00_mailbox_command(vha, mcp); | |
4667 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4668 | ql_dbg(ql_dbg_mbx, vha, 0x10f5, |
4669 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
18e7555a | 4670 | } else { |
5f28d2d7 SK |
4671 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f6, |
4672 | "Done %s.\n", __func__); | |
18e7555a AV |
4673 | *data = mcp->mb[3] << 16 | mcp->mb[2]; |
4674 | } | |
4675 | ||
4676 | return rval; | |
4677 | } | |
4678 | ||
9a069e19 | 4679 | int |
a9083016 GM |
4680 | qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq, |
4681 | uint16_t *mresp) | |
9a069e19 GM |
4682 | { |
4683 | int rval; | |
4684 | mbx_cmd_t mc; | |
4685 | mbx_cmd_t *mcp = &mc; | |
9a069e19 | 4686 | |
5f28d2d7 SK |
4687 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f7, |
4688 | "Entered %s.\n", __func__); | |
9a069e19 GM |
4689 | |
4690 | memset(mcp->mb, 0 , sizeof(mcp->mb)); | |
4691 | mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK; | |
4692 | mcp->mb[1] = mreq->options | BIT_6; // BIT_6 specifies 64 bit addressing | |
4693 | ||
4694 | /* transfer count */ | |
4695 | mcp->mb[10] = LSW(mreq->transfer_size); | |
4696 | mcp->mb[11] = MSW(mreq->transfer_size); | |
4697 | ||
4698 | /* send data address */ | |
4699 | mcp->mb[14] = LSW(mreq->send_dma); | |
4700 | mcp->mb[15] = MSW(mreq->send_dma); | |
4701 | mcp->mb[20] = LSW(MSD(mreq->send_dma)); | |
4702 | mcp->mb[21] = MSW(MSD(mreq->send_dma)); | |
4703 | ||
25985edc | 4704 | /* receive data address */ |
9a069e19 GM |
4705 | mcp->mb[16] = LSW(mreq->rcv_dma); |
4706 | mcp->mb[17] = MSW(mreq->rcv_dma); | |
4707 | mcp->mb[6] = LSW(MSD(mreq->rcv_dma)); | |
4708 | mcp->mb[7] = MSW(MSD(mreq->rcv_dma)); | |
4709 | ||
4710 | /* Iteration count */ | |
1b98b421 JC |
4711 | mcp->mb[18] = LSW(mreq->iteration_count); |
4712 | mcp->mb[19] = MSW(mreq->iteration_count); | |
9a069e19 GM |
4713 | |
4714 | mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15| | |
4715 | MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0; | |
6246b8a1 | 4716 | if (IS_CNA_CAPABLE(vha->hw)) |
9a069e19 GM |
4717 | mcp->out_mb |= MBX_2; |
4718 | mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0; | |
4719 | ||
4720 | mcp->buf_size = mreq->transfer_size; | |
4721 | mcp->tov = MBX_TOV_SECONDS; | |
4722 | mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD; | |
4723 | ||
4724 | rval = qla2x00_mailbox_command(vha, mcp); | |
4725 | ||
4726 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4727 | ql_dbg(ql_dbg_mbx, vha, 0x10f8, |
4728 | "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[18]=%x " | |
4729 | "mb[19]=%x.\n", rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], | |
4730 | mcp->mb[3], mcp->mb[18], mcp->mb[19]); | |
9a069e19 | 4731 | } else { |
5f28d2d7 SK |
4732 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f9, |
4733 | "Done %s.\n", __func__); | |
9a069e19 GM |
4734 | } |
4735 | ||
4736 | /* Copy mailbox information */ | |
4737 | memcpy( mresp, mcp->mb, 64); | |
9a069e19 GM |
4738 | return rval; |
4739 | } | |
4740 | ||
4741 | int | |
a9083016 GM |
4742 | qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq, |
4743 | uint16_t *mresp) | |
9a069e19 GM |
4744 | { |
4745 | int rval; | |
4746 | mbx_cmd_t mc; | |
4747 | mbx_cmd_t *mcp = &mc; | |
4748 | struct qla_hw_data *ha = vha->hw; | |
4749 | ||
5f28d2d7 SK |
4750 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fa, |
4751 | "Entered %s.\n", __func__); | |
9a069e19 GM |
4752 | |
4753 | memset(mcp->mb, 0 , sizeof(mcp->mb)); | |
4754 | mcp->mb[0] = MBC_DIAGNOSTIC_ECHO; | |
4755 | mcp->mb[1] = mreq->options | BIT_6; /* BIT_6 specifies 64bit address */ | |
6246b8a1 | 4756 | if (IS_CNA_CAPABLE(ha)) { |
9a069e19 | 4757 | mcp->mb[1] |= BIT_15; |
a9083016 GM |
4758 | mcp->mb[2] = vha->fcoe_fcf_idx; |
4759 | } | |
9a069e19 GM |
4760 | mcp->mb[16] = LSW(mreq->rcv_dma); |
4761 | mcp->mb[17] = MSW(mreq->rcv_dma); | |
4762 | mcp->mb[6] = LSW(MSD(mreq->rcv_dma)); | |
4763 | mcp->mb[7] = MSW(MSD(mreq->rcv_dma)); | |
4764 | ||
4765 | mcp->mb[10] = LSW(mreq->transfer_size); | |
4766 | ||
4767 | mcp->mb[14] = LSW(mreq->send_dma); | |
4768 | mcp->mb[15] = MSW(mreq->send_dma); | |
4769 | mcp->mb[20] = LSW(MSD(mreq->send_dma)); | |
4770 | mcp->mb[21] = MSW(MSD(mreq->send_dma)); | |
4771 | ||
4772 | mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15| | |
4773 | MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0; | |
6246b8a1 | 4774 | if (IS_CNA_CAPABLE(ha)) |
9a069e19 GM |
4775 | mcp->out_mb |= MBX_2; |
4776 | ||
4777 | mcp->in_mb = MBX_0; | |
6246b8a1 GM |
4778 | if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) || |
4779 | IS_CNA_CAPABLE(ha) || IS_QLA2031(ha)) | |
9a069e19 | 4780 | mcp->in_mb |= MBX_1; |
6246b8a1 | 4781 | if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha)) |
9a069e19 GM |
4782 | mcp->in_mb |= MBX_3; |
4783 | ||
4784 | mcp->tov = MBX_TOV_SECONDS; | |
4785 | mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD; | |
4786 | mcp->buf_size = mreq->transfer_size; | |
4787 | ||
4788 | rval = qla2x00_mailbox_command(vha, mcp); | |
4789 | ||
4790 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4791 | ql_dbg(ql_dbg_mbx, vha, 0x10fb, |
4792 | "Failed=%x mb[0]=%x mb[1]=%x.\n", | |
4793 | rval, mcp->mb[0], mcp->mb[1]); | |
9a069e19 | 4794 | } else { |
5f28d2d7 SK |
4795 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fc, |
4796 | "Done %s.\n", __func__); | |
9a069e19 GM |
4797 | } |
4798 | ||
4799 | /* Copy mailbox information */ | |
6dbdda4d | 4800 | memcpy(mresp, mcp->mb, 64); |
9a069e19 GM |
4801 | return rval; |
4802 | } | |
6dbdda4d | 4803 | |
9a069e19 | 4804 | int |
7c3df132 | 4805 | qla84xx_reset_chip(scsi_qla_host_t *vha, uint16_t enable_diagnostic) |
9a069e19 GM |
4806 | { |
4807 | int rval; | |
4808 | mbx_cmd_t mc; | |
4809 | mbx_cmd_t *mcp = &mc; | |
4810 | ||
5f28d2d7 | 4811 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fd, |
7c3df132 | 4812 | "Entered %s enable_diag=%d.\n", __func__, enable_diagnostic); |
9a069e19 GM |
4813 | |
4814 | mcp->mb[0] = MBC_ISP84XX_RESET; | |
4815 | mcp->mb[1] = enable_diagnostic; | |
4816 | mcp->out_mb = MBX_1|MBX_0; | |
4817 | mcp->in_mb = MBX_1|MBX_0; | |
4818 | mcp->tov = MBX_TOV_SECONDS; | |
4819 | mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD; | |
7c3df132 | 4820 | rval = qla2x00_mailbox_command(vha, mcp); |
9a069e19 | 4821 | |
9a069e19 | 4822 | if (rval != QLA_SUCCESS) |
7c3df132 | 4823 | ql_dbg(ql_dbg_mbx, vha, 0x10fe, "Failed=%x.\n", rval); |
9a069e19 | 4824 | else |
5f28d2d7 SK |
4825 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ff, |
4826 | "Done %s.\n", __func__); | |
9a069e19 GM |
4827 | |
4828 | return rval; | |
4829 | } | |
4830 | ||
18e7555a AV |
4831 | int |
4832 | qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data) | |
4833 | { | |
4834 | int rval; | |
4835 | mbx_cmd_t mc; | |
4836 | mbx_cmd_t *mcp = &mc; | |
4837 | ||
5f28d2d7 SK |
4838 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1100, |
4839 | "Entered %s.\n", __func__); | |
7c3df132 | 4840 | |
18e7555a | 4841 | if (!IS_FWI2_CAPABLE(vha->hw)) |
6c452a45 | 4842 | return QLA_FUNCTION_FAILED; |
18e7555a | 4843 | |
18e7555a AV |
4844 | mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED; |
4845 | mcp->mb[1] = LSW(risc_addr); | |
4846 | mcp->mb[2] = LSW(data); | |
4847 | mcp->mb[3] = MSW(data); | |
4848 | mcp->mb[8] = MSW(risc_addr); | |
4849 | mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0; | |
4850 | mcp->in_mb = MBX_0; | |
4851 | mcp->tov = 30; | |
4852 | mcp->flags = 0; | |
4853 | rval = qla2x00_mailbox_command(vha, mcp); | |
4854 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4855 | ql_dbg(ql_dbg_mbx, vha, 0x1101, |
4856 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
18e7555a | 4857 | } else { |
5f28d2d7 SK |
4858 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1102, |
4859 | "Done %s.\n", __func__); | |
18e7555a AV |
4860 | } |
4861 | ||
4862 | return rval; | |
4863 | } | |
3064ff39 | 4864 | |
b1d46989 MI |
4865 | int |
4866 | qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb) | |
4867 | { | |
4868 | int rval; | |
4869 | uint32_t stat, timer; | |
4870 | uint16_t mb0 = 0; | |
4871 | struct qla_hw_data *ha = vha->hw; | |
4872 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; | |
4873 | ||
4874 | rval = QLA_SUCCESS; | |
4875 | ||
5f28d2d7 SK |
4876 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1103, |
4877 | "Entered %s.\n", __func__); | |
b1d46989 MI |
4878 | |
4879 | clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); | |
4880 | ||
4881 | /* Write the MBC data to the registers */ | |
4882 | WRT_REG_WORD(®->mailbox0, MBC_WRITE_MPI_REGISTER); | |
4883 | WRT_REG_WORD(®->mailbox1, mb[0]); | |
4884 | WRT_REG_WORD(®->mailbox2, mb[1]); | |
4885 | WRT_REG_WORD(®->mailbox3, mb[2]); | |
4886 | WRT_REG_WORD(®->mailbox4, mb[3]); | |
4887 | ||
4888 | WRT_REG_DWORD(®->hccr, HCCRX_SET_HOST_INT); | |
4889 | ||
4890 | /* Poll for MBC interrupt */ | |
4891 | for (timer = 6000000; timer; timer--) { | |
4892 | /* Check for pending interrupts. */ | |
4893 | stat = RD_REG_DWORD(®->host_status); | |
4894 | if (stat & HSRX_RISC_INT) { | |
4895 | stat &= 0xff; | |
4896 | ||
4897 | if (stat == 0x1 || stat == 0x2 || | |
4898 | stat == 0x10 || stat == 0x11) { | |
4899 | set_bit(MBX_INTERRUPT, | |
4900 | &ha->mbx_cmd_flags); | |
4901 | mb0 = RD_REG_WORD(®->mailbox0); | |
4902 | WRT_REG_DWORD(®->hccr, | |
4903 | HCCRX_CLR_RISC_INT); | |
4904 | RD_REG_DWORD(®->hccr); | |
4905 | break; | |
4906 | } | |
4907 | } | |
4908 | udelay(5); | |
4909 | } | |
4910 | ||
4911 | if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) | |
4912 | rval = mb0 & MBS_MASK; | |
4913 | else | |
4914 | rval = QLA_FUNCTION_FAILED; | |
4915 | ||
4916 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4917 | ql_dbg(ql_dbg_mbx, vha, 0x1104, |
4918 | "Failed=%x mb[0]=%x.\n", rval, mb[0]); | |
b1d46989 | 4919 | } else { |
5f28d2d7 SK |
4920 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1105, |
4921 | "Done %s.\n", __func__); | |
b1d46989 MI |
4922 | } |
4923 | ||
4924 | return rval; | |
4925 | } | |
6246b8a1 | 4926 | |
3064ff39 MH |
4927 | int |
4928 | qla2x00_get_data_rate(scsi_qla_host_t *vha) | |
4929 | { | |
4930 | int rval; | |
4931 | mbx_cmd_t mc; | |
4932 | mbx_cmd_t *mcp = &mc; | |
4933 | struct qla_hw_data *ha = vha->hw; | |
4934 | ||
5f28d2d7 SK |
4935 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106, |
4936 | "Entered %s.\n", __func__); | |
7c3df132 | 4937 | |
3064ff39 MH |
4938 | if (!IS_FWI2_CAPABLE(ha)) |
4939 | return QLA_FUNCTION_FAILED; | |
4940 | ||
3064ff39 MH |
4941 | mcp->mb[0] = MBC_DATA_RATE; |
4942 | mcp->mb[1] = 0; | |
4943 | mcp->out_mb = MBX_1|MBX_0; | |
4944 | mcp->in_mb = MBX_2|MBX_1|MBX_0; | |
f73cb695 | 4945 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) |
6246b8a1 | 4946 | mcp->in_mb |= MBX_3; |
3064ff39 MH |
4947 | mcp->tov = MBX_TOV_SECONDS; |
4948 | mcp->flags = 0; | |
4949 | rval = qla2x00_mailbox_command(vha, mcp); | |
4950 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4951 | ql_dbg(ql_dbg_mbx, vha, 0x1107, |
4952 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
3064ff39 | 4953 | } else { |
5f28d2d7 SK |
4954 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108, |
4955 | "Done %s.\n", __func__); | |
3064ff39 MH |
4956 | if (mcp->mb[1] != 0x7) |
4957 | ha->link_data_rate = mcp->mb[1]; | |
4958 | } | |
4959 | ||
4960 | return rval; | |
4961 | } | |
09ff701a | 4962 | |
23f2ebd1 SR |
4963 | int |
4964 | qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb) | |
4965 | { | |
4966 | int rval; | |
4967 | mbx_cmd_t mc; | |
4968 | mbx_cmd_t *mcp = &mc; | |
4969 | struct qla_hw_data *ha = vha->hw; | |
4970 | ||
5f28d2d7 SK |
4971 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1109, |
4972 | "Entered %s.\n", __func__); | |
23f2ebd1 | 4973 | |
f73cb695 CD |
4974 | if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) && !IS_QLA8044(ha) && |
4975 | !IS_QLA27XX(ha)) | |
23f2ebd1 SR |
4976 | return QLA_FUNCTION_FAILED; |
4977 | mcp->mb[0] = MBC_GET_PORT_CONFIG; | |
4978 | mcp->out_mb = MBX_0; | |
4979 | mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
4980 | mcp->tov = MBX_TOV_SECONDS; | |
4981 | mcp->flags = 0; | |
4982 | ||
4983 | rval = qla2x00_mailbox_command(vha, mcp); | |
4984 | ||
4985 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
4986 | ql_dbg(ql_dbg_mbx, vha, 0x110a, |
4987 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
23f2ebd1 SR |
4988 | } else { |
4989 | /* Copy all bits to preserve original value */ | |
4990 | memcpy(mb, &mcp->mb[1], sizeof(uint16_t) * 4); | |
4991 | ||
5f28d2d7 SK |
4992 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110b, |
4993 | "Done %s.\n", __func__); | |
23f2ebd1 SR |
4994 | } |
4995 | return rval; | |
4996 | } | |
4997 | ||
4998 | int | |
4999 | qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb) | |
5000 | { | |
5001 | int rval; | |
5002 | mbx_cmd_t mc; | |
5003 | mbx_cmd_t *mcp = &mc; | |
5004 | ||
5f28d2d7 SK |
5005 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110c, |
5006 | "Entered %s.\n", __func__); | |
23f2ebd1 SR |
5007 | |
5008 | mcp->mb[0] = MBC_SET_PORT_CONFIG; | |
5009 | /* Copy all bits to preserve original setting */ | |
5010 | memcpy(&mcp->mb[1], mb, sizeof(uint16_t) * 4); | |
5011 | mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
5012 | mcp->in_mb = MBX_0; | |
5013 | mcp->tov = MBX_TOV_SECONDS; | |
5014 | mcp->flags = 0; | |
5015 | rval = qla2x00_mailbox_command(vha, mcp); | |
5016 | ||
5017 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
5018 | ql_dbg(ql_dbg_mbx, vha, 0x110d, |
5019 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
23f2ebd1 | 5020 | } else |
5f28d2d7 SK |
5021 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110e, |
5022 | "Done %s.\n", __func__); | |
23f2ebd1 SR |
5023 | |
5024 | return rval; | |
5025 | } | |
5026 | ||
5027 | ||
09ff701a SR |
5028 | int |
5029 | qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority, | |
5030 | uint16_t *mb) | |
5031 | { | |
5032 | int rval; | |
5033 | mbx_cmd_t mc; | |
5034 | mbx_cmd_t *mcp = &mc; | |
5035 | struct qla_hw_data *ha = vha->hw; | |
5036 | ||
5f28d2d7 SK |
5037 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110f, |
5038 | "Entered %s.\n", __func__); | |
7c3df132 | 5039 | |
09ff701a SR |
5040 | if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha)) |
5041 | return QLA_FUNCTION_FAILED; | |
5042 | ||
09ff701a SR |
5043 | mcp->mb[0] = MBC_PORT_PARAMS; |
5044 | mcp->mb[1] = loop_id; | |
5045 | if (ha->flags.fcp_prio_enabled) | |
5046 | mcp->mb[2] = BIT_1; | |
5047 | else | |
5048 | mcp->mb[2] = BIT_2; | |
5049 | mcp->mb[4] = priority & 0xf; | |
5050 | mcp->mb[9] = vha->vp_idx; | |
5051 | mcp->out_mb = MBX_9|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
5052 | mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0; | |
5053 | mcp->tov = 30; | |
5054 | mcp->flags = 0; | |
5055 | rval = qla2x00_mailbox_command(vha, mcp); | |
5056 | if (mb != NULL) { | |
5057 | mb[0] = mcp->mb[0]; | |
5058 | mb[1] = mcp->mb[1]; | |
5059 | mb[3] = mcp->mb[3]; | |
5060 | mb[4] = mcp->mb[4]; | |
5061 | } | |
5062 | ||
5063 | if (rval != QLA_SUCCESS) { | |
7c3df132 | 5064 | ql_dbg(ql_dbg_mbx, vha, 0x10cd, "Failed=%x.\n", rval); |
09ff701a | 5065 | } else { |
5f28d2d7 SK |
5066 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10cc, |
5067 | "Done %s.\n", __func__); | |
09ff701a SR |
5068 | } |
5069 | ||
5070 | return rval; | |
5071 | } | |
a9083016 | 5072 | |
794a5691 | 5073 | int |
fe52f6e1 | 5074 | qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp) |
794a5691 | 5075 | { |
fe52f6e1 | 5076 | int rval = QLA_FUNCTION_FAILED; |
794a5691 | 5077 | struct qla_hw_data *ha = vha->hw; |
fe52f6e1 | 5078 | uint8_t byte; |
794a5691 | 5079 | |
1ae47cf3 JC |
5080 | if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha)) { |
5081 | ql_dbg(ql_dbg_mbx, vha, 0x1150, | |
5082 | "Thermal not supported by this card.\n"); | |
5083 | return rval; | |
5084 | } | |
5085 | ||
5086 | if (IS_QLA25XX(ha)) { | |
5087 | if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
5088 | ha->pdev->subsystem_device == 0x0175) { | |
5089 | rval = qla2x00_read_sfp(vha, 0, &byte, | |
5090 | 0x98, 0x1, 1, BIT_13|BIT_0); | |
5091 | *temp = byte; | |
5092 | return rval; | |
5093 | } | |
5094 | if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP && | |
5095 | ha->pdev->subsystem_device == 0x338e) { | |
5096 | rval = qla2x00_read_sfp(vha, 0, &byte, | |
5097 | 0x98, 0x1, 1, BIT_15|BIT_14|BIT_0); | |
5098 | *temp = byte; | |
5099 | return rval; | |
5100 | } | |
5101 | ql_dbg(ql_dbg_mbx, vha, 0x10c9, | |
5102 | "Thermal not supported by this card.\n"); | |
5103 | return rval; | |
794a5691 | 5104 | } |
794a5691 | 5105 | |
1ae47cf3 JC |
5106 | if (IS_QLA82XX(ha)) { |
5107 | *temp = qla82xx_read_temperature(vha); | |
5108 | rval = QLA_SUCCESS; | |
5109 | return rval; | |
5110 | } else if (IS_QLA8044(ha)) { | |
5111 | *temp = qla8044_read_temperature(vha); | |
5112 | rval = QLA_SUCCESS; | |
5113 | return rval; | |
794a5691 | 5114 | } |
794a5691 | 5115 | |
1ae47cf3 | 5116 | rval = qla2x00_read_asic_temperature(vha, temp); |
794a5691 AV |
5117 | return rval; |
5118 | } | |
5119 | ||
a9083016 GM |
5120 | int |
5121 | qla82xx_mbx_intr_enable(scsi_qla_host_t *vha) | |
5122 | { | |
5123 | int rval; | |
5124 | struct qla_hw_data *ha = vha->hw; | |
5125 | mbx_cmd_t mc; | |
5126 | mbx_cmd_t *mcp = &mc; | |
5127 | ||
5f28d2d7 SK |
5128 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1017, |
5129 | "Entered %s.\n", __func__); | |
7c3df132 | 5130 | |
a9083016 GM |
5131 | if (!IS_FWI2_CAPABLE(ha)) |
5132 | return QLA_FUNCTION_FAILED; | |
5133 | ||
a9083016 | 5134 | memset(mcp, 0, sizeof(mbx_cmd_t)); |
3711333d | 5135 | mcp->mb[0] = MBC_TOGGLE_INTERRUPT; |
a9083016 GM |
5136 | mcp->mb[1] = 1; |
5137 | ||
5138 | mcp->out_mb = MBX_1|MBX_0; | |
5139 | mcp->in_mb = MBX_0; | |
5140 | mcp->tov = 30; | |
5141 | mcp->flags = 0; | |
5142 | ||
5143 | rval = qla2x00_mailbox_command(vha, mcp); | |
5144 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
5145 | ql_dbg(ql_dbg_mbx, vha, 0x1016, |
5146 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
a9083016 | 5147 | } else { |
5f28d2d7 SK |
5148 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100e, |
5149 | "Done %s.\n", __func__); | |
a9083016 GM |
5150 | } |
5151 | ||
5152 | return rval; | |
5153 | } | |
5154 | ||
5155 | int | |
5156 | qla82xx_mbx_intr_disable(scsi_qla_host_t *vha) | |
5157 | { | |
5158 | int rval; | |
5159 | struct qla_hw_data *ha = vha->hw; | |
5160 | mbx_cmd_t mc; | |
5161 | mbx_cmd_t *mcp = &mc; | |
5162 | ||
5f28d2d7 SK |
5163 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100d, |
5164 | "Entered %s.\n", __func__); | |
7c3df132 | 5165 | |
7ec0effd | 5166 | if (!IS_P3P_TYPE(ha)) |
a9083016 GM |
5167 | return QLA_FUNCTION_FAILED; |
5168 | ||
a9083016 | 5169 | memset(mcp, 0, sizeof(mbx_cmd_t)); |
3711333d | 5170 | mcp->mb[0] = MBC_TOGGLE_INTERRUPT; |
a9083016 GM |
5171 | mcp->mb[1] = 0; |
5172 | ||
5173 | mcp->out_mb = MBX_1|MBX_0; | |
5174 | mcp->in_mb = MBX_0; | |
5175 | mcp->tov = 30; | |
5176 | mcp->flags = 0; | |
5177 | ||
5178 | rval = qla2x00_mailbox_command(vha, mcp); | |
5179 | if (rval != QLA_SUCCESS) { | |
7c3df132 SK |
5180 | ql_dbg(ql_dbg_mbx, vha, 0x100c, |
5181 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
a9083016 | 5182 | } else { |
5f28d2d7 SK |
5183 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100b, |
5184 | "Done %s.\n", __func__); | |
a9083016 GM |
5185 | } |
5186 | ||
5187 | return rval; | |
5188 | } | |
08de2844 GM |
5189 | |
5190 | int | |
5191 | qla82xx_md_get_template_size(scsi_qla_host_t *vha) | |
5192 | { | |
5193 | struct qla_hw_data *ha = vha->hw; | |
5194 | mbx_cmd_t mc; | |
5195 | mbx_cmd_t *mcp = &mc; | |
5196 | int rval = QLA_FUNCTION_FAILED; | |
5197 | ||
5f28d2d7 SK |
5198 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111f, |
5199 | "Entered %s.\n", __func__); | |
08de2844 GM |
5200 | |
5201 | memset(mcp->mb, 0 , sizeof(mcp->mb)); | |
5202 | mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE); | |
5203 | mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE); | |
5204 | mcp->mb[2] = LSW(RQST_TMPLT_SIZE); | |
5205 | mcp->mb[3] = MSW(RQST_TMPLT_SIZE); | |
5206 | ||
5207 | mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; | |
5208 | mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8| | |
5209 | MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
5210 | ||
5211 | mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD; | |
5212 | mcp->tov = MBX_TOV_SECONDS; | |
5213 | rval = qla2x00_mailbox_command(vha, mcp); | |
5214 | ||
5215 | /* Always copy back return mailbox values. */ | |
5216 | if (rval != QLA_SUCCESS) { | |
5217 | ql_dbg(ql_dbg_mbx, vha, 0x1120, | |
5218 | "mailbox command FAILED=0x%x, subcode=%x.\n", | |
5219 | (mcp->mb[1] << 16) | mcp->mb[0], | |
5220 | (mcp->mb[3] << 16) | mcp->mb[2]); | |
5221 | } else { | |
5f28d2d7 SK |
5222 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1121, |
5223 | "Done %s.\n", __func__); | |
08de2844 GM |
5224 | ha->md_template_size = ((mcp->mb[3] << 16) | mcp->mb[2]); |
5225 | if (!ha->md_template_size) { | |
5226 | ql_dbg(ql_dbg_mbx, vha, 0x1122, | |
5227 | "Null template size obtained.\n"); | |
5228 | rval = QLA_FUNCTION_FAILED; | |
5229 | } | |
5230 | } | |
5231 | return rval; | |
5232 | } | |
5233 | ||
5234 | int | |
5235 | qla82xx_md_get_template(scsi_qla_host_t *vha) | |
5236 | { | |
5237 | struct qla_hw_data *ha = vha->hw; | |
5238 | mbx_cmd_t mc; | |
5239 | mbx_cmd_t *mcp = &mc; | |
5240 | int rval = QLA_FUNCTION_FAILED; | |
5241 | ||
5f28d2d7 SK |
5242 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1123, |
5243 | "Entered %s.\n", __func__); | |
08de2844 GM |
5244 | |
5245 | ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev, | |
5246 | ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL); | |
5247 | if (!ha->md_tmplt_hdr) { | |
5248 | ql_log(ql_log_warn, vha, 0x1124, | |
5249 | "Unable to allocate memory for Minidump template.\n"); | |
5250 | return rval; | |
5251 | } | |
5252 | ||
5253 | memset(mcp->mb, 0 , sizeof(mcp->mb)); | |
5254 | mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE); | |
5255 | mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE); | |
5256 | mcp->mb[2] = LSW(RQST_TMPLT); | |
5257 | mcp->mb[3] = MSW(RQST_TMPLT); | |
5258 | mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma)); | |
5259 | mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma)); | |
5260 | mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma)); | |
5261 | mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma)); | |
5262 | mcp->mb[8] = LSW(ha->md_template_size); | |
5263 | mcp->mb[9] = MSW(ha->md_template_size); | |
5264 | ||
5265 | mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD; | |
5266 | mcp->tov = MBX_TOV_SECONDS; | |
5267 | mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8| | |
5268 | MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
5269 | mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0; | |
5270 | rval = qla2x00_mailbox_command(vha, mcp); | |
5271 | ||
5272 | if (rval != QLA_SUCCESS) { | |
5273 | ql_dbg(ql_dbg_mbx, vha, 0x1125, | |
5274 | "mailbox command FAILED=0x%x, subcode=%x.\n", | |
5275 | ((mcp->mb[1] << 16) | mcp->mb[0]), | |
5276 | ((mcp->mb[3] << 16) | mcp->mb[2])); | |
5277 | } else | |
5f28d2d7 SK |
5278 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1126, |
5279 | "Done %s.\n", __func__); | |
08de2844 GM |
5280 | return rval; |
5281 | } | |
999916dc | 5282 | |
7ec0effd AD |
5283 | int |
5284 | qla8044_md_get_template(scsi_qla_host_t *vha) | |
5285 | { | |
5286 | struct qla_hw_data *ha = vha->hw; | |
5287 | mbx_cmd_t mc; | |
5288 | mbx_cmd_t *mcp = &mc; | |
5289 | int rval = QLA_FUNCTION_FAILED; | |
5290 | int offset = 0, size = MINIDUMP_SIZE_36K; | |
5291 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11f, | |
5292 | "Entered %s.\n", __func__); | |
5293 | ||
5294 | ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev, | |
5295 | ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL); | |
5296 | if (!ha->md_tmplt_hdr) { | |
5297 | ql_log(ql_log_warn, vha, 0xb11b, | |
5298 | "Unable to allocate memory for Minidump template.\n"); | |
5299 | return rval; | |
5300 | } | |
5301 | ||
5302 | memset(mcp->mb, 0 , sizeof(mcp->mb)); | |
5303 | while (offset < ha->md_template_size) { | |
5304 | mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE); | |
5305 | mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE); | |
5306 | mcp->mb[2] = LSW(RQST_TMPLT); | |
5307 | mcp->mb[3] = MSW(RQST_TMPLT); | |
5308 | mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma + offset)); | |
5309 | mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma + offset)); | |
5310 | mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma + offset)); | |
5311 | mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma + offset)); | |
5312 | mcp->mb[8] = LSW(size); | |
5313 | mcp->mb[9] = MSW(size); | |
5314 | mcp->mb[10] = offset & 0x0000FFFF; | |
5315 | mcp->mb[11] = offset & 0xFFFF0000; | |
5316 | mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD; | |
5317 | mcp->tov = MBX_TOV_SECONDS; | |
5318 | mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8| | |
5319 | MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
5320 | mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0; | |
5321 | rval = qla2x00_mailbox_command(vha, mcp); | |
5322 | ||
5323 | if (rval != QLA_SUCCESS) { | |
5324 | ql_dbg(ql_dbg_mbx, vha, 0xb11c, | |
5325 | "mailbox command FAILED=0x%x, subcode=%x.\n", | |
5326 | ((mcp->mb[1] << 16) | mcp->mb[0]), | |
5327 | ((mcp->mb[3] << 16) | mcp->mb[2])); | |
5328 | return rval; | |
5329 | } else | |
5330 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11d, | |
5331 | "Done %s.\n", __func__); | |
5332 | offset = offset + size; | |
5333 | } | |
5334 | return rval; | |
5335 | } | |
5336 | ||
6246b8a1 GM |
5337 | int |
5338 | qla81xx_set_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg) | |
5339 | { | |
5340 | int rval; | |
5341 | struct qla_hw_data *ha = vha->hw; | |
5342 | mbx_cmd_t mc; | |
5343 | mbx_cmd_t *mcp = &mc; | |
5344 | ||
5345 | if (!IS_QLA81XX(ha) && !IS_QLA8031(ha)) | |
5346 | return QLA_FUNCTION_FAILED; | |
5347 | ||
5f28d2d7 SK |
5348 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1133, |
5349 | "Entered %s.\n", __func__); | |
6246b8a1 GM |
5350 | |
5351 | memset(mcp, 0, sizeof(mbx_cmd_t)); | |
5352 | mcp->mb[0] = MBC_SET_LED_CONFIG; | |
5353 | mcp->mb[1] = led_cfg[0]; | |
5354 | mcp->mb[2] = led_cfg[1]; | |
5355 | if (IS_QLA8031(ha)) { | |
5356 | mcp->mb[3] = led_cfg[2]; | |
5357 | mcp->mb[4] = led_cfg[3]; | |
5358 | mcp->mb[5] = led_cfg[4]; | |
5359 | mcp->mb[6] = led_cfg[5]; | |
5360 | } | |
5361 | ||
5362 | mcp->out_mb = MBX_2|MBX_1|MBX_0; | |
5363 | if (IS_QLA8031(ha)) | |
5364 | mcp->out_mb |= MBX_6|MBX_5|MBX_4|MBX_3; | |
5365 | mcp->in_mb = MBX_0; | |
5366 | mcp->tov = 30; | |
5367 | mcp->flags = 0; | |
5368 | ||
5369 | rval = qla2x00_mailbox_command(vha, mcp); | |
5370 | if (rval != QLA_SUCCESS) { | |
5371 | ql_dbg(ql_dbg_mbx, vha, 0x1134, | |
5372 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
5373 | } else { | |
5f28d2d7 SK |
5374 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1135, |
5375 | "Done %s.\n", __func__); | |
6246b8a1 GM |
5376 | } |
5377 | ||
5378 | return rval; | |
5379 | } | |
5380 | ||
5381 | int | |
5382 | qla81xx_get_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg) | |
5383 | { | |
5384 | int rval; | |
5385 | struct qla_hw_data *ha = vha->hw; | |
5386 | mbx_cmd_t mc; | |
5387 | mbx_cmd_t *mcp = &mc; | |
5388 | ||
5389 | if (!IS_QLA81XX(ha) && !IS_QLA8031(ha)) | |
5390 | return QLA_FUNCTION_FAILED; | |
5391 | ||
5f28d2d7 SK |
5392 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1136, |
5393 | "Entered %s.\n", __func__); | |
6246b8a1 GM |
5394 | |
5395 | memset(mcp, 0, sizeof(mbx_cmd_t)); | |
5396 | mcp->mb[0] = MBC_GET_LED_CONFIG; | |
5397 | ||
5398 | mcp->out_mb = MBX_0; | |
5399 | mcp->in_mb = MBX_2|MBX_1|MBX_0; | |
5400 | if (IS_QLA8031(ha)) | |
5401 | mcp->in_mb |= MBX_6|MBX_5|MBX_4|MBX_3; | |
5402 | mcp->tov = 30; | |
5403 | mcp->flags = 0; | |
5404 | ||
5405 | rval = qla2x00_mailbox_command(vha, mcp); | |
5406 | if (rval != QLA_SUCCESS) { | |
5407 | ql_dbg(ql_dbg_mbx, vha, 0x1137, | |
5408 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
5409 | } else { | |
5410 | led_cfg[0] = mcp->mb[1]; | |
5411 | led_cfg[1] = mcp->mb[2]; | |
5412 | if (IS_QLA8031(ha)) { | |
5413 | led_cfg[2] = mcp->mb[3]; | |
5414 | led_cfg[3] = mcp->mb[4]; | |
5415 | led_cfg[4] = mcp->mb[5]; | |
5416 | led_cfg[5] = mcp->mb[6]; | |
5417 | } | |
5f28d2d7 SK |
5418 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1138, |
5419 | "Done %s.\n", __func__); | |
6246b8a1 GM |
5420 | } |
5421 | ||
5422 | return rval; | |
5423 | } | |
5424 | ||
999916dc SK |
5425 | int |
5426 | qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable) | |
5427 | { | |
5428 | int rval; | |
5429 | struct qla_hw_data *ha = vha->hw; | |
5430 | mbx_cmd_t mc; | |
5431 | mbx_cmd_t *mcp = &mc; | |
5432 | ||
7ec0effd | 5433 | if (!IS_P3P_TYPE(ha)) |
999916dc SK |
5434 | return QLA_FUNCTION_FAILED; |
5435 | ||
5f28d2d7 | 5436 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1127, |
999916dc SK |
5437 | "Entered %s.\n", __func__); |
5438 | ||
5439 | memset(mcp, 0, sizeof(mbx_cmd_t)); | |
5440 | mcp->mb[0] = MBC_SET_LED_CONFIG; | |
5441 | if (enable) | |
5442 | mcp->mb[7] = 0xE; | |
5443 | else | |
5444 | mcp->mb[7] = 0xD; | |
5445 | ||
5446 | mcp->out_mb = MBX_7|MBX_0; | |
5447 | mcp->in_mb = MBX_0; | |
6246b8a1 | 5448 | mcp->tov = MBX_TOV_SECONDS; |
999916dc SK |
5449 | mcp->flags = 0; |
5450 | ||
5451 | rval = qla2x00_mailbox_command(vha, mcp); | |
5452 | if (rval != QLA_SUCCESS) { | |
5453 | ql_dbg(ql_dbg_mbx, vha, 0x1128, | |
5454 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
5455 | } else { | |
5f28d2d7 | 5456 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1129, |
999916dc SK |
5457 | "Done %s.\n", __func__); |
5458 | } | |
5459 | ||
5460 | return rval; | |
5461 | } | |
6246b8a1 GM |
5462 | |
5463 | int | |
7d613ac6 | 5464 | qla83xx_wr_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t data) |
6246b8a1 GM |
5465 | { |
5466 | int rval; | |
5467 | struct qla_hw_data *ha = vha->hw; | |
5468 | mbx_cmd_t mc; | |
5469 | mbx_cmd_t *mcp = &mc; | |
5470 | ||
f73cb695 | 5471 | if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) |
6246b8a1 GM |
5472 | return QLA_FUNCTION_FAILED; |
5473 | ||
5f28d2d7 SK |
5474 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1130, |
5475 | "Entered %s.\n", __func__); | |
6246b8a1 GM |
5476 | |
5477 | mcp->mb[0] = MBC_WRITE_REMOTE_REG; | |
5478 | mcp->mb[1] = LSW(reg); | |
5479 | mcp->mb[2] = MSW(reg); | |
5480 | mcp->mb[3] = LSW(data); | |
5481 | mcp->mb[4] = MSW(data); | |
5482 | mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | |
5483 | ||
5484 | mcp->in_mb = MBX_1|MBX_0; | |
5485 | mcp->tov = MBX_TOV_SECONDS; | |
5486 | mcp->flags = 0; | |
5487 | rval = qla2x00_mailbox_command(vha, mcp); | |
5488 | ||
5489 | if (rval != QLA_SUCCESS) { | |
5490 | ql_dbg(ql_dbg_mbx, vha, 0x1131, | |
5491 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
5492 | } else { | |
5f28d2d7 | 5493 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1132, |
6246b8a1 GM |
5494 | "Done %s.\n", __func__); |
5495 | } | |
af11f64d | 5496 | |
6246b8a1 GM |
5497 | return rval; |
5498 | } | |
af11f64d AV |
5499 | |
5500 | int | |
5501 | qla2x00_port_logout(scsi_qla_host_t *vha, struct fc_port *fcport) | |
5502 | { | |
5503 | int rval; | |
5504 | struct qla_hw_data *ha = vha->hw; | |
5505 | mbx_cmd_t mc; | |
5506 | mbx_cmd_t *mcp = &mc; | |
5507 | ||
5508 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { | |
5f28d2d7 | 5509 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113b, |
af11f64d AV |
5510 | "Implicit LOGO Unsupported.\n"); |
5511 | return QLA_FUNCTION_FAILED; | |
5512 | } | |
5513 | ||
5514 | ||
5f28d2d7 SK |
5515 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113c, |
5516 | "Entering %s.\n", __func__); | |
af11f64d AV |
5517 | |
5518 | /* Perform Implicit LOGO. */ | |
5519 | mcp->mb[0] = MBC_PORT_LOGOUT; | |
5520 | mcp->mb[1] = fcport->loop_id; | |
5521 | mcp->mb[10] = BIT_15; | |
5522 | mcp->out_mb = MBX_10|MBX_1|MBX_0; | |
5523 | mcp->in_mb = MBX_0; | |
5524 | mcp->tov = MBX_TOV_SECONDS; | |
5525 | mcp->flags = 0; | |
5526 | rval = qla2x00_mailbox_command(vha, mcp); | |
5527 | if (rval != QLA_SUCCESS) | |
5528 | ql_dbg(ql_dbg_mbx, vha, 0x113d, | |
5529 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
5530 | else | |
5f28d2d7 SK |
5531 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113e, |
5532 | "Done %s.\n", __func__); | |
af11f64d AV |
5533 | |
5534 | return rval; | |
5535 | } | |
5536 | ||
7d613ac6 SV |
5537 | int |
5538 | qla83xx_rd_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t *data) | |
5539 | { | |
5540 | int rval; | |
5541 | mbx_cmd_t mc; | |
5542 | mbx_cmd_t *mcp = &mc; | |
5543 | struct qla_hw_data *ha = vha->hw; | |
5544 | unsigned long retry_max_time = jiffies + (2 * HZ); | |
5545 | ||
f73cb695 | 5546 | if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) |
7d613ac6 SV |
5547 | return QLA_FUNCTION_FAILED; |
5548 | ||
5549 | ql_dbg(ql_dbg_mbx, vha, 0x114b, "Entered %s.\n", __func__); | |
5550 | ||
5551 | retry_rd_reg: | |
5552 | mcp->mb[0] = MBC_READ_REMOTE_REG; | |
5553 | mcp->mb[1] = LSW(reg); | |
5554 | mcp->mb[2] = MSW(reg); | |
5555 | mcp->out_mb = MBX_2|MBX_1|MBX_0; | |
5556 | mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0; | |
5557 | mcp->tov = MBX_TOV_SECONDS; | |
5558 | mcp->flags = 0; | |
5559 | rval = qla2x00_mailbox_command(vha, mcp); | |
5560 | ||
5561 | if (rval != QLA_SUCCESS) { | |
5562 | ql_dbg(ql_dbg_mbx, vha, 0x114c, | |
5563 | "Failed=%x mb[0]=%x mb[1]=%x.\n", | |
5564 | rval, mcp->mb[0], mcp->mb[1]); | |
5565 | } else { | |
5566 | *data = (mcp->mb[3] | (mcp->mb[4] << 16)); | |
5567 | if (*data == QLA8XXX_BAD_VALUE) { | |
5568 | /* | |
5569 | * During soft-reset CAMRAM register reads might | |
5570 | * return 0xbad0bad0. So retry for MAX of 2 sec | |
5571 | * while reading camram registers. | |
5572 | */ | |
5573 | if (time_after(jiffies, retry_max_time)) { | |
5574 | ql_dbg(ql_dbg_mbx, vha, 0x1141, | |
5575 | "Failure to read CAMRAM register. " | |
5576 | "data=0x%x.\n", *data); | |
5577 | return QLA_FUNCTION_FAILED; | |
5578 | } | |
5579 | msleep(100); | |
5580 | goto retry_rd_reg; | |
5581 | } | |
5582 | ql_dbg(ql_dbg_mbx, vha, 0x1142, "Done %s.\n", __func__); | |
5583 | } | |
5584 | ||
5585 | return rval; | |
5586 | } | |
5587 | ||
5588 | int | |
5589 | qla83xx_restart_nic_firmware(scsi_qla_host_t *vha) | |
5590 | { | |
5591 | int rval; | |
5592 | mbx_cmd_t mc; | |
5593 | mbx_cmd_t *mcp = &mc; | |
5594 | struct qla_hw_data *ha = vha->hw; | |
5595 | ||
b20f02e1 | 5596 | if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) |
7d613ac6 SV |
5597 | return QLA_FUNCTION_FAILED; |
5598 | ||
5599 | ql_dbg(ql_dbg_mbx, vha, 0x1143, "Entered %s.\n", __func__); | |
5600 | ||
5601 | mcp->mb[0] = MBC_RESTART_NIC_FIRMWARE; | |
5602 | mcp->out_mb = MBX_0; | |
5603 | mcp->in_mb = MBX_1|MBX_0; | |
5604 | mcp->tov = MBX_TOV_SECONDS; | |
5605 | mcp->flags = 0; | |
5606 | rval = qla2x00_mailbox_command(vha, mcp); | |
5607 | ||
5608 | if (rval != QLA_SUCCESS) { | |
5609 | ql_dbg(ql_dbg_mbx, vha, 0x1144, | |
5610 | "Failed=%x mb[0]=%x mb[1]=%x.\n", | |
5611 | rval, mcp->mb[0], mcp->mb[1]); | |
5612 | ha->isp_ops->fw_dump(vha, 0); | |
5613 | } else { | |
5614 | ql_dbg(ql_dbg_mbx, vha, 0x1145, "Done %s.\n", __func__); | |
5615 | } | |
5616 | ||
5617 | return rval; | |
5618 | } | |
5619 | ||
5620 | int | |
5621 | qla83xx_access_control(scsi_qla_host_t *vha, uint16_t options, | |
5622 | uint32_t start_addr, uint32_t end_addr, uint16_t *sector_size) | |
5623 | { | |
5624 | int rval; | |
5625 | mbx_cmd_t mc; | |
5626 | mbx_cmd_t *mcp = &mc; | |
5627 | uint8_t subcode = (uint8_t)options; | |
5628 | struct qla_hw_data *ha = vha->hw; | |
5629 | ||
5630 | if (!IS_QLA8031(ha)) | |
5631 | return QLA_FUNCTION_FAILED; | |
5632 | ||
5633 | ql_dbg(ql_dbg_mbx, vha, 0x1146, "Entered %s.\n", __func__); | |
5634 | ||
5635 | mcp->mb[0] = MBC_SET_ACCESS_CONTROL; | |
5636 | mcp->mb[1] = options; | |
5637 | mcp->out_mb = MBX_1|MBX_0; | |
5638 | if (subcode & BIT_2) { | |
5639 | mcp->mb[2] = LSW(start_addr); | |
5640 | mcp->mb[3] = MSW(start_addr); | |
5641 | mcp->mb[4] = LSW(end_addr); | |
5642 | mcp->mb[5] = MSW(end_addr); | |
5643 | mcp->out_mb |= MBX_5|MBX_4|MBX_3|MBX_2; | |
5644 | } | |
5645 | mcp->in_mb = MBX_2|MBX_1|MBX_0; | |
5646 | if (!(subcode & (BIT_2 | BIT_5))) | |
5647 | mcp->in_mb |= MBX_4|MBX_3; | |
5648 | mcp->tov = MBX_TOV_SECONDS; | |
5649 | mcp->flags = 0; | |
5650 | rval = qla2x00_mailbox_command(vha, mcp); | |
5651 | ||
5652 | if (rval != QLA_SUCCESS) { | |
5653 | ql_dbg(ql_dbg_mbx, vha, 0x1147, | |
5654 | "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[4]=%x.\n", | |
5655 | rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], | |
5656 | mcp->mb[4]); | |
5657 | ha->isp_ops->fw_dump(vha, 0); | |
5658 | } else { | |
5659 | if (subcode & BIT_5) | |
5660 | *sector_size = mcp->mb[1]; | |
5661 | else if (subcode & (BIT_6 | BIT_7)) { | |
5662 | ql_dbg(ql_dbg_mbx, vha, 0x1148, | |
5663 | "Driver-lock id=%x%x", mcp->mb[4], mcp->mb[3]); | |
5664 | } else if (subcode & (BIT_3 | BIT_4)) { | |
5665 | ql_dbg(ql_dbg_mbx, vha, 0x1149, | |
5666 | "Flash-lock id=%x%x", mcp->mb[4], mcp->mb[3]); | |
5667 | } | |
5668 | ql_dbg(ql_dbg_mbx, vha, 0x114a, "Done %s.\n", __func__); | |
5669 | } | |
5670 | ||
5671 | return rval; | |
5672 | } | |
81178772 SK |
5673 | |
5674 | int | |
5675 | qla2x00_dump_mctp_data(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr, | |
5676 | uint32_t size) | |
5677 | { | |
5678 | int rval; | |
5679 | mbx_cmd_t mc; | |
5680 | mbx_cmd_t *mcp = &mc; | |
5681 | ||
5682 | if (!IS_MCTP_CAPABLE(vha->hw)) | |
5683 | return QLA_FUNCTION_FAILED; | |
5684 | ||
5685 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114f, | |
5686 | "Entered %s.\n", __func__); | |
5687 | ||
5688 | mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED; | |
5689 | mcp->mb[1] = LSW(addr); | |
5690 | mcp->mb[2] = MSW(req_dma); | |
5691 | mcp->mb[3] = LSW(req_dma); | |
5692 | mcp->mb[4] = MSW(size); | |
5693 | mcp->mb[5] = LSW(size); | |
5694 | mcp->mb[6] = MSW(MSD(req_dma)); | |
5695 | mcp->mb[7] = LSW(MSD(req_dma)); | |
5696 | mcp->mb[8] = MSW(addr); | |
5697 | /* Setting RAM ID to valid */ | |
5698 | mcp->mb[10] |= BIT_7; | |
5699 | /* For MCTP RAM ID is 0x40 */ | |
5700 | mcp->mb[10] |= 0x40; | |
5701 | ||
5702 | mcp->out_mb |= MBX_10|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1| | |
5703 | MBX_0; | |
5704 | ||
5705 | mcp->in_mb = MBX_0; | |
5706 | mcp->tov = MBX_TOV_SECONDS; | |
5707 | mcp->flags = 0; | |
5708 | rval = qla2x00_mailbox_command(vha, mcp); | |
5709 | ||
5710 | if (rval != QLA_SUCCESS) { | |
5711 | ql_dbg(ql_dbg_mbx, vha, 0x114e, | |
5712 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); | |
5713 | } else { | |
5714 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114d, | |
5715 | "Done %s.\n", __func__); | |
5716 | } | |
5717 | ||
5718 | return rval; | |
5719 | } |