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[SCSI] qla2xxx: Correct PRLI failure response code handling.
[mirror_ubuntu-bionic-kernel.git] / drivers / scsi / qla2xxx / qla_os.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
de7c5d05 3 * Copyright (c) 2003-2010 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
8
9#include <linux/moduleparam.h>
10#include <linux/vmalloc.h>
1da177e4 11#include <linux/delay.h>
39a11240 12#include <linux/kthread.h>
e1e82b6f 13#include <linux/mutex.h>
3420d36c 14#include <linux/kobject.h>
5a0e3ad6 15#include <linux/slab.h>
1da177e4
LT		 16
17#include <scsi/scsi_tcq.h>
18#include <scsi/scsicam.h>
19#include <scsi/scsi_transport.h>
20#include <scsi/scsi_transport_fc.h>
21
22/*
23 * Driver version
24 */
25char qla2x00_version_str[40];
26
6a03b4cd
HZ		 27static int apidev_major;
28
1da177e4
LT		 29/*
30 * SRB allocation cache
31 */
e18b890b 32static struct kmem_cache *srb_cachep;
1da177e4 33
a9083016
GM		 34/*
35 * CT6 CTX allocation cache
36 */
37static struct kmem_cache *ctx_cachep;
38
1da177e4
LT		 39int ql2xlogintimeout = 20;
40module_param(ql2xlogintimeout, int, S_IRUGO|S_IRUSR);
41MODULE_PARM_DESC(ql2xlogintimeout,
42 "Login timeout value in seconds.");
43
a7b61842 44int qlport_down_retry;
1da177e4
LT		 45module_param(qlport_down_retry, int, S_IRUGO|S_IRUSR);
46MODULE_PARM_DESC(qlport_down_retry,
900d9f98 47 "Maximum number of command retries to a port that returns "
1da177e4
LT		 48 "a PORT-DOWN status.");
49
1da177e4
LT		 50int ql2xplogiabsentdevice;
51module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
52MODULE_PARM_DESC(ql2xplogiabsentdevice,
53 "Option to enable PLOGI to devices that are not present after "
900d9f98 54 "a Fabric scan. This is needed for several broken switches. "
1da177e4
LT		 55 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
56
1da177e4
LT		 57int ql2xloginretrycount = 0;
58module_param(ql2xloginretrycount, int, S_IRUGO|S_IRUSR);
59MODULE_PARM_DESC(ql2xloginretrycount,
60 "Specify an alternate value for the NVRAM login retry count.");
61
a7a167bf
AV		 62int ql2xallocfwdump = 1;
63module_param(ql2xallocfwdump, int, S_IRUGO|S_IRUSR);
64MODULE_PARM_DESC(ql2xallocfwdump,
65 "Option to enable allocation of memory for a firmware dump "
66 "during HBA initialization. Memory allocation requirements "
67 "vary by ISP type. Default is 1 - allocate memory.");
68
11010fec 69int ql2xextended_error_logging;
27d94035 70module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
11010fec 71MODULE_PARM_DESC(ql2xextended_error_logging,
0181944f
AV		 72 "Option to enable extended error logging, "
73 "Default is 0 - no logging. 1 - log errors.");
74
a9083016
GM		 75int ql2xshiftctondsd = 6;
76module_param(ql2xshiftctondsd, int, S_IRUGO|S_IRUSR);
77MODULE_PARM_DESC(ql2xshiftctondsd,
78 "Set to control shifting of command type processing "
79 "based on total number of SG elements.");
80
1da177e4
LT		 81static void qla2x00_free_device(scsi_qla_host_t *);
82
7e47e5ca 83int ql2xfdmienable=1;
cca5335c
AV		 84module_param(ql2xfdmienable, int, S_IRUGO|S_IRUSR);
85MODULE_PARM_DESC(ql2xfdmienable,
7794a5af
FW		 86 "Enables FDMI registrations. "
87 "0 - no FDMI. Default is 1 - perform FDMI.");
cca5335c 88
df7baa50
AV		 89#define MAX_Q_DEPTH 32
90static int ql2xmaxqdepth = MAX_Q_DEPTH;
91module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
92MODULE_PARM_DESC(ql2xmaxqdepth,
93 "Maximum queue depth to report for target devices.");
94
bad75002
AE		 95/* Do not change the value of this after module load */
96int ql2xenabledif = 1;
97module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR);
98MODULE_PARM_DESC(ql2xenabledif,
99 " Enable T10-CRC-DIF "
100 " Default is 0 - No DIF Support. 1 - Enable it");
101
102int ql2xenablehba_err_chk;
103module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
104MODULE_PARM_DESC(ql2xenablehba_err_chk,
105 " Enable T10-CRC-DIF Error isolation by HBA"
106 " Default is 0 - Error isolation disabled, 1 - Enable it");
107
e5896bd5
AV		 108int ql2xiidmaenable=1;
109module_param(ql2xiidmaenable, int, S_IRUGO|S_IRUSR);
110MODULE_PARM_DESC(ql2xiidmaenable,
111 "Enables iIDMA settings "
112 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
113
73208dfd
AC		 114int ql2xmaxqueues = 1;
115module_param(ql2xmaxqueues, int, S_IRUGO|S_IRUSR);
116MODULE_PARM_DESC(ql2xmaxqueues,
117 "Enables MQ settings "
ae68230c
JP		 118 "Default is 1 for single queue. Set it to number "
119 "of queues in MQ mode.");
68ca949c
AC		 120
121int ql2xmultique_tag;
122module_param(ql2xmultique_tag, int, S_IRUGO|S_IRUSR);
123MODULE_PARM_DESC(ql2xmultique_tag,
124 "Enables CPU affinity settings for the driver "
125 "Default is 0 for no affinity of request and response IO. "
126 "Set it to 1 to turn on the cpu affinity.");
e337d907
AV		 127
128int ql2xfwloadbin;
129module_param(ql2xfwloadbin, int, S_IRUGO|S_IRUSR);
130MODULE_PARM_DESC(ql2xfwloadbin,
131 "Option to specify location from which to load ISP firmware:\n"
132 " 2 -- load firmware via the request_firmware() (hotplug)\n"
133 " interface.\n"
134 " 1 -- load firmware from flash.\n"
135 " 0 -- use default semantics.\n");
136
ae97c91e
AV		 137int ql2xetsenable;
138module_param(ql2xetsenable, int, S_IRUGO|S_IRUSR);
139MODULE_PARM_DESC(ql2xetsenable,
140 "Enables firmware ETS burst."
141 "Default is 0 - skip ETS enablement.");
142
6907869d 143int ql2xdbwr = 1;
a9083016
GM		 144module_param(ql2xdbwr, int, S_IRUGO|S_IRUSR);
145MODULE_PARM_DESC(ql2xdbwr,
146 "Option to specify scheme for request queue posting\n"
147 " 0 -- Regular doorbell.\n"
148 " 1 -- CAMRAM doorbell (faster).\n");
149
150int ql2xdontresethba;
151module_param(ql2xdontresethba, int, S_IRUGO|S_IRUSR);
152MODULE_PARM_DESC(ql2xdontresethba,
153 "Option to specify reset behaviour\n"
154 " 0 (Default) -- Reset on failure.\n"
155 " 1 -- Do not reset on failure.\n");
156
f4c496c1
GM		 157int ql2xtargetreset = 1;
158module_param(ql2xtargetreset, int, S_IRUGO|S_IRUSR);
159MODULE_PARM_DESC(ql2xtargetreset,
160 "Enable target reset."
161 "Default is 1 - use hw defaults.");
162
4da26e16
CD		 163int ql2xgffidenable;
164module_param(ql2xgffidenable, int, S_IRUGO|S_IRUSR);
165MODULE_PARM_DESC(ql2xgffidenable,
166 "Enables GFF_ID checks of port type. "
167 "Default is 0 - Do not use GFF_ID information.");
a9083016 168
3822263e
MI		 169int ql2xasynctmfenable;
170module_param(ql2xasynctmfenable, int, S_IRUGO|S_IRUSR);
171MODULE_PARM_DESC(ql2xasynctmfenable,
172 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
173 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
1da177e4 174/*
fa2a1ce5 175 * SCSI host template entry points
1da177e4
LT		 176 */
177static int qla2xxx_slave_configure(struct scsi_device * device);
f4f051eb 178static int qla2xxx_slave_alloc(struct scsi_device *);
1e99e33a
AV		 179static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
180static void qla2xxx_scan_start(struct Scsi_Host *);
f4f051eb 181static void qla2xxx_slave_destroy(struct scsi_device *);
a5326f86 182static int qla2xxx_queuecommand(struct scsi_cmnd *cmd,
fca29703 183 void (*fn)(struct scsi_cmnd *));
1da177e4
LT		 184static int qla2xxx_eh_abort(struct scsi_cmnd *);
185static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
523ec773 186static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
1da177e4
LT		 187static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
188static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
1da177e4 189
e881a172 190static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
ce7e4af7
AV		 191static int qla2x00_change_queue_type(struct scsi_device *, int);
192
a5326f86 193struct scsi_host_template qla2xxx_driver_template = {
1da177e4 194 .module = THIS_MODULE,
cb63067a 195 .name = QLA2XXX_DRIVER_NAME,
a5326f86 196 .queuecommand = qla2xxx_queuecommand,
fca29703
AV		 197
198 .eh_abort_handler = qla2xxx_eh_abort,
199 .eh_device_reset_handler = qla2xxx_eh_device_reset,
523ec773 200 .eh_target_reset_handler = qla2xxx_eh_target_reset,
fca29703
AV		 201 .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
202 .eh_host_reset_handler = qla2xxx_eh_host_reset,
203
204 .slave_configure = qla2xxx_slave_configure,
205
206 .slave_alloc = qla2xxx_slave_alloc,
207 .slave_destroy = qla2xxx_slave_destroy,
ed677086
AV		 208 .scan_finished = qla2xxx_scan_finished,
209 .scan_start = qla2xxx_scan_start,
ce7e4af7
AV		 210 .change_queue_depth = qla2x00_change_queue_depth,
211 .change_queue_type = qla2x00_change_queue_type,
fca29703
AV		 212 .this_id = -1,
213 .cmd_per_lun = 3,
214 .use_clustering = ENABLE_CLUSTERING,
215 .sg_tablesize = SG_ALL,
216
217 .max_sectors = 0xFFFF,
afb046e2 218 .shost_attrs = qla2x00_host_attrs,
fca29703
AV		 219};
220
1da177e4 221static struct scsi_transport_template *qla2xxx_transport_template = NULL;
2c3dfe3f 222struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
1da177e4 223
1da177e4
LT		 224/* TODO Convert to inlines
225 *
226 * Timer routines
227 */
1da177e4 228
2c3dfe3f 229__inline__ void
e315cd28 230qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
1da177e4 231{
e315cd28
AC		 232 init_timer(&vha->timer);
233 vha->timer.expires = jiffies + interval * HZ;
234 vha->timer.data = (unsigned long)vha;
235 vha->timer.function = (void (*)(unsigned long))func;
236 add_timer(&vha->timer);
237 vha->timer_active = 1;
1da177e4
LT		 238}
239
240static inline void
e315cd28 241qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
1da177e4 242{
a9083016
GM		 243 /* Currently used for 82XX only. */
244 if (vha->device_flags & DFLG_DEV_FAILED)
245 return;
246
e315cd28 247 mod_timer(&vha->timer, jiffies + interval * HZ);
1da177e4
LT		 248}
249
a824ebb3 250static __inline__ void
e315cd28 251qla2x00_stop_timer(scsi_qla_host_t *vha)
1da177e4 252{
e315cd28
AC		 253 del_timer_sync(&vha->timer);
254 vha->timer_active = 0;
1da177e4
LT		 255}
256
1da177e4
LT		 257static int qla2x00_do_dpc(void *data);
258
259static void qla2x00_rst_aen(scsi_qla_host_t *);
260
73208dfd
AC		 261static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
262 struct req_que **, struct rsp_que **);
e30d1756 263static void qla2x00_free_fw_dump(struct qla_hw_data *);
e315cd28
AC		 264static void qla2x00_mem_free(struct qla_hw_data *);
265static void qla2x00_sp_free_dma(srb_t *);
1da177e4 266
1da177e4 267/* -------------------------------------------------------------------------- */
73208dfd
AC		 268static int qla2x00_alloc_queues(struct qla_hw_data *ha)
269{
2afa19a9 270 ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
73208dfd
AC		 271 GFP_KERNEL);
272 if (!ha->req_q_map) {
273 qla_printk(KERN_WARNING, ha,
274 "Unable to allocate memory for request queue ptrs\n");
275 goto fail_req_map;
276 }
277
2afa19a9 278 ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
73208dfd
AC		 279 GFP_KERNEL);
280 if (!ha->rsp_q_map) {
281 qla_printk(KERN_WARNING, ha,
282 "Unable to allocate memory for response queue ptrs\n");
283 goto fail_rsp_map;
284 }
285 set_bit(0, ha->rsp_qid_map);
286 set_bit(0, ha->req_qid_map);
287 return 1;
288
289fail_rsp_map:
290 kfree(ha->req_q_map);
291 ha->req_q_map = NULL;
292fail_req_map:
293 return -ENOMEM;
294}
295
2afa19a9 296static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
73208dfd 297{
73208dfd
AC		 298 if (req && req->ring)
299 dma_free_coherent(&ha->pdev->dev,
300 (req->length + 1) * sizeof(request_t),
301 req->ring, req->dma);
302
303 kfree(req);
304 req = NULL;
305}
306
2afa19a9
AC		 307static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
308{
309 if (rsp && rsp->ring)
310 dma_free_coherent(&ha->pdev->dev,
311 (rsp->length + 1) * sizeof(response_t),
312 rsp->ring, rsp->dma);
313
314 kfree(rsp);
315 rsp = NULL;
316}
317
73208dfd
AC		 318static void qla2x00_free_queues(struct qla_hw_data *ha)
319{
320 struct req_que *req;
321 struct rsp_que *rsp;
322 int cnt;
323
2afa19a9 324 for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
73208dfd 325 req = ha->req_q_map[cnt];
2afa19a9 326 qla2x00_free_req_que(ha, req);
73208dfd 327 }
73208dfd
AC		 328 kfree(ha->req_q_map);
329 ha->req_q_map = NULL;
2afa19a9
AC		 330
331 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
332 rsp = ha->rsp_q_map[cnt];
333 qla2x00_free_rsp_que(ha, rsp);
334 }
335 kfree(ha->rsp_q_map);
336 ha->rsp_q_map = NULL;
73208dfd
AC		 337}
338
68ca949c
AC		 339static int qla25xx_setup_mode(struct scsi_qla_host *vha)
340{
341 uint16_t options = 0;
342 int ques, req, ret;
343 struct qla_hw_data *ha = vha->hw;
344
7163ea81
AC		 345 if (!(ha->fw_attributes & BIT_6)) {
346 qla_printk(KERN_INFO, ha,
347 "Firmware is not multi-queue capable\n");
348 goto fail;
349 }
68ca949c 350 if (ql2xmultique_tag) {
68ca949c
AC		 351 /* create a request queue for IO */
352 options |= BIT_7;
353 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
354 QLA_DEFAULT_QUE_QOS);
355 if (!req) {
356 qla_printk(KERN_WARNING, ha,
357 "Can't create request queue\n");
358 goto fail;
359 }
7163ea81 360 ha->wq = create_workqueue("qla2xxx_wq");
68ca949c
AC		 361 vha->req = ha->req_q_map[req];
362 options |= BIT_1;
363 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
364 ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
365 if (!ret) {
366 qla_printk(KERN_WARNING, ha,
367 "Response Queue create failed\n");
368 goto fail2;
369 }
370 }
7163ea81
AC		 371 ha->flags.cpu_affinity_enabled = 1;
372
68ca949c
AC		 373 DEBUG2(qla_printk(KERN_INFO, ha,
374 "CPU affinity mode enabled, no. of response"
375 " queues:%d, no. of request queues:%d\n",
376 ha->max_rsp_queues, ha->max_req_queues));
377 }
378 return 0;
379fail2:
380 qla25xx_delete_queues(vha);
7163ea81
AC		 381 destroy_workqueue(ha->wq);
382 ha->wq = NULL;
68ca949c
AC		 383fail:
384 ha->mqenable = 0;
7163ea81
AC		 385 kfree(ha->req_q_map);
386 kfree(ha->rsp_q_map);
387 ha->max_req_queues = ha->max_rsp_queues = 1;
68ca949c
AC		 388 return 1;
389}
390
1da177e4 391static char *
e315cd28 392qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
1da177e4 393{
e315cd28 394 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 395 static char *pci_bus_modes[] = {
396 "33", "66", "100", "133",
397 };
398 uint16_t pci_bus;
399
400 strcpy(str, "PCI");
401 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
402 if (pci_bus) {
403 strcat(str, "-X (");
404 strcat(str, pci_bus_modes[pci_bus]);
405 } else {
406 pci_bus = (ha->pci_attr & BIT_8) >> 8;
407 strcat(str, " (");
408 strcat(str, pci_bus_modes[pci_bus]);
409 }
410 strcat(str, " MHz)");
411
412 return (str);
413}
414
fca29703 415static char *
e315cd28 416qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
fca29703
AV		 417{
418 static char *pci_bus_modes[] = { "33", "66", "100", "133", };
e315cd28 419 struct qla_hw_data *ha = vha->hw;
fca29703
AV		 420 uint32_t pci_bus;
421 int pcie_reg;
422
423 pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
424 if (pcie_reg) {
425 char lwstr[6];
426 uint16_t pcie_lstat, lspeed, lwidth;
427
428 pcie_reg += 0x12;
429 pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
430 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
431 lwidth = (pcie_lstat &
432 (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
433
434 strcpy(str, "PCIe (");
435 if (lspeed == 1)
c87a0d8c 436 strcat(str, "2.5GT/s ");
c3a2f0df 437 else if (lspeed == 2)
c87a0d8c 438 strcat(str, "5.0GT/s ");
fca29703
AV		 439 else
440 strcat(str, "<unknown> ");
441 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
442 strcat(str, lwstr);
443
444 return str;
445 }
446
447 strcpy(str, "PCI");
448 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
449 if (pci_bus == 0 || pci_bus == 8) {
450 strcat(str, " (");
451 strcat(str, pci_bus_modes[pci_bus >> 3]);
452 } else {
453 strcat(str, "-X ");
454 if (pci_bus & BIT_2)
455 strcat(str, "Mode 2");
456 else
457 strcat(str, "Mode 1");
458 strcat(str, " (");
459 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
460 }
461 strcat(str, " MHz)");
462
463 return str;
464}
465
e5f82ab8 466static char *
e315cd28 467qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
1da177e4
LT		 468{
469 char un_str[10];
e315cd28 470 struct qla_hw_data *ha = vha->hw;
fa2a1ce5 471
1da177e4
LT		 472 sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
473 ha->fw_minor_version,
474 ha->fw_subminor_version);
475
476 if (ha->fw_attributes & BIT_9) {
477 strcat(str, "FLX");
478 return (str);
479 }
480
481 switch (ha->fw_attributes & 0xFF) {
482 case 0x7:
483 strcat(str, "EF");
484 break;
485 case 0x17:
486 strcat(str, "TP");
487 break;
488 case 0x37:
489 strcat(str, "IP");
490 break;
491 case 0x77:
492 strcat(str, "VI");
493 break;
494 default:
495 sprintf(un_str, "(%x)", ha->fw_attributes);
496 strcat(str, un_str);
497 break;
498 }
499 if (ha->fw_attributes & 0x100)
500 strcat(str, "X");
501
502 return (str);
503}
504
e5f82ab8 505static char *
e315cd28 506qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
fca29703 507{
e315cd28 508 struct qla_hw_data *ha = vha->hw;
f0883ac6 509
3a03eb79
AV		 510 sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
511 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
fca29703 512 return str;
fca29703
AV		 513}
514
515static inline srb_t *
e315cd28 516qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport,
fca29703
AV		 517 struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
518{
519 srb_t *sp;
e315cd28 520 struct qla_hw_data *ha = vha->hw;
fca29703
AV		 521
522 sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC);
523 if (!sp)
524 return sp;
525
083a469d 526 atomic_set(&sp->ref_count, 1);
fca29703
AV		 527 sp->fcport = fcport;
528 sp->cmd = cmd;
529 sp->flags = 0;
530 CMD_SP(cmd) = (void *)sp;
531 cmd->scsi_done = done;
cf53b069 532 sp->ctx = NULL;
fca29703
AV		 533
534 return sp;
535}
536
1da177e4 537static int
a5326f86 538qla2xxx_queuecommand(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
fca29703 539{
e315cd28 540 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
fca29703 541 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
19a7b4ae 542 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
e315cd28
AC		 543 struct qla_hw_data *ha = vha->hw;
544 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
fca29703
AV		 545 srb_t *sp;
546 int rval;
547
85880801
AV		 548 if (ha->flags.eeh_busy) {
549 if (ha->flags.pci_channel_io_perm_failure)
b9b12f73 550 cmd->result = DID_NO_CONNECT << 16;
85880801
AV		 551 else
552 cmd->result = DID_REQUEUE << 16;
14e660e6
SJ		 553 goto qc24_fail_command;
554 }
555
19a7b4ae
JSEC		 556 rval = fc_remote_port_chkready(rport);
557 if (rval) {
558 cmd->result = rval;
fca29703
AV		 559 goto qc24_fail_command;
560 }
561
387f96b4 562 /* Close window on fcport/rport state-transitioning. */
7b594131
MC		 563 if (fcport->drport)
564 goto qc24_target_busy;
387f96b4 565
bad75002
AE		 566 if (!vha->flags.difdix_supported &&
567 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
568 DEBUG2(qla_printk(KERN_ERR, ha,
569 "DIF Cap Not Reg, fail DIF capable cmd's:%x\n",
570 cmd->cmnd[0]));
571 cmd->result = DID_NO_CONNECT << 16;
572 goto qc24_fail_command;
573 }
fca29703
AV		 574 if (atomic_read(&fcport->state) != FCS_ONLINE) {
575 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
e315cd28 576 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
fca29703
AV		 577 cmd->result = DID_NO_CONNECT << 16;
578 goto qc24_fail_command;
579 }
7b594131 580 goto qc24_target_busy;
fca29703
AV		 581 }
582
e315cd28 583 spin_unlock_irq(vha->host->host_lock);
fca29703 584
e315cd28 585 sp = qla2x00_get_new_sp(base_vha, fcport, cmd, done);
fca29703
AV		 586 if (!sp)
587 goto qc24_host_busy_lock;
588
e315cd28 589 rval = ha->isp_ops->start_scsi(sp);
fca29703
AV		 590 if (rval != QLA_SUCCESS)
591 goto qc24_host_busy_free_sp;
592
e315cd28 593 spin_lock_irq(vha->host->host_lock);
fca29703
AV		 594
595 return 0;
596
597qc24_host_busy_free_sp:
e315cd28
AC		 598 qla2x00_sp_free_dma(sp);
599 mempool_free(sp, ha->srb_mempool);
fca29703
AV		 600
601qc24_host_busy_lock:
e315cd28 602 spin_lock_irq(vha->host->host_lock);
fca29703
AV		 603 return SCSI_MLQUEUE_HOST_BUSY;
604
7b594131
MC		 605qc24_target_busy:
606 return SCSI_MLQUEUE_TARGET_BUSY;
607
fca29703
AV		 608qc24_fail_command:
609 done(cmd);
610
611 return 0;
612}
613
614
1da177e4
LT		 615/*
616 * qla2x00_eh_wait_on_command
617 * Waits for the command to be returned by the Firmware for some
618 * max time.
619 *
620 * Input:
1da177e4 621 * cmd = Scsi Command to wait on.
1da177e4
LT		 622 *
623 * Return:
624 * Not Found : 0
625 * Found : 1
626 */
627static int
e315cd28 628qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1da177e4 629{
fe74c71f
AV		 630#define ABORT_POLLING_PERIOD 1000
631#define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
f4f051eb 632 unsigned long wait_iter = ABORT_WAIT_ITER;
85880801
AV		 633 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
634 struct qla_hw_data *ha = vha->hw;
f4f051eb 635 int ret = QLA_SUCCESS;
1da177e4 636
85880801
AV		 637 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
638 DEBUG17(qla_printk(KERN_WARNING, ha, "return:eh_wait\n"));
639 return ret;
640 }
641
d970432c 642 while (CMD_SP(cmd) && wait_iter--) {
fe74c71f 643 msleep(ABORT_POLLING_PERIOD);
f4f051eb
AV		 644 }
645 if (CMD_SP(cmd))
646 ret = QLA_FUNCTION_FAILED;
1da177e4 647
f4f051eb 648 return ret;
1da177e4
LT		 649}
650
651/*
652 * qla2x00_wait_for_hba_online
fa2a1ce5 653 * Wait till the HBA is online after going through
1da177e4
LT		 654 * <= MAX_RETRIES_OF_ISP_ABORT or
655 * finally HBA is disabled ie marked offline
656 *
657 * Input:
658 * ha - pointer to host adapter structure
fa2a1ce5
AV		 659 *
660 * Note:
1da177e4
LT		 661 * Does context switching-Release SPIN_LOCK
662 * (if any) before calling this routine.
663 *
664 * Return:
665 * Success (Adapter is online) : 0
666 * Failed (Adapter is offline/disabled) : 1
667 */
854165f4 668int
e315cd28 669qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1da177e4 670{
fca29703
AV		 671 int return_status;
672 unsigned long wait_online;
e315cd28
AC		 673 struct qla_hw_data *ha = vha->hw;
674 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4 675
fa2a1ce5 676 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
e315cd28
AC		 677 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
678 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
679 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
680 ha->dpc_active) && time_before(jiffies, wait_online)) {
1da177e4
LT		 681
682 msleep(1000);
683 }
e315cd28 684 if (base_vha->flags.online)
fa2a1ce5 685 return_status = QLA_SUCCESS;
1da177e4
LT		 686 else
687 return_status = QLA_FUNCTION_FAILED;
688
1da177e4
LT		 689 return (return_status);
690}
691
86fbee86
LC		 692/*
693 * qla2x00_wait_for_reset_ready
694 * Wait till the HBA is online after going through
695 * <= MAX_RETRIES_OF_ISP_ABORT or
696 * finally HBA is disabled ie marked offline or flash
697 * operations are in progress.
698 *
699 * Input:
700 * ha - pointer to host adapter structure
701 *
702 * Note:
703 * Does context switching-Release SPIN_LOCK
704 * (if any) before calling this routine.
705 *
706 * Return:
707 * Success (Adapter is online/no flash ops) : 0
708 * Failed (Adapter is offline/disabled/flash ops in progress) : 1
709 */
3dbe756a 710static int
86fbee86
LC		 711qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
712{
713 int return_status;
714 unsigned long wait_online;
715 struct qla_hw_data *ha = vha->hw;
716 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
717
718 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
719 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
720 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
721 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
722 ha->optrom_state != QLA_SWAITING ||
723 ha->dpc_active) && time_before(jiffies, wait_online))
724 msleep(1000);
725
726 if (base_vha->flags.online && ha->optrom_state == QLA_SWAITING)
727 return_status = QLA_SUCCESS;
728 else
729 return_status = QLA_FUNCTION_FAILED;
730
731 DEBUG2(printk("%s return_status=%d\n", __func__, return_status));
732
733 return return_status;
734}
735
2533cf67
LC		 736int
737qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
738{
739 int return_status;
740 unsigned long wait_reset;
741 struct qla_hw_data *ha = vha->hw;
742 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
743
744 wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
745 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
746 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
747 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
748 ha->dpc_active) && time_before(jiffies, wait_reset)) {
749
750 msleep(1000);
751
752 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
753 ha->flags.chip_reset_done)
754 break;
755 }
756 if (ha->flags.chip_reset_done)
757 return_status = QLA_SUCCESS;
758 else
759 return_status = QLA_FUNCTION_FAILED;
760
761 return return_status;
762}
763
1da177e4
LT		 764/*
765 * qla2x00_wait_for_loop_ready
766 * Wait for MAX_LOOP_TIMEOUT(5 min) value for loop
fa2a1ce5 767 * to be in LOOP_READY state.
1da177e4
LT		 768 * Input:
769 * ha - pointer to host adapter structure
fa2a1ce5
AV		 770 *
771 * Note:
1da177e4
LT		 772 * Does context switching-Release SPIN_LOCK
773 * (if any) before calling this routine.
fa2a1ce5 774 *
1da177e4
LT		 775 *
776 * Return:
777 * Success (LOOP_READY) : 0
778 * Failed (LOOP_NOT_READY) : 1
779 */
fa2a1ce5 780static inline int
e315cd28 781qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha)
1da177e4
LT		 782{
783 int return_status = QLA_SUCCESS;
784 unsigned long loop_timeout ;
e315cd28
AC		 785 struct qla_hw_data *ha = vha->hw;
786 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4
LT		 787
788 /* wait for 5 min at the max for loop to be ready */
fa2a1ce5 789 loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1da177e4 790
e315cd28
AC		 791 while ((!atomic_read(&base_vha->loop_down_timer) &&
792 atomic_read(&base_vha->loop_state) == LOOP_DOWN) ||
793 atomic_read(&base_vha->loop_state) != LOOP_READY) {
794 if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
57680080
RA		 795 return_status = QLA_FUNCTION_FAILED;
796 break;
797 }
1da177e4
LT		 798 msleep(1000);
799 if (time_after_eq(jiffies, loop_timeout)) {
800 return_status = QLA_FUNCTION_FAILED;
801 break;
802 }
803 }
fa2a1ce5 804 return (return_status);
1da177e4
LT		 805}
806
083a469d
GM		 807static void
808sp_get(struct srb *sp)
809{
810 atomic_inc(&sp->ref_count);
811}
812
1da177e4
LT		 813/**************************************************************************
814* qla2xxx_eh_abort
815*
816* Description:
817* The abort function will abort the specified command.
818*
819* Input:
820* cmd = Linux SCSI command packet to be aborted.
821*
822* Returns:
823* Either SUCCESS or FAILED.
824*
825* Note:
2ea00202 826* Only return FAILED if command not returned by firmware.
1da177e4 827**************************************************************************/
e5f82ab8 828static int
1da177e4
LT		 829qla2xxx_eh_abort(struct scsi_cmnd *cmd)
830{
e315cd28 831 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
f4f051eb 832 srb_t *sp;
170babc3 833 int ret;
f4f051eb 834 unsigned int id, lun;
18e144d3 835 unsigned long flags;
2ea00202 836 int wait = 0;
e315cd28 837 struct qla_hw_data *ha = vha->hw;
1da177e4 838
65d430fa 839 fc_block_scsi_eh(cmd);
07db5183 840
f4f051eb 841 if (!CMD_SP(cmd))
2ea00202 842 return SUCCESS;
1da177e4 843
f4f051eb
AV		 844 id = cmd->device->id;
845 lun = cmd->device->lun;
1da177e4 846
e315cd28 847 spin_lock_irqsave(&ha->hardware_lock, flags);
170babc3
MC		 848 sp = (srb_t *) CMD_SP(cmd);
849 if (!sp) {
850 spin_unlock_irqrestore(&ha->hardware_lock, flags);
851 return SUCCESS;
852 }
1da177e4 853
170babc3
MC		 854 DEBUG2(printk("%s(%ld): aborting sp %p from RISC.",
855 __func__, vha->host_no, sp));
17d98630 856
170babc3
MC		 857 /* Get a reference to the sp and drop the lock.*/
858 sp_get(sp);
083a469d 859
e315cd28 860 spin_unlock_irqrestore(&ha->hardware_lock, flags);
170babc3
MC		 861 if (ha->isp_ops->abort_command(sp)) {
862 DEBUG2(printk("%s(%ld): abort_command "
863 "mbx failed.\n", __func__, vha->host_no));
864 ret = FAILED;
865 } else {
866 DEBUG3(printk("%s(%ld): abort_command "
867 "mbx success.\n", __func__, vha->host_no));
868 wait = 1;
869 }
870 qla2x00_sp_compl(ha, sp);
1da177e4 871
f4f051eb 872 /* Wait for the command to be returned. */
2ea00202 873 if (wait) {
e315cd28 874 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
fa2a1ce5 875 qla_printk(KERN_ERR, ha,
09d1dc2a
MI		 876 "scsi(%ld:%d:%d): Abort handler timed out -- %x.\n",
877 vha->host_no, id, lun, ret);
2ea00202 878 ret = FAILED;
f4f051eb 879 }
1da177e4 880 }
1da177e4 881
fa2a1ce5 882 qla_printk(KERN_INFO, ha,
09d1dc2a
MI		 883 "scsi(%ld:%d:%d): Abort command issued -- %d %x.\n",
884 vha->host_no, id, lun, wait, ret);
1da177e4 885
f4f051eb
AV		 886 return ret;
887}
1da177e4 888
4d78c973 889int
e315cd28 890qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
4d78c973 891 unsigned int l, enum nexus_wait_type type)
f4f051eb 892{
17d98630 893 int cnt, match, status;
18e144d3 894 unsigned long flags;
e315cd28 895 struct qla_hw_data *ha = vha->hw;
73208dfd 896 struct req_que *req;
4d78c973 897 srb_t *sp;
1da177e4 898
523ec773 899 status = QLA_SUCCESS;
17d98630 900
e315cd28 901 spin_lock_irqsave(&ha->hardware_lock, flags);
67c2e93a 902 req = vha->req;
17d98630
AC		 903 for (cnt = 1; status == QLA_SUCCESS &&
904 cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
905 sp = req->outstanding_cmds[cnt];
906 if (!sp)
523ec773 907 continue;
bad75002 908 if ((sp->ctx) && !IS_PROT_IO(sp))
cf53b069 909 continue;
17d98630
AC		 910 if (vha->vp_idx != sp->fcport->vha->vp_idx)
911 continue;
912 match = 0;
913 switch (type) {
914 case WAIT_HOST:
915 match = 1;
916 break;
917 case WAIT_TARGET:
918 match = sp->cmd->device->id == t;
919 break;
920 case WAIT_LUN:
921 match = (sp->cmd->device->id == t &&
922 sp->cmd->device->lun == l);
923 break;
73208dfd 924 }
17d98630
AC		 925 if (!match)
926 continue;
927
928 spin_unlock_irqrestore(&ha->hardware_lock, flags);
929 status = qla2x00_eh_wait_on_command(sp->cmd);
930 spin_lock_irqsave(&ha->hardware_lock, flags);
1da177e4 931 }
e315cd28 932 spin_unlock_irqrestore(&ha->hardware_lock, flags);
523ec773
AV		 933
934 return status;
1da177e4
LT		 935}
936
523ec773
AV		 937static char *reset_errors[] = {
938 "HBA not online",
939 "HBA not ready",
940 "Task management failed",
941 "Waiting for command completions",
942};
1da177e4 943
e5f82ab8 944static int
523ec773 945__qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
2afa19a9 946 struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
1da177e4 947{
e315cd28 948 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 949 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
523ec773 950 int err;
1da177e4 951
65d430fa 952 fc_block_scsi_eh(cmd);
07db5183 953
b0328bee 954 if (!fcport)
523ec773 955 return FAILED;
1da177e4 956
e315cd28
AC		 957 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET ISSUED.\n",
958 vha->host_no, cmd->device->id, cmd->device->lun, name);
1da177e4 959
523ec773 960 err = 0;
e315cd28 961 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
523ec773
AV		 962 goto eh_reset_failed;
963 err = 1;
e315cd28 964 if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS)
523ec773
AV		 965 goto eh_reset_failed;
966 err = 2;
2afa19a9
AC		 967 if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
968 != QLA_SUCCESS)
523ec773
AV		 969 goto eh_reset_failed;
970 err = 3;
e315cd28 971 if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
4d78c973 972 cmd->device->lun, type) != QLA_SUCCESS)
523ec773
AV		 973 goto eh_reset_failed;
974
e315cd28
AC		 975 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET SUCCEEDED.\n",
976 vha->host_no, cmd->device->id, cmd->device->lun, name);
523ec773
AV		 977
978 return SUCCESS;
979
4d78c973 980eh_reset_failed:
e315cd28
AC		 981 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET FAILED: %s.\n"
982 , vha->host_no, cmd->device->id, cmd->device->lun, name,
523ec773
AV		 983 reset_errors[err]);
984 return FAILED;
985}
1da177e4 986
523ec773
AV		 987static int
988qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
989{
e315cd28
AC		 990 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
991 struct qla_hw_data *ha = vha->hw;
1da177e4 992
523ec773
AV		 993 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
994 ha->isp_ops->lun_reset);
1da177e4
LT		 995}
996
1da177e4 997static int
523ec773 998qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1da177e4 999{
e315cd28
AC		 1000 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1001 struct qla_hw_data *ha = vha->hw;
1da177e4 1002
523ec773
AV		 1003 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1004 ha->isp_ops->target_reset);
1da177e4
LT		 1005}
1006
1da177e4
LT		 1007/**************************************************************************
1008* qla2xxx_eh_bus_reset
1009*
1010* Description:
1011* The bus reset function will reset the bus and abort any executing
1012* commands.
1013*
1014* Input:
1015* cmd = Linux SCSI command packet of the command that cause the
1016* bus reset.
1017*
1018* Returns:
1019* SUCCESS/FAILURE (defined as macro in scsi.h).
1020*
1021**************************************************************************/
e5f82ab8 1022static int
1da177e4
LT		 1023qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1024{
e315cd28 1025 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 1026 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
2c3dfe3f 1027 int ret = FAILED;
f4f051eb 1028 unsigned int id, lun;
f4f051eb 1029
65d430fa 1030 fc_block_scsi_eh(cmd);
07db5183 1031
f4f051eb
AV		 1032 id = cmd->device->id;
1033 lun = cmd->device->lun;
1da177e4 1034
b0328bee 1035 if (!fcport)
f4f051eb 1036 return ret;
1da177e4 1037
e315cd28 1038 qla_printk(KERN_INFO, vha->hw,
749af3d5 1039 "scsi(%ld:%d:%d): BUS RESET ISSUED.\n", vha->host_no, id, lun);
1da177e4 1040
e315cd28 1041 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1da177e4 1042 DEBUG2(printk("%s failed:board disabled\n",__func__));
f4f051eb 1043 goto eh_bus_reset_done;
1da177e4
LT		 1044 }
1045
e315cd28
AC		 1046 if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) {
1047 if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
f4f051eb 1048 ret = SUCCESS;
1da177e4 1049 }
f4f051eb
AV		 1050 if (ret == FAILED)
1051 goto eh_bus_reset_done;
1da177e4 1052
9a41a62b 1053 /* Flush outstanding commands. */
4d78c973 1054 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
523ec773 1055 QLA_SUCCESS)
9a41a62b 1056 ret = FAILED;
1da177e4 1057
f4f051eb 1058eh_bus_reset_done:
e315cd28 1059 qla_printk(KERN_INFO, vha->hw, "%s: reset %s\n", __func__,
f4f051eb 1060 (ret == FAILED) ? "failed" : "succeded");
1da177e4 1061
f4f051eb 1062 return ret;
1da177e4
LT		 1063}
1064
1065/**************************************************************************
1066* qla2xxx_eh_host_reset
1067*
1068* Description:
1069* The reset function will reset the Adapter.
1070*
1071* Input:
1072* cmd = Linux SCSI command packet of the command that cause the
1073* adapter reset.
1074*
1075* Returns:
1076* Either SUCCESS or FAILED.
1077*
1078* Note:
1079**************************************************************************/
e5f82ab8 1080static int
1da177e4
LT		 1081qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1082{
e315cd28 1083 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
bdf79621 1084 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
e315cd28 1085 struct qla_hw_data *ha = vha->hw;
2c3dfe3f 1086 int ret = FAILED;
f4f051eb 1087 unsigned int id, lun;
e315cd28 1088 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1da177e4 1089
65d430fa 1090 fc_block_scsi_eh(cmd);
07db5183 1091
f4f051eb
AV		 1092 id = cmd->device->id;
1093 lun = cmd->device->lun;
f4f051eb 1094
b0328bee 1095 if (!fcport)
f4f051eb 1096 return ret;
1da177e4 1097
1da177e4 1098 qla_printk(KERN_INFO, ha,
e315cd28 1099 "scsi(%ld:%d:%d): ADAPTER RESET ISSUED.\n", vha->host_no, id, lun);
1da177e4 1100
86fbee86 1101 if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
f4f051eb 1102 goto eh_host_reset_lock;
1da177e4
LT		 1103
1104 /*
1105 * Fixme-may be dpc thread is active and processing
fa2a1ce5 1106 * loop_resync,so wait a while for it to
1da177e4
LT		 1107 * be completed and then issue big hammer.Otherwise
1108 * it may cause I/O failure as big hammer marks the
1109 * devices as lost kicking of the port_down_timer
1110 * while dpc is stuck for the mailbox to complete.
1111 */
e315cd28
AC		 1112 qla2x00_wait_for_loop_ready(vha);
1113 if (vha != base_vha) {
1114 if (qla2x00_vp_abort_isp(vha))
f4f051eb 1115 goto eh_host_reset_lock;
e315cd28 1116 } else {
a9083016
GM		 1117 if (IS_QLA82XX(vha->hw)) {
1118 if (!qla82xx_fcoe_ctx_reset(vha)) {
1119 /* Ctx reset success */
1120 ret = SUCCESS;
1121 goto eh_host_reset_lock;
1122 }
1123 /* fall thru if ctx reset failed */
1124 }
68ca949c
AC		 1125 if (ha->wq)
1126 flush_workqueue(ha->wq);
1127
e315cd28 1128 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
a9083016 1129 if (ha->isp_ops->abort_isp(base_vha)) {
e315cd28
AC		 1130 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1131 /* failed. schedule dpc to try */
1132 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1133
1134 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
1135 goto eh_host_reset_lock;
1136 }
1137 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
fa2a1ce5 1138 }
1da177e4 1139
e315cd28 1140 /* Waiting for command to be returned to OS.*/
4d78c973 1141 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
e315cd28 1142 QLA_SUCCESS)
f4f051eb 1143 ret = SUCCESS;
1da177e4 1144
f4f051eb 1145eh_host_reset_lock:
f4f051eb
AV		 1146 qla_printk(KERN_INFO, ha, "%s: reset %s\n", __func__,
1147 (ret == FAILED) ? "failed" : "succeded");
1da177e4 1148
f4f051eb
AV		 1149 return ret;
1150}
1da177e4
LT		 1151
1152/*
1153* qla2x00_loop_reset
1154* Issue loop reset.
1155*
1156* Input:
1157* ha = adapter block pointer.
1158*
1159* Returns:
1160* 0 = success
1161*/
a4722cf2 1162int
e315cd28 1163qla2x00_loop_reset(scsi_qla_host_t *vha)
1da177e4 1164{
0c8c39af 1165 int ret;
bdf79621 1166 struct fc_port *fcport;
e315cd28 1167 struct qla_hw_data *ha = vha->hw;
1da177e4 1168
f4c496c1 1169 if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
55e5ed27
AV		 1170 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1171 if (fcport->port_type != FCT_TARGET)
1172 continue;
1173
1174 ret = ha->isp_ops->target_reset(fcport, 0, 0);
1175 if (ret != QLA_SUCCESS) {
1176 DEBUG2_3(printk("%s(%ld): bus_reset failed: "
1177 "target_reset=%d d_id=%x.\n", __func__,
1178 vha->host_no, ret, fcport->d_id.b24));
1179 }
1180 }
1181 }
1182
a9083016 1183 if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) {
e315cd28 1184 ret = qla2x00_full_login_lip(vha);
0c8c39af 1185 if (ret != QLA_SUCCESS) {
749af3d5 1186 DEBUG2_3(printk("%s(%ld): failed: "
e315cd28 1187 "full_login_lip=%d.\n", __func__, vha->host_no,
0c8c39af 1188 ret));
749af3d5
AC		 1189 }
1190 atomic_set(&vha->loop_state, LOOP_DOWN);
1191 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1192 qla2x00_mark_all_devices_lost(vha, 0);
1193 qla2x00_wait_for_loop_ready(vha);
0c8c39af
AV		 1194 }
1195
0d6e61bc 1196 if (ha->flags.enable_lip_reset) {
e315cd28 1197 ret = qla2x00_lip_reset(vha);
0c8c39af 1198 if (ret != QLA_SUCCESS) {
749af3d5 1199 DEBUG2_3(printk("%s(%ld): failed: "
e315cd28
AC		 1200 "lip_reset=%d.\n", __func__, vha->host_no, ret));
1201 } else
1202 qla2x00_wait_for_loop_ready(vha);
1da177e4
LT		 1203 }
1204
1da177e4 1205 /* Issue marker command only when we are going to start the I/O */
e315cd28 1206 vha->marker_needed = 1;
1da177e4 1207
0c8c39af 1208 return QLA_SUCCESS;
1da177e4
LT		 1209}
1210
df4bf0bb 1211void
e315cd28 1212qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
df4bf0bb 1213{
73208dfd 1214 int que, cnt;
df4bf0bb
AV		 1215 unsigned long flags;
1216 srb_t *sp;
ac280b67 1217 struct srb_ctx *ctx;
e315cd28 1218 struct qla_hw_data *ha = vha->hw;
73208dfd 1219 struct req_que *req;
df4bf0bb
AV		 1220
1221 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 1222 for (que = 0; que < ha->max_req_queues; que++) {
29bdccbe 1223 req = ha->req_q_map[que];
73208dfd
AC		 1224 if (!req)
1225 continue;
1226 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
1227 sp = req->outstanding_cmds[cnt];
e612d465 1228 if (sp) {
73208dfd 1229 req->outstanding_cmds[cnt] = NULL;
a9083016 1230 if (!sp->ctx ||
bad75002
AE		 1231 (sp->flags & SRB_FCP_CMND_DMA_VALID) ||
1232 IS_PROT_IO(sp)) {
ac280b67
AV		 1233 sp->cmd->result = res;
1234 qla2x00_sp_compl(ha, sp);
1235 } else {
1236 ctx = sp->ctx;
6c452a45
AV		 1237 if (ctx->type == SRB_LOGIN_CMD ||
1238 ctx->type == SRB_LOGOUT_CMD) {
4916392b 1239 ctx->u.iocb_cmd->free(sp);
db3ad7f8 1240 } else {
6c452a45 1241 struct fc_bsg_job *bsg_job =
4916392b 1242 ctx->u.bsg_job;
6c452a45
AV		 1243 if (bsg_job->request->msgcode
1244 == FC_BSG_HST_CT)
db3ad7f8 1245 kfree(sp->fcport);
6c452a45
AV		 1246 bsg_job->req->errors = 0;
1247 bsg_job->reply->result = res;
4916392b 1248 bsg_job->job_done(bsg_job);
db3ad7f8 1249 kfree(sp->ctx);
6c452a45 1250 mempool_free(sp,
4916392b 1251 ha->srb_mempool);
db3ad7f8 1252 }
ac280b67 1253 }
73208dfd 1254 }
df4bf0bb
AV		 1255 }
1256 }
1257 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1258}
1259
f4f051eb
AV		 1260static int
1261qla2xxx_slave_alloc(struct scsi_device *sdev)
1da177e4 1262{
bdf79621 1263 struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1da177e4 1264
19a7b4ae 1265 if (!rport || fc_remote_port_chkready(rport))
f4f051eb 1266 return -ENXIO;
bdf79621 1267
19a7b4ae 1268 sdev->hostdata = *(fc_port_t **)rport->dd_data;
1da177e4 1269
f4f051eb
AV		 1270 return 0;
1271}
1da177e4 1272
f4f051eb
AV		 1273static int
1274qla2xxx_slave_configure(struct scsi_device *sdev)
1275{
e315cd28 1276 scsi_qla_host_t *vha = shost_priv(sdev->host);
2afa19a9 1277 struct req_que *req = vha->req;
8482e118 1278
f4f051eb 1279 if (sdev->tagged_supported)
73208dfd 1280 scsi_activate_tcq(sdev, req->max_q_depth);
f4f051eb 1281 else
73208dfd 1282 scsi_deactivate_tcq(sdev, req->max_q_depth);
f4f051eb
AV		 1283 return 0;
1284}
1da177e4 1285
f4f051eb
AV		 1286static void
1287qla2xxx_slave_destroy(struct scsi_device *sdev)
1288{
1289 sdev->hostdata = NULL;
1da177e4
LT		 1290}
1291
c45dd305
GM		 1292static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1293{
1294 fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1295
1296 if (!scsi_track_queue_full(sdev, qdepth))
1297 return;
1298
1299 DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw,
1300 "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n",
1301 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
1302 sdev->queue_depth));
1303}
1304
1305static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1306{
1307 fc_port_t *fcport = sdev->hostdata;
1308 struct scsi_qla_host *vha = fcport->vha;
1309 struct qla_hw_data *ha = vha->hw;
1310 struct req_que *req = NULL;
1311
1312 req = vha->req;
1313 if (!req)
1314 return;
1315
1316 if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1317 return;
1318
1319 if (sdev->ordered_tags)
1320 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1321 else
1322 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1323
1324 DEBUG2(qla_printk(KERN_INFO, ha,
1325 "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n",
1326 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
1327 sdev->queue_depth));
1328}
1329
ce7e4af7 1330static int
e881a172 1331qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
ce7e4af7 1332{
c45dd305
GM		 1333 switch (reason) {
1334 case SCSI_QDEPTH_DEFAULT:
1335 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1336 break;
1337 case SCSI_QDEPTH_QFULL:
1338 qla2x00_handle_queue_full(sdev, qdepth);
1339 break;
1340 case SCSI_QDEPTH_RAMP_UP:
1341 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1342 break;
1343 default:
08002af2 1344 return -EOPNOTSUPP;
c45dd305 1345 }
e881a172 1346
ce7e4af7
AV		 1347 return sdev->queue_depth;
1348}
1349
1350static int
1351qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1352{
1353 if (sdev->tagged_supported) {
1354 scsi_set_tag_type(sdev, tag_type);
1355 if (tag_type)
1356 scsi_activate_tcq(sdev, sdev->queue_depth);
1357 else
1358 scsi_deactivate_tcq(sdev, sdev->queue_depth);
1359 } else
1360 tag_type = 0;
1361
1362 return tag_type;
1363}
1364
1da177e4
LT		 1365/**
1366 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1367 * @ha: HA context
1368 *
1369 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1370 * supported addressing method.
1371 */
1372static void
53303c42 1373qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1da177e4 1374{
7524f9b9 1375 /* Assume a 32bit DMA mask. */
1da177e4 1376 ha->flags.enable_64bit_addressing = 0;
1da177e4 1377
6a35528a 1378 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
7524f9b9
AV		 1379 /* Any upper-dword bits set? */
1380 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
6a35528a 1381 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
7524f9b9 1382 /* Ok, a 64bit DMA mask is applicable. */
1da177e4 1383 ha->flags.enable_64bit_addressing = 1;
fd34f556
AV		 1384 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1385 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
7524f9b9 1386 return;
1da177e4 1387 }
1da177e4 1388 }
7524f9b9 1389
284901a9
YH		 1390 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1391 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1da177e4
LT		 1392}
1393
fd34f556 1394static void
e315cd28 1395qla2x00_enable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1396{
1397 unsigned long flags = 0;
1398 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1399
1400 spin_lock_irqsave(&ha->hardware_lock, flags);
1401 ha->interrupts_on = 1;
1402 /* enable risc and host interrupts */
1403 WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1404 RD_REG_WORD(&reg->ictrl);
1405 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1406
1407}
1408
1409static void
e315cd28 1410qla2x00_disable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1411{
1412 unsigned long flags = 0;
1413 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1414
1415 spin_lock_irqsave(&ha->hardware_lock, flags);
1416 ha->interrupts_on = 0;
1417 /* disable risc and host interrupts */
1418 WRT_REG_WORD(&reg->ictrl, 0);
1419 RD_REG_WORD(&reg->ictrl);
1420 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1421}
1422
1423static void
e315cd28 1424qla24xx_enable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1425{
1426 unsigned long flags = 0;
1427 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1428
1429 spin_lock_irqsave(&ha->hardware_lock, flags);
1430 ha->interrupts_on = 1;
1431 WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1432 RD_REG_DWORD(&reg->ictrl);
1433 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1434}
1435
1436static void
e315cd28 1437qla24xx_disable_intrs(struct qla_hw_data *ha)
fd34f556
AV		 1438{
1439 unsigned long flags = 0;
1440 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1441
124f85e6
AV		 1442 if (IS_NOPOLLING_TYPE(ha))
1443 return;
fd34f556
AV		 1444 spin_lock_irqsave(&ha->hardware_lock, flags);
1445 ha->interrupts_on = 0;
1446 WRT_REG_DWORD(&reg->ictrl, 0);
1447 RD_REG_DWORD(&reg->ictrl);
1448 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1449}
1450
1451static struct isp_operations qla2100_isp_ops = {
1452 .pci_config = qla2100_pci_config,
1453 .reset_chip = qla2x00_reset_chip,
1454 .chip_diag = qla2x00_chip_diag,
1455 .config_rings = qla2x00_config_rings,
1456 .reset_adapter = qla2x00_reset_adapter,
1457 .nvram_config = qla2x00_nvram_config,
1458 .update_fw_options = qla2x00_update_fw_options,
1459 .load_risc = qla2x00_load_risc,
1460 .pci_info_str = qla2x00_pci_info_str,
1461 .fw_version_str = qla2x00_fw_version_str,
1462 .intr_handler = qla2100_intr_handler,
1463 .enable_intrs = qla2x00_enable_intrs,
1464 .disable_intrs = qla2x00_disable_intrs,
1465 .abort_command = qla2x00_abort_command,
523ec773
AV		 1466 .target_reset = qla2x00_abort_target,
1467 .lun_reset = qla2x00_lun_reset,
fd34f556
AV		 1468 .fabric_login = qla2x00_login_fabric,
1469 .fabric_logout = qla2x00_fabric_logout,
1470 .calc_req_entries = qla2x00_calc_iocbs_32,
1471 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1472 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1473 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1474 .read_nvram = qla2x00_read_nvram_data,
1475 .write_nvram = qla2x00_write_nvram_data,
1476 .fw_dump = qla2100_fw_dump,
1477 .beacon_on = NULL,
1478 .beacon_off = NULL,
1479 .beacon_blink = NULL,
1480 .read_optrom = qla2x00_read_optrom_data,
1481 .write_optrom = qla2x00_write_optrom_data,
1482 .get_flash_version = qla2x00_get_flash_version,
e315cd28 1483 .start_scsi = qla2x00_start_scsi,
a9083016 1484 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1485};
1486
1487static struct isp_operations qla2300_isp_ops = {
1488 .pci_config = qla2300_pci_config,
1489 .reset_chip = qla2x00_reset_chip,
1490 .chip_diag = qla2x00_chip_diag,
1491 .config_rings = qla2x00_config_rings,
1492 .reset_adapter = qla2x00_reset_adapter,
1493 .nvram_config = qla2x00_nvram_config,
1494 .update_fw_options = qla2x00_update_fw_options,
1495 .load_risc = qla2x00_load_risc,
1496 .pci_info_str = qla2x00_pci_info_str,
1497 .fw_version_str = qla2x00_fw_version_str,
1498 .intr_handler = qla2300_intr_handler,
1499 .enable_intrs = qla2x00_enable_intrs,
1500 .disable_intrs = qla2x00_disable_intrs,
1501 .abort_command = qla2x00_abort_command,
523ec773
AV		 1502 .target_reset = qla2x00_abort_target,
1503 .lun_reset = qla2x00_lun_reset,
fd34f556
AV		 1504 .fabric_login = qla2x00_login_fabric,
1505 .fabric_logout = qla2x00_fabric_logout,
1506 .calc_req_entries = qla2x00_calc_iocbs_32,
1507 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1508 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1509 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1510 .read_nvram = qla2x00_read_nvram_data,
1511 .write_nvram = qla2x00_write_nvram_data,
1512 .fw_dump = qla2300_fw_dump,
1513 .beacon_on = qla2x00_beacon_on,
1514 .beacon_off = qla2x00_beacon_off,
1515 .beacon_blink = qla2x00_beacon_blink,
1516 .read_optrom = qla2x00_read_optrom_data,
1517 .write_optrom = qla2x00_write_optrom_data,
1518 .get_flash_version = qla2x00_get_flash_version,
e315cd28 1519 .start_scsi = qla2x00_start_scsi,
a9083016 1520 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1521};
1522
1523static struct isp_operations qla24xx_isp_ops = {
1524 .pci_config = qla24xx_pci_config,
1525 .reset_chip = qla24xx_reset_chip,
1526 .chip_diag = qla24xx_chip_diag,
1527 .config_rings = qla24xx_config_rings,
1528 .reset_adapter = qla24xx_reset_adapter,
1529 .nvram_config = qla24xx_nvram_config,
1530 .update_fw_options = qla24xx_update_fw_options,
1531 .load_risc = qla24xx_load_risc,
1532 .pci_info_str = qla24xx_pci_info_str,
1533 .fw_version_str = qla24xx_fw_version_str,
1534 .intr_handler = qla24xx_intr_handler,
1535 .enable_intrs = qla24xx_enable_intrs,
1536 .disable_intrs = qla24xx_disable_intrs,
1537 .abort_command = qla24xx_abort_command,
523ec773
AV		 1538 .target_reset = qla24xx_abort_target,
1539 .lun_reset = qla24xx_lun_reset,
fd34f556
AV		 1540 .fabric_login = qla24xx_login_fabric,
1541 .fabric_logout = qla24xx_fabric_logout,
1542 .calc_req_entries = NULL,
1543 .build_iocbs = NULL,
1544 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1545 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1546 .read_nvram = qla24xx_read_nvram_data,
1547 .write_nvram = qla24xx_write_nvram_data,
1548 .fw_dump = qla24xx_fw_dump,
1549 .beacon_on = qla24xx_beacon_on,
1550 .beacon_off = qla24xx_beacon_off,
1551 .beacon_blink = qla24xx_beacon_blink,
1552 .read_optrom = qla24xx_read_optrom_data,
1553 .write_optrom = qla24xx_write_optrom_data,
1554 .get_flash_version = qla24xx_get_flash_version,
e315cd28 1555 .start_scsi = qla24xx_start_scsi,
a9083016 1556 .abort_isp = qla2x00_abort_isp,
fd34f556
AV		 1557};
1558
c3a2f0df
AV		 1559static struct isp_operations qla25xx_isp_ops = {
1560 .pci_config = qla25xx_pci_config,
1561 .reset_chip = qla24xx_reset_chip,
1562 .chip_diag = qla24xx_chip_diag,
1563 .config_rings = qla24xx_config_rings,
1564 .reset_adapter = qla24xx_reset_adapter,
1565 .nvram_config = qla24xx_nvram_config,
1566 .update_fw_options = qla24xx_update_fw_options,
1567 .load_risc = qla24xx_load_risc,
1568 .pci_info_str = qla24xx_pci_info_str,
1569 .fw_version_str = qla24xx_fw_version_str,
1570 .intr_handler = qla24xx_intr_handler,
1571 .enable_intrs = qla24xx_enable_intrs,
1572 .disable_intrs = qla24xx_disable_intrs,
1573 .abort_command = qla24xx_abort_command,
523ec773
AV		 1574 .target_reset = qla24xx_abort_target,
1575 .lun_reset = qla24xx_lun_reset,
c3a2f0df
AV		 1576 .fabric_login = qla24xx_login_fabric,
1577 .fabric_logout = qla24xx_fabric_logout,
1578 .calc_req_entries = NULL,
1579 .build_iocbs = NULL,
1580 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1581 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1582 .read_nvram = qla25xx_read_nvram_data,
1583 .write_nvram = qla25xx_write_nvram_data,
1584 .fw_dump = qla25xx_fw_dump,
1585 .beacon_on = qla24xx_beacon_on,
1586 .beacon_off = qla24xx_beacon_off,
1587 .beacon_blink = qla24xx_beacon_blink,
338c9161 1588 .read_optrom = qla25xx_read_optrom_data,
c3a2f0df
AV		 1589 .write_optrom = qla24xx_write_optrom_data,
1590 .get_flash_version = qla24xx_get_flash_version,
bad75002 1591 .start_scsi = qla24xx_dif_start_scsi,
a9083016 1592 .abort_isp = qla2x00_abort_isp,
c3a2f0df
AV		 1593};
1594
3a03eb79
AV		 1595static struct isp_operations qla81xx_isp_ops = {
1596 .pci_config = qla25xx_pci_config,
1597 .reset_chip = qla24xx_reset_chip,
1598 .chip_diag = qla24xx_chip_diag,
1599 .config_rings = qla24xx_config_rings,
1600 .reset_adapter = qla24xx_reset_adapter,
1601 .nvram_config = qla81xx_nvram_config,
1602 .update_fw_options = qla81xx_update_fw_options,
eaac30be 1603 .load_risc = qla81xx_load_risc,
3a03eb79
AV		 1604 .pci_info_str = qla24xx_pci_info_str,
1605 .fw_version_str = qla24xx_fw_version_str,
1606 .intr_handler = qla24xx_intr_handler,
1607 .enable_intrs = qla24xx_enable_intrs,
1608 .disable_intrs = qla24xx_disable_intrs,
1609 .abort_command = qla24xx_abort_command,
1610 .target_reset = qla24xx_abort_target,
1611 .lun_reset = qla24xx_lun_reset,
1612 .fabric_login = qla24xx_login_fabric,
1613 .fabric_logout = qla24xx_fabric_logout,
1614 .calc_req_entries = NULL,
1615 .build_iocbs = NULL,
1616 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1617 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
3d79038f
AV		 1618 .read_nvram = NULL,
1619 .write_nvram = NULL,
3a03eb79
AV		 1620 .fw_dump = qla81xx_fw_dump,
1621 .beacon_on = qla24xx_beacon_on,
1622 .beacon_off = qla24xx_beacon_off,
1623 .beacon_blink = qla24xx_beacon_blink,
1624 .read_optrom = qla25xx_read_optrom_data,
1625 .write_optrom = qla24xx_write_optrom_data,
1626 .get_flash_version = qla24xx_get_flash_version,
ba77ef53 1627 .start_scsi = qla24xx_dif_start_scsi,
a9083016
GM		 1628 .abort_isp = qla2x00_abort_isp,
1629};
1630
1631static struct isp_operations qla82xx_isp_ops = {
1632 .pci_config = qla82xx_pci_config,
1633 .reset_chip = qla82xx_reset_chip,
1634 .chip_diag = qla24xx_chip_diag,
1635 .config_rings = qla82xx_config_rings,
1636 .reset_adapter = qla24xx_reset_adapter,
1637 .nvram_config = qla81xx_nvram_config,
1638 .update_fw_options = qla24xx_update_fw_options,
1639 .load_risc = qla82xx_load_risc,
1640 .pci_info_str = qla82xx_pci_info_str,
1641 .fw_version_str = qla24xx_fw_version_str,
1642 .intr_handler = qla82xx_intr_handler,
1643 .enable_intrs = qla82xx_enable_intrs,
1644 .disable_intrs = qla82xx_disable_intrs,
1645 .abort_command = qla24xx_abort_command,
1646 .target_reset = qla24xx_abort_target,
1647 .lun_reset = qla24xx_lun_reset,
1648 .fabric_login = qla24xx_login_fabric,
1649 .fabric_logout = qla24xx_fabric_logout,
1650 .calc_req_entries = NULL,
1651 .build_iocbs = NULL,
1652 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1653 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1654 .read_nvram = qla24xx_read_nvram_data,
1655 .write_nvram = qla24xx_write_nvram_data,
1656 .fw_dump = qla24xx_fw_dump,
1657 .beacon_on = qla24xx_beacon_on,
1658 .beacon_off = qla24xx_beacon_off,
1659 .beacon_blink = qla24xx_beacon_blink,
1660 .read_optrom = qla82xx_read_optrom_data,
1661 .write_optrom = qla82xx_write_optrom_data,
1662 .get_flash_version = qla24xx_get_flash_version,
1663 .start_scsi = qla82xx_start_scsi,
1664 .abort_isp = qla82xx_abort_isp,
3a03eb79
AV		 1665};
1666
ea5b6382 1667static inline void
e315cd28 1668qla2x00_set_isp_flags(struct qla_hw_data *ha)
ea5b6382
AV		 1669{
1670 ha->device_type = DT_EXTENDED_IDS;
1671 switch (ha->pdev->device) {
1672 case PCI_DEVICE_ID_QLOGIC_ISP2100:
1673 ha->device_type |= DT_ISP2100;
1674 ha->device_type &= ~DT_EXTENDED_IDS;
441d1072 1675 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
ea5b6382
AV		 1676 break;
1677 case PCI_DEVICE_ID_QLOGIC_ISP2200:
1678 ha->device_type |= DT_ISP2200;
1679 ha->device_type &= ~DT_EXTENDED_IDS;
441d1072 1680 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
ea5b6382
AV		 1681 break;
1682 case PCI_DEVICE_ID_QLOGIC_ISP2300:
1683 ha->device_type |= DT_ISP2300;
4a59f71d 1684 ha->device_type |= DT_ZIO_SUPPORTED;
441d1072 1685 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382
AV		 1686 break;
1687 case PCI_DEVICE_ID_QLOGIC_ISP2312:
1688 ha->device_type |= DT_ISP2312;
4a59f71d 1689 ha->device_type |= DT_ZIO_SUPPORTED;
441d1072 1690 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382
AV		 1691 break;
1692 case PCI_DEVICE_ID_QLOGIC_ISP2322:
1693 ha->device_type |= DT_ISP2322;
4a59f71d 1694 ha->device_type |= DT_ZIO_SUPPORTED;
ea5b6382
AV		 1695 if (ha->pdev->subsystem_vendor == 0x1028 &&
1696 ha->pdev->subsystem_device == 0x0170)
1697 ha->device_type |= DT_OEM_001;
441d1072 1698 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382
AV		 1699 break;
1700 case PCI_DEVICE_ID_QLOGIC_ISP6312:
1701 ha->device_type |= DT_ISP6312;
441d1072 1702 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382
AV		 1703 break;
1704 case PCI_DEVICE_ID_QLOGIC_ISP6322:
1705 ha->device_type |= DT_ISP6322;
441d1072 1706 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
ea5b6382
AV		 1707 break;
1708 case PCI_DEVICE_ID_QLOGIC_ISP2422:
1709 ha->device_type |= DT_ISP2422;
4a59f71d 1710 ha->device_type |= DT_ZIO_SUPPORTED;
e428924c 1711 ha->device_type |= DT_FWI2;
c76f2c01 1712 ha->device_type |= DT_IIDMA;
441d1072 1713 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382
AV		 1714 break;
1715 case PCI_DEVICE_ID_QLOGIC_ISP2432:
1716 ha->device_type |= DT_ISP2432;
4a59f71d 1717 ha->device_type |= DT_ZIO_SUPPORTED;
e428924c 1718 ha->device_type |= DT_FWI2;
c76f2c01 1719 ha->device_type |= DT_IIDMA;
441d1072 1720 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1721 break;
4d4df193
HK		 1722 case PCI_DEVICE_ID_QLOGIC_ISP8432:
1723 ha->device_type |= DT_ISP8432;
1724 ha->device_type |= DT_ZIO_SUPPORTED;
1725 ha->device_type |= DT_FWI2;
1726 ha->device_type |= DT_IIDMA;
1727 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1728 break;
044cc6c8
AV		 1729 case PCI_DEVICE_ID_QLOGIC_ISP5422:
1730 ha->device_type |= DT_ISP5422;
e428924c 1731 ha->device_type |= DT_FWI2;
441d1072 1732 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1733 break;
044cc6c8
AV		 1734 case PCI_DEVICE_ID_QLOGIC_ISP5432:
1735 ha->device_type |= DT_ISP5432;
e428924c 1736 ha->device_type |= DT_FWI2;
441d1072 1737 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1738 break;
c3a2f0df
AV		 1739 case PCI_DEVICE_ID_QLOGIC_ISP2532:
1740 ha->device_type |= DT_ISP2532;
1741 ha->device_type |= DT_ZIO_SUPPORTED;
1742 ha->device_type |= DT_FWI2;
1743 ha->device_type |= DT_IIDMA;
441d1072 1744 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
ea5b6382 1745 break;
3a03eb79
AV		 1746 case PCI_DEVICE_ID_QLOGIC_ISP8001:
1747 ha->device_type |= DT_ISP8001;
1748 ha->device_type |= DT_ZIO_SUPPORTED;
1749 ha->device_type |= DT_FWI2;
1750 ha->device_type |= DT_IIDMA;
1751 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1752 break;
a9083016
GM		 1753 case PCI_DEVICE_ID_QLOGIC_ISP8021:
1754 ha->device_type |= DT_ISP8021;
1755 ha->device_type |= DT_ZIO_SUPPORTED;
1756 ha->device_type |= DT_FWI2;
1757 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1758 /* Initialize 82XX ISP flags */
1759 qla82xx_init_flags(ha);
1760 break;
ea5b6382 1761 }
e5b68a61 1762
a9083016
GM		 1763 if (IS_QLA82XX(ha))
1764 ha->port_no = !(ha->portnum & 1);
1765 else
1766 /* Get adapter physical port no from interrupt pin register. */
1767 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
1768
e5b68a61
AC		 1769 if (ha->port_no & 1)
1770 ha->flags.port0 = 1;
1771 else
1772 ha->flags.port0 = 0;
ea5b6382
AV		 1773}
1774
1da177e4 1775static int
e315cd28 1776qla2x00_iospace_config(struct qla_hw_data *ha)
1da177e4 1777{
3776541d 1778 resource_size_t pio;
73208dfd 1779 uint16_t msix;
68ca949c 1780 int cpus;
1da177e4 1781
a9083016
GM		 1782 if (IS_QLA82XX(ha))
1783 return qla82xx_iospace_config(ha);
1784
285d0321
AV		 1785 if (pci_request_selected_regions(ha->pdev, ha->bars,
1786 QLA2XXX_DRIVER_NAME)) {
1787 qla_printk(KERN_WARNING, ha,
1788 "Failed to reserve PIO/MMIO regions (%s)\n",
1789 pci_name(ha->pdev));
1790
1791 goto iospace_error_exit;
1792 }
1793 if (!(ha->bars & 1))
1794 goto skip_pio;
1795
1da177e4
LT		 1796 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1797 pio = pci_resource_start(ha->pdev, 0);
3776541d
AV		 1798 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1799 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1da177e4
LT		 1800 qla_printk(KERN_WARNING, ha,
1801 "Invalid PCI I/O region size (%s)...\n",
1802 pci_name(ha->pdev));
1803 pio = 0;
1804 }
1805 } else {
1806 qla_printk(KERN_WARNING, ha,
1807 "region #0 not a PIO resource (%s)...\n",
1808 pci_name(ha->pdev));
1809 pio = 0;
1810 }
285d0321 1811 ha->pio_address = pio;
1da177e4 1812
285d0321 1813skip_pio:
1da177e4 1814 /* Use MMIO operations for all accesses. */
3776541d 1815 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1da177e4 1816 qla_printk(KERN_ERR, ha,
3776541d 1817 "region #1 not an MMIO resource (%s), aborting\n",
1da177e4
LT		 1818 pci_name(ha->pdev));
1819 goto iospace_error_exit;
1820 }
3776541d 1821 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1da177e4
LT		 1822 qla_printk(KERN_ERR, ha,
1823 "Invalid PCI mem region size (%s), aborting\n",
1824 pci_name(ha->pdev));
1825 goto iospace_error_exit;
1826 }
1827
3776541d 1828 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1da177e4
LT		 1829 if (!ha->iobase) {
1830 qla_printk(KERN_ERR, ha,
1831 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
1832
1833 goto iospace_error_exit;
1834 }
1835
73208dfd 1836 /* Determine queue resources */
2afa19a9 1837 ha->max_req_queues = ha->max_rsp_queues = 1;
d84a47c2
MH		 1838 if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1839 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
2afa19a9 1840 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
17d98630 1841 goto mqiobase_exit;
d84a47c2 1842
17d98630
AC		 1843 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1844 pci_resource_len(ha->pdev, 3));
1845 if (ha->mqiobase) {
1846 /* Read MSIX vector size of the board */
1847 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1848 ha->msix_count = msix;
68ca949c
AC		 1849 /* Max queues are bounded by available msix vectors */
1850 /* queue 0 uses two msix vectors */
1851 if (ql2xmultique_tag) {
1852 cpus = num_online_cpus();
27dc9c5a 1853 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
68ca949c
AC		 1854 (cpus + 1) : (ha->msix_count - 1);
1855 ha->max_req_queues = 2;
1856 } else if (ql2xmaxqueues > 1) {
2afa19a9
AC		 1857 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1858 QLA_MQ_SIZE : ql2xmaxqueues;
1859 DEBUG2(qla_printk(KERN_INFO, ha, "QoS mode set, max no"
1860 " of request queues:%d\n", ha->max_req_queues));
1861 }
68ca949c
AC		 1862 qla_printk(KERN_INFO, ha,
1863 "MSI-X vector count: %d\n", msix);
2afa19a9
AC		 1864 } else
1865 qla_printk(KERN_INFO, ha, "BAR 3 not enabled\n");
17d98630
AC		 1866
1867mqiobase_exit:
2afa19a9 1868 ha->msix_count = ha->max_rsp_queues + 1;
1da177e4
LT		 1869 return (0);
1870
1871iospace_error_exit:
1872 return (-ENOMEM);
1873}
1874
1e99e33a
AV		 1875static void
1876qla2xxx_scan_start(struct Scsi_Host *shost)
1877{
e315cd28 1878 scsi_qla_host_t *vha = shost_priv(shost);
1e99e33a 1879
cbc8eb67
AV		 1880 if (vha->hw->flags.running_gold_fw)
1881 return;
1882
e315cd28
AC		 1883 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1884 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1885 set_bit(RSCN_UPDATE, &vha->dpc_flags);
1886 set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
1e99e33a
AV		 1887}
1888
1889static int
1890qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
1891{
e315cd28 1892 scsi_qla_host_t *vha = shost_priv(shost);
1e99e33a 1893
e315cd28 1894 if (!vha->host)
1e99e33a 1895 return 1;
e315cd28 1896 if (time > vha->hw->loop_reset_delay * HZ)
1e99e33a
AV		 1897 return 1;
1898
e315cd28 1899 return atomic_read(&vha->loop_state) == LOOP_READY;
1e99e33a
AV		 1900}
1901
1da177e4
LT		 1902/*
1903 * PCI driver interface
1904 */
7ee61397
AV		 1905static int __devinit
1906qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
1da177e4 1907{
a1541d5a 1908 int ret = -ENODEV;
1da177e4 1909 struct Scsi_Host *host;
e315cd28
AC		 1910 scsi_qla_host_t *base_vha = NULL;
1911 struct qla_hw_data *ha;
29856e28 1912 char pci_info[30];
1da177e4 1913 char fw_str[30];
5433383e 1914 struct scsi_host_template *sht;
c51da4ec 1915 int bars, max_id, mem_only = 0;
e315cd28 1916 uint16_t req_length = 0, rsp_length = 0;
73208dfd
AC		 1917 struct req_que *req = NULL;
1918 struct rsp_que *rsp = NULL;
1da177e4 1919
285d0321 1920 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
a5326f86 1921 sht = &qla2xxx_driver_template;
5433383e 1922 if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
8bc69e7d 1923 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
4d4df193 1924 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
8bc69e7d 1925 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
c3a2f0df 1926 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
3a03eb79 1927 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
a9083016
GM		 1928 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
1929 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) {
285d0321 1930 bars = pci_select_bars(pdev, IORESOURCE_MEM);
09483916 1931 mem_only = 1;
285d0321
AV		 1932 }
1933
09483916
BH		 1934 if (mem_only) {
1935 if (pci_enable_device_mem(pdev))
1936 goto probe_out;
1937 } else {
1938 if (pci_enable_device(pdev))
1939 goto probe_out;
1940 }
285d0321 1941
0927678f
JB		 1942 /* This may fail but that's ok */
1943 pci_enable_pcie_error_reporting(pdev);
285d0321 1944
e315cd28
AC		 1945 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
1946 if (!ha) {
1947 DEBUG(printk("Unable to allocate memory for ha\n"));
1948 goto probe_out;
1da177e4 1949 }
e315cd28 1950 ha->pdev = pdev;
1da177e4
LT		 1951
1952 /* Clear our data area */
285d0321 1953 ha->bars = bars;
09483916 1954 ha->mem_only = mem_only;
df4bf0bb 1955 spin_lock_init(&ha->hardware_lock);
339aa70e 1956 spin_lock_init(&ha->vport_slock);
1da177e4 1957
ea5b6382
AV		 1958 /* Set ISP-type information. */
1959 qla2x00_set_isp_flags(ha);
ca79cf66
DG		 1960
1961 /* Set EEH reset type to fundamental if required by hba */
1962 if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
1963 pdev->needs_freset = 1;
ca79cf66
DG		 1964 }
1965
1da177e4
LT		 1966 /* Configure PCI I/O space */
1967 ret = qla2x00_iospace_config(ha);
a1541d5a 1968 if (ret)
e315cd28 1969 goto probe_hw_failed;
1da177e4 1970
1da177e4 1971 qla_printk(KERN_INFO, ha,
5433383e
AV		 1972 "Found an ISP%04X, irq %d, iobase 0x%p\n", pdev->device, pdev->irq,
1973 ha->iobase);
1da177e4 1974
1da177e4 1975 ha->prev_topology = 0;
fca29703 1976 ha->init_cb_size = sizeof(init_cb_t);
d8b45213 1977 ha->link_data_rate = PORT_SPEED_UNKNOWN;
854165f4 1978 ha->optrom_size = OPTROM_SIZE_2300;
1da177e4 1979
abbd8870 1980 /* Assign ISP specific operations. */
e315cd28 1981 max_id = MAX_TARGETS_2200;
1da177e4 1982 if (IS_QLA2100(ha)) {
e315cd28 1983 max_id = MAX_TARGETS_2100;
1da177e4 1984 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
e315cd28
AC		 1985 req_length = REQUEST_ENTRY_CNT_2100;
1986 rsp_length = RESPONSE_ENTRY_CNT_2100;
1987 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
abbd8870 1988 ha->gid_list_info_size = 4;
3a03eb79
AV		 1989 ha->flash_conf_off = ~0;
1990 ha->flash_data_off = ~0;
1991 ha->nvram_conf_off = ~0;
1992 ha->nvram_data_off = ~0;
fd34f556 1993 ha->isp_ops = &qla2100_isp_ops;
1da177e4 1994 } else if (IS_QLA2200(ha)) {
1da177e4 1995 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 1996 req_length = REQUEST_ENTRY_CNT_2200;
1997 rsp_length = RESPONSE_ENTRY_CNT_2100;
1998 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
abbd8870 1999 ha->gid_list_info_size = 4;
3a03eb79
AV		 2000 ha->flash_conf_off = ~0;
2001 ha->flash_data_off = ~0;
2002 ha->nvram_conf_off = ~0;
2003 ha->nvram_data_off = ~0;
fd34f556 2004 ha->isp_ops = &qla2100_isp_ops;
fca29703 2005 } else if (IS_QLA23XX(ha)) {
1da177e4 2006 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 2007 req_length = REQUEST_ENTRY_CNT_2200;
2008 rsp_length = RESPONSE_ENTRY_CNT_2300;
2009 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
abbd8870 2010 ha->gid_list_info_size = 6;
854165f4
AV		 2011 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2012 ha->optrom_size = OPTROM_SIZE_2322;
3a03eb79
AV		 2013 ha->flash_conf_off = ~0;
2014 ha->flash_data_off = ~0;
2015 ha->nvram_conf_off = ~0;
2016 ha->nvram_data_off = ~0;
fd34f556 2017 ha->isp_ops = &qla2300_isp_ops;
4d4df193 2018 } else if (IS_QLA24XX_TYPE(ha)) {
fca29703 2019 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 2020 req_length = REQUEST_ENTRY_CNT_24XX;
2021 rsp_length = RESPONSE_ENTRY_CNT_2300;
2022 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2c3dfe3f 2023 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
fca29703 2024 ha->gid_list_info_size = 8;
854165f4 2025 ha->optrom_size = OPTROM_SIZE_24XX;
73208dfd 2026 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
fd34f556 2027 ha->isp_ops = &qla24xx_isp_ops;
3a03eb79
AV		 2028 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2029 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2030 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2031 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
c3a2f0df 2032 } else if (IS_QLA25XX(ha)) {
c3a2f0df 2033 ha->mbx_count = MAILBOX_REGISTER_COUNT;
e315cd28
AC		 2034 req_length = REQUEST_ENTRY_CNT_24XX;
2035 rsp_length = RESPONSE_ENTRY_CNT_2300;
2036 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
c3a2f0df 2037 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
c3a2f0df
AV		 2038 ha->gid_list_info_size = 8;
2039 ha->optrom_size = OPTROM_SIZE_25XX;
73208dfd 2040 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
c3a2f0df 2041 ha->isp_ops = &qla25xx_isp_ops;
3a03eb79
AV		 2042 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2043 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2044 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2045 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2046 } else if (IS_QLA81XX(ha)) {
2047 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2048 req_length = REQUEST_ENTRY_CNT_24XX;
2049 rsp_length = RESPONSE_ENTRY_CNT_2300;
2050 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2051 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2052 ha->gid_list_info_size = 8;
2053 ha->optrom_size = OPTROM_SIZE_81XX;
40859ae5 2054 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3a03eb79
AV		 2055 ha->isp_ops = &qla81xx_isp_ops;
2056 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2057 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2058 ha->nvram_conf_off = ~0;
2059 ha->nvram_data_off = ~0;
a9083016
GM		 2060 } else if (IS_QLA82XX(ha)) {
2061 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2062 req_length = REQUEST_ENTRY_CNT_82XX;
2063 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2064 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2065 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2066 ha->gid_list_info_size = 8;
2067 ha->optrom_size = OPTROM_SIZE_82XX;
2068 ha->isp_ops = &qla82xx_isp_ops;
2069 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2070 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2071 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2072 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
1da177e4 2073 }
1da177e4 2074
6c2f527c 2075 mutex_init(&ha->vport_lock);
0b05a1f0
MB		 2076 init_completion(&ha->mbx_cmd_comp);
2077 complete(&ha->mbx_cmd_comp);
2078 init_completion(&ha->mbx_intr_comp);
23f2ebd1 2079 init_completion(&ha->dcbx_comp);
1da177e4 2080
2c3dfe3f 2081 set_bit(0, (unsigned long *) ha->vp_idx_map);
1da177e4 2082
53303c42 2083 qla2x00_config_dma_addressing(ha);
73208dfd 2084 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
e315cd28 2085 if (!ret) {
1da177e4
LT		 2086 qla_printk(KERN_WARNING, ha,
2087 "[ERROR] Failed to allocate memory for adapter\n");
2088
e315cd28
AC		 2089 goto probe_hw_failed;
2090 }
2091
73208dfd 2092 req->max_q_depth = MAX_Q_DEPTH;
e315cd28 2093 if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
73208dfd
AC		 2094 req->max_q_depth = ql2xmaxqdepth;
2095
e315cd28
AC		 2096
2097 base_vha = qla2x00_create_host(sht, ha);
2098 if (!base_vha) {
2099 qla_printk(KERN_WARNING, ha,
2100 "[ERROR] Failed to allocate memory for scsi_host\n");
2101
a1541d5a 2102 ret = -ENOMEM;
6e9f21f3 2103 qla2x00_mem_free(ha);
2afa19a9
AC		 2104 qla2x00_free_req_que(ha, req);
2105 qla2x00_free_rsp_que(ha, rsp);
e315cd28 2106 goto probe_hw_failed;
1da177e4
LT		 2107 }
2108
e315cd28
AC		 2109 pci_set_drvdata(pdev, base_vha);
2110
e315cd28 2111 host = base_vha->host;
2afa19a9 2112 base_vha->req = req;
73208dfd
AC		 2113 host->can_queue = req->length + 128;
2114 if (IS_QLA2XXX_MIDTYPE(ha))
e315cd28 2115 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
73208dfd 2116 else
e315cd28
AC		 2117 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2118 base_vha->vp_idx;
58548cb5
GM		 2119
2120 /* Set the SG table size based on ISP type */
2121 if (!IS_FWI2_CAPABLE(ha)) {
2122 if (IS_QLA2100(ha))
2123 host->sg_tablesize = 32;
2124 } else {
2125 if (!IS_QLA82XX(ha))
2126 host->sg_tablesize = QLA_SG_ALL;
2127 }
2128
e315cd28
AC		 2129 host->max_id = max_id;
2130 host->this_id = 255;
2131 host->cmd_per_lun = 3;
2132 host->unique_id = host->host_no;
0c470874
AE		 2133 if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif)
2134 host->max_cmd_len = 32;
2135 else
2136 host->max_cmd_len = MAX_CMDSZ;
e315cd28
AC		 2137 host->max_channel = MAX_BUSES - 1;
2138 host->max_lun = MAX_LUNS;
2139 host->transportt = qla2xxx_transport_template;
9a069e19 2140 sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
e315cd28 2141
73208dfd
AC		 2142 /* Set up the irqs */
2143 ret = qla2x00_request_irqs(ha, rsp);
2144 if (ret)
6e9f21f3 2145 goto probe_init_failed;
90a86fc0
JC		 2146
2147 pci_save_state(pdev);
2148
73208dfd 2149 /* Alloc arrays of request and response ring ptrs */
7163ea81 2150que_init:
73208dfd
AC		 2151 if (!qla2x00_alloc_queues(ha)) {
2152 qla_printk(KERN_WARNING, ha,
2153 "[ERROR] Failed to allocate memory for queue"
2154 " pointers\n");
6e9f21f3 2155 goto probe_init_failed;
73208dfd 2156 }
a9083016 2157
73208dfd
AC		 2158 ha->rsp_q_map[0] = rsp;
2159 ha->req_q_map[0] = req;
2afa19a9
AC		 2160 rsp->req = req;
2161 req->rsp = rsp;
2162 set_bit(0, ha->req_qid_map);
2163 set_bit(0, ha->rsp_qid_map);
08029990
AV		 2164 /* FWI2-capable only. */
2165 req->req_q_in = &ha->iobase->isp24.req_q_in;
2166 req->req_q_out = &ha->iobase->isp24.req_q_out;
2167 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2168 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
17d98630 2169 if (ha->mqenable) {
08029990
AV		 2170 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2171 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2172 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2173 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
17d98630
AC		 2174 }
2175
a9083016
GM		 2176 if (IS_QLA82XX(ha)) {
2177 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2178 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2179 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2180 }
2181
e315cd28 2182 if (qla2x00_initialize_adapter(base_vha)) {
1da177e4
LT		 2183 qla_printk(KERN_WARNING, ha,
2184 "Failed to initialize adapter\n");
2185
2186 DEBUG2(printk("scsi(%ld): Failed to initialize adapter - "
2187 "Adapter flags %x.\n",
e315cd28 2188 base_vha->host_no, base_vha->device_flags));
1da177e4 2189
a9083016
GM		 2190 if (IS_QLA82XX(ha)) {
2191 qla82xx_idc_lock(ha);
2192 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2193 QLA82XX_DEV_FAILED);
2194 qla82xx_idc_unlock(ha);
2195 qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
2196 }
2197
a1541d5a 2198 ret = -ENODEV;
1da177e4
LT		 2199 goto probe_failed;
2200 }
2201
7163ea81
AC		 2202 if (ha->mqenable) {
2203 if (qla25xx_setup_mode(base_vha)) {
68ca949c
AC		 2204 qla_printk(KERN_WARNING, ha,
2205 "Can't create queues, falling back to single"
2206 " queue mode\n");
7163ea81
AC		 2207 goto que_init;
2208 }
2209 }
68ca949c 2210
cbc8eb67
AV		 2211 if (ha->flags.running_gold_fw)
2212 goto skip_dpc;
2213
1da177e4
LT		 2214 /*
2215 * Startup the kernel thread for this host adapter
2216 */
39a11240 2217 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
e315cd28 2218 "%s_dpc", base_vha->host_str);
39a11240 2219 if (IS_ERR(ha->dpc_thread)) {
1da177e4
LT		 2220 qla_printk(KERN_WARNING, ha,
2221 "Unable to start DPC thread!\n");
39a11240 2222 ret = PTR_ERR(ha->dpc_thread);
1da177e4
LT		 2223 goto probe_failed;
2224 }
1da177e4 2225
cbc8eb67 2226skip_dpc:
e315cd28
AC		 2227 list_add_tail(&base_vha->list, &ha->vp_list);
2228 base_vha->host->irq = ha->pdev->irq;
1da177e4
LT		 2229
2230 /* Initialized the timer */
e315cd28 2231 qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
1da177e4
LT		 2232
2233 DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n",
e315cd28 2234 base_vha->host_no, ha));
d19044c3 2235
ba77ef53 2236 if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif) {
bad75002
AE		 2237 if (ha->fw_attributes & BIT_4) {
2238 base_vha->flags.difdix_supported = 1;
2239 DEBUG18(qla_printk(KERN_INFO, ha,
2240 "Registering for DIF/DIX type 1 and 3"
2241 " protection.\n"));
2242 scsi_host_set_prot(host,
2243 SHOST_DIF_TYPE1_PROTECTION
0c470874 2244 | SHOST_DIF_TYPE2_PROTECTION
bad75002
AE		 2245 | SHOST_DIF_TYPE3_PROTECTION
2246 | SHOST_DIX_TYPE1_PROTECTION
0c470874 2247 | SHOST_DIX_TYPE2_PROTECTION
bad75002
AE		 2248 | SHOST_DIX_TYPE3_PROTECTION);
2249 scsi_host_set_guard(host, SHOST_DIX_GUARD_CRC);
2250 } else
2251 base_vha->flags.difdix_supported = 0;
2252 }
2253
a9083016
GM		 2254 ha->isp_ops->enable_intrs(ha);
2255
a1541d5a
AV		 2256 ret = scsi_add_host(host, &pdev->dev);
2257 if (ret)
2258 goto probe_failed;
2259
1486400f
MR		 2260 base_vha->flags.init_done = 1;
2261 base_vha->flags.online = 1;
2262
1e99e33a
AV		 2263 scsi_scan_host(host);
2264
e315cd28 2265 qla2x00_alloc_sysfs_attr(base_vha);
a1541d5a 2266
e315cd28 2267 qla2x00_init_host_attr(base_vha);
a1541d5a 2268
e315cd28 2269 qla2x00_dfs_setup(base_vha);
df613b96 2270
1da177e4
LT		 2271 qla_printk(KERN_INFO, ha, "\n"
2272 " QLogic Fibre Channel HBA Driver: %s\n"
2273 " QLogic %s - %s\n"
5433383e
AV		 2274 " ISP%04X: %s @ %s hdma%c, host#=%ld, fw=%s\n",
2275 qla2x00_version_str, ha->model_number,
e315cd28
AC		 2276 ha->model_desc ? ha->model_desc : "", pdev->device,
2277 ha->isp_ops->pci_info_str(base_vha, pci_info), pci_name(pdev),
2278 ha->flags.enable_64bit_addressing ? '+' : '-', base_vha->host_no,
2279 ha->isp_ops->fw_version_str(base_vha, fw_str));
1da177e4 2280
1da177e4
LT		 2281 return 0;
2282
6e9f21f3 2283probe_init_failed:
2afa19a9
AC		 2284 qla2x00_free_req_que(ha, req);
2285 qla2x00_free_rsp_que(ha, rsp);
2286 ha->max_req_queues = ha->max_rsp_queues = 0;
6e9f21f3 2287
1da177e4 2288probe_failed:
b9978769
AV		 2289 if (base_vha->timer_active)
2290 qla2x00_stop_timer(base_vha);
2291 base_vha->flags.online = 0;
2292 if (ha->dpc_thread) {
2293 struct task_struct *t = ha->dpc_thread;
2294
2295 ha->dpc_thread = NULL;
2296 kthread_stop(t);
2297 }
2298
e315cd28 2299 qla2x00_free_device(base_vha);
1da177e4 2300
e315cd28 2301 scsi_host_put(base_vha->host);
1da177e4 2302
e315cd28 2303probe_hw_failed:
a9083016
GM		 2304 if (IS_QLA82XX(ha)) {
2305 qla82xx_idc_lock(ha);
2306 qla82xx_clear_drv_active(ha);
2307 qla82xx_idc_unlock(ha);
2308 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2309 if (!ql2xdbwr)
2310 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2311 } else {
2312 if (ha->iobase)
2313 iounmap(ha->iobase);
2314 }
e315cd28
AC		 2315 pci_release_selected_regions(ha->pdev, ha->bars);
2316 kfree(ha);
2317 ha = NULL;
1da177e4 2318
a1541d5a 2319probe_out:
e315cd28 2320 pci_disable_device(pdev);
a1541d5a 2321 return ret;
1da177e4 2322}
1da177e4 2323
e30d1756
MI		 2324static void
2325qla2x00_shutdown(struct pci_dev *pdev)
2326{
2327 scsi_qla_host_t *vha;
2328 struct qla_hw_data *ha;
2329
2330 vha = pci_get_drvdata(pdev);
2331 ha = vha->hw;
2332
2333 /* Turn-off FCE trace */
2334 if (ha->flags.fce_enabled) {
2335 qla2x00_disable_fce_trace(vha, NULL, NULL);
2336 ha->flags.fce_enabled = 0;
2337 }
2338
2339 /* Turn-off EFT trace */
2340 if (ha->eft)
2341 qla2x00_disable_eft_trace(vha);
2342
2343 /* Stop currently executing firmware. */
2344 qla2x00_try_to_stop_firmware(vha);
2345
2346 /* Turn adapter off line */
2347 vha->flags.online = 0;
2348
2349 /* turn-off interrupts on the card */
2350 if (ha->interrupts_on) {
2351 vha->flags.init_done = 0;
2352 ha->isp_ops->disable_intrs(ha);
2353 }
2354
2355 qla2x00_free_irqs(vha);
2356
2357 qla2x00_free_fw_dump(ha);
2358}
2359
4c993f76 2360static void
7ee61397 2361qla2x00_remove_one(struct pci_dev *pdev)
1da177e4 2362{
feafb7b1 2363 scsi_qla_host_t *base_vha, *vha;
e315cd28 2364 struct qla_hw_data *ha;
feafb7b1 2365 unsigned long flags;
e315cd28
AC		 2366
2367 base_vha = pci_get_drvdata(pdev);
2368 ha = base_vha->hw;
2369
feafb7b1
AE		 2370 spin_lock_irqsave(&ha->vport_slock, flags);
2371 list_for_each_entry(vha, &ha->vp_list, list) {
2372 atomic_inc(&vha->vref_count);
2373
2374 if (vha && vha->fc_vport) {
2375 spin_unlock_irqrestore(&ha->vport_slock, flags);
2376
e315cd28 2377 fc_vport_terminate(vha->fc_vport);
feafb7b1
AE		 2378
2379 spin_lock_irqsave(&ha->vport_slock, flags);
2380 }
2381
2382 atomic_dec(&vha->vref_count);
e315cd28 2383 }
feafb7b1 2384 spin_unlock_irqrestore(&ha->vport_slock, flags);
1da177e4 2385
e315cd28 2386 set_bit(UNLOADING, &base_vha->dpc_flags);
1da177e4 2387
b9978769
AV		 2388 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
2389
e315cd28 2390 qla2x00_dfs_remove(base_vha);
c795c1e4 2391
e315cd28 2392 qla84xx_put_chip(base_vha);
c795c1e4 2393
b9978769
AV		 2394 /* Disable timer */
2395 if (base_vha->timer_active)
2396 qla2x00_stop_timer(base_vha);
2397
2398 base_vha->flags.online = 0;
2399
68ca949c
AC		 2400 /* Flush the work queue and remove it */
2401 if (ha->wq) {
2402 flush_workqueue(ha->wq);
2403 destroy_workqueue(ha->wq);
2404 ha->wq = NULL;
2405 }
2406
b9978769
AV		 2407 /* Kill the kernel thread for this host */
2408 if (ha->dpc_thread) {
2409 struct task_struct *t = ha->dpc_thread;
2410
2411 /*
2412 * qla2xxx_wake_dpc checks for ->dpc_thread
2413 * so we need to zero it out.
2414 */
2415 ha->dpc_thread = NULL;
2416 kthread_stop(t);
2417 }
2418
e315cd28 2419 qla2x00_free_sysfs_attr(base_vha);
df613b96 2420
e315cd28 2421 fc_remove_host(base_vha->host);
4d4df193 2422
e315cd28 2423 scsi_remove_host(base_vha->host);
1da177e4 2424
e315cd28 2425 qla2x00_free_device(base_vha);
bdf79621 2426
e315cd28 2427 scsi_host_put(base_vha->host);
1da177e4 2428
a9083016 2429 if (IS_QLA82XX(ha)) {
b963752f
GM		 2430 qla82xx_idc_lock(ha);
2431 qla82xx_clear_drv_active(ha);
2432 qla82xx_idc_unlock(ha);
2433
a9083016
GM		 2434 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2435 if (!ql2xdbwr)
2436 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2437 } else {
2438 if (ha->iobase)
2439 iounmap(ha->iobase);
1da177e4 2440
a9083016
GM		 2441 if (ha->mqiobase)
2442 iounmap(ha->mqiobase);
2443 }
73208dfd 2444
e315cd28
AC		 2445 pci_release_selected_regions(ha->pdev, ha->bars);
2446 kfree(ha);
2447 ha = NULL;
1da177e4 2448
90a86fc0
JC		 2449 pci_disable_pcie_error_reporting(pdev);
2450
665db93b 2451 pci_disable_device(pdev);
1da177e4
LT		 2452 pci_set_drvdata(pdev, NULL);
2453}
1da177e4
LT		 2454
2455static void
e315cd28 2456qla2x00_free_device(scsi_qla_host_t *vha)
1da177e4 2457{
e315cd28 2458 struct qla_hw_data *ha = vha->hw;
1da177e4 2459
85880801
AV		 2460 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
2461
2462 /* Disable timer */
2463 if (vha->timer_active)
2464 qla2x00_stop_timer(vha);
2465
2466 /* Kill the kernel thread for this host */
2467 if (ha->dpc_thread) {
2468 struct task_struct *t = ha->dpc_thread;
2469
2470 /*
2471 * qla2xxx_wake_dpc checks for ->dpc_thread
2472 * so we need to zero it out.
2473 */
2474 ha->dpc_thread = NULL;
2475 kthread_stop(t);
2476 }
2477
2afa19a9
AC		 2478 qla25xx_delete_queues(vha);
2479
df613b96 2480 if (ha->flags.fce_enabled)
e315cd28 2481 qla2x00_disable_fce_trace(vha, NULL, NULL);
df613b96 2482
a7a167bf 2483 if (ha->eft)
e315cd28 2484 qla2x00_disable_eft_trace(vha);
a7a167bf 2485
f6ef3b18 2486 /* Stop currently executing firmware. */
e315cd28 2487 qla2x00_try_to_stop_firmware(vha);
1da177e4 2488
85880801
AV		 2489 vha->flags.online = 0;
2490
f6ef3b18 2491 /* turn-off interrupts on the card */
a9083016
GM		 2492 if (ha->interrupts_on) {
2493 vha->flags.init_done = 0;
fd34f556 2494 ha->isp_ops->disable_intrs(ha);
a9083016 2495 }
f6ef3b18 2496
e315cd28 2497 qla2x00_free_irqs(vha);
1da177e4 2498
8867048b
CD		 2499 qla2x00_free_fcports(vha);
2500
e315cd28 2501 qla2x00_mem_free(ha);
73208dfd
AC		 2502
2503 qla2x00_free_queues(ha);
1da177e4
LT		 2504}
2505
8867048b
CD		 2506void qla2x00_free_fcports(struct scsi_qla_host *vha)
2507{
2508 fc_port_t *fcport, *tfcport;
2509
2510 list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
2511 list_del(&fcport->list);
2512 kfree(fcport);
2513 fcport = NULL;
2514 }
2515}
2516
d97994dc 2517static inline void
e315cd28 2518qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
d97994dc
AV		 2519 int defer)
2520{
d97994dc 2521 struct fc_rport *rport;
67becc00 2522 scsi_qla_host_t *base_vha;
d97994dc
AV		 2523
2524 if (!fcport->rport)
2525 return;
2526
2527 rport = fcport->rport;
2528 if (defer) {
67becc00 2529 base_vha = pci_get_drvdata(vha->hw->pdev);
e315cd28 2530 spin_lock_irq(vha->host->host_lock);
d97994dc 2531 fcport->drport = rport;
e315cd28 2532 spin_unlock_irq(vha->host->host_lock);
67becc00
AV		 2533 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
2534 qla2xxx_wake_dpc(base_vha);
5f3a9a20 2535 } else
d97994dc 2536 fc_remote_port_delete(rport);
d97994dc
AV		 2537}
2538
1da177e4
LT		 2539/*
2540 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
2541 *
2542 * Input: ha = adapter block pointer. fcport = port structure pointer.
2543 *
2544 * Return: None.
2545 *
2546 * Context:
2547 */
e315cd28 2548void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
d97994dc 2549 int do_login, int defer)
1da177e4 2550{
2c3dfe3f 2551 if (atomic_read(&fcport->state) == FCS_ONLINE &&
e315cd28
AC		 2552 vha->vp_idx == fcport->vp_idx) {
2553 atomic_set(&fcport->state, FCS_DEVICE_LOST);
2554 qla2x00_schedule_rport_del(vha, fcport, defer);
2555 }
fa2a1ce5 2556 /*
1da177e4
LT		 2557 * We may need to retry the login, so don't change the state of the
2558 * port but do the retries.
2559 */
2560 if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
2561 atomic_set(&fcport->state, FCS_DEVICE_LOST);
2562
2563 if (!do_login)
2564 return;
2565
2566 if (fcport->login_retry == 0) {
e315cd28
AC		 2567 fcport->login_retry = vha->hw->login_retry_count;
2568 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1da177e4
LT		 2569
2570 DEBUG(printk("scsi(%ld): Port login retry: "
2571 "%02x%02x%02x%02x%02x%02x%02x%02x, "
2572 "id = 0x%04x retry cnt=%d\n",
e315cd28 2573 vha->host_no,
1da177e4
LT		 2574 fcport->port_name[0],
2575 fcport->port_name[1],
2576 fcport->port_name[2],
2577 fcport->port_name[3],
2578 fcport->port_name[4],
2579 fcport->port_name[5],
2580 fcport->port_name[6],
2581 fcport->port_name[7],
2582 fcport->loop_id,
2583 fcport->login_retry));
2584 }
2585}
2586
2587/*
2588 * qla2x00_mark_all_devices_lost
2589 * Updates fcport state when device goes offline.
2590 *
2591 * Input:
2592 * ha = adapter block pointer.
2593 * fcport = port structure pointer.
2594 *
2595 * Return:
2596 * None.
2597 *
2598 * Context:
2599 */
2600void
e315cd28 2601qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
1da177e4
LT		 2602{
2603 fc_port_t *fcport;
2604
e315cd28 2605 list_for_each_entry(fcport, &vha->vp_fcports, list) {
0d6e61bc 2606 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx)
1da177e4 2607 continue;
0d6e61bc 2608
1da177e4
LT		 2609 /*
2610 * No point in marking the device as lost, if the device is
2611 * already DEAD.
2612 */
2613 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
2614 continue;
e315cd28 2615 if (atomic_read(&fcport->state) == FCS_ONLINE) {
0d6e61bc
AV		 2616 if (defer)
2617 qla2x00_schedule_rport_del(vha, fcport, defer);
2618 else if (vha->vp_idx == fcport->vp_idx)
2619 qla2x00_schedule_rport_del(vha, fcport, defer);
2620 }
2621 atomic_set(&fcport->state, FCS_DEVICE_LOST);
1da177e4
LT		 2622 }
2623}
2624
2625/*
2626* qla2x00_mem_alloc
2627* Allocates adapter memory.
2628*
2629* Returns:
2630* 0 = success.
e8711085 2631* !0 = failure.
1da177e4 2632*/
e8711085 2633static int
73208dfd
AC		 2634qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
2635 struct req_que **req, struct rsp_que **rsp)
1da177e4
LT		 2636{
2637 char name[16];
1da177e4 2638
e8711085 2639 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
e315cd28 2640 &ha->init_cb_dma, GFP_KERNEL);
e8711085 2641 if (!ha->init_cb)
e315cd28 2642 goto fail;
e8711085 2643
e315cd28
AC		 2644 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE,
2645 &ha->gid_list_dma, GFP_KERNEL);
2646 if (!ha->gid_list)
e8711085 2647 goto fail_free_init_cb;
1da177e4 2648
e8711085
AV		 2649 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
2650 if (!ha->srb_mempool)
e315cd28 2651 goto fail_free_gid_list;
e8711085 2652
a9083016
GM		 2653 if (IS_QLA82XX(ha)) {
2654 /* Allocate cache for CT6 Ctx. */
2655 if (!ctx_cachep) {
2656 ctx_cachep = kmem_cache_create("qla2xxx_ctx",
2657 sizeof(struct ct6_dsd), 0,
2658 SLAB_HWCACHE_ALIGN, NULL);
2659 if (!ctx_cachep)
2660 goto fail_free_gid_list;
2661 }
2662 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
2663 ctx_cachep);
2664 if (!ha->ctx_mempool)
2665 goto fail_free_srb_mempool;
2666 }
2667
e8711085
AV		 2668 /* Get memory for cached NVRAM */
2669 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
2670 if (!ha->nvram)
a9083016 2671 goto fail_free_ctx_mempool;
e8711085 2672
e315cd28
AC		 2673 snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
2674 ha->pdev->device);
2675 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2676 DMA_POOL_SIZE, 8, 0);
2677 if (!ha->s_dma_pool)
2678 goto fail_free_nvram;
2679
bad75002 2680 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2681 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2682 DSD_LIST_DMA_POOL_SIZE, 8, 0);
2683 if (!ha->dl_dma_pool) {
2684 qla_printk(KERN_WARNING, ha,
2685 "Memory Allocation failed - dl_dma_pool\n");
2686 goto fail_s_dma_pool;
2687 }
2688
2689 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2690 FCP_CMND_DMA_POOL_SIZE, 8, 0);
2691 if (!ha->fcp_cmnd_dma_pool) {
2692 qla_printk(KERN_WARNING, ha,
2693 "Memory Allocation failed - fcp_cmnd_dma_pool\n");
2694 goto fail_dl_dma_pool;
2695 }
2696 }
2697
e8711085
AV		 2698 /* Allocate memory for SNS commands */
2699 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
e315cd28 2700 /* Get consistent memory allocated for SNS commands */
e8711085 2701 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
e315cd28 2702 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
e8711085 2703 if (!ha->sns_cmd)
e315cd28 2704 goto fail_dma_pool;
e8711085 2705 } else {
e315cd28 2706 /* Get consistent memory allocated for MS IOCB */
e8711085 2707 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
e315cd28 2708 &ha->ms_iocb_dma);
e8711085 2709 if (!ha->ms_iocb)
e315cd28
AC		 2710 goto fail_dma_pool;
2711 /* Get consistent memory allocated for CT SNS commands */
e8711085 2712 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
e315cd28 2713 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
e8711085
AV		 2714 if (!ha->ct_sns)
2715 goto fail_free_ms_iocb;
1da177e4
LT		 2716 }
2717
e315cd28 2718 /* Allocate memory for request ring */
73208dfd
AC		 2719 *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
2720 if (!*req) {
e315cd28
AC		 2721 DEBUG(printk("Unable to allocate memory for req\n"));
2722 goto fail_req;
2723 }
73208dfd
AC		 2724 (*req)->length = req_len;
2725 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
2726 ((*req)->length + 1) * sizeof(request_t),
2727 &(*req)->dma, GFP_KERNEL);
2728 if (!(*req)->ring) {
e315cd28
AC		 2729 DEBUG(printk("Unable to allocate memory for req_ring\n"));
2730 goto fail_req_ring;
2731 }
2732 /* Allocate memory for response ring */
73208dfd
AC		 2733 *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
2734 if (!*rsp) {
2735 qla_printk(KERN_WARNING, ha,
2736 "Unable to allocate memory for rsp\n");
e315cd28
AC		 2737 goto fail_rsp;
2738 }
73208dfd
AC		 2739 (*rsp)->hw = ha;
2740 (*rsp)->length = rsp_len;
2741 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
2742 ((*rsp)->length + 1) * sizeof(response_t),
2743 &(*rsp)->dma, GFP_KERNEL);
2744 if (!(*rsp)->ring) {
2745 qla_printk(KERN_WARNING, ha,
2746 "Unable to allocate memory for rsp_ring\n");
e315cd28
AC		 2747 goto fail_rsp_ring;
2748 }
73208dfd
AC		 2749 (*req)->rsp = *rsp;
2750 (*rsp)->req = *req;
2751 /* Allocate memory for NVRAM data for vports */
2752 if (ha->nvram_npiv_size) {
2753 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
2754 ha->nvram_npiv_size, GFP_KERNEL);
2755 if (!ha->npiv_info) {
2756 qla_printk(KERN_WARNING, ha,
2757 "Unable to allocate memory for npiv info\n");
2758 goto fail_npiv_info;
2759 }
2760 } else
2761 ha->npiv_info = NULL;
e8711085 2762
b64b0e8f 2763 /* Get consistent memory allocated for EX-INIT-CB. */
a9083016 2764 if (IS_QLA8XXX_TYPE(ha)) {
b64b0e8f
AV		 2765 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2766 &ha->ex_init_cb_dma);
2767 if (!ha->ex_init_cb)
2768 goto fail_ex_init_cb;
2769 }
2770
a9083016
GM		 2771 INIT_LIST_HEAD(&ha->gbl_dsd_list);
2772
5ff1d584
AV		 2773 /* Get consistent memory allocated for Async Port-Database. */
2774 if (!IS_FWI2_CAPABLE(ha)) {
2775 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2776 &ha->async_pd_dma);
2777 if (!ha->async_pd)
2778 goto fail_async_pd;
2779 }
2780
e315cd28
AC		 2781 INIT_LIST_HEAD(&ha->vp_list);
2782 return 1;
2783
5ff1d584
AV		 2784fail_async_pd:
2785 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
b64b0e8f
AV		 2786fail_ex_init_cb:
2787 kfree(ha->npiv_info);
73208dfd
AC		 2788fail_npiv_info:
2789 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
2790 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
2791 (*rsp)->ring = NULL;
2792 (*rsp)->dma = 0;
e315cd28 2793fail_rsp_ring:
73208dfd 2794 kfree(*rsp);
e315cd28 2795fail_rsp:
73208dfd
AC		 2796 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
2797 sizeof(request_t), (*req)->ring, (*req)->dma);
2798 (*req)->ring = NULL;
2799 (*req)->dma = 0;
e315cd28 2800fail_req_ring:
73208dfd 2801 kfree(*req);
e315cd28
AC		 2802fail_req:
2803 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
2804 ha->ct_sns, ha->ct_sns_dma);
2805 ha->ct_sns = NULL;
2806 ha->ct_sns_dma = 0;
e8711085
AV		 2807fail_free_ms_iocb:
2808 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2809 ha->ms_iocb = NULL;
2810 ha->ms_iocb_dma = 0;
e315cd28 2811fail_dma_pool:
bad75002 2812 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2813 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2814 ha->fcp_cmnd_dma_pool = NULL;
2815 }
2816fail_dl_dma_pool:
bad75002 2817 if (IS_QLA82XX(ha) || ql2xenabledif) {
a9083016
GM		 2818 dma_pool_destroy(ha->dl_dma_pool);
2819 ha->dl_dma_pool = NULL;
2820 }
2821fail_s_dma_pool:
e315cd28
AC		 2822 dma_pool_destroy(ha->s_dma_pool);
2823 ha->s_dma_pool = NULL;
e8711085
AV		 2824fail_free_nvram:
2825 kfree(ha->nvram);
2826 ha->nvram = NULL;
a9083016
GM		 2827fail_free_ctx_mempool:
2828 mempool_destroy(ha->ctx_mempool);
2829 ha->ctx_mempool = NULL;
e8711085
AV		 2830fail_free_srb_mempool:
2831 mempool_destroy(ha->srb_mempool);
2832 ha->srb_mempool = NULL;
e8711085
AV		 2833fail_free_gid_list:
2834 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
e315cd28 2835 ha->gid_list_dma);
e8711085
AV		 2836 ha->gid_list = NULL;
2837 ha->gid_list_dma = 0;
e315cd28
AC		 2838fail_free_init_cb:
2839 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
2840 ha->init_cb_dma);
2841 ha->init_cb = NULL;
2842 ha->init_cb_dma = 0;
e8711085 2843fail:
e315cd28 2844 DEBUG(printk("%s: Memory allocation failure\n", __func__));
e8711085 2845 return -ENOMEM;
1da177e4
LT		 2846}
2847
2848/*
e30d1756
MI		 2849* qla2x00_free_fw_dump
2850* Frees fw dump stuff.
1da177e4
LT		 2851*
2852* Input:
e30d1756 2853* ha = adapter block pointer.
1da177e4 2854*/
a824ebb3 2855static void
e30d1756 2856qla2x00_free_fw_dump(struct qla_hw_data *ha)
1da177e4 2857{
df613b96
AV		 2858 if (ha->fce)
2859 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
e30d1756 2860 ha->fce_dma);
df613b96 2861
a7a167bf
AV		 2862 if (ha->fw_dump) {
2863 if (ha->eft)
2864 dma_free_coherent(&ha->pdev->dev,
e30d1756 2865 ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
a7a167bf
AV		 2866 vfree(ha->fw_dump);
2867 }
e30d1756
MI		 2868 ha->fce = NULL;
2869 ha->fce_dma = 0;
2870 ha->eft = NULL;
2871 ha->eft_dma = 0;
2872 ha->fw_dump = NULL;
2873 ha->fw_dumped = 0;
2874 ha->fw_dump_reading = 0;
2875}
2876
2877/*
2878* qla2x00_mem_free
2879* Frees all adapter allocated memory.
2880*
2881* Input:
2882* ha = adapter block pointer.
2883*/
2884static void
2885qla2x00_mem_free(struct qla_hw_data *ha)
2886{
2887 qla2x00_free_fw_dump(ha);
2888
2889 if (ha->srb_mempool)
2890 mempool_destroy(ha->srb_mempool);
a7a167bf 2891
11bbc1d8
AV		 2892 if (ha->dcbx_tlv)
2893 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
2894 ha->dcbx_tlv, ha->dcbx_tlv_dma);
2895
ce0423f4
AV		 2896 if (ha->xgmac_data)
2897 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
2898 ha->xgmac_data, ha->xgmac_data_dma);
2899
1da177e4
LT		 2900 if (ha->sns_cmd)
2901 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
e315cd28 2902 ha->sns_cmd, ha->sns_cmd_dma);
1da177e4
LT		 2903
2904 if (ha->ct_sns)
2905 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
e315cd28 2906 ha->ct_sns, ha->ct_sns_dma);
1da177e4 2907
88729e53
AV		 2908 if (ha->sfp_data)
2909 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
2910
ad0ecd61
JC		 2911 if (ha->edc_data)
2912 dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma);
2913
1da177e4
LT		 2914 if (ha->ms_iocb)
2915 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2916
b64b0e8f 2917 if (ha->ex_init_cb)
a9083016
GM		 2918 dma_pool_free(ha->s_dma_pool,
2919 ha->ex_init_cb, ha->ex_init_cb_dma);
b64b0e8f 2920
5ff1d584
AV		 2921 if (ha->async_pd)
2922 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
2923
1da177e4
LT		 2924 if (ha->s_dma_pool)
2925 dma_pool_destroy(ha->s_dma_pool);
2926
1da177e4
LT		 2927 if (ha->gid_list)
2928 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
e315cd28 2929 ha->gid_list_dma);
1da177e4 2930
a9083016
GM		 2931 if (IS_QLA82XX(ha)) {
2932 if (!list_empty(&ha->gbl_dsd_list)) {
2933 struct dsd_dma *dsd_ptr, *tdsd_ptr;
2934
2935 /* clean up allocated prev pool */
2936 list_for_each_entry_safe(dsd_ptr,
2937 tdsd_ptr, &ha->gbl_dsd_list, list) {
2938 dma_pool_free(ha->dl_dma_pool,
2939 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
2940 list_del(&dsd_ptr->list);
2941 kfree(dsd_ptr);
2942 }
2943 }
2944 }
2945
2946 if (ha->dl_dma_pool)
2947 dma_pool_destroy(ha->dl_dma_pool);
2948
2949 if (ha->fcp_cmnd_dma_pool)
2950 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2951
2952 if (ha->ctx_mempool)
2953 mempool_destroy(ha->ctx_mempool);
2954
e315cd28
AC		 2955 if (ha->init_cb)
2956 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
a9083016 2957 ha->init_cb, ha->init_cb_dma);
e315cd28
AC		 2958 vfree(ha->optrom_buffer);
2959 kfree(ha->nvram);
73208dfd 2960 kfree(ha->npiv_info);
1da177e4 2961
e8711085 2962 ha->srb_mempool = NULL;
a9083016 2963 ha->ctx_mempool = NULL;
1da177e4
LT		 2964 ha->sns_cmd = NULL;
2965 ha->sns_cmd_dma = 0;
2966 ha->ct_sns = NULL;
2967 ha->ct_sns_dma = 0;
2968 ha->ms_iocb = NULL;
2969 ha->ms_iocb_dma = 0;
1da177e4
LT		 2970 ha->init_cb = NULL;
2971 ha->init_cb_dma = 0;
b64b0e8f
AV		 2972 ha->ex_init_cb = NULL;
2973 ha->ex_init_cb_dma = 0;
5ff1d584
AV		 2974 ha->async_pd = NULL;
2975 ha->async_pd_dma = 0;
1da177e4
LT		 2976
2977 ha->s_dma_pool = NULL;
a9083016
GM		 2978 ha->dl_dma_pool = NULL;
2979 ha->fcp_cmnd_dma_pool = NULL;
1da177e4 2980
1da177e4
LT		 2981 ha->gid_list = NULL;
2982 ha->gid_list_dma = 0;
e315cd28 2983}
1da177e4 2984
e315cd28
AC		 2985struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
2986 struct qla_hw_data *ha)
2987{
2988 struct Scsi_Host *host;
2989 struct scsi_qla_host *vha = NULL;
854165f4 2990
e315cd28
AC		 2991 host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
2992 if (host == NULL) {
2993 printk(KERN_WARNING
2994 "qla2xxx: Couldn't allocate host from scsi layer!\n");
2995 goto fail;
2996 }
2997
2998 /* Clear our data area */
2999 vha = shost_priv(host);
3000 memset(vha, 0, sizeof(scsi_qla_host_t));
3001
3002 vha->host = host;
3003 vha->host_no = host->host_no;
3004 vha->hw = ha;
3005
3006 INIT_LIST_HEAD(&vha->vp_fcports);
3007 INIT_LIST_HEAD(&vha->work_list);
3008 INIT_LIST_HEAD(&vha->list);
3009
f999f4c1
AV		 3010 spin_lock_init(&vha->work_lock);
3011
e315cd28
AC		 3012 sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3013 return vha;
3014
3015fail:
3016 return vha;
1da177e4
LT		 3017}
3018
01ef66bb 3019static struct qla_work_evt *
f999f4c1 3020qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
0971de7f
AV		 3021{
3022 struct qla_work_evt *e;
feafb7b1
AE		 3023 uint8_t bail;
3024
3025 QLA_VHA_MARK_BUSY(vha, bail);
3026 if (bail)
3027 return NULL;
0971de7f 3028
f999f4c1 3029 e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
feafb7b1
AE		 3030 if (!e) {
3031 QLA_VHA_MARK_NOT_BUSY(vha);
0971de7f 3032 return NULL;
feafb7b1 3033 }
0971de7f
AV		 3034
3035 INIT_LIST_HEAD(&e->list);
3036 e->type = type;
3037 e->flags = QLA_EVT_FLAG_FREE;
3038 return e;
3039}
3040
01ef66bb 3041static int
f999f4c1 3042qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
0971de7f 3043{
f999f4c1 3044 unsigned long flags;
0971de7f 3045
f999f4c1 3046 spin_lock_irqsave(&vha->work_lock, flags);
e315cd28 3047 list_add_tail(&e->list, &vha->work_list);
f999f4c1 3048 spin_unlock_irqrestore(&vha->work_lock, flags);
e315cd28 3049 qla2xxx_wake_dpc(vha);
f999f4c1 3050
0971de7f
AV		 3051 return QLA_SUCCESS;
3052}
3053
3054int
e315cd28 3055qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
0971de7f
AV		 3056 u32 data)
3057{
3058 struct qla_work_evt *e;
3059
f999f4c1 3060 e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
0971de7f
AV		 3061 if (!e)
3062 return QLA_FUNCTION_FAILED;
3063
3064 e->u.aen.code = code;
3065 e->u.aen.data = data;
f999f4c1 3066 return qla2x00_post_work(vha, e);
0971de7f
AV		 3067}
3068
8a659571
AV		 3069int
3070qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3071{
3072 struct qla_work_evt *e;
3073
f999f4c1 3074 e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
8a659571
AV		 3075 if (!e)
3076 return QLA_FUNCTION_FAILED;
3077
3078 memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
f999f4c1 3079 return qla2x00_post_work(vha, e);
8a659571
AV		 3080}
3081
ac280b67
AV		 3082#define qla2x00_post_async_work(name, type) \
3083int qla2x00_post_async_##name##_work( \
3084 struct scsi_qla_host *vha, \
3085 fc_port_t *fcport, uint16_t *data) \
3086{ \
3087 struct qla_work_evt *e; \
3088 \
3089 e = qla2x00_alloc_work(vha, type); \
3090 if (!e) \
3091 return QLA_FUNCTION_FAILED; \
3092 \
3093 e->u.logio.fcport = fcport; \
3094 if (data) { \
3095 e->u.logio.data[0] = data[0]; \
3096 e->u.logio.data[1] = data[1]; \
3097 } \
3098 return qla2x00_post_work(vha, e); \
3099}
3100
3101qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3102qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3103qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3104qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
5ff1d584
AV		 3105qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3106qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
ac280b67 3107
3420d36c
AV		 3108int
3109qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3110{
3111 struct qla_work_evt *e;
3112
3113 e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3114 if (!e)
3115 return QLA_FUNCTION_FAILED;
3116
3117 e->u.uevent.code = code;
3118 return qla2x00_post_work(vha, e);
3119}
3120
3121static void
3122qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3123{
3124 char event_string[40];
3125 char *envp[] = { event_string, NULL };
3126
3127 switch (code) {
3128 case QLA_UEVENT_CODE_FW_DUMP:
3129 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3130 vha->host_no);
3131 break;
3132 default:
3133 /* do nothing */
3134 break;
3135 }
3136 kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3137}
3138
ac280b67 3139void
e315cd28 3140qla2x00_do_work(struct scsi_qla_host *vha)
0971de7f 3141{
f999f4c1
AV		 3142 struct qla_work_evt *e, *tmp;
3143 unsigned long flags;
3144 LIST_HEAD(work);
0971de7f 3145
f999f4c1
AV		 3146 spin_lock_irqsave(&vha->work_lock, flags);
3147 list_splice_init(&vha->work_list, &work);
3148 spin_unlock_irqrestore(&vha->work_lock, flags);
3149
3150 list_for_each_entry_safe(e, tmp, &work, list) {
0971de7f 3151 list_del_init(&e->list);
0971de7f
AV		 3152
3153 switch (e->type) {
3154 case QLA_EVT_AEN:
e315cd28 3155 fc_host_post_event(vha->host, fc_get_event_number(),
0971de7f
AV		 3156 e->u.aen.code, e->u.aen.data);
3157 break;
8a659571
AV		 3158 case QLA_EVT_IDC_ACK:
3159 qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3160 break;
ac280b67
AV		 3161 case QLA_EVT_ASYNC_LOGIN:
3162 qla2x00_async_login(vha, e->u.logio.fcport,
3163 e->u.logio.data);
3164 break;
3165 case QLA_EVT_ASYNC_LOGIN_DONE:
3166 qla2x00_async_login_done(vha, e->u.logio.fcport,
3167 e->u.logio.data);
3168 break;
3169 case QLA_EVT_ASYNC_LOGOUT:
3170 qla2x00_async_logout(vha, e->u.logio.fcport);
3171 break;
3172 case QLA_EVT_ASYNC_LOGOUT_DONE:
3173 qla2x00_async_logout_done(vha, e->u.logio.fcport,
3174 e->u.logio.data);
3175 break;
5ff1d584
AV		 3176 case QLA_EVT_ASYNC_ADISC:
3177 qla2x00_async_adisc(vha, e->u.logio.fcport,
3178 e->u.logio.data);
3179 break;
3180 case QLA_EVT_ASYNC_ADISC_DONE:
3181 qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3182 e->u.logio.data);
3183 break;
3420d36c
AV		 3184 case QLA_EVT_UEVENT:
3185 qla2x00_uevent_emit(vha, e->u.uevent.code);
3186 break;
0971de7f
AV		 3187 }
3188 if (e->flags & QLA_EVT_FLAG_FREE)
3189 kfree(e);
feafb7b1
AE		 3190
3191 /* For each work completed decrement vha ref count */
3192 QLA_VHA_MARK_NOT_BUSY(vha);
e315cd28 3193 }
e315cd28 3194}
f999f4c1 3195
e315cd28
AC		 3196/* Relogins all the fcports of a vport
3197 * Context: dpc thread
3198 */
3199void qla2x00_relogin(struct scsi_qla_host *vha)
3200{
3201 fc_port_t *fcport;
c6b2fca8 3202 int status;
e315cd28
AC		 3203 uint16_t next_loopid = 0;
3204 struct qla_hw_data *ha = vha->hw;
ac280b67 3205 uint16_t data[2];
e315cd28
AC		 3206
3207 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3208 /*
3209 * If the port is not ONLINE then try to login
3210 * to it if we haven't run out of retries.
3211 */
5ff1d584
AV		 3212 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3213 fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
ac280b67 3214 fcport->login_retry--;
e315cd28 3215 if (fcport->flags & FCF_FABRIC_DEVICE) {
f08b7251 3216 if (fcport->flags & FCF_FCP2_DEVICE)
e315cd28
AC		 3217 ha->isp_ops->fabric_logout(vha,
3218 fcport->loop_id,
3219 fcport->d_id.b.domain,
3220 fcport->d_id.b.area,
3221 fcport->d_id.b.al_pa);
3222
ac280b67 3223 if (IS_ALOGIO_CAPABLE(ha)) {
5ff1d584 3224 fcport->flags |= FCF_ASYNC_SENT;
ac280b67
AV		 3225 data[0] = 0;
3226 data[1] = QLA_LOGIO_LOGIN_RETRIED;
3227 status = qla2x00_post_async_login_work(
3228 vha, fcport, data);
3229 if (status == QLA_SUCCESS)
3230 continue;
3231 /* Attempt a retry. */
3232 status = 1;
3233 } else
3234 status = qla2x00_fabric_login(vha,
3235 fcport, &next_loopid);
e315cd28
AC		 3236 } else
3237 status = qla2x00_local_device_login(vha,
3238 fcport);
3239
e315cd28
AC		 3240 if (status == QLA_SUCCESS) {
3241 fcport->old_loop_id = fcport->loop_id;
3242
3243 DEBUG(printk("scsi(%ld): port login OK: logged "
3244 "in ID 0x%x\n", vha->host_no, fcport->loop_id));
3245
3246 qla2x00_update_fcport(vha, fcport);
3247
3248 } else if (status == 1) {
3249 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3250 /* retry the login again */
3251 DEBUG(printk("scsi(%ld): Retrying"
3252 " %d login again loop_id 0x%x\n",
3253 vha->host_no, fcport->login_retry,
3254 fcport->loop_id));
3255 } else {
3256 fcport->login_retry = 0;
3257 }
3258
3259 if (fcport->login_retry == 0 && status != QLA_SUCCESS)
3260 fcport->loop_id = FC_NO_LOOP_ID;
3261 }
3262 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3263 break;
0971de7f 3264 }
0971de7f
AV		 3265}
3266
1da177e4
LT		 3267/**************************************************************************
3268* qla2x00_do_dpc
3269* This kernel thread is a task that is schedule by the interrupt handler
3270* to perform the background processing for interrupts.
3271*
3272* Notes:
3273* This task always run in the context of a kernel thread. It
3274* is kick-off by the driver's detect code and starts up
3275* up one per adapter. It immediately goes to sleep and waits for
3276* some fibre event. When either the interrupt handler or
3277* the timer routine detects a event it will one of the task
3278* bits then wake us up.
3279**************************************************************************/
3280static int
3281qla2x00_do_dpc(void *data)
3282{
2c3dfe3f 3283 int rval;
e315cd28
AC		 3284 scsi_qla_host_t *base_vha;
3285 struct qla_hw_data *ha;
1da177e4 3286
e315cd28
AC		 3287 ha = (struct qla_hw_data *)data;
3288 base_vha = pci_get_drvdata(ha->pdev);
1da177e4 3289
1da177e4
LT		 3290 set_user_nice(current, -20);
3291
39a11240 3292 while (!kthread_should_stop()) {
1da177e4
LT		 3293 DEBUG3(printk("qla2x00: DPC handler sleeping\n"));
3294
39a11240
CH		 3295 set_current_state(TASK_INTERRUPTIBLE);
3296 schedule();
3297 __set_current_state(TASK_RUNNING);
1da177e4
LT		 3298
3299 DEBUG3(printk("qla2x00: DPC handler waking up\n"));
3300
3301 /* Initialization not yet finished. Don't do anything yet. */
e315cd28 3302 if (!base_vha->flags.init_done)
1da177e4
LT		 3303 continue;
3304
85880801
AV		 3305 if (ha->flags.eeh_busy) {
3306 DEBUG17(qla_printk(KERN_WARNING, ha,
3307 "qla2x00_do_dpc: dpc_flags: %lx\n",
3308 base_vha->dpc_flags));
3309 continue;
3310 }
3311
e315cd28 3312 DEBUG3(printk("scsi(%ld): DPC handler\n", base_vha->host_no));
1da177e4
LT		 3313
3314 ha->dpc_active = 1;
3315
1da177e4 3316 if (ha->flags.mbox_busy) {
1da177e4
LT		 3317 ha->dpc_active = 0;
3318 continue;
3319 }
3320
e315cd28 3321 qla2x00_do_work(base_vha);
0971de7f 3322
a9083016
GM		 3323 if (IS_QLA82XX(ha)) {
3324 if (test_and_clear_bit(ISP_UNRECOVERABLE,
3325 &base_vha->dpc_flags)) {
3326 qla82xx_idc_lock(ha);
3327 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3328 QLA82XX_DEV_FAILED);
3329 qla82xx_idc_unlock(ha);
3330 qla_printk(KERN_INFO, ha,
3331 "HW State: FAILED\n");
3332 qla82xx_device_state_handler(base_vha);
3333 continue;
3334 }
3335
3336 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
3337 &base_vha->dpc_flags)) {
3338
3339 DEBUG(printk(KERN_INFO
3340 "scsi(%ld): dpc: sched "
3341 "qla82xx_fcoe_ctx_reset ha = %p\n",
3342 base_vha->host_no, ha));
3343 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
3344 &base_vha->dpc_flags))) {
3345 if (qla82xx_fcoe_ctx_reset(base_vha)) {
3346 /* FCoE-ctx reset failed.
3347 * Escalate to chip-reset
3348 */
3349 set_bit(ISP_ABORT_NEEDED,
3350 &base_vha->dpc_flags);
3351 }
3352 clear_bit(ABORT_ISP_ACTIVE,
3353 &base_vha->dpc_flags);
3354 }
3355
3356 DEBUG(printk("scsi(%ld): dpc:"
3357 " qla82xx_fcoe_ctx_reset end\n",
3358 base_vha->host_no));
3359 }
3360 }
3361
e315cd28
AC		 3362 if (test_and_clear_bit(ISP_ABORT_NEEDED,
3363 &base_vha->dpc_flags)) {
1da177e4
LT		 3364
3365 DEBUG(printk("scsi(%ld): dpc: sched "
3366 "qla2x00_abort_isp ha = %p\n",
e315cd28 3367 base_vha->host_no, ha));
1da177e4 3368 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
e315cd28 3369 &base_vha->dpc_flags))) {
1da177e4 3370
a9083016 3371 if (ha->isp_ops->abort_isp(base_vha)) {
1da177e4
LT		 3372 /* failed. retry later */
3373 set_bit(ISP_ABORT_NEEDED,
e315cd28 3374 &base_vha->dpc_flags);
99363ef8 3375 }
e315cd28
AC		 3376 clear_bit(ABORT_ISP_ACTIVE,
3377 &base_vha->dpc_flags);
99363ef8
SJ		 3378 }
3379
1da177e4 3380 DEBUG(printk("scsi(%ld): dpc: qla2x00_abort_isp end\n",
e315cd28 3381 base_vha->host_no));
1da177e4
LT		 3382 }
3383
e315cd28
AC		 3384 if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) {
3385 qla2x00_update_fcports(base_vha);
3386 clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
c9c5ced9 3387 }
d97994dc 3388
e315cd28
AC		 3389 if (test_and_clear_bit(RESET_MARKER_NEEDED,
3390 &base_vha->dpc_flags) &&
3391 (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
1da177e4
LT		 3392
3393 DEBUG(printk("scsi(%ld): qla2x00_reset_marker()\n",
e315cd28 3394 base_vha->host_no));
1da177e4 3395
e315cd28
AC		 3396 qla2x00_rst_aen(base_vha);
3397 clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
1da177e4
LT		 3398 }
3399
3400 /* Retry each device up to login retry count */
e315cd28
AC		 3401 if ((test_and_clear_bit(RELOGIN_NEEDED,
3402 &base_vha->dpc_flags)) &&
3403 !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
3404 atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
1da177e4
LT		 3405
3406 DEBUG(printk("scsi(%ld): qla2x00_port_login()\n",
e315cd28
AC		 3407 base_vha->host_no));
3408 qla2x00_relogin(base_vha);
3409
1da177e4 3410 DEBUG(printk("scsi(%ld): qla2x00_port_login - end\n",
e315cd28 3411 base_vha->host_no));
1da177e4
LT		 3412 }
3413
e315cd28
AC		 3414 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
3415 &base_vha->dpc_flags)) {
1da177e4
LT		 3416
3417 DEBUG(printk("scsi(%ld): qla2x00_loop_resync()\n",
e315cd28 3418 base_vha->host_no));
1da177e4
LT		 3419
3420 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
e315cd28 3421 &base_vha->dpc_flags))) {
1da177e4 3422
e315cd28 3423 rval = qla2x00_loop_resync(base_vha);
1da177e4 3424
e315cd28
AC		 3425 clear_bit(LOOP_RESYNC_ACTIVE,
3426 &base_vha->dpc_flags);
1da177e4
LT		 3427 }
3428
3429 DEBUG(printk("scsi(%ld): qla2x00_loop_resync - end\n",
e315cd28 3430 base_vha->host_no));
1da177e4
LT		 3431 }
3432
e315cd28
AC		 3433 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
3434 atomic_read(&base_vha->loop_state) == LOOP_READY) {
3435 clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
3436 qla2xxx_flash_npiv_conf(base_vha);
272976ca
AV		 3437 }
3438
1da177e4 3439 if (!ha->interrupts_on)
fd34f556 3440 ha->isp_ops->enable_intrs(ha);
1da177e4 3441
e315cd28
AC		 3442 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
3443 &base_vha->dpc_flags))
3444 ha->isp_ops->beacon_blink(base_vha);
f6df144c 3445
e315cd28 3446 qla2x00_do_dpc_all_vps(base_vha);
2c3dfe3f 3447
1da177e4
LT		 3448 ha->dpc_active = 0;
3449 } /* End of while(1) */
3450
e315cd28 3451 DEBUG(printk("scsi(%ld): DPC handler exiting\n", base_vha->host_no));
1da177e4
LT		 3452
3453 /*
3454 * Make sure that nobody tries to wake us up again.
3455 */
1da177e4
LT		 3456 ha->dpc_active = 0;
3457
ac280b67
AV		 3458 /* Cleanup any residual CTX SRBs. */
3459 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3460
39a11240
CH		 3461 return 0;
3462}
3463
3464void
e315cd28 3465qla2xxx_wake_dpc(struct scsi_qla_host *vha)
39a11240 3466{
e315cd28 3467 struct qla_hw_data *ha = vha->hw;
c795c1e4
AV		 3468 struct task_struct *t = ha->dpc_thread;
3469
e315cd28 3470 if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
c795c1e4 3471 wake_up_process(t);
1da177e4
LT		 3472}
3473
1da177e4
LT		 3474/*
3475* qla2x00_rst_aen
3476* Processes asynchronous reset.
3477*
3478* Input:
3479* ha = adapter block pointer.
3480*/
3481static void
e315cd28 3482qla2x00_rst_aen(scsi_qla_host_t *vha)
1da177e4 3483{
e315cd28
AC		 3484 if (vha->flags.online && !vha->flags.reset_active &&
3485 !atomic_read(&vha->loop_down_timer) &&
3486 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
1da177e4 3487 do {
e315cd28 3488 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT		 3489
3490 /*
3491 * Issue marker command only when we are going to start
3492 * the I/O.
3493 */
e315cd28
AC		 3494 vha->marker_needed = 1;
3495 } while (!atomic_read(&vha->loop_down_timer) &&
3496 (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
1da177e4
LT		 3497 }
3498}
3499
f4f051eb 3500static void
e315cd28 3501qla2x00_sp_free_dma(srb_t *sp)
f4f051eb
AV		 3502{
3503 struct scsi_cmnd *cmd = sp->cmd;
bad75002 3504 struct qla_hw_data *ha = sp->fcport->vha->hw;
f4f051eb
AV		 3505
3506 if (sp->flags & SRB_DMA_VALID) {
385d70b4 3507 scsi_dma_unmap(cmd);
f4f051eb
AV		 3508 sp->flags &= ~SRB_DMA_VALID;
3509 }
bad75002
AE		 3510
3511 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
3512 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
3513 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
3514 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
3515 }
3516
3517 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
3518 /* List assured to be having elements */
3519 qla2x00_clean_dsd_pool(ha, sp);
3520 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
3521 }
3522
3523 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
3524 dma_pool_free(ha->dl_dma_pool, sp->ctx,
3525 ((struct crc_context *)sp->ctx)->crc_ctx_dma);
3526 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
3527 }
3528
fca29703 3529 CMD_SP(cmd) = NULL;
f4f051eb
AV		 3530}
3531
3dbe756a 3532static void
083a469d 3533qla2x00_sp_final_compl(struct qla_hw_data *ha, srb_t *sp)
f4f051eb
AV		 3534{
3535 struct scsi_cmnd *cmd = sp->cmd;
3536
e315cd28 3537 qla2x00_sp_free_dma(sp);
f4f051eb 3538
a9083016
GM		 3539 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
3540 struct ct6_dsd *ctx = sp->ctx;
3541 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd,
3542 ctx->fcp_cmnd_dma);
3543 list_splice(&ctx->dsd_list, &ha->gbl_dsd_list);
3544 ha->gbl_dsd_inuse -= ctx->dsd_use_cnt;
3545 ha->gbl_dsd_avail += ctx->dsd_use_cnt;
3546 mempool_free(sp->ctx, ha->ctx_mempool);
3547 sp->ctx = NULL;
3548 }
f4f051eb 3549
a9083016 3550 mempool_free(sp, ha->srb_mempool);
f4f051eb
AV		 3551 cmd->scsi_done(cmd);
3552}
bdf79621 3553
083a469d
GM		 3554void
3555qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp)
3556{
3557 if (atomic_read(&sp->ref_count) == 0) {
3558 DEBUG2(qla_printk(KERN_WARNING, ha,
3559 "SP reference-count to ZERO -- sp=%p\n", sp));
3560 DEBUG2(BUG());
3561 return;
3562 }
3563 if (!atomic_dec_and_test(&sp->ref_count))
3564 return;
3565 qla2x00_sp_final_compl(ha, sp);
3566}
3567
1da177e4
LT		 3568/**************************************************************************
3569* qla2x00_timer
3570*
3571* Description:
3572* One second timer
3573*
3574* Context: Interrupt
3575***************************************************************************/
2c3dfe3f 3576void
e315cd28 3577qla2x00_timer(scsi_qla_host_t *vha)
1da177e4 3578{
1da177e4 3579 unsigned long cpu_flags = 0;
1da177e4
LT		 3580 int start_dpc = 0;
3581 int index;
3582 srb_t *sp;
85880801 3583 uint16_t w;
e315cd28 3584 struct qla_hw_data *ha = vha->hw;
73208dfd 3585 struct req_que *req;
85880801 3586
a5b36321
LC		 3587 if (ha->flags.eeh_busy) {
3588 qla2x00_restart_timer(vha, WATCH_INTERVAL);
3589 return;
3590 }
3591
a9083016
GM		 3592 if (IS_QLA82XX(ha))
3593 qla82xx_watchdog(vha);
3594
85880801
AV		 3595 /* Hardware read to raise pending EEH errors during mailbox waits. */
3596 if (!pci_channel_offline(ha->pdev))
3597 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
1da177e4
LT		 3598
3599 /* Loop down handler. */
e315cd28
AC		 3600 if (atomic_read(&vha->loop_down_timer) > 0 &&
3601 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))
3602 && vha->flags.online) {
1da177e4 3603
e315cd28
AC		 3604 if (atomic_read(&vha->loop_down_timer) ==
3605 vha->loop_down_abort_time) {
1da177e4
LT		 3606
3607 DEBUG(printk("scsi(%ld): Loop Down - aborting the "
3608 "queues before time expire\n",
e315cd28 3609 vha->host_no));
1da177e4 3610
e315cd28
AC		 3611 if (!IS_QLA2100(ha) && vha->link_down_timeout)
3612 atomic_set(&vha->loop_state, LOOP_DEAD);
1da177e4 3613
f08b7251
AV		 3614 /*
3615 * Schedule an ISP abort to return any FCP2-device
3616 * commands.
3617 */
2c3dfe3f 3618 /* NPIV - scan physical port only */
e315cd28 3619 if (!vha->vp_idx) {
2c3dfe3f
SJ		 3620 spin_lock_irqsave(&ha->hardware_lock,
3621 cpu_flags);
73208dfd 3622 req = ha->req_q_map[0];
2c3dfe3f
SJ		 3623 for (index = 1;
3624 index < MAX_OUTSTANDING_COMMANDS;
3625 index++) {
3626 fc_port_t *sfcp;
3627
e315cd28 3628 sp = req->outstanding_cmds[index];
2c3dfe3f
SJ		 3629 if (!sp)
3630 continue;
bad75002 3631 if (sp->ctx && !IS_PROT_IO(sp))
cf53b069 3632 continue;
2c3dfe3f 3633 sfcp = sp->fcport;
f08b7251 3634 if (!(sfcp->flags & FCF_FCP2_DEVICE))
2c3dfe3f 3635 continue;
bdf79621 3636
2c3dfe3f 3637 set_bit(ISP_ABORT_NEEDED,
e315cd28 3638 &vha->dpc_flags);
2c3dfe3f
SJ		 3639 break;
3640 }
3641 spin_unlock_irqrestore(&ha->hardware_lock,
e315cd28 3642 cpu_flags);
1da177e4 3643 }
1da177e4
LT		 3644 start_dpc++;
3645 }
3646
3647 /* if the loop has been down for 4 minutes, reinit adapter */
e315cd28 3648 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
0d6e61bc 3649 if (!(vha->device_flags & DFLG_NO_CABLE)) {
1da177e4
LT		 3650 DEBUG(printk("scsi(%ld): Loop down - "
3651 "aborting ISP.\n",
e315cd28 3652 vha->host_no));
1da177e4
LT		 3653 qla_printk(KERN_WARNING, ha,
3654 "Loop down - aborting ISP.\n");
3655
e315cd28 3656 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 3657 }
3658 }
fca29703 3659 DEBUG3(printk("scsi(%ld): Loop Down - seconds remaining %d\n",
e315cd28
AC		 3660 vha->host_no,
3661 atomic_read(&vha->loop_down_timer)));
1da177e4
LT		 3662 }
3663
f6df144c
AV		 3664 /* Check if beacon LED needs to be blinked */
3665 if (ha->beacon_blink_led == 1) {
e315cd28 3666 set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
f6df144c
AV		 3667 start_dpc++;
3668 }
3669
550bf57d 3670 /* Process any deferred work. */
e315cd28 3671 if (!list_empty(&vha->work_list))
550bf57d
AV		 3672 start_dpc++;
3673
1da177e4 3674 /* Schedule the DPC routine if needed */
e315cd28
AC		 3675 if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
3676 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
3677 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
1da177e4 3678 start_dpc ||
e315cd28
AC		 3679 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
3680 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
a9083016
GM		 3681 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
3682 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
e315cd28
AC		 3683 test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
3684 test_bit(RELOGIN_NEEDED, &vha->dpc_flags)))
3685 qla2xxx_wake_dpc(vha);
1da177e4 3686
e315cd28 3687 qla2x00_restart_timer(vha, WATCH_INTERVAL);
1da177e4
LT		 3688}
3689
5433383e
AV		 3690/* Firmware interface routines. */
3691
a9083016 3692#define FW_BLOBS 8
5433383e
AV		 3693#define FW_ISP21XX 0
3694#define FW_ISP22XX 1
3695#define FW_ISP2300 2
3696#define FW_ISP2322 3
48c02fde 3697#define FW_ISP24XX 4
c3a2f0df 3698#define FW_ISP25XX 5
3a03eb79 3699#define FW_ISP81XX 6
a9083016 3700#define FW_ISP82XX 7
5433383e 3701
bb8ee499
AV		 3702#define FW_FILE_ISP21XX "ql2100_fw.bin"
3703#define FW_FILE_ISP22XX "ql2200_fw.bin"
3704#define FW_FILE_ISP2300 "ql2300_fw.bin"
3705#define FW_FILE_ISP2322 "ql2322_fw.bin"
3706#define FW_FILE_ISP24XX "ql2400_fw.bin"
c3a2f0df 3707#define FW_FILE_ISP25XX "ql2500_fw.bin"
3a03eb79 3708#define FW_FILE_ISP81XX "ql8100_fw.bin"
a9083016 3709#define FW_FILE_ISP82XX "ql8200_fw.bin"
bb8ee499 3710
e1e82b6f 3711static DEFINE_MUTEX(qla_fw_lock);
5433383e
AV		 3712
3713static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
bb8ee499
AV		 3714 { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
3715 { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
3716 { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
3717 { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
3718 { .name = FW_FILE_ISP24XX, },
c3a2f0df 3719 { .name = FW_FILE_ISP25XX, },
3a03eb79 3720 { .name = FW_FILE_ISP81XX, },
a9083016 3721 { .name = FW_FILE_ISP82XX, },
5433383e
AV		 3722};
3723
3724struct fw_blob *
e315cd28 3725qla2x00_request_firmware(scsi_qla_host_t *vha)
5433383e 3726{
e315cd28 3727 struct qla_hw_data *ha = vha->hw;
5433383e
AV		 3728 struct fw_blob *blob;
3729
3730 blob = NULL;
3731 if (IS_QLA2100(ha)) {
3732 blob = &qla_fw_blobs[FW_ISP21XX];
3733 } else if (IS_QLA2200(ha)) {
3734 blob = &qla_fw_blobs[FW_ISP22XX];
48c02fde 3735 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5433383e 3736 blob = &qla_fw_blobs[FW_ISP2300];
48c02fde 3737 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5433383e 3738 blob = &qla_fw_blobs[FW_ISP2322];
4d4df193 3739 } else if (IS_QLA24XX_TYPE(ha)) {
5433383e 3740 blob = &qla_fw_blobs[FW_ISP24XX];
c3a2f0df
AV		 3741 } else if (IS_QLA25XX(ha)) {
3742 blob = &qla_fw_blobs[FW_ISP25XX];
3a03eb79
AV		 3743 } else if (IS_QLA81XX(ha)) {
3744 blob = &qla_fw_blobs[FW_ISP81XX];
a9083016
GM		 3745 } else if (IS_QLA82XX(ha)) {
3746 blob = &qla_fw_blobs[FW_ISP82XX];
5433383e
AV		 3747 }
3748
e1e82b6f 3749 mutex_lock(&qla_fw_lock);
5433383e
AV		 3750 if (blob->fw)
3751 goto out;
3752
3753 if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
3754 DEBUG2(printk("scsi(%ld): Failed to load firmware image "
e315cd28 3755 "(%s).\n", vha->host_no, blob->name));
5433383e
AV		 3756 blob->fw = NULL;
3757 blob = NULL;
3758 goto out;
3759 }
3760
3761out:
e1e82b6f 3762 mutex_unlock(&qla_fw_lock);
5433383e
AV		 3763 return blob;
3764}
3765
3766static void
3767qla2x00_release_firmware(void)
3768{
3769 int idx;
3770
e1e82b6f 3771 mutex_lock(&qla_fw_lock);
5433383e
AV		 3772 for (idx = 0; idx < FW_BLOBS; idx++)
3773 if (qla_fw_blobs[idx].fw)
3774 release_firmware(qla_fw_blobs[idx].fw);
e1e82b6f 3775 mutex_unlock(&qla_fw_lock);
5433383e
AV		 3776}
3777
14e660e6
SJ		 3778static pci_ers_result_t
3779qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
3780{
85880801
AV		 3781 scsi_qla_host_t *vha = pci_get_drvdata(pdev);
3782 struct qla_hw_data *ha = vha->hw;
3783
3784 DEBUG2(qla_printk(KERN_WARNING, ha, "error_detected:state %x\n",
3785 state));
b9b12f73 3786
14e660e6
SJ		 3787 switch (state) {
3788 case pci_channel_io_normal:
85880801 3789 ha->flags.eeh_busy = 0;
14e660e6
SJ		 3790 return PCI_ERS_RESULT_CAN_RECOVER;
3791 case pci_channel_io_frozen:
85880801 3792 ha->flags.eeh_busy = 1;
a5b36321
LC		 3793 /* For ISP82XX complete any pending mailbox cmd */
3794 if (IS_QLA82XX(ha)) {
3795 ha->flags.fw_hung = 1;
3796 if (ha->flags.mbox_busy) {
3797 ha->flags.mbox_int = 1;
3798 DEBUG2(qla_printk(KERN_ERR, ha,
3799 "Due to pci channel io frozen, doing premature "
3800 "completion of mbx command\n"));
3801 complete(&ha->mbx_intr_comp);
3802 }
3803 }
90a86fc0 3804 qla2x00_free_irqs(vha);
14e660e6 3805 pci_disable_device(pdev);
bddd2d65
LC		 3806 /* Return back all IOs */
3807 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
14e660e6
SJ		 3808 return PCI_ERS_RESULT_NEED_RESET;
3809 case pci_channel_io_perm_failure:
85880801
AV		 3810 ha->flags.pci_channel_io_perm_failure = 1;
3811 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
14e660e6
SJ		 3812 return PCI_ERS_RESULT_DISCONNECT;
3813 }
3814 return PCI_ERS_RESULT_NEED_RESET;
3815}
3816
3817static pci_ers_result_t
3818qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
3819{
3820 int risc_paused = 0;
3821 uint32_t stat;
3822 unsigned long flags;
e315cd28
AC		 3823 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
3824 struct qla_hw_data *ha = base_vha->hw;
14e660e6
SJ		 3825 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3826 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
3827
bcc5b6d3
SK		 3828 if (IS_QLA82XX(ha))
3829 return PCI_ERS_RESULT_RECOVERED;
3830
14e660e6
SJ		 3831 spin_lock_irqsave(&ha->hardware_lock, flags);
3832 if (IS_QLA2100(ha) || IS_QLA2200(ha)){
3833 stat = RD_REG_DWORD(&reg->hccr);
3834 if (stat & HCCR_RISC_PAUSE)
3835 risc_paused = 1;
3836 } else if (IS_QLA23XX(ha)) {
3837 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
3838 if (stat & HSR_RISC_PAUSED)
3839 risc_paused = 1;
3840 } else if (IS_FWI2_CAPABLE(ha)) {
3841 stat = RD_REG_DWORD(&reg24->host_status);
3842 if (stat & HSRX_RISC_PAUSED)
3843 risc_paused = 1;
3844 }
3845 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3846
3847 if (risc_paused) {
3848 qla_printk(KERN_INFO, ha, "RISC paused -- mmio_enabled, "
3849 "Dumping firmware!\n");
e315cd28 3850 ha->isp_ops->fw_dump(base_vha, 0);
14e660e6
SJ		 3851
3852 return PCI_ERS_RESULT_NEED_RESET;
3853 } else
3854 return PCI_ERS_RESULT_RECOVERED;
3855}
3856
a5b36321
LC		 3857uint32_t qla82xx_error_recovery(scsi_qla_host_t *base_vha)
3858{
3859 uint32_t rval = QLA_FUNCTION_FAILED;
3860 uint32_t drv_active = 0;
3861 struct qla_hw_data *ha = base_vha->hw;
3862 int fn;
3863 struct pci_dev *other_pdev = NULL;
3864
3865 DEBUG17(qla_printk(KERN_INFO, ha,
3866 "scsi(%ld): In qla82xx_error_recovery\n", base_vha->host_no));
3867
3868 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
3869
3870 if (base_vha->flags.online) {
3871 /* Abort all outstanding commands,
3872 * so as to be requeued later */
3873 qla2x00_abort_isp_cleanup(base_vha);
3874 }
3875
3876
3877 fn = PCI_FUNC(ha->pdev->devfn);
3878 while (fn > 0) {
3879 fn--;
3880 DEBUG17(qla_printk(KERN_INFO, ha,
3881 "Finding pci device at function = 0x%x\n", fn));
3882 other_pdev =
3883 pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
3884 ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
3885 fn));
3886
3887 if (!other_pdev)
3888 continue;
3889 if (atomic_read(&other_pdev->enable_cnt)) {
3890 DEBUG17(qla_printk(KERN_INFO, ha,
3891 "Found PCI func availabe and enabled at 0x%x\n",
3892 fn));
3893 pci_dev_put(other_pdev);
3894 break;
3895 }
3896 pci_dev_put(other_pdev);
3897 }
3898
3899 if (!fn) {
3900 /* Reset owner */
3901 DEBUG17(qla_printk(KERN_INFO, ha,
3902 "This devfn is reset owner = 0x%x\n", ha->pdev->devfn));
3903 qla82xx_idc_lock(ha);
3904
3905 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3906 QLA82XX_DEV_INITIALIZING);
3907
3908 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
3909 QLA82XX_IDC_VERSION);
3910
3911 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
3912 DEBUG17(qla_printk(KERN_INFO, ha,
3913 "drv_active = 0x%x\n", drv_active));
3914
3915 qla82xx_idc_unlock(ha);
3916 /* Reset if device is not already reset
3917 * drv_active would be 0 if a reset has already been done
3918 */
3919 if (drv_active)
3920 rval = qla82xx_start_firmware(base_vha);
3921 else
3922 rval = QLA_SUCCESS;
3923 qla82xx_idc_lock(ha);
3924
3925 if (rval != QLA_SUCCESS) {
3926 qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
3927 qla82xx_clear_drv_active(ha);
3928 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3929 QLA82XX_DEV_FAILED);
3930 } else {
3931 qla_printk(KERN_INFO, ha, "HW State: READY\n");
3932 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3933 QLA82XX_DEV_READY);
3934 qla82xx_idc_unlock(ha);
3935 ha->flags.fw_hung = 0;
3936 rval = qla82xx_restart_isp(base_vha);
3937 qla82xx_idc_lock(ha);
3938 /* Clear driver state register */
3939 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
3940 qla82xx_set_drv_active(base_vha);
3941 }
3942 qla82xx_idc_unlock(ha);
3943 } else {
3944 DEBUG17(qla_printk(KERN_INFO, ha,
3945 "This devfn is not reset owner = 0x%x\n", ha->pdev->devfn));
3946 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
3947 QLA82XX_DEV_READY)) {
3948 ha->flags.fw_hung = 0;
3949 rval = qla82xx_restart_isp(base_vha);
3950 qla82xx_idc_lock(ha);
3951 qla82xx_set_drv_active(base_vha);
3952 qla82xx_idc_unlock(ha);
3953 }
3954 }
3955 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
3956
3957 return rval;
3958}
3959
14e660e6
SJ		 3960static pci_ers_result_t
3961qla2xxx_pci_slot_reset(struct pci_dev *pdev)
3962{
3963 pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
e315cd28
AC		 3964 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
3965 struct qla_hw_data *ha = base_vha->hw;
90a86fc0
JC		 3966 struct rsp_que *rsp;
3967 int rc, retries = 10;
09483916 3968
85880801
AV		 3969 DEBUG17(qla_printk(KERN_WARNING, ha, "slot_reset\n"));
3970
90a86fc0
JC		 3971 /* Workaround: qla2xxx driver which access hardware earlier
3972 * needs error state to be pci_channel_io_online.
3973 * Otherwise mailbox command timesout.
3974 */
3975 pdev->error_state = pci_channel_io_normal;
3976
3977 pci_restore_state(pdev);
3978
8c1496bd
RL		 3979 /* pci_restore_state() clears the saved_state flag of the device
3980 * save restored state which resets saved_state flag
3981 */
3982 pci_save_state(pdev);
3983
09483916
BH		 3984 if (ha->mem_only)
3985 rc = pci_enable_device_mem(pdev);
3986 else
3987 rc = pci_enable_device(pdev);
14e660e6 3988
09483916 3989 if (rc) {
14e660e6
SJ		 3990 qla_printk(KERN_WARNING, ha,
3991 "Can't re-enable PCI device after reset.\n");
a5b36321 3992 goto exit_slot_reset;
14e660e6 3993 }
14e660e6 3994
90a86fc0
JC		 3995 rsp = ha->rsp_q_map[0];
3996 if (qla2x00_request_irqs(ha, rsp))
a5b36321 3997 goto exit_slot_reset;
90a86fc0 3998
e315cd28 3999 if (ha->isp_ops->pci_config(base_vha))
a5b36321
LC		 4000 goto exit_slot_reset;
4001
4002 if (IS_QLA82XX(ha)) {
4003 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
4004 ret = PCI_ERS_RESULT_RECOVERED;
4005 goto exit_slot_reset;
4006 } else
4007 goto exit_slot_reset;
4008 }
14e660e6 4009
90a86fc0
JC		 4010 while (ha->flags.mbox_busy && retries--)
4011 msleep(1000);
85880801 4012
e315cd28 4013 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
a9083016 4014 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
14e660e6 4015 ret = PCI_ERS_RESULT_RECOVERED;
e315cd28 4016 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
14e660e6 4017
90a86fc0 4018
a5b36321 4019exit_slot_reset:
85880801
AV		 4020 DEBUG17(qla_printk(KERN_WARNING, ha,
4021 "slot_reset-return:ret=%x\n", ret));
4022
14e660e6
SJ		 4023 return ret;
4024}
4025
4026static void
4027qla2xxx_pci_resume(struct pci_dev *pdev)
4028{
e315cd28
AC		 4029 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4030 struct qla_hw_data *ha = base_vha->hw;
14e660e6
SJ		 4031 int ret;
4032
85880801
AV		 4033 DEBUG17(qla_printk(KERN_WARNING, ha, "pci_resume\n"));
4034
e315cd28 4035 ret = qla2x00_wait_for_hba_online(base_vha);
14e660e6
SJ		 4036 if (ret != QLA_SUCCESS) {
4037 qla_printk(KERN_ERR, ha,
4038 "the device failed to resume I/O "
4039 "from slot/link_reset");
4040 }
85880801 4041
3e46f031
LC		 4042 pci_cleanup_aer_uncorrect_error_status(pdev);
4043
85880801 4044 ha->flags.eeh_busy = 0;
14e660e6
SJ		 4045}
4046
4047static struct pci_error_handlers qla2xxx_err_handler = {
4048 .error_detected = qla2xxx_pci_error_detected,
4049 .mmio_enabled = qla2xxx_pci_mmio_enabled,
4050 .slot_reset = qla2xxx_pci_slot_reset,
4051 .resume = qla2xxx_pci_resume,
4052};
4053
5433383e 4054static struct pci_device_id qla2xxx_pci_tbl[] = {
47f5e069
AV		 4055 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
4056 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
4057 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
4058 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
4059 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
4060 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
4061 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
4062 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
4063 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
4d4df193 4064 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
47f5e069
AV		 4065 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
4066 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
c3a2f0df 4067 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
3a03eb79 4068 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
a9083016 4069 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5433383e
AV		 4070 { 0 },
4071};
4072MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
4073
fca29703 4074static struct pci_driver qla2xxx_pci_driver = {
cb63067a 4075 .name = QLA2XXX_DRIVER_NAME,
0a21ef1e
JB		 4076 .driver = {
4077 .owner = THIS_MODULE,
4078 },
fca29703 4079 .id_table = qla2xxx_pci_tbl,
7ee61397 4080 .probe = qla2x00_probe_one,
4c993f76 4081 .remove = qla2x00_remove_one,
e30d1756 4082 .shutdown = qla2x00_shutdown,
14e660e6 4083 .err_handler = &qla2xxx_err_handler,
fca29703
AV		 4084};
4085
6a03b4cd
HZ		 4086static struct file_operations apidev_fops = {
4087 .owner = THIS_MODULE,
6038f373 4088 .llseek = noop_llseek,
6a03b4cd
HZ		 4089};
4090
1da177e4
LT		 4091/**
4092 * qla2x00_module_init - Module initialization.
4093 **/
4094static int __init
4095qla2x00_module_init(void)
4096{
fca29703
AV		 4097 int ret = 0;
4098
1da177e4 4099 /* Allocate cache for SRBs. */
354d6b21 4100 srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
20c2df83 4101 SLAB_HWCACHE_ALIGN, NULL);
1da177e4
LT		 4102 if (srb_cachep == NULL) {
4103 printk(KERN_ERR
4104 "qla2xxx: Unable to allocate SRB cache...Failing load!\n");
4105 return -ENOMEM;
4106 }
4107
4108 /* Derive version string. */
4109 strcpy(qla2x00_version_str, QLA2XXX_VERSION);
11010fec 4110 if (ql2xextended_error_logging)
0181944f
AV		 4111 strcat(qla2x00_version_str, "-debug");
4112
1c97a12a
AV		 4113 qla2xxx_transport_template =
4114 fc_attach_transport(&qla2xxx_transport_functions);
2c3dfe3f
SJ		 4115 if (!qla2xxx_transport_template) {
4116 kmem_cache_destroy(srb_cachep);
1da177e4 4117 return -ENODEV;
2c3dfe3f 4118 }
6a03b4cd
HZ		 4119
4120 apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
4121 if (apidev_major < 0) {
4122 printk(KERN_WARNING "qla2xxx: Unable to register char device "
4123 "%s\n", QLA2XXX_APIDEV);
4124 }
4125
2c3dfe3f
SJ		 4126 qla2xxx_transport_vport_template =
4127 fc_attach_transport(&qla2xxx_transport_vport_functions);
4128 if (!qla2xxx_transport_vport_template) {
4129 kmem_cache_destroy(srb_cachep);
4130 fc_release_transport(qla2xxx_transport_template);
1da177e4 4131 return -ENODEV;
2c3dfe3f 4132 }
1da177e4 4133
fd9a29f0
AV		 4134 printk(KERN_INFO "QLogic Fibre Channel HBA Driver: %s\n",
4135 qla2x00_version_str);
7ee61397 4136 ret = pci_register_driver(&qla2xxx_pci_driver);
fca29703
AV		 4137 if (ret) {
4138 kmem_cache_destroy(srb_cachep);
4139 fc_release_transport(qla2xxx_transport_template);
2c3dfe3f 4140 fc_release_transport(qla2xxx_transport_vport_template);
fca29703
AV		 4141 }
4142 return ret;
1da177e4
LT		 4143}
4144
4145/**
4146 * qla2x00_module_exit - Module cleanup.
4147 **/
4148static void __exit
4149qla2x00_module_exit(void)
4150{
6a03b4cd 4151 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7ee61397 4152 pci_unregister_driver(&qla2xxx_pci_driver);
5433383e 4153 qla2x00_release_firmware();
354d6b21 4154 kmem_cache_destroy(srb_cachep);
a9083016
GM		 4155 if (ctx_cachep)
4156 kmem_cache_destroy(ctx_cachep);
1da177e4 4157 fc_release_transport(qla2xxx_transport_template);
2c3dfe3f 4158 fc_release_transport(qla2xxx_transport_vport_template);
1da177e4
LT		 4159}
4160
4161module_init(qla2x00_module_init);
4162module_exit(qla2x00_module_exit);
4163
4164MODULE_AUTHOR("QLogic Corporation");
4165MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
4166MODULE_LICENSE("GPL");
4167MODULE_VERSION(QLA2XXX_VERSION);
bb8ee499
AV		 4168MODULE_FIRMWARE(FW_FILE_ISP21XX);
4169MODULE_FIRMWARE(FW_FILE_ISP22XX);
4170MODULE_FIRMWARE(FW_FILE_ISP2300);
4171MODULE_FIRMWARE(FW_FILE_ISP2322);
4172MODULE_FIRMWARE(FW_FILE_ISP24XX);
61623fc3 4173MODULE_FIRMWARE(FW_FILE_ISP25XX);
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