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qla2xxx: ISP27xx fwdump template fix insertbuf() routine.
[mirror_ubuntu-artful-kernel.git] / drivers / scsi / qla2xxx / qla_tmpl.c
CommitLineData
f73cb695
CD		 1/*
2 * QLogic Fibre Channel HBA Driver
bd21eaf9 3 * Copyright (c) 2003-2014 QLogic Corporation
f73cb695
CD		 4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7#include "qla_def.h"
8#include "qla_tmpl.h"
9
10/* note default template is in big endian */
11static const uint32_t ql27xx_fwdt_default_template[] = {
12 0x63000000, 0xa4000000, 0x7c050000, 0x00000000,
13 0x30000000, 0x01000000, 0x00000000, 0xc0406eb4,
14 0x00000000, 0x00000000, 0x00000000, 0x00000000,
15 0x00000000, 0x00000000, 0x00000000, 0x00000000,
16 0x00000000, 0x00000000, 0x00000000, 0x00000000,
17 0x00000000, 0x00000000, 0x00000000, 0x00000000,
18 0x00000000, 0x00000000, 0x00000000, 0x00000000,
19 0x00000000, 0x00000000, 0x00000000, 0x00000000,
20 0x00000000, 0x00000000, 0x00000000, 0x00000000,
21 0x00000000, 0x00000000, 0x00000000, 0x00000000,
22 0x00000000, 0x04010000, 0x14000000, 0x00000000,
23 0x02000000, 0x44000000, 0x09010000, 0x10000000,
24 0x00000000, 0x02000000, 0x01010000, 0x1c000000,
25 0x00000000, 0x02000000, 0x00600000, 0x00000000,
26 0xc0000000, 0x01010000, 0x1c000000, 0x00000000,
27 0x02000000, 0x00600000, 0x00000000, 0xcc000000,
28 0x01010000, 0x1c000000, 0x00000000, 0x02000000,
29 0x10600000, 0x00000000, 0xd4000000, 0x01010000,
30 0x1c000000, 0x00000000, 0x02000000, 0x700f0000,
31 0x00000060, 0xf0000000, 0x00010000, 0x18000000,
32 0x00000000, 0x02000000, 0x00700000, 0x041000c0,
33 0x00010000, 0x18000000, 0x00000000, 0x02000000,
34 0x10700000, 0x041000c0, 0x00010000, 0x18000000,
35 0x00000000, 0x02000000, 0x40700000, 0x041000c0,
36 0x01010000, 0x1c000000, 0x00000000, 0x02000000,
37 0x007c0000, 0x01000000, 0xc0000000, 0x00010000,
38 0x18000000, 0x00000000, 0x02000000, 0x007c0000,
39 0x040300c4, 0x00010000, 0x18000000, 0x00000000,
40 0x02000000, 0x007c0000, 0x040100c0, 0x01010000,
41 0x1c000000, 0x00000000, 0x02000000, 0x007c0000,
42 0x00000000, 0xc0000000, 0x00010000, 0x18000000,
43 0x00000000, 0x02000000, 0x007c0000, 0x04200000,
44 0x0b010000, 0x18000000, 0x00000000, 0x02000000,
45 0x0c000000, 0x00000000, 0x02010000, 0x20000000,
46 0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
47 0xf0000000, 0x000000b0, 0x02010000, 0x20000000,
48 0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
49 0xf0000000, 0x000010b0, 0x02010000, 0x20000000,
50 0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
51 0xf0000000, 0x000020b0, 0x02010000, 0x20000000,
52 0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
53 0xf0000000, 0x000030b0, 0x02010000, 0x20000000,
54 0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
55 0xf0000000, 0x000040b0, 0x02010000, 0x20000000,
56 0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
57 0xf0000000, 0x000050b0, 0x02010000, 0x20000000,
58 0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
59 0xf0000000, 0x000060b0, 0x02010000, 0x20000000,
60 0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
61 0xf0000000, 0x000070b0, 0x02010000, 0x20000000,
62 0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
63 0xf0000000, 0x000080b0, 0x02010000, 0x20000000,
64 0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
65 0xf0000000, 0x000090b0, 0x02010000, 0x20000000,
66 0x00000000, 0x02000000, 0x700f0000, 0x040100fc,
67 0xf0000000, 0x0000a0b0, 0x00010000, 0x18000000,
68 0x00000000, 0x02000000, 0x0a000000, 0x040100c0,
69 0x00010000, 0x18000000, 0x00000000, 0x02000000,
70 0x0a000000, 0x04200080, 0x00010000, 0x18000000,
71 0x00000000, 0x02000000, 0x00be0000, 0x041000c0,
72 0x00010000, 0x18000000, 0x00000000, 0x02000000,
73 0x10be0000, 0x041000c0, 0x00010000, 0x18000000,
74 0x00000000, 0x02000000, 0x20be0000, 0x041000c0,
75 0x00010000, 0x18000000, 0x00000000, 0x02000000,
76 0x30be0000, 0x041000c0, 0x00010000, 0x18000000,
77 0x00000000, 0x02000000, 0x00b00000, 0x041000c0,
78 0x00010000, 0x18000000, 0x00000000, 0x02000000,
79 0x10b00000, 0x041000c0, 0x00010000, 0x18000000,
80 0x00000000, 0x02000000, 0x20b00000, 0x041000c0,
81 0x00010000, 0x18000000, 0x00000000, 0x02000000,
82 0x30b00000, 0x041000c0, 0x00010000, 0x18000000,
83 0x00000000, 0x02000000, 0x00300000, 0x041000c0,
84 0x00010000, 0x18000000, 0x00000000, 0x02000000,
85 0x10300000, 0x041000c0, 0x00010000, 0x18000000,
86 0x00000000, 0x02000000, 0x20300000, 0x041000c0,
87 0x00010000, 0x18000000, 0x00000000, 0x02000000,
88 0x30300000, 0x041000c0, 0x0a010000, 0x10000000,
89 0x00000000, 0x02000000, 0x06010000, 0x1c000000,
90 0x00000000, 0x02000000, 0x01000000, 0x00000200,
91 0xff230200, 0x06010000, 0x1c000000, 0x00000000,
92 0x02000000, 0x02000000, 0x00001000, 0x00000000,
93 0x07010000, 0x18000000, 0x00000000, 0x02000000,
94 0x00000000, 0x01000000, 0x07010000, 0x18000000,
95 0x00000000, 0x02000000, 0x00000000, 0x02000000,
96 0x07010000, 0x18000000, 0x00000000, 0x02000000,
97 0x00000000, 0x03000000, 0x0d010000, 0x14000000,
98 0x00000000, 0x02000000, 0x00000000, 0xff000000,
99 0x10000000, 0x00000000, 0x00000080,
100};
101
102static inline void __iomem *
103qla27xx_isp_reg(struct scsi_qla_host *vha)
104{
105 return &vha->hw->iobase->isp24;
106}
107
108static inline void
109qla27xx_insert16(uint16_t value, void *buf, ulong *len)
110{
111 if (buf) {
112 buf += *len;
113 *(__le16 *)buf = cpu_to_le16(value);
114 }
115 *len += sizeof(value);
116}
117
118static inline void
119qla27xx_insert32(uint32_t value, void *buf, ulong *len)
120{
121 if (buf) {
122 buf += *len;
123 *(__le32 *)buf = cpu_to_le32(value);
124 }
125 *len += sizeof(value);
126}
127
128static inline void
129qla27xx_insertbuf(void *mem, ulong size, void *buf, ulong *len)
130{
f73cb695 131
ce9b9b08 132 if (buf && mem && size) {
f73cb695 133 buf += *len;
ce9b9b08 134 memcpy(buf, mem, size);
f73cb695
CD		 135 }
136 *len += size;
137}
138
139static inline void
140qla27xx_read8(void *window, void *buf, ulong *len)
141{
142 uint8_t value = ~0;
143
144 if (buf) {
145 value = RD_REG_BYTE((__iomem void *)window);
f73cb695
CD		 146 }
147 qla27xx_insert32(value, buf, len);
148}
149
150static inline void
151qla27xx_read16(void *window, void *buf, ulong *len)
152{
153 uint16_t value = ~0;
154
155 if (buf) {
156 value = RD_REG_WORD((__iomem void *)window);
f73cb695
CD		 157 }
158 qla27xx_insert32(value, buf, len);
159}
160
161static inline void
162qla27xx_read32(void *window, void *buf, ulong *len)
163{
164 uint32_t value = ~0;
165
166 if (buf) {
167 value = RD_REG_DWORD((__iomem void *)window);
f73cb695
CD		 168 }
169 qla27xx_insert32(value, buf, len);
170}
171
172static inline void (*qla27xx_read_vector(uint width))(void *, void *, ulong *)
173{
174 return
175 (width == 1) ? qla27xx_read8 :
176 (width == 2) ? qla27xx_read16 :
177 qla27xx_read32;
178}
179
180static inline void
181qla27xx_read_reg(__iomem struct device_reg_24xx *reg,
182 uint offset, void *buf, ulong *len)
183{
184 void *window = (void *)reg + offset;
185
f73cb695
CD		 186 qla27xx_read32(window, buf, len);
187}
188
189static inline void
190qla27xx_write_reg(__iomem struct device_reg_24xx *reg,
191 uint offset, uint32_t data, void *buf)
192{
193 __iomem void *window = reg + offset;
194
195 if (buf) {
f73cb695
CD		 196 WRT_REG_DWORD(window, data);
197 }
198}
199
200static inline void
201qla27xx_read_window(__iomem struct device_reg_24xx *reg,
c0496401 202 uint32_t addr, uint offset, uint count, uint width, void *buf,
f73cb695
CD		 203 ulong *len)
204{
205 void *window = (void *)reg + offset;
206 void (*readn)(void *, void *, ulong *) = qla27xx_read_vector(width);
207
c0496401 208 qla27xx_write_reg(reg, IOBASE_ADDR, addr, buf);
f73cb695 209 while (count--) {
c0496401 210 qla27xx_insert32(addr, buf, len);
f73cb695
CD		 211 readn(window, buf, len);
212 window += width;
c0496401 213 addr++;
f73cb695
CD		 214 }
215}
216
217static inline void
218qla27xx_skip_entry(struct qla27xx_fwdt_entry *ent, void *buf)
219{
220 if (buf)
221 ent->hdr.driver_flags |= DRIVER_FLAG_SKIP_ENTRY;
222}
223
224static int
225qla27xx_fwdt_entry_t0(struct scsi_qla_host *vha,
226 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
227{
228 ql_dbg(ql_dbg_misc, vha, 0xd100,
229 "%s: nop [%lx]\n", __func__, *len);
230 qla27xx_skip_entry(ent, buf);
231
232 return false;
233}
234
235static int
236qla27xx_fwdt_entry_t255(struct scsi_qla_host *vha,
237 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
238{
239 ql_dbg(ql_dbg_misc, vha, 0xd1ff,
240 "%s: end [%lx]\n", __func__, *len);
241 qla27xx_skip_entry(ent, buf);
242
243 /* terminate */
244 return true;
245}
246
247static int
248qla27xx_fwdt_entry_t256(struct scsi_qla_host *vha,
249 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
250{
251 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
252
253 ql_dbg(ql_dbg_misc, vha, 0xd200,
254 "%s: rdio t1 [%lx]\n", __func__, *len);
255 qla27xx_read_window(reg, ent->t256.base_addr, ent->t256.pci_offset,
256 ent->t256.reg_count, ent->t256.reg_width, buf, len);
257
258 return false;
259}
260
261static int
262qla27xx_fwdt_entry_t257(struct scsi_qla_host *vha,
263 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
264{
265 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
266
267 ql_dbg(ql_dbg_misc, vha, 0xd201,
268 "%s: wrio t1 [%lx]\n", __func__, *len);
269 qla27xx_write_reg(reg, IOBASE_ADDR, ent->t257.base_addr, buf);
270 qla27xx_write_reg(reg, ent->t257.pci_offset, ent->t257.write_data, buf);
271
272 return false;
273}
274
275static int
276qla27xx_fwdt_entry_t258(struct scsi_qla_host *vha,
277 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
278{
279 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
280
281 ql_dbg(ql_dbg_misc, vha, 0xd202,
282 "%s: rdio t2 [%lx]\n", __func__, *len);
283 qla27xx_write_reg(reg, ent->t258.banksel_offset, ent->t258.bank, buf);
284 qla27xx_read_window(reg, ent->t258.base_addr, ent->t258.pci_offset,
285 ent->t258.reg_count, ent->t258.reg_width, buf, len);
286
287 return false;
288}
289
290static int
291qla27xx_fwdt_entry_t259(struct scsi_qla_host *vha,
292 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
293{
294 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
295
296 ql_dbg(ql_dbg_misc, vha, 0xd203,
297 "%s: wrio t2 [%lx]\n", __func__, *len);
298 qla27xx_write_reg(reg, IOBASE_ADDR, ent->t259.base_addr, buf);
299 qla27xx_write_reg(reg, ent->t259.banksel_offset, ent->t259.bank, buf);
300 qla27xx_write_reg(reg, ent->t259.pci_offset, ent->t259.write_data, buf);
301
302 return false;
303}
304
305static int
306qla27xx_fwdt_entry_t260(struct scsi_qla_host *vha,
307 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
308{
309 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
310
311 ql_dbg(ql_dbg_misc, vha, 0xd204,
312 "%s: rdpci [%lx]\n", __func__, *len);
c0496401
JC		 313 qla27xx_insert32(ent->t260.pci_offset, buf, len);
314 qla27xx_read_reg(reg, ent->t260.pci_offset, buf, len);
f73cb695
CD		 315
316 return false;
317}
318
319static int
320qla27xx_fwdt_entry_t261(struct scsi_qla_host *vha,
321 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
322{
323 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
324
325 ql_dbg(ql_dbg_misc, vha, 0xd205,
326 "%s: wrpci [%lx]\n", __func__, *len);
c0496401 327 qla27xx_write_reg(reg, ent->t261.pci_offset, ent->t261.write_data, buf);
f73cb695
CD		 328
329 return false;
330}
331
332static int
333qla27xx_fwdt_entry_t262(struct scsi_qla_host *vha,
334 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
335{
336 ulong dwords;
337 ulong start;
338 ulong end;
339
340 ql_dbg(ql_dbg_misc, vha, 0xd206,
341 "%s: rdram(%x) [%lx]\n", __func__, ent->t262.ram_area, *len);
342 start = ent->t262.start_addr;
343 end = ent->t262.end_addr;
344
345 if (ent->t262.ram_area == T262_RAM_AREA_CRITICAL_RAM) {
346 ;
347 } else if (ent->t262.ram_area == T262_RAM_AREA_EXTERNAL_RAM) {
348 end = vha->hw->fw_memory_size;
349 if (buf)
350 ent->t262.end_addr = end;
351 } else if (ent->t262.ram_area == T262_RAM_AREA_SHARED_RAM) {
352 start = vha->hw->fw_shared_ram_start;
353 end = vha->hw->fw_shared_ram_end;
354 if (buf) {
355 ent->t262.start_addr = start;
356 ent->t262.end_addr = end;
357 }
358 } else if (ent->t262.ram_area == T262_RAM_AREA_DDR_RAM) {
359 ql_dbg(ql_dbg_misc, vha, 0xd021,
360 "%s: unsupported ddr ram\n", __func__);
361 qla27xx_skip_entry(ent, buf);
362 goto done;
363 } else {
364 ql_dbg(ql_dbg_misc, vha, 0xd022,
365 "%s: unknown area %u\n", __func__, ent->t262.ram_area);
366 qla27xx_skip_entry(ent, buf);
367 goto done;
368 }
369
c0496401 370 if (end < start || end == 0) {
f73cb695 371 ql_dbg(ql_dbg_misc, vha, 0xd023,
c0496401 372 "%s: unusable range (start=%x end=%x)\n", __func__,
f73cb695
CD		 373 ent->t262.end_addr, ent->t262.start_addr);
374 qla27xx_skip_entry(ent, buf);
375 goto done;
376 }
377
378 dwords = end - start + 1;
379 if (buf) {
380 ql_dbg(ql_dbg_misc, vha, 0xd024,
381 "%s: @%lx -> (%lx dwords)\n", __func__, start, dwords);
382 buf += *len;
383 qla24xx_dump_ram(vha->hw, start, buf, dwords, &buf);
384 }
385 *len += dwords * sizeof(uint32_t);
386done:
387 return false;
388}
389
390static int
391qla27xx_fwdt_entry_t263(struct scsi_qla_host *vha,
392 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
393{
394 uint count = 0;
395 uint i;
396 uint length;
397
398 ql_dbg(ql_dbg_misc, vha, 0xd207,
399 "%s: getq(%x) [%lx]\n", __func__, ent->t263.queue_type, *len);
400 if (ent->t263.queue_type == T263_QUEUE_TYPE_REQ) {
401 for (i = 0; i < vha->hw->max_req_queues; i++) {
402 struct req_que *req = vha->hw->req_q_map[i];
403 if (req || !buf) {
404 length = req ?
405 req->length : REQUEST_ENTRY_CNT_24XX;
406 qla27xx_insert16(i, buf, len);
407 qla27xx_insert16(length, buf, len);
408 qla27xx_insertbuf(req ? req->ring : NULL,
409 length * sizeof(*req->ring), buf, len);
410 count++;
411 }
412 }
413 } else if (ent->t263.queue_type == T263_QUEUE_TYPE_RSP) {
414 for (i = 0; i < vha->hw->max_rsp_queues; i++) {
415 struct rsp_que *rsp = vha->hw->rsp_q_map[i];
416 if (rsp || !buf) {
417 length = rsp ?
418 rsp->length : RESPONSE_ENTRY_CNT_MQ;
419 qla27xx_insert16(i, buf, len);
420 qla27xx_insert16(length, buf, len);
421 qla27xx_insertbuf(rsp ? rsp->ring : NULL,
422 length * sizeof(*rsp->ring), buf, len);
423 count++;
424 }
425 }
426 } else if (ent->t263.queue_type == T263_QUEUE_TYPE_ATIO) {
427 ql_dbg(ql_dbg_misc, vha, 0xd025,
428 "%s: unsupported atio queue\n", __func__);
429 qla27xx_skip_entry(ent, buf);
f73cb695
CD		 430 } else {
431 ql_dbg(ql_dbg_misc, vha, 0xd026,
432 "%s: unknown queue %u\n", __func__, ent->t263.queue_type);
433 qla27xx_skip_entry(ent, buf);
f73cb695
CD		 434 }
435
436 if (buf)
437 ent->t263.num_queues = count;
c0496401 438
f73cb695
CD		 439 return false;
440}
441
442static int
443qla27xx_fwdt_entry_t264(struct scsi_qla_host *vha,
444 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
445{
446 ql_dbg(ql_dbg_misc, vha, 0xd208,
447 "%s: getfce [%lx]\n", __func__, *len);
448 if (vha->hw->fce) {
449 if (buf) {
450 ent->t264.fce_trace_size = FCE_SIZE;
451 ent->t264.write_pointer = vha->hw->fce_wr;
452 ent->t264.base_pointer = vha->hw->fce_dma;
453 ent->t264.fce_enable_mb0 = vha->hw->fce_mb[0];
454 ent->t264.fce_enable_mb2 = vha->hw->fce_mb[2];
455 ent->t264.fce_enable_mb3 = vha->hw->fce_mb[3];
456 ent->t264.fce_enable_mb4 = vha->hw->fce_mb[4];
457 ent->t264.fce_enable_mb5 = vha->hw->fce_mb[5];
458 ent->t264.fce_enable_mb6 = vha->hw->fce_mb[6];
459 }
460 qla27xx_insertbuf(vha->hw->fce, FCE_SIZE, buf, len);
461 } else {
462 ql_dbg(ql_dbg_misc, vha, 0xd027,
463 "%s: missing fce\n", __func__);
464 qla27xx_skip_entry(ent, buf);
465 }
466
467 return false;
468}
469
470static int
471qla27xx_fwdt_entry_t265(struct scsi_qla_host *vha,
472 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
473{
474 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
475
476 ql_dbg(ql_dbg_misc, vha, 0xd209,
477 "%s: pause risc [%lx]\n", __func__, *len);
478 if (buf)
61f098dd 479 qla24xx_pause_risc(reg, vha->hw);
f73cb695
CD		 480
481 return false;
482}
483
484static int
485qla27xx_fwdt_entry_t266(struct scsi_qla_host *vha,
486 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
487{
488 ql_dbg(ql_dbg_misc, vha, 0xd20a,
489 "%s: reset risc [%lx]\n", __func__, *len);
490 if (buf)
491 qla24xx_soft_reset(vha->hw);
492
493 return false;
494}
495
496static int
497qla27xx_fwdt_entry_t267(struct scsi_qla_host *vha,
498 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
499{
500 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
501
502 ql_dbg(ql_dbg_misc, vha, 0xd20b,
503 "%s: dis intr [%lx]\n", __func__, *len);
504 qla27xx_write_reg(reg, ent->t267.pci_offset, ent->t267.data, buf);
505
506 return false;
507}
508
509static int
510qla27xx_fwdt_entry_t268(struct scsi_qla_host *vha,
511 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
512{
513 ql_dbg(ql_dbg_misc, vha, 0xd20c,
514 "%s: gethb(%x) [%lx]\n", __func__, ent->t268.buf_type, *len);
515 if (ent->t268.buf_type == T268_BUF_TYPE_EXTD_TRACE) {
516 if (vha->hw->eft) {
517 if (buf) {
518 ent->t268.buf_size = EFT_SIZE;
519 ent->t268.start_addr = vha->hw->eft_dma;
520 }
521 qla27xx_insertbuf(vha->hw->eft, EFT_SIZE, buf, len);
522 } else {
523 ql_dbg(ql_dbg_misc, vha, 0xd028,
524 "%s: missing eft\n", __func__);
525 qla27xx_skip_entry(ent, buf);
526 }
527 } else if (ent->t268.buf_type == T268_BUF_TYPE_EXCH_BUFOFF) {
528 ql_dbg(ql_dbg_misc, vha, 0xd029,
529 "%s: unsupported exchange offload buffer\n", __func__);
530 qla27xx_skip_entry(ent, buf);
531 } else if (ent->t268.buf_type == T268_BUF_TYPE_EXTD_LOGIN) {
532 ql_dbg(ql_dbg_misc, vha, 0xd02a,
533 "%s: unsupported extended login buffer\n", __func__);
534 qla27xx_skip_entry(ent, buf);
535 } else {
536 ql_dbg(ql_dbg_misc, vha, 0xd02b,
537 "%s: unknown buf %x\n", __func__, ent->t268.buf_type);
538 qla27xx_skip_entry(ent, buf);
539 }
540
541 return false;
542}
543
544static int
545qla27xx_fwdt_entry_t269(struct scsi_qla_host *vha,
546 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
547{
548 ql_dbg(ql_dbg_misc, vha, 0xd20d,
549 "%s: scratch [%lx]\n", __func__, *len);
550 qla27xx_insert32(0xaaaaaaaa, buf, len);
551 qla27xx_insert32(0xbbbbbbbb, buf, len);
552 qla27xx_insert32(0xcccccccc, buf, len);
553 qla27xx_insert32(0xdddddddd, buf, len);
554 qla27xx_insert32(*len + sizeof(uint32_t), buf, len);
555 if (buf)
556 ent->t269.scratch_size = 5 * sizeof(uint32_t);
557
558 return false;
559}
560
561static int
562qla27xx_fwdt_entry_t270(struct scsi_qla_host *vha,
563 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
564{
565 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
f73cb695
CD		 566 ulong dwords = ent->t270.count;
567 ulong addr = ent->t270.addr;
568
569 ql_dbg(ql_dbg_misc, vha, 0xd20e,
570 "%s: rdremreg [%lx]\n", __func__, *len);
571 qla27xx_write_reg(reg, IOBASE_ADDR, 0x40, buf);
572 while (dwords--) {
573 qla27xx_write_reg(reg, 0xc0, addr|0x80000000, buf);
f73cb695 574 qla27xx_insert32(addr, buf, len);
c0496401 575 qla27xx_read_reg(reg, 0xc4, buf, len);
fbce4f49 576 addr += sizeof(uint32_t);
f73cb695
CD		 577 }
578
579 return false;
580}
581
582static int
583qla27xx_fwdt_entry_t271(struct scsi_qla_host *vha,
584 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
585{
586 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha);
587 ulong addr = ent->t271.addr;
0d90c34c 588 ulong data = ent->t271.data;
f73cb695
CD		 589
590 ql_dbg(ql_dbg_misc, vha, 0xd20f,
591 "%s: wrremreg [%lx]\n", __func__, *len);
592 qla27xx_write_reg(reg, IOBASE_ADDR, 0x40, buf);
0d90c34c 593 qla27xx_write_reg(reg, 0xc4, data, buf);
f73cb695
CD		 594 qla27xx_write_reg(reg, 0xc0, addr, buf);
595
596 return false;
597}
598
599static int
600qla27xx_fwdt_entry_t272(struct scsi_qla_host *vha,
601 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
602{
603 ulong dwords = ent->t272.count;
604 ulong start = ent->t272.addr;
605
606 ql_dbg(ql_dbg_misc, vha, 0xd210,
607 "%s: rdremram [%lx]\n", __func__, *len);
608 if (buf) {
609 ql_dbg(ql_dbg_misc, vha, 0xd02c,
610 "%s: @%lx -> (%lx dwords)\n", __func__, start, dwords);
611 buf += *len;
612 qla27xx_dump_mpi_ram(vha->hw, start, buf, dwords, &buf);
613 }
614 *len += dwords * sizeof(uint32_t);
615
616 return false;
617}
618
619static int
620qla27xx_fwdt_entry_t273(struct scsi_qla_host *vha,
621 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
622{
623 ulong dwords = ent->t273.count;
624 ulong addr = ent->t273.addr;
625 uint32_t value;
626
627 ql_dbg(ql_dbg_misc, vha, 0xd211,
628 "%s: pcicfg [%lx]\n", __func__, *len);
629 while (dwords--) {
630 value = ~0;
631 if (pci_read_config_dword(vha->hw->pdev, addr, &value))
632 ql_dbg(ql_dbg_misc, vha, 0xd02d,
633 "%s: failed pcicfg read at %lx\n", __func__, addr);
634 qla27xx_insert32(addr, buf, len);
635 qla27xx_insert32(value, buf, len);
c0496401
JC		 636 addr += sizeof(uint32_t);
637 }
638
639 return false;
640}
641
642static int
643qla27xx_fwdt_entry_t274(struct scsi_qla_host *vha,
644 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
645{
646 uint count = 0;
647 uint i;
648
649 ql_dbg(ql_dbg_misc, vha, 0xd212,
650 "%s: getqsh(%x) [%lx]\n", __func__, ent->t274.queue_type, *len);
651 if (ent->t274.queue_type == T274_QUEUE_TYPE_REQ_SHAD) {
652 for (i = 0; i < vha->hw->max_req_queues; i++) {
653 struct req_que *req = vha->hw->req_q_map[i];
654 if (req || !buf) {
655 qla27xx_insert16(i, buf, len);
656 qla27xx_insert16(1, buf, len);
7c6300e3
JC		 657 qla27xx_insert32(req && req->out_ptr ?
658 *req->out_ptr : 0, buf, len);
c0496401
JC		 659 count++;
660 }
661 }
662 } else if (ent->t274.queue_type == T274_QUEUE_TYPE_RSP_SHAD) {
663 for (i = 0; i < vha->hw->max_rsp_queues; i++) {
664 struct rsp_que *rsp = vha->hw->rsp_q_map[i];
665 if (rsp || !buf) {
666 qla27xx_insert16(i, buf, len);
667 qla27xx_insert16(1, buf, len);
7c6300e3
JC		 668 qla27xx_insert32(rsp && rsp->in_ptr ?
669 *rsp->in_ptr : 0, buf, len);
c0496401
JC		 670 count++;
671 }
672 }
673 } else if (ent->t274.queue_type == T274_QUEUE_TYPE_ATIO_SHAD) {
674 ql_dbg(ql_dbg_misc, vha, 0xd02e,
675 "%s: unsupported atio queue\n", __func__);
676 qla27xx_skip_entry(ent, buf);
677 } else {
678 ql_dbg(ql_dbg_misc, vha, 0xd02f,
679 "%s: unknown queue %u\n", __func__, ent->t274.queue_type);
680 qla27xx_skip_entry(ent, buf);
f73cb695
CD		 681 }
682
c0496401
JC		 683 if (buf)
684 ent->t274.num_queues = count;
685
686 if (!count)
687 qla27xx_skip_entry(ent, buf);
688
f73cb695
CD		 689 return false;
690}
691
692static int
693qla27xx_fwdt_entry_other(struct scsi_qla_host *vha,
694 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len)
695{
696 ql_dbg(ql_dbg_misc, vha, 0xd2ff,
697 "%s: type %x [%lx]\n", __func__, ent->hdr.entry_type, *len);
698 qla27xx_skip_entry(ent, buf);
699
700 return false;
701}
702
703struct qla27xx_fwdt_entry_call {
aa2dc372 704 uint type;
f73cb695
CD		 705 int (*call)(
706 struct scsi_qla_host *,
707 struct qla27xx_fwdt_entry *,
708 void *,
709 ulong *);
710};
711
712static struct qla27xx_fwdt_entry_call ql27xx_fwdt_entry_call_list[] = {
713 { ENTRY_TYPE_NOP , qla27xx_fwdt_entry_t0 } ,
714 { ENTRY_TYPE_TMP_END , qla27xx_fwdt_entry_t255 } ,
715 { ENTRY_TYPE_RD_IOB_T1 , qla27xx_fwdt_entry_t256 } ,
716 { ENTRY_TYPE_WR_IOB_T1 , qla27xx_fwdt_entry_t257 } ,
717 { ENTRY_TYPE_RD_IOB_T2 , qla27xx_fwdt_entry_t258 } ,
718 { ENTRY_TYPE_WR_IOB_T2 , qla27xx_fwdt_entry_t259 } ,
719 { ENTRY_TYPE_RD_PCI , qla27xx_fwdt_entry_t260 } ,
720 { ENTRY_TYPE_WR_PCI , qla27xx_fwdt_entry_t261 } ,
721 { ENTRY_TYPE_RD_RAM , qla27xx_fwdt_entry_t262 } ,
722 { ENTRY_TYPE_GET_QUEUE , qla27xx_fwdt_entry_t263 } ,
723 { ENTRY_TYPE_GET_FCE , qla27xx_fwdt_entry_t264 } ,
724 { ENTRY_TYPE_PSE_RISC , qla27xx_fwdt_entry_t265 } ,
725 { ENTRY_TYPE_RST_RISC , qla27xx_fwdt_entry_t266 } ,
726 { ENTRY_TYPE_DIS_INTR , qla27xx_fwdt_entry_t267 } ,
727 { ENTRY_TYPE_GET_HBUF , qla27xx_fwdt_entry_t268 } ,
728 { ENTRY_TYPE_SCRATCH , qla27xx_fwdt_entry_t269 } ,
729 { ENTRY_TYPE_RDREMREG , qla27xx_fwdt_entry_t270 } ,
730 { ENTRY_TYPE_WRREMREG , qla27xx_fwdt_entry_t271 } ,
731 { ENTRY_TYPE_RDREMRAM , qla27xx_fwdt_entry_t272 } ,
732 { ENTRY_TYPE_PCICFG , qla27xx_fwdt_entry_t273 } ,
c0496401 733 { ENTRY_TYPE_GET_SHADOW , qla27xx_fwdt_entry_t274 } ,
f73cb695
CD		 734 { -1 , qla27xx_fwdt_entry_other }
735};
736
aa2dc372 737static inline int (*qla27xx_find_entry(uint type))
f73cb695
CD		 738 (struct scsi_qla_host *, struct qla27xx_fwdt_entry *, void *, ulong *)
739{
740 struct qla27xx_fwdt_entry_call *list = ql27xx_fwdt_entry_call_list;
741
aa2dc372 742 while (list->type < type)
f73cb695
CD		 743 list++;
744
aa2dc372
JC		 745 if (list->type == type)
746 return list->call;
747 return qla27xx_fwdt_entry_other;
f73cb695
CD		 748}
749
750static inline void *
751qla27xx_next_entry(void *p)
752{
753 struct qla27xx_fwdt_entry *ent = p;
754
755 return p + ent->hdr.entry_size;
756}
757
758static void
759qla27xx_walk_template(struct scsi_qla_host *vha,
760 struct qla27xx_fwdt_template *tmp, void *buf, ulong *len)
761{
762 struct qla27xx_fwdt_entry *ent = (void *)tmp + tmp->entry_offset;
763 ulong count = tmp->entry_count;
764
765 ql_dbg(ql_dbg_misc, vha, 0xd01a,
766 "%s: entry count %lx\n", __func__, count);
767 while (count--) {
768 if (qla27xx_find_entry(ent->hdr.entry_type)(vha, ent, buf, len))
769 break;
770 ent = qla27xx_next_entry(ent);
771 }
299f5e27
JC		 772
773 if (count)
774 ql_dbg(ql_dbg_misc, vha, 0xd018,
775 "%s: residual count (%lx)\n", __func__, count);
776
777 if (ent->hdr.entry_type != ENTRY_TYPE_TMP_END)
778 ql_dbg(ql_dbg_misc, vha, 0xd019,
779 "%s: missing end (%lx)\n", __func__, count);
780
f73cb695
CD		 781 ql_dbg(ql_dbg_misc, vha, 0xd01b,
782 "%s: len=%lx\n", __func__, *len);
783}
784
785static void
786qla27xx_time_stamp(struct qla27xx_fwdt_template *tmp)
787{
788 tmp->capture_timestamp = jiffies;
789}
790
791static void
792qla27xx_driver_info(struct qla27xx_fwdt_template *tmp)
793{
794 uint8_t v[] = { 0, 0, 0, 0, 0, 0 };
795 int rval = 0;
796
797 rval = sscanf(qla2x00_version_str, "%hhu.%hhu.%hhu.%hhu.%hhu.%hhu",
798 v+0, v+1, v+2, v+3, v+4, v+5);
799
800 tmp->driver_info[0] = v[3] << 24 | v[2] << 16 | v[1] << 8 | v[0];
801 tmp->driver_info[1] = v[5] << 8 | v[4];
802 tmp->driver_info[2] = 0x12345678;
803}
804
805static void
806qla27xx_firmware_info(struct qla27xx_fwdt_template *tmp,
807 struct scsi_qla_host *vha)
808{
809 tmp->firmware_version[0] = vha->hw->fw_major_version;
810 tmp->firmware_version[1] = vha->hw->fw_minor_version;
811 tmp->firmware_version[2] = vha->hw->fw_subminor_version;
812 tmp->firmware_version[3] =
813 vha->hw->fw_attributes_h << 16 | vha->hw->fw_attributes;
814 tmp->firmware_version[4] =
815 vha->hw->fw_attributes_ext[1] << 16 | vha->hw->fw_attributes_ext[0];
816}
817
818static void
819ql27xx_edit_template(struct scsi_qla_host *vha,
820 struct qla27xx_fwdt_template *tmp)
821{
822 qla27xx_time_stamp(tmp);
823 qla27xx_driver_info(tmp);
824 qla27xx_firmware_info(tmp, vha);
825}
826
827static inline uint32_t
828qla27xx_template_checksum(void *p, ulong size)
829{
830 uint32_t *buf = p;
831 uint64_t sum = 0;
832
833 size /= sizeof(*buf);
834
835 while (size--)
836 sum += *buf++;
837
838 sum = (sum & 0xffffffff) + (sum >> 32);
839
840 return ~sum;
841}
842
843static inline int
844qla27xx_verify_template_checksum(struct qla27xx_fwdt_template *tmp)
845{
846 return qla27xx_template_checksum(tmp, tmp->template_size) == 0;
847}
848
849static inline int
850qla27xx_verify_template_header(struct qla27xx_fwdt_template *tmp)
851{
852 return tmp->template_type == TEMPLATE_TYPE_FWDUMP;
853}
854
855static void
856qla27xx_execute_fwdt_template(struct scsi_qla_host *vha)
857{
858 struct qla27xx_fwdt_template *tmp = vha->hw->fw_dump_template;
859 ulong len;
860
861 if (qla27xx_fwdt_template_valid(tmp)) {
862 len = tmp->template_size;
863 tmp = memcpy(vha->hw->fw_dump, tmp, len);
864 ql27xx_edit_template(vha, tmp);
865 qla27xx_walk_template(vha, tmp, tmp, &len);
866 vha->hw->fw_dump_len = len;
867 vha->hw->fw_dumped = 1;
868 }
869}
870
871ulong
872qla27xx_fwdt_calculate_dump_size(struct scsi_qla_host *vha)
873{
874 struct qla27xx_fwdt_template *tmp = vha->hw->fw_dump_template;
875 ulong len = 0;
876
877 if (qla27xx_fwdt_template_valid(tmp)) {
878 len = tmp->template_size;
879 qla27xx_walk_template(vha, tmp, NULL, &len);
880 }
881
882 return len;
883}
884
885ulong
886qla27xx_fwdt_template_size(void *p)
887{
888 struct qla27xx_fwdt_template *tmp = p;
889
890 return tmp->template_size;
891}
892
893ulong
894qla27xx_fwdt_template_default_size(void)
895{
896 return sizeof(ql27xx_fwdt_default_template);
897}
898
899const void *
900qla27xx_fwdt_template_default(void)
901{
902 return ql27xx_fwdt_default_template;
903}
904
905int
906qla27xx_fwdt_template_valid(void *p)
907{
908 struct qla27xx_fwdt_template *tmp = p;
909
910 if (!qla27xx_verify_template_header(tmp)) {
911 ql_log(ql_log_warn, NULL, 0xd01c,
912 "%s: template type %x\n", __func__, tmp->template_type);
913 return false;
914 }
915
916 if (!qla27xx_verify_template_checksum(tmp)) {
917 ql_log(ql_log_warn, NULL, 0xd01d,
918 "%s: failed template checksum\n", __func__);
919 return false;
920 }
921
922 return true;
923}
924
925void
926qla27xx_fwdump(scsi_qla_host_t *vha, int hardware_locked)
927{
928 ulong flags = 0;
929
930 if (!hardware_locked)
931 spin_lock_irqsave(&vha->hw->hardware_lock, flags);
932
933 if (!vha->hw->fw_dump)
934 ql_log(ql_log_warn, vha, 0xd01e, "fwdump buffer missing.\n");
935 else if (!vha->hw->fw_dump_template)
936 ql_log(ql_log_warn, vha, 0xd01f, "fwdump template missing.\n");
937 else
938 qla27xx_execute_fwdt_template(vha);
939
940 if (!hardware_locked)
941 spin_unlock_irqrestore(&vha->hw->hardware_lock, flags);
942}
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