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f73cb695 CD |
1 | /* |
2 | * QLogic Fibre Channel HBA Driver | |
bd21eaf9 | 3 | * Copyright (c) 2003-2014 QLogic Corporation |
f73cb695 CD |
4 | * |
5 | * See LICENSE.qla2xxx for copyright and licensing details. | |
6 | */ | |
7 | #include "qla_def.h" | |
8 | #include "qla_tmpl.h" | |
9 | ||
10 | /* note default template is in big endian */ | |
11 | static const uint32_t ql27xx_fwdt_default_template[] = { | |
12 | 0x63000000, 0xa4000000, 0x7c050000, 0x00000000, | |
13 | 0x30000000, 0x01000000, 0x00000000, 0xc0406eb4, | |
14 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, | |
15 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, | |
16 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, | |
17 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, | |
18 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, | |
19 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, | |
20 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, | |
21 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, | |
22 | 0x00000000, 0x04010000, 0x14000000, 0x00000000, | |
23 | 0x02000000, 0x44000000, 0x09010000, 0x10000000, | |
24 | 0x00000000, 0x02000000, 0x01010000, 0x1c000000, | |
25 | 0x00000000, 0x02000000, 0x00600000, 0x00000000, | |
26 | 0xc0000000, 0x01010000, 0x1c000000, 0x00000000, | |
27 | 0x02000000, 0x00600000, 0x00000000, 0xcc000000, | |
28 | 0x01010000, 0x1c000000, 0x00000000, 0x02000000, | |
29 | 0x10600000, 0x00000000, 0xd4000000, 0x01010000, | |
30 | 0x1c000000, 0x00000000, 0x02000000, 0x700f0000, | |
31 | 0x00000060, 0xf0000000, 0x00010000, 0x18000000, | |
32 | 0x00000000, 0x02000000, 0x00700000, 0x041000c0, | |
33 | 0x00010000, 0x18000000, 0x00000000, 0x02000000, | |
34 | 0x10700000, 0x041000c0, 0x00010000, 0x18000000, | |
35 | 0x00000000, 0x02000000, 0x40700000, 0x041000c0, | |
36 | 0x01010000, 0x1c000000, 0x00000000, 0x02000000, | |
37 | 0x007c0000, 0x01000000, 0xc0000000, 0x00010000, | |
38 | 0x18000000, 0x00000000, 0x02000000, 0x007c0000, | |
39 | 0x040300c4, 0x00010000, 0x18000000, 0x00000000, | |
40 | 0x02000000, 0x007c0000, 0x040100c0, 0x01010000, | |
41 | 0x1c000000, 0x00000000, 0x02000000, 0x007c0000, | |
42 | 0x00000000, 0xc0000000, 0x00010000, 0x18000000, | |
43 | 0x00000000, 0x02000000, 0x007c0000, 0x04200000, | |
44 | 0x0b010000, 0x18000000, 0x00000000, 0x02000000, | |
45 | 0x0c000000, 0x00000000, 0x02010000, 0x20000000, | |
46 | 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, | |
47 | 0xf0000000, 0x000000b0, 0x02010000, 0x20000000, | |
48 | 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, | |
49 | 0xf0000000, 0x000010b0, 0x02010000, 0x20000000, | |
50 | 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, | |
51 | 0xf0000000, 0x000020b0, 0x02010000, 0x20000000, | |
52 | 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, | |
53 | 0xf0000000, 0x000030b0, 0x02010000, 0x20000000, | |
54 | 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, | |
55 | 0xf0000000, 0x000040b0, 0x02010000, 0x20000000, | |
56 | 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, | |
57 | 0xf0000000, 0x000050b0, 0x02010000, 0x20000000, | |
58 | 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, | |
59 | 0xf0000000, 0x000060b0, 0x02010000, 0x20000000, | |
60 | 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, | |
61 | 0xf0000000, 0x000070b0, 0x02010000, 0x20000000, | |
62 | 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, | |
63 | 0xf0000000, 0x000080b0, 0x02010000, 0x20000000, | |
64 | 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, | |
65 | 0xf0000000, 0x000090b0, 0x02010000, 0x20000000, | |
66 | 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, | |
67 | 0xf0000000, 0x0000a0b0, 0x00010000, 0x18000000, | |
68 | 0x00000000, 0x02000000, 0x0a000000, 0x040100c0, | |
69 | 0x00010000, 0x18000000, 0x00000000, 0x02000000, | |
70 | 0x0a000000, 0x04200080, 0x00010000, 0x18000000, | |
71 | 0x00000000, 0x02000000, 0x00be0000, 0x041000c0, | |
72 | 0x00010000, 0x18000000, 0x00000000, 0x02000000, | |
73 | 0x10be0000, 0x041000c0, 0x00010000, 0x18000000, | |
74 | 0x00000000, 0x02000000, 0x20be0000, 0x041000c0, | |
75 | 0x00010000, 0x18000000, 0x00000000, 0x02000000, | |
76 | 0x30be0000, 0x041000c0, 0x00010000, 0x18000000, | |
77 | 0x00000000, 0x02000000, 0x00b00000, 0x041000c0, | |
78 | 0x00010000, 0x18000000, 0x00000000, 0x02000000, | |
79 | 0x10b00000, 0x041000c0, 0x00010000, 0x18000000, | |
80 | 0x00000000, 0x02000000, 0x20b00000, 0x041000c0, | |
81 | 0x00010000, 0x18000000, 0x00000000, 0x02000000, | |
82 | 0x30b00000, 0x041000c0, 0x00010000, 0x18000000, | |
83 | 0x00000000, 0x02000000, 0x00300000, 0x041000c0, | |
84 | 0x00010000, 0x18000000, 0x00000000, 0x02000000, | |
85 | 0x10300000, 0x041000c0, 0x00010000, 0x18000000, | |
86 | 0x00000000, 0x02000000, 0x20300000, 0x041000c0, | |
87 | 0x00010000, 0x18000000, 0x00000000, 0x02000000, | |
88 | 0x30300000, 0x041000c0, 0x0a010000, 0x10000000, | |
89 | 0x00000000, 0x02000000, 0x06010000, 0x1c000000, | |
90 | 0x00000000, 0x02000000, 0x01000000, 0x00000200, | |
91 | 0xff230200, 0x06010000, 0x1c000000, 0x00000000, | |
92 | 0x02000000, 0x02000000, 0x00001000, 0x00000000, | |
93 | 0x07010000, 0x18000000, 0x00000000, 0x02000000, | |
94 | 0x00000000, 0x01000000, 0x07010000, 0x18000000, | |
95 | 0x00000000, 0x02000000, 0x00000000, 0x02000000, | |
96 | 0x07010000, 0x18000000, 0x00000000, 0x02000000, | |
97 | 0x00000000, 0x03000000, 0x0d010000, 0x14000000, | |
98 | 0x00000000, 0x02000000, 0x00000000, 0xff000000, | |
99 | 0x10000000, 0x00000000, 0x00000080, | |
100 | }; | |
101 | ||
102 | static inline void __iomem * | |
103 | qla27xx_isp_reg(struct scsi_qla_host *vha) | |
104 | { | |
105 | return &vha->hw->iobase->isp24; | |
106 | } | |
107 | ||
108 | static inline void | |
109 | qla27xx_insert16(uint16_t value, void *buf, ulong *len) | |
110 | { | |
111 | if (buf) { | |
112 | buf += *len; | |
113 | *(__le16 *)buf = cpu_to_le16(value); | |
114 | } | |
115 | *len += sizeof(value); | |
116 | } | |
117 | ||
118 | static inline void | |
119 | qla27xx_insert32(uint32_t value, void *buf, ulong *len) | |
120 | { | |
121 | if (buf) { | |
122 | buf += *len; | |
123 | *(__le32 *)buf = cpu_to_le32(value); | |
124 | } | |
125 | *len += sizeof(value); | |
126 | } | |
127 | ||
128 | static inline void | |
129 | qla27xx_insertbuf(void *mem, ulong size, void *buf, ulong *len) | |
130 | { | |
f73cb695 | 131 | |
ce9b9b08 | 132 | if (buf && mem && size) { |
f73cb695 | 133 | buf += *len; |
ce9b9b08 | 134 | memcpy(buf, mem, size); |
f73cb695 CD |
135 | } |
136 | *len += size; | |
137 | } | |
138 | ||
139 | static inline void | |
8dfa4b5a | 140 | qla27xx_read8(void __iomem *window, void *buf, ulong *len) |
f73cb695 CD |
141 | { |
142 | uint8_t value = ~0; | |
143 | ||
144 | if (buf) { | |
8dfa4b5a | 145 | value = RD_REG_BYTE(window); |
f73cb695 CD |
146 | } |
147 | qla27xx_insert32(value, buf, len); | |
148 | } | |
149 | ||
150 | static inline void | |
8dfa4b5a | 151 | qla27xx_read16(void __iomem *window, void *buf, ulong *len) |
f73cb695 CD |
152 | { |
153 | uint16_t value = ~0; | |
154 | ||
155 | if (buf) { | |
8dfa4b5a | 156 | value = RD_REG_WORD(window); |
f73cb695 CD |
157 | } |
158 | qla27xx_insert32(value, buf, len); | |
159 | } | |
160 | ||
161 | static inline void | |
8dfa4b5a | 162 | qla27xx_read32(void __iomem *window, void *buf, ulong *len) |
f73cb695 CD |
163 | { |
164 | uint32_t value = ~0; | |
165 | ||
166 | if (buf) { | |
8dfa4b5a | 167 | value = RD_REG_DWORD(window); |
f73cb695 CD |
168 | } |
169 | qla27xx_insert32(value, buf, len); | |
170 | } | |
171 | ||
8dfa4b5a | 172 | static inline void (*qla27xx_read_vector(uint width))(void __iomem*, void *, ulong *) |
f73cb695 CD |
173 | { |
174 | return | |
175 | (width == 1) ? qla27xx_read8 : | |
176 | (width == 2) ? qla27xx_read16 : | |
177 | qla27xx_read32; | |
178 | } | |
179 | ||
180 | static inline void | |
181 | qla27xx_read_reg(__iomem struct device_reg_24xx *reg, | |
182 | uint offset, void *buf, ulong *len) | |
183 | { | |
8dfa4b5a | 184 | void __iomem *window = (void __iomem *)reg + offset; |
f73cb695 | 185 | |
f73cb695 CD |
186 | qla27xx_read32(window, buf, len); |
187 | } | |
188 | ||
189 | static inline void | |
190 | qla27xx_write_reg(__iomem struct device_reg_24xx *reg, | |
191 | uint offset, uint32_t data, void *buf) | |
192 | { | |
6cbfb1eb | 193 | __iomem void *window = (void __iomem *)reg + offset; |
f73cb695 CD |
194 | |
195 | if (buf) { | |
f73cb695 CD |
196 | WRT_REG_DWORD(window, data); |
197 | } | |
198 | } | |
199 | ||
200 | static inline void | |
201 | qla27xx_read_window(__iomem struct device_reg_24xx *reg, | |
c0496401 | 202 | uint32_t addr, uint offset, uint count, uint width, void *buf, |
f73cb695 CD |
203 | ulong *len) |
204 | { | |
8dfa4b5a BVA |
205 | void __iomem *window = (void __iomem *)reg + offset; |
206 | void (*readn)(void __iomem*, void *, ulong *) = qla27xx_read_vector(width); | |
f73cb695 | 207 | |
c0496401 | 208 | qla27xx_write_reg(reg, IOBASE_ADDR, addr, buf); |
f73cb695 | 209 | while (count--) { |
c0496401 | 210 | qla27xx_insert32(addr, buf, len); |
f73cb695 CD |
211 | readn(window, buf, len); |
212 | window += width; | |
c0496401 | 213 | addr++; |
f73cb695 CD |
214 | } |
215 | } | |
216 | ||
217 | static inline void | |
218 | qla27xx_skip_entry(struct qla27xx_fwdt_entry *ent, void *buf) | |
219 | { | |
220 | if (buf) | |
221 | ent->hdr.driver_flags |= DRIVER_FLAG_SKIP_ENTRY; | |
222 | } | |
223 | ||
224 | static int | |
225 | qla27xx_fwdt_entry_t0(struct scsi_qla_host *vha, | |
226 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
227 | { | |
228 | ql_dbg(ql_dbg_misc, vha, 0xd100, | |
229 | "%s: nop [%lx]\n", __func__, *len); | |
230 | qla27xx_skip_entry(ent, buf); | |
231 | ||
232 | return false; | |
233 | } | |
234 | ||
235 | static int | |
236 | qla27xx_fwdt_entry_t255(struct scsi_qla_host *vha, | |
237 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
238 | { | |
239 | ql_dbg(ql_dbg_misc, vha, 0xd1ff, | |
240 | "%s: end [%lx]\n", __func__, *len); | |
241 | qla27xx_skip_entry(ent, buf); | |
242 | ||
243 | /* terminate */ | |
244 | return true; | |
245 | } | |
246 | ||
247 | static int | |
248 | qla27xx_fwdt_entry_t256(struct scsi_qla_host *vha, | |
249 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
250 | { | |
251 | struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); | |
252 | ||
253 | ql_dbg(ql_dbg_misc, vha, 0xd200, | |
254 | "%s: rdio t1 [%lx]\n", __func__, *len); | |
255 | qla27xx_read_window(reg, ent->t256.base_addr, ent->t256.pci_offset, | |
256 | ent->t256.reg_count, ent->t256.reg_width, buf, len); | |
257 | ||
258 | return false; | |
259 | } | |
260 | ||
261 | static int | |
262 | qla27xx_fwdt_entry_t257(struct scsi_qla_host *vha, | |
263 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
264 | { | |
265 | struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); | |
266 | ||
267 | ql_dbg(ql_dbg_misc, vha, 0xd201, | |
268 | "%s: wrio t1 [%lx]\n", __func__, *len); | |
269 | qla27xx_write_reg(reg, IOBASE_ADDR, ent->t257.base_addr, buf); | |
270 | qla27xx_write_reg(reg, ent->t257.pci_offset, ent->t257.write_data, buf); | |
271 | ||
272 | return false; | |
273 | } | |
274 | ||
275 | static int | |
276 | qla27xx_fwdt_entry_t258(struct scsi_qla_host *vha, | |
277 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
278 | { | |
279 | struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); | |
280 | ||
281 | ql_dbg(ql_dbg_misc, vha, 0xd202, | |
282 | "%s: rdio t2 [%lx]\n", __func__, *len); | |
283 | qla27xx_write_reg(reg, ent->t258.banksel_offset, ent->t258.bank, buf); | |
284 | qla27xx_read_window(reg, ent->t258.base_addr, ent->t258.pci_offset, | |
285 | ent->t258.reg_count, ent->t258.reg_width, buf, len); | |
286 | ||
287 | return false; | |
288 | } | |
289 | ||
290 | static int | |
291 | qla27xx_fwdt_entry_t259(struct scsi_qla_host *vha, | |
292 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
293 | { | |
294 | struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); | |
295 | ||
296 | ql_dbg(ql_dbg_misc, vha, 0xd203, | |
297 | "%s: wrio t2 [%lx]\n", __func__, *len); | |
298 | qla27xx_write_reg(reg, IOBASE_ADDR, ent->t259.base_addr, buf); | |
299 | qla27xx_write_reg(reg, ent->t259.banksel_offset, ent->t259.bank, buf); | |
300 | qla27xx_write_reg(reg, ent->t259.pci_offset, ent->t259.write_data, buf); | |
301 | ||
302 | return false; | |
303 | } | |
304 | ||
305 | static int | |
306 | qla27xx_fwdt_entry_t260(struct scsi_qla_host *vha, | |
307 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
308 | { | |
309 | struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); | |
310 | ||
311 | ql_dbg(ql_dbg_misc, vha, 0xd204, | |
312 | "%s: rdpci [%lx]\n", __func__, *len); | |
c0496401 JC |
313 | qla27xx_insert32(ent->t260.pci_offset, buf, len); |
314 | qla27xx_read_reg(reg, ent->t260.pci_offset, buf, len); | |
f73cb695 CD |
315 | |
316 | return false; | |
317 | } | |
318 | ||
319 | static int | |
320 | qla27xx_fwdt_entry_t261(struct scsi_qla_host *vha, | |
321 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
322 | { | |
323 | struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); | |
324 | ||
325 | ql_dbg(ql_dbg_misc, vha, 0xd205, | |
326 | "%s: wrpci [%lx]\n", __func__, *len); | |
c0496401 | 327 | qla27xx_write_reg(reg, ent->t261.pci_offset, ent->t261.write_data, buf); |
f73cb695 CD |
328 | |
329 | return false; | |
330 | } | |
331 | ||
332 | static int | |
333 | qla27xx_fwdt_entry_t262(struct scsi_qla_host *vha, | |
334 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
335 | { | |
336 | ulong dwords; | |
337 | ulong start; | |
338 | ulong end; | |
339 | ||
340 | ql_dbg(ql_dbg_misc, vha, 0xd206, | |
341 | "%s: rdram(%x) [%lx]\n", __func__, ent->t262.ram_area, *len); | |
342 | start = ent->t262.start_addr; | |
343 | end = ent->t262.end_addr; | |
344 | ||
345 | if (ent->t262.ram_area == T262_RAM_AREA_CRITICAL_RAM) { | |
346 | ; | |
347 | } else if (ent->t262.ram_area == T262_RAM_AREA_EXTERNAL_RAM) { | |
348 | end = vha->hw->fw_memory_size; | |
349 | if (buf) | |
350 | ent->t262.end_addr = end; | |
351 | } else if (ent->t262.ram_area == T262_RAM_AREA_SHARED_RAM) { | |
352 | start = vha->hw->fw_shared_ram_start; | |
353 | end = vha->hw->fw_shared_ram_end; | |
354 | if (buf) { | |
355 | ent->t262.start_addr = start; | |
356 | ent->t262.end_addr = end; | |
357 | } | |
ad1ef177 JC |
358 | } else if (ent->t262.ram_area == T262_RAM_AREA_DDR_RAM) { |
359 | start = vha->hw->fw_ddr_ram_start; | |
360 | end = vha->hw->fw_ddr_ram_end; | |
361 | if (buf) { | |
362 | ent->t262.start_addr = start; | |
363 | ent->t262.end_addr = end; | |
364 | } | |
f73cb695 CD |
365 | } else { |
366 | ql_dbg(ql_dbg_misc, vha, 0xd022, | |
349c390f | 367 | "%s: unknown area %x\n", __func__, ent->t262.ram_area); |
f73cb695 CD |
368 | qla27xx_skip_entry(ent, buf); |
369 | goto done; | |
370 | } | |
371 | ||
ce6c668b | 372 | if (end < start || start == 0 || end == 0) { |
f73cb695 | 373 | ql_dbg(ql_dbg_misc, vha, 0xd023, |
c0496401 | 374 | "%s: unusable range (start=%x end=%x)\n", __func__, |
f73cb695 CD |
375 | ent->t262.end_addr, ent->t262.start_addr); |
376 | qla27xx_skip_entry(ent, buf); | |
377 | goto done; | |
378 | } | |
379 | ||
380 | dwords = end - start + 1; | |
381 | if (buf) { | |
f73cb695 CD |
382 | buf += *len; |
383 | qla24xx_dump_ram(vha->hw, start, buf, dwords, &buf); | |
384 | } | |
385 | *len += dwords * sizeof(uint32_t); | |
386 | done: | |
387 | return false; | |
388 | } | |
389 | ||
390 | static int | |
391 | qla27xx_fwdt_entry_t263(struct scsi_qla_host *vha, | |
392 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
393 | { | |
394 | uint count = 0; | |
395 | uint i; | |
396 | uint length; | |
397 | ||
398 | ql_dbg(ql_dbg_misc, vha, 0xd207, | |
399 | "%s: getq(%x) [%lx]\n", __func__, ent->t263.queue_type, *len); | |
400 | if (ent->t263.queue_type == T263_QUEUE_TYPE_REQ) { | |
401 | for (i = 0; i < vha->hw->max_req_queues; i++) { | |
402 | struct req_que *req = vha->hw->req_q_map[i]; | |
cb43285f | 403 | |
f73cb695 CD |
404 | if (req || !buf) { |
405 | length = req ? | |
406 | req->length : REQUEST_ENTRY_CNT_24XX; | |
407 | qla27xx_insert16(i, buf, len); | |
408 | qla27xx_insert16(length, buf, len); | |
409 | qla27xx_insertbuf(req ? req->ring : NULL, | |
410 | length * sizeof(*req->ring), buf, len); | |
411 | count++; | |
412 | } | |
413 | } | |
414 | } else if (ent->t263.queue_type == T263_QUEUE_TYPE_RSP) { | |
415 | for (i = 0; i < vha->hw->max_rsp_queues; i++) { | |
416 | struct rsp_que *rsp = vha->hw->rsp_q_map[i]; | |
cb43285f | 417 | |
f73cb695 CD |
418 | if (rsp || !buf) { |
419 | length = rsp ? | |
420 | rsp->length : RESPONSE_ENTRY_CNT_MQ; | |
421 | qla27xx_insert16(i, buf, len); | |
422 | qla27xx_insert16(length, buf, len); | |
423 | qla27xx_insertbuf(rsp ? rsp->ring : NULL, | |
424 | length * sizeof(*rsp->ring), buf, len); | |
425 | count++; | |
426 | } | |
427 | } | |
1cbb9156 HM |
428 | } else if (QLA_TGT_MODE_ENABLED() && |
429 | ent->t263.queue_type == T263_QUEUE_TYPE_ATIO) { | |
430 | struct qla_hw_data *ha = vha->hw; | |
431 | struct atio *atr = ha->tgt.atio_ring; | |
432 | ||
433 | if (atr || !buf) { | |
434 | length = ha->tgt.atio_q_length; | |
435 | qla27xx_insert16(0, buf, len); | |
436 | qla27xx_insert16(length, buf, len); | |
437 | qla27xx_insertbuf(atr, length * sizeof(*atr), buf, len); | |
438 | count++; | |
439 | } | |
f73cb695 CD |
440 | } else { |
441 | ql_dbg(ql_dbg_misc, vha, 0xd026, | |
349c390f | 442 | "%s: unknown queue %x\n", __func__, ent->t263.queue_type); |
f73cb695 | 443 | qla27xx_skip_entry(ent, buf); |
f73cb695 CD |
444 | } |
445 | ||
998722d1 JC |
446 | if (buf) { |
447 | if (count) | |
448 | ent->t263.num_queues = count; | |
449 | else | |
450 | qla27xx_skip_entry(ent, buf); | |
451 | } | |
c0496401 | 452 | |
f73cb695 CD |
453 | return false; |
454 | } | |
455 | ||
456 | static int | |
457 | qla27xx_fwdt_entry_t264(struct scsi_qla_host *vha, | |
458 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
459 | { | |
460 | ql_dbg(ql_dbg_misc, vha, 0xd208, | |
461 | "%s: getfce [%lx]\n", __func__, *len); | |
462 | if (vha->hw->fce) { | |
463 | if (buf) { | |
464 | ent->t264.fce_trace_size = FCE_SIZE; | |
465 | ent->t264.write_pointer = vha->hw->fce_wr; | |
466 | ent->t264.base_pointer = vha->hw->fce_dma; | |
467 | ent->t264.fce_enable_mb0 = vha->hw->fce_mb[0]; | |
468 | ent->t264.fce_enable_mb2 = vha->hw->fce_mb[2]; | |
469 | ent->t264.fce_enable_mb3 = vha->hw->fce_mb[3]; | |
470 | ent->t264.fce_enable_mb4 = vha->hw->fce_mb[4]; | |
471 | ent->t264.fce_enable_mb5 = vha->hw->fce_mb[5]; | |
472 | ent->t264.fce_enable_mb6 = vha->hw->fce_mb[6]; | |
473 | } | |
474 | qla27xx_insertbuf(vha->hw->fce, FCE_SIZE, buf, len); | |
475 | } else { | |
476 | ql_dbg(ql_dbg_misc, vha, 0xd027, | |
477 | "%s: missing fce\n", __func__); | |
478 | qla27xx_skip_entry(ent, buf); | |
479 | } | |
480 | ||
481 | return false; | |
482 | } | |
483 | ||
484 | static int | |
485 | qla27xx_fwdt_entry_t265(struct scsi_qla_host *vha, | |
486 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
487 | { | |
488 | struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); | |
489 | ||
490 | ql_dbg(ql_dbg_misc, vha, 0xd209, | |
491 | "%s: pause risc [%lx]\n", __func__, *len); | |
492 | if (buf) | |
61f098dd | 493 | qla24xx_pause_risc(reg, vha->hw); |
f73cb695 CD |
494 | |
495 | return false; | |
496 | } | |
497 | ||
498 | static int | |
499 | qla27xx_fwdt_entry_t266(struct scsi_qla_host *vha, | |
500 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
501 | { | |
502 | ql_dbg(ql_dbg_misc, vha, 0xd20a, | |
503 | "%s: reset risc [%lx]\n", __func__, *len); | |
504 | if (buf) | |
505 | qla24xx_soft_reset(vha->hw); | |
506 | ||
507 | return false; | |
508 | } | |
509 | ||
510 | static int | |
511 | qla27xx_fwdt_entry_t267(struct scsi_qla_host *vha, | |
512 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
513 | { | |
514 | struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); | |
515 | ||
516 | ql_dbg(ql_dbg_misc, vha, 0xd20b, | |
517 | "%s: dis intr [%lx]\n", __func__, *len); | |
518 | qla27xx_write_reg(reg, ent->t267.pci_offset, ent->t267.data, buf); | |
519 | ||
520 | return false; | |
521 | } | |
522 | ||
523 | static int | |
524 | qla27xx_fwdt_entry_t268(struct scsi_qla_host *vha, | |
525 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
526 | { | |
527 | ql_dbg(ql_dbg_misc, vha, 0xd20c, | |
528 | "%s: gethb(%x) [%lx]\n", __func__, ent->t268.buf_type, *len); | |
529 | if (ent->t268.buf_type == T268_BUF_TYPE_EXTD_TRACE) { | |
530 | if (vha->hw->eft) { | |
531 | if (buf) { | |
532 | ent->t268.buf_size = EFT_SIZE; | |
533 | ent->t268.start_addr = vha->hw->eft_dma; | |
534 | } | |
535 | qla27xx_insertbuf(vha->hw->eft, EFT_SIZE, buf, len); | |
536 | } else { | |
537 | ql_dbg(ql_dbg_misc, vha, 0xd028, | |
538 | "%s: missing eft\n", __func__); | |
539 | qla27xx_skip_entry(ent, buf); | |
540 | } | |
f73cb695 CD |
541 | } else { |
542 | ql_dbg(ql_dbg_misc, vha, 0xd02b, | |
349c390f | 543 | "%s: unknown buffer %x\n", __func__, ent->t268.buf_type); |
f73cb695 CD |
544 | qla27xx_skip_entry(ent, buf); |
545 | } | |
546 | ||
547 | return false; | |
548 | } | |
549 | ||
550 | static int | |
551 | qla27xx_fwdt_entry_t269(struct scsi_qla_host *vha, | |
552 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
553 | { | |
554 | ql_dbg(ql_dbg_misc, vha, 0xd20d, | |
555 | "%s: scratch [%lx]\n", __func__, *len); | |
556 | qla27xx_insert32(0xaaaaaaaa, buf, len); | |
557 | qla27xx_insert32(0xbbbbbbbb, buf, len); | |
558 | qla27xx_insert32(0xcccccccc, buf, len); | |
559 | qla27xx_insert32(0xdddddddd, buf, len); | |
560 | qla27xx_insert32(*len + sizeof(uint32_t), buf, len); | |
561 | if (buf) | |
562 | ent->t269.scratch_size = 5 * sizeof(uint32_t); | |
563 | ||
564 | return false; | |
565 | } | |
566 | ||
567 | static int | |
568 | qla27xx_fwdt_entry_t270(struct scsi_qla_host *vha, | |
569 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
570 | { | |
571 | struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); | |
f73cb695 CD |
572 | ulong dwords = ent->t270.count; |
573 | ulong addr = ent->t270.addr; | |
574 | ||
575 | ql_dbg(ql_dbg_misc, vha, 0xd20e, | |
576 | "%s: rdremreg [%lx]\n", __func__, *len); | |
577 | qla27xx_write_reg(reg, IOBASE_ADDR, 0x40, buf); | |
578 | while (dwords--) { | |
579 | qla27xx_write_reg(reg, 0xc0, addr|0x80000000, buf); | |
f73cb695 | 580 | qla27xx_insert32(addr, buf, len); |
c0496401 | 581 | qla27xx_read_reg(reg, 0xc4, buf, len); |
fbce4f49 | 582 | addr += sizeof(uint32_t); |
f73cb695 CD |
583 | } |
584 | ||
585 | return false; | |
586 | } | |
587 | ||
588 | static int | |
589 | qla27xx_fwdt_entry_t271(struct scsi_qla_host *vha, | |
590 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
591 | { | |
592 | struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); | |
593 | ulong addr = ent->t271.addr; | |
0d90c34c | 594 | ulong data = ent->t271.data; |
f73cb695 CD |
595 | |
596 | ql_dbg(ql_dbg_misc, vha, 0xd20f, | |
597 | "%s: wrremreg [%lx]\n", __func__, *len); | |
598 | qla27xx_write_reg(reg, IOBASE_ADDR, 0x40, buf); | |
0d90c34c | 599 | qla27xx_write_reg(reg, 0xc4, data, buf); |
f73cb695 CD |
600 | qla27xx_write_reg(reg, 0xc0, addr, buf); |
601 | ||
602 | return false; | |
603 | } | |
604 | ||
605 | static int | |
606 | qla27xx_fwdt_entry_t272(struct scsi_qla_host *vha, | |
607 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
608 | { | |
609 | ulong dwords = ent->t272.count; | |
610 | ulong start = ent->t272.addr; | |
611 | ||
612 | ql_dbg(ql_dbg_misc, vha, 0xd210, | |
613 | "%s: rdremram [%lx]\n", __func__, *len); | |
614 | if (buf) { | |
615 | ql_dbg(ql_dbg_misc, vha, 0xd02c, | |
616 | "%s: @%lx -> (%lx dwords)\n", __func__, start, dwords); | |
617 | buf += *len; | |
618 | qla27xx_dump_mpi_ram(vha->hw, start, buf, dwords, &buf); | |
619 | } | |
620 | *len += dwords * sizeof(uint32_t); | |
621 | ||
622 | return false; | |
623 | } | |
624 | ||
625 | static int | |
626 | qla27xx_fwdt_entry_t273(struct scsi_qla_host *vha, | |
627 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
628 | { | |
629 | ulong dwords = ent->t273.count; | |
630 | ulong addr = ent->t273.addr; | |
631 | uint32_t value; | |
632 | ||
633 | ql_dbg(ql_dbg_misc, vha, 0xd211, | |
634 | "%s: pcicfg [%lx]\n", __func__, *len); | |
635 | while (dwords--) { | |
636 | value = ~0; | |
637 | if (pci_read_config_dword(vha->hw->pdev, addr, &value)) | |
638 | ql_dbg(ql_dbg_misc, vha, 0xd02d, | |
639 | "%s: failed pcicfg read at %lx\n", __func__, addr); | |
640 | qla27xx_insert32(addr, buf, len); | |
641 | qla27xx_insert32(value, buf, len); | |
c0496401 JC |
642 | addr += sizeof(uint32_t); |
643 | } | |
644 | ||
645 | return false; | |
646 | } | |
647 | ||
648 | static int | |
649 | qla27xx_fwdt_entry_t274(struct scsi_qla_host *vha, | |
650 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
651 | { | |
652 | uint count = 0; | |
653 | uint i; | |
654 | ||
655 | ql_dbg(ql_dbg_misc, vha, 0xd212, | |
656 | "%s: getqsh(%x) [%lx]\n", __func__, ent->t274.queue_type, *len); | |
657 | if (ent->t274.queue_type == T274_QUEUE_TYPE_REQ_SHAD) { | |
658 | for (i = 0; i < vha->hw->max_req_queues; i++) { | |
659 | struct req_que *req = vha->hw->req_q_map[i]; | |
cb43285f | 660 | |
c0496401 JC |
661 | if (req || !buf) { |
662 | qla27xx_insert16(i, buf, len); | |
663 | qla27xx_insert16(1, buf, len); | |
7c6300e3 JC |
664 | qla27xx_insert32(req && req->out_ptr ? |
665 | *req->out_ptr : 0, buf, len); | |
c0496401 JC |
666 | count++; |
667 | } | |
668 | } | |
669 | } else if (ent->t274.queue_type == T274_QUEUE_TYPE_RSP_SHAD) { | |
670 | for (i = 0; i < vha->hw->max_rsp_queues; i++) { | |
671 | struct rsp_que *rsp = vha->hw->rsp_q_map[i]; | |
cb43285f | 672 | |
c0496401 JC |
673 | if (rsp || !buf) { |
674 | qla27xx_insert16(i, buf, len); | |
675 | qla27xx_insert16(1, buf, len); | |
7c6300e3 JC |
676 | qla27xx_insert32(rsp && rsp->in_ptr ? |
677 | *rsp->in_ptr : 0, buf, len); | |
c0496401 JC |
678 | count++; |
679 | } | |
680 | } | |
1cbb9156 HM |
681 | } else if (QLA_TGT_MODE_ENABLED() && |
682 | ent->t274.queue_type == T274_QUEUE_TYPE_ATIO_SHAD) { | |
683 | struct qla_hw_data *ha = vha->hw; | |
684 | struct atio *atr = ha->tgt.atio_ring_ptr; | |
685 | ||
686 | if (atr || !buf) { | |
687 | qla27xx_insert16(0, buf, len); | |
688 | qla27xx_insert16(1, buf, len); | |
689 | qla27xx_insert32(ha->tgt.atio_q_in ? | |
690 | readl(ha->tgt.atio_q_in) : 0, buf, len); | |
691 | count++; | |
692 | } | |
c0496401 JC |
693 | } else { |
694 | ql_dbg(ql_dbg_misc, vha, 0xd02f, | |
349c390f | 695 | "%s: unknown queue %x\n", __func__, ent->t274.queue_type); |
c0496401 | 696 | qla27xx_skip_entry(ent, buf); |
f73cb695 CD |
697 | } |
698 | ||
998722d1 JC |
699 | if (buf) { |
700 | if (count) | |
701 | ent->t274.num_queues = count; | |
702 | else | |
703 | qla27xx_skip_entry(ent, buf); | |
704 | } | |
c0496401 | 705 | |
f73cb695 CD |
706 | return false; |
707 | } | |
708 | ||
2ac224bc JC |
709 | static int |
710 | qla27xx_fwdt_entry_t275(struct scsi_qla_host *vha, | |
711 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
712 | { | |
713 | ulong offset = offsetof(typeof(*ent), t275.buffer); | |
714 | ||
715 | ql_dbg(ql_dbg_misc, vha, 0xd213, | |
716 | "%s: buffer(%x) [%lx]\n", __func__, ent->t275.length, *len); | |
717 | if (!ent->t275.length) { | |
718 | ql_dbg(ql_dbg_misc, vha, 0xd020, | |
719 | "%s: buffer zero length\n", __func__); | |
720 | qla27xx_skip_entry(ent, buf); | |
721 | goto done; | |
722 | } | |
723 | if (offset + ent->t275.length > ent->hdr.entry_size) { | |
724 | ql_dbg(ql_dbg_misc, vha, 0xd030, | |
725 | "%s: buffer overflow\n", __func__); | |
726 | qla27xx_skip_entry(ent, buf); | |
727 | goto done; | |
728 | } | |
729 | ||
730 | qla27xx_insertbuf(ent->t275.buffer, ent->t275.length, buf, len); | |
731 | done: | |
732 | return false; | |
733 | } | |
734 | ||
f73cb695 CD |
735 | static int |
736 | qla27xx_fwdt_entry_other(struct scsi_qla_host *vha, | |
737 | struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) | |
738 | { | |
739 | ql_dbg(ql_dbg_misc, vha, 0xd2ff, | |
740 | "%s: type %x [%lx]\n", __func__, ent->hdr.entry_type, *len); | |
741 | qla27xx_skip_entry(ent, buf); | |
742 | ||
743 | return false; | |
744 | } | |
745 | ||
746 | struct qla27xx_fwdt_entry_call { | |
aa2dc372 | 747 | uint type; |
f73cb695 CD |
748 | int (*call)( |
749 | struct scsi_qla_host *, | |
750 | struct qla27xx_fwdt_entry *, | |
751 | void *, | |
752 | ulong *); | |
753 | }; | |
754 | ||
755 | static struct qla27xx_fwdt_entry_call ql27xx_fwdt_entry_call_list[] = { | |
756 | { ENTRY_TYPE_NOP , qla27xx_fwdt_entry_t0 } , | |
757 | { ENTRY_TYPE_TMP_END , qla27xx_fwdt_entry_t255 } , | |
758 | { ENTRY_TYPE_RD_IOB_T1 , qla27xx_fwdt_entry_t256 } , | |
759 | { ENTRY_TYPE_WR_IOB_T1 , qla27xx_fwdt_entry_t257 } , | |
760 | { ENTRY_TYPE_RD_IOB_T2 , qla27xx_fwdt_entry_t258 } , | |
761 | { ENTRY_TYPE_WR_IOB_T2 , qla27xx_fwdt_entry_t259 } , | |
762 | { ENTRY_TYPE_RD_PCI , qla27xx_fwdt_entry_t260 } , | |
763 | { ENTRY_TYPE_WR_PCI , qla27xx_fwdt_entry_t261 } , | |
764 | { ENTRY_TYPE_RD_RAM , qla27xx_fwdt_entry_t262 } , | |
765 | { ENTRY_TYPE_GET_QUEUE , qla27xx_fwdt_entry_t263 } , | |
766 | { ENTRY_TYPE_GET_FCE , qla27xx_fwdt_entry_t264 } , | |
767 | { ENTRY_TYPE_PSE_RISC , qla27xx_fwdt_entry_t265 } , | |
768 | { ENTRY_TYPE_RST_RISC , qla27xx_fwdt_entry_t266 } , | |
769 | { ENTRY_TYPE_DIS_INTR , qla27xx_fwdt_entry_t267 } , | |
770 | { ENTRY_TYPE_GET_HBUF , qla27xx_fwdt_entry_t268 } , | |
771 | { ENTRY_TYPE_SCRATCH , qla27xx_fwdt_entry_t269 } , | |
772 | { ENTRY_TYPE_RDREMREG , qla27xx_fwdt_entry_t270 } , | |
773 | { ENTRY_TYPE_WRREMREG , qla27xx_fwdt_entry_t271 } , | |
774 | { ENTRY_TYPE_RDREMRAM , qla27xx_fwdt_entry_t272 } , | |
775 | { ENTRY_TYPE_PCICFG , qla27xx_fwdt_entry_t273 } , | |
c0496401 | 776 | { ENTRY_TYPE_GET_SHADOW , qla27xx_fwdt_entry_t274 } , |
2ac224bc | 777 | { ENTRY_TYPE_WRITE_BUF , qla27xx_fwdt_entry_t275 } , |
f73cb695 CD |
778 | { -1 , qla27xx_fwdt_entry_other } |
779 | }; | |
780 | ||
aa2dc372 | 781 | static inline int (*qla27xx_find_entry(uint type)) |
f73cb695 CD |
782 | (struct scsi_qla_host *, struct qla27xx_fwdt_entry *, void *, ulong *) |
783 | { | |
784 | struct qla27xx_fwdt_entry_call *list = ql27xx_fwdt_entry_call_list; | |
785 | ||
aa2dc372 | 786 | while (list->type < type) |
f73cb695 CD |
787 | list++; |
788 | ||
aa2dc372 JC |
789 | if (list->type == type) |
790 | return list->call; | |
791 | return qla27xx_fwdt_entry_other; | |
f73cb695 CD |
792 | } |
793 | ||
794 | static inline void * | |
795 | qla27xx_next_entry(void *p) | |
796 | { | |
797 | struct qla27xx_fwdt_entry *ent = p; | |
798 | ||
799 | return p + ent->hdr.entry_size; | |
800 | } | |
801 | ||
802 | static void | |
803 | qla27xx_walk_template(struct scsi_qla_host *vha, | |
804 | struct qla27xx_fwdt_template *tmp, void *buf, ulong *len) | |
805 | { | |
806 | struct qla27xx_fwdt_entry *ent = (void *)tmp + tmp->entry_offset; | |
807 | ulong count = tmp->entry_count; | |
808 | ||
809 | ql_dbg(ql_dbg_misc, vha, 0xd01a, | |
810 | "%s: entry count %lx\n", __func__, count); | |
811 | while (count--) { | |
383a298b JC |
812 | if (buf && *len >= vha->hw->fw_dump_len) |
813 | break; | |
f73cb695 CD |
814 | if (qla27xx_find_entry(ent->hdr.entry_type)(vha, ent, buf, len)) |
815 | break; | |
816 | ent = qla27xx_next_entry(ent); | |
817 | } | |
299f5e27 JC |
818 | |
819 | if (count) | |
820 | ql_dbg(ql_dbg_misc, vha, 0xd018, | |
383a298b | 821 | "%s: entry residual count (%lx)\n", __func__, count); |
299f5e27 JC |
822 | |
823 | if (ent->hdr.entry_type != ENTRY_TYPE_TMP_END) | |
824 | ql_dbg(ql_dbg_misc, vha, 0xd019, | |
383a298b | 825 | "%s: missing end entry (%lx)\n", __func__, count); |
299f5e27 | 826 | |
383a298b JC |
827 | if (buf && *len != vha->hw->fw_dump_len) |
828 | ql_dbg(ql_dbg_misc, vha, 0xd01b, | |
829 | "%s: length=%#lx residual=%+ld\n", | |
830 | __func__, *len, vha->hw->fw_dump_len - *len); | |
f4bf5e3c | 831 | |
0137e59e | 832 | if (buf) { |
f4bf5e3c | 833 | ql_log(ql_log_warn, vha, 0xd015, |
383a298b | 834 | "Firmware dump saved to temp buffer (%lu/%p)\n", |
f4bf5e3c | 835 | vha->host_no, vha->hw->fw_dump); |
0137e59e HM |
836 | qla2x00_post_uevent_work(vha, QLA_UEVENT_CODE_FW_DUMP); |
837 | } | |
f73cb695 CD |
838 | } |
839 | ||
840 | static void | |
841 | qla27xx_time_stamp(struct qla27xx_fwdt_template *tmp) | |
842 | { | |
843 | tmp->capture_timestamp = jiffies; | |
844 | } | |
845 | ||
846 | static void | |
847 | qla27xx_driver_info(struct qla27xx_fwdt_template *tmp) | |
848 | { | |
849 | uint8_t v[] = { 0, 0, 0, 0, 0, 0 }; | |
f73cb695 | 850 | |
52c82823 | 851 | sscanf(qla2x00_version_str, "%hhu.%hhu.%hhu.%hhu.%hhu.%hhu", |
f73cb695 CD |
852 | v+0, v+1, v+2, v+3, v+4, v+5); |
853 | ||
854 | tmp->driver_info[0] = v[3] << 24 | v[2] << 16 | v[1] << 8 | v[0]; | |
855 | tmp->driver_info[1] = v[5] << 8 | v[4]; | |
856 | tmp->driver_info[2] = 0x12345678; | |
857 | } | |
858 | ||
859 | static void | |
860 | qla27xx_firmware_info(struct qla27xx_fwdt_template *tmp, | |
861 | struct scsi_qla_host *vha) | |
862 | { | |
863 | tmp->firmware_version[0] = vha->hw->fw_major_version; | |
864 | tmp->firmware_version[1] = vha->hw->fw_minor_version; | |
865 | tmp->firmware_version[2] = vha->hw->fw_subminor_version; | |
866 | tmp->firmware_version[3] = | |
867 | vha->hw->fw_attributes_h << 16 | vha->hw->fw_attributes; | |
868 | tmp->firmware_version[4] = | |
869 | vha->hw->fw_attributes_ext[1] << 16 | vha->hw->fw_attributes_ext[0]; | |
870 | } | |
871 | ||
872 | static void | |
873 | ql27xx_edit_template(struct scsi_qla_host *vha, | |
874 | struct qla27xx_fwdt_template *tmp) | |
875 | { | |
876 | qla27xx_time_stamp(tmp); | |
877 | qla27xx_driver_info(tmp); | |
878 | qla27xx_firmware_info(tmp, vha); | |
879 | } | |
880 | ||
881 | static inline uint32_t | |
882 | qla27xx_template_checksum(void *p, ulong size) | |
883 | { | |
884 | uint32_t *buf = p; | |
885 | uint64_t sum = 0; | |
886 | ||
887 | size /= sizeof(*buf); | |
888 | ||
889 | while (size--) | |
890 | sum += *buf++; | |
891 | ||
892 | sum = (sum & 0xffffffff) + (sum >> 32); | |
893 | ||
894 | return ~sum; | |
895 | } | |
896 | ||
897 | static inline int | |
898 | qla27xx_verify_template_checksum(struct qla27xx_fwdt_template *tmp) | |
899 | { | |
900 | return qla27xx_template_checksum(tmp, tmp->template_size) == 0; | |
901 | } | |
902 | ||
903 | static inline int | |
904 | qla27xx_verify_template_header(struct qla27xx_fwdt_template *tmp) | |
905 | { | |
906 | return tmp->template_type == TEMPLATE_TYPE_FWDUMP; | |
907 | } | |
908 | ||
909 | static void | |
910 | qla27xx_execute_fwdt_template(struct scsi_qla_host *vha) | |
911 | { | |
912 | struct qla27xx_fwdt_template *tmp = vha->hw->fw_dump_template; | |
913 | ulong len; | |
914 | ||
915 | if (qla27xx_fwdt_template_valid(tmp)) { | |
916 | len = tmp->template_size; | |
917 | tmp = memcpy(vha->hw->fw_dump, tmp, len); | |
918 | ql27xx_edit_template(vha, tmp); | |
919 | qla27xx_walk_template(vha, tmp, tmp, &len); | |
920 | vha->hw->fw_dump_len = len; | |
921 | vha->hw->fw_dumped = 1; | |
922 | } | |
923 | } | |
924 | ||
925 | ulong | |
926 | qla27xx_fwdt_calculate_dump_size(struct scsi_qla_host *vha) | |
927 | { | |
928 | struct qla27xx_fwdt_template *tmp = vha->hw->fw_dump_template; | |
929 | ulong len = 0; | |
930 | ||
931 | if (qla27xx_fwdt_template_valid(tmp)) { | |
932 | len = tmp->template_size; | |
933 | qla27xx_walk_template(vha, tmp, NULL, &len); | |
934 | } | |
935 | ||
936 | return len; | |
937 | } | |
938 | ||
939 | ulong | |
940 | qla27xx_fwdt_template_size(void *p) | |
941 | { | |
942 | struct qla27xx_fwdt_template *tmp = p; | |
943 | ||
944 | return tmp->template_size; | |
945 | } | |
946 | ||
947 | ulong | |
948 | qla27xx_fwdt_template_default_size(void) | |
949 | { | |
950 | return sizeof(ql27xx_fwdt_default_template); | |
951 | } | |
952 | ||
953 | const void * | |
954 | qla27xx_fwdt_template_default(void) | |
955 | { | |
956 | return ql27xx_fwdt_default_template; | |
957 | } | |
958 | ||
959 | int | |
960 | qla27xx_fwdt_template_valid(void *p) | |
961 | { | |
962 | struct qla27xx_fwdt_template *tmp = p; | |
963 | ||
964 | if (!qla27xx_verify_template_header(tmp)) { | |
965 | ql_log(ql_log_warn, NULL, 0xd01c, | |
966 | "%s: template type %x\n", __func__, tmp->template_type); | |
967 | return false; | |
968 | } | |
969 | ||
970 | if (!qla27xx_verify_template_checksum(tmp)) { | |
971 | ql_log(ql_log_warn, NULL, 0xd01d, | |
972 | "%s: failed template checksum\n", __func__); | |
973 | return false; | |
974 | } | |
975 | ||
976 | return true; | |
977 | } | |
978 | ||
979 | void | |
980 | qla27xx_fwdump(scsi_qla_host_t *vha, int hardware_locked) | |
981 | { | |
982 | ulong flags = 0; | |
983 | ||
8d16366b | 984 | #ifndef __CHECKER__ |
f73cb695 CD |
985 | if (!hardware_locked) |
986 | spin_lock_irqsave(&vha->hw->hardware_lock, flags); | |
8d16366b | 987 | #endif |
f73cb695 CD |
988 | |
989 | if (!vha->hw->fw_dump) | |
990 | ql_log(ql_log_warn, vha, 0xd01e, "fwdump buffer missing.\n"); | |
991 | else if (!vha->hw->fw_dump_template) | |
992 | ql_log(ql_log_warn, vha, 0xd01f, "fwdump template missing.\n"); | |
e8fb1250 HM |
993 | else if (vha->hw->fw_dumped) |
994 | ql_log(ql_log_warn, vha, 0xd300, | |
995 | "Firmware has been previously dumped (%p)," | |
996 | " -- ignoring request\n", vha->hw->fw_dump); | |
f73cb695 CD |
997 | else |
998 | qla27xx_execute_fwdt_template(vha); | |
999 | ||
8d16366b | 1000 | #ifndef __CHECKER__ |
f73cb695 CD |
1001 | if (!hardware_locked) |
1002 | spin_unlock_irqrestore(&vha->hw->hardware_lock, flags); | |
8d16366b | 1003 | #endif |
f73cb695 | 1004 | } |