[mirror_ubuntu-artful-kernel.git] / drivers / scsi / sata_uli.c

/*
 *  sata_uli.c - ULi Electronics SATA
 *
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2, or (at your option)
 *  any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; see the file COPYING.  If not, write to
 *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 *
 *  libata documentation is available via 'make {ps|pdf}docs',
 *  as Documentation/DocBook/libata.*
 *
 *  Hardware documentation available under NDA.
 *
 */

#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/device.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>

#define DRV_NAME	"sata_uli"
#define DRV_VERSION	"0.5"

enum {
	uli_5289		= 0,
	uli_5287		= 1,
	uli_5281		= 2,

	uli_max_ports		= 4,

	/* PCI configuration registers */
	ULI5287_BASE		= 0x90, /* sata0 phy SCR registers */
	ULI5287_OFFS		= 0x10, /* offset from sata0->sata1 phy regs */
	ULI5281_BASE		= 0x60, /* sata0 phy SCR  registers */
	ULI5281_OFFS		= 0x60, /* offset from sata0->sata1 phy regs */
};

struct uli_priv {
	unsigned int		scr_cfg_addr[uli_max_ports];
};

static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
static u32 uli_scr_read (struct ata_port *ap, unsigned int sc_reg);
static void uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);

static const struct pci_device_id uli_pci_tbl[] = {
	{ PCI_VENDOR_ID_AL, 0x5289, PCI_ANY_ID, PCI_ANY_ID, 0, 0, uli_5289 },
	{ PCI_VENDOR_ID_AL, 0x5287, PCI_ANY_ID, PCI_ANY_ID, 0, 0, uli_5287 },
	{ PCI_VENDOR_ID_AL, 0x5281, PCI_ANY_ID, PCI_ANY_ID, 0, 0, uli_5281 },
	{ }	/* terminate list */
};


static struct pci_driver uli_pci_driver = {
	.name			= DRV_NAME,
	.id_table		= uli_pci_tbl,
	.probe			= uli_init_one,
	.remove			= ata_pci_remove_one,
};

static struct scsi_host_template uli_sht = {
	.module			= THIS_MODULE,
	.name			= DRV_NAME,
	.ioctl			= ata_scsi_ioctl,
	.queuecommand		= ata_scsi_queuecmd,
	.eh_strategy_handler	= ata_scsi_error,
	.can_queue		= ATA_DEF_QUEUE,
	.this_id		= ATA_SHT_THIS_ID,
	.sg_tablesize		= LIBATA_MAX_PRD,
	.cmd_per_lun		= ATA_SHT_CMD_PER_LUN,
	.emulated		= ATA_SHT_EMULATED,
	.use_clustering		= ATA_SHT_USE_CLUSTERING,
	.proc_name		= DRV_NAME,
	.dma_boundary		= ATA_DMA_BOUNDARY,
	.slave_configure	= ata_scsi_slave_config,
	.bios_param		= ata_std_bios_param,
};

static const struct ata_port_operations uli_ops = {
	.port_disable		= ata_port_disable,

	.tf_load		= ata_tf_load,
	.tf_read		= ata_tf_read,
	.check_status		= ata_check_status,
	.exec_command		= ata_exec_command,
	.dev_select		= ata_std_dev_select,

	.phy_reset		= sata_phy_reset,

	.bmdma_setup            = ata_bmdma_setup,
	.bmdma_start            = ata_bmdma_start,
	.bmdma_stop		= ata_bmdma_stop,
	.bmdma_status		= ata_bmdma_status,
	.qc_prep		= ata_qc_prep,
	.qc_issue		= ata_qc_issue_prot,

	.eng_timeout		= ata_eng_timeout,

	.irq_handler		= ata_interrupt,
	.irq_clear		= ata_bmdma_irq_clear,

	.scr_read		= uli_scr_read,
	.scr_write		= uli_scr_write,

	.port_start		= ata_port_start,
	.port_stop		= ata_port_stop,
	.host_stop		= ata_host_stop,
};

static struct ata_port_info uli_port_info = {
	.sht            = &uli_sht,
	.host_flags     = ATA_FLAG_SATA | ATA_FLAG_SATA_RESET |
			  ATA_FLAG_NO_LEGACY,
	.pio_mask       = 0x1f,		/* pio0-4 */
	.udma_mask      = 0x7f,		/* udma0-6 */
	.port_ops       = &uli_ops,
};


MODULE_AUTHOR("Peer Chen");
MODULE_DESCRIPTION("low-level driver for ULi Electronics SATA controller");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, uli_pci_tbl);
MODULE_VERSION(DRV_VERSION);

static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg)
{
	struct uli_priv *hpriv = ap->host_set->private_data;
	return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg);
}

static u32 uli_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg)
{
	struct pci_dev *pdev = to_pci_dev(ap->host_set->dev);
	unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg);
	u32 val;

	pci_read_config_dword(pdev, cfg_addr, &val);
	return val;
}

static void uli_scr_cfg_write (struct ata_port *ap, unsigned int scr, u32 val)
{
	struct pci_dev *pdev = to_pci_dev(ap->host_set->dev);
	unsigned int cfg_addr = get_scr_cfg_addr(ap, scr);

	pci_write_config_dword(pdev, cfg_addr, val);
}

static u32 uli_scr_read (struct ata_port *ap, unsigned int sc_reg)
{
	if (sc_reg > SCR_CONTROL)
		return 0xffffffffU;

	return uli_scr_cfg_read(ap, sc_reg);
}

static void uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
{
	if (sc_reg > SCR_CONTROL)	//SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0
		return;

	uli_scr_cfg_write(ap, sc_reg, val);
}

static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
{
	static int printed_version;
	struct ata_probe_ent *probe_ent;
	struct ata_port_info *ppi;
	int rc;
	unsigned int board_idx = (unsigned int) ent->driver_data;
	int pci_dev_busy = 0;
	struct uli_priv *hpriv;

	if (!printed_version++)
		dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n");

	rc = pci_enable_device(pdev);
	if (rc)
		return rc;

	rc = pci_request_regions(pdev, DRV_NAME);
	if (rc) {
		pci_dev_busy = 1;
		goto err_out;
	}

	rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
	if (rc)
		goto err_out_regions;
	rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
	if (rc)
		goto err_out_regions;

	ppi = &uli_port_info;
	probe_ent = ata_pci_init_native_mode(pdev, &ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
	if (!probe_ent) {
		rc = -ENOMEM;
		goto err_out_regions;
	}

	hpriv = kzalloc(sizeof(*hpriv), GFP_KERNEL);
	if (!hpriv) {
		rc = -ENOMEM;
		goto err_out_probe_ent;
	}

	probe_ent->private_data = hpriv;

	switch (board_idx) {
	case uli_5287:
		hpriv->scr_cfg_addr[0] = ULI5287_BASE;
		hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
       		probe_ent->n_ports = 4;

       		probe_ent->port[2].cmd_addr = pci_resource_start(pdev, 0) + 8;
		probe_ent->port[2].altstatus_addr =
		probe_ent->port[2].ctl_addr =
			(pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS) + 4;
		probe_ent->port[2].bmdma_addr = pci_resource_start(pdev, 4) + 16;
		hpriv->scr_cfg_addr[2] = ULI5287_BASE + ULI5287_OFFS*4;

		probe_ent->port[3].cmd_addr = pci_resource_start(pdev, 2) + 8;
		probe_ent->port[3].altstatus_addr =
		probe_ent->port[3].ctl_addr =
			(pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS) + 4;
		probe_ent->port[3].bmdma_addr = pci_resource_start(pdev, 4) + 24;
		hpriv->scr_cfg_addr[3] = ULI5287_BASE + ULI5287_OFFS*5;

		ata_std_ports(&probe_ent->port[2]);
		ata_std_ports(&probe_ent->port[3]);
		break;

	case uli_5289:
		hpriv->scr_cfg_addr[0] = ULI5287_BASE;
		hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
		break;

	case uli_5281:
		hpriv->scr_cfg_addr[0] = ULI5281_BASE;
		hpriv->scr_cfg_addr[1] = ULI5281_BASE + ULI5281_OFFS;
		break;

	default:
		BUG();
		break;
	}

	pci_set_master(pdev);
	pci_intx(pdev, 1);

	/* FIXME: check ata_device_add return value */
	ata_device_add(probe_ent);
	kfree(probe_ent);

	return 0;

err_out_probe_ent:
	kfree(probe_ent);
err_out_regions:
	pci_release_regions(pdev);
err_out:
	if (!pci_dev_busy)
		pci_disable_device(pdev);
	return rc;

}

static int __init uli_init(void)
{
	return pci_module_init(&uli_pci_driver);
}

static void __exit uli_exit(void)
{
	pci_unregister_driver(&uli_pci_driver);
}


module_init(uli_init);
module_exit(uli_exit);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* sata_uli.c - ULi Electronics SATA
	3	*
af36d7f0 JG	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License as published by
	7	* the Free Software Foundation; either version 2, or (at your option)
	8	* any later version.
	9	*
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program; see the file COPYING. If not, write to
	17	* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
	18	*
	19	*
	20	* libata documentation is available via 'make {ps\|pdf}docs',
	21	* as Documentation/DocBook/libata.*
	22	*
	23	* Hardware documentation available under NDA.
1da177e4 LT	24	*
	25	*/
	26
	27	#include <linux/config.h>
	28	#include <linux/kernel.h>
	29	#include <linux/module.h>
	30	#include <linux/pci.h>
	31	#include <linux/init.h>
	32	#include <linux/blkdev.h>
	33	#include <linux/delay.h>
	34	#include <linux/interrupt.h>
a9524a76	35	#include <linux/device.h>
1da177e4 LT	36	#include <scsi/scsi_host.h>
	37	#include <linux/libata.h>
	38
	39	#define DRV_NAME "sata_uli"
	40	#define DRV_VERSION "0.5"
	41
	42	enum {
	43	uli_5289 = 0,
	44	uli_5287 = 1,
	45	uli_5281 = 2,
	46
50106c5a JG	47	uli_max_ports = 4,
50106c5a JG	48
1da177e4 LT	49	/* PCI configuration registers */
	50	ULI5287_BASE = 0x90, /* sata0 phy SCR registers */
	51	ULI5287_OFFS = 0x10, /* offset from sata0->sata1 phy regs */
	52	ULI5281_BASE = 0x60, /* sata0 phy SCR registers */
	53	ULI5281_OFFS = 0x60, /* offset from sata0->sata1 phy regs */
	54	};
	55
50106c5a JG	56	struct uli_priv {
	57	unsigned int scr_cfg_addr[uli_max_ports];
	58	};
	59
1da177e4 LT	60	static int uli_init_one (struct pci_dev pdev, const struct pci_device_id ent);
	61	static u32 uli_scr_read (struct ata_port *ap, unsigned int sc_reg);
	62	static void uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
	63
3b7d697d	64	static const struct pci_device_id uli_pci_tbl[] = {
1da177e4 LT	65	{ PCI_VENDOR_ID_AL, 0x5289, PCI_ANY_ID, PCI_ANY_ID, 0, 0, uli_5289 },
	66	{ PCI_VENDOR_ID_AL, 0x5287, PCI_ANY_ID, PCI_ANY_ID, 0, 0, uli_5287 },
	67	{ PCI_VENDOR_ID_AL, 0x5281, PCI_ANY_ID, PCI_ANY_ID, 0, 0, uli_5281 },
	68	{ } /* terminate list */
	69	};
	70
	71
	72	static struct pci_driver uli_pci_driver = {
	73	.name = DRV_NAME,
	74	.id_table = uli_pci_tbl,
	75	.probe = uli_init_one,
	76	.remove = ata_pci_remove_one,
	77	};
	78
193515d5	79	static struct scsi_host_template uli_sht = {
1da177e4 LT	80	.module = THIS_MODULE,
	81	.name = DRV_NAME,
	82	.ioctl = ata_scsi_ioctl,
	83	.queuecommand = ata_scsi_queuecmd,
	84	.eh_strategy_handler = ata_scsi_error,
	85	.can_queue = ATA_DEF_QUEUE,
	86	.this_id = ATA_SHT_THIS_ID,
	87	.sg_tablesize = LIBATA_MAX_PRD,
1da177e4 LT	88	.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
	89	.emulated = ATA_SHT_EMULATED,
	90	.use_clustering = ATA_SHT_USE_CLUSTERING,
	91	.proc_name = DRV_NAME,
	92	.dma_boundary = ATA_DMA_BOUNDARY,
	93	.slave_configure = ata_scsi_slave_config,
	94	.bios_param = ata_std_bios_param,
1da177e4 LT	95	};
1da177e4 LT	96
057ace5e	97	static const struct ata_port_operations uli_ops = {
1da177e4 LT	98	.port_disable = ata_port_disable,
	99
	100	.tf_load = ata_tf_load,
	101	.tf_read = ata_tf_read,
	102	.check_status = ata_check_status,
	103	.exec_command = ata_exec_command,
	104	.dev_select = ata_std_dev_select,
	105
	106	.phy_reset = sata_phy_reset,
	107
	108	.bmdma_setup = ata_bmdma_setup,
	109	.bmdma_start = ata_bmdma_start,
	110	.bmdma_stop = ata_bmdma_stop,
	111	.bmdma_status = ata_bmdma_status,
	112	.qc_prep = ata_qc_prep,
	113	.qc_issue = ata_qc_issue_prot,
	114
	115	.eng_timeout = ata_eng_timeout,
	116
	117	.irq_handler = ata_interrupt,
	118	.irq_clear = ata_bmdma_irq_clear,
	119
	120	.scr_read = uli_scr_read,
	121	.scr_write = uli_scr_write,
	122
	123	.port_start = ata_port_start,
	124	.port_stop = ata_port_stop,
aa8f0dc6	125	.host_stop = ata_host_stop,
1da177e4 LT	126	};
	127
	128	static struct ata_port_info uli_port_info = {
	129	.sht = &uli_sht,
	130	.host_flags = ATA_FLAG_SATA \| ATA_FLAG_SATA_RESET \|
	131	ATA_FLAG_NO_LEGACY,
7da79312 BR	132	.pio_mask = 0x1f, /* pio0-4 */
7da79312 BR	133	.udma_mask = 0x7f, /* udma0-6 */
1da177e4 LT	134	.port_ops = &uli_ops,
	135	};
	136
	137
	138	MODULE_AUTHOR("Peer Chen");
	139	MODULE_DESCRIPTION("low-level driver for ULi Electronics SATA controller");
	140	MODULE_LICENSE("GPL");
	141	MODULE_DEVICE_TABLE(pci, uli_pci_tbl);
	142	MODULE_VERSION(DRV_VERSION);
	143
	144	static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg)
	145	{
50106c5a JG	146	struct uli_priv *hpriv = ap->host_set->private_data;
50106c5a JG	147	return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg);
1da177e4 LT	148	}
	149
	150	static u32 uli_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg)
	151	{
	152	struct pci_dev *pdev = to_pci_dev(ap->host_set->dev);
	153	unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg);
	154	u32 val;
	155
	156	pci_read_config_dword(pdev, cfg_addr, &val);
	157	return val;
	158	}
	159
	160	static void uli_scr_cfg_write (struct ata_port *ap, unsigned int scr, u32 val)
	161	{
	162	struct pci_dev *pdev = to_pci_dev(ap->host_set->dev);
	163	unsigned int cfg_addr = get_scr_cfg_addr(ap, scr);
	164
	165	pci_write_config_dword(pdev, cfg_addr, val);
	166	}
	167
	168	static u32 uli_scr_read (struct ata_port *ap, unsigned int sc_reg)
	169	{
	170	if (sc_reg > SCR_CONTROL)
	171	return 0xffffffffU;
	172
	173	return uli_scr_cfg_read(ap, sc_reg);
	174	}
	175
	176	static void uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
	177	{
	178	if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0
	179	return;
	180
	181	uli_scr_cfg_write(ap, sc_reg, val);
	182	}
	183
1da177e4 LT	184	static int uli_init_one (struct pci_dev pdev, const struct pci_device_id ent)
1da177e4 LT	185	{
a9524a76	186	static int printed_version;
1da177e4 LT	187	struct ata_probe_ent *probe_ent;
	188	struct ata_port_info *ppi;
	189	int rc;
	190	unsigned int board_idx = (unsigned int) ent->driver_data;
	191	int pci_dev_busy = 0;
50106c5a	192	struct uli_priv *hpriv;
1da177e4	193
a9524a76 JG	194	if (!printed_version++)
	195	dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n");
	196
1da177e4 LT	197	rc = pci_enable_device(pdev);
	198	if (rc)
	199	return rc;
	200
	201	rc = pci_request_regions(pdev, DRV_NAME);
	202	if (rc) {
	203	pci_dev_busy = 1;
	204	goto err_out;
	205	}
	206
	207	rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
	208	if (rc)
	209	goto err_out_regions;
	210	rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
	211	if (rc)
	212	goto err_out_regions;
	213
	214	ppi = &uli_port_info;
47a86593	215	probe_ent = ata_pci_init_native_mode(pdev, &ppi, ATA_PORT_PRIMARY \| ATA_PORT_SECONDARY);
1da177e4 LT	216	if (!probe_ent) {
	217	rc = -ENOMEM;
	218	goto err_out_regions;
	219	}
8a60a071	220
50106c5a JG	221	hpriv = kzalloc(sizeof(*hpriv), GFP_KERNEL);
	222	if (!hpriv) {
	223	rc = -ENOMEM;
	224	goto err_out_probe_ent;
	225	}
	226
	227	probe_ent->private_data = hpriv;
	228
1da177e4 LT	229	switch (board_idx) {
1da177e4 LT	230	case uli_5287:
50106c5a JG	231	hpriv->scr_cfg_addr[0] = ULI5287_BASE;
50106c5a JG	232	hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
1da177e4 LT	233	probe_ent->n_ports = 4;
	234
	235	probe_ent->port[2].cmd_addr = pci_resource_start(pdev, 0) + 8;
	236	probe_ent->port[2].altstatus_addr =
	237	probe_ent->port[2].ctl_addr =
	238	(pci_resource_start(pdev, 1) \| ATA_PCI_CTL_OFS) + 4;
	239	probe_ent->port[2].bmdma_addr = pci_resource_start(pdev, 4) + 16;
50106c5a	240	hpriv->scr_cfg_addr[2] = ULI5287_BASE + ULI5287_OFFS*4;
1da177e4 LT	241
	242	probe_ent->port[3].cmd_addr = pci_resource_start(pdev, 2) + 8;
	243	probe_ent->port[3].altstatus_addr =
	244	probe_ent->port[3].ctl_addr =
	245	(pci_resource_start(pdev, 3) \| ATA_PCI_CTL_OFS) + 4;
	246	probe_ent->port[3].bmdma_addr = pci_resource_start(pdev, 4) + 24;
50106c5a	247	hpriv->scr_cfg_addr[3] = ULI5287_BASE + ULI5287_OFFS*5;
1da177e4 LT	248
	249	ata_std_ports(&probe_ent->port[2]);
	250	ata_std_ports(&probe_ent->port[3]);
	251	break;
	252
	253	case uli_5289:
50106c5a JG	254	hpriv->scr_cfg_addr[0] = ULI5287_BASE;
50106c5a JG	255	hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
1da177e4 LT	256	break;
	257
	258	case uli_5281:
50106c5a JG	259	hpriv->scr_cfg_addr[0] = ULI5281_BASE;
50106c5a JG	260	hpriv->scr_cfg_addr[1] = ULI5281_BASE + ULI5281_OFFS;
1da177e4 LT	261	break;
	262
	263	default:
	264	BUG();
	265	break;
	266	}
	267
	268	pci_set_master(pdev);
a04ce0ff	269	pci_intx(pdev, 1);
1da177e4 LT	270
	271	/* FIXME: check ata_device_add return value */
	272	ata_device_add(probe_ent);
	273	kfree(probe_ent);
	274
	275	return 0;
	276
50106c5a JG	277	err_out_probe_ent:
50106c5a JG	278	kfree(probe_ent);
1da177e4 LT	279	err_out_regions:
1da177e4 LT	280	pci_release_regions(pdev);
1da177e4 LT	281	err_out:
	282	if (!pci_dev_busy)
	283	pci_disable_device(pdev);
	284	return rc;
	285
	286	}
	287
	288	static int __init uli_init(void)
	289	{
	290	return pci_module_init(&uli_pci_driver);
	291	}
	292
	293	static void __exit uli_exit(void)
	294	{
	295	pci_unregister_driver(&uli_pci_driver);
	296	}
	297
	298
	299	module_init(uli_init);
	300	module_exit(uli_exit);