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1da177e4 LT |
1 | /* |
2 | * sata_uli.c - ULi Electronics SATA | |
3 | * | |
af36d7f0 JG |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 2, or (at your option) | |
8 | * any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; see the file COPYING. If not, write to | |
17 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
18 | * | |
19 | * | |
20 | * libata documentation is available via 'make {ps|pdf}docs', | |
21 | * as Documentation/DocBook/libata.* | |
22 | * | |
23 | * Hardware documentation available under NDA. | |
1da177e4 LT |
24 | * |
25 | */ | |
26 | ||
27 | #include <linux/config.h> | |
28 | #include <linux/kernel.h> | |
29 | #include <linux/module.h> | |
30 | #include <linux/pci.h> | |
31 | #include <linux/init.h> | |
32 | #include <linux/blkdev.h> | |
33 | #include <linux/delay.h> | |
34 | #include <linux/interrupt.h> | |
35 | #include "scsi.h" | |
36 | #include <scsi/scsi_host.h> | |
37 | #include <linux/libata.h> | |
38 | ||
39 | #define DRV_NAME "sata_uli" | |
40 | #define DRV_VERSION "0.5" | |
41 | ||
42 | enum { | |
43 | uli_5289 = 0, | |
44 | uli_5287 = 1, | |
45 | uli_5281 = 2, | |
46 | ||
47 | /* PCI configuration registers */ | |
48 | ULI5287_BASE = 0x90, /* sata0 phy SCR registers */ | |
49 | ULI5287_OFFS = 0x10, /* offset from sata0->sata1 phy regs */ | |
50 | ULI5281_BASE = 0x60, /* sata0 phy SCR registers */ | |
51 | ULI5281_OFFS = 0x60, /* offset from sata0->sata1 phy regs */ | |
52 | }; | |
53 | ||
54 | static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); | |
55 | static u32 uli_scr_read (struct ata_port *ap, unsigned int sc_reg); | |
56 | static void uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); | |
57 | ||
58 | static struct pci_device_id uli_pci_tbl[] = { | |
59 | { PCI_VENDOR_ID_AL, 0x5289, PCI_ANY_ID, PCI_ANY_ID, 0, 0, uli_5289 }, | |
60 | { PCI_VENDOR_ID_AL, 0x5287, PCI_ANY_ID, PCI_ANY_ID, 0, 0, uli_5287 }, | |
61 | { PCI_VENDOR_ID_AL, 0x5281, PCI_ANY_ID, PCI_ANY_ID, 0, 0, uli_5281 }, | |
62 | { } /* terminate list */ | |
63 | }; | |
64 | ||
65 | ||
66 | static struct pci_driver uli_pci_driver = { | |
67 | .name = DRV_NAME, | |
68 | .id_table = uli_pci_tbl, | |
69 | .probe = uli_init_one, | |
70 | .remove = ata_pci_remove_one, | |
71 | }; | |
72 | ||
73 | static Scsi_Host_Template uli_sht = { | |
74 | .module = THIS_MODULE, | |
75 | .name = DRV_NAME, | |
76 | .ioctl = ata_scsi_ioctl, | |
77 | .queuecommand = ata_scsi_queuecmd, | |
78 | .eh_strategy_handler = ata_scsi_error, | |
79 | .can_queue = ATA_DEF_QUEUE, | |
80 | .this_id = ATA_SHT_THIS_ID, | |
81 | .sg_tablesize = LIBATA_MAX_PRD, | |
82 | .max_sectors = ATA_MAX_SECTORS, | |
83 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, | |
84 | .emulated = ATA_SHT_EMULATED, | |
85 | .use_clustering = ATA_SHT_USE_CLUSTERING, | |
86 | .proc_name = DRV_NAME, | |
87 | .dma_boundary = ATA_DMA_BOUNDARY, | |
88 | .slave_configure = ata_scsi_slave_config, | |
89 | .bios_param = ata_std_bios_param, | |
90 | .ordered_flush = 1, | |
91 | }; | |
92 | ||
93 | static struct ata_port_operations uli_ops = { | |
94 | .port_disable = ata_port_disable, | |
95 | ||
96 | .tf_load = ata_tf_load, | |
97 | .tf_read = ata_tf_read, | |
98 | .check_status = ata_check_status, | |
99 | .exec_command = ata_exec_command, | |
100 | .dev_select = ata_std_dev_select, | |
101 | ||
102 | .phy_reset = sata_phy_reset, | |
103 | ||
104 | .bmdma_setup = ata_bmdma_setup, | |
105 | .bmdma_start = ata_bmdma_start, | |
106 | .bmdma_stop = ata_bmdma_stop, | |
107 | .bmdma_status = ata_bmdma_status, | |
108 | .qc_prep = ata_qc_prep, | |
109 | .qc_issue = ata_qc_issue_prot, | |
110 | ||
111 | .eng_timeout = ata_eng_timeout, | |
112 | ||
113 | .irq_handler = ata_interrupt, | |
114 | .irq_clear = ata_bmdma_irq_clear, | |
115 | ||
116 | .scr_read = uli_scr_read, | |
117 | .scr_write = uli_scr_write, | |
118 | ||
119 | .port_start = ata_port_start, | |
120 | .port_stop = ata_port_stop, | |
aa8f0dc6 | 121 | .host_stop = ata_host_stop, |
1da177e4 LT |
122 | }; |
123 | ||
124 | static struct ata_port_info uli_port_info = { | |
125 | .sht = &uli_sht, | |
126 | .host_flags = ATA_FLAG_SATA | ATA_FLAG_SATA_RESET | | |
127 | ATA_FLAG_NO_LEGACY, | |
7da79312 BR |
128 | .pio_mask = 0x1f, /* pio0-4 */ |
129 | .udma_mask = 0x7f, /* udma0-6 */ | |
1da177e4 LT |
130 | .port_ops = &uli_ops, |
131 | }; | |
132 | ||
133 | ||
134 | MODULE_AUTHOR("Peer Chen"); | |
135 | MODULE_DESCRIPTION("low-level driver for ULi Electronics SATA controller"); | |
136 | MODULE_LICENSE("GPL"); | |
137 | MODULE_DEVICE_TABLE(pci, uli_pci_tbl); | |
138 | MODULE_VERSION(DRV_VERSION); | |
139 | ||
140 | static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg) | |
141 | { | |
142 | return ap->ioaddr.scr_addr + (4 * sc_reg); | |
143 | } | |
144 | ||
145 | static u32 uli_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg) | |
146 | { | |
147 | struct pci_dev *pdev = to_pci_dev(ap->host_set->dev); | |
148 | unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg); | |
149 | u32 val; | |
150 | ||
151 | pci_read_config_dword(pdev, cfg_addr, &val); | |
152 | return val; | |
153 | } | |
154 | ||
155 | static void uli_scr_cfg_write (struct ata_port *ap, unsigned int scr, u32 val) | |
156 | { | |
157 | struct pci_dev *pdev = to_pci_dev(ap->host_set->dev); | |
158 | unsigned int cfg_addr = get_scr_cfg_addr(ap, scr); | |
159 | ||
160 | pci_write_config_dword(pdev, cfg_addr, val); | |
161 | } | |
162 | ||
163 | static u32 uli_scr_read (struct ata_port *ap, unsigned int sc_reg) | |
164 | { | |
165 | if (sc_reg > SCR_CONTROL) | |
166 | return 0xffffffffU; | |
167 | ||
168 | return uli_scr_cfg_read(ap, sc_reg); | |
169 | } | |
170 | ||
171 | static void uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) | |
172 | { | |
173 | if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0 | |
174 | return; | |
175 | ||
176 | uli_scr_cfg_write(ap, sc_reg, val); | |
177 | } | |
178 | ||
179 | /* move to PCI layer, integrate w/ MSI stuff */ | |
180 | static void pci_enable_intx(struct pci_dev *pdev) | |
181 | { | |
182 | u16 pci_command; | |
183 | ||
184 | pci_read_config_word(pdev, PCI_COMMAND, &pci_command); | |
185 | if (pci_command & PCI_COMMAND_INTX_DISABLE) { | |
186 | pci_command &= ~PCI_COMMAND_INTX_DISABLE; | |
187 | pci_write_config_word(pdev, PCI_COMMAND, pci_command); | |
188 | } | |
189 | } | |
190 | ||
191 | static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |
192 | { | |
193 | struct ata_probe_ent *probe_ent; | |
194 | struct ata_port_info *ppi; | |
195 | int rc; | |
196 | unsigned int board_idx = (unsigned int) ent->driver_data; | |
197 | int pci_dev_busy = 0; | |
198 | ||
199 | rc = pci_enable_device(pdev); | |
200 | if (rc) | |
201 | return rc; | |
202 | ||
203 | rc = pci_request_regions(pdev, DRV_NAME); | |
204 | if (rc) { | |
205 | pci_dev_busy = 1; | |
206 | goto err_out; | |
207 | } | |
208 | ||
209 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); | |
210 | if (rc) | |
211 | goto err_out_regions; | |
212 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); | |
213 | if (rc) | |
214 | goto err_out_regions; | |
215 | ||
216 | ppi = &uli_port_info; | |
217 | probe_ent = ata_pci_init_native_mode(pdev, &ppi); | |
218 | if (!probe_ent) { | |
219 | rc = -ENOMEM; | |
220 | goto err_out_regions; | |
221 | } | |
8a60a071 | 222 | |
1da177e4 LT |
223 | switch (board_idx) { |
224 | case uli_5287: | |
225 | probe_ent->port[0].scr_addr = ULI5287_BASE; | |
226 | probe_ent->port[1].scr_addr = ULI5287_BASE + ULI5287_OFFS; | |
227 | probe_ent->n_ports = 4; | |
228 | ||
229 | probe_ent->port[2].cmd_addr = pci_resource_start(pdev, 0) + 8; | |
230 | probe_ent->port[2].altstatus_addr = | |
231 | probe_ent->port[2].ctl_addr = | |
232 | (pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS) + 4; | |
233 | probe_ent->port[2].bmdma_addr = pci_resource_start(pdev, 4) + 16; | |
234 | probe_ent->port[2].scr_addr = ULI5287_BASE + ULI5287_OFFS*4; | |
235 | ||
236 | probe_ent->port[3].cmd_addr = pci_resource_start(pdev, 2) + 8; | |
237 | probe_ent->port[3].altstatus_addr = | |
238 | probe_ent->port[3].ctl_addr = | |
239 | (pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS) + 4; | |
240 | probe_ent->port[3].bmdma_addr = pci_resource_start(pdev, 4) + 24; | |
241 | probe_ent->port[3].scr_addr = ULI5287_BASE + ULI5287_OFFS*5; | |
242 | ||
243 | ata_std_ports(&probe_ent->port[2]); | |
244 | ata_std_ports(&probe_ent->port[3]); | |
245 | break; | |
246 | ||
247 | case uli_5289: | |
248 | probe_ent->port[0].scr_addr = ULI5287_BASE; | |
249 | probe_ent->port[1].scr_addr = ULI5287_BASE + ULI5287_OFFS; | |
250 | break; | |
251 | ||
252 | case uli_5281: | |
253 | probe_ent->port[0].scr_addr = ULI5281_BASE; | |
254 | probe_ent->port[1].scr_addr = ULI5281_BASE + ULI5281_OFFS; | |
255 | break; | |
256 | ||
257 | default: | |
258 | BUG(); | |
259 | break; | |
260 | } | |
261 | ||
262 | pci_set_master(pdev); | |
263 | pci_enable_intx(pdev); | |
264 | ||
265 | /* FIXME: check ata_device_add return value */ | |
266 | ata_device_add(probe_ent); | |
267 | kfree(probe_ent); | |
268 | ||
269 | return 0; | |
270 | ||
271 | err_out_regions: | |
272 | pci_release_regions(pdev); | |
273 | ||
274 | err_out: | |
275 | if (!pci_dev_busy) | |
276 | pci_disable_device(pdev); | |
277 | return rc; | |
278 | ||
279 | } | |
280 | ||
281 | static int __init uli_init(void) | |
282 | { | |
283 | return pci_module_init(&uli_pci_driver); | |
284 | } | |
285 | ||
286 | static void __exit uli_exit(void) | |
287 | { | |
288 | pci_unregister_driver(&uli_pci_driver); | |
289 | } | |
290 | ||
291 | ||
292 | module_init(uli_init); | |
293 | module_exit(uli_exit); |