[mirror_ubuntu-artful-kernel.git] / drivers / scsi / sun3_scsi.c

/*
 * Sun3 SCSI stuff by Erik Verbruggen (erik@bigmama.xtdnet.nl)
 *
 * Sun3 DMA routines added by Sam Creasey (sammy@sammy.net)
 *
 * VME support added by Sam Creasey
 *
 * TODO: modify this driver to support multiple Sun3 SCSI VME boards
 *
 * Adapted from mac_scsinew.c:
 */
/*
 * Generic Macintosh NCR5380 driver
 *
 * Copyright 1998, Michael Schmitz <mschmitz@lbl.gov>
 *
 * derived in part from:
 */
/*
 * Generic Generic NCR5380 driver
 *
 * Copyright 1995, Russell King
 */

#include <linux/types.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/platform_device.h>

#include <asm/io.h>
#include <asm/dvma.h>

#include <scsi/scsi_host.h>
#include "sun3_scsi.h"

/* minimum number of bytes to do dma on */
#define DMA_MIN_SIZE                    129

/* Definitions for the core NCR5380 driver. */

#define NCR5380_implementation_fields   /* none */

#define NCR5380_read(reg)               in_8(hostdata->io + (reg))
#define NCR5380_write(reg, value)       out_8(hostdata->io + (reg), value)

#define NCR5380_queue_command           sun3scsi_queue_command
#define NCR5380_bus_reset               sun3scsi_bus_reset
#define NCR5380_abort                   sun3scsi_abort
#define NCR5380_info                    sun3scsi_info

#define NCR5380_dma_xfer_len            sun3scsi_dma_xfer_len
#define NCR5380_dma_recv_setup          sun3scsi_dma_count
#define NCR5380_dma_send_setup          sun3scsi_dma_count
#define NCR5380_dma_residual            sun3scsi_dma_residual

#define NCR5380_acquire_dma_irq(instance)    (1)
#define NCR5380_release_dma_irq(instance)

#include "NCR5380.h"


extern int sun3_map_test(unsigned long, char *);

static int setup_can_queue = -1;
module_param(setup_can_queue, int, 0);
static int setup_cmd_per_lun = -1;
module_param(setup_cmd_per_lun, int, 0);
static int setup_sg_tablesize = -1;
module_param(setup_sg_tablesize, int, 0);
static int setup_hostid = -1;
module_param(setup_hostid, int, 0);

/* ms to wait after hitting dma regs */
#define SUN3_DMA_DELAY 10

/* dvma buffer to allocate -- 32k should hopefully be more than sufficient */
#define SUN3_DVMA_BUFSIZE 0xe000

static struct scsi_cmnd *sun3_dma_setup_done;
static volatile struct sun3_dma_regs *dregs;
static struct sun3_udc_regs *udc_regs;
static unsigned char *sun3_dma_orig_addr;
static unsigned long sun3_dma_orig_count;
static int sun3_dma_active;
static unsigned long last_residual;

#ifndef SUN3_SCSI_VME
/* dma controller register access functions */

static inline unsigned short sun3_udc_read(unsigned char reg)
{
	unsigned short ret;

	dregs->udc_addr = UDC_CSR;
	udelay(SUN3_DMA_DELAY);
	ret = dregs->udc_data;
	udelay(SUN3_DMA_DELAY);
	
	return ret;
}

static inline void sun3_udc_write(unsigned short val, unsigned char reg)
{
	dregs->udc_addr = reg;
	udelay(SUN3_DMA_DELAY);
	dregs->udc_data = val;
	udelay(SUN3_DMA_DELAY);
}
#endif

// safe bits for the CSR
#define CSR_GOOD 0x060f

static irqreturn_t scsi_sun3_intr(int irq, void *dev)
{
	struct Scsi_Host *instance = dev;
	unsigned short csr = dregs->csr;
	int handled = 0;

#ifdef SUN3_SCSI_VME
	dregs->csr &= ~CSR_DMA_ENABLE;
#endif

	if(csr & ~CSR_GOOD) {
		if (csr & CSR_DMA_BUSERR)
			shost_printk(KERN_ERR, instance, "bus error in DMA\n");
		if (csr & CSR_DMA_CONFLICT)
			shost_printk(KERN_ERR, instance, "DMA conflict\n");
		handled = 1;
	}

	if(csr & (CSR_SDB_INT | CSR_DMA_INT)) {
		NCR5380_intr(irq, dev);
		handled = 1;
	}

	return IRQ_RETVAL(handled);
}

/* sun3scsi_dma_setup() -- initialize the dma controller for a read/write */
static int sun3scsi_dma_setup(struct NCR5380_hostdata *hostdata,
                              unsigned char *data, int count, int write_flag)
{
	void *addr;

	if(sun3_dma_orig_addr != NULL)
		dvma_unmap(sun3_dma_orig_addr);

#ifdef SUN3_SCSI_VME
	addr = (void *)dvma_map_vme((unsigned long) data, count);
#else
	addr = (void *)dvma_map((unsigned long) data, count);
#endif
		
	sun3_dma_orig_addr = addr;
	sun3_dma_orig_count = count;

#ifndef SUN3_SCSI_VME
	dregs->fifo_count = 0;
	sun3_udc_write(UDC_RESET, UDC_CSR);
	
	/* reset fifo */
	dregs->csr &= ~CSR_FIFO;
	dregs->csr |= CSR_FIFO;
#endif
	
	/* set direction */
	if(write_flag)
		dregs->csr |= CSR_SEND;
	else
		dregs->csr &= ~CSR_SEND;
	
#ifdef SUN3_SCSI_VME
	dregs->csr |= CSR_PACK_ENABLE;

	dregs->dma_addr_hi = ((unsigned long)addr >> 16);
	dregs->dma_addr_lo = ((unsigned long)addr & 0xffff);

	dregs->dma_count_hi = 0;
	dregs->dma_count_lo = 0;
	dregs->fifo_count_hi = 0;
	dregs->fifo_count = 0;
#else
	/* byte count for fifo */
	dregs->fifo_count = count;

	sun3_udc_write(UDC_RESET, UDC_CSR);
	
	/* reset fifo */
	dregs->csr &= ~CSR_FIFO;
	dregs->csr |= CSR_FIFO;
	
	if(dregs->fifo_count != count) { 
		shost_printk(KERN_ERR, hostdata->host,
		             "FIFO mismatch %04x not %04x\n",
		             dregs->fifo_count, (unsigned int) count);
		NCR5380_dprint(NDEBUG_DMA, hostdata->host);
	}

	/* setup udc */
	udc_regs->addr_hi = (((unsigned long)(addr) & 0xff0000) >> 8);
	udc_regs->addr_lo = ((unsigned long)(addr) & 0xffff);
	udc_regs->count = count/2; /* count in words */
	udc_regs->mode_hi = UDC_MODE_HIWORD;
	if(write_flag) {
		if(count & 1)
			udc_regs->count++;
		udc_regs->mode_lo = UDC_MODE_LSEND;
		udc_regs->rsel = UDC_RSEL_SEND;
	} else {
		udc_regs->mode_lo = UDC_MODE_LRECV;
		udc_regs->rsel = UDC_RSEL_RECV;
	}
	
	/* announce location of regs block */
	sun3_udc_write(((dvma_vtob(udc_regs) & 0xff0000) >> 8),
		       UDC_CHN_HI); 

	sun3_udc_write((dvma_vtob(udc_regs) & 0xffff), UDC_CHN_LO);

	/* set dma master on */
	sun3_udc_write(0xd, UDC_MODE);

	/* interrupt enable */
	sun3_udc_write(UDC_INT_ENABLE, UDC_CSR);
#endif
	
       	return count;

}

static int sun3scsi_dma_count(struct NCR5380_hostdata *hostdata,
                              unsigned char *data, int count)
{
	return count;
}

static inline int sun3scsi_dma_recv_setup(struct NCR5380_hostdata *hostdata,
                                          unsigned char *data, int count)
{
	return sun3scsi_dma_setup(hostdata, data, count, 0);
}

static inline int sun3scsi_dma_send_setup(struct NCR5380_hostdata *hostdata,
                                          unsigned char *data, int count)
{
	return sun3scsi_dma_setup(hostdata, data, count, 1);
}

static int sun3scsi_dma_residual(struct NCR5380_hostdata *hostdata)
{
	return last_residual;
}

static int sun3scsi_dma_xfer_len(struct NCR5380_hostdata *hostdata,
                                 struct scsi_cmnd *cmd)
{
	int wanted_len = cmd->SCp.this_residual;

	if (wanted_len < DMA_MIN_SIZE || cmd->request->cmd_type != REQ_TYPE_FS)
		return 0;

	return wanted_len;
}

static inline int sun3scsi_dma_start(unsigned long count, unsigned char *data)
{
#ifdef SUN3_SCSI_VME
	unsigned short csr;

	csr = dregs->csr;

	dregs->dma_count_hi = (sun3_dma_orig_count >> 16);
	dregs->dma_count_lo = (sun3_dma_orig_count & 0xffff);

	dregs->fifo_count_hi = (sun3_dma_orig_count >> 16);
	dregs->fifo_count = (sun3_dma_orig_count & 0xffff);

/*	if(!(csr & CSR_DMA_ENABLE))
 *		dregs->csr |= CSR_DMA_ENABLE;
 */
#else
    sun3_udc_write(UDC_CHN_START, UDC_CSR);
#endif
    
    return 0;
}

/* clean up after our dma is done */
static int sun3scsi_dma_finish(int write_flag)
{
	unsigned short __maybe_unused count;
	unsigned short fifo;
	int ret = 0;
	
	sun3_dma_active = 0;

#ifdef SUN3_SCSI_VME
	dregs->csr &= ~CSR_DMA_ENABLE;

	fifo = dregs->fifo_count;
	if (write_flag) {
		if ((fifo > 0) && (fifo < sun3_dma_orig_count))
			fifo++;
	}

	last_residual = fifo;
	/* empty bytes from the fifo which didn't make it */
	if ((!write_flag) && (dregs->csr & CSR_LEFT)) {
		unsigned char *vaddr;

		vaddr = (unsigned char *)dvma_vmetov(sun3_dma_orig_addr);

		vaddr += (sun3_dma_orig_count - fifo);
		vaddr--;

		switch (dregs->csr & CSR_LEFT) {
		case CSR_LEFT_3:
			*vaddr = (dregs->bpack_lo & 0xff00) >> 8;
			vaddr--;

		case CSR_LEFT_2:
			*vaddr = (dregs->bpack_hi & 0x00ff);
			vaddr--;

		case CSR_LEFT_1:
			*vaddr = (dregs->bpack_hi & 0xff00) >> 8;
			break;
		}
	}
#else
	// check to empty the fifo on a read
	if(!write_flag) {
		int tmo = 20000; /* .2 sec */
		
		while(1) {
			if(dregs->csr & CSR_FIFO_EMPTY)
				break;

			if(--tmo <= 0) {
				printk("sun3scsi: fifo failed to empty!\n");
				return 1;
			}
			udelay(10);
		}
	}

	dregs->udc_addr = 0x32;
	udelay(SUN3_DMA_DELAY);
	count = 2 * dregs->udc_data;
	udelay(SUN3_DMA_DELAY);

	fifo = dregs->fifo_count;
	last_residual = fifo;

	/* empty bytes from the fifo which didn't make it */
	if((!write_flag) && (count - fifo) == 2) {
		unsigned short data;
		unsigned char *vaddr;

		data = dregs->fifo_data;
		vaddr = (unsigned char *)dvma_btov(sun3_dma_orig_addr);
		
		vaddr += (sun3_dma_orig_count - fifo);

		vaddr[-2] = (data & 0xff00) >> 8;
		vaddr[-1] = (data & 0xff);
	}
#endif

	dvma_unmap(sun3_dma_orig_addr);
	sun3_dma_orig_addr = NULL;

#ifdef SUN3_SCSI_VME
	dregs->dma_addr_hi = 0;
	dregs->dma_addr_lo = 0;
	dregs->dma_count_hi = 0;
	dregs->dma_count_lo = 0;

	dregs->fifo_count = 0;
	dregs->fifo_count_hi = 0;

	dregs->csr &= ~CSR_SEND;
/*	dregs->csr |= CSR_DMA_ENABLE; */
#else
	sun3_udc_write(UDC_RESET, UDC_CSR);
	dregs->fifo_count = 0;
	dregs->csr &= ~CSR_SEND;

	/* reset fifo */
	dregs->csr &= ~CSR_FIFO;
	dregs->csr |= CSR_FIFO;
#endif
	
	sun3_dma_setup_done = NULL;

	return ret;

}
	
#include "NCR5380.c"

#ifdef SUN3_SCSI_VME
#define SUN3_SCSI_NAME          "Sun3 NCR5380 VME SCSI"
#define DRV_MODULE_NAME         "sun3_scsi_vme"
#else
#define SUN3_SCSI_NAME          "Sun3 NCR5380 SCSI"
#define DRV_MODULE_NAME         "sun3_scsi"
#endif

#define PFX                     DRV_MODULE_NAME ": "

static struct scsi_host_template sun3_scsi_template = {
	.module			= THIS_MODULE,
	.proc_name		= DRV_MODULE_NAME,
	.name			= SUN3_SCSI_NAME,
	.info			= sun3scsi_info,
	.queuecommand		= sun3scsi_queue_command,
	.eh_abort_handler	= sun3scsi_abort,
	.eh_bus_reset_handler	= sun3scsi_bus_reset,
	.can_queue		= 16,
	.this_id		= 7,
	.sg_tablesize		= SG_NONE,
	.cmd_per_lun		= 2,
	.use_clustering		= DISABLE_CLUSTERING,
	.cmd_size		= NCR5380_CMD_SIZE,
};

static int __init sun3_scsi_probe(struct platform_device *pdev)
{
	struct Scsi_Host *instance;
	struct NCR5380_hostdata *hostdata;
	int error;
	struct resource *irq, *mem;
	void __iomem *ioaddr;
	int host_flags = 0;
#ifdef SUN3_SCSI_VME
	int i;
#endif

	if (setup_can_queue > 0)
		sun3_scsi_template.can_queue = setup_can_queue;
	if (setup_cmd_per_lun > 0)
		sun3_scsi_template.cmd_per_lun = setup_cmd_per_lun;
	if (setup_sg_tablesize >= 0)
		sun3_scsi_template.sg_tablesize = setup_sg_tablesize;
	if (setup_hostid >= 0)
		sun3_scsi_template.this_id = setup_hostid & 7;

#ifdef SUN3_SCSI_VME
	ioaddr = NULL;
	for (i = 0; i < 2; i++) {
		unsigned char x;

		irq = platform_get_resource(pdev, IORESOURCE_IRQ, i);
		mem = platform_get_resource(pdev, IORESOURCE_MEM, i);
		if (!irq || !mem)
			break;

		ioaddr = sun3_ioremap(mem->start, resource_size(mem),
		                      SUN3_PAGE_TYPE_VME16);
		dregs = (struct sun3_dma_regs *)(ioaddr + 8);

		if (sun3_map_test((unsigned long)dregs, &x)) {
			unsigned short oldcsr;

			oldcsr = dregs->csr;
			dregs->csr = 0;
			udelay(SUN3_DMA_DELAY);
			if (dregs->csr == 0x1400)
				break;

			dregs->csr = oldcsr;
		}

		iounmap(ioaddr);
		ioaddr = NULL;
	}
	if (!ioaddr)
		return -ENODEV;
#else
	irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!irq || !mem)
		return -ENODEV;

	ioaddr = ioremap(mem->start, resource_size(mem));
	dregs = (struct sun3_dma_regs *)(ioaddr + 8);

	udc_regs = dvma_malloc(sizeof(struct sun3_udc_regs));
	if (!udc_regs) {
		pr_err(PFX "couldn't allocate DVMA memory!\n");
		iounmap(ioaddr);
		return -ENOMEM;
	}
#endif

	instance = scsi_host_alloc(&sun3_scsi_template,
	                           sizeof(struct NCR5380_hostdata));
	if (!instance) {
		error = -ENOMEM;
		goto fail_alloc;
	}

	instance->irq = irq->start;

	hostdata = shost_priv(instance);
	hostdata->base = mem->start;
	hostdata->io = ioaddr;

	error = NCR5380_init(instance, host_flags);
	if (error)
		goto fail_init;

	error = request_irq(instance->irq, scsi_sun3_intr, 0,
	                    "NCR5380", instance);
	if (error) {
		pr_err(PFX "scsi%d: IRQ %d not free, bailing out\n",
		       instance->host_no, instance->irq);
		goto fail_irq;
	}

	dregs->csr = 0;
	udelay(SUN3_DMA_DELAY);
	dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR;
	udelay(SUN3_DMA_DELAY);
	dregs->fifo_count = 0;
#ifdef SUN3_SCSI_VME
	dregs->fifo_count_hi = 0;
	dregs->dma_addr_hi = 0;
	dregs->dma_addr_lo = 0;
	dregs->dma_count_hi = 0;
	dregs->dma_count_lo = 0;

	dregs->ivect = VME_DATA24 | (instance->irq & 0xff);
#endif

	NCR5380_maybe_reset_bus(instance);

	error = scsi_add_host(instance, NULL);
	if (error)
		goto fail_host;

	platform_set_drvdata(pdev, instance);

	scsi_scan_host(instance);
	return 0;

fail_host:
	free_irq(instance->irq, instance);
fail_irq:
	NCR5380_exit(instance);
fail_init:
	scsi_host_put(instance);
fail_alloc:
	if (udc_regs)
		dvma_free(udc_regs);
	iounmap(ioaddr);
	return error;
}

static int __exit sun3_scsi_remove(struct platform_device *pdev)
{
	struct Scsi_Host *instance = platform_get_drvdata(pdev);
	struct NCR5380_hostdata *hostdata = shost_priv(instance);
	void __iomem *ioaddr = hostdata->io;

	scsi_remove_host(instance);
	free_irq(instance->irq, instance);
	NCR5380_exit(instance);
	scsi_host_put(instance);
	if (udc_regs)
		dvma_free(udc_regs);
	iounmap(ioaddr);
	return 0;
}

static struct platform_driver sun3_scsi_driver = {
	.remove = __exit_p(sun3_scsi_remove),
	.driver = {
		.name	= DRV_MODULE_NAME,
	},
};

module_platform_driver_probe(sun3_scsi_driver, sun3_scsi_probe);

MODULE_ALIAS("platform:" DRV_MODULE_NAME);
MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Sun3 SCSI stuff by Erik Verbruggen (erik@bigmama.xtdnet.nl)
	3	*
	4	* Sun3 DMA routines added by Sam Creasey (sammy@sammy.net)
	5	*
757f5bad FT	6	* VME support added by Sam Creasey
	7	*
	8	* TODO: modify this driver to support multiple Sun3 SCSI VME boards
	9	*
1da177e4 LT	10	* Adapted from mac_scsinew.c:
	11	*/
	12	/*
	13	* Generic Macintosh NCR5380 driver
	14	*
	15	* Copyright 1998, Michael Schmitz <mschmitz@lbl.gov>
	16	*
	17	* derived in part from:
	18	*/
	19	/*
	20	* Generic Generic NCR5380 driver
	21	*
	22	* Copyright 1995, Russell King
1da177e4 LT	23	*/
1da177e4 LT	24
1da177e4	25	#include <linux/types.h>
1da177e4	26	#include <linux/delay.h>
1da177e4	27	#include <linux/module.h>
1da177e4 LT	28	#include <linux/ioport.h>
	29	#include <linux/init.h>
	30	#include <linux/blkdev.h>
0d31f875	31	#include <linux/platform_device.h>
1da177e4 LT	32
1da177e4 LT	33	#include <asm/io.h>
1da177e4	34	#include <asm/dvma.h>
1da177e4	35
1da177e4 LT	36	#include <scsi/scsi_host.h>
1da177e4 LT	37	#include "sun3_scsi.h"
1da177e4	38
8dad0c51 FT	39	/* minimum number of bytes to do dma on */
8dad0c51 FT	40	#define DMA_MIN_SIZE 129
1da177e4	41
e63449c4 FT	42	/* Definitions for the core NCR5380 driver. */
e63449c4 FT	43
2231ef87 FT	44	#define NCR5380_implementation_fields /* none */
2231ef87 FT	45
61e1ce58 FT	46	#define NCR5380_read(reg) in_8(hostdata->io + (reg))
61e1ce58 FT	47	#define NCR5380_write(reg, value) out_8(hostdata->io + (reg), value)
2231ef87 FT	48
	49	#define NCR5380_queue_command sun3scsi_queue_command
	50	#define NCR5380_bus_reset sun3scsi_bus_reset
	51	#define NCR5380_abort sun3scsi_abort
2231ef87 FT	52	#define NCR5380_info sun3scsi_info
2231ef87 FT	53
4a98f896 FT	54	#define NCR5380_dma_xfer_len sun3scsi_dma_xfer_len
	55	#define NCR5380_dma_recv_setup sun3scsi_dma_count
	56	#define NCR5380_dma_send_setup sun3scsi_dma_count
	57	#define NCR5380_dma_residual sun3scsi_dma_residual
2231ef87	58
8dad0c51 FT	59	#define NCR5380_acquire_dma_irq(instance) (1)
	60	#define NCR5380_release_dma_irq(instance)
	61
2231ef87 FT	62	#include "NCR5380.h"
	63
	64
	65	extern int sun3_map_test(unsigned long, char *);
	66
1da177e4 LT	67	static int setup_can_queue = -1;
	68	module_param(setup_can_queue, int, 0);
	69	static int setup_cmd_per_lun = -1;
	70	module_param(setup_cmd_per_lun, int, 0);
	71	static int setup_sg_tablesize = -1;
	72	module_param(setup_sg_tablesize, int, 0);
1da177e4 LT	73	static int setup_hostid = -1;
	74	module_param(setup_hostid, int, 0);
	75
1da177e4 LT	76	/* ms to wait after hitting dma regs */
	77	#define SUN3_DMA_DELAY 10
	78
	79	/* dvma buffer to allocate -- 32k should hopefully be more than sufficient */
	80	#define SUN3_DVMA_BUFSIZE 0xe000
	81
2231ef87	82	static struct scsi_cmnd *sun3_dma_setup_done;
1da177e4	83	static volatile struct sun3_dma_regs *dregs;
0d31f875	84	static struct sun3_udc_regs *udc_regs;
d5f7e65d FT	85	static unsigned char *sun3_dma_orig_addr;
	86	static unsigned long sun3_dma_orig_count;
	87	static int sun3_dma_active;
	88	static unsigned long last_residual;
1da177e4	89
757f5bad	90	#ifndef SUN3_SCSI_VME
1da177e4 LT	91	/* dma controller register access functions */
	92
	93	static inline unsigned short sun3_udc_read(unsigned char reg)
	94	{
	95	unsigned short ret;
	96
	97	dregs->udc_addr = UDC_CSR;
	98	udelay(SUN3_DMA_DELAY);
	99	ret = dregs->udc_data;
	100	udelay(SUN3_DMA_DELAY);
	101
	102	return ret;
	103	}
	104
	105	static inline void sun3_udc_write(unsigned short val, unsigned char reg)
	106	{
	107	dregs->udc_addr = reg;
	108	udelay(SUN3_DMA_DELAY);
	109	dregs->udc_data = val;
	110	udelay(SUN3_DMA_DELAY);
	111	}
757f5bad	112	#endif
1da177e4	113
1da177e4 LT	114	// safe bits for the CSR
	115	#define CSR_GOOD 0x060f
	116
cd46140a	117	static irqreturn_t scsi_sun3_intr(int irq, void *dev)
1da177e4	118	{
cd46140a	119	struct Scsi_Host *instance = dev;
1da177e4 LT	120	unsigned short csr = dregs->csr;
	121	int handled = 0;
	122
757f5bad FT	123	#ifdef SUN3_SCSI_VME
	124	dregs->csr &= ~CSR_DMA_ENABLE;
	125	#endif
	126
1da177e4	127	if(csr & ~CSR_GOOD) {
cd46140a FT	128	if (csr & CSR_DMA_BUSERR)
	129	shost_printk(KERN_ERR, instance, "bus error in DMA\n");
	130	if (csr & CSR_DMA_CONFLICT)
	131	shost_printk(KERN_ERR, instance, "DMA conflict\n");
1da177e4 LT	132	handled = 1;
	133	}
	134
	135	if(csr & (CSR_SDB_INT \| CSR_DMA_INT)) {
cd46140a	136	NCR5380_intr(irq, dev);
1da177e4 LT	137	handled = 1;
	138	}
	139
	140	return IRQ_RETVAL(handled);
	141	}
	142
1da177e4	143	/* sun3scsi_dma_setup() -- initialize the dma controller for a read/write */
4a98f896 FT	144	static int sun3scsi_dma_setup(struct NCR5380_hostdata *hostdata,
4a98f896 FT	145	unsigned char *data, int count, int write_flag)
1da177e4	146	{
1da177e4 LT	147	void *addr;
	148
	149	if(sun3_dma_orig_addr != NULL)
	150	dvma_unmap(sun3_dma_orig_addr);
	151
757f5bad FT	152	#ifdef SUN3_SCSI_VME
	153	addr = (void *)dvma_map_vme((unsigned long) data, count);
	154	#else
1da177e4	155	addr = (void *)dvma_map((unsigned long) data, count);
757f5bad	156	#endif
1da177e4 LT	157
	158	sun3_dma_orig_addr = addr;
	159	sun3_dma_orig_count = count;
757f5bad FT	160
757f5bad FT	161	#ifndef SUN3_SCSI_VME
1da177e4 LT	162	dregs->fifo_count = 0;
	163	sun3_udc_write(UDC_RESET, UDC_CSR);
	164
	165	/* reset fifo */
	166	dregs->csr &= ~CSR_FIFO;
	167	dregs->csr \|= CSR_FIFO;
757f5bad	168	#endif
1da177e4 LT	169
	170	/* set direction */
	171	if(write_flag)
	172	dregs->csr \|= CSR_SEND;
	173	else
	174	dregs->csr &= ~CSR_SEND;
	175
757f5bad FT	176	#ifdef SUN3_SCSI_VME
	177	dregs->csr \|= CSR_PACK_ENABLE;
	178
	179	dregs->dma_addr_hi = ((unsigned long)addr >> 16);
	180	dregs->dma_addr_lo = ((unsigned long)addr & 0xffff);
	181
	182	dregs->dma_count_hi = 0;
	183	dregs->dma_count_lo = 0;
	184	dregs->fifo_count_hi = 0;
	185	dregs->fifo_count = 0;
	186	#else
1da177e4 LT	187	/* byte count for fifo */
	188	dregs->fifo_count = count;
	189
	190	sun3_udc_write(UDC_RESET, UDC_CSR);
	191
	192	/* reset fifo */
	193	dregs->csr &= ~CSR_FIFO;
	194	dregs->csr \|= CSR_FIFO;
	195
	196	if(dregs->fifo_count != count) {
4a98f896 FT	197	shost_printk(KERN_ERR, hostdata->host,
4a98f896 FT	198	"FIFO mismatch %04x not %04x\n",
cd46140a	199	dregs->fifo_count, (unsigned int) count);
4a98f896	200	NCR5380_dprint(NDEBUG_DMA, hostdata->host);
1da177e4 LT	201	}
	202
	203	/* setup udc */
1da177e4 LT	204	udc_regs->addr_hi = (((unsigned long)(addr) & 0xff0000) >> 8);
1da177e4 LT	205	udc_regs->addr_lo = ((unsigned long)(addr) & 0xffff);
1da177e4 LT	206	udc_regs->count = count/2; /* count in words */
	207	udc_regs->mode_hi = UDC_MODE_HIWORD;
	208	if(write_flag) {
	209	if(count & 1)
	210	udc_regs->count++;
	211	udc_regs->mode_lo = UDC_MODE_LSEND;
	212	udc_regs->rsel = UDC_RSEL_SEND;
	213	} else {
	214	udc_regs->mode_lo = UDC_MODE_LRECV;
	215	udc_regs->rsel = UDC_RSEL_RECV;
	216	}
	217
	218	/* announce location of regs block */
	219	sun3_udc_write(((dvma_vtob(udc_regs) & 0xff0000) >> 8),
	220	UDC_CHN_HI);
	221
	222	sun3_udc_write((dvma_vtob(udc_regs) & 0xffff), UDC_CHN_LO);
	223
	224	/* set dma master on */
	225	sun3_udc_write(0xd, UDC_MODE);
	226
	227	/* interrupt enable */
	228	sun3_udc_write(UDC_INT_ENABLE, UDC_CSR);
757f5bad	229	#endif
1da177e4 LT	230
	231	return count;
	232
	233	}
	234
4a98f896 FT	235	static int sun3scsi_dma_count(struct NCR5380_hostdata *hostdata,
	236	unsigned char *data, int count)
	237	{
	238	return count;
	239	}
	240
	241	static inline int sun3scsi_dma_recv_setup(struct NCR5380_hostdata *hostdata,
	242	unsigned char *data, int count)
	243	{
	244	return sun3scsi_dma_setup(hostdata, data, count, 0);
	245	}
	246
	247	static inline int sun3scsi_dma_send_setup(struct NCR5380_hostdata *hostdata,
	248	unsigned char *data, int count)
	249	{
	250	return sun3scsi_dma_setup(hostdata, data, count, 1);
	251	}
	252
	253	static int sun3scsi_dma_residual(struct NCR5380_hostdata *hostdata)
1da177e4 LT	254	{
	255	return last_residual;
	256	}
	257
4a98f896 FT	258	static int sun3scsi_dma_xfer_len(struct NCR5380_hostdata *hostdata,
4a98f896 FT	259	struct scsi_cmnd *cmd)
1da177e4	260	{
4a98f896 FT	261	int wanted_len = cmd->SCp.this_residual;
4a98f896 FT	262
e63449c4	263	if (wanted_len < DMA_MIN_SIZE \|\| cmd->request->cmd_type != REQ_TYPE_FS)
1da177e4	264	return 0;
e63449c4 FT	265
e63449c4 FT	266	return wanted_len;
1da177e4 LT	267	}
	268
	269	static inline int sun3scsi_dma_start(unsigned long count, unsigned char *data)
	270	{
757f5bad FT	271	#ifdef SUN3_SCSI_VME
	272	unsigned short csr;
	273
	274	csr = dregs->csr;
	275
	276	dregs->dma_count_hi = (sun3_dma_orig_count >> 16);
	277	dregs->dma_count_lo = (sun3_dma_orig_count & 0xffff);
1da177e4	278
757f5bad FT	279	dregs->fifo_count_hi = (sun3_dma_orig_count >> 16);
	280	dregs->fifo_count = (sun3_dma_orig_count & 0xffff);
	281
	282	/* if(!(csr & CSR_DMA_ENABLE))
	283	* dregs->csr \|= CSR_DMA_ENABLE;
	284	*/
	285	#else
1da177e4	286	sun3_udc_write(UDC_CHN_START, UDC_CSR);
757f5bad	287	#endif
1da177e4 LT	288
	289	return 0;
	290	}
	291
	292	/* clean up after our dma is done */
	293	static int sun3scsi_dma_finish(int write_flag)
	294	{
757f5bad	295	unsigned short __maybe_unused count;
1da177e4 LT	296	unsigned short fifo;
	297	int ret = 0;
	298
	299	sun3_dma_active = 0;
757f5bad FT	300
	301	#ifdef SUN3_SCSI_VME
	302	dregs->csr &= ~CSR_DMA_ENABLE;
	303
	304	fifo = dregs->fifo_count;
	305	if (write_flag) {
	306	if ((fifo > 0) && (fifo < sun3_dma_orig_count))
	307	fifo++;
	308	}
	309
	310	last_residual = fifo;
	311	/* empty bytes from the fifo which didn't make it */
	312	if ((!write_flag) && (dregs->csr & CSR_LEFT)) {
	313	unsigned char *vaddr;
	314
	315	vaddr = (unsigned char *)dvma_vmetov(sun3_dma_orig_addr);
	316
	317	vaddr += (sun3_dma_orig_count - fifo);
	318	vaddr--;
	319
	320	switch (dregs->csr & CSR_LEFT) {
	321	case CSR_LEFT_3:
	322	*vaddr = (dregs->bpack_lo & 0xff00) >> 8;
	323	vaddr--;
	324
	325	case CSR_LEFT_2:
	326	*vaddr = (dregs->bpack_hi & 0x00ff);
	327	vaddr--;
	328
	329	case CSR_LEFT_1:
	330	*vaddr = (dregs->bpack_hi & 0xff00) >> 8;
	331	break;
	332	}
	333	}
	334	#else
1da177e4 LT	335	// check to empty the fifo on a read
	336	if(!write_flag) {
	337	int tmo = 20000; /* .2 sec */
	338
	339	while(1) {
	340	if(dregs->csr & CSR_FIFO_EMPTY)
	341	break;
	342
	343	if(--tmo <= 0) {
	344	printk("sun3scsi: fifo failed to empty!\n");
	345	return 1;
	346	}
	347	udelay(10);
	348	}
	349	}
1da177e4	350
cd46140a FT	351	dregs->udc_addr = 0x32;
	352	udelay(SUN3_DMA_DELAY);
	353	count = 2 * dregs->udc_data;
	354	udelay(SUN3_DMA_DELAY);
1da177e4 LT	355
	356	fifo = dregs->fifo_count;
	357	last_residual = fifo;
	358
	359	/* empty bytes from the fifo which didn't make it */
	360	if((!write_flag) && (count - fifo) == 2) {
	361	unsigned short data;
	362	unsigned char *vaddr;
	363
	364	data = dregs->fifo_data;
	365	vaddr = (unsigned char *)dvma_btov(sun3_dma_orig_addr);
	366
	367	vaddr += (sun3_dma_orig_count - fifo);
	368
	369	vaddr[-2] = (data & 0xff00) >> 8;
	370	vaddr[-1] = (data & 0xff);
	371	}
757f5bad	372	#endif
1da177e4 LT	373
	374	dvma_unmap(sun3_dma_orig_addr);
	375	sun3_dma_orig_addr = NULL;
757f5bad FT	376
	377	#ifdef SUN3_SCSI_VME
	378	dregs->dma_addr_hi = 0;
	379	dregs->dma_addr_lo = 0;
	380	dregs->dma_count_hi = 0;
	381	dregs->dma_count_lo = 0;
	382
	383	dregs->fifo_count = 0;
	384	dregs->fifo_count_hi = 0;
	385
	386	dregs->csr &= ~CSR_SEND;
	387	/* dregs->csr \|= CSR_DMA_ENABLE; */
	388	#else
1da177e4 LT	389	sun3_udc_write(UDC_RESET, UDC_CSR);
	390	dregs->fifo_count = 0;
	391	dregs->csr &= ~CSR_SEND;
	392
	393	/* reset fifo */
	394	dregs->csr &= ~CSR_FIFO;
	395	dregs->csr \|= CSR_FIFO;
757f5bad	396	#endif
1da177e4 LT	397
	398	sun3_dma_setup_done = NULL;
	399
	400	return ret;
	401
	402	}
	403
e9db3198	404	#include "NCR5380.c"
1da177e4	405
0d31f875 FT	406	#ifdef SUN3_SCSI_VME
	407	#define SUN3_SCSI_NAME "Sun3 NCR5380 VME SCSI"
	408	#define DRV_MODULE_NAME "sun3_scsi_vme"
	409	#else
	410	#define SUN3_SCSI_NAME "Sun3 NCR5380 SCSI"
	411	#define DRV_MODULE_NAME "sun3_scsi"
	412	#endif
	413
	414	#define PFX DRV_MODULE_NAME ": "
	415
	416	static struct scsi_host_template sun3_scsi_template = {
	417	.module = THIS_MODULE,
	418	.proc_name = DRV_MODULE_NAME,
1da177e4	419	.name = SUN3_SCSI_NAME,
1da177e4 LT	420	.info = sun3scsi_info,
1da177e4 LT	421	.queuecommand = sun3scsi_queue_command,
aa2e2cb1 FT	422	.eh_abort_handler = sun3scsi_abort,
aa2e2cb1 FT	423	.eh_bus_reset_handler = sun3scsi_bus_reset,
d572f65f	424	.can_queue = 16,
1da177e4	425	.this_id = 7,
d572f65f FT	426	.sg_tablesize = SG_NONE,
d572f65f FT	427	.cmd_per_lun = 2,
aa2e2cb1	428	.use_clustering = DISABLE_CLUSTERING,
32b26a10	429	.cmd_size = NCR5380_CMD_SIZE,
1da177e4 LT	430	};
1da177e4 LT	431
0d31f875 FT	432	static int __init sun3_scsi_probe(struct platform_device *pdev)
	433	{
	434	struct Scsi_Host *instance;
820682b1	435	struct NCR5380_hostdata *hostdata;
0d31f875 FT	436	int error;
0d31f875 FT	437	struct resource irq, mem;
61e1ce58	438	void __iomem *ioaddr;
ca513fc9	439	int host_flags = 0;
0d31f875 FT	440	#ifdef SUN3_SCSI_VME
	441	int i;
	442	#endif
	443
	444	if (setup_can_queue > 0)
	445	sun3_scsi_template.can_queue = setup_can_queue;
	446	if (setup_cmd_per_lun > 0)
	447	sun3_scsi_template.cmd_per_lun = setup_cmd_per_lun;
	448	if (setup_sg_tablesize >= 0)
	449	sun3_scsi_template.sg_tablesize = setup_sg_tablesize;
	450	if (setup_hostid >= 0)
	451	sun3_scsi_template.this_id = setup_hostid & 7;
	452
0d31f875 FT	453	#ifdef SUN3_SCSI_VME
	454	ioaddr = NULL;
	455	for (i = 0; i < 2; i++) {
	456	unsigned char x;
	457
	458	irq = platform_get_resource(pdev, IORESOURCE_IRQ, i);
	459	mem = platform_get_resource(pdev, IORESOURCE_MEM, i);
	460	if (!irq \|\| !mem)
	461	break;
	462
	463	ioaddr = sun3_ioremap(mem->start, resource_size(mem),
	464	SUN3_PAGE_TYPE_VME16);
	465	dregs = (struct sun3_dma_regs *)(ioaddr + 8);
	466
	467	if (sun3_map_test((unsigned long)dregs, &x)) {
	468	unsigned short oldcsr;
	469
	470	oldcsr = dregs->csr;
	471	dregs->csr = 0;
	472	udelay(SUN3_DMA_DELAY);
	473	if (dregs->csr == 0x1400)
	474	break;
	475
	476	dregs->csr = oldcsr;
	477	}
	478
	479	iounmap(ioaddr);
	480	ioaddr = NULL;
	481	}
	482	if (!ioaddr)
	483	return -ENODEV;
	484	#else
	485	irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
	486	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	487	if (!irq \|\| !mem)
	488	return -ENODEV;
	489
	490	ioaddr = ioremap(mem->start, resource_size(mem));
	491	dregs = (struct sun3_dma_regs *)(ioaddr + 8);
	492
	493	udc_regs = dvma_malloc(sizeof(struct sun3_udc_regs));
	494	if (!udc_regs) {
	495	pr_err(PFX "couldn't allocate DVMA memory!\n");
	496	iounmap(ioaddr);
	497	return -ENOMEM;
	498	}
	499	#endif
	500
0d31f875 FT	501	instance = scsi_host_alloc(&sun3_scsi_template,
	502	sizeof(struct NCR5380_hostdata));
	503	if (!instance) {
	504	error = -ENOMEM;
	505	goto fail_alloc;
	506	}
0d31f875	507
0d31f875 FT	508	instance->irq = irq->start;
0d31f875 FT	509
820682b1	510	hostdata = shost_priv(instance);
61e1ce58 FT	511	hostdata->base = mem->start;
61e1ce58 FT	512	hostdata->io = ioaddr;
820682b1	513
0ad0eff9 FT	514	error = NCR5380_init(instance, host_flags);
	515	if (error)
	516	goto fail_init;
0d31f875 FT	517
	518	error = request_irq(instance->irq, scsi_sun3_intr, 0,
	519	"NCR5380", instance);
	520	if (error) {
0d31f875 FT	521	pr_err(PFX "scsi%d: IRQ %d not free, bailing out\n",
	522	instance->host_no, instance->irq);
	523	goto fail_irq;
0d31f875 FT	524	}
	525
	526	dregs->csr = 0;
	527	udelay(SUN3_DMA_DELAY);
	528	dregs->csr = CSR_SCSI \| CSR_FIFO \| CSR_INTR;
	529	udelay(SUN3_DMA_DELAY);
	530	dregs->fifo_count = 0;
	531	#ifdef SUN3_SCSI_VME
	532	dregs->fifo_count_hi = 0;
	533	dregs->dma_addr_hi = 0;
	534	dregs->dma_addr_lo = 0;
	535	dregs->dma_count_hi = 0;
	536	dregs->dma_count_lo = 0;
	537
	538	dregs->ivect = VME_DATA24 \| (instance->irq & 0xff);
	539	#endif
	540
9c3f0e2b	541	NCR5380_maybe_reset_bus(instance);
0d31f875 FT	542
	543	error = scsi_add_host(instance, NULL);
	544	if (error)
	545	goto fail_host;
	546
	547	platform_set_drvdata(pdev, instance);
	548
	549	scsi_scan_host(instance);
	550	return 0;
	551
	552	fail_host:
e4dec680	553	free_irq(instance->irq, instance);
0d31f875 FT	554	fail_irq:
0d31f875 FT	555	NCR5380_exit(instance);
0ad0eff9	556	fail_init:
0d31f875 FT	557	scsi_host_put(instance);
	558	fail_alloc:
	559	if (udc_regs)
	560	dvma_free(udc_regs);
61e1ce58	561	iounmap(ioaddr);
0d31f875 FT	562	return error;
	563	}
	564
	565	static int __exit sun3_scsi_remove(struct platform_device *pdev)
	566	{
	567	struct Scsi_Host *instance = platform_get_drvdata(pdev);
61e1ce58 FT	568	struct NCR5380_hostdata *hostdata = shost_priv(instance);
61e1ce58 FT	569	void __iomem *ioaddr = hostdata->io;
0d31f875 FT	570
0d31f875 FT	571	scsi_remove_host(instance);
e4dec680	572	free_irq(instance->irq, instance);
0d31f875 FT	573	NCR5380_exit(instance);
	574	scsi_host_put(instance);
	575	if (udc_regs)
	576	dvma_free(udc_regs);
61e1ce58	577	iounmap(ioaddr);
0d31f875 FT	578	return 0;
	579	}
	580
	581	static struct platform_driver sun3_scsi_driver = {
	582	.remove = __exit_p(sun3_scsi_remove),
	583	.driver = {
	584	.name = DRV_MODULE_NAME,
0d31f875 FT	585	},
0d31f875 FT	586	};
1da177e4	587
0d31f875	588	module_platform_driver_probe(sun3_scsi_driver, sun3_scsi_probe);
1da177e4	589
0d31f875	590	MODULE_ALIAS("platform:" DRV_MODULE_NAME);
1da177e4	591	MODULE_LICENSE("GPL");