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atari_scsi: Adopt NCR5380.c core driver
[mirror_ubuntu-jammy-kernel.git] / drivers / scsi / sun3_scsi.c
CommitLineData
1da177e4
LT
1/*
2 * Sun3 SCSI stuff by Erik Verbruggen (erik@bigmama.xtdnet.nl)
3 *
4 * Sun3 DMA routines added by Sam Creasey (sammy@sammy.net)
5 *
757f5bad
FT
6 * VME support added by Sam Creasey
7 *
8 * TODO: modify this driver to support multiple Sun3 SCSI VME boards
9 *
1da177e4
LT
10 * Adapted from mac_scsinew.c:
11 */
12/*
13 * Generic Macintosh NCR5380 driver
14 *
15 * Copyright 1998, Michael Schmitz <mschmitz@lbl.gov>
16 *
17 * derived in part from:
18 */
19/*
20 * Generic Generic NCR5380 driver
21 *
22 * Copyright 1995, Russell King
1da177e4
LT
23 */
24
1da177e4 25#include <linux/types.h>
1da177e4 26#include <linux/delay.h>
1da177e4 27#include <linux/module.h>
1da177e4
LT
28#include <linux/ioport.h>
29#include <linux/init.h>
30#include <linux/blkdev.h>
0d31f875 31#include <linux/platform_device.h>
1da177e4
LT
32
33#include <asm/io.h>
1da177e4 34#include <asm/dvma.h>
1da177e4 35
1da177e4
LT
36#include <scsi/scsi_host.h>
37#include "sun3_scsi.h"
1da177e4 38
8dad0c51
FT
39/* minimum number of bytes to do dma on */
40#define DMA_MIN_SIZE 129
1da177e4 41
e63449c4
FT
42/* Definitions for the core NCR5380 driver. */
43
44/* #define SUPPORT_TAGS */
2231ef87
FT
45/* #define MAX_TAGS 32 */
46
47#define NCR5380_implementation_fields /* none */
48
49#define NCR5380_read(reg) sun3scsi_read(reg)
50#define NCR5380_write(reg, value) sun3scsi_write(reg, value)
51
52#define NCR5380_queue_command sun3scsi_queue_command
53#define NCR5380_bus_reset sun3scsi_bus_reset
54#define NCR5380_abort sun3scsi_abort
2231ef87
FT
55#define NCR5380_info sun3scsi_info
56
57#define NCR5380_dma_read_setup(instance, data, count) \
cd46140a 58 sun3scsi_dma_setup(instance, data, count, 0)
2231ef87 59#define NCR5380_dma_write_setup(instance, data, count) \
cd46140a 60 sun3scsi_dma_setup(instance, data, count, 1)
2231ef87
FT
61#define NCR5380_dma_residual(instance) \
62 sun3scsi_dma_residual(instance)
63#define NCR5380_dma_xfer_len(instance, cmd, phase) \
e63449c4 64 sun3scsi_dma_xfer_len(cmd->SCp.this_residual, cmd)
2231ef87 65
8dad0c51
FT
66#define NCR5380_acquire_dma_irq(instance) (1)
67#define NCR5380_release_dma_irq(instance)
68
2231ef87
FT
69#include "NCR5380.h"
70
71
72extern int sun3_map_test(unsigned long, char *);
73
1da177e4
LT
74static int setup_can_queue = -1;
75module_param(setup_can_queue, int, 0);
76static int setup_cmd_per_lun = -1;
77module_param(setup_cmd_per_lun, int, 0);
78static int setup_sg_tablesize = -1;
79module_param(setup_sg_tablesize, int, 0);
80#ifdef SUPPORT_TAGS
81static int setup_use_tagged_queuing = -1;
82module_param(setup_use_tagged_queuing, int, 0);
83#endif
84static int setup_hostid = -1;
85module_param(setup_hostid, int, 0);
86
1da177e4
LT
87/* ms to wait after hitting dma regs */
88#define SUN3_DMA_DELAY 10
89
90/* dvma buffer to allocate -- 32k should hopefully be more than sufficient */
91#define SUN3_DVMA_BUFSIZE 0xe000
92
2231ef87 93static struct scsi_cmnd *sun3_dma_setup_done;
0d31f875 94static unsigned char *sun3_scsi_regp;
1da177e4 95static volatile struct sun3_dma_regs *dregs;
0d31f875 96static struct sun3_udc_regs *udc_regs;
d5f7e65d
FT
97static unsigned char *sun3_dma_orig_addr;
98static unsigned long sun3_dma_orig_count;
99static int sun3_dma_active;
100static unsigned long last_residual;
1da177e4
LT
101
102/*
103 * NCR 5380 register access functions
104 */
105
106static inline unsigned char sun3scsi_read(int reg)
107{
0d31f875 108 return in_8(sun3_scsi_regp + reg);
1da177e4
LT
109}
110
111static inline void sun3scsi_write(int reg, int value)
112{
0d31f875 113 out_8(sun3_scsi_regp + reg, value);
1da177e4
LT
114}
115
757f5bad 116#ifndef SUN3_SCSI_VME
1da177e4
LT
117/* dma controller register access functions */
118
119static inline unsigned short sun3_udc_read(unsigned char reg)
120{
121 unsigned short ret;
122
123 dregs->udc_addr = UDC_CSR;
124 udelay(SUN3_DMA_DELAY);
125 ret = dregs->udc_data;
126 udelay(SUN3_DMA_DELAY);
127
128 return ret;
129}
130
131static inline void sun3_udc_write(unsigned short val, unsigned char reg)
132{
133 dregs->udc_addr = reg;
134 udelay(SUN3_DMA_DELAY);
135 dregs->udc_data = val;
136 udelay(SUN3_DMA_DELAY);
137}
757f5bad 138#endif
1da177e4 139
1da177e4
LT
140// safe bits for the CSR
141#define CSR_GOOD 0x060f
142
cd46140a 143static irqreturn_t scsi_sun3_intr(int irq, void *dev)
1da177e4 144{
cd46140a 145 struct Scsi_Host *instance = dev;
1da177e4
LT
146 unsigned short csr = dregs->csr;
147 int handled = 0;
148
757f5bad
FT
149#ifdef SUN3_SCSI_VME
150 dregs->csr &= ~CSR_DMA_ENABLE;
151#endif
152
1da177e4 153 if(csr & ~CSR_GOOD) {
cd46140a
FT
154 if (csr & CSR_DMA_BUSERR)
155 shost_printk(KERN_ERR, instance, "bus error in DMA\n");
156 if (csr & CSR_DMA_CONFLICT)
157 shost_printk(KERN_ERR, instance, "DMA conflict\n");
1da177e4
LT
158 handled = 1;
159 }
160
161 if(csr & (CSR_SDB_INT | CSR_DMA_INT)) {
cd46140a 162 NCR5380_intr(irq, dev);
1da177e4
LT
163 handled = 1;
164 }
165
166 return IRQ_RETVAL(handled);
167}
168
1da177e4 169/* sun3scsi_dma_setup() -- initialize the dma controller for a read/write */
cd46140a
FT
170static unsigned long sun3scsi_dma_setup(struct Scsi_Host *instance,
171 void *data, unsigned long count, int write_flag)
1da177e4 172{
1da177e4
LT
173 void *addr;
174
175 if(sun3_dma_orig_addr != NULL)
176 dvma_unmap(sun3_dma_orig_addr);
177
757f5bad
FT
178#ifdef SUN3_SCSI_VME
179 addr = (void *)dvma_map_vme((unsigned long) data, count);
180#else
1da177e4 181 addr = (void *)dvma_map((unsigned long) data, count);
757f5bad 182#endif
1da177e4
LT
183
184 sun3_dma_orig_addr = addr;
185 sun3_dma_orig_count = count;
757f5bad
FT
186
187#ifndef SUN3_SCSI_VME
1da177e4
LT
188 dregs->fifo_count = 0;
189 sun3_udc_write(UDC_RESET, UDC_CSR);
190
191 /* reset fifo */
192 dregs->csr &= ~CSR_FIFO;
193 dregs->csr |= CSR_FIFO;
757f5bad 194#endif
1da177e4
LT
195
196 /* set direction */
197 if(write_flag)
198 dregs->csr |= CSR_SEND;
199 else
200 dregs->csr &= ~CSR_SEND;
201
757f5bad
FT
202#ifdef SUN3_SCSI_VME
203 dregs->csr |= CSR_PACK_ENABLE;
204
205 dregs->dma_addr_hi = ((unsigned long)addr >> 16);
206 dregs->dma_addr_lo = ((unsigned long)addr & 0xffff);
207
208 dregs->dma_count_hi = 0;
209 dregs->dma_count_lo = 0;
210 dregs->fifo_count_hi = 0;
211 dregs->fifo_count = 0;
212#else
1da177e4
LT
213 /* byte count for fifo */
214 dregs->fifo_count = count;
215
216 sun3_udc_write(UDC_RESET, UDC_CSR);
217
218 /* reset fifo */
219 dregs->csr &= ~CSR_FIFO;
220 dregs->csr |= CSR_FIFO;
221
222 if(dregs->fifo_count != count) {
cd46140a
FT
223 shost_printk(KERN_ERR, instance, "FIFO mismatch %04x not %04x\n",
224 dregs->fifo_count, (unsigned int) count);
225 NCR5380_dprint(NDEBUG_DMA, instance);
1da177e4
LT
226 }
227
228 /* setup udc */
1da177e4
LT
229 udc_regs->addr_hi = (((unsigned long)(addr) & 0xff0000) >> 8);
230 udc_regs->addr_lo = ((unsigned long)(addr) & 0xffff);
1da177e4
LT
231 udc_regs->count = count/2; /* count in words */
232 udc_regs->mode_hi = UDC_MODE_HIWORD;
233 if(write_flag) {
234 if(count & 1)
235 udc_regs->count++;
236 udc_regs->mode_lo = UDC_MODE_LSEND;
237 udc_regs->rsel = UDC_RSEL_SEND;
238 } else {
239 udc_regs->mode_lo = UDC_MODE_LRECV;
240 udc_regs->rsel = UDC_RSEL_RECV;
241 }
242
243 /* announce location of regs block */
244 sun3_udc_write(((dvma_vtob(udc_regs) & 0xff0000) >> 8),
245 UDC_CHN_HI);
246
247 sun3_udc_write((dvma_vtob(udc_regs) & 0xffff), UDC_CHN_LO);
248
249 /* set dma master on */
250 sun3_udc_write(0xd, UDC_MODE);
251
252 /* interrupt enable */
253 sun3_udc_write(UDC_INT_ENABLE, UDC_CSR);
757f5bad 254#endif
1da177e4
LT
255
256 return count;
257
258}
259
1da177e4
LT
260static inline unsigned long sun3scsi_dma_residual(struct Scsi_Host *instance)
261{
262 return last_residual;
263}
264
e63449c4
FT
265static inline unsigned long sun3scsi_dma_xfer_len(unsigned long wanted_len,
266 struct scsi_cmnd *cmd)
1da177e4 267{
e63449c4 268 if (wanted_len < DMA_MIN_SIZE || cmd->request->cmd_type != REQ_TYPE_FS)
1da177e4 269 return 0;
e63449c4
FT
270
271 return wanted_len;
1da177e4
LT
272}
273
274static inline int sun3scsi_dma_start(unsigned long count, unsigned char *data)
275{
757f5bad
FT
276#ifdef SUN3_SCSI_VME
277 unsigned short csr;
278
279 csr = dregs->csr;
280
281 dregs->dma_count_hi = (sun3_dma_orig_count >> 16);
282 dregs->dma_count_lo = (sun3_dma_orig_count & 0xffff);
1da177e4 283
757f5bad
FT
284 dregs->fifo_count_hi = (sun3_dma_orig_count >> 16);
285 dregs->fifo_count = (sun3_dma_orig_count & 0xffff);
286
287/* if(!(csr & CSR_DMA_ENABLE))
288 * dregs->csr |= CSR_DMA_ENABLE;
289 */
290#else
1da177e4 291 sun3_udc_write(UDC_CHN_START, UDC_CSR);
757f5bad 292#endif
1da177e4
LT
293
294 return 0;
295}
296
297/* clean up after our dma is done */
298static int sun3scsi_dma_finish(int write_flag)
299{
757f5bad 300 unsigned short __maybe_unused count;
1da177e4
LT
301 unsigned short fifo;
302 int ret = 0;
303
304 sun3_dma_active = 0;
757f5bad
FT
305
306#ifdef SUN3_SCSI_VME
307 dregs->csr &= ~CSR_DMA_ENABLE;
308
309 fifo = dregs->fifo_count;
310 if (write_flag) {
311 if ((fifo > 0) && (fifo < sun3_dma_orig_count))
312 fifo++;
313 }
314
315 last_residual = fifo;
316 /* empty bytes from the fifo which didn't make it */
317 if ((!write_flag) && (dregs->csr & CSR_LEFT)) {
318 unsigned char *vaddr;
319
320 vaddr = (unsigned char *)dvma_vmetov(sun3_dma_orig_addr);
321
322 vaddr += (sun3_dma_orig_count - fifo);
323 vaddr--;
324
325 switch (dregs->csr & CSR_LEFT) {
326 case CSR_LEFT_3:
327 *vaddr = (dregs->bpack_lo & 0xff00) >> 8;
328 vaddr--;
329
330 case CSR_LEFT_2:
331 *vaddr = (dregs->bpack_hi & 0x00ff);
332 vaddr--;
333
334 case CSR_LEFT_1:
335 *vaddr = (dregs->bpack_hi & 0xff00) >> 8;
336 break;
337 }
338 }
339#else
1da177e4
LT
340 // check to empty the fifo on a read
341 if(!write_flag) {
342 int tmo = 20000; /* .2 sec */
343
344 while(1) {
345 if(dregs->csr & CSR_FIFO_EMPTY)
346 break;
347
348 if(--tmo <= 0) {
349 printk("sun3scsi: fifo failed to empty!\n");
350 return 1;
351 }
352 udelay(10);
353 }
354 }
1da177e4 355
cd46140a
FT
356 dregs->udc_addr = 0x32;
357 udelay(SUN3_DMA_DELAY);
358 count = 2 * dregs->udc_data;
359 udelay(SUN3_DMA_DELAY);
1da177e4
LT
360
361 fifo = dregs->fifo_count;
362 last_residual = fifo;
363
364 /* empty bytes from the fifo which didn't make it */
365 if((!write_flag) && (count - fifo) == 2) {
366 unsigned short data;
367 unsigned char *vaddr;
368
369 data = dregs->fifo_data;
370 vaddr = (unsigned char *)dvma_btov(sun3_dma_orig_addr);
371
372 vaddr += (sun3_dma_orig_count - fifo);
373
374 vaddr[-2] = (data & 0xff00) >> 8;
375 vaddr[-1] = (data & 0xff);
376 }
757f5bad 377#endif
1da177e4
LT
378
379 dvma_unmap(sun3_dma_orig_addr);
380 sun3_dma_orig_addr = NULL;
757f5bad
FT
381
382#ifdef SUN3_SCSI_VME
383 dregs->dma_addr_hi = 0;
384 dregs->dma_addr_lo = 0;
385 dregs->dma_count_hi = 0;
386 dregs->dma_count_lo = 0;
387
388 dregs->fifo_count = 0;
389 dregs->fifo_count_hi = 0;
390
391 dregs->csr &= ~CSR_SEND;
392/* dregs->csr |= CSR_DMA_ENABLE; */
393#else
1da177e4
LT
394 sun3_udc_write(UDC_RESET, UDC_CSR);
395 dregs->fifo_count = 0;
396 dregs->csr &= ~CSR_SEND;
397
398 /* reset fifo */
399 dregs->csr &= ~CSR_FIFO;
400 dregs->csr |= CSR_FIFO;
757f5bad 401#endif
1da177e4
LT
402
403 sun3_dma_setup_done = NULL;
404
405 return ret;
406
407}
408
8dad0c51 409#include "atari_NCR5380.c"
1da177e4 410
0d31f875
FT
411#ifdef SUN3_SCSI_VME
412#define SUN3_SCSI_NAME "Sun3 NCR5380 VME SCSI"
413#define DRV_MODULE_NAME "sun3_scsi_vme"
414#else
415#define SUN3_SCSI_NAME "Sun3 NCR5380 SCSI"
416#define DRV_MODULE_NAME "sun3_scsi"
417#endif
418
419#define PFX DRV_MODULE_NAME ": "
420
421static struct scsi_host_template sun3_scsi_template = {
422 .module = THIS_MODULE,
423 .proc_name = DRV_MODULE_NAME,
1da177e4 424 .name = SUN3_SCSI_NAME,
1da177e4
LT
425 .info = sun3scsi_info,
426 .queuecommand = sun3scsi_queue_command,
aa2e2cb1
FT
427 .eh_abort_handler = sun3scsi_abort,
428 .eh_bus_reset_handler = sun3scsi_bus_reset,
d572f65f 429 .can_queue = 16,
1da177e4 430 .this_id = 7,
d572f65f
FT
431 .sg_tablesize = SG_NONE,
432 .cmd_per_lun = 2,
aa2e2cb1 433 .use_clustering = DISABLE_CLUSTERING,
32b26a10 434 .cmd_size = NCR5380_CMD_SIZE,
1da177e4
LT
435};
436
0d31f875
FT
437static int __init sun3_scsi_probe(struct platform_device *pdev)
438{
439 struct Scsi_Host *instance;
440 int error;
441 struct resource *irq, *mem;
442 unsigned char *ioaddr;
ca513fc9 443 int host_flags = 0;
0d31f875
FT
444#ifdef SUN3_SCSI_VME
445 int i;
446#endif
447
448 if (setup_can_queue > 0)
449 sun3_scsi_template.can_queue = setup_can_queue;
450 if (setup_cmd_per_lun > 0)
451 sun3_scsi_template.cmd_per_lun = setup_cmd_per_lun;
452 if (setup_sg_tablesize >= 0)
453 sun3_scsi_template.sg_tablesize = setup_sg_tablesize;
454 if (setup_hostid >= 0)
455 sun3_scsi_template.this_id = setup_hostid & 7;
456
0d31f875
FT
457#ifdef SUN3_SCSI_VME
458 ioaddr = NULL;
459 for (i = 0; i < 2; i++) {
460 unsigned char x;
461
462 irq = platform_get_resource(pdev, IORESOURCE_IRQ, i);
463 mem = platform_get_resource(pdev, IORESOURCE_MEM, i);
464 if (!irq || !mem)
465 break;
466
467 ioaddr = sun3_ioremap(mem->start, resource_size(mem),
468 SUN3_PAGE_TYPE_VME16);
469 dregs = (struct sun3_dma_regs *)(ioaddr + 8);
470
471 if (sun3_map_test((unsigned long)dregs, &x)) {
472 unsigned short oldcsr;
473
474 oldcsr = dregs->csr;
475 dregs->csr = 0;
476 udelay(SUN3_DMA_DELAY);
477 if (dregs->csr == 0x1400)
478 break;
479
480 dregs->csr = oldcsr;
481 }
482
483 iounmap(ioaddr);
484 ioaddr = NULL;
485 }
486 if (!ioaddr)
487 return -ENODEV;
488#else
489 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
490 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
491 if (!irq || !mem)
492 return -ENODEV;
493
494 ioaddr = ioremap(mem->start, resource_size(mem));
495 dregs = (struct sun3_dma_regs *)(ioaddr + 8);
496
497 udc_regs = dvma_malloc(sizeof(struct sun3_udc_regs));
498 if (!udc_regs) {
499 pr_err(PFX "couldn't allocate DVMA memory!\n");
500 iounmap(ioaddr);
501 return -ENOMEM;
502 }
503#endif
504
505 sun3_scsi_regp = ioaddr;
506
507 instance = scsi_host_alloc(&sun3_scsi_template,
508 sizeof(struct NCR5380_hostdata));
509 if (!instance) {
510 error = -ENOMEM;
511 goto fail_alloc;
512 }
0d31f875
FT
513
514 instance->io_port = (unsigned long)ioaddr;
515 instance->irq = irq->start;
516
ca513fc9
FT
517#ifdef SUPPORT_TAGS
518 host_flags |= setup_use_tagged_queuing > 0 ? FLAG_TAGGED_QUEUING : 0;
519#endif
520
0ad0eff9
FT
521 error = NCR5380_init(instance, host_flags);
522 if (error)
523 goto fail_init;
0d31f875
FT
524
525 error = request_irq(instance->irq, scsi_sun3_intr, 0,
526 "NCR5380", instance);
527 if (error) {
0d31f875
FT
528 pr_err(PFX "scsi%d: IRQ %d not free, bailing out\n",
529 instance->host_no, instance->irq);
530 goto fail_irq;
0d31f875
FT
531 }
532
533 dregs->csr = 0;
534 udelay(SUN3_DMA_DELAY);
535 dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR;
536 udelay(SUN3_DMA_DELAY);
537 dregs->fifo_count = 0;
538#ifdef SUN3_SCSI_VME
539 dregs->fifo_count_hi = 0;
540 dregs->dma_addr_hi = 0;
541 dregs->dma_addr_lo = 0;
542 dregs->dma_count_hi = 0;
543 dregs->dma_count_lo = 0;
544
545 dregs->ivect = VME_DATA24 | (instance->irq & 0xff);
546#endif
547
9c3f0e2b 548 NCR5380_maybe_reset_bus(instance);
0d31f875
FT
549
550 error = scsi_add_host(instance, NULL);
551 if (error)
552 goto fail_host;
553
554 platform_set_drvdata(pdev, instance);
555
556 scsi_scan_host(instance);
557 return 0;
558
559fail_host:
e4dec680 560 free_irq(instance->irq, instance);
0d31f875
FT
561fail_irq:
562 NCR5380_exit(instance);
0ad0eff9 563fail_init:
0d31f875
FT
564 scsi_host_put(instance);
565fail_alloc:
566 if (udc_regs)
567 dvma_free(udc_regs);
568 iounmap(sun3_scsi_regp);
569 return error;
570}
571
572static int __exit sun3_scsi_remove(struct platform_device *pdev)
573{
574 struct Scsi_Host *instance = platform_get_drvdata(pdev);
575
576 scsi_remove_host(instance);
e4dec680 577 free_irq(instance->irq, instance);
0d31f875
FT
578 NCR5380_exit(instance);
579 scsi_host_put(instance);
580 if (udc_regs)
581 dvma_free(udc_regs);
582 iounmap(sun3_scsi_regp);
583 return 0;
584}
585
586static struct platform_driver sun3_scsi_driver = {
587 .remove = __exit_p(sun3_scsi_remove),
588 .driver = {
589 .name = DRV_MODULE_NAME,
0d31f875
FT
590 },
591};
1da177e4 592
0d31f875 593module_platform_driver_probe(sun3_scsi_driver, sun3_scsi_probe);
1da177e4 594
0d31f875 595MODULE_ALIAS("platform:" DRV_MODULE_NAME);
1da177e4 596MODULE_LICENSE("GPL");