[mirror_ubuntu-jammy-kernel.git] / drivers / scsi / sun3_scsi.c

/*
 * Sun3 SCSI stuff by Erik Verbruggen (erik@bigmama.xtdnet.nl)
 *
 * Sun3 DMA routines added by Sam Creasey (sammy@sammy.net)
 *
 * VME support added by Sam Creasey
 *
 * TODO: modify this driver to support multiple Sun3 SCSI VME boards
 *
 * Adapted from mac_scsinew.c:
 */
/*
 * Generic Macintosh NCR5380 driver
 *
 * Copyright 1998, Michael Schmitz <mschmitz@lbl.gov>
 *
 * derived in part from:
 */
/*
 * Generic Generic NCR5380 driver
 *
 * Copyright 1995, Russell King
 */

#include <linux/types.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/platform_device.h>

#include <asm/io.h>
#include <asm/dvma.h>

#include <scsi/scsi_host.h>
#include "sun3_scsi.h"

/* Definitions for the core NCR5380 driver. */

#define REAL_DMA
/* #define SUPPORT_TAGS */
/* minimum number of bytes to do dma on */
#define DMA_MIN_SIZE                    129

/* #define MAX_TAGS                     32 */

#define NCR5380_implementation_fields   /* none */

#define NCR5380_read(reg)               sun3scsi_read(reg)
#define NCR5380_write(reg, value)       sun3scsi_write(reg, value)

#define NCR5380_queue_command           sun3scsi_queue_command
#define NCR5380_bus_reset               sun3scsi_bus_reset
#define NCR5380_abort                   sun3scsi_abort
#define NCR5380_show_info               sun3scsi_show_info
#define NCR5380_info                    sun3scsi_info

#define NCR5380_dma_read_setup(instance, data, count) \
        sun3scsi_dma_setup(data, count, 0)
#define NCR5380_dma_write_setup(instance, data, count) \
        sun3scsi_dma_setup(data, count, 1)
#define NCR5380_dma_residual(instance) \
        sun3scsi_dma_residual(instance)
#define NCR5380_dma_xfer_len(instance, cmd, phase) \
        sun3scsi_dma_xfer_len(cmd->SCp.this_residual, cmd, !((phase) & SR_IO))

#define NCR5380_acquire_dma_irq(instance)    (1)
#define NCR5380_release_dma_irq(instance)

#include "NCR5380.h"


extern int sun3_map_test(unsigned long, char *);

static int setup_can_queue = -1;
module_param(setup_can_queue, int, 0);
static int setup_cmd_per_lun = -1;
module_param(setup_cmd_per_lun, int, 0);
static int setup_sg_tablesize = -1;
module_param(setup_sg_tablesize, int, 0);
#ifdef SUPPORT_TAGS
static int setup_use_tagged_queuing = -1;
module_param(setup_use_tagged_queuing, int, 0);
#endif
static int setup_hostid = -1;
module_param(setup_hostid, int, 0);

/* ms to wait after hitting dma regs */
#define SUN3_DMA_DELAY 10

/* dvma buffer to allocate -- 32k should hopefully be more than sufficient */
#define SUN3_DVMA_BUFSIZE 0xe000

static struct scsi_cmnd *sun3_dma_setup_done;
static unsigned char *sun3_scsi_regp;
static volatile struct sun3_dma_regs *dregs;
static struct sun3_udc_regs *udc_regs;
static unsigned char *sun3_dma_orig_addr;
static unsigned long sun3_dma_orig_count;
static int sun3_dma_active;
static unsigned long last_residual;
static struct Scsi_Host *default_instance;

/*
 * NCR 5380 register access functions
 */

static inline unsigned char sun3scsi_read(int reg)
{
	return in_8(sun3_scsi_regp + reg);
}

static inline void sun3scsi_write(int reg, int value)
{
	out_8(sun3_scsi_regp + reg, value);
}

#ifndef SUN3_SCSI_VME
/* dma controller register access functions */

static inline unsigned short sun3_udc_read(unsigned char reg)
{
	unsigned short ret;

	dregs->udc_addr = UDC_CSR;
	udelay(SUN3_DMA_DELAY);
	ret = dregs->udc_data;
	udelay(SUN3_DMA_DELAY);
	
	return ret;
}

static inline void sun3_udc_write(unsigned short val, unsigned char reg)
{
	dregs->udc_addr = reg;
	udelay(SUN3_DMA_DELAY);
	dregs->udc_data = val;
	udelay(SUN3_DMA_DELAY);
}
#endif

// safe bits for the CSR
#define CSR_GOOD 0x060f

static irqreturn_t scsi_sun3_intr(int irq, void *dummy)
{
	unsigned short csr = dregs->csr;
	int handled = 0;

#ifdef SUN3_SCSI_VME
	dregs->csr &= ~CSR_DMA_ENABLE;
#endif

	if(csr & ~CSR_GOOD) {
		if(csr & CSR_DMA_BUSERR) {
			printk("scsi%d: bus error in dma\n", default_instance->host_no);
		}

		if(csr & CSR_DMA_CONFLICT) {
			printk("scsi%d: dma conflict\n", default_instance->host_no);
		}
		handled = 1;
	}

	if(csr & (CSR_SDB_INT | CSR_DMA_INT)) {
		NCR5380_intr(irq, dummy);
		handled = 1;
	}

	return IRQ_RETVAL(handled);
}

/*
 * Debug stuff - to be called on NMI, or sysrq key. Use at your own risk; 
 * reentering NCR5380_print_status seems to have ugly side effects
 */

/* this doesn't seem to get used at all -- sam */
#if 0
void sun3_sun3_debug (void)
{
	unsigned long flags;

	if (default_instance) {
			local_irq_save(flags);
			NCR5380_print_status(default_instance);
			local_irq_restore(flags);
	}
}
#endif


/* sun3scsi_dma_setup() -- initialize the dma controller for a read/write */
static unsigned long sun3scsi_dma_setup(void *data, unsigned long count, int write_flag)
{
	void *addr;

	if(sun3_dma_orig_addr != NULL)
		dvma_unmap(sun3_dma_orig_addr);

#ifdef SUN3_SCSI_VME
	addr = (void *)dvma_map_vme((unsigned long) data, count);
#else
	addr = (void *)dvma_map((unsigned long) data, count);
#endif
		
	sun3_dma_orig_addr = addr;
	sun3_dma_orig_count = count;

#ifndef SUN3_SCSI_VME
	dregs->fifo_count = 0;
	sun3_udc_write(UDC_RESET, UDC_CSR);
	
	/* reset fifo */
	dregs->csr &= ~CSR_FIFO;
	dregs->csr |= CSR_FIFO;
#endif
	
	/* set direction */
	if(write_flag)
		dregs->csr |= CSR_SEND;
	else
		dregs->csr &= ~CSR_SEND;
	
#ifdef SUN3_SCSI_VME
	dregs->csr |= CSR_PACK_ENABLE;

	dregs->dma_addr_hi = ((unsigned long)addr >> 16);
	dregs->dma_addr_lo = ((unsigned long)addr & 0xffff);

	dregs->dma_count_hi = 0;
	dregs->dma_count_lo = 0;
	dregs->fifo_count_hi = 0;
	dregs->fifo_count = 0;
#else
	/* byte count for fifo */
	dregs->fifo_count = count;

	sun3_udc_write(UDC_RESET, UDC_CSR);
	
	/* reset fifo */
	dregs->csr &= ~CSR_FIFO;
	dregs->csr |= CSR_FIFO;
	
	if(dregs->fifo_count != count) { 
		printk("scsi%d: fifo_mismatch %04x not %04x\n",
		       default_instance->host_no, dregs->fifo_count,
		       (unsigned int) count);
		NCR5380_dprint(NDEBUG_DMA, default_instance);
	}

	/* setup udc */
	udc_regs->addr_hi = (((unsigned long)(addr) & 0xff0000) >> 8);
	udc_regs->addr_lo = ((unsigned long)(addr) & 0xffff);
	udc_regs->count = count/2; /* count in words */
	udc_regs->mode_hi = UDC_MODE_HIWORD;
	if(write_flag) {
		if(count & 1)
			udc_regs->count++;
		udc_regs->mode_lo = UDC_MODE_LSEND;
		udc_regs->rsel = UDC_RSEL_SEND;
	} else {
		udc_regs->mode_lo = UDC_MODE_LRECV;
		udc_regs->rsel = UDC_RSEL_RECV;
	}
	
	/* announce location of regs block */
	sun3_udc_write(((dvma_vtob(udc_regs) & 0xff0000) >> 8),
		       UDC_CHN_HI); 

	sun3_udc_write((dvma_vtob(udc_regs) & 0xffff), UDC_CHN_LO);

	/* set dma master on */
	sun3_udc_write(0xd, UDC_MODE);

	/* interrupt enable */
	sun3_udc_write(UDC_INT_ENABLE, UDC_CSR);
#endif
	
       	return count;

}

#ifndef SUN3_SCSI_VME
static inline unsigned long sun3scsi_dma_count(struct Scsi_Host *instance)
{
	unsigned short resid;

	dregs->udc_addr = 0x32; 
	udelay(SUN3_DMA_DELAY);
	resid = dregs->udc_data;
	udelay(SUN3_DMA_DELAY);
	resid *= 2;

	return (unsigned long) resid;
}
#endif

static inline unsigned long sun3scsi_dma_residual(struct Scsi_Host *instance)
{
	return last_residual;
}

static inline unsigned long sun3scsi_dma_xfer_len(unsigned long wanted,
						  struct scsi_cmnd *cmd,
						  int write_flag)
{
	if (cmd->request->cmd_type == REQ_TYPE_FS)
 		return wanted;
	else
		return 0;
}

static inline int sun3scsi_dma_start(unsigned long count, unsigned char *data)
{
#ifdef SUN3_SCSI_VME
	unsigned short csr;

	csr = dregs->csr;

	dregs->dma_count_hi = (sun3_dma_orig_count >> 16);
	dregs->dma_count_lo = (sun3_dma_orig_count & 0xffff);

	dregs->fifo_count_hi = (sun3_dma_orig_count >> 16);
	dregs->fifo_count = (sun3_dma_orig_count & 0xffff);

/*	if(!(csr & CSR_DMA_ENABLE))
 *		dregs->csr |= CSR_DMA_ENABLE;
 */
#else
    sun3_udc_write(UDC_CHN_START, UDC_CSR);
#endif
    
    return 0;
}

/* clean up after our dma is done */
static int sun3scsi_dma_finish(int write_flag)
{
	unsigned short __maybe_unused count;
	unsigned short fifo;
	int ret = 0;
	
	sun3_dma_active = 0;

#ifdef SUN3_SCSI_VME
	dregs->csr &= ~CSR_DMA_ENABLE;

	fifo = dregs->fifo_count;
	if (write_flag) {
		if ((fifo > 0) && (fifo < sun3_dma_orig_count))
			fifo++;
	}

	last_residual = fifo;
	/* empty bytes from the fifo which didn't make it */
	if ((!write_flag) && (dregs->csr & CSR_LEFT)) {
		unsigned char *vaddr;

		vaddr = (unsigned char *)dvma_vmetov(sun3_dma_orig_addr);

		vaddr += (sun3_dma_orig_count - fifo);
		vaddr--;

		switch (dregs->csr & CSR_LEFT) {
		case CSR_LEFT_3:
			*vaddr = (dregs->bpack_lo & 0xff00) >> 8;
			vaddr--;

		case CSR_LEFT_2:
			*vaddr = (dregs->bpack_hi & 0x00ff);
			vaddr--;

		case CSR_LEFT_1:
			*vaddr = (dregs->bpack_hi & 0xff00) >> 8;
			break;
		}
	}
#else
	// check to empty the fifo on a read
	if(!write_flag) {
		int tmo = 20000; /* .2 sec */
		
		while(1) {
			if(dregs->csr & CSR_FIFO_EMPTY)
				break;

			if(--tmo <= 0) {
				printk("sun3scsi: fifo failed to empty!\n");
				return 1;
			}
			udelay(10);
		}
	}

	count = sun3scsi_dma_count(default_instance);

	fifo = dregs->fifo_count;
	last_residual = fifo;

	/* empty bytes from the fifo which didn't make it */
	if((!write_flag) && (count - fifo) == 2) {
		unsigned short data;
		unsigned char *vaddr;

		data = dregs->fifo_data;
		vaddr = (unsigned char *)dvma_btov(sun3_dma_orig_addr);
		
		vaddr += (sun3_dma_orig_count - fifo);

		vaddr[-2] = (data & 0xff00) >> 8;
		vaddr[-1] = (data & 0xff);
	}
#endif

	dvma_unmap(sun3_dma_orig_addr);
	sun3_dma_orig_addr = NULL;

#ifdef SUN3_SCSI_VME
	dregs->dma_addr_hi = 0;
	dregs->dma_addr_lo = 0;
	dregs->dma_count_hi = 0;
	dregs->dma_count_lo = 0;

	dregs->fifo_count = 0;
	dregs->fifo_count_hi = 0;

	dregs->csr &= ~CSR_SEND;
/*	dregs->csr |= CSR_DMA_ENABLE; */
#else
	sun3_udc_write(UDC_RESET, UDC_CSR);
	dregs->fifo_count = 0;
	dregs->csr &= ~CSR_SEND;

	/* reset fifo */
	dregs->csr &= ~CSR_FIFO;
	dregs->csr |= CSR_FIFO;
#endif
	
	sun3_dma_setup_done = NULL;

	return ret;

}
	
#include "atari_NCR5380.c"

#ifdef SUN3_SCSI_VME
#define SUN3_SCSI_NAME          "Sun3 NCR5380 VME SCSI"
#define DRV_MODULE_NAME         "sun3_scsi_vme"
#else
#define SUN3_SCSI_NAME          "Sun3 NCR5380 SCSI"
#define DRV_MODULE_NAME         "sun3_scsi"
#endif

#define PFX                     DRV_MODULE_NAME ": "

static struct scsi_host_template sun3_scsi_template = {
	.module			= THIS_MODULE,
	.proc_name		= DRV_MODULE_NAME,
	.show_info		= sun3scsi_show_info,
	.name			= SUN3_SCSI_NAME,
	.info			= sun3scsi_info,
	.queuecommand		= sun3scsi_queue_command,
	.eh_abort_handler      	= sun3scsi_abort,
	.eh_bus_reset_handler  	= sun3scsi_bus_reset,
	.can_queue		= 16,
	.this_id		= 7,
	.sg_tablesize		= SG_NONE,
	.cmd_per_lun		= 2,
	.use_clustering		= DISABLE_CLUSTERING
};

static int __init sun3_scsi_probe(struct platform_device *pdev)
{
	struct Scsi_Host *instance;
	int error;
	struct resource *irq, *mem;
	unsigned char *ioaddr;
	int host_flags = 0;
#ifdef SUN3_SCSI_VME
	int i;
#endif

	if (setup_can_queue > 0)
		sun3_scsi_template.can_queue = setup_can_queue;
	if (setup_cmd_per_lun > 0)
		sun3_scsi_template.cmd_per_lun = setup_cmd_per_lun;
	if (setup_sg_tablesize >= 0)
		sun3_scsi_template.sg_tablesize = setup_sg_tablesize;
	if (setup_hostid >= 0)
		sun3_scsi_template.this_id = setup_hostid & 7;

#ifdef SUN3_SCSI_VME
	ioaddr = NULL;
	for (i = 0; i < 2; i++) {
		unsigned char x;

		irq = platform_get_resource(pdev, IORESOURCE_IRQ, i);
		mem = platform_get_resource(pdev, IORESOURCE_MEM, i);
		if (!irq || !mem)
			break;

		ioaddr = sun3_ioremap(mem->start, resource_size(mem),
		                      SUN3_PAGE_TYPE_VME16);
		dregs = (struct sun3_dma_regs *)(ioaddr + 8);

		if (sun3_map_test((unsigned long)dregs, &x)) {
			unsigned short oldcsr;

			oldcsr = dregs->csr;
			dregs->csr = 0;
			udelay(SUN3_DMA_DELAY);
			if (dregs->csr == 0x1400)
				break;

			dregs->csr = oldcsr;
		}

		iounmap(ioaddr);
		ioaddr = NULL;
	}
	if (!ioaddr)
		return -ENODEV;
#else
	irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!irq || !mem)
		return -ENODEV;

	ioaddr = ioremap(mem->start, resource_size(mem));
	dregs = (struct sun3_dma_regs *)(ioaddr + 8);

	udc_regs = dvma_malloc(sizeof(struct sun3_udc_regs));
	if (!udc_regs) {
		pr_err(PFX "couldn't allocate DVMA memory!\n");
		iounmap(ioaddr);
		return -ENOMEM;
	}
#endif

	sun3_scsi_regp = ioaddr;

	instance = scsi_host_alloc(&sun3_scsi_template,
	                           sizeof(struct NCR5380_hostdata));
	if (!instance) {
		error = -ENOMEM;
		goto fail_alloc;
	}
	default_instance = instance;

	instance->io_port = (unsigned long)ioaddr;
	instance->irq = irq->start;

#ifdef SUPPORT_TAGS
	host_flags |= setup_use_tagged_queuing > 0 ? FLAG_TAGGED_QUEUING : 0;
#endif

	error = NCR5380_init(instance, host_flags);
	if (error)
		goto fail_init;

	error = request_irq(instance->irq, scsi_sun3_intr, 0,
	                    "NCR5380", instance);
	if (error) {
#ifdef REAL_DMA
		pr_err(PFX "scsi%d: IRQ %d not free, bailing out\n",
		       instance->host_no, instance->irq);
		goto fail_irq;
#else
		pr_warn(PFX "scsi%d: IRQ %d not free, interrupts disabled\n",
		        instance->host_no, instance->irq);
		instance->irq = NO_IRQ;
#endif
	}

	dregs->csr = 0;
	udelay(SUN3_DMA_DELAY);
	dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR;
	udelay(SUN3_DMA_DELAY);
	dregs->fifo_count = 0;
#ifdef SUN3_SCSI_VME
	dregs->fifo_count_hi = 0;
	dregs->dma_addr_hi = 0;
	dregs->dma_addr_lo = 0;
	dregs->dma_count_hi = 0;
	dregs->dma_count_lo = 0;

	dregs->ivect = VME_DATA24 | (instance->irq & 0xff);
#endif

	NCR5380_maybe_reset_bus(instance);

	error = scsi_add_host(instance, NULL);
	if (error)
		goto fail_host;

	platform_set_drvdata(pdev, instance);

	scsi_scan_host(instance);
	return 0;

fail_host:
	if (instance->irq != NO_IRQ)
		free_irq(instance->irq, instance);
fail_irq:
	NCR5380_exit(instance);
fail_init:
	scsi_host_put(instance);
fail_alloc:
	if (udc_regs)
		dvma_free(udc_regs);
	iounmap(sun3_scsi_regp);
	return error;
}

static int __exit sun3_scsi_remove(struct platform_device *pdev)
{
	struct Scsi_Host *instance = platform_get_drvdata(pdev);

	scsi_remove_host(instance);
	if (instance->irq != NO_IRQ)
		free_irq(instance->irq, instance);
	NCR5380_exit(instance);
	scsi_host_put(instance);
	if (udc_regs)
		dvma_free(udc_regs);
	iounmap(sun3_scsi_regp);
	return 0;
}

static struct platform_driver sun3_scsi_driver = {
	.remove = __exit_p(sun3_scsi_remove),
	.driver = {
		.name	= DRV_MODULE_NAME,
	},
};

module_platform_driver_probe(sun3_scsi_driver, sun3_scsi_probe);

MODULE_ALIAS("platform:" DRV_MODULE_NAME);
MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Sun3 SCSI stuff by Erik Verbruggen (erik@bigmama.xtdnet.nl)
	3	*
	4	* Sun3 DMA routines added by Sam Creasey (sammy@sammy.net)
	5	*
757f5bad FT	6	* VME support added by Sam Creasey
	7	*
	8	* TODO: modify this driver to support multiple Sun3 SCSI VME boards
	9	*
1da177e4 LT	10	* Adapted from mac_scsinew.c:
	11	*/
	12	/*
	13	* Generic Macintosh NCR5380 driver
	14	*
	15	* Copyright 1998, Michael Schmitz <mschmitz@lbl.gov>
	16	*
	17	* derived in part from:
	18	*/
	19	/*
	20	* Generic Generic NCR5380 driver
	21	*
	22	* Copyright 1995, Russell King
1da177e4 LT	23	*/
1da177e4 LT	24
1da177e4	25	#include <linux/types.h>
1da177e4	26	#include <linux/delay.h>
1da177e4	27	#include <linux/module.h>
1da177e4 LT	28	#include <linux/ioport.h>
	29	#include <linux/init.h>
	30	#include <linux/blkdev.h>
0d31f875	31	#include <linux/platform_device.h>
1da177e4 LT	32
1da177e4 LT	33	#include <asm/io.h>
1da177e4	34	#include <asm/dvma.h>
1da177e4	35
1da177e4 LT	36	#include <scsi/scsi_host.h>
1da177e4 LT	37	#include "sun3_scsi.h"
1da177e4	38
2231ef87	39	/* Definitions for the core NCR5380 driver. */
1da177e4	40
2231ef87	41	#define REAL_DMA
1da177e4	42	/* #define SUPPORT_TAGS */
8dad0c51 FT	43	/* minimum number of bytes to do dma on */
8dad0c51 FT	44	#define DMA_MIN_SIZE 129
1da177e4	45
2231ef87 FT	46	/* #define MAX_TAGS 32 */
	47
	48	#define NCR5380_implementation_fields /* none */
	49
	50	#define NCR5380_read(reg) sun3scsi_read(reg)
	51	#define NCR5380_write(reg, value) sun3scsi_write(reg, value)
	52
	53	#define NCR5380_queue_command sun3scsi_queue_command
	54	#define NCR5380_bus_reset sun3scsi_bus_reset
	55	#define NCR5380_abort sun3scsi_abort
	56	#define NCR5380_show_info sun3scsi_show_info
	57	#define NCR5380_info sun3scsi_info
	58
	59	#define NCR5380_dma_read_setup(instance, data, count) \
	60	sun3scsi_dma_setup(data, count, 0)
	61	#define NCR5380_dma_write_setup(instance, data, count) \
	62	sun3scsi_dma_setup(data, count, 1)
	63	#define NCR5380_dma_residual(instance) \
	64	sun3scsi_dma_residual(instance)
	65	#define NCR5380_dma_xfer_len(instance, cmd, phase) \
	66	sun3scsi_dma_xfer_len(cmd->SCp.this_residual, cmd, !((phase) & SR_IO))
	67
8dad0c51 FT	68	#define NCR5380_acquire_dma_irq(instance) (1)
	69	#define NCR5380_release_dma_irq(instance)
	70
2231ef87 FT	71	#include "NCR5380.h"
	72
	73
	74	extern int sun3_map_test(unsigned long, char *);
	75
1da177e4 LT	76	static int setup_can_queue = -1;
	77	module_param(setup_can_queue, int, 0);
	78	static int setup_cmd_per_lun = -1;
	79	module_param(setup_cmd_per_lun, int, 0);
	80	static int setup_sg_tablesize = -1;
	81	module_param(setup_sg_tablesize, int, 0);
	82	#ifdef SUPPORT_TAGS
	83	static int setup_use_tagged_queuing = -1;
	84	module_param(setup_use_tagged_queuing, int, 0);
	85	#endif
	86	static int setup_hostid = -1;
	87	module_param(setup_hostid, int, 0);
	88
1da177e4 LT	89	/* ms to wait after hitting dma regs */
	90	#define SUN3_DMA_DELAY 10
	91
	92	/* dvma buffer to allocate -- 32k should hopefully be more than sufficient */
	93	#define SUN3_DVMA_BUFSIZE 0xe000
	94
2231ef87	95	static struct scsi_cmnd *sun3_dma_setup_done;
0d31f875	96	static unsigned char *sun3_scsi_regp;
1da177e4	97	static volatile struct sun3_dma_regs *dregs;
0d31f875	98	static struct sun3_udc_regs *udc_regs;
d5f7e65d FT	99	static unsigned char *sun3_dma_orig_addr;
	100	static unsigned long sun3_dma_orig_count;
	101	static int sun3_dma_active;
	102	static unsigned long last_residual;
0d31f875	103	static struct Scsi_Host *default_instance;
1da177e4 LT	104
	105	/*
	106	* NCR 5380 register access functions
	107	*/
	108
	109	static inline unsigned char sun3scsi_read(int reg)
	110	{
0d31f875	111	return in_8(sun3_scsi_regp + reg);
1da177e4 LT	112	}
	113
	114	static inline void sun3scsi_write(int reg, int value)
	115	{
0d31f875	116	out_8(sun3_scsi_regp + reg, value);
1da177e4 LT	117	}
1da177e4 LT	118
757f5bad	119	#ifndef SUN3_SCSI_VME
1da177e4 LT	120	/* dma controller register access functions */
	121
	122	static inline unsigned short sun3_udc_read(unsigned char reg)
	123	{
	124	unsigned short ret;
	125
	126	dregs->udc_addr = UDC_CSR;
	127	udelay(SUN3_DMA_DELAY);
	128	ret = dregs->udc_data;
	129	udelay(SUN3_DMA_DELAY);
	130
	131	return ret;
	132	}
	133
	134	static inline void sun3_udc_write(unsigned short val, unsigned char reg)
	135	{
	136	dregs->udc_addr = reg;
	137	udelay(SUN3_DMA_DELAY);
	138	dregs->udc_data = val;
	139	udelay(SUN3_DMA_DELAY);
	140	}
757f5bad	141	#endif
1da177e4	142
1da177e4 LT	143	// safe bits for the CSR
	144	#define CSR_GOOD 0x060f
	145
7d12e780	146	static irqreturn_t scsi_sun3_intr(int irq, void *dummy)
1da177e4 LT	147	{
	148	unsigned short csr = dregs->csr;
	149	int handled = 0;
	150
757f5bad FT	151	#ifdef SUN3_SCSI_VME
	152	dregs->csr &= ~CSR_DMA_ENABLE;
	153	#endif
	154
1da177e4 LT	155	if(csr & ~CSR_GOOD) {
	156	if(csr & CSR_DMA_BUSERR) {
	157	printk("scsi%d: bus error in dma\n", default_instance->host_no);
	158	}
	159
	160	if(csr & CSR_DMA_CONFLICT) {
	161	printk("scsi%d: dma conflict\n", default_instance->host_no);
	162	}
	163	handled = 1;
	164	}
	165
	166	if(csr & (CSR_SDB_INT \| CSR_DMA_INT)) {
7d12e780	167	NCR5380_intr(irq, dummy);
1da177e4 LT	168	handled = 1;
	169	}
	170
	171	return IRQ_RETVAL(handled);
	172	}
	173
	174	/*
	175	* Debug stuff - to be called on NMI, or sysrq key. Use at your own risk;
	176	* reentering NCR5380_print_status seems to have ugly side effects
	177	*/
	178
	179	/* this doesn't seem to get used at all -- sam */
	180	#if 0
	181	void sun3_sun3_debug (void)
	182	{
	183	unsigned long flags;
1da177e4 LT	184
	185	if (default_instance) {
	186	local_irq_save(flags);
	187	NCR5380_print_status(default_instance);
	188	local_irq_restore(flags);
	189	}
	190	}
	191	#endif
	192
	193
	194	/* sun3scsi_dma_setup() -- initialize the dma controller for a read/write */
	195	static unsigned long sun3scsi_dma_setup(void *data, unsigned long count, int write_flag)
	196	{
1da177e4 LT	197	void *addr;
	198
	199	if(sun3_dma_orig_addr != NULL)
	200	dvma_unmap(sun3_dma_orig_addr);
	201
757f5bad FT	202	#ifdef SUN3_SCSI_VME
	203	addr = (void *)dvma_map_vme((unsigned long) data, count);
	204	#else
1da177e4	205	addr = (void *)dvma_map((unsigned long) data, count);
757f5bad	206	#endif
1da177e4 LT	207
	208	sun3_dma_orig_addr = addr;
	209	sun3_dma_orig_count = count;
757f5bad FT	210
757f5bad FT	211	#ifndef SUN3_SCSI_VME
1da177e4 LT	212	dregs->fifo_count = 0;
	213	sun3_udc_write(UDC_RESET, UDC_CSR);
	214
	215	/* reset fifo */
	216	dregs->csr &= ~CSR_FIFO;
	217	dregs->csr \|= CSR_FIFO;
757f5bad	218	#endif
1da177e4 LT	219
	220	/* set direction */
	221	if(write_flag)
	222	dregs->csr \|= CSR_SEND;
	223	else
	224	dregs->csr &= ~CSR_SEND;
	225
757f5bad FT	226	#ifdef SUN3_SCSI_VME
	227	dregs->csr \|= CSR_PACK_ENABLE;
	228
	229	dregs->dma_addr_hi = ((unsigned long)addr >> 16);
	230	dregs->dma_addr_lo = ((unsigned long)addr & 0xffff);
	231
	232	dregs->dma_count_hi = 0;
	233	dregs->dma_count_lo = 0;
	234	dregs->fifo_count_hi = 0;
	235	dregs->fifo_count = 0;
	236	#else
1da177e4 LT	237	/* byte count for fifo */
	238	dregs->fifo_count = count;
	239
	240	sun3_udc_write(UDC_RESET, UDC_CSR);
	241
	242	/* reset fifo */
	243	dregs->csr &= ~CSR_FIFO;
	244	dregs->csr \|= CSR_FIFO;
	245
	246	if(dregs->fifo_count != count) {
	247	printk("scsi%d: fifo_mismatch %04x not %04x\n",
	248	default_instance->host_no, dregs->fifo_count,
	249	(unsigned int) count);
d614f068	250	NCR5380_dprint(NDEBUG_DMA, default_instance);
1da177e4 LT	251	}
	252
	253	/* setup udc */
1da177e4 LT	254	udc_regs->addr_hi = (((unsigned long)(addr) & 0xff0000) >> 8);
1da177e4 LT	255	udc_regs->addr_lo = ((unsigned long)(addr) & 0xffff);
1da177e4 LT	256	udc_regs->count = count/2; /* count in words */
	257	udc_regs->mode_hi = UDC_MODE_HIWORD;
	258	if(write_flag) {
	259	if(count & 1)
	260	udc_regs->count++;
	261	udc_regs->mode_lo = UDC_MODE_LSEND;
	262	udc_regs->rsel = UDC_RSEL_SEND;
	263	} else {
	264	udc_regs->mode_lo = UDC_MODE_LRECV;
	265	udc_regs->rsel = UDC_RSEL_RECV;
	266	}
	267
	268	/* announce location of regs block */
	269	sun3_udc_write(((dvma_vtob(udc_regs) & 0xff0000) >> 8),
	270	UDC_CHN_HI);
	271
	272	sun3_udc_write((dvma_vtob(udc_regs) & 0xffff), UDC_CHN_LO);
	273
	274	/* set dma master on */
	275	sun3_udc_write(0xd, UDC_MODE);
	276
	277	/* interrupt enable */
	278	sun3_udc_write(UDC_INT_ENABLE, UDC_CSR);
757f5bad	279	#endif
1da177e4 LT	280
	281	return count;
	282
	283	}
	284
757f5bad	285	#ifndef SUN3_SCSI_VME
1da177e4 LT	286	static inline unsigned long sun3scsi_dma_count(struct Scsi_Host *instance)
	287	{
	288	unsigned short resid;
	289
	290	dregs->udc_addr = 0x32;
	291	udelay(SUN3_DMA_DELAY);
	292	resid = dregs->udc_data;
	293	udelay(SUN3_DMA_DELAY);
	294	resid *= 2;
	295
	296	return (unsigned long) resid;
	297	}
757f5bad	298	#endif
1da177e4 LT	299
	300	static inline unsigned long sun3scsi_dma_residual(struct Scsi_Host *instance)
	301	{
	302	return last_residual;
	303	}
	304
811c9366 HK	305	static inline unsigned long sun3scsi_dma_xfer_len(unsigned long wanted,
	306	struct scsi_cmnd *cmd,
	307	int write_flag)
1da177e4	308	{
33659ebb	309	if (cmd->request->cmd_type == REQ_TYPE_FS)
1da177e4 LT	310	return wanted;
	311	else
	312	return 0;
	313	}
	314
	315	static inline int sun3scsi_dma_start(unsigned long count, unsigned char *data)
	316	{
757f5bad FT	317	#ifdef SUN3_SCSI_VME
	318	unsigned short csr;
	319
	320	csr = dregs->csr;
	321
	322	dregs->dma_count_hi = (sun3_dma_orig_count >> 16);
	323	dregs->dma_count_lo = (sun3_dma_orig_count & 0xffff);
1da177e4	324
757f5bad FT	325	dregs->fifo_count_hi = (sun3_dma_orig_count >> 16);
	326	dregs->fifo_count = (sun3_dma_orig_count & 0xffff);
	327
	328	/* if(!(csr & CSR_DMA_ENABLE))
	329	* dregs->csr \|= CSR_DMA_ENABLE;
	330	*/
	331	#else
1da177e4	332	sun3_udc_write(UDC_CHN_START, UDC_CSR);
757f5bad	333	#endif
1da177e4 LT	334
	335	return 0;
	336	}
	337
	338	/* clean up after our dma is done */
	339	static int sun3scsi_dma_finish(int write_flag)
	340	{
757f5bad	341	unsigned short __maybe_unused count;
1da177e4 LT	342	unsigned short fifo;
	343	int ret = 0;
	344
	345	sun3_dma_active = 0;
757f5bad FT	346
	347	#ifdef SUN3_SCSI_VME
	348	dregs->csr &= ~CSR_DMA_ENABLE;
	349
	350	fifo = dregs->fifo_count;
	351	if (write_flag) {
	352	if ((fifo > 0) && (fifo < sun3_dma_orig_count))
	353	fifo++;
	354	}
	355
	356	last_residual = fifo;
	357	/* empty bytes from the fifo which didn't make it */
	358	if ((!write_flag) && (dregs->csr & CSR_LEFT)) {
	359	unsigned char *vaddr;
	360
	361	vaddr = (unsigned char *)dvma_vmetov(sun3_dma_orig_addr);
	362
	363	vaddr += (sun3_dma_orig_count - fifo);
	364	vaddr--;
	365
	366	switch (dregs->csr & CSR_LEFT) {
	367	case CSR_LEFT_3:
	368	*vaddr = (dregs->bpack_lo & 0xff00) >> 8;
	369	vaddr--;
	370
	371	case CSR_LEFT_2:
	372	*vaddr = (dregs->bpack_hi & 0x00ff);
	373	vaddr--;
	374
	375	case CSR_LEFT_1:
	376	*vaddr = (dregs->bpack_hi & 0xff00) >> 8;
	377	break;
	378	}
	379	}
	380	#else
1da177e4 LT	381	// check to empty the fifo on a read
	382	if(!write_flag) {
	383	int tmo = 20000; /* .2 sec */
	384
	385	while(1) {
	386	if(dregs->csr & CSR_FIFO_EMPTY)
	387	break;
	388
	389	if(--tmo <= 0) {
	390	printk("sun3scsi: fifo failed to empty!\n");
	391	return 1;
	392	}
	393	udelay(10);
	394	}
	395	}
1da177e4 LT	396
1da177e4 LT	397	count = sun3scsi_dma_count(default_instance);
1da177e4 LT	398
	399	fifo = dregs->fifo_count;
	400	last_residual = fifo;
	401
	402	/* empty bytes from the fifo which didn't make it */
	403	if((!write_flag) && (count - fifo) == 2) {
	404	unsigned short data;
	405	unsigned char *vaddr;
	406
	407	data = dregs->fifo_data;
	408	vaddr = (unsigned char *)dvma_btov(sun3_dma_orig_addr);
	409
	410	vaddr += (sun3_dma_orig_count - fifo);
	411
	412	vaddr[-2] = (data & 0xff00) >> 8;
	413	vaddr[-1] = (data & 0xff);
	414	}
757f5bad	415	#endif
1da177e4 LT	416
	417	dvma_unmap(sun3_dma_orig_addr);
	418	sun3_dma_orig_addr = NULL;
757f5bad FT	419
	420	#ifdef SUN3_SCSI_VME
	421	dregs->dma_addr_hi = 0;
	422	dregs->dma_addr_lo = 0;
	423	dregs->dma_count_hi = 0;
	424	dregs->dma_count_lo = 0;
	425
	426	dregs->fifo_count = 0;
	427	dregs->fifo_count_hi = 0;
	428
	429	dregs->csr &= ~CSR_SEND;
	430	/* dregs->csr \|= CSR_DMA_ENABLE; */
	431	#else
1da177e4 LT	432	sun3_udc_write(UDC_RESET, UDC_CSR);
	433	dregs->fifo_count = 0;
	434	dregs->csr &= ~CSR_SEND;
	435
	436	/* reset fifo */
	437	dregs->csr &= ~CSR_FIFO;
	438	dregs->csr \|= CSR_FIFO;
757f5bad	439	#endif
1da177e4 LT	440
	441	sun3_dma_setup_done = NULL;
	442
	443	return ret;
	444
	445	}
	446
8dad0c51	447	#include "atari_NCR5380.c"
1da177e4	448
0d31f875 FT	449	#ifdef SUN3_SCSI_VME
	450	#define SUN3_SCSI_NAME "Sun3 NCR5380 VME SCSI"
	451	#define DRV_MODULE_NAME "sun3_scsi_vme"
	452	#else
	453	#define SUN3_SCSI_NAME "Sun3 NCR5380 SCSI"
	454	#define DRV_MODULE_NAME "sun3_scsi"
	455	#endif
	456
	457	#define PFX DRV_MODULE_NAME ": "
	458
	459	static struct scsi_host_template sun3_scsi_template = {
	460	.module = THIS_MODULE,
	461	.proc_name = DRV_MODULE_NAME,
9dcc26cf	462	.show_info = sun3scsi_show_info,
1da177e4	463	.name = SUN3_SCSI_NAME,
1da177e4 LT	464	.info = sun3scsi_info,
	465	.queuecommand = sun3scsi_queue_command,
	466	.eh_abort_handler = sun3scsi_abort,
	467	.eh_bus_reset_handler = sun3scsi_bus_reset,
d572f65f	468	.can_queue = 16,
1da177e4	469	.this_id = 7,
d572f65f FT	470	.sg_tablesize = SG_NONE,
d572f65f FT	471	.cmd_per_lun = 2,
1da177e4 LT	472	.use_clustering = DISABLE_CLUSTERING
	473	};
	474
0d31f875 FT	475	static int __init sun3_scsi_probe(struct platform_device *pdev)
	476	{
	477	struct Scsi_Host *instance;
	478	int error;
	479	struct resource irq, mem;
	480	unsigned char *ioaddr;
ca513fc9	481	int host_flags = 0;
0d31f875 FT	482	#ifdef SUN3_SCSI_VME
	483	int i;
	484	#endif
	485
	486	if (setup_can_queue > 0)
	487	sun3_scsi_template.can_queue = setup_can_queue;
	488	if (setup_cmd_per_lun > 0)
	489	sun3_scsi_template.cmd_per_lun = setup_cmd_per_lun;
	490	if (setup_sg_tablesize >= 0)
	491	sun3_scsi_template.sg_tablesize = setup_sg_tablesize;
	492	if (setup_hostid >= 0)
	493	sun3_scsi_template.this_id = setup_hostid & 7;
	494
0d31f875 FT	495	#ifdef SUN3_SCSI_VME
	496	ioaddr = NULL;
	497	for (i = 0; i < 2; i++) {
	498	unsigned char x;
	499
	500	irq = platform_get_resource(pdev, IORESOURCE_IRQ, i);
	501	mem = platform_get_resource(pdev, IORESOURCE_MEM, i);
	502	if (!irq \|\| !mem)
	503	break;
	504
	505	ioaddr = sun3_ioremap(mem->start, resource_size(mem),
	506	SUN3_PAGE_TYPE_VME16);
	507	dregs = (struct sun3_dma_regs *)(ioaddr + 8);
	508
	509	if (sun3_map_test((unsigned long)dregs, &x)) {
	510	unsigned short oldcsr;
	511
	512	oldcsr = dregs->csr;
	513	dregs->csr = 0;
	514	udelay(SUN3_DMA_DELAY);
	515	if (dregs->csr == 0x1400)
	516	break;
	517
	518	dregs->csr = oldcsr;
	519	}
	520
	521	iounmap(ioaddr);
	522	ioaddr = NULL;
	523	}
	524	if (!ioaddr)
	525	return -ENODEV;
	526	#else
	527	irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
	528	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	529	if (!irq \|\| !mem)
	530	return -ENODEV;
	531
	532	ioaddr = ioremap(mem->start, resource_size(mem));
	533	dregs = (struct sun3_dma_regs *)(ioaddr + 8);
	534
	535	udc_regs = dvma_malloc(sizeof(struct sun3_udc_regs));
	536	if (!udc_regs) {
	537	pr_err(PFX "couldn't allocate DVMA memory!\n");
	538	iounmap(ioaddr);
	539	return -ENOMEM;
	540	}
	541	#endif
	542
	543	sun3_scsi_regp = ioaddr;
	544
	545	instance = scsi_host_alloc(&sun3_scsi_template,
	546	sizeof(struct NCR5380_hostdata));
	547	if (!instance) {
	548	error = -ENOMEM;
	549	goto fail_alloc;
	550	}
	551	default_instance = instance;
	552
	553	instance->io_port = (unsigned long)ioaddr;
	554	instance->irq = irq->start;
	555
ca513fc9 FT	556	#ifdef SUPPORT_TAGS
	557	host_flags \|= setup_use_tagged_queuing > 0 ? FLAG_TAGGED_QUEUING : 0;
	558	#endif
	559
0ad0eff9 FT	560	error = NCR5380_init(instance, host_flags);
	561	if (error)
	562	goto fail_init;
0d31f875 FT	563
	564	error = request_irq(instance->irq, scsi_sun3_intr, 0,
	565	"NCR5380", instance);
	566	if (error) {
	567	#ifdef REAL_DMA
	568	pr_err(PFX "scsi%d: IRQ %d not free, bailing out\n",
	569	instance->host_no, instance->irq);
	570	goto fail_irq;
	571	#else
	572	pr_warn(PFX "scsi%d: IRQ %d not free, interrupts disabled\n",
	573	instance->host_no, instance->irq);
	574	instance->irq = NO_IRQ;
	575	#endif
	576	}
	577
	578	dregs->csr = 0;
	579	udelay(SUN3_DMA_DELAY);
	580	dregs->csr = CSR_SCSI \| CSR_FIFO \| CSR_INTR;
	581	udelay(SUN3_DMA_DELAY);
	582	dregs->fifo_count = 0;
	583	#ifdef SUN3_SCSI_VME
	584	dregs->fifo_count_hi = 0;
	585	dregs->dma_addr_hi = 0;
	586	dregs->dma_addr_lo = 0;
	587	dregs->dma_count_hi = 0;
	588	dregs->dma_count_lo = 0;
	589
	590	dregs->ivect = VME_DATA24 \| (instance->irq & 0xff);
	591	#endif
	592
9c3f0e2b	593	NCR5380_maybe_reset_bus(instance);
0d31f875 FT	594
	595	error = scsi_add_host(instance, NULL);
	596	if (error)
	597	goto fail_host;
	598
	599	platform_set_drvdata(pdev, instance);
	600
	601	scsi_scan_host(instance);
	602	return 0;
	603
	604	fail_host:
	605	if (instance->irq != NO_IRQ)
	606	free_irq(instance->irq, instance);
	607	fail_irq:
	608	NCR5380_exit(instance);
0ad0eff9	609	fail_init:
0d31f875 FT	610	scsi_host_put(instance);
	611	fail_alloc:
	612	if (udc_regs)
	613	dvma_free(udc_regs);
	614	iounmap(sun3_scsi_regp);
	615	return error;
	616	}
	617
	618	static int __exit sun3_scsi_remove(struct platform_device *pdev)
	619	{
	620	struct Scsi_Host *instance = platform_get_drvdata(pdev);
	621
	622	scsi_remove_host(instance);
	623	if (instance->irq != NO_IRQ)
	624	free_irq(instance->irq, instance);
	625	NCR5380_exit(instance);
	626	scsi_host_put(instance);
	627	if (udc_regs)
	628	dvma_free(udc_regs);
	629	iounmap(sun3_scsi_regp);
	630	return 0;
	631	}
	632
	633	static struct platform_driver sun3_scsi_driver = {
	634	.remove = __exit_p(sun3_scsi_remove),
	635	.driver = {
	636	.name = DRV_MODULE_NAME,
0d31f875 FT	637	},
0d31f875 FT	638	};
1da177e4	639
0d31f875	640	module_platform_driver_probe(sun3_scsi_driver, sun3_scsi_probe);
1da177e4	641
0d31f875	642	MODULE_ALIAS("platform:" DRV_MODULE_NAME);
1da177e4	643	MODULE_LICENSE("GPL");