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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Sun3 SCSI stuff by Erik Verbruggen (erik@bigmama.xtdnet.nl) | |
3 | * | |
4 | * Sun3 DMA routines added by Sam Creasey (sammy@sammy.net) | |
5 | * | |
6 | * VME support added by Sam Creasey | |
7 | * | |
8 | * Adapted from sun3_scsi.c -- see there for other headers | |
9 | * | |
10 | * TODO: modify this driver to support multiple Sun3 SCSI VME boards | |
11 | * | |
12 | */ | |
13 | ||
14 | #define AUTOSENSE | |
15 | ||
16 | #include <linux/types.h> | |
17 | #include <linux/stddef.h> | |
18 | #include <linux/ctype.h> | |
19 | #include <linux/delay.h> | |
20 | ||
21 | #include <linux/module.h> | |
22 | #include <linux/signal.h> | |
1da177e4 LT |
23 | #include <linux/ioport.h> |
24 | #include <linux/init.h> | |
25 | #include <linux/blkdev.h> | |
26 | ||
27 | #include <asm/io.h> | |
28 | #include <asm/system.h> | |
29 | ||
30 | #include <asm/sun3ints.h> | |
31 | #include <asm/dvma.h> | |
32 | #include <asm/idprom.h> | |
33 | #include <asm/machines.h> | |
34 | ||
35 | #define SUN3_SCSI_VME | |
36 | ||
37 | #undef SUN3_SCSI_DEBUG | |
38 | ||
39 | /* dma on! */ | |
40 | #define REAL_DMA | |
41 | ||
42 | #include "scsi.h" | |
c39e7eee | 43 | #include "initio.h" |
1da177e4 LT |
44 | #include <scsi/scsi_host.h> |
45 | #include "sun3_scsi.h" | |
1da177e4 LT |
46 | |
47 | extern int sun3_map_test(unsigned long, char *); | |
48 | ||
49 | #define USE_WRAPPER | |
50 | /*#define RESET_BOOT */ | |
51 | #define DRIVER_SETUP | |
52 | ||
53 | #define NDEBUG 0 | |
54 | ||
55 | /* | |
56 | * BUG can be used to trigger a strange code-size related hang on 2.1 kernels | |
57 | */ | |
58 | #ifdef BUG | |
59 | #undef RESET_BOOT | |
60 | #undef DRIVER_SETUP | |
61 | #endif | |
62 | ||
63 | /* #define SUPPORT_TAGS */ | |
64 | ||
65 | //#define ENABLE_IRQ() enable_irq( SUN3_VEC_VMESCSI0 ); | |
66 | #define ENABLE_IRQ() | |
67 | ||
68 | ||
7d12e780 | 69 | static irqreturn_t scsi_sun3_intr(int irq, void *dummy); |
1da177e4 LT |
70 | static inline unsigned char sun3scsi_read(int reg); |
71 | static inline void sun3scsi_write(int reg, int value); | |
72 | ||
73 | static int setup_can_queue = -1; | |
74 | module_param(setup_can_queue, int, 0); | |
75 | static int setup_cmd_per_lun = -1; | |
76 | module_param(setup_cmd_per_lun, int, 0); | |
77 | static int setup_sg_tablesize = -1; | |
78 | module_param(setup_sg_tablesize, int, 0); | |
79 | #ifdef SUPPORT_TAGS | |
80 | static int setup_use_tagged_queuing = -1; | |
81 | module_param(setup_use_tagged_queuing, int, 0); | |
82 | #endif | |
83 | static int setup_hostid = -1; | |
84 | module_param(setup_hostid, int, 0); | |
85 | ||
811c9366 | 86 | static struct scsi_cmnd *sun3_dma_setup_done = NULL; |
1da177e4 LT |
87 | |
88 | #define AFTER_RESET_DELAY (HZ/2) | |
89 | ||
90 | /* ms to wait after hitting dma regs */ | |
91 | #define SUN3_DMA_DELAY 10 | |
92 | ||
93 | /* dvma buffer to allocate -- 32k should hopefully be more than sufficient */ | |
94 | #define SUN3_DVMA_BUFSIZE 0xe000 | |
95 | ||
96 | /* minimum number of bytes to do dma on */ | |
97 | #define SUN3_DMA_MINSIZE 128 | |
98 | ||
99 | static volatile unsigned char *sun3_scsi_regp; | |
100 | static volatile struct sun3_dma_regs *dregs; | |
101 | #ifdef OLDDMA | |
102 | static unsigned char *dmabuf = NULL; /* dma memory buffer */ | |
103 | #endif | |
104 | static unsigned char *sun3_dma_orig_addr = NULL; | |
105 | static unsigned long sun3_dma_orig_count = 0; | |
106 | static int sun3_dma_active = 0; | |
107 | static unsigned long last_residual = 0; | |
108 | ||
109 | /* | |
110 | * NCR 5380 register access functions | |
111 | */ | |
112 | ||
113 | static inline unsigned char sun3scsi_read(int reg) | |
114 | { | |
115 | return( sun3_scsi_regp[reg] ); | |
116 | } | |
117 | ||
118 | static inline void sun3scsi_write(int reg, int value) | |
119 | { | |
120 | sun3_scsi_regp[reg] = value; | |
121 | } | |
122 | ||
123 | /* | |
124 | * XXX: status debug | |
125 | */ | |
126 | static struct Scsi_Host *default_instance; | |
127 | ||
128 | /* | |
d0be4a7d | 129 | * Function : int sun3scsi_detect(struct scsi_host_template * tpnt) |
1da177e4 LT |
130 | * |
131 | * Purpose : initializes mac NCR5380 driver based on the | |
132 | * command line / compile time port and irq definitions. | |
133 | * | |
134 | * Inputs : tpnt - template for this SCSI adapter. | |
135 | * | |
136 | * Returns : 1 if a host adapter was found, 0 if not. | |
137 | * | |
138 | */ | |
139 | ||
d559c49e | 140 | static int __init sun3scsi_detect(struct scsi_host_template * tpnt) |
1da177e4 LT |
141 | { |
142 | unsigned long ioaddr, irq = 0; | |
143 | static int called = 0; | |
144 | struct Scsi_Host *instance; | |
145 | int i; | |
146 | unsigned long addrs[3] = { IOBASE_SUN3_VMESCSI, | |
147 | IOBASE_SUN3_VMESCSI + 0x4000, | |
148 | 0 }; | |
149 | unsigned long vecs[3] = { SUN3_VEC_VMESCSI0, | |
150 | SUN3_VEC_VMESCSI1, | |
151 | 0 }; | |
152 | /* check that this machine has an onboard 5380 */ | |
153 | switch(idprom->id_machtype) { | |
154 | case SM_SUN3|SM_3_160: | |
155 | case SM_SUN3|SM_3_260: | |
156 | break; | |
157 | ||
158 | default: | |
159 | return 0; | |
160 | } | |
161 | ||
162 | if(called) | |
163 | return 0; | |
164 | ||
165 | tpnt->proc_name = "Sun3 5380 VME SCSI"; | |
166 | ||
167 | /* setup variables */ | |
168 | tpnt->can_queue = | |
169 | (setup_can_queue > 0) ? setup_can_queue : CAN_QUEUE; | |
170 | tpnt->cmd_per_lun = | |
171 | (setup_cmd_per_lun > 0) ? setup_cmd_per_lun : CMD_PER_LUN; | |
172 | tpnt->sg_tablesize = | |
173 | (setup_sg_tablesize >= 0) ? setup_sg_tablesize : SG_TABLESIZE; | |
174 | ||
175 | if (setup_hostid >= 0) | |
176 | tpnt->this_id = setup_hostid; | |
177 | else { | |
178 | /* use 7 as default */ | |
179 | tpnt->this_id = 7; | |
180 | } | |
181 | ||
182 | ioaddr = 0; | |
183 | for(i = 0; addrs[i] != 0; i++) { | |
184 | unsigned char x; | |
185 | ||
186 | ioaddr = (unsigned long)sun3_ioremap(addrs[i], PAGE_SIZE, | |
187 | SUN3_PAGE_TYPE_VME16); | |
188 | irq = vecs[i]; | |
189 | sun3_scsi_regp = (unsigned char *)ioaddr; | |
190 | ||
191 | dregs = (struct sun3_dma_regs *)(((unsigned char *)ioaddr) + 8); | |
192 | ||
193 | if(sun3_map_test((unsigned long)dregs, &x)) { | |
194 | unsigned short oldcsr; | |
195 | ||
196 | oldcsr = dregs->csr; | |
197 | dregs->csr = 0; | |
198 | udelay(SUN3_DMA_DELAY); | |
199 | if(dregs->csr == 0x1400) | |
200 | break; | |
201 | ||
202 | dregs->csr = oldcsr; | |
203 | } | |
204 | ||
205 | iounmap((void *)ioaddr); | |
206 | ioaddr = 0; | |
207 | } | |
208 | ||
209 | if(!ioaddr) | |
210 | return 0; | |
211 | ||
212 | #ifdef SUPPORT_TAGS | |
213 | if (setup_use_tagged_queuing < 0) | |
214 | setup_use_tagged_queuing = USE_TAGGED_QUEUING; | |
215 | #endif | |
216 | ||
217 | instance = scsi_register (tpnt, sizeof(struct NCR5380_hostdata)); | |
218 | if(instance == NULL) | |
219 | return 0; | |
220 | ||
221 | default_instance = instance; | |
222 | ||
223 | instance->io_port = (unsigned long) ioaddr; | |
224 | instance->irq = irq; | |
225 | ||
226 | NCR5380_init(instance, 0); | |
227 | ||
228 | instance->n_io_port = 32; | |
229 | ||
230 | ((struct NCR5380_hostdata *)instance->hostdata)->ctrl = 0; | |
231 | ||
232 | if (request_irq(instance->irq, scsi_sun3_intr, | |
1e641664 | 233 | 0, "Sun3SCSI-5380VME", instance)) { |
1da177e4 LT |
234 | #ifndef REAL_DMA |
235 | printk("scsi%d: IRQ%d not free, interrupts disabled\n", | |
236 | instance->host_no, instance->irq); | |
237 | instance->irq = SCSI_IRQ_NONE; | |
238 | #else | |
239 | printk("scsi%d: IRQ%d not free, bailing out\n", | |
240 | instance->host_no, instance->irq); | |
241 | return 0; | |
242 | #endif | |
243 | } | |
244 | ||
245 | printk("scsi%d: Sun3 5380 VME at port %lX irq", instance->host_no, instance->io_port); | |
246 | if (instance->irq == SCSI_IRQ_NONE) | |
247 | printk ("s disabled"); | |
248 | else | |
249 | printk (" %d", instance->irq); | |
250 | printk(" options CAN_QUEUE=%d CMD_PER_LUN=%d release=%d", | |
251 | instance->can_queue, instance->cmd_per_lun, | |
252 | SUN3SCSI_PUBLIC_RELEASE); | |
253 | printk("\nscsi%d:", instance->host_no); | |
254 | NCR5380_print_options(instance); | |
255 | printk("\n"); | |
256 | ||
257 | dregs->csr = 0; | |
258 | udelay(SUN3_DMA_DELAY); | |
259 | dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR; | |
260 | udelay(SUN3_DMA_DELAY); | |
261 | dregs->fifo_count = 0; | |
262 | dregs->fifo_count_hi = 0; | |
263 | dregs->dma_addr_hi = 0; | |
264 | dregs->dma_addr_lo = 0; | |
265 | dregs->dma_count_hi = 0; | |
266 | dregs->dma_count_lo = 0; | |
267 | ||
268 | dregs->ivect = VME_DATA24 | (instance->irq & 0xff); | |
269 | ||
270 | called = 1; | |
271 | ||
272 | #ifdef RESET_BOOT | |
273 | sun3_scsi_reset_boot(instance); | |
274 | #endif | |
275 | ||
276 | return 1; | |
277 | } | |
278 | ||
279 | int sun3scsi_release (struct Scsi_Host *shpnt) | |
280 | { | |
281 | if (shpnt->irq != SCSI_IRQ_NONE) | |
1e641664 | 282 | free_irq(shpnt->irq, shpnt); |
1da177e4 LT |
283 | |
284 | iounmap((void *)sun3_scsi_regp); | |
285 | ||
19b6c51c | 286 | NCR5380_exit(shpnt); |
1da177e4 LT |
287 | return 0; |
288 | } | |
289 | ||
290 | #ifdef RESET_BOOT | |
291 | /* | |
292 | * Our 'bus reset on boot' function | |
293 | */ | |
294 | ||
295 | static void sun3_scsi_reset_boot(struct Scsi_Host *instance) | |
296 | { | |
297 | unsigned long end; | |
298 | ||
299 | NCR5380_local_declare(); | |
300 | NCR5380_setup(instance); | |
301 | ||
302 | /* | |
303 | * Do a SCSI reset to clean up the bus during initialization. No | |
304 | * messing with the queues, interrupts, or locks necessary here. | |
305 | */ | |
306 | ||
307 | printk( "Sun3 SCSI: resetting the SCSI bus..." ); | |
308 | ||
309 | /* switch off SCSI IRQ - catch an interrupt without IRQ bit set else */ | |
310 | // sun3_disable_irq( IRQ_SUN3_SCSI ); | |
311 | ||
312 | /* get in phase */ | |
313 | NCR5380_write( TARGET_COMMAND_REG, | |
314 | PHASE_SR_TO_TCR( NCR5380_read(STATUS_REG) )); | |
315 | ||
316 | /* assert RST */ | |
317 | NCR5380_write( INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST ); | |
318 | ||
319 | /* The min. reset hold time is 25us, so 40us should be enough */ | |
320 | udelay( 50 ); | |
321 | ||
322 | /* reset RST and interrupt */ | |
323 | NCR5380_write( INITIATOR_COMMAND_REG, ICR_BASE ); | |
324 | NCR5380_read( RESET_PARITY_INTERRUPT_REG ); | |
325 | ||
326 | for( end = jiffies + AFTER_RESET_DELAY; time_before(jiffies, end); ) | |
327 | barrier(); | |
328 | ||
329 | /* switch on SCSI IRQ again */ | |
330 | // sun3_enable_irq( IRQ_SUN3_SCSI ); | |
331 | ||
332 | printk( " done\n" ); | |
333 | } | |
334 | #endif | |
335 | ||
336 | static const char * sun3scsi_info (struct Scsi_Host *spnt) { | |
337 | return ""; | |
338 | } | |
339 | ||
340 | // safe bits for the CSR | |
341 | #define CSR_GOOD 0x060f | |
342 | ||
7d12e780 | 343 | static irqreturn_t scsi_sun3_intr(int irq, void *dummy) |
1da177e4 LT |
344 | { |
345 | unsigned short csr = dregs->csr; | |
346 | int handled = 0; | |
347 | ||
348 | dregs->csr &= ~CSR_DMA_ENABLE; | |
349 | ||
350 | ||
351 | #ifdef SUN3_SCSI_DEBUG | |
352 | printk("scsi_intr csr %x\n", csr); | |
353 | #endif | |
354 | ||
355 | if(csr & ~CSR_GOOD) { | |
356 | if(csr & CSR_DMA_BUSERR) { | |
357 | printk("scsi%d: bus error in dma\n", default_instance->host_no); | |
358 | #ifdef SUN3_SCSI_DEBUG | |
359 | printk("scsi: residual %x count %x addr %p dmaaddr %x\n", | |
360 | dregs->fifo_count, | |
361 | dregs->dma_count_lo | (dregs->dma_count_hi << 16), | |
362 | sun3_dma_orig_addr, | |
363 | dregs->dma_addr_lo | (dregs->dma_addr_hi << 16)); | |
364 | #endif | |
365 | } | |
366 | ||
367 | if(csr & CSR_DMA_CONFLICT) { | |
368 | printk("scsi%d: dma conflict\n", default_instance->host_no); | |
369 | } | |
370 | handled = 1; | |
371 | } | |
372 | ||
373 | if(csr & (CSR_SDB_INT | CSR_DMA_INT)) { | |
7d12e780 | 374 | NCR5380_intr(irq, dummy); |
1da177e4 LT |
375 | handled = 1; |
376 | } | |
377 | ||
378 | return IRQ_RETVAL(handled); | |
379 | } | |
380 | ||
381 | /* | |
382 | * Debug stuff - to be called on NMI, or sysrq key. Use at your own risk; | |
383 | * reentering NCR5380_print_status seems to have ugly side effects | |
384 | */ | |
385 | ||
386 | /* this doesn't seem to get used at all -- sam */ | |
387 | #if 0 | |
388 | void sun3_sun3_debug (void) | |
389 | { | |
390 | unsigned long flags; | |
391 | NCR5380_local_declare(); | |
392 | ||
393 | if (default_instance) { | |
394 | local_irq_save(flags); | |
395 | NCR5380_print_status(default_instance); | |
396 | local_irq_restore(flags); | |
397 | } | |
398 | } | |
399 | #endif | |
400 | ||
401 | ||
402 | /* sun3scsi_dma_setup() -- initialize the dma controller for a read/write */ | |
403 | static unsigned long sun3scsi_dma_setup(void *data, unsigned long count, int write_flag) | |
404 | { | |
405 | void *addr; | |
406 | ||
407 | if(sun3_dma_orig_addr != NULL) | |
408 | dvma_unmap(sun3_dma_orig_addr); | |
409 | ||
410 | // addr = sun3_dvma_page((unsigned long)data, (unsigned long)dmabuf); | |
411 | addr = (void *)dvma_map_vme((unsigned long) data, count); | |
412 | ||
413 | sun3_dma_orig_addr = addr; | |
414 | sun3_dma_orig_count = count; | |
415 | ||
416 | #ifdef SUN3_SCSI_DEBUG | |
417 | printk("scsi: dma_setup addr %p count %x\n", addr, count); | |
418 | #endif | |
419 | ||
420 | // dregs->fifo_count = 0; | |
421 | #if 0 | |
422 | /* reset fifo */ | |
423 | dregs->csr &= ~CSR_FIFO; | |
424 | dregs->csr |= CSR_FIFO; | |
425 | #endif | |
426 | /* set direction */ | |
427 | if(write_flag) | |
428 | dregs->csr |= CSR_SEND; | |
429 | else | |
430 | dregs->csr &= ~CSR_SEND; | |
431 | ||
432 | /* reset fifo */ | |
433 | // dregs->csr &= ~CSR_FIFO; | |
434 | // dregs->csr |= CSR_FIFO; | |
435 | ||
436 | dregs->csr |= CSR_PACK_ENABLE; | |
437 | ||
438 | dregs->dma_addr_hi = ((unsigned long)addr >> 16); | |
439 | dregs->dma_addr_lo = ((unsigned long)addr & 0xffff); | |
440 | ||
441 | dregs->dma_count_hi = 0; | |
442 | dregs->dma_count_lo = 0; | |
443 | dregs->fifo_count_hi = 0; | |
444 | dregs->fifo_count = 0; | |
445 | ||
446 | #ifdef SUN3_SCSI_DEBUG | |
447 | printk("scsi: dma_setup done csr %x\n", dregs->csr); | |
448 | #endif | |
449 | return count; | |
450 | ||
451 | } | |
452 | ||
453 | static inline unsigned long sun3scsi_dma_residual(struct Scsi_Host *instance) | |
454 | { | |
455 | return last_residual; | |
456 | } | |
457 | ||
811c9366 HK |
458 | static inline unsigned long sun3scsi_dma_xfer_len(unsigned long wanted, |
459 | struct scsi_cmnd *cmd, | |
460 | int write_flag) | |
1da177e4 | 461 | { |
33659ebb | 462 | if (cmd->request->cmd_type == REQ_TYPE_FS) |
1da177e4 LT |
463 | return wanted; |
464 | else | |
465 | return 0; | |
466 | } | |
467 | ||
468 | static int sun3scsi_dma_start(unsigned long count, char *data) | |
469 | { | |
470 | ||
471 | unsigned short csr; | |
472 | ||
473 | csr = dregs->csr; | |
474 | #ifdef SUN3_SCSI_DEBUG | |
475 | printk("scsi: dma_start data %p count %x csr %x fifo %x\n", data, count, csr, dregs->fifo_count); | |
476 | #endif | |
477 | ||
478 | dregs->dma_count_hi = (sun3_dma_orig_count >> 16); | |
479 | dregs->dma_count_lo = (sun3_dma_orig_count & 0xffff); | |
480 | ||
481 | dregs->fifo_count_hi = (sun3_dma_orig_count >> 16); | |
482 | dregs->fifo_count = (sun3_dma_orig_count & 0xffff); | |
483 | ||
484 | // if(!(csr & CSR_DMA_ENABLE)) | |
485 | // dregs->csr |= CSR_DMA_ENABLE; | |
486 | ||
487 | return 0; | |
488 | } | |
489 | ||
490 | /* clean up after our dma is done */ | |
491 | static int sun3scsi_dma_finish(int write_flag) | |
492 | { | |
493 | unsigned short fifo; | |
494 | int ret = 0; | |
495 | ||
496 | sun3_dma_active = 0; | |
497 | ||
498 | dregs->csr &= ~CSR_DMA_ENABLE; | |
499 | ||
500 | fifo = dregs->fifo_count; | |
501 | if(write_flag) { | |
502 | if((fifo > 0) && (fifo < sun3_dma_orig_count)) | |
503 | fifo++; | |
504 | } | |
505 | ||
506 | last_residual = fifo; | |
507 | #ifdef SUN3_SCSI_DEBUG | |
508 | printk("scsi: residual %x total %x\n", fifo, sun3_dma_orig_count); | |
509 | #endif | |
510 | /* empty bytes from the fifo which didn't make it */ | |
511 | if((!write_flag) && (dregs->csr & CSR_LEFT)) { | |
512 | unsigned char *vaddr; | |
513 | ||
514 | #ifdef SUN3_SCSI_DEBUG | |
515 | printk("scsi: got left over bytes\n"); | |
516 | #endif | |
517 | ||
518 | vaddr = (unsigned char *)dvma_vmetov(sun3_dma_orig_addr); | |
519 | ||
520 | vaddr += (sun3_dma_orig_count - fifo); | |
521 | vaddr--; | |
522 | ||
523 | switch(dregs->csr & CSR_LEFT) { | |
524 | case CSR_LEFT_3: | |
525 | *vaddr = (dregs->bpack_lo & 0xff00) >> 8; | |
526 | vaddr--; | |
527 | ||
528 | case CSR_LEFT_2: | |
529 | *vaddr = (dregs->bpack_hi & 0x00ff); | |
530 | vaddr--; | |
531 | ||
532 | case CSR_LEFT_1: | |
533 | *vaddr = (dregs->bpack_hi & 0xff00) >> 8; | |
534 | break; | |
535 | } | |
536 | ||
537 | ||
538 | } | |
539 | ||
540 | dvma_unmap(sun3_dma_orig_addr); | |
541 | sun3_dma_orig_addr = NULL; | |
542 | ||
543 | dregs->dma_addr_hi = 0; | |
544 | dregs->dma_addr_lo = 0; | |
545 | dregs->dma_count_hi = 0; | |
546 | dregs->dma_count_lo = 0; | |
547 | ||
548 | dregs->fifo_count = 0; | |
549 | dregs->fifo_count_hi = 0; | |
550 | ||
551 | dregs->csr &= ~CSR_SEND; | |
552 | ||
553 | // dregs->csr |= CSR_DMA_ENABLE; | |
554 | ||
555 | #if 0 | |
556 | /* reset fifo */ | |
557 | dregs->csr &= ~CSR_FIFO; | |
558 | dregs->csr |= CSR_FIFO; | |
559 | #endif | |
560 | sun3_dma_setup_done = NULL; | |
561 | ||
562 | return ret; | |
563 | ||
564 | } | |
565 | ||
566 | #include "sun3_NCR5380.c" | |
567 | ||
d0be4a7d | 568 | static struct scsi_host_template driver_template = { |
1da177e4 LT |
569 | .name = SUN3_SCSI_NAME, |
570 | .detect = sun3scsi_detect, | |
571 | .release = sun3scsi_release, | |
572 | .info = sun3scsi_info, | |
573 | .queuecommand = sun3scsi_queue_command, | |
574 | .eh_abort_handler = sun3scsi_abort, | |
575 | .eh_bus_reset_handler = sun3scsi_bus_reset, | |
576 | .can_queue = CAN_QUEUE, | |
577 | .this_id = 7, | |
578 | .sg_tablesize = SG_TABLESIZE, | |
579 | .cmd_per_lun = CMD_PER_LUN, | |
580 | .use_clustering = DISABLE_CLUSTERING | |
581 | }; | |
582 | ||
583 | ||
584 | #include "scsi_module.c" | |
585 | ||
582df153 | 586 | MODULE_LICENSE("GPL"); |