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7a3e97b0 SY |
1 | /* |
2 | * Universal Flash Storage Host controller driver | |
3 | * | |
4 | * This code is based on drivers/scsi/ufs/ufs.h | |
3b1d0580 | 5 | * Copyright (C) 2011-2013 Samsung India Software Operations |
7a3e97b0 | 6 | * |
3b1d0580 VH |
7 | * Authors: |
8 | * Santosh Yaraganavi <santosh.sy@samsung.com> | |
9 | * Vinayak Holikatti <h.vinayak@samsung.com> | |
7a3e97b0 SY |
10 | * |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License | |
13 | * as published by the Free Software Foundation; either version 2 | |
14 | * of the License, or (at your option) any later version. | |
3b1d0580 VH |
15 | * See the COPYING file in the top-level directory or visit |
16 | * <http://www.gnu.org/licenses/gpl-2.0.html> | |
7a3e97b0 SY |
17 | * |
18 | * This program is distributed in the hope that it will be useful, | |
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | * GNU General Public License for more details. | |
22 | * | |
3b1d0580 VH |
23 | * This program is provided "AS IS" and "WITH ALL FAULTS" and |
24 | * without warranty of any kind. You are solely responsible for | |
25 | * determining the appropriateness of using and distributing | |
26 | * the program and assume all risks associated with your exercise | |
27 | * of rights with respect to the program, including but not limited | |
28 | * to infringement of third party rights, the risks and costs of | |
29 | * program errors, damage to or loss of data, programs or equipment, | |
30 | * and unavailability or interruption of operations. Under no | |
31 | * circumstances will the contributor of this Program be liable for | |
32 | * any damages of any kind arising from your use or distribution of | |
33 | * this program. | |
7a3e97b0 SY |
34 | */ |
35 | ||
36 | #ifndef _UFS_H | |
37 | #define _UFS_H | |
38 | ||
5a0b0cb9 SRT |
39 | #include <linux/mutex.h> |
40 | #include <linux/types.h> | |
41 | ||
7a3e97b0 | 42 | #define MAX_CDB_SIZE 16 |
68078d5c | 43 | #define GENERAL_UPIU_REQUEST_SIZE 32 |
d44a5f98 DR |
44 | #define QUERY_DESC_MAX_SIZE 255 |
45 | #define QUERY_DESC_MIN_SIZE 2 | |
b573d484 | 46 | #define QUERY_DESC_HDR_SIZE 2 |
68078d5c DR |
47 | #define QUERY_OSF_SIZE (GENERAL_UPIU_REQUEST_SIZE - \ |
48 | (sizeof(struct utp_upiu_header))) | |
e3ce73d6 | 49 | #define RESPONSE_UPIU_SENSE_DATA_LENGTH 18 |
7a3e97b0 SY |
50 | |
51 | #define UPIU_HEADER_DWORD(byte3, byte2, byte1, byte0)\ | |
5a0b0cb9 | 52 | cpu_to_be32((byte3 << 24) | (byte2 << 16) |\ |
7a3e97b0 | 53 | (byte1 << 8) | (byte0)) |
0ce147d4 SJ |
54 | /* |
55 | * UFS device may have standard LUs and LUN id could be from 0x00 to | |
56 | * 0x7F. Standard LUs use "Peripheral Device Addressing Format". | |
57 | * UFS device may also have the Well Known LUs (also referred as W-LU) | |
58 | * which again could be from 0x00 to 0x7F. For W-LUs, device only use | |
59 | * the "Extended Addressing Format" which means the W-LUNs would be | |
60 | * from 0xc100 (SCSI_W_LUN_BASE) onwards. | |
61 | * This means max. LUN number reported from UFS device could be 0xC17F. | |
62 | */ | |
63 | #define UFS_UPIU_MAX_UNIT_NUM_ID 0x7F | |
64 | #define UFS_MAX_LUNS (SCSI_W_LUN_BASE + UFS_UPIU_MAX_UNIT_NUM_ID) | |
65 | #define UFS_UPIU_WLUN_ID (1 << 7) | |
da461cec SJ |
66 | #define UFS_UPIU_MAX_GENERAL_LUN 8 |
67 | ||
0ce147d4 SJ |
68 | /* Well known logical unit id in LUN field of UPIU */ |
69 | enum { | |
70 | UFS_UPIU_REPORT_LUNS_WLUN = 0x81, | |
71 | UFS_UPIU_UFS_DEVICE_WLUN = 0xD0, | |
72 | UFS_UPIU_BOOT_WLUN = 0xB0, | |
73 | UFS_UPIU_RPMB_WLUN = 0xC4, | |
74 | }; | |
75 | ||
7a3e97b0 SY |
76 | /* |
77 | * UFS Protocol Information Unit related definitions | |
78 | */ | |
79 | ||
80 | /* Task management functions */ | |
81 | enum { | |
82 | UFS_ABORT_TASK = 0x01, | |
83 | UFS_ABORT_TASK_SET = 0x02, | |
84 | UFS_CLEAR_TASK_SET = 0x04, | |
85 | UFS_LOGICAL_RESET = 0x08, | |
86 | UFS_QUERY_TASK = 0x80, | |
87 | UFS_QUERY_TASK_SET = 0x81, | |
88 | }; | |
89 | ||
90 | /* UTP UPIU Transaction Codes Initiator to Target */ | |
91 | enum { | |
92 | UPIU_TRANSACTION_NOP_OUT = 0x00, | |
93 | UPIU_TRANSACTION_COMMAND = 0x01, | |
94 | UPIU_TRANSACTION_DATA_OUT = 0x02, | |
95 | UPIU_TRANSACTION_TASK_REQ = 0x04, | |
68078d5c | 96 | UPIU_TRANSACTION_QUERY_REQ = 0x16, |
7a3e97b0 SY |
97 | }; |
98 | ||
99 | /* UTP UPIU Transaction Codes Target to Initiator */ | |
100 | enum { | |
101 | UPIU_TRANSACTION_NOP_IN = 0x20, | |
102 | UPIU_TRANSACTION_RESPONSE = 0x21, | |
103 | UPIU_TRANSACTION_DATA_IN = 0x22, | |
104 | UPIU_TRANSACTION_TASK_RSP = 0x24, | |
105 | UPIU_TRANSACTION_READY_XFER = 0x31, | |
106 | UPIU_TRANSACTION_QUERY_RSP = 0x36, | |
5a0b0cb9 | 107 | UPIU_TRANSACTION_REJECT_UPIU = 0x3F, |
7a3e97b0 SY |
108 | }; |
109 | ||
110 | /* UPIU Read/Write flags */ | |
111 | enum { | |
112 | UPIU_CMD_FLAGS_NONE = 0x00, | |
113 | UPIU_CMD_FLAGS_WRITE = 0x20, | |
114 | UPIU_CMD_FLAGS_READ = 0x40, | |
115 | }; | |
116 | ||
117 | /* UPIU Task Attributes */ | |
118 | enum { | |
119 | UPIU_TASK_ATTR_SIMPLE = 0x00, | |
120 | UPIU_TASK_ATTR_ORDERED = 0x01, | |
121 | UPIU_TASK_ATTR_HEADQ = 0x02, | |
122 | UPIU_TASK_ATTR_ACA = 0x03, | |
123 | }; | |
124 | ||
68078d5c | 125 | /* UPIU Query request function */ |
7a3e97b0 | 126 | enum { |
68078d5c DR |
127 | UPIU_QUERY_FUNC_STANDARD_READ_REQUEST = 0x01, |
128 | UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST = 0x81, | |
129 | }; | |
130 | ||
131 | /* Flag idn for Query Requests*/ | |
132 | enum flag_idn { | |
133 | QUERY_FLAG_IDN_FDEVICEINIT = 0x01, | |
57d104c1 | 134 | QUERY_FLAG_IDN_PWR_ON_WPE = 0x03, |
66ec6d59 SRT |
135 | QUERY_FLAG_IDN_BKOPS_EN = 0x04, |
136 | }; | |
137 | ||
138 | /* Attribute idn for Query requests */ | |
139 | enum attr_idn { | |
3a4bf06d | 140 | QUERY_ATTR_IDN_ACTIVE_ICC_LVL = 0x03, |
66ec6d59 SRT |
141 | QUERY_ATTR_IDN_BKOPS_STATUS = 0x05, |
142 | QUERY_ATTR_IDN_EE_CONTROL = 0x0D, | |
143 | QUERY_ATTR_IDN_EE_STATUS = 0x0E, | |
144 | }; | |
145 | ||
d44a5f98 DR |
146 | /* Descriptor idn for Query requests */ |
147 | enum desc_idn { | |
148 | QUERY_DESC_IDN_DEVICE = 0x0, | |
a4b0e8a4 | 149 | QUERY_DESC_IDN_CONFIGURATION = 0x1, |
d44a5f98 DR |
150 | QUERY_DESC_IDN_UNIT = 0x2, |
151 | QUERY_DESC_IDN_RFU_0 = 0x3, | |
152 | QUERY_DESC_IDN_INTERCONNECT = 0x4, | |
153 | QUERY_DESC_IDN_STRING = 0x5, | |
154 | QUERY_DESC_IDN_RFU_1 = 0x6, | |
155 | QUERY_DESC_IDN_GEOMETRY = 0x7, | |
156 | QUERY_DESC_IDN_POWER = 0x8, | |
da461cec SJ |
157 | QUERY_DESC_IDN_MAX, |
158 | }; | |
159 | ||
160 | enum desc_header_offset { | |
161 | QUERY_DESC_LENGTH_OFFSET = 0x00, | |
162 | QUERY_DESC_DESC_TYPE_OFFSET = 0x01, | |
163 | }; | |
164 | ||
a4b0e8a4 PM |
165 | enum ufs_desc_def_size { |
166 | QUERY_DESC_DEVICE_DEF_SIZE = 0x40, | |
167 | QUERY_DESC_CONFIGURATION_DEF_SIZE = 0x90, | |
168 | QUERY_DESC_UNIT_DEF_SIZE = 0x23, | |
169 | QUERY_DESC_INTERCONNECT_DEF_SIZE = 0x06, | |
170 | QUERY_DESC_GEOMETRY_DEF_SIZE = 0x44, | |
171 | QUERY_DESC_POWER_DEF_SIZE = 0x62, | |
d44a5f98 DR |
172 | }; |
173 | ||
1b3e8956 DR |
174 | /* Unit descriptor parameters offsets in bytes*/ |
175 | enum unit_desc_param { | |
176 | UNIT_DESC_PARAM_LEN = 0x0, | |
177 | UNIT_DESC_PARAM_TYPE = 0x1, | |
178 | UNIT_DESC_PARAM_UNIT_INDEX = 0x2, | |
179 | UNIT_DESC_PARAM_LU_ENABLE = 0x3, | |
180 | UNIT_DESC_PARAM_BOOT_LUN_ID = 0x4, | |
181 | UNIT_DESC_PARAM_LU_WR_PROTECT = 0x5, | |
182 | UNIT_DESC_PARAM_LU_Q_DEPTH = 0x6, | |
183 | UNIT_DESC_PARAM_MEM_TYPE = 0x8, | |
184 | UNIT_DESC_PARAM_DATA_RELIABILITY = 0x9, | |
185 | UNIT_DESC_PARAM_LOGICAL_BLK_SIZE = 0xA, | |
186 | UNIT_DESC_PARAM_LOGICAL_BLK_COUNT = 0xB, | |
187 | UNIT_DESC_PARAM_ERASE_BLK_SIZE = 0x13, | |
188 | UNIT_DESC_PARAM_PROVISIONING_TYPE = 0x17, | |
189 | UNIT_DESC_PARAM_PHY_MEM_RSRC_CNT = 0x18, | |
190 | UNIT_DESC_PARAM_CTX_CAPABILITIES = 0x20, | |
191 | UNIT_DESC_PARAM_LARGE_UNIT_SIZE_M1 = 0x22, | |
192 | }; | |
193 | ||
c58ab7aa YG |
194 | /* Device descriptor parameters offsets in bytes*/ |
195 | enum device_desc_param { | |
196 | DEVICE_DESC_PARAM_LEN = 0x0, | |
197 | DEVICE_DESC_PARAM_TYPE = 0x1, | |
198 | DEVICE_DESC_PARAM_DEVICE_TYPE = 0x2, | |
199 | DEVICE_DESC_PARAM_DEVICE_CLASS = 0x3, | |
200 | DEVICE_DESC_PARAM_DEVICE_SUB_CLASS = 0x4, | |
201 | DEVICE_DESC_PARAM_PRTCL = 0x5, | |
202 | DEVICE_DESC_PARAM_NUM_LU = 0x6, | |
203 | DEVICE_DESC_PARAM_NUM_WLU = 0x7, | |
204 | DEVICE_DESC_PARAM_BOOT_ENBL = 0x8, | |
205 | DEVICE_DESC_PARAM_DESC_ACCSS_ENBL = 0x9, | |
206 | DEVICE_DESC_PARAM_INIT_PWR_MODE = 0xA, | |
207 | DEVICE_DESC_PARAM_HIGH_PR_LUN = 0xB, | |
208 | DEVICE_DESC_PARAM_SEC_RMV_TYPE = 0xC, | |
209 | DEVICE_DESC_PARAM_SEC_LU = 0xD, | |
210 | DEVICE_DESC_PARAM_BKOP_TERM_LT = 0xE, | |
211 | DEVICE_DESC_PARAM_ACTVE_ICC_LVL = 0xF, | |
212 | DEVICE_DESC_PARAM_SPEC_VER = 0x10, | |
213 | DEVICE_DESC_PARAM_MANF_DATE = 0x12, | |
214 | DEVICE_DESC_PARAM_MANF_NAME = 0x14, | |
215 | DEVICE_DESC_PARAM_PRDCT_NAME = 0x15, | |
216 | DEVICE_DESC_PARAM_SN = 0x16, | |
217 | DEVICE_DESC_PARAM_OEM_ID = 0x17, | |
218 | DEVICE_DESC_PARAM_MANF_ID = 0x18, | |
219 | DEVICE_DESC_PARAM_UD_OFFSET = 0x1A, | |
220 | DEVICE_DESC_PARAM_UD_LEN = 0x1B, | |
221 | DEVICE_DESC_PARAM_RTT_CAP = 0x1C, | |
222 | DEVICE_DESC_PARAM_FRQ_RTC = 0x1D, | |
223 | }; | |
224 | ||
57d104c1 SJ |
225 | /* |
226 | * Logical Unit Write Protect | |
227 | * 00h: LU not write protected | |
228 | * 01h: LU write protected when fPowerOnWPEn =1 | |
229 | * 02h: LU permanently write protected when fPermanentWPEn =1 | |
230 | */ | |
231 | enum ufs_lu_wp_type { | |
232 | UFS_LU_NO_WP = 0x00, | |
233 | UFS_LU_POWER_ON_WP = 0x01, | |
234 | UFS_LU_PERM_WP = 0x02, | |
235 | }; | |
236 | ||
3a4bf06d YG |
237 | /* bActiveICCLevel parameter current units */ |
238 | enum { | |
239 | UFSHCD_NANO_AMP = 0, | |
240 | UFSHCD_MICRO_AMP = 1, | |
241 | UFSHCD_MILI_AMP = 2, | |
242 | UFSHCD_AMP = 3, | |
243 | }; | |
244 | ||
245 | #define POWER_DESC_MAX_SIZE 0x62 | |
246 | #define POWER_DESC_MAX_ACTV_ICC_LVLS 16 | |
247 | ||
248 | /* Attribute bActiveICCLevel parameter bit masks definitions */ | |
249 | #define ATTR_ICC_LVL_UNIT_OFFSET 14 | |
250 | #define ATTR_ICC_LVL_UNIT_MASK (0x3 << ATTR_ICC_LVL_UNIT_OFFSET) | |
251 | #define ATTR_ICC_LVL_VALUE_MASK 0x3FF | |
252 | ||
253 | /* Power descriptor parameters offsets in bytes */ | |
254 | enum power_desc_param_offset { | |
255 | PWR_DESC_LEN = 0x0, | |
256 | PWR_DESC_TYPE = 0x1, | |
257 | PWR_DESC_ACTIVE_LVLS_VCC_0 = 0x2, | |
258 | PWR_DESC_ACTIVE_LVLS_VCCQ_0 = 0x22, | |
259 | PWR_DESC_ACTIVE_LVLS_VCCQ2_0 = 0x42, | |
260 | }; | |
261 | ||
66ec6d59 SRT |
262 | /* Exception event mask values */ |
263 | enum { | |
264 | MASK_EE_STATUS = 0xFFFF, | |
265 | MASK_EE_URGENT_BKOPS = (1 << 2), | |
266 | }; | |
267 | ||
268 | /* Background operation status */ | |
57d104c1 | 269 | enum bkops_status { |
66ec6d59 SRT |
270 | BKOPS_STATUS_NO_OP = 0x0, |
271 | BKOPS_STATUS_NON_CRITICAL = 0x1, | |
272 | BKOPS_STATUS_PERF_IMPACT = 0x2, | |
273 | BKOPS_STATUS_CRITICAL = 0x3, | |
57d104c1 | 274 | BKOPS_STATUS_MAX = BKOPS_STATUS_CRITICAL, |
68078d5c DR |
275 | }; |
276 | ||
277 | /* UTP QUERY Transaction Specific Fields OpCode */ | |
278 | enum query_opcode { | |
7a3e97b0 SY |
279 | UPIU_QUERY_OPCODE_NOP = 0x0, |
280 | UPIU_QUERY_OPCODE_READ_DESC = 0x1, | |
281 | UPIU_QUERY_OPCODE_WRITE_DESC = 0x2, | |
282 | UPIU_QUERY_OPCODE_READ_ATTR = 0x3, | |
283 | UPIU_QUERY_OPCODE_WRITE_ATTR = 0x4, | |
284 | UPIU_QUERY_OPCODE_READ_FLAG = 0x5, | |
285 | UPIU_QUERY_OPCODE_SET_FLAG = 0x6, | |
286 | UPIU_QUERY_OPCODE_CLEAR_FLAG = 0x7, | |
287 | UPIU_QUERY_OPCODE_TOGGLE_FLAG = 0x8, | |
288 | }; | |
289 | ||
68078d5c DR |
290 | /* Query response result code */ |
291 | enum { | |
292 | QUERY_RESULT_SUCCESS = 0x00, | |
293 | QUERY_RESULT_NOT_READABLE = 0xF6, | |
294 | QUERY_RESULT_NOT_WRITEABLE = 0xF7, | |
295 | QUERY_RESULT_ALREADY_WRITTEN = 0xF8, | |
296 | QUERY_RESULT_INVALID_LENGTH = 0xF9, | |
297 | QUERY_RESULT_INVALID_VALUE = 0xFA, | |
298 | QUERY_RESULT_INVALID_SELECTOR = 0xFB, | |
299 | QUERY_RESULT_INVALID_INDEX = 0xFC, | |
300 | QUERY_RESULT_INVALID_IDN = 0xFD, | |
301 | QUERY_RESULT_INVALID_OPCODE = 0xFE, | |
302 | QUERY_RESULT_GENERAL_FAILURE = 0xFF, | |
303 | }; | |
304 | ||
7a3e97b0 SY |
305 | /* UTP Transfer Request Command Type (CT) */ |
306 | enum { | |
307 | UPIU_COMMAND_SET_TYPE_SCSI = 0x0, | |
308 | UPIU_COMMAND_SET_TYPE_UFS = 0x1, | |
309 | UPIU_COMMAND_SET_TYPE_QUERY = 0x2, | |
310 | }; | |
311 | ||
5a0b0cb9 SRT |
312 | /* UTP Transfer Request Command Offset */ |
313 | #define UPIU_COMMAND_TYPE_OFFSET 28 | |
314 | ||
315 | /* Offset of the response code in the UPIU header */ | |
316 | #define UPIU_RSP_CODE_OFFSET 8 | |
317 | ||
7a3e97b0 | 318 | enum { |
68078d5c DR |
319 | MASK_SCSI_STATUS = 0xFF, |
320 | MASK_TASK_RESPONSE = 0xFF00, | |
321 | MASK_RSP_UPIU_RESULT = 0xFFFF, | |
322 | MASK_QUERY_DATA_SEG_LEN = 0xFFFF, | |
1c2623c5 | 323 | MASK_RSP_UPIU_DATA_SEG_LEN = 0xFFFF, |
66ec6d59 | 324 | MASK_RSP_EXCEPTION_EVENT = 0x10000, |
8794ee0c | 325 | MASK_TM_SERVICE_RESP = 0xFF, |
7a3e97b0 SY |
326 | }; |
327 | ||
328 | /* Task management service response */ | |
329 | enum { | |
330 | UPIU_TASK_MANAGEMENT_FUNC_COMPL = 0x00, | |
331 | UPIU_TASK_MANAGEMENT_FUNC_NOT_SUPPORTED = 0x04, | |
332 | UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED = 0x08, | |
333 | UPIU_TASK_MANAGEMENT_FUNC_FAILED = 0x05, | |
334 | UPIU_INCORRECT_LOGICAL_UNIT_NO = 0x09, | |
335 | }; | |
57d104c1 SJ |
336 | |
337 | /* UFS device power modes */ | |
338 | enum ufs_dev_pwr_mode { | |
339 | UFS_ACTIVE_PWR_MODE = 1, | |
340 | UFS_SLEEP_PWR_MODE = 2, | |
341 | UFS_POWERDOWN_PWR_MODE = 3, | |
342 | }; | |
343 | ||
7a3e97b0 SY |
344 | /** |
345 | * struct utp_upiu_header - UPIU header structure | |
346 | * @dword_0: UPIU header DW-0 | |
347 | * @dword_1: UPIU header DW-1 | |
348 | * @dword_2: UPIU header DW-2 | |
349 | */ | |
350 | struct utp_upiu_header { | |
e8c8e82a SRT |
351 | __be32 dword_0; |
352 | __be32 dword_1; | |
353 | __be32 dword_2; | |
7a3e97b0 SY |
354 | }; |
355 | ||
356 | /** | |
357 | * struct utp_upiu_cmd - Command UPIU structure | |
7a3e97b0 SY |
358 | * @data_transfer_len: Data Transfer Length DW-3 |
359 | * @cdb: Command Descriptor Block CDB DW-4 to DW-7 | |
360 | */ | |
361 | struct utp_upiu_cmd { | |
e8c8e82a | 362 | __be32 exp_data_transfer_len; |
7a3e97b0 SY |
363 | u8 cdb[MAX_CDB_SIZE]; |
364 | }; | |
365 | ||
68078d5c DR |
366 | /** |
367 | * struct utp_upiu_query - upiu request buffer structure for | |
368 | * query request. | |
369 | * @opcode: command to perform B-0 | |
370 | * @idn: a value that indicates the particular type of data B-1 | |
371 | * @index: Index to further identify data B-2 | |
372 | * @selector: Index to further identify data B-3 | |
373 | * @reserved_osf: spec reserved field B-4,5 | |
374 | * @length: number of descriptor bytes to read/write B-6,7 | |
375 | * @value: Attribute value to be written DW-5 | |
376 | * @reserved: spec reserved DW-6,7 | |
377 | */ | |
378 | struct utp_upiu_query { | |
379 | u8 opcode; | |
380 | u8 idn; | |
381 | u8 index; | |
382 | u8 selector; | |
e8c8e82a SRT |
383 | __be16 reserved_osf; |
384 | __be16 length; | |
385 | __be32 value; | |
386 | __be32 reserved[2]; | |
68078d5c DR |
387 | }; |
388 | ||
7a3e97b0 | 389 | /** |
5a0b0cb9 SRT |
390 | * struct utp_upiu_req - general upiu request structure |
391 | * @header:UPIU header structure DW-0 to DW-2 | |
392 | * @sc: fields structure for scsi command DW-3 to DW-7 | |
68078d5c | 393 | * @qr: fields structure for query request DW-3 to DW-7 |
5a0b0cb9 SRT |
394 | */ |
395 | struct utp_upiu_req { | |
396 | struct utp_upiu_header header; | |
68078d5c DR |
397 | union { |
398 | struct utp_upiu_cmd sc; | |
399 | struct utp_upiu_query qr; | |
400 | }; | |
5a0b0cb9 SRT |
401 | }; |
402 | ||
403 | /** | |
404 | * struct utp_cmd_rsp - Response UPIU structure | |
7a3e97b0 SY |
405 | * @residual_transfer_count: Residual transfer count DW-3 |
406 | * @reserved: Reserved double words DW-4 to DW-7 | |
407 | * @sense_data_len: Sense data length DW-8 U16 | |
408 | * @sense_data: Sense data field DW-8 to DW-12 | |
409 | */ | |
5a0b0cb9 | 410 | struct utp_cmd_rsp { |
e8c8e82a SRT |
411 | __be32 residual_transfer_count; |
412 | __be32 reserved[4]; | |
413 | __be16 sense_data_len; | |
e3ce73d6 | 414 | u8 sense_data[RESPONSE_UPIU_SENSE_DATA_LENGTH]; |
7a3e97b0 SY |
415 | }; |
416 | ||
5a0b0cb9 SRT |
417 | /** |
418 | * struct utp_upiu_rsp - general upiu response structure | |
419 | * @header: UPIU header structure DW-0 to DW-2 | |
420 | * @sr: fields structure for scsi command DW-3 to DW-12 | |
68078d5c | 421 | * @qr: fields structure for query request DW-3 to DW-7 |
5a0b0cb9 SRT |
422 | */ |
423 | struct utp_upiu_rsp { | |
424 | struct utp_upiu_header header; | |
68078d5c DR |
425 | union { |
426 | struct utp_cmd_rsp sr; | |
427 | struct utp_upiu_query qr; | |
428 | }; | |
5a0b0cb9 SRT |
429 | }; |
430 | ||
7a3e97b0 SY |
431 | /** |
432 | * struct utp_upiu_task_req - Task request UPIU structure | |
433 | * @header - UPIU header structure DW0 to DW-2 | |
434 | * @input_param1: Input parameter 1 DW-3 | |
435 | * @input_param2: Input parameter 2 DW-4 | |
436 | * @input_param3: Input parameter 3 DW-5 | |
437 | * @reserved: Reserved double words DW-6 to DW-7 | |
438 | */ | |
439 | struct utp_upiu_task_req { | |
440 | struct utp_upiu_header header; | |
e8c8e82a SRT |
441 | __be32 input_param1; |
442 | __be32 input_param2; | |
443 | __be32 input_param3; | |
444 | __be32 reserved[2]; | |
7a3e97b0 SY |
445 | }; |
446 | ||
447 | /** | |
448 | * struct utp_upiu_task_rsp - Task Management Response UPIU structure | |
449 | * @header: UPIU header structure DW0-DW-2 | |
450 | * @output_param1: Ouput parameter 1 DW3 | |
451 | * @output_param2: Output parameter 2 DW4 | |
452 | * @reserved: Reserved double words DW-5 to DW-7 | |
453 | */ | |
454 | struct utp_upiu_task_rsp { | |
455 | struct utp_upiu_header header; | |
e8c8e82a SRT |
456 | __be32 output_param1; |
457 | __be32 output_param2; | |
458 | __be32 reserved[3]; | |
7a3e97b0 SY |
459 | }; |
460 | ||
68078d5c DR |
461 | /** |
462 | * struct ufs_query_req - parameters for building a query request | |
463 | * @query_func: UPIU header query function | |
464 | * @upiu_req: the query request data | |
465 | */ | |
466 | struct ufs_query_req { | |
467 | u8 query_func; | |
468 | struct utp_upiu_query upiu_req; | |
469 | }; | |
470 | ||
471 | /** | |
472 | * struct ufs_query_resp - UPIU QUERY | |
473 | * @response: device response code | |
474 | * @upiu_res: query response data | |
475 | */ | |
476 | struct ufs_query_res { | |
477 | u8 response; | |
478 | struct utp_upiu_query upiu_res; | |
479 | }; | |
480 | ||
aa497613 SRT |
481 | #define UFS_VREG_VCC_MIN_UV 2700000 /* uV */ |
482 | #define UFS_VREG_VCC_MAX_UV 3600000 /* uV */ | |
483 | #define UFS_VREG_VCC_1P8_MIN_UV 1700000 /* uV */ | |
484 | #define UFS_VREG_VCC_1P8_MAX_UV 1950000 /* uV */ | |
485 | #define UFS_VREG_VCCQ_MIN_UV 1100000 /* uV */ | |
486 | #define UFS_VREG_VCCQ_MAX_UV 1300000 /* uV */ | |
487 | #define UFS_VREG_VCCQ2_MIN_UV 1650000 /* uV */ | |
488 | #define UFS_VREG_VCCQ2_MAX_UV 1950000 /* uV */ | |
489 | ||
57d104c1 SJ |
490 | /* |
491 | * VCCQ & VCCQ2 current requirement when UFS device is in sleep state | |
492 | * and link is in Hibern8 state. | |
493 | */ | |
494 | #define UFS_VREG_LPM_LOAD_UA 1000 /* uA */ | |
495 | ||
aa497613 SRT |
496 | struct ufs_vreg { |
497 | struct regulator *reg; | |
498 | const char *name; | |
499 | bool enabled; | |
60f01870 | 500 | bool unused; |
aa497613 SRT |
501 | int min_uV; |
502 | int max_uV; | |
503 | int min_uA; | |
504 | int max_uA; | |
505 | }; | |
506 | ||
507 | struct ufs_vreg_info { | |
508 | struct ufs_vreg *vcc; | |
509 | struct ufs_vreg *vccq; | |
510 | struct ufs_vreg *vccq2; | |
6a771a65 | 511 | struct ufs_vreg *vdd_hba; |
aa497613 SRT |
512 | }; |
513 | ||
57d104c1 SJ |
514 | struct ufs_dev_info { |
515 | bool f_power_on_wp_en; | |
516 | /* Keeps information if any of the LU is power on write protected */ | |
517 | bool is_lu_power_on_wp; | |
518 | }; | |
519 | ||
93fdd5ac TW |
520 | #define MAX_MODEL_LEN 16 |
521 | /** | |
522 | * ufs_dev_desc - ufs device details from the device descriptor | |
523 | * | |
524 | * @wmanufacturerid: card details | |
525 | * @model: card model | |
526 | */ | |
527 | struct ufs_dev_desc { | |
528 | u16 wmanufacturerid; | |
529 | char model[MAX_MODEL_LEN + 1]; | |
530 | }; | |
531 | ||
7a3e97b0 | 532 | #endif /* End of Header */ |