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1/*
2 * Universal Flash Storage Host controller driver
3 *
4 * This code is based on drivers/scsi/ufs/ufshcd.h
5 * Copyright (C) 2011-2013 Samsung India Software Operations
dc3c8d3a 6 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
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7 *
8 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
35 */
36
37#ifndef _UFSHCD_H
38#define _UFSHCD_H
39
40#include <linux/module.h>
41#include <linux/kernel.h>
42#include <linux/init.h>
43#include <linux/interrupt.h>
44#include <linux/io.h>
45#include <linux/delay.h>
46#include <linux/slab.h>
47#include <linux/spinlock.h>
a3cd5ec5 48#include <linux/rwsem.h>
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49#include <linux/workqueue.h>
50#include <linux/errno.h>
51#include <linux/types.h>
52#include <linux/wait.h>
53#include <linux/bitops.h>
54#include <linux/pm_runtime.h>
55#include <linux/clk.h>
6ccf44fe 56#include <linux/completion.h>
aa497613 57#include <linux/regulator/consumer.h>
f37aabcf 58#include "unipro.h"
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59
60#include <asm/irq.h>
61#include <asm/byteorder.h>
62#include <scsi/scsi.h>
63#include <scsi/scsi_cmnd.h>
64#include <scsi/scsi_host.h>
65#include <scsi/scsi_tcq.h>
66#include <scsi/scsi_dbg.h>
67#include <scsi/scsi_eh.h>
68
69#include "ufs.h"
70#include "ufshci.h"
71
72#define UFSHCD "ufshcd"
73#define UFSHCD_DRIVER_VERSION "0.2"
74
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75struct ufs_hba;
76
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77enum dev_cmd_type {
78 DEV_CMD_TYPE_NOP = 0x0,
68078d5c 79 DEV_CMD_TYPE_QUERY = 0x1,
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80};
81
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82/**
83 * struct uic_command - UIC command structure
84 * @command: UIC command
85 * @argument1: UIC command argument 1
86 * @argument2: UIC command argument 2
87 * @argument3: UIC command argument 3
88 * @cmd_active: Indicate if UIC command is outstanding
89 * @result: UIC command result
6ccf44fe 90 * @done: UIC command completion
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91 */
92struct uic_command {
93 u32 command;
94 u32 argument1;
95 u32 argument2;
96 u32 argument3;
97 int cmd_active;
98 int result;
6ccf44fe 99 struct completion done;
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100};
101
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102/* Used to differentiate the power management options */
103enum ufs_pm_op {
104 UFS_RUNTIME_PM,
105 UFS_SYSTEM_PM,
106 UFS_SHUTDOWN_PM,
107};
108
109#define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM)
110#define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM)
111#define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM)
112
113/* Host <-> Device UniPro Link state */
114enum uic_link_state {
115 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
116 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
117 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
118};
119
120#define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
121#define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
122 UIC_LINK_ACTIVE_STATE)
123#define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
124 UIC_LINK_HIBERN8_STATE)
125#define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
126#define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
127 UIC_LINK_ACTIVE_STATE)
128#define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
129 UIC_LINK_HIBERN8_STATE)
130
131/*
132 * UFS Power management levels.
133 * Each level is in increasing order of power savings.
134 */
135enum ufs_pm_level {
136 UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */
137 UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */
138 UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */
139 UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */
140 UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */
141 UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */
142 UFS_PM_LVL_MAX
143};
144
145struct ufs_pm_lvl_states {
146 enum ufs_dev_pwr_mode dev_state;
147 enum uic_link_state link_state;
148};
149
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150/**
151 * struct ufshcd_lrb - local reference block
152 * @utr_descriptor_ptr: UTRD address of the command
5a0b0cb9 153 * @ucd_req_ptr: UCD address of the command
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154 * @ucd_rsp_ptr: Response UPIU address for this command
155 * @ucd_prdt_ptr: PRDT address of the command
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DR
156 * @utrd_dma_addr: UTRD dma address for debug
157 * @ucd_prdt_dma_addr: PRDT dma address for debug
158 * @ucd_rsp_dma_addr: UPIU response dma address for debug
159 * @ucd_req_dma_addr: UPIU request dma address for debug
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160 * @cmd: pointer to SCSI command
161 * @sense_buffer: pointer to sense buffer address of the SCSI command
162 * @sense_bufflen: Length of the sense buffer
163 * @scsi_status: SCSI status of the command
164 * @command_type: SCSI, UFS, Query.
165 * @task_tag: Task tag of the command
166 * @lun: LUN of the command
5a0b0cb9 167 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
ff8e20c6 168 * @issue_time_stamp: time stamp for debug purposes
e0b299e3 169 * @req_abort_skip: skip request abort task flag
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170 */
171struct ufshcd_lrb {
172 struct utp_transfer_req_desc *utr_descriptor_ptr;
5a0b0cb9 173 struct utp_upiu_req *ucd_req_ptr;
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174 struct utp_upiu_rsp *ucd_rsp_ptr;
175 struct ufshcd_sg_entry *ucd_prdt_ptr;
176
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177 dma_addr_t utrd_dma_addr;
178 dma_addr_t ucd_req_dma_addr;
179 dma_addr_t ucd_rsp_dma_addr;
180 dma_addr_t ucd_prdt_dma_addr;
181
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182 struct scsi_cmnd *cmd;
183 u8 *sense_buffer;
184 unsigned int sense_bufflen;
185 int scsi_status;
186
187 int command_type;
188 int task_tag;
0ce147d4 189 u8 lun; /* UPIU LUN id field is only 8-bit wide */
5a0b0cb9 190 bool intr_cmd;
ff8e20c6 191 ktime_t issue_time_stamp;
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192
193 bool req_abort_skip;
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194};
195
68078d5c 196/**
a230c2f6 197 * struct ufs_query - holds relevant data structures for query request
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198 * @request: request upiu and function
199 * @descriptor: buffer for sending/receiving descriptor
200 * @response: response upiu and response
201 */
202struct ufs_query {
203 struct ufs_query_req request;
204 u8 *descriptor;
205 struct ufs_query_res response;
206};
207
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208/**
209 * struct ufs_dev_cmd - all assosiated fields with device management commands
210 * @type: device management command type - Query, NOP OUT
211 * @lock: lock to allow one command at a time
212 * @complete: internal commands completion
213 * @tag_wq: wait queue until free command slot is available
214 */
215struct ufs_dev_cmd {
216 enum dev_cmd_type type;
217 struct mutex lock;
218 struct completion *complete;
219 wait_queue_head_t tag_wq;
68078d5c 220 struct ufs_query query;
5a0b0cb9 221};
e0eca63e 222
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223/**
224 * struct ufs_clk_info - UFS clock related info
225 * @list: list headed by hba->clk_list_head
226 * @clk: clock node
227 * @name: clock name
228 * @max_freq: maximum frequency supported by the clock
4cff6d99 229 * @min_freq: min frequency that can be used for clock scaling
856b3483 230 * @curr_freq: indicates the current frequency that it is set to
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231 * @enabled: variable to check against multiple enable/disable
232 */
233struct ufs_clk_info {
234 struct list_head list;
235 struct clk *clk;
236 const char *name;
237 u32 max_freq;
4cff6d99 238 u32 min_freq;
856b3483 239 u32 curr_freq;
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240 bool enabled;
241};
242
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243enum ufs_notify_change_status {
244 PRE_CHANGE,
245 POST_CHANGE,
246};
7eb584db
DR
247
248struct ufs_pa_layer_attr {
249 u32 gear_rx;
250 u32 gear_tx;
251 u32 lane_rx;
252 u32 lane_tx;
253 u32 pwr_rx;
254 u32 pwr_tx;
255 u32 hs_rate;
256};
257
258struct ufs_pwr_mode_info {
259 bool is_valid;
260 struct ufs_pa_layer_attr info;
261};
262
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263/**
264 * struct ufs_hba_variant_ops - variant specific callbacks
265 * @name: variant name
266 * @init: called when the driver is initialized
267 * @exit: called to cleanup everything done in init
9949e702 268 * @get_ufs_hci_version: called to get UFS HCI version
856b3483 269 * @clk_scale_notify: notifies that clks are scaled up/down
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270 * @setup_clocks: called before touching any of the controller registers
271 * @setup_regulators: called before accessing the host controller
272 * @hce_enable_notify: called before and after HCE enable bit is set to allow
273 * variant specific Uni-Pro initialization.
274 * @link_startup_notify: called before and after Link startup is carried out
275 * to allow variant specific Uni-Pro initialization.
7eb584db
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276 * @pwr_change_notify: called before and after a power mode change
277 * is carried out to allow vendor spesific capabilities
278 * to be set.
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279 * @setup_xfer_req: called before any transfer request is issued
280 * to set some things
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281 * @setup_task_mgmt: called before any task management request is issued
282 * to set some things
ee32c909 283 * @hibern8_notify: called around hibern8 enter/exit
56d4a186 284 * @apply_dev_quirks: called to apply device specific quirks
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285 * @suspend: called during host controller PM callback
286 * @resume: called during host controller PM callback
6e3fd44d 287 * @dbg_register_dump: used to dump controller debug information
4b9ffb5a 288 * @phy_initialization: used to initialize phys
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289 */
290struct ufs_hba_variant_ops {
291 const char *name;
292 int (*init)(struct ufs_hba *);
293 void (*exit)(struct ufs_hba *);
9949e702 294 u32 (*get_ufs_hci_version)(struct ufs_hba *);
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295 int (*clk_scale_notify)(struct ufs_hba *, bool,
296 enum ufs_notify_change_status);
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297 int (*setup_clocks)(struct ufs_hba *, bool,
298 enum ufs_notify_change_status);
5c0c28a8 299 int (*setup_regulators)(struct ufs_hba *, bool);
f06fcc71
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300 int (*hce_enable_notify)(struct ufs_hba *,
301 enum ufs_notify_change_status);
302 int (*link_startup_notify)(struct ufs_hba *,
303 enum ufs_notify_change_status);
7eb584db 304 int (*pwr_change_notify)(struct ufs_hba *,
f06fcc71
YG
305 enum ufs_notify_change_status status,
306 struct ufs_pa_layer_attr *,
7eb584db 307 struct ufs_pa_layer_attr *);
0e675efa 308 void (*setup_xfer_req)(struct ufs_hba *, int, bool);
d2877be4 309 void (*setup_task_mgmt)(struct ufs_hba *, int, u8);
ee32c909 310 void (*hibern8_notify)(struct ufs_hba *, enum uic_cmd_dme,
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311 enum ufs_notify_change_status);
312 int (*apply_dev_quirks)(struct ufs_hba *);
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313 int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
314 int (*resume)(struct ufs_hba *, enum ufs_pm_op);
6e3fd44d 315 void (*dbg_register_dump)(struct ufs_hba *hba);
4b9ffb5a 316 int (*phy_initialization)(struct ufs_hba *);
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317};
318
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319/* clock gating state */
320enum clk_gating_state {
321 CLKS_OFF,
322 CLKS_ON,
323 REQ_CLKS_OFF,
324 REQ_CLKS_ON,
325};
326
327/**
328 * struct ufs_clk_gating - UFS clock gating related info
329 * @gate_work: worker to turn off clocks after some delay as specified in
330 * delay_ms
331 * @ungate_work: worker to turn on clocks that will be used in case of
332 * interrupt context
333 * @state: the current clocks state
334 * @delay_ms: gating delay in ms
335 * @is_suspended: clk gating is suspended when set to 1 which can be used
336 * during suspend/resume
337 * @delay_attr: sysfs attribute to control delay_attr
b427411a
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338 * @enable_attr: sysfs attribute to enable/disable clock gating
339 * @is_enabled: Indicates the current status of clock gating
1ab27c9c
ST
340 * @active_reqs: number of requests that are pending and should be waited for
341 * completion before gating clocks.
342 */
343struct ufs_clk_gating {
344 struct delayed_work gate_work;
345 struct work_struct ungate_work;
346 enum clk_gating_state state;
347 unsigned long delay_ms;
348 bool is_suspended;
349 struct device_attribute delay_attr;
b427411a
ST
350 struct device_attribute enable_attr;
351 bool is_enabled;
1ab27c9c
ST
352 int active_reqs;
353};
354
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355struct ufs_saved_pwr_info {
356 struct ufs_pa_layer_attr info;
357 bool is_valid;
358};
359
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360/**
361 * struct ufs_clk_scaling - UFS clock scaling related data
362 * @active_reqs: number of requests that are pending. If this is zero when
363 * devfreq ->target() function is called then schedule "suspend_work" to
364 * suspend devfreq.
365 * @tot_busy_t: Total busy time in current polling window
366 * @window_start_t: Start time (in jiffies) of the current polling window
367 * @busy_start_t: Start time of current busy period
368 * @enable_attr: sysfs attribute to enable/disable clock scaling
369 * @saved_pwr_info: UFS power mode may also be changed during scaling and this
370 * one keeps track of previous power mode.
371 * @workq: workqueue to schedule devfreq suspend/resume work
372 * @suspend_work: worker to suspend devfreq
373 * @resume_work: worker to resume devfreq
374 * @is_allowed: tracks if scaling is currently allowed or not
375 * @is_busy_started: tracks if busy period has started or not
376 * @is_suspended: tracks if devfreq is suspended or not
377 */
856b3483 378struct ufs_clk_scaling {
401f1e44
SJ
379 int active_reqs;
380 unsigned long tot_busy_t;
856b3483 381 unsigned long window_start_t;
401f1e44 382 ktime_t busy_start_t;
fcb0c4b0 383 struct device_attribute enable_attr;
a3cd5ec5 384 struct ufs_saved_pwr_info saved_pwr_info;
401f1e44
SJ
385 struct workqueue_struct *workq;
386 struct work_struct suspend_work;
387 struct work_struct resume_work;
388 bool is_allowed;
389 bool is_busy_started;
390 bool is_suspended;
856b3483
ST
391};
392
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YG
393/**
394 * struct ufs_init_prefetch - contains data that is pre-fetched once during
395 * initialization
396 * @icc_level: icc level which was read during initialization
397 */
398struct ufs_init_prefetch {
399 u32 icc_level;
400};
401
ff8e20c6
DR
402#define UIC_ERR_REG_HIST_LENGTH 8
403/**
404 * struct ufs_uic_err_reg_hist - keeps history of uic errors
405 * @pos: index to indicate cyclic buffer position
406 * @reg: cyclic buffer for registers value
407 * @tstamp: cyclic buffer for time stamp
408 */
409struct ufs_uic_err_reg_hist {
410 int pos;
411 u32 reg[UIC_ERR_REG_HIST_LENGTH];
412 ktime_t tstamp[UIC_ERR_REG_HIST_LENGTH];
413};
414
415/**
416 * struct ufs_stats - keeps usage/err statistics
417 * @hibern8_exit_cnt: Counter to keep track of number of exits,
418 * reset this after link-startup.
419 * @last_hibern8_exit_tstamp: Set time after the hibern8 exit.
420 * Clear after the first successful command completion.
421 * @pa_err: tracks pa-uic errors
422 * @dl_err: tracks dl-uic errors
423 * @nl_err: tracks nl-uic errors
424 * @tl_err: tracks tl-uic errors
425 * @dme_err: tracks dme errors
426 */
427struct ufs_stats {
428 u32 hibern8_exit_cnt;
429 ktime_t last_hibern8_exit_tstamp;
430 struct ufs_uic_err_reg_hist pa_err;
431 struct ufs_uic_err_reg_hist dl_err;
432 struct ufs_uic_err_reg_hist nl_err;
433 struct ufs_uic_err_reg_hist tl_err;
434 struct ufs_uic_err_reg_hist dme_err;
435};
436
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437/**
438 * struct ufs_hba - per adapter private structure
439 * @mmio_base: UFSHCI base register address
440 * @ucdl_base_addr: UFS Command Descriptor base address
441 * @utrdl_base_addr: UTP Transfer Request Descriptor base address
442 * @utmrdl_base_addr: UTP Task Management Descriptor base address
443 * @ucdl_dma_addr: UFS Command Descriptor DMA address
444 * @utrdl_dma_addr: UTRDL DMA address
445 * @utmrdl_dma_addr: UTMRDL DMA address
446 * @host: Scsi_Host instance of the driver
447 * @dev: device handle
448 * @lrb: local reference block
5a0b0cb9 449 * @lrb_in_use: lrb in use
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450 * @outstanding_tasks: Bits representing outstanding task requests
451 * @outstanding_reqs: Bits representing outstanding transfer requests
452 * @capabilities: UFS Controller Capabilities
453 * @nutrs: Transfer Request Queue depth supported by controller
454 * @nutmrs: Task Management Queue depth supported by controller
455 * @ufs_version: UFS Version to which controller complies
5c0c28a8
SRT
456 * @vops: pointer to variant specific operations
457 * @priv: pointer to variant specific private data
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458 * @irq: Irq number of the controller
459 * @active_uic_cmd: handle of active UIC command
6ccf44fe 460 * @uic_cmd_mutex: mutex for uic command
e2933132
SRT
461 * @tm_wq: wait queue for task management
462 * @tm_tag_wq: wait queue for free task management slots
463 * @tm_slots_in_use: bit map of task management request slots in use
53b3d9c3 464 * @pwr_done: completion for power mode change
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465 * @tm_condition: condition variable for task management
466 * @ufshcd_state: UFSHCD states
3441da7d 467 * @eh_flags: Error handling flags
2fbd009b 468 * @intr_mask: Interrupt Mask Bits
66ec6d59 469 * @ee_ctrl_mask: Exception event control mask
1d337ec2 470 * @is_powered: flag to check if HBA is powered
3a4bf06d
YG
471 * @is_init_prefetch: flag to check if data was pre-fetched in initialization
472 * @init_prefetch_data: data pre-fetched during initialization
e8e7f271 473 * @eh_work: Worker to handle UFS errors that require s/w attention
66ec6d59 474 * @eeh_work: Worker to handle exception events
e0eca63e 475 * @errors: HBA errors
e8e7f271
SRT
476 * @uic_error: UFS interconnect layer error status
477 * @saved_err: sticky error mask
478 * @saved_uic_err: sticky UIC error mask
5a0b0cb9 479 * @dev_cmd: ufs device management command information
cad2e03d 480 * @last_dme_cmd_tstamp: time stamp of the last completed DME command
66ec6d59 481 * @auto_bkops_enabled: to track whether bkops is enabled in device
aa497613 482 * @vreg_info: UFS device voltage regulator information
c6e79dac 483 * @clk_list_head: UFS host controller clocks list node head
7eb584db
DR
484 * @pwr_info: holds current power mode
485 * @max_pwr_info: keeps the device max valid pwm
afdfff59
YG
486 * @urgent_bkops_lvl: keeps track of urgent bkops level for device
487 * @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for
488 * device is known or not.
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489 */
490struct ufs_hba {
491 void __iomem *mmio_base;
492
493 /* Virtual memory reference */
494 struct utp_transfer_cmd_desc *ucdl_base_addr;
495 struct utp_transfer_req_desc *utrdl_base_addr;
496 struct utp_task_req_desc *utmrdl_base_addr;
497
498 /* DMA memory reference */
499 dma_addr_t ucdl_dma_addr;
500 dma_addr_t utrdl_dma_addr;
501 dma_addr_t utmrdl_dma_addr;
502
503 struct Scsi_Host *host;
504 struct device *dev;
2a8fa600
SJ
505 /*
506 * This field is to keep a reference to "scsi_device" corresponding to
507 * "UFS device" W-LU.
508 */
509 struct scsi_device *sdev_ufs_device;
e0eca63e 510
57d104c1
SJ
511 enum ufs_dev_pwr_mode curr_dev_pwr_mode;
512 enum uic_link_state uic_link_state;
513 /* Desired UFS power management level during runtime PM */
514 enum ufs_pm_level rpm_lvl;
515 /* Desired UFS power management level during system PM */
516 enum ufs_pm_level spm_lvl;
09690d5a
SJ
517 struct device_attribute rpm_lvl_attr;
518 struct device_attribute spm_lvl_attr;
57d104c1
SJ
519 int pm_op_in_progress;
520
e0eca63e 521 struct ufshcd_lrb *lrb;
5a0b0cb9 522 unsigned long lrb_in_use;
e0eca63e
VH
523
524 unsigned long outstanding_tasks;
525 unsigned long outstanding_reqs;
526
527 u32 capabilities;
528 int nutrs;
529 int nutmrs;
530 u32 ufs_version;
5c0c28a8
SRT
531 struct ufs_hba_variant_ops *vops;
532 void *priv;
e0eca63e 533 unsigned int irq;
57d104c1 534 bool is_irq_enabled;
e0eca63e 535
b852190e
YG
536 /* Interrupt aggregation support is broken */
537 #define UFSHCD_QUIRK_BROKEN_INTR_AGGR UFS_BIT(0)
538
cad2e03d
YG
539 /*
540 * delay before each dme command is required as the unipro
541 * layer has shown instabilities
542 */
b852190e
YG
543 #define UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS UFS_BIT(1)
544
7ca38cf3
YG
545 /*
546 * If UFS host controller is having issue in processing LCC (Line
547 * Control Command) coming from device then enable this quirk.
548 * When this quirk is enabled, host controller driver should disable
549 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
550 * attribute of device to 0).
551 */
552 #define UFSHCD_QUIRK_BROKEN_LCC UFS_BIT(2)
cad2e03d 553
c3a2f9ee
YG
554 /*
555 * The attribute PA_RXHSUNTERMCAP specifies whether or not the
556 * inbound Link supports unterminated line in HS mode. Setting this
557 * attribute to 1 fixes moving to HS gear.
558 */
559 #define UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP UFS_BIT(3)
560
874237f7
YG
561 /*
562 * This quirk needs to be enabled if the host contoller only allows
563 * accessing the peer dme attributes in AUTO mode (FAST AUTO or
564 * SLOW AUTO).
565 */
566 #define UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE UFS_BIT(4)
567
9949e702
YG
568 /*
569 * This quirk needs to be enabled if the host contoller doesn't
570 * advertise the correct version in UFS_VER register. If this quirk
571 * is enabled, standard UFS host driver will call the vendor specific
572 * ops (get_ufs_hci_version) to get the correct version.
573 */
574 #define UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION UFS_BIT(5)
575
75b1cc4a
KK
576 /*
577 * This quirk needs to be enabled if the host contoller regards
578 * resolution of the values of PRDTO and PRDTL in UTRD as byte.
579 */
580 #define UFSHCD_QUIRK_PRDT_BYTE_GRAN UFS_BIT(7)
581
cad2e03d 582 unsigned int quirks; /* Deviations from standard UFSHCI spec. */
6ccf44fe 583
c58ab7aa
YG
584 /* Device deviations from standard UFS device spec. */
585 unsigned int dev_quirks;
586
e2933132
SRT
587 wait_queue_head_t tm_wq;
588 wait_queue_head_t tm_tag_wq;
e0eca63e 589 unsigned long tm_condition;
e2933132 590 unsigned long tm_slots_in_use;
e0eca63e 591
57d104c1
SJ
592 struct uic_command *active_uic_cmd;
593 struct mutex uic_cmd_mutex;
594 struct completion *uic_async_done;
53b3d9c3 595
e0eca63e 596 u32 ufshcd_state;
3441da7d 597 u32 eh_flags;
2fbd009b 598 u32 intr_mask;
66ec6d59 599 u16 ee_ctrl_mask;
1d337ec2 600 bool is_powered;
3a4bf06d
YG
601 bool is_init_prefetch;
602 struct ufs_init_prefetch init_prefetch_data;
e0eca63e
VH
603
604 /* Work Queues */
e8e7f271 605 struct work_struct eh_work;
66ec6d59 606 struct work_struct eeh_work;
e0eca63e
VH
607
608 /* HBA Errors */
609 u32 errors;
e8e7f271
SRT
610 u32 uic_error;
611 u32 saved_err;
612 u32 saved_uic_err;
ff8e20c6 613 struct ufs_stats ufs_stats;
5a0b0cb9
SRT
614
615 /* Device management request data */
616 struct ufs_dev_cmd dev_cmd;
cad2e03d 617 ktime_t last_dme_cmd_tstamp;
66ec6d59 618
57d104c1
SJ
619 /* Keeps information of the UFS device connected to this host */
620 struct ufs_dev_info dev_info;
66ec6d59 621 bool auto_bkops_enabled;
aa497613 622 struct ufs_vreg_info vreg_info;
c6e79dac 623 struct list_head clk_list_head;
57d104c1
SJ
624
625 bool wlun_dev_clr_ua;
7eb584db 626
7fabb77b
GB
627 /* Number of requests aborts */
628 int req_abort_count;
629
54b879b7
YG
630 /* Number of lanes available (1 or 2) for Rx/Tx */
631 u32 lanes_per_direction;
7eb584db
DR
632 struct ufs_pa_layer_attr pwr_info;
633 struct ufs_pwr_mode_info max_pwr_info;
1ab27c9c
ST
634
635 struct ufs_clk_gating clk_gating;
636 /* Control to enable/disable host capabilities */
637 u32 caps;
638 /* Allow dynamic clk gating */
639#define UFSHCD_CAP_CLK_GATING (1 << 0)
640 /* Allow hiberb8 with clk gating */
641#define UFSHCD_CAP_HIBERN8_WITH_CLK_GATING (1 << 1)
856b3483
ST
642 /* Allow dynamic clk scaling */
643#define UFSHCD_CAP_CLK_SCALING (1 << 2)
374a246e
SJ
644 /* Allow auto bkops to enabled during runtime suspend */
645#define UFSHCD_CAP_AUTO_BKOPS_SUSPEND (1 << 3)
b852190e
YG
646 /*
647 * This capability allows host controller driver to use the UFS HCI's
648 * interrupt aggregation capability.
649 * CAUTION: Enabling this might reduce overall UFS throughput.
650 */
651#define UFSHCD_CAP_INTR_AGGR (1 << 4)
4e768e76
SJ
652 /*
653 * This capability allows the device auto-bkops to be always enabled
654 * except during suspend (both runtime and suspend).
655 * Enabling this capability means that device will always be allowed
656 * to do background operation when it's active but it might degrade
657 * the performance of ongoing read/write operations.
658 */
659#define UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND (1 << 5)
856b3483
ST
660
661 struct devfreq *devfreq;
662 struct ufs_clk_scaling clk_scaling;
e785060e 663 bool is_sys_suspended;
afdfff59
YG
664
665 enum bkops_status urgent_bkops_lvl;
666 bool is_urgent_bkops_lvl_checked;
a3cd5ec5
SJ
667
668 struct rw_semaphore clk_scaling_lock;
e0eca63e
VH
669};
670
1ab27c9c
ST
671/* Returns true if clocks can be gated. Otherwise false */
672static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
673{
674 return hba->caps & UFSHCD_CAP_CLK_GATING;
675}
676static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
677{
678 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
679}
fcb0c4b0 680static inline int ufshcd_is_clkscaling_supported(struct ufs_hba *hba)
856b3483
ST
681{
682 return hba->caps & UFSHCD_CAP_CLK_SCALING;
683}
374a246e
SJ
684static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
685{
686 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
687}
688
b852190e
YG
689static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
690{
4b9ffb5a
JP
691/* DWC UFS Core has the Interrupt aggregation feature but is not detectable*/
692#ifndef CONFIG_SCSI_UFS_DWC
b852190e
YG
693 if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
694 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
695 return true;
696 else
697 return false;
4b9ffb5a
JP
698#else
699return true;
700#endif
b852190e
YG
701}
702
b873a275
SJ
703#define ufshcd_writel(hba, val, reg) \
704 writel((val), (hba)->mmio_base + (reg))
705#define ufshcd_readl(hba, reg) \
706 readl((hba)->mmio_base + (reg))
707
e785060e
DR
708/**
709 * ufshcd_rmwl - read modify write into a register
710 * @hba - per adapter instance
711 * @mask - mask to apply on read value
712 * @val - actual value to write
713 * @reg - register address
714 */
715static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
716{
717 u32 tmp;
718
719 tmp = ufshcd_readl(hba, reg);
720 tmp &= ~mask;
721 tmp |= (val & mask);
722 ufshcd_writel(hba, tmp, reg);
723}
724
5c0c28a8 725int ufshcd_alloc_host(struct device *, struct ufs_hba **);
47555a5c 726void ufshcd_dealloc_host(struct ufs_hba *);
5c0c28a8 727int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int);
e0eca63e 728void ufshcd_remove(struct ufs_hba *);
596585a2
YG
729int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
730 u32 val, unsigned long interval_us,
731 unsigned long timeout_ms, bool can_sleep);
e0eca63e 732
68078d5c
DR
733static inline void check_upiu_size(void)
734{
735 BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
736 GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
737}
738
1ce5898a
YG
739/**
740 * ufshcd_set_variant - set variant specific data to the hba
741 * @hba - per adapter instance
742 * @variant - pointer to variant specific data
743 */
744static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
745{
746 BUG_ON(!hba);
747 hba->priv = variant;
748}
749
750/**
751 * ufshcd_get_variant - get variant specific data from the hba
752 * @hba - per adapter instance
753 */
754static inline void *ufshcd_get_variant(struct ufs_hba *hba)
755{
756 BUG_ON(!hba);
757 return hba->priv;
758}
4e768e76
SJ
759static inline bool ufshcd_keep_autobkops_enabled_except_suspend(
760 struct ufs_hba *hba)
761{
762 return hba->caps & UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND;
763}
1ce5898a 764
66ec6d59
SRT
765extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
766extern int ufshcd_runtime_resume(struct ufs_hba *hba);
767extern int ufshcd_runtime_idle(struct ufs_hba *hba);
57d104c1
SJ
768extern int ufshcd_system_suspend(struct ufs_hba *hba);
769extern int ufshcd_system_resume(struct ufs_hba *hba);
770extern int ufshcd_shutdown(struct ufs_hba *hba);
12b4fdb4
SJ
771extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
772 u8 attr_set, u32 mib_val, u8 peer);
773extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
774 u32 *mib_val, u8 peer);
775
776/* UIC command interfaces for DME primitives */
777#define DME_LOCAL 0
778#define DME_PEER 1
779#define ATTR_SET_NOR 0 /* NORMAL */
780#define ATTR_SET_ST 1 /* STATIC */
781
782static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
783 u32 mib_val)
784{
785 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
786 mib_val, DME_LOCAL);
787}
788
789static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
790 u32 mib_val)
791{
792 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
793 mib_val, DME_LOCAL);
794}
795
796static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
797 u32 mib_val)
798{
799 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
800 mib_val, DME_PEER);
801}
802
803static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
804 u32 mib_val)
805{
806 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
807 mib_val, DME_PEER);
808}
809
810static inline int ufshcd_dme_get(struct ufs_hba *hba,
811 u32 attr_sel, u32 *mib_val)
812{
813 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
814}
815
816static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
817 u32 attr_sel, u32 *mib_val)
818{
819 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
820}
821
f37aabcf
YG
822static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info)
823{
824 return (pwr_info->pwr_rx == FAST_MODE ||
825 pwr_info->pwr_rx == FASTAUTO_MODE) &&
826 (pwr_info->pwr_tx == FAST_MODE ||
827 pwr_info->pwr_tx == FASTAUTO_MODE);
828}
829
dc3c8d3a
YG
830/* Expose Query-Request API */
831int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
832 enum flag_idn idn, bool *flag_res);
1ab27c9c
ST
833int ufshcd_hold(struct ufs_hba *hba, bool async);
834void ufshcd_release(struct ufs_hba *hba);
37113106 835u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba);
0263bcd0
YG
836
837/* Wrapper functions for safely calling variant operations */
838static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
839{
840 if (hba->vops)
841 return hba->vops->name;
842 return "";
843}
844
845static inline int ufshcd_vops_init(struct ufs_hba *hba)
846{
847 if (hba->vops && hba->vops->init)
848 return hba->vops->init(hba);
849
850 return 0;
851}
852
853static inline void ufshcd_vops_exit(struct ufs_hba *hba)
854{
855 if (hba->vops && hba->vops->exit)
856 return hba->vops->exit(hba);
857}
858
859static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
860{
861 if (hba->vops && hba->vops->get_ufs_hci_version)
862 return hba->vops->get_ufs_hci_version(hba);
863
864 return ufshcd_readl(hba, REG_UFS_VERSION);
865}
866
f06fcc71
YG
867static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
868 bool up, enum ufs_notify_change_status status)
0263bcd0
YG
869{
870 if (hba->vops && hba->vops->clk_scale_notify)
f06fcc71
YG
871 return hba->vops->clk_scale_notify(hba, up, status);
872 return 0;
0263bcd0
YG
873}
874
1e879e8f
SJ
875static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on,
876 enum ufs_notify_change_status status)
0263bcd0
YG
877{
878 if (hba->vops && hba->vops->setup_clocks)
1e879e8f 879 return hba->vops->setup_clocks(hba, on, status);
0263bcd0
YG
880 return 0;
881}
882
883static inline int ufshcd_vops_setup_regulators(struct ufs_hba *hba, bool status)
884{
885 if (hba->vops && hba->vops->setup_regulators)
886 return hba->vops->setup_regulators(hba, status);
887
888 return 0;
889}
890
891static inline int ufshcd_vops_hce_enable_notify(struct ufs_hba *hba,
892 bool status)
893{
894 if (hba->vops && hba->vops->hce_enable_notify)
895 return hba->vops->hce_enable_notify(hba, status);
896
897 return 0;
898}
899static inline int ufshcd_vops_link_startup_notify(struct ufs_hba *hba,
900 bool status)
901{
902 if (hba->vops && hba->vops->link_startup_notify)
903 return hba->vops->link_startup_notify(hba, status);
904
905 return 0;
906}
907
908static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
909 bool status,
910 struct ufs_pa_layer_attr *dev_max_params,
911 struct ufs_pa_layer_attr *dev_req_params)
912{
913 if (hba->vops && hba->vops->pwr_change_notify)
914 return hba->vops->pwr_change_notify(hba, status,
915 dev_max_params, dev_req_params);
916
917 return -ENOTSUPP;
918}
919
0e675efa
KK
920static inline void ufshcd_vops_setup_xfer_req(struct ufs_hba *hba, int tag,
921 bool is_scsi_cmd)
922{
923 if (hba->vops && hba->vops->setup_xfer_req)
924 return hba->vops->setup_xfer_req(hba, tag, is_scsi_cmd);
925}
926
d2877be4
KK
927static inline void ufshcd_vops_setup_task_mgmt(struct ufs_hba *hba,
928 int tag, u8 tm_function)
929{
930 if (hba->vops && hba->vops->setup_task_mgmt)
931 return hba->vops->setup_task_mgmt(hba, tag, tm_function);
932}
933
ee32c909
KK
934static inline void ufshcd_vops_hibern8_notify(struct ufs_hba *hba,
935 enum uic_cmd_dme cmd,
936 enum ufs_notify_change_status status)
937{
938 if (hba->vops && hba->vops->hibern8_notify)
939 return hba->vops->hibern8_notify(hba, cmd, status);
940}
941
56d4a186
SJ
942static inline int ufshcd_vops_apply_dev_quirks(struct ufs_hba *hba)
943{
944 if (hba->vops && hba->vops->apply_dev_quirks)
945 return hba->vops->apply_dev_quirks(hba);
946 return 0;
947}
948
0263bcd0
YG
949static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op)
950{
951 if (hba->vops && hba->vops->suspend)
952 return hba->vops->suspend(hba, op);
953
954 return 0;
955}
956
957static inline int ufshcd_vops_resume(struct ufs_hba *hba, enum ufs_pm_op op)
958{
959 if (hba->vops && hba->vops->resume)
960 return hba->vops->resume(hba, op);
961
962 return 0;
963}
964
6e3fd44d
YG
965static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba)
966{
967 if (hba->vops && hba->vops->dbg_register_dump)
968 hba->vops->dbg_register_dump(hba);
969}
970
e0eca63e 971#endif /* End of Header */