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ufs: Add support for clock gating
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CommitLineData
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1/*
2 * Universal Flash Storage Host controller driver
3 *
4 * This code is based on drivers/scsi/ufs/ufshcd.h
5 * Copyright (C) 2011-2013 Samsung India Software Operations
6 *
7 * Authors:
8 * Santosh Yaraganavi <santosh.sy@samsung.com>
9 * Vinayak Holikatti <h.vinayak@samsung.com>
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version 2
14 * of the License, or (at your option) any later version.
15 * See the COPYING file in the top-level directory or visit
16 * <http://www.gnu.org/licenses/gpl-2.0.html>
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * This program is provided "AS IS" and "WITH ALL FAULTS" and
24 * without warranty of any kind. You are solely responsible for
25 * determining the appropriateness of using and distributing
26 * the program and assume all risks associated with your exercise
27 * of rights with respect to the program, including but not limited
28 * to infringement of third party rights, the risks and costs of
29 * program errors, damage to or loss of data, programs or equipment,
30 * and unavailability or interruption of operations. Under no
31 * circumstances will the contributor of this Program be liable for
32 * any damages of any kind arising from your use or distribution of
33 * this program.
34 */
35
36#ifndef _UFSHCD_H
37#define _UFSHCD_H
38
39#include <linux/module.h>
40#include <linux/kernel.h>
41#include <linux/init.h>
42#include <linux/interrupt.h>
43#include <linux/io.h>
44#include <linux/delay.h>
45#include <linux/slab.h>
46#include <linux/spinlock.h>
47#include <linux/workqueue.h>
48#include <linux/errno.h>
49#include <linux/types.h>
50#include <linux/wait.h>
51#include <linux/bitops.h>
52#include <linux/pm_runtime.h>
53#include <linux/clk.h>
6ccf44fe 54#include <linux/completion.h>
aa497613 55#include <linux/regulator/consumer.h>
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56
57#include <asm/irq.h>
58#include <asm/byteorder.h>
59#include <scsi/scsi.h>
60#include <scsi/scsi_cmnd.h>
61#include <scsi/scsi_host.h>
62#include <scsi/scsi_tcq.h>
63#include <scsi/scsi_dbg.h>
64#include <scsi/scsi_eh.h>
65
66#include "ufs.h"
67#include "ufshci.h"
68
69#define UFSHCD "ufshcd"
70#define UFSHCD_DRIVER_VERSION "0.2"
71
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72struct ufs_hba;
73
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74enum dev_cmd_type {
75 DEV_CMD_TYPE_NOP = 0x0,
68078d5c 76 DEV_CMD_TYPE_QUERY = 0x1,
5a0b0cb9
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77};
78
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79/**
80 * struct uic_command - UIC command structure
81 * @command: UIC command
82 * @argument1: UIC command argument 1
83 * @argument2: UIC command argument 2
84 * @argument3: UIC command argument 3
85 * @cmd_active: Indicate if UIC command is outstanding
86 * @result: UIC command result
6ccf44fe 87 * @done: UIC command completion
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88 */
89struct uic_command {
90 u32 command;
91 u32 argument1;
92 u32 argument2;
93 u32 argument3;
94 int cmd_active;
95 int result;
6ccf44fe 96 struct completion done;
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97};
98
57d104c1
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99/* Used to differentiate the power management options */
100enum ufs_pm_op {
101 UFS_RUNTIME_PM,
102 UFS_SYSTEM_PM,
103 UFS_SHUTDOWN_PM,
104};
105
106#define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM)
107#define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM)
108#define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM)
109
110/* Host <-> Device UniPro Link state */
111enum uic_link_state {
112 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
113 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
114 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
115};
116
117#define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
118#define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
119 UIC_LINK_ACTIVE_STATE)
120#define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
121 UIC_LINK_HIBERN8_STATE)
122#define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
123#define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
124 UIC_LINK_ACTIVE_STATE)
125#define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
126 UIC_LINK_HIBERN8_STATE)
127
128/*
129 * UFS Power management levels.
130 * Each level is in increasing order of power savings.
131 */
132enum ufs_pm_level {
133 UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */
134 UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */
135 UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */
136 UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */
137 UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */
138 UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */
139 UFS_PM_LVL_MAX
140};
141
142struct ufs_pm_lvl_states {
143 enum ufs_dev_pwr_mode dev_state;
144 enum uic_link_state link_state;
145};
146
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147/**
148 * struct ufshcd_lrb - local reference block
149 * @utr_descriptor_ptr: UTRD address of the command
5a0b0cb9 150 * @ucd_req_ptr: UCD address of the command
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151 * @ucd_rsp_ptr: Response UPIU address for this command
152 * @ucd_prdt_ptr: PRDT address of the command
153 * @cmd: pointer to SCSI command
154 * @sense_buffer: pointer to sense buffer address of the SCSI command
155 * @sense_bufflen: Length of the sense buffer
156 * @scsi_status: SCSI status of the command
157 * @command_type: SCSI, UFS, Query.
158 * @task_tag: Task tag of the command
159 * @lun: LUN of the command
5a0b0cb9 160 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
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161 */
162struct ufshcd_lrb {
163 struct utp_transfer_req_desc *utr_descriptor_ptr;
5a0b0cb9 164 struct utp_upiu_req *ucd_req_ptr;
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165 struct utp_upiu_rsp *ucd_rsp_ptr;
166 struct ufshcd_sg_entry *ucd_prdt_ptr;
167
168 struct scsi_cmnd *cmd;
169 u8 *sense_buffer;
170 unsigned int sense_bufflen;
171 int scsi_status;
172
173 int command_type;
174 int task_tag;
0ce147d4 175 u8 lun; /* UPIU LUN id field is only 8-bit wide */
5a0b0cb9 176 bool intr_cmd;
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177};
178
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DR
179/**
180 * struct ufs_query - holds relevent data structures for query request
181 * @request: request upiu and function
182 * @descriptor: buffer for sending/receiving descriptor
183 * @response: response upiu and response
184 */
185struct ufs_query {
186 struct ufs_query_req request;
187 u8 *descriptor;
188 struct ufs_query_res response;
189};
190
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191/**
192 * struct ufs_dev_cmd - all assosiated fields with device management commands
193 * @type: device management command type - Query, NOP OUT
194 * @lock: lock to allow one command at a time
195 * @complete: internal commands completion
196 * @tag_wq: wait queue until free command slot is available
197 */
198struct ufs_dev_cmd {
199 enum dev_cmd_type type;
200 struct mutex lock;
201 struct completion *complete;
202 wait_queue_head_t tag_wq;
68078d5c 203 struct ufs_query query;
5a0b0cb9 204};
e0eca63e 205
c6e79dac
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206/**
207 * struct ufs_clk_info - UFS clock related info
208 * @list: list headed by hba->clk_list_head
209 * @clk: clock node
210 * @name: clock name
211 * @max_freq: maximum frequency supported by the clock
212 * @enabled: variable to check against multiple enable/disable
213 */
214struct ufs_clk_info {
215 struct list_head list;
216 struct clk *clk;
217 const char *name;
218 u32 max_freq;
219 bool enabled;
220};
221
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222#define PRE_CHANGE 0
223#define POST_CHANGE 1
7eb584db
DR
224
225struct ufs_pa_layer_attr {
226 u32 gear_rx;
227 u32 gear_tx;
228 u32 lane_rx;
229 u32 lane_tx;
230 u32 pwr_rx;
231 u32 pwr_tx;
232 u32 hs_rate;
233};
234
235struct ufs_pwr_mode_info {
236 bool is_valid;
237 struct ufs_pa_layer_attr info;
238};
239
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240/**
241 * struct ufs_hba_variant_ops - variant specific callbacks
242 * @name: variant name
243 * @init: called when the driver is initialized
244 * @exit: called to cleanup everything done in init
245 * @setup_clocks: called before touching any of the controller registers
246 * @setup_regulators: called before accessing the host controller
247 * @hce_enable_notify: called before and after HCE enable bit is set to allow
248 * variant specific Uni-Pro initialization.
249 * @link_startup_notify: called before and after Link startup is carried out
250 * to allow variant specific Uni-Pro initialization.
7eb584db
DR
251 * @pwr_change_notify: called before and after a power mode change
252 * is carried out to allow vendor spesific capabilities
253 * to be set.
57d104c1
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254 * @suspend: called during host controller PM callback
255 * @resume: called during host controller PM callback
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256 */
257struct ufs_hba_variant_ops {
258 const char *name;
259 int (*init)(struct ufs_hba *);
260 void (*exit)(struct ufs_hba *);
261 int (*setup_clocks)(struct ufs_hba *, bool);
262 int (*setup_regulators)(struct ufs_hba *, bool);
263 int (*hce_enable_notify)(struct ufs_hba *, bool);
264 int (*link_startup_notify)(struct ufs_hba *, bool);
7eb584db
DR
265 int (*pwr_change_notify)(struct ufs_hba *,
266 bool, struct ufs_pa_layer_attr *,
267 struct ufs_pa_layer_attr *);
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268 int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
269 int (*resume)(struct ufs_hba *, enum ufs_pm_op);
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270};
271
1ab27c9c
ST
272/* clock gating state */
273enum clk_gating_state {
274 CLKS_OFF,
275 CLKS_ON,
276 REQ_CLKS_OFF,
277 REQ_CLKS_ON,
278};
279
280/**
281 * struct ufs_clk_gating - UFS clock gating related info
282 * @gate_work: worker to turn off clocks after some delay as specified in
283 * delay_ms
284 * @ungate_work: worker to turn on clocks that will be used in case of
285 * interrupt context
286 * @state: the current clocks state
287 * @delay_ms: gating delay in ms
288 * @is_suspended: clk gating is suspended when set to 1 which can be used
289 * during suspend/resume
290 * @delay_attr: sysfs attribute to control delay_attr
291 * @active_reqs: number of requests that are pending and should be waited for
292 * completion before gating clocks.
293 */
294struct ufs_clk_gating {
295 struct delayed_work gate_work;
296 struct work_struct ungate_work;
297 enum clk_gating_state state;
298 unsigned long delay_ms;
299 bool is_suspended;
300 struct device_attribute delay_attr;
301 int active_reqs;
302};
303
3a4bf06d
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304/**
305 * struct ufs_init_prefetch - contains data that is pre-fetched once during
306 * initialization
307 * @icc_level: icc level which was read during initialization
308 */
309struct ufs_init_prefetch {
310 u32 icc_level;
311};
312
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313/**
314 * struct ufs_hba - per adapter private structure
315 * @mmio_base: UFSHCI base register address
316 * @ucdl_base_addr: UFS Command Descriptor base address
317 * @utrdl_base_addr: UTP Transfer Request Descriptor base address
318 * @utmrdl_base_addr: UTP Task Management Descriptor base address
319 * @ucdl_dma_addr: UFS Command Descriptor DMA address
320 * @utrdl_dma_addr: UTRDL DMA address
321 * @utmrdl_dma_addr: UTMRDL DMA address
322 * @host: Scsi_Host instance of the driver
323 * @dev: device handle
324 * @lrb: local reference block
5a0b0cb9 325 * @lrb_in_use: lrb in use
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326 * @outstanding_tasks: Bits representing outstanding task requests
327 * @outstanding_reqs: Bits representing outstanding transfer requests
328 * @capabilities: UFS Controller Capabilities
329 * @nutrs: Transfer Request Queue depth supported by controller
330 * @nutmrs: Task Management Queue depth supported by controller
331 * @ufs_version: UFS Version to which controller complies
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332 * @vops: pointer to variant specific operations
333 * @priv: pointer to variant specific private data
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334 * @irq: Irq number of the controller
335 * @active_uic_cmd: handle of active UIC command
6ccf44fe 336 * @uic_cmd_mutex: mutex for uic command
e2933132
SRT
337 * @tm_wq: wait queue for task management
338 * @tm_tag_wq: wait queue for free task management slots
339 * @tm_slots_in_use: bit map of task management request slots in use
53b3d9c3 340 * @pwr_done: completion for power mode change
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341 * @tm_condition: condition variable for task management
342 * @ufshcd_state: UFSHCD states
3441da7d 343 * @eh_flags: Error handling flags
2fbd009b 344 * @intr_mask: Interrupt Mask Bits
66ec6d59 345 * @ee_ctrl_mask: Exception event control mask
1d337ec2 346 * @is_powered: flag to check if HBA is powered
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347 * @is_init_prefetch: flag to check if data was pre-fetched in initialization
348 * @init_prefetch_data: data pre-fetched during initialization
e8e7f271 349 * @eh_work: Worker to handle UFS errors that require s/w attention
66ec6d59 350 * @eeh_work: Worker to handle exception events
e0eca63e 351 * @errors: HBA errors
e8e7f271
SRT
352 * @uic_error: UFS interconnect layer error status
353 * @saved_err: sticky error mask
354 * @saved_uic_err: sticky UIC error mask
5a0b0cb9 355 * @dev_cmd: ufs device management command information
66ec6d59 356 * @auto_bkops_enabled: to track whether bkops is enabled in device
aa497613 357 * @vreg_info: UFS device voltage regulator information
c6e79dac 358 * @clk_list_head: UFS host controller clocks list node head
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DR
359 * @pwr_info: holds current power mode
360 * @max_pwr_info: keeps the device max valid pwm
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361 */
362struct ufs_hba {
363 void __iomem *mmio_base;
364
365 /* Virtual memory reference */
366 struct utp_transfer_cmd_desc *ucdl_base_addr;
367 struct utp_transfer_req_desc *utrdl_base_addr;
368 struct utp_task_req_desc *utmrdl_base_addr;
369
370 /* DMA memory reference */
371 dma_addr_t ucdl_dma_addr;
372 dma_addr_t utrdl_dma_addr;
373 dma_addr_t utmrdl_dma_addr;
374
375 struct Scsi_Host *host;
376 struct device *dev;
2a8fa600
SJ
377 /*
378 * This field is to keep a reference to "scsi_device" corresponding to
379 * "UFS device" W-LU.
380 */
381 struct scsi_device *sdev_ufs_device;
382 struct scsi_device *sdev_rpmb;
383 struct scsi_device *sdev_boot;
e0eca63e 384
57d104c1
SJ
385 enum ufs_dev_pwr_mode curr_dev_pwr_mode;
386 enum uic_link_state uic_link_state;
387 /* Desired UFS power management level during runtime PM */
388 enum ufs_pm_level rpm_lvl;
389 /* Desired UFS power management level during system PM */
390 enum ufs_pm_level spm_lvl;
391 int pm_op_in_progress;
392
e0eca63e 393 struct ufshcd_lrb *lrb;
5a0b0cb9 394 unsigned long lrb_in_use;
e0eca63e
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395
396 unsigned long outstanding_tasks;
397 unsigned long outstanding_reqs;
398
399 u32 capabilities;
400 int nutrs;
401 int nutmrs;
402 u32 ufs_version;
5c0c28a8
SRT
403 struct ufs_hba_variant_ops *vops;
404 void *priv;
e0eca63e 405 unsigned int irq;
57d104c1 406 bool is_irq_enabled;
e0eca63e 407
6ccf44fe 408
e2933132
SRT
409 wait_queue_head_t tm_wq;
410 wait_queue_head_t tm_tag_wq;
e0eca63e 411 unsigned long tm_condition;
e2933132 412 unsigned long tm_slots_in_use;
e0eca63e 413
57d104c1
SJ
414 struct uic_command *active_uic_cmd;
415 struct mutex uic_cmd_mutex;
416 struct completion *uic_async_done;
53b3d9c3 417
e0eca63e 418 u32 ufshcd_state;
3441da7d 419 u32 eh_flags;
2fbd009b 420 u32 intr_mask;
66ec6d59 421 u16 ee_ctrl_mask;
1d337ec2 422 bool is_powered;
3a4bf06d
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423 bool is_init_prefetch;
424 struct ufs_init_prefetch init_prefetch_data;
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425
426 /* Work Queues */
e8e7f271 427 struct work_struct eh_work;
66ec6d59 428 struct work_struct eeh_work;
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VH
429
430 /* HBA Errors */
431 u32 errors;
e8e7f271
SRT
432 u32 uic_error;
433 u32 saved_err;
434 u32 saved_uic_err;
5a0b0cb9
SRT
435
436 /* Device management request data */
437 struct ufs_dev_cmd dev_cmd;
66ec6d59 438
57d104c1
SJ
439 /* Keeps information of the UFS device connected to this host */
440 struct ufs_dev_info dev_info;
66ec6d59 441 bool auto_bkops_enabled;
aa497613 442 struct ufs_vreg_info vreg_info;
c6e79dac 443 struct list_head clk_list_head;
57d104c1
SJ
444
445 bool wlun_dev_clr_ua;
7eb584db
DR
446
447 struct ufs_pa_layer_attr pwr_info;
448 struct ufs_pwr_mode_info max_pwr_info;
1ab27c9c
ST
449
450 struct ufs_clk_gating clk_gating;
451 /* Control to enable/disable host capabilities */
452 u32 caps;
453 /* Allow dynamic clk gating */
454#define UFSHCD_CAP_CLK_GATING (1 << 0)
455 /* Allow hiberb8 with clk gating */
456#define UFSHCD_CAP_HIBERN8_WITH_CLK_GATING (1 << 1)
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VH
457};
458
1ab27c9c
ST
459/* Returns true if clocks can be gated. Otherwise false */
460static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
461{
462 return hba->caps & UFSHCD_CAP_CLK_GATING;
463}
464static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
465{
466 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
467}
b873a275
SJ
468#define ufshcd_writel(hba, val, reg) \
469 writel((val), (hba)->mmio_base + (reg))
470#define ufshcd_readl(hba, reg) \
471 readl((hba)->mmio_base + (reg))
472
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SRT
473int ufshcd_alloc_host(struct device *, struct ufs_hba **);
474int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int);
e0eca63e
VH
475void ufshcd_remove(struct ufs_hba *);
476
477/**
478 * ufshcd_hba_stop - Send controller to reset state
479 * @hba: per adapter instance
480 */
481static inline void ufshcd_hba_stop(struct ufs_hba *hba)
482{
b873a275 483 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
e0eca63e
VH
484}
485
68078d5c
DR
486static inline void check_upiu_size(void)
487{
488 BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
489 GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
490}
491
66ec6d59
SRT
492extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
493extern int ufshcd_runtime_resume(struct ufs_hba *hba);
494extern int ufshcd_runtime_idle(struct ufs_hba *hba);
57d104c1
SJ
495extern int ufshcd_system_suspend(struct ufs_hba *hba);
496extern int ufshcd_system_resume(struct ufs_hba *hba);
497extern int ufshcd_shutdown(struct ufs_hba *hba);
12b4fdb4
SJ
498extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
499 u8 attr_set, u32 mib_val, u8 peer);
500extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
501 u32 *mib_val, u8 peer);
502
503/* UIC command interfaces for DME primitives */
504#define DME_LOCAL 0
505#define DME_PEER 1
506#define ATTR_SET_NOR 0 /* NORMAL */
507#define ATTR_SET_ST 1 /* STATIC */
508
509static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
510 u32 mib_val)
511{
512 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
513 mib_val, DME_LOCAL);
514}
515
516static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
517 u32 mib_val)
518{
519 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
520 mib_val, DME_LOCAL);
521}
522
523static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
524 u32 mib_val)
525{
526 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
527 mib_val, DME_PEER);
528}
529
530static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
531 u32 mib_val)
532{
533 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
534 mib_val, DME_PEER);
535}
536
537static inline int ufshcd_dme_get(struct ufs_hba *hba,
538 u32 attr_sel, u32 *mib_val)
539{
540 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
541}
542
543static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
544 u32 attr_sel, u32 *mib_val)
545{
546 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
547}
548
1ab27c9c
ST
549int ufshcd_hold(struct ufs_hba *hba, bool async);
550void ufshcd_release(struct ufs_hba *hba);
e0eca63e 551#endif /* End of Header */