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1/*
2 * Universal Flash Storage Host controller driver
3 *
4 * This code is based on drivers/scsi/ufs/ufshcd.h
5 * Copyright (C) 2011-2013 Samsung India Software Operations
dc3c8d3a 6 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
e0eca63e
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7 *
8 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
35 */
36
37#ifndef _UFSHCD_H
38#define _UFSHCD_H
39
40#include <linux/module.h>
41#include <linux/kernel.h>
42#include <linux/init.h>
43#include <linux/interrupt.h>
44#include <linux/io.h>
45#include <linux/delay.h>
46#include <linux/slab.h>
47#include <linux/spinlock.h>
a3cd5ec5 48#include <linux/rwsem.h>
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49#include <linux/workqueue.h>
50#include <linux/errno.h>
51#include <linux/types.h>
52#include <linux/wait.h>
53#include <linux/bitops.h>
54#include <linux/pm_runtime.h>
55#include <linux/clk.h>
6ccf44fe 56#include <linux/completion.h>
aa497613 57#include <linux/regulator/consumer.h>
f37aabcf 58#include "unipro.h"
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59
60#include <asm/irq.h>
61#include <asm/byteorder.h>
62#include <scsi/scsi.h>
63#include <scsi/scsi_cmnd.h>
64#include <scsi/scsi_host.h>
65#include <scsi/scsi_tcq.h>
66#include <scsi/scsi_dbg.h>
67#include <scsi/scsi_eh.h>
68
69#include "ufs.h"
70#include "ufshci.h"
71
72#define UFSHCD "ufshcd"
73#define UFSHCD_DRIVER_VERSION "0.2"
74
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75struct ufs_hba;
76
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77enum dev_cmd_type {
78 DEV_CMD_TYPE_NOP = 0x0,
68078d5c 79 DEV_CMD_TYPE_QUERY = 0x1,
5a0b0cb9
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80};
81
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82/**
83 * struct uic_command - UIC command structure
84 * @command: UIC command
85 * @argument1: UIC command argument 1
86 * @argument2: UIC command argument 2
87 * @argument3: UIC command argument 3
88 * @cmd_active: Indicate if UIC command is outstanding
89 * @result: UIC command result
6ccf44fe 90 * @done: UIC command completion
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91 */
92struct uic_command {
93 u32 command;
94 u32 argument1;
95 u32 argument2;
96 u32 argument3;
97 int cmd_active;
98 int result;
6ccf44fe 99 struct completion done;
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100};
101
57d104c1
SJ
102/* Used to differentiate the power management options */
103enum ufs_pm_op {
104 UFS_RUNTIME_PM,
105 UFS_SYSTEM_PM,
106 UFS_SHUTDOWN_PM,
107};
108
109#define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM)
110#define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM)
111#define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM)
112
113/* Host <-> Device UniPro Link state */
114enum uic_link_state {
115 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
116 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
117 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
118};
119
120#define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
121#define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
122 UIC_LINK_ACTIVE_STATE)
123#define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
124 UIC_LINK_HIBERN8_STATE)
125#define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
126#define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
127 UIC_LINK_ACTIVE_STATE)
128#define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
129 UIC_LINK_HIBERN8_STATE)
130
131/*
132 * UFS Power management levels.
133 * Each level is in increasing order of power savings.
134 */
135enum ufs_pm_level {
136 UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */
137 UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */
138 UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */
139 UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */
140 UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */
141 UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */
142 UFS_PM_LVL_MAX
143};
144
145struct ufs_pm_lvl_states {
146 enum ufs_dev_pwr_mode dev_state;
147 enum uic_link_state link_state;
148};
149
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150/**
151 * struct ufshcd_lrb - local reference block
152 * @utr_descriptor_ptr: UTRD address of the command
5a0b0cb9 153 * @ucd_req_ptr: UCD address of the command
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154 * @ucd_rsp_ptr: Response UPIU address for this command
155 * @ucd_prdt_ptr: PRDT address of the command
ff8e20c6
DR
156 * @utrd_dma_addr: UTRD dma address for debug
157 * @ucd_prdt_dma_addr: PRDT dma address for debug
158 * @ucd_rsp_dma_addr: UPIU response dma address for debug
159 * @ucd_req_dma_addr: UPIU request dma address for debug
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160 * @cmd: pointer to SCSI command
161 * @sense_buffer: pointer to sense buffer address of the SCSI command
162 * @sense_bufflen: Length of the sense buffer
163 * @scsi_status: SCSI status of the command
164 * @command_type: SCSI, UFS, Query.
165 * @task_tag: Task tag of the command
166 * @lun: LUN of the command
5a0b0cb9 167 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
ff8e20c6 168 * @issue_time_stamp: time stamp for debug purposes
e0b299e3 169 * @req_abort_skip: skip request abort task flag
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170 */
171struct ufshcd_lrb {
172 struct utp_transfer_req_desc *utr_descriptor_ptr;
5a0b0cb9 173 struct utp_upiu_req *ucd_req_ptr;
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174 struct utp_upiu_rsp *ucd_rsp_ptr;
175 struct ufshcd_sg_entry *ucd_prdt_ptr;
176
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DR
177 dma_addr_t utrd_dma_addr;
178 dma_addr_t ucd_req_dma_addr;
179 dma_addr_t ucd_rsp_dma_addr;
180 dma_addr_t ucd_prdt_dma_addr;
181
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182 struct scsi_cmnd *cmd;
183 u8 *sense_buffer;
184 unsigned int sense_bufflen;
185 int scsi_status;
186
187 int command_type;
188 int task_tag;
0ce147d4 189 u8 lun; /* UPIU LUN id field is only 8-bit wide */
5a0b0cb9 190 bool intr_cmd;
ff8e20c6 191 ktime_t issue_time_stamp;
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192
193 bool req_abort_skip;
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194};
195
68078d5c 196/**
a230c2f6 197 * struct ufs_query - holds relevant data structures for query request
68078d5c
DR
198 * @request: request upiu and function
199 * @descriptor: buffer for sending/receiving descriptor
200 * @response: response upiu and response
201 */
202struct ufs_query {
203 struct ufs_query_req request;
204 u8 *descriptor;
205 struct ufs_query_res response;
206};
207
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208/**
209 * struct ufs_dev_cmd - all assosiated fields with device management commands
210 * @type: device management command type - Query, NOP OUT
211 * @lock: lock to allow one command at a time
212 * @complete: internal commands completion
213 * @tag_wq: wait queue until free command slot is available
214 */
215struct ufs_dev_cmd {
216 enum dev_cmd_type type;
217 struct mutex lock;
218 struct completion *complete;
219 wait_queue_head_t tag_wq;
68078d5c 220 struct ufs_query query;
5a0b0cb9 221};
e0eca63e 222
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PM
223struct ufs_desc_size {
224 int dev_desc;
225 int pwr_desc;
226 int geom_desc;
227 int interc_desc;
228 int unit_desc;
229 int conf_desc;
230};
231
c6e79dac
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232/**
233 * struct ufs_clk_info - UFS clock related info
234 * @list: list headed by hba->clk_list_head
235 * @clk: clock node
236 * @name: clock name
237 * @max_freq: maximum frequency supported by the clock
4cff6d99 238 * @min_freq: min frequency that can be used for clock scaling
856b3483 239 * @curr_freq: indicates the current frequency that it is set to
c6e79dac
SRT
240 * @enabled: variable to check against multiple enable/disable
241 */
242struct ufs_clk_info {
243 struct list_head list;
244 struct clk *clk;
245 const char *name;
246 u32 max_freq;
4cff6d99 247 u32 min_freq;
856b3483 248 u32 curr_freq;
c6e79dac
SRT
249 bool enabled;
250};
251
f06fcc71
YG
252enum ufs_notify_change_status {
253 PRE_CHANGE,
254 POST_CHANGE,
255};
7eb584db
DR
256
257struct ufs_pa_layer_attr {
258 u32 gear_rx;
259 u32 gear_tx;
260 u32 lane_rx;
261 u32 lane_tx;
262 u32 pwr_rx;
263 u32 pwr_tx;
264 u32 hs_rate;
265};
266
267struct ufs_pwr_mode_info {
268 bool is_valid;
269 struct ufs_pa_layer_attr info;
270};
271
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SRT
272/**
273 * struct ufs_hba_variant_ops - variant specific callbacks
274 * @name: variant name
275 * @init: called when the driver is initialized
276 * @exit: called to cleanup everything done in init
9949e702 277 * @get_ufs_hci_version: called to get UFS HCI version
856b3483 278 * @clk_scale_notify: notifies that clks are scaled up/down
5c0c28a8
SRT
279 * @setup_clocks: called before touching any of the controller registers
280 * @setup_regulators: called before accessing the host controller
281 * @hce_enable_notify: called before and after HCE enable bit is set to allow
282 * variant specific Uni-Pro initialization.
283 * @link_startup_notify: called before and after Link startup is carried out
284 * to allow variant specific Uni-Pro initialization.
7eb584db
DR
285 * @pwr_change_notify: called before and after a power mode change
286 * is carried out to allow vendor spesific capabilities
287 * to be set.
0e675efa
KK
288 * @setup_xfer_req: called before any transfer request is issued
289 * to set some things
d2877be4
KK
290 * @setup_task_mgmt: called before any task management request is issued
291 * to set some things
ee32c909 292 * @hibern8_notify: called around hibern8 enter/exit
56d4a186 293 * @apply_dev_quirks: called to apply device specific quirks
57d104c1
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294 * @suspend: called during host controller PM callback
295 * @resume: called during host controller PM callback
6e3fd44d 296 * @dbg_register_dump: used to dump controller debug information
4b9ffb5a 297 * @phy_initialization: used to initialize phys
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SRT
298 */
299struct ufs_hba_variant_ops {
300 const char *name;
301 int (*init)(struct ufs_hba *);
302 void (*exit)(struct ufs_hba *);
9949e702 303 u32 (*get_ufs_hci_version)(struct ufs_hba *);
f06fcc71
YG
304 int (*clk_scale_notify)(struct ufs_hba *, bool,
305 enum ufs_notify_change_status);
1e879e8f
SJ
306 int (*setup_clocks)(struct ufs_hba *, bool,
307 enum ufs_notify_change_status);
5c0c28a8 308 int (*setup_regulators)(struct ufs_hba *, bool);
f06fcc71
YG
309 int (*hce_enable_notify)(struct ufs_hba *,
310 enum ufs_notify_change_status);
311 int (*link_startup_notify)(struct ufs_hba *,
312 enum ufs_notify_change_status);
7eb584db 313 int (*pwr_change_notify)(struct ufs_hba *,
f06fcc71
YG
314 enum ufs_notify_change_status status,
315 struct ufs_pa_layer_attr *,
7eb584db 316 struct ufs_pa_layer_attr *);
0e675efa 317 void (*setup_xfer_req)(struct ufs_hba *, int, bool);
d2877be4 318 void (*setup_task_mgmt)(struct ufs_hba *, int, u8);
ee32c909 319 void (*hibern8_notify)(struct ufs_hba *, enum uic_cmd_dme,
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SJ
320 enum ufs_notify_change_status);
321 int (*apply_dev_quirks)(struct ufs_hba *);
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322 int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
323 int (*resume)(struct ufs_hba *, enum ufs_pm_op);
6e3fd44d 324 void (*dbg_register_dump)(struct ufs_hba *hba);
4b9ffb5a 325 int (*phy_initialization)(struct ufs_hba *);
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326};
327
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ST
328/* clock gating state */
329enum clk_gating_state {
330 CLKS_OFF,
331 CLKS_ON,
332 REQ_CLKS_OFF,
333 REQ_CLKS_ON,
334};
335
336/**
337 * struct ufs_clk_gating - UFS clock gating related info
338 * @gate_work: worker to turn off clocks after some delay as specified in
339 * delay_ms
340 * @ungate_work: worker to turn on clocks that will be used in case of
341 * interrupt context
342 * @state: the current clocks state
343 * @delay_ms: gating delay in ms
344 * @is_suspended: clk gating is suspended when set to 1 which can be used
345 * during suspend/resume
346 * @delay_attr: sysfs attribute to control delay_attr
b427411a
ST
347 * @enable_attr: sysfs attribute to enable/disable clock gating
348 * @is_enabled: Indicates the current status of clock gating
1ab27c9c
ST
349 * @active_reqs: number of requests that are pending and should be waited for
350 * completion before gating clocks.
351 */
352struct ufs_clk_gating {
353 struct delayed_work gate_work;
354 struct work_struct ungate_work;
355 enum clk_gating_state state;
356 unsigned long delay_ms;
357 bool is_suspended;
358 struct device_attribute delay_attr;
b427411a
ST
359 struct device_attribute enable_attr;
360 bool is_enabled;
1ab27c9c
ST
361 int active_reqs;
362};
363
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364struct ufs_saved_pwr_info {
365 struct ufs_pa_layer_attr info;
366 bool is_valid;
367};
368
401f1e44
SJ
369/**
370 * struct ufs_clk_scaling - UFS clock scaling related data
371 * @active_reqs: number of requests that are pending. If this is zero when
372 * devfreq ->target() function is called then schedule "suspend_work" to
373 * suspend devfreq.
374 * @tot_busy_t: Total busy time in current polling window
375 * @window_start_t: Start time (in jiffies) of the current polling window
376 * @busy_start_t: Start time of current busy period
377 * @enable_attr: sysfs attribute to enable/disable clock scaling
378 * @saved_pwr_info: UFS power mode may also be changed during scaling and this
379 * one keeps track of previous power mode.
380 * @workq: workqueue to schedule devfreq suspend/resume work
381 * @suspend_work: worker to suspend devfreq
382 * @resume_work: worker to resume devfreq
383 * @is_allowed: tracks if scaling is currently allowed or not
384 * @is_busy_started: tracks if busy period has started or not
385 * @is_suspended: tracks if devfreq is suspended or not
386 */
856b3483 387struct ufs_clk_scaling {
401f1e44
SJ
388 int active_reqs;
389 unsigned long tot_busy_t;
856b3483 390 unsigned long window_start_t;
401f1e44 391 ktime_t busy_start_t;
fcb0c4b0 392 struct device_attribute enable_attr;
a3cd5ec5 393 struct ufs_saved_pwr_info saved_pwr_info;
401f1e44
SJ
394 struct workqueue_struct *workq;
395 struct work_struct suspend_work;
396 struct work_struct resume_work;
397 bool is_allowed;
398 bool is_busy_started;
399 bool is_suspended;
856b3483
ST
400};
401
3a4bf06d
YG
402/**
403 * struct ufs_init_prefetch - contains data that is pre-fetched once during
404 * initialization
405 * @icc_level: icc level which was read during initialization
406 */
407struct ufs_init_prefetch {
408 u32 icc_level;
409};
410
ff8e20c6
DR
411#define UIC_ERR_REG_HIST_LENGTH 8
412/**
413 * struct ufs_uic_err_reg_hist - keeps history of uic errors
414 * @pos: index to indicate cyclic buffer position
415 * @reg: cyclic buffer for registers value
416 * @tstamp: cyclic buffer for time stamp
417 */
418struct ufs_uic_err_reg_hist {
419 int pos;
420 u32 reg[UIC_ERR_REG_HIST_LENGTH];
421 ktime_t tstamp[UIC_ERR_REG_HIST_LENGTH];
422};
423
424/**
425 * struct ufs_stats - keeps usage/err statistics
426 * @hibern8_exit_cnt: Counter to keep track of number of exits,
427 * reset this after link-startup.
428 * @last_hibern8_exit_tstamp: Set time after the hibern8 exit.
429 * Clear after the first successful command completion.
430 * @pa_err: tracks pa-uic errors
431 * @dl_err: tracks dl-uic errors
432 * @nl_err: tracks nl-uic errors
433 * @tl_err: tracks tl-uic errors
434 * @dme_err: tracks dme errors
435 */
436struct ufs_stats {
437 u32 hibern8_exit_cnt;
438 ktime_t last_hibern8_exit_tstamp;
439 struct ufs_uic_err_reg_hist pa_err;
440 struct ufs_uic_err_reg_hist dl_err;
441 struct ufs_uic_err_reg_hist nl_err;
442 struct ufs_uic_err_reg_hist tl_err;
443 struct ufs_uic_err_reg_hist dme_err;
444};
445
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446/**
447 * struct ufs_hba - per adapter private structure
448 * @mmio_base: UFSHCI base register address
449 * @ucdl_base_addr: UFS Command Descriptor base address
450 * @utrdl_base_addr: UTP Transfer Request Descriptor base address
451 * @utmrdl_base_addr: UTP Task Management Descriptor base address
452 * @ucdl_dma_addr: UFS Command Descriptor DMA address
453 * @utrdl_dma_addr: UTRDL DMA address
454 * @utmrdl_dma_addr: UTMRDL DMA address
455 * @host: Scsi_Host instance of the driver
456 * @dev: device handle
457 * @lrb: local reference block
5a0b0cb9 458 * @lrb_in_use: lrb in use
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459 * @outstanding_tasks: Bits representing outstanding task requests
460 * @outstanding_reqs: Bits representing outstanding transfer requests
461 * @capabilities: UFS Controller Capabilities
462 * @nutrs: Transfer Request Queue depth supported by controller
463 * @nutmrs: Task Management Queue depth supported by controller
464 * @ufs_version: UFS Version to which controller complies
5c0c28a8
SRT
465 * @vops: pointer to variant specific operations
466 * @priv: pointer to variant specific private data
e0eca63e
VH
467 * @irq: Irq number of the controller
468 * @active_uic_cmd: handle of active UIC command
6ccf44fe 469 * @uic_cmd_mutex: mutex for uic command
e2933132
SRT
470 * @tm_wq: wait queue for task management
471 * @tm_tag_wq: wait queue for free task management slots
472 * @tm_slots_in_use: bit map of task management request slots in use
53b3d9c3 473 * @pwr_done: completion for power mode change
e0eca63e
VH
474 * @tm_condition: condition variable for task management
475 * @ufshcd_state: UFSHCD states
3441da7d 476 * @eh_flags: Error handling flags
2fbd009b 477 * @intr_mask: Interrupt Mask Bits
66ec6d59 478 * @ee_ctrl_mask: Exception event control mask
1d337ec2 479 * @is_powered: flag to check if HBA is powered
3a4bf06d
YG
480 * @is_init_prefetch: flag to check if data was pre-fetched in initialization
481 * @init_prefetch_data: data pre-fetched during initialization
e8e7f271 482 * @eh_work: Worker to handle UFS errors that require s/w attention
66ec6d59 483 * @eeh_work: Worker to handle exception events
e0eca63e 484 * @errors: HBA errors
e8e7f271
SRT
485 * @uic_error: UFS interconnect layer error status
486 * @saved_err: sticky error mask
487 * @saved_uic_err: sticky UIC error mask
5a0b0cb9 488 * @dev_cmd: ufs device management command information
cad2e03d 489 * @last_dme_cmd_tstamp: time stamp of the last completed DME command
66ec6d59 490 * @auto_bkops_enabled: to track whether bkops is enabled in device
aa497613 491 * @vreg_info: UFS device voltage regulator information
c6e79dac 492 * @clk_list_head: UFS host controller clocks list node head
7eb584db
DR
493 * @pwr_info: holds current power mode
494 * @max_pwr_info: keeps the device max valid pwm
a4b0e8a4 495 * @desc_size: descriptor sizes reported by device
afdfff59
YG
496 * @urgent_bkops_lvl: keeps track of urgent bkops level for device
497 * @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for
498 * device is known or not.
e0eca63e
VH
499 */
500struct ufs_hba {
501 void __iomem *mmio_base;
502
503 /* Virtual memory reference */
504 struct utp_transfer_cmd_desc *ucdl_base_addr;
505 struct utp_transfer_req_desc *utrdl_base_addr;
506 struct utp_task_req_desc *utmrdl_base_addr;
507
508 /* DMA memory reference */
509 dma_addr_t ucdl_dma_addr;
510 dma_addr_t utrdl_dma_addr;
511 dma_addr_t utmrdl_dma_addr;
512
513 struct Scsi_Host *host;
514 struct device *dev;
2a8fa600
SJ
515 /*
516 * This field is to keep a reference to "scsi_device" corresponding to
517 * "UFS device" W-LU.
518 */
519 struct scsi_device *sdev_ufs_device;
e0eca63e 520
57d104c1
SJ
521 enum ufs_dev_pwr_mode curr_dev_pwr_mode;
522 enum uic_link_state uic_link_state;
523 /* Desired UFS power management level during runtime PM */
524 enum ufs_pm_level rpm_lvl;
525 /* Desired UFS power management level during system PM */
526 enum ufs_pm_level spm_lvl;
09690d5a
SJ
527 struct device_attribute rpm_lvl_attr;
528 struct device_attribute spm_lvl_attr;
57d104c1
SJ
529 int pm_op_in_progress;
530
e0eca63e 531 struct ufshcd_lrb *lrb;
5a0b0cb9 532 unsigned long lrb_in_use;
e0eca63e
VH
533
534 unsigned long outstanding_tasks;
535 unsigned long outstanding_reqs;
536
537 u32 capabilities;
538 int nutrs;
539 int nutmrs;
540 u32 ufs_version;
5c0c28a8
SRT
541 struct ufs_hba_variant_ops *vops;
542 void *priv;
e0eca63e 543 unsigned int irq;
57d104c1 544 bool is_irq_enabled;
e0eca63e 545
b852190e
YG
546 /* Interrupt aggregation support is broken */
547 #define UFSHCD_QUIRK_BROKEN_INTR_AGGR UFS_BIT(0)
548
cad2e03d
YG
549 /*
550 * delay before each dme command is required as the unipro
551 * layer has shown instabilities
552 */
b852190e
YG
553 #define UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS UFS_BIT(1)
554
7ca38cf3
YG
555 /*
556 * If UFS host controller is having issue in processing LCC (Line
557 * Control Command) coming from device then enable this quirk.
558 * When this quirk is enabled, host controller driver should disable
559 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
560 * attribute of device to 0).
561 */
562 #define UFSHCD_QUIRK_BROKEN_LCC UFS_BIT(2)
cad2e03d 563
c3a2f9ee
YG
564 /*
565 * The attribute PA_RXHSUNTERMCAP specifies whether or not the
566 * inbound Link supports unterminated line in HS mode. Setting this
567 * attribute to 1 fixes moving to HS gear.
568 */
569 #define UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP UFS_BIT(3)
570
874237f7
YG
571 /*
572 * This quirk needs to be enabled if the host contoller only allows
573 * accessing the peer dme attributes in AUTO mode (FAST AUTO or
574 * SLOW AUTO).
575 */
576 #define UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE UFS_BIT(4)
577
9949e702
YG
578 /*
579 * This quirk needs to be enabled if the host contoller doesn't
580 * advertise the correct version in UFS_VER register. If this quirk
581 * is enabled, standard UFS host driver will call the vendor specific
582 * ops (get_ufs_hci_version) to get the correct version.
583 */
584 #define UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION UFS_BIT(5)
585
75b1cc4a
KK
586 /*
587 * This quirk needs to be enabled if the host contoller regards
588 * resolution of the values of PRDTO and PRDTL in UTRD as byte.
589 */
590 #define UFSHCD_QUIRK_PRDT_BYTE_GRAN UFS_BIT(7)
591
cad2e03d 592 unsigned int quirks; /* Deviations from standard UFSHCI spec. */
6ccf44fe 593
c58ab7aa
YG
594 /* Device deviations from standard UFS device spec. */
595 unsigned int dev_quirks;
596
e2933132
SRT
597 wait_queue_head_t tm_wq;
598 wait_queue_head_t tm_tag_wq;
e0eca63e 599 unsigned long tm_condition;
e2933132 600 unsigned long tm_slots_in_use;
e0eca63e 601
57d104c1
SJ
602 struct uic_command *active_uic_cmd;
603 struct mutex uic_cmd_mutex;
604 struct completion *uic_async_done;
53b3d9c3 605
e0eca63e 606 u32 ufshcd_state;
3441da7d 607 u32 eh_flags;
2fbd009b 608 u32 intr_mask;
66ec6d59 609 u16 ee_ctrl_mask;
1d337ec2 610 bool is_powered;
3a4bf06d
YG
611 bool is_init_prefetch;
612 struct ufs_init_prefetch init_prefetch_data;
e0eca63e
VH
613
614 /* Work Queues */
e8e7f271 615 struct work_struct eh_work;
66ec6d59 616 struct work_struct eeh_work;
e0eca63e
VH
617
618 /* HBA Errors */
619 u32 errors;
e8e7f271
SRT
620 u32 uic_error;
621 u32 saved_err;
622 u32 saved_uic_err;
ff8e20c6 623 struct ufs_stats ufs_stats;
5a0b0cb9
SRT
624
625 /* Device management request data */
626 struct ufs_dev_cmd dev_cmd;
cad2e03d 627 ktime_t last_dme_cmd_tstamp;
66ec6d59 628
57d104c1
SJ
629 /* Keeps information of the UFS device connected to this host */
630 struct ufs_dev_info dev_info;
66ec6d59 631 bool auto_bkops_enabled;
aa497613 632 struct ufs_vreg_info vreg_info;
c6e79dac 633 struct list_head clk_list_head;
57d104c1
SJ
634
635 bool wlun_dev_clr_ua;
7eb584db 636
7fabb77b
GB
637 /* Number of requests aborts */
638 int req_abort_count;
639
54b879b7
YG
640 /* Number of lanes available (1 or 2) for Rx/Tx */
641 u32 lanes_per_direction;
7eb584db
DR
642 struct ufs_pa_layer_attr pwr_info;
643 struct ufs_pwr_mode_info max_pwr_info;
1ab27c9c
ST
644
645 struct ufs_clk_gating clk_gating;
646 /* Control to enable/disable host capabilities */
647 u32 caps;
648 /* Allow dynamic clk gating */
649#define UFSHCD_CAP_CLK_GATING (1 << 0)
650 /* Allow hiberb8 with clk gating */
651#define UFSHCD_CAP_HIBERN8_WITH_CLK_GATING (1 << 1)
856b3483
ST
652 /* Allow dynamic clk scaling */
653#define UFSHCD_CAP_CLK_SCALING (1 << 2)
374a246e
SJ
654 /* Allow auto bkops to enabled during runtime suspend */
655#define UFSHCD_CAP_AUTO_BKOPS_SUSPEND (1 << 3)
b852190e
YG
656 /*
657 * This capability allows host controller driver to use the UFS HCI's
658 * interrupt aggregation capability.
659 * CAUTION: Enabling this might reduce overall UFS throughput.
660 */
661#define UFSHCD_CAP_INTR_AGGR (1 << 4)
4e768e76
SJ
662 /*
663 * This capability allows the device auto-bkops to be always enabled
664 * except during suspend (both runtime and suspend).
665 * Enabling this capability means that device will always be allowed
666 * to do background operation when it's active but it might degrade
667 * the performance of ongoing read/write operations.
668 */
669#define UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND (1 << 5)
856b3483
ST
670
671 struct devfreq *devfreq;
672 struct ufs_clk_scaling clk_scaling;
e785060e 673 bool is_sys_suspended;
afdfff59
YG
674
675 enum bkops_status urgent_bkops_lvl;
676 bool is_urgent_bkops_lvl_checked;
a3cd5ec5
SJ
677
678 struct rw_semaphore clk_scaling_lock;
a4b0e8a4 679 struct ufs_desc_size desc_size;
e0eca63e
VH
680};
681
1ab27c9c
ST
682/* Returns true if clocks can be gated. Otherwise false */
683static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
684{
685 return hba->caps & UFSHCD_CAP_CLK_GATING;
686}
687static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
688{
689 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
690}
fcb0c4b0 691static inline int ufshcd_is_clkscaling_supported(struct ufs_hba *hba)
856b3483
ST
692{
693 return hba->caps & UFSHCD_CAP_CLK_SCALING;
694}
374a246e
SJ
695static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
696{
697 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
698}
699
b852190e
YG
700static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
701{
4b9ffb5a
JP
702/* DWC UFS Core has the Interrupt aggregation feature but is not detectable*/
703#ifndef CONFIG_SCSI_UFS_DWC
b852190e
YG
704 if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
705 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
706 return true;
707 else
708 return false;
4b9ffb5a
JP
709#else
710return true;
711#endif
b852190e
YG
712}
713
b873a275
SJ
714#define ufshcd_writel(hba, val, reg) \
715 writel((val), (hba)->mmio_base + (reg))
716#define ufshcd_readl(hba, reg) \
717 readl((hba)->mmio_base + (reg))
718
e785060e
DR
719/**
720 * ufshcd_rmwl - read modify write into a register
721 * @hba - per adapter instance
722 * @mask - mask to apply on read value
723 * @val - actual value to write
724 * @reg - register address
725 */
726static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
727{
728 u32 tmp;
729
730 tmp = ufshcd_readl(hba, reg);
731 tmp &= ~mask;
732 tmp |= (val & mask);
733 ufshcd_writel(hba, tmp, reg);
734}
735
5c0c28a8 736int ufshcd_alloc_host(struct device *, struct ufs_hba **);
47555a5c 737void ufshcd_dealloc_host(struct ufs_hba *);
5c0c28a8 738int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int);
e0eca63e 739void ufshcd_remove(struct ufs_hba *);
596585a2
YG
740int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
741 u32 val, unsigned long interval_us,
742 unsigned long timeout_ms, bool can_sleep);
e0eca63e 743
68078d5c
DR
744static inline void check_upiu_size(void)
745{
746 BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
747 GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
748}
749
1ce5898a
YG
750/**
751 * ufshcd_set_variant - set variant specific data to the hba
752 * @hba - per adapter instance
753 * @variant - pointer to variant specific data
754 */
755static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
756{
757 BUG_ON(!hba);
758 hba->priv = variant;
759}
760
761/**
762 * ufshcd_get_variant - get variant specific data from the hba
763 * @hba - per adapter instance
764 */
765static inline void *ufshcd_get_variant(struct ufs_hba *hba)
766{
767 BUG_ON(!hba);
768 return hba->priv;
769}
4e768e76
SJ
770static inline bool ufshcd_keep_autobkops_enabled_except_suspend(
771 struct ufs_hba *hba)
772{
773 return hba->caps & UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND;
774}
1ce5898a 775
66ec6d59
SRT
776extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
777extern int ufshcd_runtime_resume(struct ufs_hba *hba);
778extern int ufshcd_runtime_idle(struct ufs_hba *hba);
57d104c1
SJ
779extern int ufshcd_system_suspend(struct ufs_hba *hba);
780extern int ufshcd_system_resume(struct ufs_hba *hba);
781extern int ufshcd_shutdown(struct ufs_hba *hba);
12b4fdb4
SJ
782extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
783 u8 attr_set, u32 mib_val, u8 peer);
784extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
785 u32 *mib_val, u8 peer);
786
787/* UIC command interfaces for DME primitives */
788#define DME_LOCAL 0
789#define DME_PEER 1
790#define ATTR_SET_NOR 0 /* NORMAL */
791#define ATTR_SET_ST 1 /* STATIC */
792
793static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
794 u32 mib_val)
795{
796 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
797 mib_val, DME_LOCAL);
798}
799
800static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
801 u32 mib_val)
802{
803 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
804 mib_val, DME_LOCAL);
805}
806
807static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
808 u32 mib_val)
809{
810 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
811 mib_val, DME_PEER);
812}
813
814static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
815 u32 mib_val)
816{
817 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
818 mib_val, DME_PEER);
819}
820
821static inline int ufshcd_dme_get(struct ufs_hba *hba,
822 u32 attr_sel, u32 *mib_val)
823{
824 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
825}
826
827static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
828 u32 attr_sel, u32 *mib_val)
829{
830 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
831}
832
f37aabcf
YG
833static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info)
834{
835 return (pwr_info->pwr_rx == FAST_MODE ||
836 pwr_info->pwr_rx == FASTAUTO_MODE) &&
837 (pwr_info->pwr_tx == FAST_MODE ||
838 pwr_info->pwr_tx == FASTAUTO_MODE);
839}
840
dc3c8d3a
YG
841/* Expose Query-Request API */
842int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
843 enum flag_idn idn, bool *flag_res);
1ab27c9c
ST
844int ufshcd_hold(struct ufs_hba *hba, bool async);
845void ufshcd_release(struct ufs_hba *hba);
a4b0e8a4
PM
846
847int ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
848 int *desc_length);
849
37113106 850u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba);
0263bcd0
YG
851
852/* Wrapper functions for safely calling variant operations */
853static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
854{
855 if (hba->vops)
856 return hba->vops->name;
857 return "";
858}
859
860static inline int ufshcd_vops_init(struct ufs_hba *hba)
861{
862 if (hba->vops && hba->vops->init)
863 return hba->vops->init(hba);
864
865 return 0;
866}
867
868static inline void ufshcd_vops_exit(struct ufs_hba *hba)
869{
870 if (hba->vops && hba->vops->exit)
871 return hba->vops->exit(hba);
872}
873
874static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
875{
876 if (hba->vops && hba->vops->get_ufs_hci_version)
877 return hba->vops->get_ufs_hci_version(hba);
878
879 return ufshcd_readl(hba, REG_UFS_VERSION);
880}
881
f06fcc71
YG
882static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
883 bool up, enum ufs_notify_change_status status)
0263bcd0
YG
884{
885 if (hba->vops && hba->vops->clk_scale_notify)
f06fcc71
YG
886 return hba->vops->clk_scale_notify(hba, up, status);
887 return 0;
0263bcd0
YG
888}
889
1e879e8f
SJ
890static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on,
891 enum ufs_notify_change_status status)
0263bcd0
YG
892{
893 if (hba->vops && hba->vops->setup_clocks)
1e879e8f 894 return hba->vops->setup_clocks(hba, on, status);
0263bcd0
YG
895 return 0;
896}
897
898static inline int ufshcd_vops_setup_regulators(struct ufs_hba *hba, bool status)
899{
900 if (hba->vops && hba->vops->setup_regulators)
901 return hba->vops->setup_regulators(hba, status);
902
903 return 0;
904}
905
906static inline int ufshcd_vops_hce_enable_notify(struct ufs_hba *hba,
907 bool status)
908{
909 if (hba->vops && hba->vops->hce_enable_notify)
910 return hba->vops->hce_enable_notify(hba, status);
911
912 return 0;
913}
914static inline int ufshcd_vops_link_startup_notify(struct ufs_hba *hba,
915 bool status)
916{
917 if (hba->vops && hba->vops->link_startup_notify)
918 return hba->vops->link_startup_notify(hba, status);
919
920 return 0;
921}
922
923static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
924 bool status,
925 struct ufs_pa_layer_attr *dev_max_params,
926 struct ufs_pa_layer_attr *dev_req_params)
927{
928 if (hba->vops && hba->vops->pwr_change_notify)
929 return hba->vops->pwr_change_notify(hba, status,
930 dev_max_params, dev_req_params);
931
932 return -ENOTSUPP;
933}
934
0e675efa
KK
935static inline void ufshcd_vops_setup_xfer_req(struct ufs_hba *hba, int tag,
936 bool is_scsi_cmd)
937{
938 if (hba->vops && hba->vops->setup_xfer_req)
939 return hba->vops->setup_xfer_req(hba, tag, is_scsi_cmd);
940}
941
d2877be4
KK
942static inline void ufshcd_vops_setup_task_mgmt(struct ufs_hba *hba,
943 int tag, u8 tm_function)
944{
945 if (hba->vops && hba->vops->setup_task_mgmt)
946 return hba->vops->setup_task_mgmt(hba, tag, tm_function);
947}
948
ee32c909
KK
949static inline void ufshcd_vops_hibern8_notify(struct ufs_hba *hba,
950 enum uic_cmd_dme cmd,
951 enum ufs_notify_change_status status)
952{
953 if (hba->vops && hba->vops->hibern8_notify)
954 return hba->vops->hibern8_notify(hba, cmd, status);
955}
956
56d4a186
SJ
957static inline int ufshcd_vops_apply_dev_quirks(struct ufs_hba *hba)
958{
959 if (hba->vops && hba->vops->apply_dev_quirks)
960 return hba->vops->apply_dev_quirks(hba);
961 return 0;
962}
963
0263bcd0
YG
964static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op)
965{
966 if (hba->vops && hba->vops->suspend)
967 return hba->vops->suspend(hba, op);
968
969 return 0;
970}
971
972static inline int ufshcd_vops_resume(struct ufs_hba *hba, enum ufs_pm_op op)
973{
974 if (hba->vops && hba->vops->resume)
975 return hba->vops->resume(hba, op);
976
977 return 0;
978}
979
6e3fd44d
YG
980static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba)
981{
982 if (hba->vops && hba->vops->dbg_register_dump)
983 hba->vops->dbg_register_dump(hba);
984}
985
e0eca63e 986#endif /* End of Header */