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e0eca63e
VH
1/*
2 * Universal Flash Storage Host controller driver
3 *
4 * This code is based on drivers/scsi/ufs/ufshcd.h
5 * Copyright (C) 2011-2013 Samsung India Software Operations
dc3c8d3a 6 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
e0eca63e
VH
7 *
8 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
35 */
36
37#ifndef _UFSHCD_H
38#define _UFSHCD_H
39
40#include <linux/module.h>
41#include <linux/kernel.h>
42#include <linux/init.h>
43#include <linux/interrupt.h>
44#include <linux/io.h>
45#include <linux/delay.h>
46#include <linux/slab.h>
47#include <linux/spinlock.h>
48#include <linux/workqueue.h>
49#include <linux/errno.h>
50#include <linux/types.h>
51#include <linux/wait.h>
52#include <linux/bitops.h>
53#include <linux/pm_runtime.h>
54#include <linux/clk.h>
6ccf44fe 55#include <linux/completion.h>
aa497613 56#include <linux/regulator/consumer.h>
f37aabcf 57#include "unipro.h"
e0eca63e
VH
58
59#include <asm/irq.h>
60#include <asm/byteorder.h>
61#include <scsi/scsi.h>
62#include <scsi/scsi_cmnd.h>
63#include <scsi/scsi_host.h>
64#include <scsi/scsi_tcq.h>
65#include <scsi/scsi_dbg.h>
66#include <scsi/scsi_eh.h>
67
68#include "ufs.h"
69#include "ufshci.h"
70
71#define UFSHCD "ufshcd"
72#define UFSHCD_DRIVER_VERSION "0.2"
73
5c0c28a8
SRT
74struct ufs_hba;
75
5a0b0cb9
SRT
76enum dev_cmd_type {
77 DEV_CMD_TYPE_NOP = 0x0,
68078d5c 78 DEV_CMD_TYPE_QUERY = 0x1,
5a0b0cb9
SRT
79};
80
e0eca63e
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81/**
82 * struct uic_command - UIC command structure
83 * @command: UIC command
84 * @argument1: UIC command argument 1
85 * @argument2: UIC command argument 2
86 * @argument3: UIC command argument 3
87 * @cmd_active: Indicate if UIC command is outstanding
88 * @result: UIC command result
6ccf44fe 89 * @done: UIC command completion
e0eca63e
VH
90 */
91struct uic_command {
92 u32 command;
93 u32 argument1;
94 u32 argument2;
95 u32 argument3;
96 int cmd_active;
97 int result;
6ccf44fe 98 struct completion done;
e0eca63e
VH
99};
100
57d104c1
SJ
101/* Used to differentiate the power management options */
102enum ufs_pm_op {
103 UFS_RUNTIME_PM,
104 UFS_SYSTEM_PM,
105 UFS_SHUTDOWN_PM,
106};
107
108#define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM)
109#define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM)
110#define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM)
111
112/* Host <-> Device UniPro Link state */
113enum uic_link_state {
114 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
115 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
116 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
117};
118
119#define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
120#define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
121 UIC_LINK_ACTIVE_STATE)
122#define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
123 UIC_LINK_HIBERN8_STATE)
124#define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
125#define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
126 UIC_LINK_ACTIVE_STATE)
127#define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
128 UIC_LINK_HIBERN8_STATE)
129
130/*
131 * UFS Power management levels.
132 * Each level is in increasing order of power savings.
133 */
134enum ufs_pm_level {
135 UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */
136 UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */
137 UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */
138 UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */
139 UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */
140 UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */
141 UFS_PM_LVL_MAX
142};
143
144struct ufs_pm_lvl_states {
145 enum ufs_dev_pwr_mode dev_state;
146 enum uic_link_state link_state;
147};
148
e0eca63e
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149/**
150 * struct ufshcd_lrb - local reference block
151 * @utr_descriptor_ptr: UTRD address of the command
5a0b0cb9 152 * @ucd_req_ptr: UCD address of the command
e0eca63e
VH
153 * @ucd_rsp_ptr: Response UPIU address for this command
154 * @ucd_prdt_ptr: PRDT address of the command
155 * @cmd: pointer to SCSI command
156 * @sense_buffer: pointer to sense buffer address of the SCSI command
157 * @sense_bufflen: Length of the sense buffer
158 * @scsi_status: SCSI status of the command
159 * @command_type: SCSI, UFS, Query.
160 * @task_tag: Task tag of the command
161 * @lun: LUN of the command
5a0b0cb9 162 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
e0eca63e
VH
163 */
164struct ufshcd_lrb {
165 struct utp_transfer_req_desc *utr_descriptor_ptr;
5a0b0cb9 166 struct utp_upiu_req *ucd_req_ptr;
e0eca63e
VH
167 struct utp_upiu_rsp *ucd_rsp_ptr;
168 struct ufshcd_sg_entry *ucd_prdt_ptr;
169
170 struct scsi_cmnd *cmd;
171 u8 *sense_buffer;
172 unsigned int sense_bufflen;
173 int scsi_status;
174
175 int command_type;
176 int task_tag;
0ce147d4 177 u8 lun; /* UPIU LUN id field is only 8-bit wide */
5a0b0cb9 178 bool intr_cmd;
e0eca63e
VH
179};
180
68078d5c 181/**
a230c2f6 182 * struct ufs_query - holds relevant data structures for query request
68078d5c
DR
183 * @request: request upiu and function
184 * @descriptor: buffer for sending/receiving descriptor
185 * @response: response upiu and response
186 */
187struct ufs_query {
188 struct ufs_query_req request;
189 u8 *descriptor;
190 struct ufs_query_res response;
191};
192
5a0b0cb9
SRT
193/**
194 * struct ufs_dev_cmd - all assosiated fields with device management commands
195 * @type: device management command type - Query, NOP OUT
196 * @lock: lock to allow one command at a time
197 * @complete: internal commands completion
198 * @tag_wq: wait queue until free command slot is available
199 */
200struct ufs_dev_cmd {
201 enum dev_cmd_type type;
202 struct mutex lock;
203 struct completion *complete;
204 wait_queue_head_t tag_wq;
68078d5c 205 struct ufs_query query;
5a0b0cb9 206};
e0eca63e 207
c6e79dac
SRT
208/**
209 * struct ufs_clk_info - UFS clock related info
210 * @list: list headed by hba->clk_list_head
211 * @clk: clock node
212 * @name: clock name
213 * @max_freq: maximum frequency supported by the clock
4cff6d99 214 * @min_freq: min frequency that can be used for clock scaling
856b3483 215 * @curr_freq: indicates the current frequency that it is set to
c6e79dac
SRT
216 * @enabled: variable to check against multiple enable/disable
217 */
218struct ufs_clk_info {
219 struct list_head list;
220 struct clk *clk;
221 const char *name;
222 u32 max_freq;
4cff6d99 223 u32 min_freq;
856b3483 224 u32 curr_freq;
c6e79dac
SRT
225 bool enabled;
226};
227
f06fcc71
YG
228enum ufs_notify_change_status {
229 PRE_CHANGE,
230 POST_CHANGE,
231};
7eb584db
DR
232
233struct ufs_pa_layer_attr {
234 u32 gear_rx;
235 u32 gear_tx;
236 u32 lane_rx;
237 u32 lane_tx;
238 u32 pwr_rx;
239 u32 pwr_tx;
240 u32 hs_rate;
241};
242
243struct ufs_pwr_mode_info {
244 bool is_valid;
245 struct ufs_pa_layer_attr info;
246};
247
5c0c28a8
SRT
248/**
249 * struct ufs_hba_variant_ops - variant specific callbacks
250 * @name: variant name
251 * @init: called when the driver is initialized
252 * @exit: called to cleanup everything done in init
9949e702 253 * @get_ufs_hci_version: called to get UFS HCI version
856b3483 254 * @clk_scale_notify: notifies that clks are scaled up/down
5c0c28a8
SRT
255 * @setup_clocks: called before touching any of the controller registers
256 * @setup_regulators: called before accessing the host controller
257 * @hce_enable_notify: called before and after HCE enable bit is set to allow
258 * variant specific Uni-Pro initialization.
259 * @link_startup_notify: called before and after Link startup is carried out
260 * to allow variant specific Uni-Pro initialization.
7eb584db
DR
261 * @pwr_change_notify: called before and after a power mode change
262 * is carried out to allow vendor spesific capabilities
263 * to be set.
0e675efa
KK
264 * @setup_xfer_req: called before any transfer request is issued
265 * to set some things
d2877be4
KK
266 * @setup_task_mgmt: called before any task management request is issued
267 * to set some things
ee32c909 268 * @hibern8_notify: called around hibern8 enter/exit
56d4a186 269 * @apply_dev_quirks: called to apply device specific quirks
57d104c1
SJ
270 * @suspend: called during host controller PM callback
271 * @resume: called during host controller PM callback
6e3fd44d 272 * @dbg_register_dump: used to dump controller debug information
4b9ffb5a 273 * @phy_initialization: used to initialize phys
5c0c28a8
SRT
274 */
275struct ufs_hba_variant_ops {
276 const char *name;
277 int (*init)(struct ufs_hba *);
278 void (*exit)(struct ufs_hba *);
9949e702 279 u32 (*get_ufs_hci_version)(struct ufs_hba *);
f06fcc71
YG
280 int (*clk_scale_notify)(struct ufs_hba *, bool,
281 enum ufs_notify_change_status);
1e879e8f
SJ
282 int (*setup_clocks)(struct ufs_hba *, bool,
283 enum ufs_notify_change_status);
5c0c28a8 284 int (*setup_regulators)(struct ufs_hba *, bool);
f06fcc71
YG
285 int (*hce_enable_notify)(struct ufs_hba *,
286 enum ufs_notify_change_status);
287 int (*link_startup_notify)(struct ufs_hba *,
288 enum ufs_notify_change_status);
7eb584db 289 int (*pwr_change_notify)(struct ufs_hba *,
f06fcc71
YG
290 enum ufs_notify_change_status status,
291 struct ufs_pa_layer_attr *,
7eb584db 292 struct ufs_pa_layer_attr *);
0e675efa 293 void (*setup_xfer_req)(struct ufs_hba *, int, bool);
d2877be4 294 void (*setup_task_mgmt)(struct ufs_hba *, int, u8);
ee32c909 295 void (*hibern8_notify)(struct ufs_hba *, enum uic_cmd_dme,
56d4a186
SJ
296 enum ufs_notify_change_status);
297 int (*apply_dev_quirks)(struct ufs_hba *);
57d104c1
SJ
298 int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
299 int (*resume)(struct ufs_hba *, enum ufs_pm_op);
6e3fd44d 300 void (*dbg_register_dump)(struct ufs_hba *hba);
4b9ffb5a 301 int (*phy_initialization)(struct ufs_hba *);
5c0c28a8
SRT
302};
303
1ab27c9c
ST
304/* clock gating state */
305enum clk_gating_state {
306 CLKS_OFF,
307 CLKS_ON,
308 REQ_CLKS_OFF,
309 REQ_CLKS_ON,
310};
311
312/**
313 * struct ufs_clk_gating - UFS clock gating related info
314 * @gate_work: worker to turn off clocks after some delay as specified in
315 * delay_ms
316 * @ungate_work: worker to turn on clocks that will be used in case of
317 * interrupt context
318 * @state: the current clocks state
319 * @delay_ms: gating delay in ms
320 * @is_suspended: clk gating is suspended when set to 1 which can be used
321 * during suspend/resume
322 * @delay_attr: sysfs attribute to control delay_attr
b427411a
ST
323 * @enable_attr: sysfs attribute to enable/disable clock gating
324 * @is_enabled: Indicates the current status of clock gating
1ab27c9c
ST
325 * @active_reqs: number of requests that are pending and should be waited for
326 * completion before gating clocks.
327 */
328struct ufs_clk_gating {
329 struct delayed_work gate_work;
330 struct work_struct ungate_work;
331 enum clk_gating_state state;
332 unsigned long delay_ms;
333 bool is_suspended;
334 struct device_attribute delay_attr;
b427411a
ST
335 struct device_attribute enable_attr;
336 bool is_enabled;
1ab27c9c
ST
337 int active_reqs;
338};
339
856b3483
ST
340struct ufs_clk_scaling {
341 ktime_t busy_start_t;
342 bool is_busy_started;
343 unsigned long tot_busy_t;
344 unsigned long window_start_t;
345};
346
3a4bf06d
YG
347/**
348 * struct ufs_init_prefetch - contains data that is pre-fetched once during
349 * initialization
350 * @icc_level: icc level which was read during initialization
351 */
352struct ufs_init_prefetch {
353 u32 icc_level;
354};
355
e0eca63e
VH
356/**
357 * struct ufs_hba - per adapter private structure
358 * @mmio_base: UFSHCI base register address
359 * @ucdl_base_addr: UFS Command Descriptor base address
360 * @utrdl_base_addr: UTP Transfer Request Descriptor base address
361 * @utmrdl_base_addr: UTP Task Management Descriptor base address
362 * @ucdl_dma_addr: UFS Command Descriptor DMA address
363 * @utrdl_dma_addr: UTRDL DMA address
364 * @utmrdl_dma_addr: UTMRDL DMA address
365 * @host: Scsi_Host instance of the driver
366 * @dev: device handle
367 * @lrb: local reference block
5a0b0cb9 368 * @lrb_in_use: lrb in use
e0eca63e
VH
369 * @outstanding_tasks: Bits representing outstanding task requests
370 * @outstanding_reqs: Bits representing outstanding transfer requests
371 * @capabilities: UFS Controller Capabilities
372 * @nutrs: Transfer Request Queue depth supported by controller
373 * @nutmrs: Task Management Queue depth supported by controller
374 * @ufs_version: UFS Version to which controller complies
5c0c28a8
SRT
375 * @vops: pointer to variant specific operations
376 * @priv: pointer to variant specific private data
e0eca63e
VH
377 * @irq: Irq number of the controller
378 * @active_uic_cmd: handle of active UIC command
6ccf44fe 379 * @uic_cmd_mutex: mutex for uic command
e2933132
SRT
380 * @tm_wq: wait queue for task management
381 * @tm_tag_wq: wait queue for free task management slots
382 * @tm_slots_in_use: bit map of task management request slots in use
53b3d9c3 383 * @pwr_done: completion for power mode change
e0eca63e
VH
384 * @tm_condition: condition variable for task management
385 * @ufshcd_state: UFSHCD states
3441da7d 386 * @eh_flags: Error handling flags
2fbd009b 387 * @intr_mask: Interrupt Mask Bits
66ec6d59 388 * @ee_ctrl_mask: Exception event control mask
1d337ec2 389 * @is_powered: flag to check if HBA is powered
3a4bf06d
YG
390 * @is_init_prefetch: flag to check if data was pre-fetched in initialization
391 * @init_prefetch_data: data pre-fetched during initialization
e8e7f271 392 * @eh_work: Worker to handle UFS errors that require s/w attention
66ec6d59 393 * @eeh_work: Worker to handle exception events
e0eca63e 394 * @errors: HBA errors
e8e7f271
SRT
395 * @uic_error: UFS interconnect layer error status
396 * @saved_err: sticky error mask
397 * @saved_uic_err: sticky UIC error mask
5a0b0cb9 398 * @dev_cmd: ufs device management command information
cad2e03d 399 * @last_dme_cmd_tstamp: time stamp of the last completed DME command
66ec6d59 400 * @auto_bkops_enabled: to track whether bkops is enabled in device
aa497613 401 * @vreg_info: UFS device voltage regulator information
c6e79dac 402 * @clk_list_head: UFS host controller clocks list node head
7eb584db
DR
403 * @pwr_info: holds current power mode
404 * @max_pwr_info: keeps the device max valid pwm
afdfff59
YG
405 * @urgent_bkops_lvl: keeps track of urgent bkops level for device
406 * @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for
407 * device is known or not.
e0eca63e
VH
408 */
409struct ufs_hba {
410 void __iomem *mmio_base;
411
412 /* Virtual memory reference */
413 struct utp_transfer_cmd_desc *ucdl_base_addr;
414 struct utp_transfer_req_desc *utrdl_base_addr;
415 struct utp_task_req_desc *utmrdl_base_addr;
416
417 /* DMA memory reference */
418 dma_addr_t ucdl_dma_addr;
419 dma_addr_t utrdl_dma_addr;
420 dma_addr_t utmrdl_dma_addr;
421
422 struct Scsi_Host *host;
423 struct device *dev;
2a8fa600
SJ
424 /*
425 * This field is to keep a reference to "scsi_device" corresponding to
426 * "UFS device" W-LU.
427 */
428 struct scsi_device *sdev_ufs_device;
e0eca63e 429
57d104c1
SJ
430 enum ufs_dev_pwr_mode curr_dev_pwr_mode;
431 enum uic_link_state uic_link_state;
432 /* Desired UFS power management level during runtime PM */
433 enum ufs_pm_level rpm_lvl;
434 /* Desired UFS power management level during system PM */
435 enum ufs_pm_level spm_lvl;
436 int pm_op_in_progress;
437
e0eca63e 438 struct ufshcd_lrb *lrb;
5a0b0cb9 439 unsigned long lrb_in_use;
e0eca63e
VH
440
441 unsigned long outstanding_tasks;
442 unsigned long outstanding_reqs;
443
444 u32 capabilities;
445 int nutrs;
446 int nutmrs;
447 u32 ufs_version;
5c0c28a8
SRT
448 struct ufs_hba_variant_ops *vops;
449 void *priv;
e0eca63e 450 unsigned int irq;
57d104c1 451 bool is_irq_enabled;
e0eca63e 452
b852190e
YG
453 /* Interrupt aggregation support is broken */
454 #define UFSHCD_QUIRK_BROKEN_INTR_AGGR UFS_BIT(0)
455
cad2e03d
YG
456 /*
457 * delay before each dme command is required as the unipro
458 * layer has shown instabilities
459 */
b852190e
YG
460 #define UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS UFS_BIT(1)
461
7ca38cf3
YG
462 /*
463 * If UFS host controller is having issue in processing LCC (Line
464 * Control Command) coming from device then enable this quirk.
465 * When this quirk is enabled, host controller driver should disable
466 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
467 * attribute of device to 0).
468 */
469 #define UFSHCD_QUIRK_BROKEN_LCC UFS_BIT(2)
cad2e03d 470
c3a2f9ee
YG
471 /*
472 * The attribute PA_RXHSUNTERMCAP specifies whether or not the
473 * inbound Link supports unterminated line in HS mode. Setting this
474 * attribute to 1 fixes moving to HS gear.
475 */
476 #define UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP UFS_BIT(3)
477
874237f7
YG
478 /*
479 * This quirk needs to be enabled if the host contoller only allows
480 * accessing the peer dme attributes in AUTO mode (FAST AUTO or
481 * SLOW AUTO).
482 */
483 #define UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE UFS_BIT(4)
484
9949e702
YG
485 /*
486 * This quirk needs to be enabled if the host contoller doesn't
487 * advertise the correct version in UFS_VER register. If this quirk
488 * is enabled, standard UFS host driver will call the vendor specific
489 * ops (get_ufs_hci_version) to get the correct version.
490 */
491 #define UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION UFS_BIT(5)
492
75b1cc4a
KK
493 /*
494 * This quirk needs to be enabled if the host contoller regards
495 * resolution of the values of PRDTO and PRDTL in UTRD as byte.
496 */
497 #define UFSHCD_QUIRK_PRDT_BYTE_GRAN UFS_BIT(7)
498
cad2e03d 499 unsigned int quirks; /* Deviations from standard UFSHCI spec. */
6ccf44fe 500
c58ab7aa
YG
501 /* Device deviations from standard UFS device spec. */
502 unsigned int dev_quirks;
503
e2933132
SRT
504 wait_queue_head_t tm_wq;
505 wait_queue_head_t tm_tag_wq;
e0eca63e 506 unsigned long tm_condition;
e2933132 507 unsigned long tm_slots_in_use;
e0eca63e 508
57d104c1
SJ
509 struct uic_command *active_uic_cmd;
510 struct mutex uic_cmd_mutex;
511 struct completion *uic_async_done;
53b3d9c3 512
e0eca63e 513 u32 ufshcd_state;
3441da7d 514 u32 eh_flags;
2fbd009b 515 u32 intr_mask;
66ec6d59 516 u16 ee_ctrl_mask;
1d337ec2 517 bool is_powered;
3a4bf06d
YG
518 bool is_init_prefetch;
519 struct ufs_init_prefetch init_prefetch_data;
e0eca63e
VH
520
521 /* Work Queues */
e8e7f271 522 struct work_struct eh_work;
66ec6d59 523 struct work_struct eeh_work;
e0eca63e
VH
524
525 /* HBA Errors */
526 u32 errors;
e8e7f271
SRT
527 u32 uic_error;
528 u32 saved_err;
529 u32 saved_uic_err;
5a0b0cb9
SRT
530
531 /* Device management request data */
532 struct ufs_dev_cmd dev_cmd;
cad2e03d 533 ktime_t last_dme_cmd_tstamp;
66ec6d59 534
57d104c1
SJ
535 /* Keeps information of the UFS device connected to this host */
536 struct ufs_dev_info dev_info;
66ec6d59 537 bool auto_bkops_enabled;
aa497613 538 struct ufs_vreg_info vreg_info;
c6e79dac 539 struct list_head clk_list_head;
57d104c1
SJ
540
541 bool wlun_dev_clr_ua;
7eb584db 542
54b879b7
YG
543 /* Number of lanes available (1 or 2) for Rx/Tx */
544 u32 lanes_per_direction;
7eb584db
DR
545 struct ufs_pa_layer_attr pwr_info;
546 struct ufs_pwr_mode_info max_pwr_info;
1ab27c9c
ST
547
548 struct ufs_clk_gating clk_gating;
549 /* Control to enable/disable host capabilities */
550 u32 caps;
551 /* Allow dynamic clk gating */
552#define UFSHCD_CAP_CLK_GATING (1 << 0)
553 /* Allow hiberb8 with clk gating */
554#define UFSHCD_CAP_HIBERN8_WITH_CLK_GATING (1 << 1)
856b3483
ST
555 /* Allow dynamic clk scaling */
556#define UFSHCD_CAP_CLK_SCALING (1 << 2)
374a246e
SJ
557 /* Allow auto bkops to enabled during runtime suspend */
558#define UFSHCD_CAP_AUTO_BKOPS_SUSPEND (1 << 3)
b852190e
YG
559 /*
560 * This capability allows host controller driver to use the UFS HCI's
561 * interrupt aggregation capability.
562 * CAUTION: Enabling this might reduce overall UFS throughput.
563 */
564#define UFSHCD_CAP_INTR_AGGR (1 << 4)
856b3483
ST
565
566 struct devfreq *devfreq;
567 struct ufs_clk_scaling clk_scaling;
e785060e 568 bool is_sys_suspended;
afdfff59
YG
569
570 enum bkops_status urgent_bkops_lvl;
571 bool is_urgent_bkops_lvl_checked;
e0eca63e
VH
572};
573
1ab27c9c
ST
574/* Returns true if clocks can be gated. Otherwise false */
575static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
576{
577 return hba->caps & UFSHCD_CAP_CLK_GATING;
578}
579static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
580{
581 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
582}
856b3483
ST
583static inline int ufshcd_is_clkscaling_enabled(struct ufs_hba *hba)
584{
585 return hba->caps & UFSHCD_CAP_CLK_SCALING;
586}
374a246e
SJ
587static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
588{
589 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
590}
591
b852190e
YG
592static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
593{
4b9ffb5a
JP
594/* DWC UFS Core has the Interrupt aggregation feature but is not detectable*/
595#ifndef CONFIG_SCSI_UFS_DWC
b852190e
YG
596 if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
597 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
598 return true;
599 else
600 return false;
4b9ffb5a
JP
601#else
602return true;
603#endif
b852190e
YG
604}
605
b873a275
SJ
606#define ufshcd_writel(hba, val, reg) \
607 writel((val), (hba)->mmio_base + (reg))
608#define ufshcd_readl(hba, reg) \
609 readl((hba)->mmio_base + (reg))
610
e785060e
DR
611/**
612 * ufshcd_rmwl - read modify write into a register
613 * @hba - per adapter instance
614 * @mask - mask to apply on read value
615 * @val - actual value to write
616 * @reg - register address
617 */
618static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
619{
620 u32 tmp;
621
622 tmp = ufshcd_readl(hba, reg);
623 tmp &= ~mask;
624 tmp |= (val & mask);
625 ufshcd_writel(hba, tmp, reg);
626}
627
5c0c28a8 628int ufshcd_alloc_host(struct device *, struct ufs_hba **);
47555a5c 629void ufshcd_dealloc_host(struct ufs_hba *);
5c0c28a8 630int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int);
e0eca63e 631void ufshcd_remove(struct ufs_hba *);
596585a2
YG
632int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
633 u32 val, unsigned long interval_us,
634 unsigned long timeout_ms, bool can_sleep);
e0eca63e 635
68078d5c
DR
636static inline void check_upiu_size(void)
637{
638 BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
639 GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
640}
641
1ce5898a
YG
642/**
643 * ufshcd_set_variant - set variant specific data to the hba
644 * @hba - per adapter instance
645 * @variant - pointer to variant specific data
646 */
647static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
648{
649 BUG_ON(!hba);
650 hba->priv = variant;
651}
652
653/**
654 * ufshcd_get_variant - get variant specific data from the hba
655 * @hba - per adapter instance
656 */
657static inline void *ufshcd_get_variant(struct ufs_hba *hba)
658{
659 BUG_ON(!hba);
660 return hba->priv;
661}
662
66ec6d59
SRT
663extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
664extern int ufshcd_runtime_resume(struct ufs_hba *hba);
665extern int ufshcd_runtime_idle(struct ufs_hba *hba);
57d104c1
SJ
666extern int ufshcd_system_suspend(struct ufs_hba *hba);
667extern int ufshcd_system_resume(struct ufs_hba *hba);
668extern int ufshcd_shutdown(struct ufs_hba *hba);
12b4fdb4
SJ
669extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
670 u8 attr_set, u32 mib_val, u8 peer);
671extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
672 u32 *mib_val, u8 peer);
673
674/* UIC command interfaces for DME primitives */
675#define DME_LOCAL 0
676#define DME_PEER 1
677#define ATTR_SET_NOR 0 /* NORMAL */
678#define ATTR_SET_ST 1 /* STATIC */
679
680static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
681 u32 mib_val)
682{
683 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
684 mib_val, DME_LOCAL);
685}
686
687static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
688 u32 mib_val)
689{
690 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
691 mib_val, DME_LOCAL);
692}
693
694static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
695 u32 mib_val)
696{
697 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
698 mib_val, DME_PEER);
699}
700
701static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
702 u32 mib_val)
703{
704 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
705 mib_val, DME_PEER);
706}
707
708static inline int ufshcd_dme_get(struct ufs_hba *hba,
709 u32 attr_sel, u32 *mib_val)
710{
711 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
712}
713
714static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
715 u32 attr_sel, u32 *mib_val)
716{
717 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
718}
719
b573d484
YG
720int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size);
721
f37aabcf
YG
722static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info)
723{
724 return (pwr_info->pwr_rx == FAST_MODE ||
725 pwr_info->pwr_rx == FASTAUTO_MODE) &&
726 (pwr_info->pwr_tx == FAST_MODE ||
727 pwr_info->pwr_tx == FASTAUTO_MODE);
728}
729
b573d484
YG
730#define ASCII_STD true
731
732int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index, u8 *buf,
733 u32 size, bool ascii);
734
dc3c8d3a
YG
735/* Expose Query-Request API */
736int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
737 enum flag_idn idn, bool *flag_res);
1ab27c9c
ST
738int ufshcd_hold(struct ufs_hba *hba, bool async);
739void ufshcd_release(struct ufs_hba *hba);
37113106 740u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba);
0263bcd0
YG
741
742/* Wrapper functions for safely calling variant operations */
743static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
744{
745 if (hba->vops)
746 return hba->vops->name;
747 return "";
748}
749
750static inline int ufshcd_vops_init(struct ufs_hba *hba)
751{
752 if (hba->vops && hba->vops->init)
753 return hba->vops->init(hba);
754
755 return 0;
756}
757
758static inline void ufshcd_vops_exit(struct ufs_hba *hba)
759{
760 if (hba->vops && hba->vops->exit)
761 return hba->vops->exit(hba);
762}
763
764static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
765{
766 if (hba->vops && hba->vops->get_ufs_hci_version)
767 return hba->vops->get_ufs_hci_version(hba);
768
769 return ufshcd_readl(hba, REG_UFS_VERSION);
770}
771
f06fcc71
YG
772static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
773 bool up, enum ufs_notify_change_status status)
0263bcd0
YG
774{
775 if (hba->vops && hba->vops->clk_scale_notify)
f06fcc71
YG
776 return hba->vops->clk_scale_notify(hba, up, status);
777 return 0;
0263bcd0
YG
778}
779
1e879e8f
SJ
780static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on,
781 enum ufs_notify_change_status status)
0263bcd0
YG
782{
783 if (hba->vops && hba->vops->setup_clocks)
1e879e8f 784 return hba->vops->setup_clocks(hba, on, status);
0263bcd0
YG
785 return 0;
786}
787
788static inline int ufshcd_vops_setup_regulators(struct ufs_hba *hba, bool status)
789{
790 if (hba->vops && hba->vops->setup_regulators)
791 return hba->vops->setup_regulators(hba, status);
792
793 return 0;
794}
795
796static inline int ufshcd_vops_hce_enable_notify(struct ufs_hba *hba,
797 bool status)
798{
799 if (hba->vops && hba->vops->hce_enable_notify)
800 return hba->vops->hce_enable_notify(hba, status);
801
802 return 0;
803}
804static inline int ufshcd_vops_link_startup_notify(struct ufs_hba *hba,
805 bool status)
806{
807 if (hba->vops && hba->vops->link_startup_notify)
808 return hba->vops->link_startup_notify(hba, status);
809
810 return 0;
811}
812
813static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
814 bool status,
815 struct ufs_pa_layer_attr *dev_max_params,
816 struct ufs_pa_layer_attr *dev_req_params)
817{
818 if (hba->vops && hba->vops->pwr_change_notify)
819 return hba->vops->pwr_change_notify(hba, status,
820 dev_max_params, dev_req_params);
821
822 return -ENOTSUPP;
823}
824
0e675efa
KK
825static inline void ufshcd_vops_setup_xfer_req(struct ufs_hba *hba, int tag,
826 bool is_scsi_cmd)
827{
828 if (hba->vops && hba->vops->setup_xfer_req)
829 return hba->vops->setup_xfer_req(hba, tag, is_scsi_cmd);
830}
831
d2877be4
KK
832static inline void ufshcd_vops_setup_task_mgmt(struct ufs_hba *hba,
833 int tag, u8 tm_function)
834{
835 if (hba->vops && hba->vops->setup_task_mgmt)
836 return hba->vops->setup_task_mgmt(hba, tag, tm_function);
837}
838
ee32c909
KK
839static inline void ufshcd_vops_hibern8_notify(struct ufs_hba *hba,
840 enum uic_cmd_dme cmd,
841 enum ufs_notify_change_status status)
842{
843 if (hba->vops && hba->vops->hibern8_notify)
844 return hba->vops->hibern8_notify(hba, cmd, status);
845}
846
56d4a186
SJ
847static inline int ufshcd_vops_apply_dev_quirks(struct ufs_hba *hba)
848{
849 if (hba->vops && hba->vops->apply_dev_quirks)
850 return hba->vops->apply_dev_quirks(hba);
851 return 0;
852}
853
0263bcd0
YG
854static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op)
855{
856 if (hba->vops && hba->vops->suspend)
857 return hba->vops->suspend(hba, op);
858
859 return 0;
860}
861
862static inline int ufshcd_vops_resume(struct ufs_hba *hba, enum ufs_pm_op op)
863{
864 if (hba->vops && hba->vops->resume)
865 return hba->vops->resume(hba, op);
866
867 return 0;
868}
869
6e3fd44d
YG
870static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba)
871{
872 if (hba->vops && hba->vops->dbg_register_dump)
873 hba->vops->dbg_register_dump(hba);
874}
875
e0eca63e 876#endif /* End of Header */