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Commit | Line | Data |
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48a31030 OZ |
1 | /* |
2 | * Driver for Western Digital WD7193, WD7197 and WD7296 SCSI cards | |
3 | * Copyright 2013 Ondrej Zary | |
4 | * | |
5 | * Original driver by | |
6 | * Aaron Dewell <dewell@woods.net> | |
7 | * Gaerti <Juergen.Gaertner@mbox.si.uni-hannover.de> | |
8 | * | |
9 | * HW documentation available in book: | |
10 | * | |
11 | * SPIDER Command Protocol | |
12 | * by Chandru M. Sippy | |
13 | * SCSI Storage Products (MCP) | |
14 | * Western Digital Corporation | |
15 | * 09-15-95 | |
16 | * | |
17 | * http://web.archive.org/web/20070717175254/http://sun1.rrzn.uni-hannover.de/gaertner.juergen/wd719x/Linux/Docu/Spider/ | |
18 | */ | |
19 | ||
20 | /* | |
21 | * Driver workflow: | |
22 | * 1. SCSI command is transformed to SCB (Spider Control Block) by the | |
23 | * queuecommand function. | |
24 | * 2. The address of the SCB is stored in a list to be able to access it, if | |
25 | * something goes wrong. | |
26 | * 3. The address of the SCB is written to the Controller, which loads the SCB | |
27 | * via BM-DMA and processes it. | |
28 | * 4. After it has finished, it generates an interrupt, and sets registers. | |
29 | * | |
30 | * flaws: | |
31 | * - abort/reset functions | |
32 | * | |
33 | * ToDo: | |
34 | * - tagged queueing | |
35 | */ | |
36 | ||
37 | #include <linux/interrupt.h> | |
38 | #include <linux/module.h> | |
39 | #include <linux/delay.h> | |
40 | #include <linux/pci.h> | |
41 | #include <linux/firmware.h> | |
42 | #include <linux/eeprom_93cx6.h> | |
43 | #include <scsi/scsi_cmnd.h> | |
44 | #include <scsi/scsi_device.h> | |
45 | #include <scsi/scsi_host.h> | |
46 | #include "wd719x.h" | |
47 | ||
48 | /* low-level register access */ | |
49 | static inline u8 wd719x_readb(struct wd719x *wd, u8 reg) | |
50 | { | |
51 | return ioread8(wd->base + reg); | |
52 | } | |
53 | ||
54 | static inline u32 wd719x_readl(struct wd719x *wd, u8 reg) | |
55 | { | |
56 | return ioread32(wd->base + reg); | |
57 | } | |
58 | ||
59 | static inline void wd719x_writeb(struct wd719x *wd, u8 reg, u8 val) | |
60 | { | |
61 | iowrite8(val, wd->base + reg); | |
62 | } | |
63 | ||
64 | static inline void wd719x_writew(struct wd719x *wd, u8 reg, u16 val) | |
65 | { | |
66 | iowrite16(val, wd->base + reg); | |
67 | } | |
68 | ||
69 | static inline void wd719x_writel(struct wd719x *wd, u8 reg, u32 val) | |
70 | { | |
71 | iowrite32(val, wd->base + reg); | |
72 | } | |
73 | ||
74 | /* wait until the command register is ready */ | |
75 | static inline int wd719x_wait_ready(struct wd719x *wd) | |
76 | { | |
77 | int i = 0; | |
78 | ||
79 | do { | |
80 | if (wd719x_readb(wd, WD719X_AMR_COMMAND) == WD719X_CMD_READY) | |
81 | return 0; | |
82 | udelay(1); | |
83 | } while (i++ < WD719X_WAIT_FOR_CMD_READY); | |
84 | ||
85 | dev_err(&wd->pdev->dev, "command register is not ready: 0x%02x\n", | |
86 | wd719x_readb(wd, WD719X_AMR_COMMAND)); | |
87 | ||
88 | return -ETIMEDOUT; | |
89 | } | |
90 | ||
91 | /* poll interrupt status register until command finishes */ | |
92 | static inline int wd719x_wait_done(struct wd719x *wd, int timeout) | |
93 | { | |
94 | u8 status; | |
95 | ||
96 | while (timeout > 0) { | |
97 | status = wd719x_readb(wd, WD719X_AMR_INT_STATUS); | |
98 | if (status) | |
99 | break; | |
100 | timeout--; | |
101 | udelay(1); | |
102 | } | |
103 | ||
104 | if (timeout <= 0) { | |
105 | dev_err(&wd->pdev->dev, "direct command timed out\n"); | |
106 | return -ETIMEDOUT; | |
107 | } | |
108 | ||
109 | if (status != WD719X_INT_NOERRORS) { | |
110 | dev_err(&wd->pdev->dev, "direct command failed, status 0x%02x, SUE 0x%02x\n", | |
111 | status, wd719x_readb(wd, WD719X_AMR_SCB_ERROR)); | |
112 | return -EIO; | |
113 | } | |
114 | ||
115 | return 0; | |
116 | } | |
117 | ||
118 | static int wd719x_direct_cmd(struct wd719x *wd, u8 opcode, u8 dev, u8 lun, | |
119 | u8 tag, dma_addr_t data, int timeout) | |
120 | { | |
121 | int ret = 0; | |
122 | ||
123 | /* clear interrupt status register (allow command register to clear) */ | |
124 | wd719x_writeb(wd, WD719X_AMR_INT_STATUS, WD719X_INT_NONE); | |
125 | ||
126 | /* Wait for the Command register to become free */ | |
127 | if (wd719x_wait_ready(wd)) | |
128 | return -ETIMEDOUT; | |
129 | ||
130 | /* make sure we get NO interrupts */ | |
131 | dev |= WD719X_DISABLE_INT; | |
132 | wd719x_writeb(wd, WD719X_AMR_CMD_PARAM, dev); | |
133 | wd719x_writeb(wd, WD719X_AMR_CMD_PARAM_2, lun); | |
134 | wd719x_writeb(wd, WD719X_AMR_CMD_PARAM_3, tag); | |
135 | if (data) | |
136 | wd719x_writel(wd, WD719X_AMR_SCB_IN, data); | |
137 | ||
138 | /* clear interrupt status register again */ | |
139 | wd719x_writeb(wd, WD719X_AMR_INT_STATUS, WD719X_INT_NONE); | |
140 | ||
141 | /* Now, write the command */ | |
142 | wd719x_writeb(wd, WD719X_AMR_COMMAND, opcode); | |
143 | ||
144 | if (timeout) /* wait for the command to complete */ | |
145 | ret = wd719x_wait_done(wd, timeout); | |
146 | ||
147 | /* clear interrupt status register (clean up) */ | |
148 | if (opcode != WD719X_CMD_READ_FIRMVER) | |
149 | wd719x_writeb(wd, WD719X_AMR_INT_STATUS, WD719X_INT_NONE); | |
150 | ||
151 | return ret; | |
152 | } | |
153 | ||
154 | static void wd719x_destroy(struct wd719x *wd) | |
155 | { | |
156 | struct wd719x_scb *scb; | |
157 | ||
158 | /* stop the RISC */ | |
159 | if (wd719x_direct_cmd(wd, WD719X_CMD_SLEEP, 0, 0, 0, 0, | |
160 | WD719X_WAIT_FOR_RISC)) | |
161 | dev_warn(&wd->pdev->dev, "RISC sleep command failed\n"); | |
162 | /* disable RISC */ | |
163 | wd719x_writeb(wd, WD719X_PCI_MODE_SELECT, 0); | |
164 | ||
165 | /* free all SCBs */ | |
166 | list_for_each_entry(scb, &wd->active_scbs, list) | |
167 | pci_free_consistent(wd->pdev, sizeof(struct wd719x_scb), scb, | |
168 | scb->phys); | |
169 | list_for_each_entry(scb, &wd->free_scbs, list) | |
170 | pci_free_consistent(wd->pdev, sizeof(struct wd719x_scb), scb, | |
171 | scb->phys); | |
172 | /* free internal buffers */ | |
173 | pci_free_consistent(wd->pdev, wd->fw_size, wd->fw_virt, wd->fw_phys); | |
174 | wd->fw_virt = NULL; | |
175 | pci_free_consistent(wd->pdev, WD719X_HASH_TABLE_SIZE, wd->hash_virt, | |
176 | wd->hash_phys); | |
177 | wd->hash_virt = NULL; | |
178 | pci_free_consistent(wd->pdev, sizeof(struct wd719x_host_param), | |
179 | wd->params, wd->params_phys); | |
180 | wd->params = NULL; | |
181 | free_irq(wd->pdev->irq, wd); | |
182 | } | |
183 | ||
184 | /* finish a SCSI command, mark SCB (if any) as free, unmap buffers */ | |
185 | static void wd719x_finish_cmd(struct scsi_cmnd *cmd, int result) | |
186 | { | |
187 | struct wd719x *wd = shost_priv(cmd->device->host); | |
188 | struct wd719x_scb *scb = (struct wd719x_scb *) cmd->host_scribble; | |
189 | ||
190 | if (scb) { | |
191 | list_move(&scb->list, &wd->free_scbs); | |
192 | dma_unmap_single(&wd->pdev->dev, cmd->SCp.dma_handle, | |
193 | SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE); | |
194 | scsi_dma_unmap(cmd); | |
195 | } | |
196 | cmd->result = result << 16; | |
197 | cmd->scsi_done(cmd); | |
198 | } | |
199 | ||
200 | /* Build a SCB and send it to the card */ | |
201 | static int wd719x_queuecommand(struct Scsi_Host *sh, struct scsi_cmnd *cmd) | |
202 | { | |
203 | int i, count_sg; | |
204 | unsigned long flags; | |
205 | struct wd719x_scb *scb; | |
206 | struct wd719x *wd = shost_priv(sh); | |
207 | dma_addr_t phys; | |
208 | ||
209 | cmd->host_scribble = NULL; | |
210 | ||
211 | /* get a free SCB - either from existing ones or allocate a new one */ | |
212 | spin_lock_irqsave(wd->sh->host_lock, flags); | |
213 | scb = list_first_entry_or_null(&wd->free_scbs, struct wd719x_scb, list); | |
214 | if (scb) { | |
215 | list_del(&scb->list); | |
216 | phys = scb->phys; | |
217 | } else { | |
218 | spin_unlock_irqrestore(wd->sh->host_lock, flags); | |
219 | scb = pci_alloc_consistent(wd->pdev, sizeof(struct wd719x_scb), | |
220 | &phys); | |
221 | spin_lock_irqsave(wd->sh->host_lock, flags); | |
222 | if (!scb) { | |
223 | dev_err(&wd->pdev->dev, "unable to allocate SCB\n"); | |
224 | wd719x_finish_cmd(cmd, DID_ERROR); | |
225 | spin_unlock_irqrestore(wd->sh->host_lock, flags); | |
226 | return 0; | |
227 | } | |
228 | } | |
229 | memset(scb, 0, sizeof(struct wd719x_scb)); | |
230 | list_add(&scb->list, &wd->active_scbs); | |
231 | ||
232 | scb->phys = phys; | |
233 | scb->cmd = cmd; | |
234 | cmd->host_scribble = (char *) scb; | |
235 | ||
236 | scb->CDB_tag = 0; /* Tagged queueing not supported yet */ | |
237 | scb->devid = cmd->device->id; | |
238 | scb->lun = cmd->device->lun; | |
239 | ||
240 | /* copy the command */ | |
241 | memcpy(scb->CDB, cmd->cmnd, cmd->cmd_len); | |
242 | ||
243 | /* map sense buffer */ | |
244 | scb->sense_buf_length = SCSI_SENSE_BUFFERSIZE; | |
245 | cmd->SCp.dma_handle = dma_map_single(&wd->pdev->dev, cmd->sense_buffer, | |
246 | SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE); | |
48a31030 OZ |
247 | scb->sense_buf = cpu_to_le32(cmd->SCp.dma_handle); |
248 | ||
249 | /* request autosense */ | |
250 | scb->SCB_options |= WD719X_SCB_FLAGS_AUTO_REQUEST_SENSE; | |
251 | ||
252 | /* check direction */ | |
253 | if (cmd->sc_data_direction == DMA_TO_DEVICE) | |
254 | scb->SCB_options |= WD719X_SCB_FLAGS_CHECK_DIRECTION | |
255 | | WD719X_SCB_FLAGS_PCI_TO_SCSI; | |
256 | else if (cmd->sc_data_direction == DMA_FROM_DEVICE) | |
257 | scb->SCB_options |= WD719X_SCB_FLAGS_CHECK_DIRECTION; | |
258 | ||
259 | /* Scather/gather */ | |
260 | count_sg = scsi_dma_map(cmd); | |
261 | if (count_sg < 0) { | |
262 | wd719x_finish_cmd(cmd, DID_ERROR); | |
263 | spin_unlock_irqrestore(wd->sh->host_lock, flags); | |
264 | return 0; | |
265 | } | |
266 | BUG_ON(count_sg > WD719X_SG); | |
267 | ||
268 | if (count_sg) { | |
269 | struct scatterlist *sg; | |
270 | ||
271 | scb->data_length = cpu_to_le32(count_sg * | |
272 | sizeof(struct wd719x_sglist)); | |
273 | scb->data_p = cpu_to_le32(scb->phys + | |
274 | offsetof(struct wd719x_scb, sg_list)); | |
275 | ||
276 | scsi_for_each_sg(cmd, sg, count_sg, i) { | |
277 | scb->sg_list[i].ptr = cpu_to_le32(sg_dma_address(sg)); | |
278 | scb->sg_list[i].length = cpu_to_le32(sg_dma_len(sg)); | |
279 | } | |
280 | scb->SCB_options |= WD719X_SCB_FLAGS_DO_SCATTER_GATHER; | |
281 | } else { /* zero length */ | |
282 | scb->data_length = 0; | |
283 | scb->data_p = 0; | |
284 | } | |
285 | ||
286 | /* check if the Command register is free */ | |
287 | if (wd719x_readb(wd, WD719X_AMR_COMMAND) != WD719X_CMD_READY) { | |
288 | spin_unlock_irqrestore(wd->sh->host_lock, flags); | |
289 | return SCSI_MLQUEUE_HOST_BUSY; | |
290 | } | |
291 | ||
292 | /* write pointer to the AMR */ | |
293 | wd719x_writel(wd, WD719X_AMR_SCB_IN, scb->phys); | |
294 | /* send SCB opcode */ | |
295 | wd719x_writeb(wd, WD719X_AMR_COMMAND, WD719X_CMD_PROCESS_SCB); | |
296 | ||
297 | spin_unlock_irqrestore(wd->sh->host_lock, flags); | |
298 | ||
299 | return 0; | |
300 | } | |
301 | ||
302 | static int wd719x_chip_init(struct wd719x *wd) | |
303 | { | |
304 | int i, ret; | |
305 | u32 risc_init[3]; | |
306 | const struct firmware *fw_wcs, *fw_risc; | |
307 | const char fwname_wcs[] = "wd719x-wcs.bin"; | |
308 | const char fwname_risc[] = "wd719x-risc.bin"; | |
309 | ||
310 | memset(wd->hash_virt, 0, WD719X_HASH_TABLE_SIZE); | |
311 | ||
312 | /* WCS (sequencer) firmware */ | |
313 | ret = request_firmware(&fw_wcs, fwname_wcs, &wd->pdev->dev); | |
314 | if (ret) { | |
315 | dev_err(&wd->pdev->dev, "Unable to load firmware %s: %d\n", | |
316 | fwname_wcs, ret); | |
317 | return ret; | |
318 | } | |
319 | /* RISC firmware */ | |
320 | ret = request_firmware(&fw_risc, fwname_risc, &wd->pdev->dev); | |
321 | if (ret) { | |
322 | dev_err(&wd->pdev->dev, "Unable to load firmware %s: %d\n", | |
323 | fwname_risc, ret); | |
324 | release_firmware(fw_wcs); | |
325 | return ret; | |
326 | } | |
327 | wd->fw_size = ALIGN(fw_wcs->size, 4) + fw_risc->size; | |
328 | ||
329 | if (!wd->fw_virt) | |
330 | wd->fw_virt = pci_alloc_consistent(wd->pdev, wd->fw_size, | |
331 | &wd->fw_phys); | |
332 | if (!wd->fw_virt) { | |
333 | ret = -ENOMEM; | |
334 | goto wd719x_init_end; | |
335 | } | |
336 | ||
337 | /* make a fresh copy of WCS and RISC code */ | |
338 | memcpy(wd->fw_virt, fw_wcs->data, fw_wcs->size); | |
339 | memcpy(wd->fw_virt + ALIGN(fw_wcs->size, 4), fw_risc->data, | |
340 | fw_risc->size); | |
341 | ||
342 | /* Reset the Spider Chip and adapter itself */ | |
343 | wd719x_writeb(wd, WD719X_PCI_PORT_RESET, WD719X_PCI_RESET); | |
344 | udelay(WD719X_WAIT_FOR_RISC); | |
345 | /* Clear PIO mode bits set by BIOS */ | |
346 | wd719x_writeb(wd, WD719X_AMR_CMD_PARAM, 0); | |
347 | /* ensure RISC is not running */ | |
348 | wd719x_writeb(wd, WD719X_PCI_MODE_SELECT, 0); | |
349 | /* ensure command port is ready */ | |
350 | wd719x_writeb(wd, WD719X_AMR_COMMAND, 0); | |
351 | if (wd719x_wait_ready(wd)) { | |
352 | ret = -ETIMEDOUT; | |
353 | goto wd719x_init_end; | |
354 | } | |
355 | ||
356 | /* Transfer the first 2K words of RISC code to kick start the uP */ | |
357 | risc_init[0] = wd->fw_phys; /* WCS FW */ | |
358 | risc_init[1] = wd->fw_phys + ALIGN(fw_wcs->size, 4); /* RISC FW */ | |
359 | risc_init[2] = wd->hash_phys; /* hash table */ | |
360 | ||
361 | /* clear DMA status */ | |
362 | wd719x_writeb(wd, WD719X_PCI_CHANNEL2_3STATUS, 0); | |
363 | ||
364 | /* address to read firmware from */ | |
365 | wd719x_writel(wd, WD719X_PCI_EXTERNAL_ADDR, risc_init[1]); | |
366 | /* base address to write firmware to (on card) */ | |
367 | wd719x_writew(wd, WD719X_PCI_INTERNAL_ADDR, WD719X_PRAM_BASE_ADDR); | |
368 | /* size: first 2K words */ | |
369 | wd719x_writew(wd, WD719X_PCI_DMA_TRANSFER_SIZE, 2048 * 2); | |
370 | /* start DMA */ | |
371 | wd719x_writeb(wd, WD719X_PCI_CHANNEL2_3CMD, WD719X_START_CHANNEL2_3DMA); | |
372 | ||
373 | /* wait for DMA to complete */ | |
374 | i = WD719X_WAIT_FOR_RISC; | |
375 | while (i-- > 0) { | |
376 | u8 status = wd719x_readb(wd, WD719X_PCI_CHANNEL2_3STATUS); | |
377 | if (status == WD719X_START_CHANNEL2_3DONE) | |
378 | break; | |
379 | if (status == WD719X_START_CHANNEL2_3ABORT) { | |
380 | dev_warn(&wd->pdev->dev, "RISC bootstrap failed: DMA aborted\n"); | |
381 | ret = -EIO; | |
382 | goto wd719x_init_end; | |
383 | } | |
384 | udelay(1); | |
385 | } | |
386 | if (i < 1) { | |
387 | dev_warn(&wd->pdev->dev, "RISC bootstrap failed: DMA timeout\n"); | |
388 | ret = -ETIMEDOUT; | |
389 | goto wd719x_init_end; | |
390 | } | |
391 | ||
392 | /* firmware is loaded, now initialize and wake up the RISC */ | |
393 | /* write RISC initialization long words to Spider */ | |
394 | wd719x_writel(wd, WD719X_AMR_SCB_IN, risc_init[0]); | |
395 | wd719x_writel(wd, WD719X_AMR_SCB_IN + 4, risc_init[1]); | |
396 | wd719x_writel(wd, WD719X_AMR_SCB_IN + 8, risc_init[2]); | |
397 | ||
398 | /* disable interrupts during initialization of RISC */ | |
399 | wd719x_writeb(wd, WD719X_AMR_CMD_PARAM, WD719X_DISABLE_INT); | |
400 | ||
401 | /* issue INITIALIZE RISC comand */ | |
402 | wd719x_writeb(wd, WD719X_AMR_COMMAND, WD719X_CMD_INIT_RISC); | |
403 | /* enable advanced mode (wake up RISC) */ | |
404 | wd719x_writeb(wd, WD719X_PCI_MODE_SELECT, WD719X_ENABLE_ADVANCE_MODE); | |
405 | udelay(WD719X_WAIT_FOR_RISC); | |
406 | ||
407 | ret = wd719x_wait_done(wd, WD719X_WAIT_FOR_RISC); | |
408 | /* clear interrupt status register */ | |
409 | wd719x_writeb(wd, WD719X_AMR_INT_STATUS, WD719X_INT_NONE); | |
410 | if (ret) { | |
411 | dev_warn(&wd->pdev->dev, "Unable to initialize RISC\n"); | |
412 | goto wd719x_init_end; | |
413 | } | |
414 | /* RISC is up and running */ | |
415 | ||
416 | /* Read FW version from RISC */ | |
417 | ret = wd719x_direct_cmd(wd, WD719X_CMD_READ_FIRMVER, 0, 0, 0, 0, | |
418 | WD719X_WAIT_FOR_RISC); | |
419 | if (ret) { | |
420 | dev_warn(&wd->pdev->dev, "Unable to read firmware version\n"); | |
421 | goto wd719x_init_end; | |
422 | } | |
423 | dev_info(&wd->pdev->dev, "RISC initialized with firmware version %.2x.%.2x\n", | |
424 | wd719x_readb(wd, WD719X_AMR_SCB_OUT + 1), | |
425 | wd719x_readb(wd, WD719X_AMR_SCB_OUT)); | |
426 | ||
427 | /* RESET SCSI bus */ | |
428 | ret = wd719x_direct_cmd(wd, WD719X_CMD_BUSRESET, 0, 0, 0, 0, | |
429 | WD719X_WAIT_FOR_SCSI_RESET); | |
430 | if (ret) { | |
431 | dev_warn(&wd->pdev->dev, "SCSI bus reset failed\n"); | |
432 | goto wd719x_init_end; | |
433 | } | |
434 | ||
435 | /* use HostParameter structure to set Spider's Host Parameter Block */ | |
436 | ret = wd719x_direct_cmd(wd, WD719X_CMD_SET_PARAM, 0, | |
437 | sizeof(struct wd719x_host_param), 0, | |
438 | wd->params_phys, WD719X_WAIT_FOR_RISC); | |
439 | if (ret) { | |
440 | dev_warn(&wd->pdev->dev, "Failed to set HOST PARAMETERS\n"); | |
441 | goto wd719x_init_end; | |
442 | } | |
443 | ||
444 | /* initiate SCAM (does nothing if disabled in BIOS) */ | |
445 | /* bug?: we should pass a mask of static IDs which we don't have */ | |
446 | ret = wd719x_direct_cmd(wd, WD719X_CMD_INIT_SCAM, 0, 0, 0, 0, | |
447 | WD719X_WAIT_FOR_SCSI_RESET); | |
448 | if (ret) { | |
449 | dev_warn(&wd->pdev->dev, "SCAM initialization failed\n"); | |
450 | goto wd719x_init_end; | |
451 | } | |
452 | ||
453 | /* clear AMR_BIOS_SHARE_INT register */ | |
454 | wd719x_writeb(wd, WD719X_AMR_BIOS_SHARE_INT, 0); | |
455 | ||
456 | wd719x_init_end: | |
457 | release_firmware(fw_wcs); | |
458 | release_firmware(fw_risc); | |
459 | ||
460 | return ret; | |
461 | } | |
462 | ||
463 | static int wd719x_abort(struct scsi_cmnd *cmd) | |
464 | { | |
465 | int action, result; | |
466 | unsigned long flags; | |
467 | struct wd719x_scb *scb = (struct wd719x_scb *)cmd->host_scribble; | |
468 | struct wd719x *wd = shost_priv(cmd->device->host); | |
469 | ||
470 | dev_info(&wd->pdev->dev, "abort command, tag: %x\n", cmd->tag); | |
471 | ||
472 | action = /*cmd->tag ? WD719X_CMD_ABORT_TAG : */WD719X_CMD_ABORT; | |
473 | ||
474 | spin_lock_irqsave(wd->sh->host_lock, flags); | |
475 | result = wd719x_direct_cmd(wd, action, cmd->device->id, | |
476 | cmd->device->lun, cmd->tag, scb->phys, 0); | |
477 | spin_unlock_irqrestore(wd->sh->host_lock, flags); | |
478 | if (result) | |
479 | return FAILED; | |
480 | ||
481 | return SUCCESS; | |
482 | } | |
483 | ||
484 | static int wd719x_reset(struct scsi_cmnd *cmd, u8 opcode, u8 device) | |
485 | { | |
486 | int result; | |
487 | unsigned long flags; | |
488 | struct wd719x *wd = shost_priv(cmd->device->host); | |
489 | ||
490 | dev_info(&wd->pdev->dev, "%s reset requested\n", | |
491 | (opcode == WD719X_CMD_BUSRESET) ? "bus" : "device"); | |
492 | ||
493 | spin_lock_irqsave(wd->sh->host_lock, flags); | |
494 | result = wd719x_direct_cmd(wd, opcode, device, 0, 0, 0, | |
495 | WD719X_WAIT_FOR_SCSI_RESET); | |
496 | spin_unlock_irqrestore(wd->sh->host_lock, flags); | |
497 | if (result) | |
498 | return FAILED; | |
499 | ||
500 | return SUCCESS; | |
501 | } | |
502 | ||
503 | static int wd719x_dev_reset(struct scsi_cmnd *cmd) | |
504 | { | |
505 | return wd719x_reset(cmd, WD719X_CMD_RESET, cmd->device->id); | |
506 | } | |
507 | ||
508 | static int wd719x_bus_reset(struct scsi_cmnd *cmd) | |
509 | { | |
510 | return wd719x_reset(cmd, WD719X_CMD_BUSRESET, 0); | |
511 | } | |
512 | ||
513 | static int wd719x_host_reset(struct scsi_cmnd *cmd) | |
514 | { | |
515 | struct wd719x *wd = shost_priv(cmd->device->host); | |
516 | struct wd719x_scb *scb, *tmp; | |
517 | unsigned long flags; | |
518 | int result; | |
519 | ||
520 | dev_info(&wd->pdev->dev, "host reset requested\n"); | |
521 | spin_lock_irqsave(wd->sh->host_lock, flags); | |
522 | /* Try to reinit the RISC */ | |
523 | if (wd719x_chip_init(wd) == 0) | |
524 | result = SUCCESS; | |
525 | else | |
526 | result = FAILED; | |
527 | ||
528 | /* flush all SCBs */ | |
529 | list_for_each_entry_safe(scb, tmp, &wd->active_scbs, list) { | |
530 | struct scsi_cmnd *tmp_cmd = scb->cmd; | |
531 | wd719x_finish_cmd(tmp_cmd, result); | |
532 | } | |
533 | spin_unlock_irqrestore(wd->sh->host_lock, flags); | |
534 | ||
535 | return result; | |
536 | } | |
537 | ||
538 | static int wd719x_biosparam(struct scsi_device *sdev, struct block_device *bdev, | |
539 | sector_t capacity, int geom[]) | |
540 | { | |
541 | if (capacity >= 0x200000) { | |
542 | geom[0] = 255; /* heads */ | |
543 | geom[1] = 63; /* sectors */ | |
544 | } else { | |
545 | geom[0] = 64; /* heads */ | |
546 | geom[1] = 32; /* sectors */ | |
547 | } | |
548 | geom[2] = sector_div(capacity, geom[0] * geom[1]); /* cylinders */ | |
549 | ||
550 | return 0; | |
551 | } | |
552 | ||
553 | /* process a SCB-completion interrupt */ | |
554 | static inline void wd719x_interrupt_SCB(struct wd719x *wd, | |
555 | union wd719x_regs regs, | |
556 | struct wd719x_scb *scb) | |
557 | { | |
558 | struct scsi_cmnd *cmd; | |
559 | int result; | |
560 | ||
561 | /* now have to find result from card */ | |
562 | switch (regs.bytes.SUE) { | |
563 | case WD719X_SUE_NOERRORS: | |
564 | result = DID_OK; | |
565 | break; | |
566 | case WD719X_SUE_REJECTED: | |
567 | dev_err(&wd->pdev->dev, "command rejected\n"); | |
568 | result = DID_ERROR; | |
569 | break; | |
570 | case WD719X_SUE_SCBQFULL: | |
571 | dev_err(&wd->pdev->dev, "SCB queue is full\n"); | |
572 | result = DID_ERROR; | |
573 | break; | |
574 | case WD719X_SUE_TERM: | |
575 | dev_dbg(&wd->pdev->dev, "SCB terminated by direct command\n"); | |
576 | result = DID_ABORT; /* or DID_RESET? */ | |
577 | break; | |
578 | case WD719X_SUE_CHAN1ABORT: | |
579 | case WD719X_SUE_CHAN23ABORT: | |
580 | result = DID_ABORT; | |
581 | dev_err(&wd->pdev->dev, "DMA abort\n"); | |
582 | break; | |
583 | case WD719X_SUE_CHAN1PAR: | |
584 | case WD719X_SUE_CHAN23PAR: | |
585 | result = DID_PARITY; | |
586 | dev_err(&wd->pdev->dev, "DMA parity error\n"); | |
587 | break; | |
588 | case WD719X_SUE_TIMEOUT: | |
589 | result = DID_TIME_OUT; | |
590 | dev_dbg(&wd->pdev->dev, "selection timeout\n"); | |
591 | break; | |
592 | case WD719X_SUE_RESET: | |
804ff603 | 593 | dev_dbg(&wd->pdev->dev, "bus reset occurred\n"); |
48a31030 OZ |
594 | result = DID_RESET; |
595 | break; | |
596 | case WD719X_SUE_BUSERROR: | |
597 | dev_dbg(&wd->pdev->dev, "SCSI bus error\n"); | |
598 | result = DID_ERROR; | |
599 | break; | |
600 | case WD719X_SUE_WRONGWAY: | |
601 | dev_err(&wd->pdev->dev, "wrong data transfer direction\n"); | |
602 | result = DID_ERROR; | |
603 | break; | |
604 | case WD719X_SUE_BADPHASE: | |
605 | dev_err(&wd->pdev->dev, "invalid SCSI phase\n"); | |
606 | result = DID_ERROR; | |
607 | break; | |
608 | case WD719X_SUE_TOOLONG: | |
609 | dev_err(&wd->pdev->dev, "record too long\n"); | |
610 | result = DID_ERROR; | |
611 | break; | |
612 | case WD719X_SUE_BUSFREE: | |
613 | dev_err(&wd->pdev->dev, "unexpected bus free\n"); | |
614 | result = DID_NO_CONNECT; /* or DID_ERROR ???*/ | |
615 | break; | |
616 | case WD719X_SUE_ARSDONE: | |
617 | dev_dbg(&wd->pdev->dev, "auto request sense\n"); | |
618 | if (regs.bytes.SCSI == 0) | |
619 | result = DID_OK; | |
620 | else | |
621 | result = DID_PARITY; | |
622 | break; | |
623 | case WD719X_SUE_IGNORED: | |
624 | dev_err(&wd->pdev->dev, "target id %d ignored command\n", | |
625 | scb->cmd->device->id); | |
626 | result = DID_NO_CONNECT; | |
627 | break; | |
628 | case WD719X_SUE_WRONGTAGS: | |
629 | dev_err(&wd->pdev->dev, "reversed tags\n"); | |
630 | result = DID_ERROR; | |
631 | break; | |
632 | case WD719X_SUE_BADTAGS: | |
633 | dev_err(&wd->pdev->dev, "tag type not supported by target\n"); | |
634 | result = DID_ERROR; | |
635 | break; | |
636 | case WD719X_SUE_NOSCAMID: | |
637 | dev_err(&wd->pdev->dev, "no SCAM soft ID available\n"); | |
638 | result = DID_ERROR; | |
639 | break; | |
640 | default: | |
641 | dev_warn(&wd->pdev->dev, "unknown SUE error code: 0x%x\n", | |
642 | regs.bytes.SUE); | |
643 | result = DID_ERROR; | |
644 | break; | |
645 | } | |
646 | cmd = scb->cmd; | |
647 | ||
648 | wd719x_finish_cmd(cmd, result); | |
649 | } | |
650 | ||
651 | static irqreturn_t wd719x_interrupt(int irq, void *dev_id) | |
652 | { | |
653 | struct wd719x *wd = dev_id; | |
654 | union wd719x_regs regs; | |
655 | unsigned long flags; | |
656 | u32 SCB_out; | |
657 | ||
658 | spin_lock_irqsave(wd->sh->host_lock, flags); | |
659 | /* read SCB pointer back from card */ | |
660 | SCB_out = wd719x_readl(wd, WD719X_AMR_SCB_OUT); | |
661 | /* read all status info at once */ | |
662 | regs.all = cpu_to_le32(wd719x_readl(wd, WD719X_AMR_OP_CODE)); | |
663 | ||
664 | switch (regs.bytes.INT) { | |
665 | case WD719X_INT_NONE: | |
666 | spin_unlock_irqrestore(wd->sh->host_lock, flags); | |
667 | return IRQ_NONE; | |
668 | case WD719X_INT_LINKNOSTATUS: | |
669 | dev_err(&wd->pdev->dev, "linked command completed with no status\n"); | |
670 | break; | |
671 | case WD719X_INT_BADINT: | |
672 | dev_err(&wd->pdev->dev, "unsolicited interrupt\n"); | |
673 | break; | |
674 | case WD719X_INT_NOERRORS: | |
675 | case WD719X_INT_LINKNOERRORS: | |
676 | case WD719X_INT_ERRORSLOGGED: | |
677 | case WD719X_INT_SPIDERFAILED: | |
678 | /* was the cmd completed a direct or SCB command? */ | |
679 | if (regs.bytes.OPC == WD719X_CMD_PROCESS_SCB) { | |
680 | struct wd719x_scb *scb; | |
681 | list_for_each_entry(scb, &wd->active_scbs, list) | |
682 | if (SCB_out == scb->phys) | |
683 | break; | |
684 | if (SCB_out == scb->phys) | |
685 | wd719x_interrupt_SCB(wd, regs, scb); | |
686 | else | |
687 | dev_err(&wd->pdev->dev, "card returned invalid SCB pointer\n"); | |
688 | } else | |
689 | dev_warn(&wd->pdev->dev, "direct command 0x%x completed\n", | |
690 | regs.bytes.OPC); | |
691 | break; | |
692 | case WD719X_INT_PIOREADY: | |
693 | dev_err(&wd->pdev->dev, "card indicates PIO data ready but we never use PIO\n"); | |
694 | /* interrupt will not be cleared until all data is read */ | |
695 | break; | |
696 | default: | |
697 | dev_err(&wd->pdev->dev, "unknown interrupt reason: %d\n", | |
698 | regs.bytes.INT); | |
699 | ||
700 | } | |
701 | /* clear interrupt so another can happen */ | |
702 | wd719x_writeb(wd, WD719X_AMR_INT_STATUS, WD719X_INT_NONE); | |
703 | spin_unlock_irqrestore(wd->sh->host_lock, flags); | |
704 | ||
705 | return IRQ_HANDLED; | |
706 | } | |
707 | ||
708 | static void wd719x_eeprom_reg_read(struct eeprom_93cx6 *eeprom) | |
709 | { | |
710 | struct wd719x *wd = eeprom->data; | |
711 | u8 reg = wd719x_readb(wd, WD719X_PCI_GPIO_DATA); | |
712 | ||
713 | eeprom->reg_data_out = reg & WD719X_EE_DO; | |
714 | } | |
715 | ||
716 | static void wd719x_eeprom_reg_write(struct eeprom_93cx6 *eeprom) | |
717 | { | |
718 | struct wd719x *wd = eeprom->data; | |
719 | u8 reg = 0; | |
720 | ||
721 | if (eeprom->reg_data_in) | |
722 | reg |= WD719X_EE_DI; | |
723 | if (eeprom->reg_data_clock) | |
724 | reg |= WD719X_EE_CLK; | |
725 | if (eeprom->reg_chip_select) | |
726 | reg |= WD719X_EE_CS; | |
727 | ||
728 | wd719x_writeb(wd, WD719X_PCI_GPIO_DATA, reg); | |
729 | } | |
730 | ||
731 | /* read config from EEPROM so it can be downloaded by the RISC on (re-)init */ | |
732 | static void wd719x_read_eeprom(struct wd719x *wd) | |
733 | { | |
734 | struct eeprom_93cx6 eeprom; | |
735 | u8 gpio; | |
736 | struct wd719x_eeprom_header header; | |
737 | ||
738 | eeprom.data = wd; | |
739 | eeprom.register_read = wd719x_eeprom_reg_read; | |
740 | eeprom.register_write = wd719x_eeprom_reg_write; | |
741 | eeprom.width = PCI_EEPROM_WIDTH_93C46; | |
742 | ||
743 | /* set all outputs to low */ | |
744 | wd719x_writeb(wd, WD719X_PCI_GPIO_DATA, 0); | |
745 | /* configure GPIO pins */ | |
746 | gpio = wd719x_readb(wd, WD719X_PCI_GPIO_CONTROL); | |
747 | /* GPIO outputs */ | |
748 | gpio &= (~(WD719X_EE_CLK | WD719X_EE_DI | WD719X_EE_CS)); | |
749 | /* GPIO input */ | |
750 | gpio |= WD719X_EE_DO; | |
751 | wd719x_writeb(wd, WD719X_PCI_GPIO_CONTROL, gpio); | |
752 | ||
753 | /* read EEPROM header */ | |
754 | eeprom_93cx6_multireadb(&eeprom, 0, (u8 *)&header, sizeof(header)); | |
755 | ||
756 | if (header.sig1 == 'W' && header.sig2 == 'D') | |
757 | eeprom_93cx6_multireadb(&eeprom, header.cfg_offset, | |
758 | (u8 *)wd->params, | |
759 | sizeof(struct wd719x_host_param)); | |
760 | else { /* default EEPROM values */ | |
761 | dev_warn(&wd->pdev->dev, "EEPROM signature is invalid (0x%02x 0x%02x), using default values\n", | |
762 | header.sig1, header.sig2); | |
763 | wd->params->ch_1_th = 0x10; /* 16 DWs = 64 B */ | |
764 | wd->params->scsi_conf = 0x4c; /* 48ma, spue, parity check */ | |
765 | wd->params->own_scsi_id = 0x07; /* ID 7, SCAM disabled */ | |
766 | wd->params->sel_timeout = 0x4d; /* 250 ms */ | |
767 | wd->params->sleep_timer = 0x01; | |
768 | wd->params->cdb_size = cpu_to_le16(0x5555); /* all 6 B */ | |
769 | wd->params->scsi_pad = 0x1b; | |
770 | if (wd->type == WD719X_TYPE_7193) /* narrow card - disable */ | |
771 | wd->params->wide = cpu_to_le32(0x00000000); | |
772 | else /* initiate & respond to WIDE messages */ | |
773 | wd->params->wide = cpu_to_le32(0xffffffff); | |
774 | wd->params->sync = cpu_to_le32(0xffffffff); | |
775 | wd->params->soft_mask = 0x00; /* all disabled */ | |
776 | wd->params->unsol_mask = 0x00; /* all disabled */ | |
777 | } | |
778 | /* disable TAGGED messages */ | |
779 | wd->params->tag_en = cpu_to_le16(0x0000); | |
780 | } | |
781 | ||
782 | /* Read card type from GPIO bits 1 and 3 */ | |
783 | static enum wd719x_card_type wd719x_detect_type(struct wd719x *wd) | |
784 | { | |
785 | u8 card = wd719x_readb(wd, WD719X_PCI_GPIO_CONTROL); | |
786 | ||
787 | card |= WD719X_GPIO_ID_BITS; | |
788 | wd719x_writeb(wd, WD719X_PCI_GPIO_CONTROL, card); | |
789 | card = wd719x_readb(wd, WD719X_PCI_GPIO_DATA) & WD719X_GPIO_ID_BITS; | |
790 | switch (card) { | |
791 | case 0x08: | |
792 | return WD719X_TYPE_7193; | |
793 | case 0x02: | |
794 | return WD719X_TYPE_7197; | |
795 | case 0x00: | |
796 | return WD719X_TYPE_7296; | |
797 | default: | |
798 | dev_warn(&wd->pdev->dev, "unknown card type 0x%x\n", card); | |
799 | return WD719X_TYPE_UNKNOWN; | |
800 | } | |
801 | } | |
802 | ||
803 | static int wd719x_board_found(struct Scsi_Host *sh) | |
804 | { | |
805 | struct wd719x *wd = shost_priv(sh); | |
806 | char *card_types[] = { "Unknown card", "WD7193", "WD7197", "WD7296" }; | |
807 | int ret; | |
808 | ||
809 | INIT_LIST_HEAD(&wd->active_scbs); | |
810 | INIT_LIST_HEAD(&wd->free_scbs); | |
811 | ||
812 | sh->base = pci_resource_start(wd->pdev, 0); | |
813 | ||
814 | wd->type = wd719x_detect_type(wd); | |
815 | ||
816 | wd->sh = sh; | |
817 | sh->irq = wd->pdev->irq; | |
818 | wd->fw_virt = NULL; | |
819 | ||
820 | /* memory area for host (EEPROM) parameters */ | |
821 | wd->params = pci_alloc_consistent(wd->pdev, | |
822 | sizeof(struct wd719x_host_param), | |
823 | &wd->params_phys); | |
824 | if (!wd->params) { | |
825 | dev_warn(&wd->pdev->dev, "unable to allocate parameter buffer\n"); | |
826 | return -ENOMEM; | |
827 | } | |
828 | ||
829 | /* memory area for the RISC for hash table of outstanding requests */ | |
830 | wd->hash_virt = pci_alloc_consistent(wd->pdev, WD719X_HASH_TABLE_SIZE, | |
831 | &wd->hash_phys); | |
832 | if (!wd->hash_virt) { | |
833 | dev_warn(&wd->pdev->dev, "unable to allocate hash buffer\n"); | |
834 | ret = -ENOMEM; | |
835 | goto fail_free_params; | |
836 | } | |
837 | ||
838 | ret = request_irq(wd->pdev->irq, wd719x_interrupt, IRQF_SHARED, | |
839 | "wd719x", wd); | |
840 | if (ret) { | |
841 | dev_warn(&wd->pdev->dev, "unable to assign IRQ %d\n", | |
842 | wd->pdev->irq); | |
843 | goto fail_free_hash; | |
844 | } | |
845 | ||
846 | /* read parameters from EEPROM */ | |
847 | wd719x_read_eeprom(wd); | |
848 | ||
849 | ret = wd719x_chip_init(wd); | |
850 | if (ret) | |
851 | goto fail_free_irq; | |
852 | ||
853 | sh->this_id = wd->params->own_scsi_id & WD719X_EE_SCSI_ID_MASK; | |
854 | ||
855 | dev_info(&wd->pdev->dev, "%s at I/O 0x%lx, IRQ %u, SCSI ID %d\n", | |
856 | card_types[wd->type], sh->base, sh->irq, sh->this_id); | |
857 | ||
858 | return 0; | |
859 | ||
860 | fail_free_irq: | |
861 | free_irq(wd->pdev->irq, wd); | |
862 | fail_free_hash: | |
863 | pci_free_consistent(wd->pdev, WD719X_HASH_TABLE_SIZE, wd->hash_virt, | |
864 | wd->hash_phys); | |
865 | fail_free_params: | |
866 | pci_free_consistent(wd->pdev, sizeof(struct wd719x_host_param), | |
867 | wd->params, wd->params_phys); | |
868 | ||
869 | return ret; | |
870 | } | |
871 | ||
872 | static struct scsi_host_template wd719x_template = { | |
2ecf8e0a | 873 | .module = THIS_MODULE, |
48a31030 OZ |
874 | .name = "Western Digital 719x", |
875 | .queuecommand = wd719x_queuecommand, | |
876 | .eh_abort_handler = wd719x_abort, | |
877 | .eh_device_reset_handler = wd719x_dev_reset, | |
878 | .eh_bus_reset_handler = wd719x_bus_reset, | |
879 | .eh_host_reset_handler = wd719x_host_reset, | |
880 | .bios_param = wd719x_biosparam, | |
881 | .proc_name = "wd719x", | |
882 | .can_queue = 255, | |
883 | .this_id = 7, | |
884 | .sg_tablesize = WD719X_SG, | |
48a31030 OZ |
885 | .use_clustering = ENABLE_CLUSTERING, |
886 | }; | |
887 | ||
888 | static int wd719x_pci_probe(struct pci_dev *pdev, const struct pci_device_id *d) | |
889 | { | |
890 | int err; | |
891 | struct Scsi_Host *sh; | |
892 | struct wd719x *wd; | |
893 | ||
894 | err = pci_enable_device(pdev); | |
895 | if (err) | |
896 | goto fail; | |
897 | ||
898 | if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) { | |
899 | dev_warn(&pdev->dev, "Unable to set 32-bit DMA mask\n"); | |
900 | goto disable_device; | |
901 | } | |
902 | ||
903 | err = pci_request_regions(pdev, "wd719x"); | |
904 | if (err) | |
905 | goto disable_device; | |
906 | pci_set_master(pdev); | |
907 | ||
908 | err = -ENODEV; | |
909 | if (pci_resource_len(pdev, 0) == 0) | |
910 | goto release_region; | |
911 | ||
912 | err = -ENOMEM; | |
913 | sh = scsi_host_alloc(&wd719x_template, sizeof(struct wd719x)); | |
914 | if (!sh) | |
915 | goto release_region; | |
916 | ||
917 | wd = shost_priv(sh); | |
918 | wd->base = pci_iomap(pdev, 0, 0); | |
919 | if (!wd->base) | |
920 | goto free_host; | |
921 | wd->pdev = pdev; | |
922 | ||
923 | err = wd719x_board_found(sh); | |
924 | if (err) | |
925 | goto unmap; | |
926 | ||
927 | err = scsi_add_host(sh, &wd->pdev->dev); | |
928 | if (err) | |
929 | goto destroy; | |
930 | ||
931 | scsi_scan_host(sh); | |
932 | ||
933 | pci_set_drvdata(pdev, sh); | |
934 | return 0; | |
935 | ||
936 | destroy: | |
937 | wd719x_destroy(wd); | |
938 | unmap: | |
939 | pci_iounmap(pdev, wd->base); | |
940 | free_host: | |
941 | scsi_host_put(sh); | |
942 | release_region: | |
943 | pci_release_regions(pdev); | |
944 | disable_device: | |
945 | pci_disable_device(pdev); | |
946 | fail: | |
947 | return err; | |
948 | } | |
949 | ||
950 | ||
951 | static void wd719x_pci_remove(struct pci_dev *pdev) | |
952 | { | |
953 | struct Scsi_Host *sh = pci_get_drvdata(pdev); | |
954 | struct wd719x *wd = shost_priv(sh); | |
955 | ||
956 | scsi_remove_host(sh); | |
957 | wd719x_destroy(wd); | |
958 | pci_iounmap(pdev, wd->base); | |
959 | pci_release_regions(pdev); | |
960 | pci_disable_device(pdev); | |
961 | ||
962 | scsi_host_put(sh); | |
963 | } | |
964 | ||
965 | static DEFINE_PCI_DEVICE_TABLE(wd719x_pci_table) = { | |
966 | { PCI_DEVICE(PCI_VENDOR_ID_WD, 0x3296) }, | |
967 | {} | |
968 | }; | |
969 | ||
970 | MODULE_DEVICE_TABLE(pci, wd719x_pci_table); | |
971 | ||
972 | static struct pci_driver wd719x_pci_driver = { | |
973 | .name = "wd719x", | |
974 | .id_table = wd719x_pci_table, | |
975 | .probe = wd719x_pci_probe, | |
976 | .remove = wd719x_pci_remove, | |
977 | }; | |
978 | ||
979 | static int __init wd719x_init(void) | |
980 | { | |
981 | return pci_register_driver(&wd719x_pci_driver); | |
982 | } | |
983 | ||
984 | static void __exit wd719x_exit(void) | |
985 | { | |
986 | pci_unregister_driver(&wd719x_pci_driver); | |
987 | } | |
988 | ||
989 | module_init(wd719x_init); | |
990 | module_exit(wd719x_exit); | |
991 | ||
992 | MODULE_DESCRIPTION("Western Digital WD7193/7197/7296 SCSI driver"); | |
993 | MODULE_AUTHOR("Ondrej Zary, Aaron Dewell, Juergen Gaertner"); | |
994 | MODULE_LICENSE("GPL"); | |
995 | MODULE_FIRMWARE("wd719x-wcs.bin"); | |
996 | MODULE_FIRMWARE("wd719x-risc.bin"); |