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1da177e4 LT |
1 | /* |
2 | * UART driver for 68360 CPM SCC or SMC | |
3 | * Copyright (c) 2000 D. Jeff Dionne <jeff@uclinux.org>, | |
4 | * Copyright (c) 2000 Michael Leslie <mleslie@lineo.ca> | |
5 | * Copyright (c) 1997 Dan Malek <dmalek@jlc.net> | |
6 | * | |
7 | * I used the serial.c driver as the framework for this driver. | |
8 | * Give credit to those guys. | |
9 | * The original code was written for the MBX860 board. I tried to make | |
10 | * it generic, but there may be some assumptions in the structures that | |
11 | * have to be fixed later. | |
12 | * To save porting time, I did not bother to change any object names | |
13 | * that are not accessed outside of this file. | |
14 | * It still needs lots of work........When it was easy, I included code | |
15 | * to support the SCCs, but this has never been tested, nor is it complete. | |
16 | * Only the SCCs support modem control, so that is not complete either. | |
17 | * | |
18 | * This module exports the following rs232 io functions: | |
19 | * | |
20 | * int rs_360_init(void); | |
21 | */ | |
22 | ||
1da177e4 LT |
23 | #include <linux/module.h> |
24 | #include <linux/errno.h> | |
25 | #include <linux/signal.h> | |
26 | #include <linux/sched.h> | |
27 | #include <linux/timer.h> | |
28 | #include <linux/interrupt.h> | |
29 | #include <linux/tty.h> | |
30 | #include <linux/tty_flip.h> | |
31 | #include <linux/serial.h> | |
32 | #include <linux/serialP.h> | |
33 | #include <linux/major.h> | |
34 | #include <linux/string.h> | |
35 | #include <linux/fcntl.h> | |
36 | #include <linux/ptrace.h> | |
37 | #include <linux/mm.h> | |
38 | #include <linux/init.h> | |
39 | #include <linux/delay.h> | |
40 | #include <asm/irq.h> | |
41 | #include <asm/m68360.h> | |
42 | #include <asm/commproc.h> | |
43 | ||
44 | ||
45 | #ifdef CONFIG_KGDB | |
46 | extern void breakpoint(void); | |
47 | extern void set_debug_traps(void); | |
48 | extern int kgdb_output_string (const char* s, unsigned int count); | |
49 | #endif | |
50 | ||
51 | ||
52 | /* #ifdef CONFIG_SERIAL_CONSOLE */ /* This seems to be a post 2.0 thing - mles */ | |
53 | #include <linux/console.h> | |
d1ec61e6 | 54 | #include <linux/jiffies.h> |
1da177e4 LT |
55 | |
56 | /* this defines the index into rs_table for the port to use | |
57 | */ | |
58 | #ifndef CONFIG_SERIAL_CONSOLE_PORT | |
59 | #define CONFIG_SERIAL_CONSOLE_PORT 1 /* ie SMC2 - note USE_SMC2 must be defined */ | |
60 | #endif | |
61 | /* #endif */ | |
62 | ||
63 | #if 0 | |
64 | /* SCC2 for console | |
65 | */ | |
66 | #undef CONFIG_SERIAL_CONSOLE_PORT | |
67 | #define CONFIG_SERIAL_CONSOLE_PORT 2 | |
68 | #endif | |
69 | ||
70 | ||
71 | #define TX_WAKEUP ASYNC_SHARE_IRQ | |
72 | ||
73 | static char *serial_name = "CPM UART driver"; | |
74 | static char *serial_version = "0.03"; | |
75 | ||
76 | static struct tty_driver *serial_driver; | |
77 | int serial_console_setup(struct console *co, char *options); | |
78 | ||
79 | /* | |
80 | * Serial driver configuration section. Here are the various options: | |
81 | */ | |
82 | #define SERIAL_PARANOIA_CHECK | |
83 | #define CONFIG_SERIAL_NOPAUSE_IO | |
84 | #define SERIAL_DO_RESTART | |
85 | ||
86 | /* Set of debugging defines */ | |
87 | ||
88 | #undef SERIAL_DEBUG_INTR | |
89 | #undef SERIAL_DEBUG_OPEN | |
90 | #undef SERIAL_DEBUG_FLOW | |
91 | #undef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT | |
92 | ||
93 | #define _INLINE_ inline | |
94 | ||
95 | #define DBG_CNT(s) | |
96 | ||
97 | /* We overload some of the items in the data structure to meet our | |
98 | * needs. For example, the port address is the CPM parameter ram | |
99 | * offset for the SCC or SMC. The maximum number of ports is 4 SCCs and | |
100 | * 2 SMCs. The "hub6" field is used to indicate the channel number, with | |
101 | * a flag indicating SCC or SMC, and the number is used as an index into | |
102 | * the CPM parameter area for this device. | |
103 | * The "type" field is currently set to 0, for PORT_UNKNOWN. It is | |
104 | * not currently used. I should probably use it to indicate the port | |
105 | * type of SMC or SCC. | |
106 | * The SMCs do not support any modem control signals. | |
107 | */ | |
108 | #define smc_scc_num hub6 | |
109 | #define NUM_IS_SCC ((int)0x00010000) | |
110 | #define PORT_NUM(P) ((P) & 0x0000ffff) | |
111 | ||
112 | ||
113 | #if defined (CONFIG_UCQUICC) | |
114 | ||
115 | volatile extern void *_periph_base; | |
116 | /* sipex transceiver | |
117 | * mode bits for are on pins | |
118 | * | |
119 | * SCC2 d16..19 | |
120 | * SCC3 d20..23 | |
121 | * SCC4 d24..27 | |
122 | */ | |
123 | #define SIPEX_MODE(n,m) ((m & 0x0f)<<(16+4*(n-1))) | |
124 | ||
125 | static uint sipex_mode_bits = 0x00000000; | |
126 | ||
127 | #endif | |
128 | ||
129 | /* There is no `serial_state' defined back here in 2.0. | |
130 | * Try to get by with serial_struct | |
131 | */ | |
132 | /* #define serial_state serial_struct */ | |
133 | ||
134 | /* 2.4 -> 2.0 portability problem: async_icount in 2.4 has a few | |
135 | * extras: */ | |
136 | ||
137 | #if 0 | |
138 | struct async_icount_24 { | |
139 | __u32 cts, dsr, rng, dcd, tx, rx; | |
140 | __u32 frame, parity, overrun, brk; | |
141 | __u32 buf_overrun; | |
142 | } icount; | |
143 | #endif | |
144 | ||
145 | #if 0 | |
146 | ||
147 | struct serial_state { | |
148 | int magic; | |
149 | int baud_base; | |
150 | unsigned long port; | |
151 | int irq; | |
152 | int flags; | |
153 | int hub6; | |
154 | int type; | |
155 | int line; | |
156 | int revision; /* Chip revision (950) */ | |
157 | int xmit_fifo_size; | |
158 | int custom_divisor; | |
159 | int count; | |
160 | u8 *iomem_base; | |
161 | u16 iomem_reg_shift; | |
162 | unsigned short close_delay; | |
163 | unsigned short closing_wait; /* time to wait before closing */ | |
164 | struct async_icount_24 icount; | |
165 | int io_type; | |
166 | struct async_struct *info; | |
167 | }; | |
168 | #endif | |
169 | ||
170 | #define SSTATE_MAGIC 0x5302 | |
171 | ||
172 | ||
173 | ||
174 | /* SMC2 is sometimes used for low performance TDM interfaces. Define | |
175 | * this as 1 if you want SMC2 as a serial port UART managed by this driver. | |
176 | * Define this as 0 if you wish to use SMC2 for something else. | |
177 | */ | |
178 | #define USE_SMC2 1 | |
179 | ||
180 | #if 0 | |
181 | /* Define SCC to ttySx mapping. */ | |
182 | #define SCC_NUM_BASE (USE_SMC2 + 1) /* SCC base tty "number" */ | |
183 | ||
184 | /* Define which SCC is the first one to use for a serial port. These | |
185 | * are 0-based numbers, i.e. this assumes the first SCC (SCC1) is used | |
186 | * for Ethernet, and the first available SCC for serial UART is SCC2. | |
187 | * NOTE: IF YOU CHANGE THIS, you have to change the PROFF_xxx and | |
188 | * interrupt vectors in the table below to match. | |
189 | */ | |
190 | #define SCC_IDX_BASE 1 /* table index */ | |
191 | #endif | |
192 | ||
193 | ||
194 | /* Processors other than the 860 only get SMCs configured by default. | |
195 | * Either they don't have SCCs or they are allocated somewhere else. | |
196 | * Of course, there are now 860s without some SCCs, so we will need to | |
197 | * address that someday. | |
198 | * The Embedded Planet Multimedia I/O cards use TDM interfaces to the | |
199 | * stereo codec parts, and we use SMC2 to help support that. | |
200 | */ | |
201 | static struct serial_state rs_table[] = { | |
202 | /* type line PORT IRQ FLAGS smc_scc_num (F.K.A. hub6) */ | |
203 | { 0, 0, PRSLOT_SMC1, CPMVEC_SMC1, 0, 0 } /* SMC1 ttyS0 */ | |
204 | #if USE_SMC2 | |
205 | ,{ 0, 0, PRSLOT_SMC2, CPMVEC_SMC2, 0, 1 } /* SMC2 ttyS1 */ | |
206 | #endif | |
207 | ||
208 | #if defined(CONFIG_SERIAL_68360_SCC) | |
209 | ,{ 0, 0, PRSLOT_SCC2, CPMVEC_SCC2, 0, (NUM_IS_SCC | 1) } /* SCC2 ttyS2 */ | |
210 | ,{ 0, 0, PRSLOT_SCC3, CPMVEC_SCC3, 0, (NUM_IS_SCC | 2) } /* SCC3 ttyS3 */ | |
211 | ,{ 0, 0, PRSLOT_SCC4, CPMVEC_SCC4, 0, (NUM_IS_SCC | 3) } /* SCC4 ttyS4 */ | |
212 | #endif | |
213 | }; | |
214 | ||
215 | #define NR_PORTS (sizeof(rs_table)/sizeof(struct serial_state)) | |
216 | ||
217 | /* The number of buffer descriptors and their sizes. | |
218 | */ | |
219 | #define RX_NUM_FIFO 4 | |
220 | #define RX_BUF_SIZE 32 | |
221 | #define TX_NUM_FIFO 4 | |
222 | #define TX_BUF_SIZE 32 | |
223 | ||
224 | #define CONSOLE_NUM_FIFO 2 | |
225 | #define CONSOLE_BUF_SIZE 4 | |
226 | ||
227 | char *console_fifos[CONSOLE_NUM_FIFO * CONSOLE_BUF_SIZE]; | |
228 | ||
229 | /* The async_struct in serial.h does not really give us what we | |
230 | * need, so define our own here. | |
231 | */ | |
232 | typedef struct serial_info { | |
233 | int magic; | |
234 | int flags; | |
235 | ||
236 | struct serial_state *state; | |
237 | /* struct serial_struct *state; */ | |
238 | /* struct async_struct *state; */ | |
239 | ||
240 | struct tty_struct *tty; | |
241 | int read_status_mask; | |
242 | int ignore_status_mask; | |
243 | int timeout; | |
244 | int line; | |
245 | int x_char; /* xon/xoff character */ | |
246 | int close_delay; | |
247 | unsigned short closing_wait; | |
248 | unsigned short closing_wait2; | |
249 | unsigned long event; | |
250 | unsigned long last_active; | |
251 | int blocked_open; /* # of blocked opens */ | |
252 | struct work_struct tqueue; | |
253 | struct work_struct tqueue_hangup; | |
254 | wait_queue_head_t open_wait; | |
255 | wait_queue_head_t close_wait; | |
256 | ||
257 | ||
258 | /* CPM Buffer Descriptor pointers. | |
259 | */ | |
260 | QUICC_BD *rx_bd_base; | |
261 | QUICC_BD *rx_cur; | |
262 | QUICC_BD *tx_bd_base; | |
263 | QUICC_BD *tx_cur; | |
264 | } ser_info_t; | |
265 | ||
266 | ||
267 | /* since kmalloc_init() does not get called until much after this initialization: */ | |
268 | static ser_info_t quicc_ser_info[NR_PORTS]; | |
269 | static char rx_buf_pool[NR_PORTS * RX_NUM_FIFO * RX_BUF_SIZE]; | |
270 | static char tx_buf_pool[NR_PORTS * TX_NUM_FIFO * TX_BUF_SIZE]; | |
271 | ||
272 | static void change_speed(ser_info_t *info); | |
273 | static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout); | |
274 | ||
275 | static inline int serial_paranoia_check(ser_info_t *info, | |
276 | char *name, const char *routine) | |
277 | { | |
278 | #ifdef SERIAL_PARANOIA_CHECK | |
279 | static const char *badmagic = | |
280 | "Warning: bad magic number for serial struct (%s) in %s\n"; | |
281 | static const char *badinfo = | |
282 | "Warning: null async_struct for (%s) in %s\n"; | |
283 | ||
284 | if (!info) { | |
285 | printk(badinfo, name, routine); | |
286 | return 1; | |
287 | } | |
288 | if (info->magic != SERIAL_MAGIC) { | |
289 | printk(badmagic, name, routine); | |
290 | return 1; | |
291 | } | |
292 | #endif | |
293 | return 0; | |
294 | } | |
295 | ||
296 | /* | |
297 | * This is used to figure out the divisor speeds and the timeouts, | |
298 | * indexed by the termio value. The generic CPM functions are responsible | |
299 | * for setting and assigning baud rate generators for us. | |
300 | */ | |
301 | static int baud_table[] = { | |
302 | 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800, | |
303 | 9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 }; | |
304 | ||
305 | /* This sucks. There is a better way: */ | |
306 | #if defined(CONFIG_CONSOLE_9600) | |
307 | #define CONSOLE_BAUDRATE 9600 | |
308 | #elif defined(CONFIG_CONSOLE_19200) | |
309 | #define CONSOLE_BAUDRATE 19200 | |
310 | #elif defined(CONFIG_CONSOLE_115200) | |
311 | #define CONSOLE_BAUDRATE 115200 | |
312 | #else | |
313 | #warning "console baud rate undefined" | |
314 | #define CONSOLE_BAUDRATE 9600 | |
315 | #endif | |
316 | ||
317 | /* | |
318 | * ------------------------------------------------------------ | |
319 | * rs_stop() and rs_start() | |
320 | * | |
321 | * This routines are called before setting or resetting tty->stopped. | |
322 | * They enable or disable transmitter interrupts, as necessary. | |
323 | * ------------------------------------------------------------ | |
324 | */ | |
325 | static void rs_360_stop(struct tty_struct *tty) | |
326 | { | |
327 | ser_info_t *info = (ser_info_t *)tty->driver_data; | |
328 | int idx; | |
329 | unsigned long flags; | |
330 | volatile struct scc_regs *sccp; | |
331 | volatile struct smc_regs *smcp; | |
332 | ||
333 | if (serial_paranoia_check(info, tty->name, "rs_stop")) | |
334 | return; | |
335 | ||
336 | local_irq_save(flags); | |
337 | idx = PORT_NUM(info->state->smc_scc_num); | |
338 | if (info->state->smc_scc_num & NUM_IS_SCC) { | |
339 | sccp = &pquicc->scc_regs[idx]; | |
340 | sccp->scc_sccm &= ~UART_SCCM_TX; | |
341 | } else { | |
342 | /* smcp = &cpmp->cp_smc[idx]; */ | |
343 | smcp = &pquicc->smc_regs[idx]; | |
344 | smcp->smc_smcm &= ~SMCM_TX; | |
345 | } | |
346 | local_irq_restore(flags); | |
347 | } | |
348 | ||
349 | ||
350 | static void rs_360_start(struct tty_struct *tty) | |
351 | { | |
352 | ser_info_t *info = (ser_info_t *)tty->driver_data; | |
353 | int idx; | |
354 | unsigned long flags; | |
355 | volatile struct scc_regs *sccp; | |
356 | volatile struct smc_regs *smcp; | |
357 | ||
358 | if (serial_paranoia_check(info, tty->name, "rs_stop")) | |
359 | return; | |
360 | ||
361 | local_irq_save(flags); | |
362 | idx = PORT_NUM(info->state->smc_scc_num); | |
363 | if (info->state->smc_scc_num & NUM_IS_SCC) { | |
364 | sccp = &pquicc->scc_regs[idx]; | |
365 | sccp->scc_sccm |= UART_SCCM_TX; | |
366 | } else { | |
367 | smcp = &pquicc->smc_regs[idx]; | |
368 | smcp->smc_smcm |= SMCM_TX; | |
369 | } | |
370 | local_irq_restore(flags); | |
371 | } | |
372 | ||
373 | /* | |
374 | * ---------------------------------------------------------------------- | |
375 | * | |
376 | * Here starts the interrupt handling routines. All of the following | |
377 | * subroutines are declared as inline and are folded into | |
378 | * rs_interrupt(). They were separated out for readability's sake. | |
379 | * | |
380 | * Note: rs_interrupt() is a "fast" interrupt, which means that it | |
381 | * runs with interrupts turned off. People who may want to modify | |
382 | * rs_interrupt() should try to keep the interrupt handler as fast as | |
383 | * possible. After you are done making modifications, it is not a bad | |
384 | * idea to do: | |
385 | * | |
386 | * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c | |
387 | * | |
388 | * and look at the resulting assemble code in serial.s. | |
389 | * | |
390 | * - Ted Ts'o (tytso@mit.edu), 7-Mar-93 | |
391 | * ----------------------------------------------------------------------- | |
392 | */ | |
393 | ||
394 | static _INLINE_ void receive_chars(ser_info_t *info) | |
395 | { | |
396 | struct tty_struct *tty = info->tty; | |
33f0f88f | 397 | unsigned char ch, flag, *cp; |
1da177e4 LT |
398 | /*int ignored = 0;*/ |
399 | int i; | |
400 | ushort status; | |
401 | struct async_icount *icount; | |
402 | /* struct async_icount_24 *icount; */ | |
403 | volatile QUICC_BD *bdp; | |
404 | ||
405 | icount = &info->state->icount; | |
406 | ||
407 | /* Just loop through the closed BDs and copy the characters into | |
408 | * the buffer. | |
409 | */ | |
410 | bdp = info->rx_cur; | |
411 | for (;;) { | |
412 | if (bdp->status & BD_SC_EMPTY) /* If this one is empty */ | |
413 | break; /* we are all done */ | |
414 | ||
415 | /* The read status mask tell us what we should do with | |
416 | * incoming characters, especially if errors occur. | |
417 | * One special case is the use of BD_SC_EMPTY. If | |
418 | * this is not set, we are supposed to be ignoring | |
419 | * inputs. In this case, just mark the buffer empty and | |
420 | * continue. | |
421 | */ | |
422 | if (!(info->read_status_mask & BD_SC_EMPTY)) { | |
423 | bdp->status |= BD_SC_EMPTY; | |
424 | bdp->status &= | |
425 | ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV); | |
426 | ||
427 | if (bdp->status & BD_SC_WRAP) | |
428 | bdp = info->rx_bd_base; | |
429 | else | |
430 | bdp++; | |
431 | continue; | |
432 | } | |
433 | ||
434 | /* Get the number of characters and the buffer pointer. | |
435 | */ | |
436 | i = bdp->length; | |
437 | /* cp = (unsigned char *)__va(bdp->buf); */ | |
438 | cp = (char *)bdp->buf; | |
439 | status = bdp->status; | |
440 | ||
1da177e4 LT |
441 | while (i-- > 0) { |
442 | ch = *cp++; | |
1da177e4 LT |
443 | icount->rx++; |
444 | ||
445 | #ifdef SERIAL_DEBUG_INTR | |
446 | printk("DR%02x:%02x...", ch, status); | |
447 | #endif | |
33f0f88f AC |
448 | flag = TTY_NORMAL; |
449 | ||
1da177e4 LT |
450 | if (status & (BD_SC_BR | BD_SC_FR | |
451 | BD_SC_PR | BD_SC_OV)) { | |
452 | /* | |
453 | * For statistics only | |
454 | */ | |
455 | if (status & BD_SC_BR) | |
456 | icount->brk++; | |
457 | else if (status & BD_SC_PR) | |
458 | icount->parity++; | |
459 | else if (status & BD_SC_FR) | |
460 | icount->frame++; | |
461 | if (status & BD_SC_OV) | |
462 | icount->overrun++; | |
463 | ||
464 | /* | |
465 | * Now check to see if character should be | |
466 | * ignored, and mask off conditions which | |
467 | * should be ignored. | |
468 | if (status & info->ignore_status_mask) { | |
469 | if (++ignored > 100) | |
470 | break; | |
471 | continue; | |
472 | } | |
473 | */ | |
474 | status &= info->read_status_mask; | |
475 | ||
476 | if (status & (BD_SC_BR)) { | |
477 | #ifdef SERIAL_DEBUG_INTR | |
478 | printk("handling break...."); | |
479 | #endif | |
480 | *tty->flip.flag_buf_ptr = TTY_BREAK; | |
481 | if (info->flags & ASYNC_SAK) | |
482 | do_SAK(tty); | |
483 | } else if (status & BD_SC_PR) | |
33f0f88f | 484 | flag = TTY_PARITY; |
1da177e4 | 485 | else if (status & BD_SC_FR) |
33f0f88f | 486 | flag = TTY_FRAME; |
1da177e4 | 487 | } |
33f0f88f AC |
488 | tty_insert_flip_char(tty, ch, flag); |
489 | if (status & BD_SC_OV) | |
490 | /* | |
491 | * Overrun is special, since it's | |
492 | * reported immediately, and doesn't | |
493 | * affect the current character | |
494 | */ | |
495 | tty_insert_flip_char(tty, 0, TTY_OVERRUN); | |
1da177e4 LT |
496 | } |
497 | ||
498 | /* This BD is ready to be used again. Clear status. | |
499 | * Get next BD. | |
500 | */ | |
501 | bdp->status |= BD_SC_EMPTY; | |
502 | bdp->status &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV); | |
503 | ||
504 | if (bdp->status & BD_SC_WRAP) | |
505 | bdp = info->rx_bd_base; | |
506 | else | |
507 | bdp++; | |
508 | } | |
509 | ||
510 | info->rx_cur = (QUICC_BD *)bdp; | |
511 | ||
e3948563 | 512 | tty_schedule_flip(tty); |
1da177e4 LT |
513 | } |
514 | ||
515 | static _INLINE_ void receive_break(ser_info_t *info) | |
516 | { | |
517 | struct tty_struct *tty = info->tty; | |
518 | ||
519 | info->state->icount.brk++; | |
520 | /* Check to see if there is room in the tty buffer for | |
521 | * the break. If not, we exit now, losing the break. FIXME | |
522 | */ | |
33f0f88f | 523 | tty_insert_flip_char(tty, 0, TTY_BREAK); |
e3948563 | 524 | tty_schedule_flip(tty); |
1da177e4 LT |
525 | } |
526 | ||
527 | static _INLINE_ void transmit_chars(ser_info_t *info) | |
528 | { | |
529 | ||
530 | if ((info->flags & TX_WAKEUP) || | |
531 | (info->tty->flags & (1 << TTY_DO_WRITE_WAKEUP))) { | |
532 | schedule_work(&info->tqueue); | |
533 | } | |
534 | ||
535 | #ifdef SERIAL_DEBUG_INTR | |
536 | printk("THRE..."); | |
537 | #endif | |
538 | } | |
539 | ||
540 | #ifdef notdef | |
541 | /* I need to do this for the SCCs, so it is left as a reminder. | |
542 | */ | |
543 | static _INLINE_ void check_modem_status(struct async_struct *info) | |
544 | { | |
545 | int status; | |
546 | /* struct async_icount *icount; */ | |
547 | struct async_icount_24 *icount; | |
548 | ||
549 | status = serial_in(info, UART_MSR); | |
550 | ||
551 | if (status & UART_MSR_ANY_DELTA) { | |
552 | icount = &info->state->icount; | |
553 | /* update input line counters */ | |
554 | if (status & UART_MSR_TERI) | |
555 | icount->rng++; | |
556 | if (status & UART_MSR_DDSR) | |
557 | icount->dsr++; | |
558 | if (status & UART_MSR_DDCD) { | |
559 | icount->dcd++; | |
560 | #ifdef CONFIG_HARD_PPS | |
561 | if ((info->flags & ASYNC_HARDPPS_CD) && | |
562 | (status & UART_MSR_DCD)) | |
563 | hardpps(); | |
564 | #endif | |
565 | } | |
566 | if (status & UART_MSR_DCTS) | |
567 | icount->cts++; | |
568 | wake_up_interruptible(&info->delta_msr_wait); | |
569 | } | |
570 | ||
571 | if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) { | |
572 | #if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR)) | |
573 | printk("ttys%d CD now %s...", info->line, | |
574 | (status & UART_MSR_DCD) ? "on" : "off"); | |
575 | #endif | |
576 | if (status & UART_MSR_DCD) | |
577 | wake_up_interruptible(&info->open_wait); | |
578 | else { | |
579 | #ifdef SERIAL_DEBUG_OPEN | |
580 | printk("scheduling hangup..."); | |
581 | #endif | |
582 | queue_task(&info->tqueue_hangup, | |
583 | &tq_scheduler); | |
584 | } | |
585 | } | |
586 | if (info->flags & ASYNC_CTS_FLOW) { | |
587 | if (info->tty->hw_stopped) { | |
588 | if (status & UART_MSR_CTS) { | |
589 | #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW)) | |
590 | printk("CTS tx start..."); | |
591 | #endif | |
592 | info->tty->hw_stopped = 0; | |
593 | info->IER |= UART_IER_THRI; | |
594 | serial_out(info, UART_IER, info->IER); | |
595 | rs_sched_event(info, RS_EVENT_WRITE_WAKEUP); | |
596 | return; | |
597 | } | |
598 | } else { | |
599 | if (!(status & UART_MSR_CTS)) { | |
600 | #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW)) | |
601 | printk("CTS tx stop..."); | |
602 | #endif | |
603 | info->tty->hw_stopped = 1; | |
604 | info->IER &= ~UART_IER_THRI; | |
605 | serial_out(info, UART_IER, info->IER); | |
606 | } | |
607 | } | |
608 | } | |
609 | } | |
610 | #endif | |
611 | ||
612 | /* | |
613 | * This is the serial driver's interrupt routine for a single port | |
614 | */ | |
615 | /* static void rs_360_interrupt(void *dev_id) */ /* until and if we start servicing irqs here */ | |
7d12e780 | 616 | static void rs_360_interrupt(int vec, void *dev_id) |
1da177e4 LT |
617 | { |
618 | u_char events; | |
619 | int idx; | |
620 | ser_info_t *info; | |
621 | volatile struct smc_regs *smcp; | |
622 | volatile struct scc_regs *sccp; | |
623 | ||
c7bec5ab | 624 | info = dev_id; |
1da177e4 LT |
625 | |
626 | idx = PORT_NUM(info->state->smc_scc_num); | |
627 | if (info->state->smc_scc_num & NUM_IS_SCC) { | |
628 | sccp = &pquicc->scc_regs[idx]; | |
629 | events = sccp->scc_scce; | |
630 | if (events & SCCM_RX) | |
631 | receive_chars(info); | |
632 | if (events & SCCM_TX) | |
633 | transmit_chars(info); | |
634 | sccp->scc_scce = events; | |
635 | } else { | |
636 | smcp = &pquicc->smc_regs[idx]; | |
637 | events = smcp->smc_smce; | |
638 | if (events & SMCM_BRKE) | |
639 | receive_break(info); | |
640 | if (events & SMCM_RX) | |
641 | receive_chars(info); | |
642 | if (events & SMCM_TX) | |
643 | transmit_chars(info); | |
644 | smcp->smc_smce = events; | |
645 | } | |
646 | ||
647 | #ifdef SERIAL_DEBUG_INTR | |
648 | printk("rs_interrupt_single(%d, %x)...", | |
649 | info->state->smc_scc_num, events); | |
650 | #endif | |
651 | #ifdef modem_control | |
652 | check_modem_status(info); | |
653 | #endif | |
654 | info->last_active = jiffies; | |
655 | #ifdef SERIAL_DEBUG_INTR | |
656 | printk("end.\n"); | |
657 | #endif | |
658 | } | |
659 | ||
660 | ||
661 | /* | |
662 | * ------------------------------------------------------------------- | |
663 | * Here ends the serial interrupt routines. | |
664 | * ------------------------------------------------------------------- | |
665 | */ | |
666 | ||
667 | ||
668 | static void do_softint(void *private_) | |
669 | { | |
670 | ser_info_t *info = (ser_info_t *) private_; | |
671 | struct tty_struct *tty; | |
672 | ||
673 | tty = info->tty; | |
674 | if (!tty) | |
675 | return; | |
676 | ||
677 | if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) | |
678 | tty_wakeup(tty); | |
679 | } | |
680 | ||
681 | ||
682 | /* | |
683 | * This routine is called from the scheduler tqueue when the interrupt | |
684 | * routine has signalled that a hangup has occurred. The path of | |
685 | * hangup processing is: | |
686 | * | |
687 | * serial interrupt routine -> (scheduler tqueue) -> | |
688 | * do_serial_hangup() -> tty->hangup() -> rs_hangup() | |
689 | * | |
690 | */ | |
691 | static void do_serial_hangup(void *private_) | |
692 | { | |
693 | struct async_struct *info = (struct async_struct *) private_; | |
694 | struct tty_struct *tty; | |
695 | ||
696 | tty = info->tty; | |
697 | if (!tty) | |
698 | return; | |
699 | ||
700 | tty_hangup(tty); | |
701 | } | |
702 | ||
703 | ||
704 | static int startup(ser_info_t *info) | |
705 | { | |
706 | unsigned long flags; | |
707 | int retval=0; | |
708 | int idx; | |
709 | /*struct serial_state *state = info->state;*/ | |
710 | volatile struct smc_regs *smcp; | |
711 | volatile struct scc_regs *sccp; | |
712 | volatile struct smc_uart_pram *up; | |
713 | volatile struct uart_pram *scup; | |
714 | ||
715 | ||
716 | local_irq_save(flags); | |
717 | ||
718 | if (info->flags & ASYNC_INITIALIZED) { | |
719 | goto errout; | |
720 | } | |
721 | ||
722 | #ifdef maybe | |
723 | if (!state->port || !state->type) { | |
724 | if (info->tty) | |
725 | set_bit(TTY_IO_ERROR, &info->tty->flags); | |
726 | goto errout; | |
727 | } | |
728 | #endif | |
729 | ||
730 | #ifdef SERIAL_DEBUG_OPEN | |
731 | printk("starting up ttys%d (irq %d)...", info->line, state->irq); | |
732 | #endif | |
733 | ||
734 | ||
735 | #ifdef modem_control | |
736 | info->MCR = 0; | |
737 | if (info->tty->termios->c_cflag & CBAUD) | |
738 | info->MCR = UART_MCR_DTR | UART_MCR_RTS; | |
739 | #endif | |
740 | ||
741 | if (info->tty) | |
742 | clear_bit(TTY_IO_ERROR, &info->tty->flags); | |
743 | ||
744 | /* | |
745 | * and set the speed of the serial port | |
746 | */ | |
747 | change_speed(info); | |
748 | ||
749 | idx = PORT_NUM(info->state->smc_scc_num); | |
750 | if (info->state->smc_scc_num & NUM_IS_SCC) { | |
751 | sccp = &pquicc->scc_regs[idx]; | |
752 | scup = &pquicc->pram[info->state->port].scc.pscc.u; | |
753 | ||
754 | scup->mrblr = RX_BUF_SIZE; | |
755 | scup->max_idl = RX_BUF_SIZE; | |
756 | ||
757 | sccp->scc_sccm |= (UART_SCCM_TX | UART_SCCM_RX); | |
758 | sccp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT); | |
759 | ||
760 | } else { | |
761 | smcp = &pquicc->smc_regs[idx]; | |
762 | ||
763 | /* Enable interrupts and I/O. | |
764 | */ | |
765 | smcp->smc_smcm |= (SMCM_RX | SMCM_TX); | |
766 | smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN); | |
767 | ||
768 | /* We can tune the buffer length and idle characters | |
769 | * to take advantage of the entire incoming buffer size. | |
770 | * If mrblr is something other than 1, maxidl has to be | |
771 | * non-zero or we never get an interrupt. The maxidl | |
772 | * is the number of character times we wait after reception | |
773 | * of the last character before we decide no more characters | |
774 | * are coming. | |
775 | */ | |
776 | /* up = (smc_uart_t *)&pquicc->cp_dparam[state->port]; */ | |
777 | /* holy unionized structures, Batman: */ | |
778 | up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u; | |
779 | ||
780 | up->mrblr = RX_BUF_SIZE; | |
781 | up->max_idl = RX_BUF_SIZE; | |
782 | ||
783 | up->brkcr = 1; /* number of break chars */ | |
784 | } | |
785 | ||
786 | info->flags |= ASYNC_INITIALIZED; | |
787 | local_irq_restore(flags); | |
788 | return 0; | |
789 | ||
790 | errout: | |
791 | local_irq_restore(flags); | |
792 | return retval; | |
793 | } | |
794 | ||
795 | /* | |
796 | * This routine will shutdown a serial port; interrupts are disabled, and | |
797 | * DTR is dropped if the hangup on close termio flag is on. | |
798 | */ | |
799 | static void shutdown(ser_info_t *info) | |
800 | { | |
801 | unsigned long flags; | |
802 | struct serial_state *state; | |
803 | int idx; | |
804 | volatile struct smc_regs *smcp; | |
805 | volatile struct scc_regs *sccp; | |
806 | ||
807 | if (!(info->flags & ASYNC_INITIALIZED)) | |
808 | return; | |
809 | ||
810 | state = info->state; | |
811 | ||
812 | #ifdef SERIAL_DEBUG_OPEN | |
813 | printk("Shutting down serial port %d (irq %d)....", info->line, | |
814 | state->irq); | |
815 | #endif | |
816 | ||
817 | local_irq_save(flags); | |
818 | ||
819 | idx = PORT_NUM(state->smc_scc_num); | |
820 | if (state->smc_scc_num & NUM_IS_SCC) { | |
821 | sccp = &pquicc->scc_regs[idx]; | |
822 | sccp->scc_gsmr.w.low &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | |
823 | #ifdef CONFIG_SERIAL_CONSOLE | |
824 | /* We can't disable the transmitter if this is the | |
825 | * system console. | |
826 | */ | |
827 | if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT) | |
828 | #endif | |
829 | sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX); | |
830 | } else { | |
831 | smcp = &pquicc->smc_regs[idx]; | |
832 | ||
833 | /* Disable interrupts and I/O. | |
834 | */ | |
835 | smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX); | |
836 | #ifdef CONFIG_SERIAL_CONSOLE | |
837 | /* We can't disable the transmitter if this is the | |
838 | * system console. | |
839 | */ | |
840 | if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT) | |
841 | #endif | |
842 | smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); | |
843 | } | |
844 | ||
845 | if (info->tty) | |
846 | set_bit(TTY_IO_ERROR, &info->tty->flags); | |
847 | ||
848 | info->flags &= ~ASYNC_INITIALIZED; | |
849 | local_irq_restore(flags); | |
850 | } | |
851 | ||
852 | /* | |
853 | * This routine is called to set the UART divisor registers to match | |
854 | * the specified baud rate for a serial port. | |
855 | */ | |
856 | static void change_speed(ser_info_t *info) | |
857 | { | |
858 | int baud_rate; | |
859 | unsigned cflag, cval, scval, prev_mode; | |
860 | int i, bits, sbits, idx; | |
861 | unsigned long flags; | |
862 | struct serial_state *state; | |
863 | volatile struct smc_regs *smcp; | |
864 | volatile struct scc_regs *sccp; | |
865 | ||
866 | if (!info->tty || !info->tty->termios) | |
867 | return; | |
868 | cflag = info->tty->termios->c_cflag; | |
869 | ||
870 | state = info->state; | |
871 | ||
872 | /* Character length programmed into the mode register is the | |
873 | * sum of: 1 start bit, number of data bits, 0 or 1 parity bit, | |
874 | * 1 or 2 stop bits, minus 1. | |
875 | * The value 'bits' counts this for us. | |
876 | */ | |
877 | cval = 0; | |
878 | scval = 0; | |
879 | ||
880 | /* byte size and parity */ | |
881 | switch (cflag & CSIZE) { | |
882 | case CS5: bits = 5; break; | |
883 | case CS6: bits = 6; break; | |
884 | case CS7: bits = 7; break; | |
885 | case CS8: bits = 8; break; | |
886 | /* Never happens, but GCC is too dumb to figure it out */ | |
887 | default: bits = 8; break; | |
888 | } | |
889 | sbits = bits - 5; | |
890 | ||
891 | if (cflag & CSTOPB) { | |
892 | cval |= SMCMR_SL; /* Two stops */ | |
893 | scval |= SCU_PMSR_SL; | |
894 | bits++; | |
895 | } | |
896 | if (cflag & PARENB) { | |
897 | cval |= SMCMR_PEN; | |
898 | scval |= SCU_PMSR_PEN; | |
899 | bits++; | |
900 | } | |
901 | if (!(cflag & PARODD)) { | |
902 | cval |= SMCMR_PM_EVEN; | |
903 | scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP); | |
904 | } | |
905 | ||
906 | /* Determine divisor based on baud rate */ | |
907 | i = cflag & CBAUD; | |
908 | if (i >= (sizeof(baud_table)/sizeof(int))) | |
909 | baud_rate = 9600; | |
910 | else | |
911 | baud_rate = baud_table[i]; | |
912 | ||
913 | info->timeout = (TX_BUF_SIZE*HZ*bits); | |
914 | info->timeout += HZ/50; /* Add .02 seconds of slop */ | |
915 | ||
916 | #ifdef modem_control | |
917 | /* CTS flow control flag and modem status interrupts */ | |
918 | info->IER &= ~UART_IER_MSI; | |
919 | if (info->flags & ASYNC_HARDPPS_CD) | |
920 | info->IER |= UART_IER_MSI; | |
921 | if (cflag & CRTSCTS) { | |
922 | info->flags |= ASYNC_CTS_FLOW; | |
923 | info->IER |= UART_IER_MSI; | |
924 | } else | |
925 | info->flags &= ~ASYNC_CTS_FLOW; | |
926 | if (cflag & CLOCAL) | |
927 | info->flags &= ~ASYNC_CHECK_CD; | |
928 | else { | |
929 | info->flags |= ASYNC_CHECK_CD; | |
930 | info->IER |= UART_IER_MSI; | |
931 | } | |
932 | serial_out(info, UART_IER, info->IER); | |
933 | #endif | |
934 | ||
935 | /* | |
936 | * Set up parity check flag | |
937 | */ | |
1da177e4 LT |
938 | info->read_status_mask = (BD_SC_EMPTY | BD_SC_OV); |
939 | if (I_INPCK(info->tty)) | |
940 | info->read_status_mask |= BD_SC_FR | BD_SC_PR; | |
941 | if (I_BRKINT(info->tty) || I_PARMRK(info->tty)) | |
942 | info->read_status_mask |= BD_SC_BR; | |
943 | ||
944 | /* | |
945 | * Characters to ignore | |
946 | */ | |
947 | info->ignore_status_mask = 0; | |
948 | if (I_IGNPAR(info->tty)) | |
949 | info->ignore_status_mask |= BD_SC_PR | BD_SC_FR; | |
950 | if (I_IGNBRK(info->tty)) { | |
951 | info->ignore_status_mask |= BD_SC_BR; | |
952 | /* | |
953 | * If we're ignore parity and break indicators, ignore | |
954 | * overruns too. (For real raw support). | |
955 | */ | |
956 | if (I_IGNPAR(info->tty)) | |
957 | info->ignore_status_mask |= BD_SC_OV; | |
958 | } | |
959 | /* | |
960 | * !!! ignore all characters if CREAD is not set | |
961 | */ | |
962 | if ((cflag & CREAD) == 0) | |
963 | info->read_status_mask &= ~BD_SC_EMPTY; | |
964 | local_irq_save(flags); | |
965 | ||
966 | /* Start bit has not been added (so don't, because we would just | |
967 | * subtract it later), and we need to add one for the number of | |
968 | * stops bits (there is always at least one). | |
969 | */ | |
970 | bits++; | |
971 | idx = PORT_NUM(state->smc_scc_num); | |
972 | if (state->smc_scc_num & NUM_IS_SCC) { | |
973 | sccp = &pquicc->scc_regs[idx]; | |
974 | sccp->scc_psmr = (sbits << 12) | scval; | |
975 | } else { | |
976 | smcp = &pquicc->smc_regs[idx]; | |
977 | ||
978 | /* Set the mode register. We want to keep a copy of the | |
979 | * enables, because we want to put them back if they were | |
980 | * present. | |
981 | */ | |
982 | prev_mode = smcp->smc_smcmr; | |
983 | smcp->smc_smcmr = smcr_mk_clen(bits) | cval | SMCMR_SM_UART; | |
984 | smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN)); | |
985 | } | |
986 | ||
987 | m360_cpm_setbrg((state - rs_table), baud_rate); | |
988 | ||
989 | local_irq_restore(flags); | |
990 | } | |
991 | ||
992 | static void rs_360_put_char(struct tty_struct *tty, unsigned char ch) | |
993 | { | |
994 | ser_info_t *info = (ser_info_t *)tty->driver_data; | |
995 | volatile QUICC_BD *bdp; | |
996 | ||
997 | if (serial_paranoia_check(info, tty->name, "rs_put_char")) | |
998 | return; | |
999 | ||
1000 | if (!tty) | |
1001 | return; | |
1002 | ||
1003 | bdp = info->tx_cur; | |
1004 | while (bdp->status & BD_SC_READY); | |
1005 | ||
1006 | /* *((char *)__va(bdp->buf)) = ch; */ | |
1007 | *((char *)bdp->buf) = ch; | |
1008 | bdp->length = 1; | |
1009 | bdp->status |= BD_SC_READY; | |
1010 | ||
1011 | /* Get next BD. | |
1012 | */ | |
1013 | if (bdp->status & BD_SC_WRAP) | |
1014 | bdp = info->tx_bd_base; | |
1015 | else | |
1016 | bdp++; | |
1017 | ||
1018 | info->tx_cur = (QUICC_BD *)bdp; | |
1019 | ||
1020 | } | |
1021 | ||
1022 | static int rs_360_write(struct tty_struct * tty, | |
1023 | const unsigned char *buf, int count) | |
1024 | { | |
1025 | int c, ret = 0; | |
1026 | ser_info_t *info = (ser_info_t *)tty->driver_data; | |
1027 | volatile QUICC_BD *bdp; | |
1028 | ||
1029 | #ifdef CONFIG_KGDB | |
1030 | /* Try to let stub handle output. Returns true if it did. */ | |
1031 | if (kgdb_output_string(buf, count)) | |
1032 | return ret; | |
1033 | #endif | |
1034 | ||
1035 | if (serial_paranoia_check(info, tty->name, "rs_write")) | |
1036 | return 0; | |
1037 | ||
1038 | if (!tty) | |
1039 | return 0; | |
1040 | ||
1041 | bdp = info->tx_cur; | |
1042 | ||
1043 | while (1) { | |
1044 | c = min(count, TX_BUF_SIZE); | |
1045 | ||
1046 | if (c <= 0) | |
1047 | break; | |
1048 | ||
1049 | if (bdp->status & BD_SC_READY) { | |
1050 | info->flags |= TX_WAKEUP; | |
1051 | break; | |
1052 | } | |
1053 | ||
1054 | /* memcpy(__va(bdp->buf), buf, c); */ | |
1055 | memcpy((void *)bdp->buf, buf, c); | |
1056 | ||
1057 | bdp->length = c; | |
1058 | bdp->status |= BD_SC_READY; | |
1059 | ||
1060 | buf += c; | |
1061 | count -= c; | |
1062 | ret += c; | |
1063 | ||
1064 | /* Get next BD. | |
1065 | */ | |
1066 | if (bdp->status & BD_SC_WRAP) | |
1067 | bdp = info->tx_bd_base; | |
1068 | else | |
1069 | bdp++; | |
1070 | info->tx_cur = (QUICC_BD *)bdp; | |
1071 | } | |
1072 | return ret; | |
1073 | } | |
1074 | ||
1075 | static int rs_360_write_room(struct tty_struct *tty) | |
1076 | { | |
1077 | ser_info_t *info = (ser_info_t *)tty->driver_data; | |
1078 | int ret; | |
1079 | ||
1080 | if (serial_paranoia_check(info, tty->name, "rs_write_room")) | |
1081 | return 0; | |
1082 | ||
1083 | if ((info->tx_cur->status & BD_SC_READY) == 0) { | |
1084 | info->flags &= ~TX_WAKEUP; | |
1085 | ret = TX_BUF_SIZE; | |
1086 | } | |
1087 | else { | |
1088 | info->flags |= TX_WAKEUP; | |
1089 | ret = 0; | |
1090 | } | |
1091 | return ret; | |
1092 | } | |
1093 | ||
1094 | /* I could track this with transmit counters....maybe later. | |
1095 | */ | |
1096 | static int rs_360_chars_in_buffer(struct tty_struct *tty) | |
1097 | { | |
1098 | ser_info_t *info = (ser_info_t *)tty->driver_data; | |
1099 | ||
1100 | if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer")) | |
1101 | return 0; | |
1102 | return 0; | |
1103 | } | |
1104 | ||
1105 | static void rs_360_flush_buffer(struct tty_struct *tty) | |
1106 | { | |
1107 | ser_info_t *info = (ser_info_t *)tty->driver_data; | |
1108 | ||
1109 | if (serial_paranoia_check(info, tty->name, "rs_flush_buffer")) | |
1110 | return; | |
1111 | ||
1112 | /* There is nothing to "flush", whatever we gave the CPM | |
1113 | * is on its way out. | |
1114 | */ | |
1115 | tty_wakeup(tty); | |
1116 | info->flags &= ~TX_WAKEUP; | |
1117 | } | |
1118 | ||
1119 | /* | |
1120 | * This function is used to send a high-priority XON/XOFF character to | |
1121 | * the device | |
1122 | */ | |
1123 | static void rs_360_send_xchar(struct tty_struct *tty, char ch) | |
1124 | { | |
1125 | volatile QUICC_BD *bdp; | |
1126 | ||
1127 | ser_info_t *info = (ser_info_t *)tty->driver_data; | |
1128 | ||
1129 | if (serial_paranoia_check(info, tty->name, "rs_send_char")) | |
1130 | return; | |
1131 | ||
1132 | bdp = info->tx_cur; | |
1133 | while (bdp->status & BD_SC_READY); | |
1134 | ||
1135 | /* *((char *)__va(bdp->buf)) = ch; */ | |
1136 | *((char *)bdp->buf) = ch; | |
1137 | bdp->length = 1; | |
1138 | bdp->status |= BD_SC_READY; | |
1139 | ||
1140 | /* Get next BD. | |
1141 | */ | |
1142 | if (bdp->status & BD_SC_WRAP) | |
1143 | bdp = info->tx_bd_base; | |
1144 | else | |
1145 | bdp++; | |
1146 | ||
1147 | info->tx_cur = (QUICC_BD *)bdp; | |
1148 | } | |
1149 | ||
1150 | /* | |
1151 | * ------------------------------------------------------------ | |
1152 | * rs_throttle() | |
1153 | * | |
1154 | * This routine is called by the upper-layer tty layer to signal that | |
1155 | * incoming characters should be throttled. | |
1156 | * ------------------------------------------------------------ | |
1157 | */ | |
1158 | static void rs_360_throttle(struct tty_struct * tty) | |
1159 | { | |
1160 | ser_info_t *info = (ser_info_t *)tty->driver_data; | |
1161 | #ifdef SERIAL_DEBUG_THROTTLE | |
1162 | char buf[64]; | |
1163 | ||
1164 | printk("throttle %s: %d....\n", _tty_name(tty, buf), | |
1165 | tty->ldisc.chars_in_buffer(tty)); | |
1166 | #endif | |
1167 | ||
1168 | if (serial_paranoia_check(info, tty->name, "rs_throttle")) | |
1169 | return; | |
1170 | ||
1171 | if (I_IXOFF(tty)) | |
1172 | rs_360_send_xchar(tty, STOP_CHAR(tty)); | |
1173 | ||
1174 | #ifdef modem_control | |
1175 | if (tty->termios->c_cflag & CRTSCTS) | |
1176 | info->MCR &= ~UART_MCR_RTS; | |
1177 | ||
1178 | local_irq_disable(); | |
1179 | serial_out(info, UART_MCR, info->MCR); | |
1180 | local_irq_enable(); | |
1181 | #endif | |
1182 | } | |
1183 | ||
1184 | static void rs_360_unthrottle(struct tty_struct * tty) | |
1185 | { | |
1186 | ser_info_t *info = (ser_info_t *)tty->driver_data; | |
1187 | #ifdef SERIAL_DEBUG_THROTTLE | |
1188 | char buf[64]; | |
1189 | ||
1190 | printk("unthrottle %s: %d....\n", _tty_name(tty, buf), | |
1191 | tty->ldisc.chars_in_buffer(tty)); | |
1192 | #endif | |
1193 | ||
1194 | if (serial_paranoia_check(info, tty->name, "rs_unthrottle")) | |
1195 | return; | |
1196 | ||
1197 | if (I_IXOFF(tty)) { | |
1198 | if (info->x_char) | |
1199 | info->x_char = 0; | |
1200 | else | |
1201 | rs_360_send_xchar(tty, START_CHAR(tty)); | |
1202 | } | |
1203 | #ifdef modem_control | |
1204 | if (tty->termios->c_cflag & CRTSCTS) | |
1205 | info->MCR |= UART_MCR_RTS; | |
1206 | local_irq_disable(); | |
1207 | serial_out(info, UART_MCR, info->MCR); | |
1208 | local_irq_enable(); | |
1209 | #endif | |
1210 | } | |
1211 | ||
1212 | /* | |
1213 | * ------------------------------------------------------------ | |
1214 | * rs_ioctl() and friends | |
1215 | * ------------------------------------------------------------ | |
1216 | */ | |
1217 | ||
1218 | #ifdef maybe | |
1219 | /* | |
1220 | * get_lsr_info - get line status register info | |
1221 | * | |
1222 | * Purpose: Let user call ioctl() to get info when the UART physically | |
1223 | * is emptied. On bus types like RS485, the transmitter must | |
1224 | * release the bus after transmitting. This must be done when | |
1225 | * the transmit shift register is empty, not be done when the | |
1226 | * transmit holding register is empty. This functionality | |
1227 | * allows an RS485 driver to be written in user space. | |
1228 | */ | |
1229 | static int get_lsr_info(struct async_struct * info, unsigned int *value) | |
1230 | { | |
1231 | unsigned char status; | |
1232 | unsigned int result; | |
1233 | ||
1234 | local_irq_disable(); | |
1235 | status = serial_in(info, UART_LSR); | |
1236 | local_irq_enable(); | |
1237 | result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0); | |
1238 | return put_user(result,value); | |
1239 | } | |
1240 | #endif | |
1241 | ||
1242 | static int rs_360_tiocmget(struct tty_struct *tty, struct file *file) | |
1243 | { | |
1244 | ser_info_t *info = (ser_info_t *)tty->driver_data; | |
1245 | unsigned int result = 0; | |
1246 | #ifdef modem_control | |
1247 | unsigned char control, status; | |
1248 | ||
1249 | if (serial_paranoia_check(info, tty->name, __FUNCTION__)) | |
1250 | return -ENODEV; | |
1251 | ||
1252 | if (tty->flags & (1 << TTY_IO_ERROR)) | |
1253 | return -EIO; | |
1254 | ||
1255 | control = info->MCR; | |
1256 | local_irq_disable(); | |
1257 | status = serial_in(info, UART_MSR); | |
1258 | local_irq_enable(); | |
1259 | result = ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) | |
1260 | | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) | |
1261 | #ifdef TIOCM_OUT1 | |
1262 | | ((control & UART_MCR_OUT1) ? TIOCM_OUT1 : 0) | |
1263 | | ((control & UART_MCR_OUT2) ? TIOCM_OUT2 : 0) | |
1264 | #endif | |
1265 | | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) | |
1266 | | ((status & UART_MSR_RI) ? TIOCM_RNG : 0) | |
1267 | | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) | |
1268 | | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0); | |
1269 | #endif | |
1270 | return result; | |
1271 | } | |
1272 | ||
1273 | static int rs_360_tiocmset(struct tty_struct *tty, struct file *file, | |
1274 | unsigned int set, unsigned int clear) | |
1275 | { | |
1276 | #ifdef modem_control | |
1277 | ser_info_t *info = (ser_info_t *)tty->driver_data; | |
1278 | unsigned int arg; | |
1279 | ||
1280 | if (serial_paranoia_check(info, tty->name, __FUNCTION__)) | |
1281 | return -ENODEV; | |
1282 | ||
1283 | if (tty->flags & (1 << TTY_IO_ERROR)) | |
1284 | return -EIO; | |
c0754c99 | 1285 | /* FIXME: locking on info->mcr */ |
1da177e4 LT |
1286 | if (set & TIOCM_RTS) |
1287 | info->mcr |= UART_MCR_RTS; | |
1288 | if (set & TIOCM_DTR) | |
1289 | info->mcr |= UART_MCR_DTR; | |
1290 | if (clear & TIOCM_RTS) | |
1291 | info->MCR &= ~UART_MCR_RTS; | |
1292 | if (clear & TIOCM_DTR) | |
1293 | info->MCR &= ~UART_MCR_DTR; | |
1294 | ||
1295 | #ifdef TIOCM_OUT1 | |
1296 | if (set & TIOCM_OUT1) | |
1297 | info->MCR |= UART_MCR_OUT1; | |
1298 | if (set & TIOCM_OUT2) | |
1299 | info->MCR |= UART_MCR_OUT2; | |
1300 | if (clear & TIOCM_OUT1) | |
1301 | info->MCR &= ~UART_MCR_OUT1; | |
1302 | if (clear & TIOCM_OUT2) | |
1303 | info->MCR &= ~UART_MCR_OUT2; | |
1304 | #endif | |
1305 | ||
1306 | local_irq_disable(); | |
1307 | serial_out(info, UART_MCR, info->MCR); | |
1308 | local_irq_enable(); | |
1309 | #endif | |
1310 | return 0; | |
1311 | } | |
1312 | ||
1313 | /* Sending a break is a two step process on the SMC/SCC. It is accomplished | |
1314 | * by sending a STOP TRANSMIT command followed by a RESTART TRANSMIT | |
1315 | * command. We take advantage of the begin/end functions to make this | |
1316 | * happen. | |
1317 | */ | |
1318 | static ushort smc_chan_map[] = { | |
1319 | CPM_CR_CH_SMC1, | |
1320 | CPM_CR_CH_SMC2 | |
1321 | }; | |
1322 | ||
1323 | static ushort scc_chan_map[] = { | |
1324 | CPM_CR_CH_SCC1, | |
1325 | CPM_CR_CH_SCC2, | |
1326 | CPM_CR_CH_SCC3, | |
1327 | CPM_CR_CH_SCC4 | |
1328 | }; | |
1329 | ||
1330 | static void begin_break(ser_info_t *info) | |
1331 | { | |
1332 | volatile QUICC *cp; | |
1333 | ushort chan; | |
1334 | int idx; | |
1335 | ||
1336 | cp = pquicc; | |
1337 | ||
1338 | idx = PORT_NUM(info->state->smc_scc_num); | |
1339 | if (info->state->smc_scc_num & NUM_IS_SCC) | |
1340 | chan = scc_chan_map[idx]; | |
1341 | else | |
1342 | chan = smc_chan_map[idx]; | |
1343 | ||
1344 | cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG; | |
1345 | while (cp->cp_cr & CPM_CR_FLG); | |
1346 | } | |
1347 | ||
1348 | static void end_break(ser_info_t *info) | |
1349 | { | |
1350 | volatile QUICC *cp; | |
1351 | ushort chan; | |
1352 | int idx; | |
1353 | ||
1354 | cp = pquicc; | |
1355 | ||
1356 | idx = PORT_NUM(info->state->smc_scc_num); | |
1357 | if (info->state->smc_scc_num & NUM_IS_SCC) | |
1358 | chan = scc_chan_map[idx]; | |
1359 | else | |
1360 | chan = smc_chan_map[idx]; | |
1361 | ||
1362 | cp->cp_cr = mk_cr_cmd(chan, CPM_CR_RESTART_TX) | CPM_CR_FLG; | |
1363 | while (cp->cp_cr & CPM_CR_FLG); | |
1364 | } | |
1365 | ||
1366 | /* | |
1367 | * This routine sends a break character out the serial port. | |
1368 | */ | |
5d582b4e | 1369 | static void send_break(ser_info_t *info, unsigned int duration) |
1da177e4 | 1370 | { |
1da177e4 LT |
1371 | #ifdef SERIAL_DEBUG_SEND_BREAK |
1372 | printk("rs_send_break(%d) jiff=%lu...", duration, jiffies); | |
1373 | #endif | |
1374 | begin_break(info); | |
5d582b4e | 1375 | msleep_interruptible(duration); |
1da177e4 LT |
1376 | end_break(info); |
1377 | #ifdef SERIAL_DEBUG_SEND_BREAK | |
1378 | printk("done jiffies=%lu\n", jiffies); | |
1379 | #endif | |
1380 | } | |
1381 | ||
1382 | ||
1383 | static int rs_360_ioctl(struct tty_struct *tty, struct file * file, | |
1384 | unsigned int cmd, unsigned long arg) | |
1385 | { | |
1386 | int error; | |
1387 | ser_info_t *info = (ser_info_t *)tty->driver_data; | |
1388 | int retval; | |
1389 | struct async_icount cnow; | |
1390 | /* struct async_icount_24 cnow;*/ /* kernel counter temps */ | |
1391 | struct serial_icounter_struct *p_cuser; /* user space */ | |
1392 | ||
1393 | if (serial_paranoia_check(info, tty->name, "rs_ioctl")) | |
1394 | return -ENODEV; | |
1395 | ||
1396 | if ((cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) { | |
1397 | if (tty->flags & (1 << TTY_IO_ERROR)) | |
1398 | return -EIO; | |
1399 | } | |
1400 | ||
1401 | switch (cmd) { | |
1402 | case TCSBRK: /* SVID version: non-zero arg --> no break */ | |
1403 | retval = tty_check_change(tty); | |
1404 | if (retval) | |
1405 | return retval; | |
1406 | tty_wait_until_sent(tty, 0); | |
1407 | if (signal_pending(current)) | |
1408 | return -EINTR; | |
1409 | if (!arg) { | |
5d582b4e | 1410 | send_break(info, 250); /* 1/4 second */ |
1da177e4 LT |
1411 | if (signal_pending(current)) |
1412 | return -EINTR; | |
1413 | } | |
1414 | return 0; | |
1415 | case TCSBRKP: /* support for POSIX tcsendbreak() */ | |
1416 | retval = tty_check_change(tty); | |
1417 | if (retval) | |
1418 | return retval; | |
1419 | tty_wait_until_sent(tty, 0); | |
1420 | if (signal_pending(current)) | |
1421 | return -EINTR; | |
5d582b4e | 1422 | send_break(info, arg ? arg*100 : 250); |
1da177e4 LT |
1423 | if (signal_pending(current)) |
1424 | return -EINTR; | |
1425 | return 0; | |
1426 | case TIOCSBRK: | |
1427 | retval = tty_check_change(tty); | |
1428 | if (retval) | |
1429 | return retval; | |
1430 | tty_wait_until_sent(tty, 0); | |
1431 | begin_break(info); | |
1432 | return 0; | |
1433 | case TIOCCBRK: | |
1434 | retval = tty_check_change(tty); | |
1435 | if (retval) | |
1436 | return retval; | |
1437 | end_break(info); | |
1438 | return 0; | |
1da177e4 LT |
1439 | #ifdef maybe |
1440 | case TIOCSERGETLSR: /* Get line status register */ | |
1441 | return get_lsr_info(info, (unsigned int *) arg); | |
1442 | #endif | |
1443 | /* | |
1444 | * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change | |
1445 | * - mask passed in arg for lines of interest | |
1446 | * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking) | |
1447 | * Caller should use TIOCGICOUNT to see which one it was | |
1448 | */ | |
1449 | case TIOCMIWAIT: | |
1450 | #ifdef modem_control | |
1451 | local_irq_disable(); | |
1452 | /* note the counters on entry */ | |
1453 | cprev = info->state->icount; | |
1454 | local_irq_enable(); | |
1455 | while (1) { | |
1456 | interruptible_sleep_on(&info->delta_msr_wait); | |
1457 | /* see if a signal did it */ | |
1458 | if (signal_pending(current)) | |
1459 | return -ERESTARTSYS; | |
1460 | local_irq_disable(); | |
1461 | cnow = info->state->icount; /* atomic copy */ | |
1462 | local_irq_enable(); | |
1463 | if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr && | |
1464 | cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) | |
1465 | return -EIO; /* no change => error */ | |
1466 | if ( ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) || | |
1467 | ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) || | |
1468 | ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) || | |
1469 | ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) { | |
1470 | return 0; | |
1471 | } | |
1472 | cprev = cnow; | |
1473 | } | |
1474 | /* NOTREACHED */ | |
1475 | #else | |
1476 | return 0; | |
1477 | #endif | |
1478 | ||
1479 | /* | |
1480 | * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) | |
1481 | * Return: write counters to the user passed counter struct | |
1482 | * NB: both 1->0 and 0->1 transitions are counted except for | |
1483 | * RI where only 0->1 is counted. | |
1484 | */ | |
1485 | case TIOCGICOUNT: | |
1486 | local_irq_disable(); | |
1487 | cnow = info->state->icount; | |
1488 | local_irq_enable(); | |
1489 | p_cuser = (struct serial_icounter_struct *) arg; | |
1490 | /* error = put_user(cnow.cts, &p_cuser->cts); */ | |
1491 | /* if (error) return error; */ | |
1492 | /* error = put_user(cnow.dsr, &p_cuser->dsr); */ | |
1493 | /* if (error) return error; */ | |
1494 | /* error = put_user(cnow.rng, &p_cuser->rng); */ | |
1495 | /* if (error) return error; */ | |
1496 | /* error = put_user(cnow.dcd, &p_cuser->dcd); */ | |
1497 | /* if (error) return error; */ | |
1498 | ||
1499 | put_user(cnow.cts, &p_cuser->cts); | |
1500 | put_user(cnow.dsr, &p_cuser->dsr); | |
1501 | put_user(cnow.rng, &p_cuser->rng); | |
1502 | put_user(cnow.dcd, &p_cuser->dcd); | |
1503 | return 0; | |
1504 | ||
1505 | default: | |
1506 | return -ENOIOCTLCMD; | |
1507 | } | |
1508 | return 0; | |
1509 | } | |
1510 | ||
1511 | /* FIX UP modem control here someday...... | |
1512 | */ | |
606d099c | 1513 | static void rs_360_set_termios(struct tty_struct *tty, struct ktermios *old_termios) |
1da177e4 LT |
1514 | { |
1515 | ser_info_t *info = (ser_info_t *)tty->driver_data; | |
1516 | ||
1da177e4 LT |
1517 | change_speed(info); |
1518 | ||
1519 | #ifdef modem_control | |
1520 | /* Handle transition to B0 status */ | |
1521 | if ((old_termios->c_cflag & CBAUD) && | |
1522 | !(tty->termios->c_cflag & CBAUD)) { | |
1523 | info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS); | |
1524 | local_irq_disable(); | |
1525 | serial_out(info, UART_MCR, info->MCR); | |
1526 | local_irq_enable(); | |
1527 | } | |
1528 | ||
1529 | /* Handle transition away from B0 status */ | |
1530 | if (!(old_termios->c_cflag & CBAUD) && | |
1531 | (tty->termios->c_cflag & CBAUD)) { | |
1532 | info->MCR |= UART_MCR_DTR; | |
1533 | if (!tty->hw_stopped || | |
1534 | !(tty->termios->c_cflag & CRTSCTS)) { | |
1535 | info->MCR |= UART_MCR_RTS; | |
1536 | } | |
1537 | local_irq_disable(); | |
1538 | serial_out(info, UART_MCR, info->MCR); | |
1539 | local_irq_enable(); | |
1540 | } | |
1541 | ||
1542 | /* Handle turning off CRTSCTS */ | |
1543 | if ((old_termios->c_cflag & CRTSCTS) && | |
1544 | !(tty->termios->c_cflag & CRTSCTS)) { | |
1545 | tty->hw_stopped = 0; | |
1546 | rs_360_start(tty); | |
1547 | } | |
1548 | #endif | |
1549 | ||
1550 | #if 0 | |
1551 | /* | |
1552 | * No need to wake up processes in open wait, since they | |
1553 | * sample the CLOCAL flag once, and don't recheck it. | |
1554 | * XXX It's not clear whether the current behavior is correct | |
1555 | * or not. Hence, this may change..... | |
1556 | */ | |
1557 | if (!(old_termios->c_cflag & CLOCAL) && | |
1558 | (tty->termios->c_cflag & CLOCAL)) | |
1559 | wake_up_interruptible(&info->open_wait); | |
1560 | #endif | |
1561 | } | |
1562 | ||
1563 | /* | |
1564 | * ------------------------------------------------------------ | |
1565 | * rs_close() | |
1566 | * | |
1567 | * This routine is called when the serial port gets closed. First, we | |
1568 | * wait for the last remaining data to be sent. Then, we unlink its | |
1569 | * async structure from the interrupt chain if necessary, and we free | |
1570 | * that IRQ if nothing is left in the chain. | |
1571 | * ------------------------------------------------------------ | |
1572 | */ | |
1573 | static void rs_360_close(struct tty_struct *tty, struct file * filp) | |
1574 | { | |
1575 | ser_info_t *info = (ser_info_t *)tty->driver_data; | |
1576 | /* struct async_state *state; */ | |
1577 | struct serial_state *state; | |
1578 | unsigned long flags; | |
1579 | int idx; | |
1580 | volatile struct smc_regs *smcp; | |
1581 | volatile struct scc_regs *sccp; | |
1582 | ||
1583 | if (!info || serial_paranoia_check(info, tty->name, "rs_close")) | |
1584 | return; | |
1585 | ||
1586 | state = info->state; | |
1587 | ||
1588 | local_irq_save(flags); | |
1589 | ||
1590 | if (tty_hung_up_p(filp)) { | |
1591 | DBG_CNT("before DEC-hung"); | |
1592 | local_irq_restore(flags); | |
1593 | return; | |
1594 | } | |
1595 | ||
1596 | #ifdef SERIAL_DEBUG_OPEN | |
1597 | printk("rs_close ttys%d, count = %d\n", info->line, state->count); | |
1598 | #endif | |
1599 | if ((tty->count == 1) && (state->count != 1)) { | |
1600 | /* | |
1601 | * Uh, oh. tty->count is 1, which means that the tty | |
1602 | * structure will be freed. state->count should always | |
1603 | * be one in these conditions. If it's greater than | |
1604 | * one, we've got real problems, since it means the | |
1605 | * serial port won't be shutdown. | |
1606 | */ | |
1607 | printk("rs_close: bad serial port count; tty->count is 1, " | |
1608 | "state->count is %d\n", state->count); | |
1609 | state->count = 1; | |
1610 | } | |
1611 | if (--state->count < 0) { | |
1612 | printk("rs_close: bad serial port count for ttys%d: %d\n", | |
1613 | info->line, state->count); | |
1614 | state->count = 0; | |
1615 | } | |
1616 | if (state->count) { | |
1617 | DBG_CNT("before DEC-2"); | |
1618 | local_irq_restore(flags); | |
1619 | return; | |
1620 | } | |
1621 | info->flags |= ASYNC_CLOSING; | |
1622 | /* | |
1623 | * Now we wait for the transmit buffer to clear; and we notify | |
1624 | * the line discipline to only process XON/XOFF characters. | |
1625 | */ | |
1626 | tty->closing = 1; | |
1627 | if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) | |
1628 | tty_wait_until_sent(tty, info->closing_wait); | |
1629 | /* | |
1630 | * At this point we stop accepting input. To do this, we | |
1631 | * disable the receive line status interrupts, and tell the | |
1632 | * interrupt driver to stop checking the data ready bit in the | |
1633 | * line status register. | |
1634 | */ | |
1635 | info->read_status_mask &= ~BD_SC_EMPTY; | |
1636 | if (info->flags & ASYNC_INITIALIZED) { | |
1637 | ||
1638 | idx = PORT_NUM(info->state->smc_scc_num); | |
1639 | if (info->state->smc_scc_num & NUM_IS_SCC) { | |
1640 | sccp = &pquicc->scc_regs[idx]; | |
1641 | sccp->scc_sccm &= ~UART_SCCM_RX; | |
1642 | sccp->scc_gsmr.w.low &= ~SCC_GSMRL_ENR; | |
1643 | } else { | |
1644 | smcp = &pquicc->smc_regs[idx]; | |
1645 | smcp->smc_smcm &= ~SMCM_RX; | |
1646 | smcp->smc_smcmr &= ~SMCMR_REN; | |
1647 | } | |
1648 | /* | |
1649 | * Before we drop DTR, make sure the UART transmitter | |
1650 | * has completely drained; this is especially | |
1651 | * important if there is a transmit FIFO! | |
1652 | */ | |
1653 | rs_360_wait_until_sent(tty, info->timeout); | |
1654 | } | |
1655 | shutdown(info); | |
978e595f | 1656 | rs_360_flush_buffer(tty); |
1da177e4 LT |
1657 | tty_ldisc_flush(tty); |
1658 | tty->closing = 0; | |
1659 | info->event = 0; | |
1660 | info->tty = 0; | |
1661 | if (info->blocked_open) { | |
1662 | if (info->close_delay) { | |
1663 | msleep_interruptible(jiffies_to_msecs(info->close_delay)); | |
1664 | } | |
1665 | wake_up_interruptible(&info->open_wait); | |
1666 | } | |
1667 | info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING); | |
1668 | wake_up_interruptible(&info->close_wait); | |
1669 | local_irq_restore(flags); | |
1670 | } | |
1671 | ||
1672 | /* | |
1673 | * rs_wait_until_sent() --- wait until the transmitter is empty | |
1674 | */ | |
1675 | static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout) | |
1676 | { | |
1677 | ser_info_t *info = (ser_info_t *)tty->driver_data; | |
1678 | unsigned long orig_jiffies, char_time; | |
1679 | /*int lsr;*/ | |
1680 | volatile QUICC_BD *bdp; | |
1681 | ||
1682 | if (serial_paranoia_check(info, tty->name, "rs_wait_until_sent")) | |
1683 | return; | |
1684 | ||
1685 | #ifdef maybe | |
1686 | if (info->state->type == PORT_UNKNOWN) | |
1687 | return; | |
1688 | #endif | |
1689 | ||
1690 | orig_jiffies = jiffies; | |
1691 | /* | |
1692 | * Set the check interval to be 1/5 of the estimated time to | |
1693 | * send a single character, and make it at least 1. The check | |
1694 | * interval should also be less than the timeout. | |
1695 | * | |
1696 | * Note: we have to use pretty tight timings here to satisfy | |
1697 | * the NIST-PCTS. | |
1698 | */ | |
1699 | char_time = 1; | |
1700 | if (timeout) | |
1701 | char_time = min(char_time, (unsigned long)timeout); | |
1702 | #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT | |
1703 | printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time); | |
1704 | printk("jiff=%lu...", jiffies); | |
1705 | #endif | |
1706 | ||
978e595f | 1707 | lock_kernel(); |
1da177e4 LT |
1708 | /* We go through the loop at least once because we can't tell |
1709 | * exactly when the last character exits the shifter. There can | |
1710 | * be at least two characters waiting to be sent after the buffers | |
1711 | * are empty. | |
1712 | */ | |
1713 | do { | |
1714 | #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT | |
1715 | printk("lsr = %d (jiff=%lu)...", lsr, jiffies); | |
1716 | #endif | |
1717 | /* current->counter = 0; make us low-priority */ | |
1718 | msleep_interruptible(jiffies_to_msecs(char_time)); | |
1719 | if (signal_pending(current)) | |
1720 | break; | |
d1ec61e6 | 1721 | if (timeout && (time_after(jiffies, orig_jiffies + timeout))) |
1da177e4 LT |
1722 | break; |
1723 | /* The 'tx_cur' is really the next buffer to send. We | |
1724 | * have to back up to the previous BD and wait for it | |
1725 | * to go. This isn't perfect, because all this indicates | |
1726 | * is the buffer is available. There are still characters | |
1727 | * in the CPM FIFO. | |
1728 | */ | |
1729 | bdp = info->tx_cur; | |
1730 | if (bdp == info->tx_bd_base) | |
1731 | bdp += (TX_NUM_FIFO-1); | |
1732 | else | |
1733 | bdp--; | |
1734 | } while (bdp->status & BD_SC_READY); | |
1735 | current->state = TASK_RUNNING; | |
978e595f | 1736 | unlock_kernel(); |
1da177e4 LT |
1737 | #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT |
1738 | printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies); | |
1739 | #endif | |
1740 | } | |
1741 | ||
1742 | /* | |
1743 | * rs_hangup() --- called by tty_hangup() when a hangup is signaled. | |
1744 | */ | |
1745 | static void rs_360_hangup(struct tty_struct *tty) | |
1746 | { | |
1747 | ser_info_t *info = (ser_info_t *)tty->driver_data; | |
1748 | struct serial_state *state = info->state; | |
1749 | ||
1750 | if (serial_paranoia_check(info, tty->name, "rs_hangup")) | |
1751 | return; | |
1752 | ||
1753 | state = info->state; | |
1754 | ||
1755 | rs_360_flush_buffer(tty); | |
1756 | shutdown(info); | |
1757 | info->event = 0; | |
1758 | state->count = 0; | |
1759 | info->flags &= ~ASYNC_NORMAL_ACTIVE; | |
1760 | info->tty = 0; | |
1761 | wake_up_interruptible(&info->open_wait); | |
1762 | } | |
1763 | ||
1764 | /* | |
1765 | * ------------------------------------------------------------ | |
1766 | * rs_open() and friends | |
1767 | * ------------------------------------------------------------ | |
1768 | */ | |
1769 | static int block_til_ready(struct tty_struct *tty, struct file * filp, | |
1770 | ser_info_t *info) | |
1771 | { | |
1772 | #ifdef DO_THIS_LATER | |
1773 | DECLARE_WAITQUEUE(wait, current); | |
1774 | #endif | |
1775 | struct serial_state *state = info->state; | |
1776 | int retval; | |
1777 | int do_clocal = 0; | |
1778 | ||
1779 | /* | |
1780 | * If the device is in the middle of being closed, then block | |
1781 | * until it's done, and then try again. | |
1782 | */ | |
1783 | if (tty_hung_up_p(filp) || | |
1784 | (info->flags & ASYNC_CLOSING)) { | |
1785 | if (info->flags & ASYNC_CLOSING) | |
1786 | interruptible_sleep_on(&info->close_wait); | |
1787 | #ifdef SERIAL_DO_RESTART | |
1788 | if (info->flags & ASYNC_HUP_NOTIFY) | |
1789 | return -EAGAIN; | |
1790 | else | |
1791 | return -ERESTARTSYS; | |
1792 | #else | |
1793 | return -EAGAIN; | |
1794 | #endif | |
1795 | } | |
1796 | ||
1797 | /* | |
1798 | * If non-blocking mode is set, or the port is not enabled, | |
1799 | * then make the check up front and then exit. | |
1800 | * If this is an SMC port, we don't have modem control to wait | |
1801 | * for, so just get out here. | |
1802 | */ | |
1803 | if ((filp->f_flags & O_NONBLOCK) || | |
1804 | (tty->flags & (1 << TTY_IO_ERROR)) || | |
1805 | !(info->state->smc_scc_num & NUM_IS_SCC)) { | |
1806 | info->flags |= ASYNC_NORMAL_ACTIVE; | |
1807 | return 0; | |
1808 | } | |
1809 | ||
1810 | if (tty->termios->c_cflag & CLOCAL) | |
1811 | do_clocal = 1; | |
1812 | ||
1813 | /* | |
1814 | * Block waiting for the carrier detect and the line to become | |
1815 | * free (i.e., not in use by the callout). While we are in | |
1816 | * this loop, state->count is dropped by one, so that | |
1817 | * rs_close() knows when to free things. We restore it upon | |
1818 | * exit, either normal or abnormal. | |
1819 | */ | |
1820 | retval = 0; | |
1821 | #ifdef DO_THIS_LATER | |
1822 | add_wait_queue(&info->open_wait, &wait); | |
1823 | #ifdef SERIAL_DEBUG_OPEN | |
1824 | printk("block_til_ready before block: ttys%d, count = %d\n", | |
1825 | state->line, state->count); | |
1826 | #endif | |
1827 | local_irq_disable(); | |
1828 | if (!tty_hung_up_p(filp)) | |
1829 | state->count--; | |
1830 | local_irq_enable(); | |
1831 | info->blocked_open++; | |
1832 | while (1) { | |
1833 | local_irq_disable(); | |
1834 | if (tty->termios->c_cflag & CBAUD) | |
1835 | serial_out(info, UART_MCR, | |
1836 | serial_inp(info, UART_MCR) | | |
1837 | (UART_MCR_DTR | UART_MCR_RTS)); | |
1838 | local_irq_enable(); | |
1839 | set_current_state(TASK_INTERRUPTIBLE); | |
1840 | if (tty_hung_up_p(filp) || | |
1841 | !(info->flags & ASYNC_INITIALIZED)) { | |
1842 | #ifdef SERIAL_DO_RESTART | |
1843 | if (info->flags & ASYNC_HUP_NOTIFY) | |
1844 | retval = -EAGAIN; | |
1845 | else | |
1846 | retval = -ERESTARTSYS; | |
1847 | #else | |
1848 | retval = -EAGAIN; | |
1849 | #endif | |
1850 | break; | |
1851 | } | |
1852 | if (!(info->flags & ASYNC_CLOSING) && | |
1853 | (do_clocal || (serial_in(info, UART_MSR) & | |
1854 | UART_MSR_DCD))) | |
1855 | break; | |
1856 | if (signal_pending(current)) { | |
1857 | retval = -ERESTARTSYS; | |
1858 | break; | |
1859 | } | |
1860 | #ifdef SERIAL_DEBUG_OPEN | |
1861 | printk("block_til_ready blocking: ttys%d, count = %d\n", | |
1862 | info->line, state->count); | |
1863 | #endif | |
1864 | schedule(); | |
1865 | } | |
1866 | current->state = TASK_RUNNING; | |
1867 | remove_wait_queue(&info->open_wait, &wait); | |
1868 | if (!tty_hung_up_p(filp)) | |
1869 | state->count++; | |
1870 | info->blocked_open--; | |
1871 | #ifdef SERIAL_DEBUG_OPEN | |
1872 | printk("block_til_ready after blocking: ttys%d, count = %d\n", | |
1873 | info->line, state->count); | |
1874 | #endif | |
1875 | #endif /* DO_THIS_LATER */ | |
1876 | if (retval) | |
1877 | return retval; | |
1878 | info->flags |= ASYNC_NORMAL_ACTIVE; | |
1879 | return 0; | |
1880 | } | |
1881 | ||
1882 | static int get_async_struct(int line, ser_info_t **ret_info) | |
1883 | { | |
1884 | struct serial_state *sstate; | |
1885 | ||
1886 | sstate = rs_table + line; | |
1887 | if (sstate->info) { | |
1888 | sstate->count++; | |
1889 | *ret_info = (ser_info_t *)sstate->info; | |
1890 | return 0; | |
1891 | } | |
1892 | else { | |
1893 | return -ENOMEM; | |
1894 | } | |
1895 | } | |
1896 | ||
1897 | /* | |
1898 | * This routine is called whenever a serial port is opened. It | |
1899 | * enables interrupts for a serial port, linking in its async structure into | |
1900 | * the IRQ chain. It also performs the serial-specific | |
1901 | * initialization for the tty structure. | |
1902 | */ | |
1903 | static int rs_360_open(struct tty_struct *tty, struct file * filp) | |
1904 | { | |
1905 | ser_info_t *info; | |
1906 | int retval, line; | |
1907 | ||
1908 | line = tty->index; | |
1909 | if ((line < 0) || (line >= NR_PORTS)) | |
1910 | return -ENODEV; | |
1911 | retval = get_async_struct(line, &info); | |
1912 | if (retval) | |
1913 | return retval; | |
1914 | if (serial_paranoia_check(info, tty->name, "rs_open")) | |
1915 | return -ENODEV; | |
1916 | ||
1917 | #ifdef SERIAL_DEBUG_OPEN | |
1918 | printk("rs_open %s, count = %d\n", tty->name, info->state->count); | |
1919 | #endif | |
1920 | tty->driver_data = info; | |
1921 | info->tty = tty; | |
1922 | ||
1923 | /* | |
1924 | * Start up serial port | |
1925 | */ | |
1926 | retval = startup(info); | |
1927 | if (retval) | |
1928 | return retval; | |
1929 | ||
1930 | retval = block_til_ready(tty, filp, info); | |
1931 | if (retval) { | |
1932 | #ifdef SERIAL_DEBUG_OPEN | |
1933 | printk("rs_open returning after block_til_ready with %d\n", | |
1934 | retval); | |
1935 | #endif | |
1936 | return retval; | |
1937 | } | |
1938 | ||
1939 | #ifdef SERIAL_DEBUG_OPEN | |
1940 | printk("rs_open %s successful...", tty->name); | |
1941 | #endif | |
1942 | return 0; | |
1943 | } | |
1944 | ||
1945 | /* | |
1946 | * /proc fs routines.... | |
1947 | */ | |
1948 | ||
1949 | static inline int line_info(char *buf, struct serial_state *state) | |
1950 | { | |
1951 | #ifdef notdef | |
1952 | struct async_struct *info = state->info, scr_info; | |
1953 | char stat_buf[30], control, status; | |
1954 | #endif | |
1955 | int ret; | |
1956 | ||
1957 | ret = sprintf(buf, "%d: uart:%s port:%X irq:%d", | |
1958 | state->line, | |
1959 | (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC", | |
1960 | (unsigned int)(state->port), state->irq); | |
1961 | ||
1962 | if (!state->port || (state->type == PORT_UNKNOWN)) { | |
1963 | ret += sprintf(buf+ret, "\n"); | |
1964 | return ret; | |
1965 | } | |
1966 | ||
1967 | #ifdef notdef | |
1968 | /* | |
1969 | * Figure out the current RS-232 lines | |
1970 | */ | |
1971 | if (!info) { | |
1972 | info = &scr_info; /* This is just for serial_{in,out} */ | |
1973 | ||
1974 | info->magic = SERIAL_MAGIC; | |
1975 | info->port = state->port; | |
1976 | info->flags = state->flags; | |
1977 | info->quot = 0; | |
1978 | info->tty = 0; | |
1979 | } | |
1980 | local_irq_disable(); | |
1981 | status = serial_in(info, UART_MSR); | |
1982 | control = info ? info->MCR : serial_in(info, UART_MCR); | |
1983 | local_irq_enable(); | |
1984 | ||
1985 | stat_buf[0] = 0; | |
1986 | stat_buf[1] = 0; | |
1987 | if (control & UART_MCR_RTS) | |
1988 | strcat(stat_buf, "|RTS"); | |
1989 | if (status & UART_MSR_CTS) | |
1990 | strcat(stat_buf, "|CTS"); | |
1991 | if (control & UART_MCR_DTR) | |
1992 | strcat(stat_buf, "|DTR"); | |
1993 | if (status & UART_MSR_DSR) | |
1994 | strcat(stat_buf, "|DSR"); | |
1995 | if (status & UART_MSR_DCD) | |
1996 | strcat(stat_buf, "|CD"); | |
1997 | if (status & UART_MSR_RI) | |
1998 | strcat(stat_buf, "|RI"); | |
1999 | ||
2000 | if (info->quot) { | |
2001 | ret += sprintf(buf+ret, " baud:%d", | |
2002 | state->baud_base / info->quot); | |
2003 | } | |
2004 | ||
2005 | ret += sprintf(buf+ret, " tx:%d rx:%d", | |
2006 | state->icount.tx, state->icount.rx); | |
2007 | ||
2008 | if (state->icount.frame) | |
2009 | ret += sprintf(buf+ret, " fe:%d", state->icount.frame); | |
2010 | ||
2011 | if (state->icount.parity) | |
2012 | ret += sprintf(buf+ret, " pe:%d", state->icount.parity); | |
2013 | ||
2014 | if (state->icount.brk) | |
2015 | ret += sprintf(buf+ret, " brk:%d", state->icount.brk); | |
2016 | ||
2017 | if (state->icount.overrun) | |
2018 | ret += sprintf(buf+ret, " oe:%d", state->icount.overrun); | |
2019 | ||
2020 | /* | |
2021 | * Last thing is the RS-232 status lines | |
2022 | */ | |
2023 | ret += sprintf(buf+ret, " %s\n", stat_buf+1); | |
2024 | #endif | |
2025 | return ret; | |
2026 | } | |
2027 | ||
2028 | int rs_360_read_proc(char *page, char **start, off_t off, int count, | |
2029 | int *eof, void *data) | |
2030 | { | |
2031 | int i, len = 0; | |
2032 | off_t begin = 0; | |
2033 | ||
2034 | len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version); | |
2035 | for (i = 0; i < NR_PORTS && len < 4000; i++) { | |
2036 | len += line_info(page + len, &rs_table[i]); | |
2037 | if (len+begin > off+count) | |
2038 | goto done; | |
2039 | if (len+begin < off) { | |
2040 | begin += len; | |
2041 | len = 0; | |
2042 | } | |
2043 | } | |
2044 | *eof = 1; | |
2045 | done: | |
2046 | if (off >= len+begin) | |
2047 | return 0; | |
2048 | *start = page + (begin-off); | |
2049 | return ((count < begin+len-off) ? count : begin+len-off); | |
2050 | } | |
2051 | ||
2052 | /* | |
2053 | * --------------------------------------------------------------------- | |
2054 | * rs_init() and friends | |
2055 | * | |
2056 | * rs_init() is called at boot-time to initialize the serial driver. | |
2057 | * --------------------------------------------------------------------- | |
2058 | */ | |
2059 | ||
2060 | /* | |
2061 | * This routine prints out the appropriate serial driver version | |
2062 | * number, and identifies which options were configured into this | |
2063 | * driver. | |
2064 | */ | |
2065 | static _INLINE_ void show_serial_version(void) | |
2066 | { | |
2067 | printk(KERN_INFO "%s version %s\n", serial_name, serial_version); | |
2068 | } | |
2069 | ||
2070 | ||
2071 | /* | |
2072 | * The serial console driver used during boot. Note that these names | |
2073 | * clash with those found in "serial.c", so we currently can't support | |
2074 | * the 16xxx uarts and these at the same time. I will fix this to become | |
2075 | * an indirect function call from tty_io.c (or something). | |
2076 | */ | |
2077 | ||
2078 | #ifdef CONFIG_SERIAL_CONSOLE | |
2079 | ||
2080 | /* | |
2081 | * Print a string to the serial port trying not to disturb any possible | |
2082 | * real use of the port... | |
2083 | */ | |
2084 | static void my_console_write(int idx, const char *s, | |
2085 | unsigned count) | |
2086 | { | |
2087 | struct serial_state *ser; | |
2088 | ser_info_t *info; | |
2089 | unsigned i; | |
2090 | QUICC_BD *bdp, *bdbase; | |
2091 | volatile struct smc_uart_pram *up; | |
2092 | volatile u_char *cp; | |
2093 | ||
2094 | ser = rs_table + idx; | |
2095 | ||
2096 | ||
2097 | /* If the port has been initialized for general use, we have | |
2098 | * to use the buffer descriptors allocated there. Otherwise, | |
2099 | * we simply use the single buffer allocated. | |
2100 | */ | |
2101 | if ((info = (ser_info_t *)ser->info) != NULL) { | |
2102 | bdp = info->tx_cur; | |
2103 | bdbase = info->tx_bd_base; | |
2104 | } | |
2105 | else { | |
2106 | /* Pointer to UART in parameter ram. | |
2107 | */ | |
2108 | /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */ | |
2109 | up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u; | |
2110 | ||
2111 | /* Get the address of the host memory buffer. | |
2112 | */ | |
2113 | bdp = bdbase = (QUICC_BD *)((uint)pquicc + (uint)up->tbase); | |
2114 | } | |
2115 | ||
2116 | /* | |
2117 | * We need to gracefully shut down the transmitter, disable | |
2118 | * interrupts, then send our bytes out. | |
2119 | */ | |
2120 | ||
2121 | /* | |
2122 | * Now, do each character. This is not as bad as it looks | |
2123 | * since this is a holding FIFO and not a transmitting FIFO. | |
2124 | * We could add the complexity of filling the entire transmit | |
2125 | * buffer, but we would just wait longer between accesses...... | |
2126 | */ | |
2127 | for (i = 0; i < count; i++, s++) { | |
2128 | /* Wait for transmitter fifo to empty. | |
2129 | * Ready indicates output is ready, and xmt is doing | |
2130 | * that, not that it is ready for us to send. | |
2131 | */ | |
2132 | while (bdp->status & BD_SC_READY); | |
2133 | ||
2134 | /* Send the character out. | |
2135 | */ | |
2136 | cp = bdp->buf; | |
2137 | *cp = *s; | |
2138 | ||
2139 | bdp->length = 1; | |
2140 | bdp->status |= BD_SC_READY; | |
2141 | ||
2142 | if (bdp->status & BD_SC_WRAP) | |
2143 | bdp = bdbase; | |
2144 | else | |
2145 | bdp++; | |
2146 | ||
2147 | /* if a LF, also do CR... */ | |
2148 | if (*s == 10) { | |
2149 | while (bdp->status & BD_SC_READY); | |
2150 | /* cp = __va(bdp->buf); */ | |
2151 | cp = bdp->buf; | |
2152 | *cp = 13; | |
2153 | bdp->length = 1; | |
2154 | bdp->status |= BD_SC_READY; | |
2155 | ||
2156 | if (bdp->status & BD_SC_WRAP) { | |
2157 | bdp = bdbase; | |
2158 | } | |
2159 | else { | |
2160 | bdp++; | |
2161 | } | |
2162 | } | |
2163 | } | |
2164 | ||
2165 | /* | |
2166 | * Finally, Wait for transmitter & holding register to empty | |
2167 | * and restore the IER | |
2168 | */ | |
2169 | while (bdp->status & BD_SC_READY); | |
2170 | ||
2171 | if (info) | |
2172 | info->tx_cur = (QUICC_BD *)bdp; | |
2173 | } | |
2174 | ||
2175 | static void serial_console_write(struct console *c, const char *s, | |
2176 | unsigned count) | |
2177 | { | |
2178 | #ifdef CONFIG_KGDB | |
2179 | /* Try to let stub handle output. Returns true if it did. */ | |
2180 | if (kgdb_output_string(s, count)) | |
2181 | return; | |
2182 | #endif | |
2183 | my_console_write(c->index, s, count); | |
2184 | } | |
2185 | ||
2186 | ||
2187 | ||
2188 | /*void console_print_68360(const char *p) | |
2189 | { | |
2190 | const char *cp = p; | |
2191 | int i; | |
2192 | ||
2193 | for (i=0;cp[i]!=0;i++); | |
2194 | ||
2195 | serial_console_write (p, i); | |
2196 | ||
2197 | //Comment this if you want to have a strict interrupt-driven output | |
2198 | //rs_fair_output(); | |
2199 | ||
2200 | return; | |
2201 | }*/ | |
2202 | ||
2203 | ||
2204 | ||
2205 | ||
2206 | ||
2207 | ||
2208 | #ifdef CONFIG_XMON | |
2209 | int | |
2210 | xmon_360_write(const char *s, unsigned count) | |
2211 | { | |
2212 | my_console_write(0, s, count); | |
2213 | return(count); | |
2214 | } | |
2215 | #endif | |
2216 | ||
2217 | #ifdef CONFIG_KGDB | |
2218 | void | |
2219 | putDebugChar(char ch) | |
2220 | { | |
2221 | my_console_write(0, &ch, 1); | |
2222 | } | |
2223 | #endif | |
2224 | ||
2225 | /* | |
2226 | * Receive character from the serial port. This only works well | |
2227 | * before the port is initialized for real use. | |
2228 | */ | |
2229 | static int my_console_wait_key(int idx, int xmon, char *obuf) | |
2230 | { | |
2231 | struct serial_state *ser; | |
2232 | u_char c, *cp; | |
2233 | ser_info_t *info; | |
2234 | QUICC_BD *bdp; | |
2235 | volatile struct smc_uart_pram *up; | |
2236 | int i; | |
2237 | ||
2238 | ser = rs_table + idx; | |
2239 | ||
2240 | /* Get the address of the host memory buffer. | |
2241 | * If the port has been initialized for general use, we must | |
2242 | * use information from the port structure. | |
2243 | */ | |
2244 | if ((info = (ser_info_t *)ser->info)) | |
2245 | bdp = info->rx_cur; | |
2246 | else | |
2247 | /* bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase]; */ | |
2248 | bdp = (QUICC_BD *)((uint)pquicc + (uint)up->tbase); | |
2249 | ||
2250 | /* Pointer to UART in parameter ram. | |
2251 | */ | |
2252 | /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */ | |
2253 | up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u; | |
2254 | ||
2255 | /* | |
2256 | * We need to gracefully shut down the receiver, disable | |
2257 | * interrupts, then read the input. | |
2258 | * XMON just wants a poll. If no character, return -1, else | |
2259 | * return the character. | |
2260 | */ | |
2261 | if (!xmon) { | |
2262 | while (bdp->status & BD_SC_EMPTY); | |
2263 | } | |
2264 | else { | |
2265 | if (bdp->status & BD_SC_EMPTY) | |
2266 | return -1; | |
2267 | } | |
2268 | ||
2269 | cp = (char *)bdp->buf; | |
2270 | ||
2271 | if (obuf) { | |
2272 | i = c = bdp->length; | |
2273 | while (i-- > 0) | |
2274 | *obuf++ = *cp++; | |
2275 | } | |
2276 | else { | |
2277 | c = *cp; | |
2278 | } | |
2279 | bdp->status |= BD_SC_EMPTY; | |
2280 | ||
2281 | if (info) { | |
2282 | if (bdp->status & BD_SC_WRAP) { | |
2283 | bdp = info->rx_bd_base; | |
2284 | } | |
2285 | else { | |
2286 | bdp++; | |
2287 | } | |
2288 | info->rx_cur = (QUICC_BD *)bdp; | |
2289 | } | |
2290 | ||
2291 | return((int)c); | |
2292 | } | |
2293 | ||
2294 | static int serial_console_wait_key(struct console *co) | |
2295 | { | |
2296 | return(my_console_wait_key(co->index, 0, NULL)); | |
2297 | } | |
2298 | ||
2299 | #ifdef CONFIG_XMON | |
2300 | int | |
2301 | xmon_360_read_poll(void) | |
2302 | { | |
2303 | return(my_console_wait_key(0, 1, NULL)); | |
2304 | } | |
2305 | ||
2306 | int | |
2307 | xmon_360_read_char(void) | |
2308 | { | |
2309 | return(my_console_wait_key(0, 0, NULL)); | |
2310 | } | |
2311 | #endif | |
2312 | ||
2313 | #ifdef CONFIG_KGDB | |
2314 | static char kgdb_buf[RX_BUF_SIZE], *kgdp; | |
2315 | static int kgdb_chars; | |
2316 | ||
2317 | unsigned char | |
2318 | getDebugChar(void) | |
2319 | { | |
2320 | if (kgdb_chars <= 0) { | |
2321 | kgdb_chars = my_console_wait_key(0, 0, kgdb_buf); | |
2322 | kgdp = kgdb_buf; | |
2323 | } | |
2324 | kgdb_chars--; | |
2325 | ||
2326 | return(*kgdp++); | |
2327 | } | |
2328 | ||
2329 | void kgdb_interruptible(int state) | |
2330 | { | |
2331 | } | |
2332 | void kgdb_map_scc(void) | |
2333 | { | |
2334 | struct serial_state *ser; | |
2335 | uint mem_addr; | |
2336 | volatile QUICC_BD *bdp; | |
2337 | volatile smc_uart_t *up; | |
2338 | ||
2339 | cpmp = (cpm360_t *)&(((immap_t *)IMAP_ADDR)->im_cpm); | |
2340 | ||
2341 | /* To avoid data cache CPM DMA coherency problems, allocate a | |
2342 | * buffer in the CPM DPRAM. This will work until the CPM and | |
2343 | * serial ports are initialized. At that time a memory buffer | |
2344 | * will be allocated. | |
2345 | * The port is already initialized from the boot procedure, all | |
2346 | * we do here is give it a different buffer and make it a FIFO. | |
2347 | */ | |
2348 | ||
2349 | ser = rs_table; | |
2350 | ||
2351 | /* Right now, assume we are using SMCs. | |
2352 | */ | |
2353 | up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; | |
2354 | ||
2355 | /* Allocate space for an input FIFO, plus a few bytes for output. | |
2356 | * Allocate bytes to maintain word alignment. | |
2357 | */ | |
2358 | mem_addr = (uint)(&cpmp->cp_dpmem[0x1000]); | |
2359 | ||
2360 | /* Set the physical address of the host memory buffers in | |
2361 | * the buffer descriptors. | |
2362 | */ | |
2363 | bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase]; | |
2364 | bdp->buf = mem_addr; | |
2365 | ||
2366 | bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_tbase]; | |
2367 | bdp->buf = mem_addr+RX_BUF_SIZE; | |
2368 | ||
2369 | up->smc_mrblr = RX_BUF_SIZE; /* receive buffer length */ | |
2370 | up->smc_maxidl = RX_BUF_SIZE; | |
2371 | } | |
2372 | #endif | |
2373 | ||
2374 | static struct tty_struct *serial_console_device(struct console *c, int *index) | |
2375 | { | |
2376 | *index = c->index; | |
2377 | return serial_driver; | |
2378 | } | |
2379 | ||
2380 | ||
2381 | struct console sercons = { | |
2382 | .name = "ttyS", | |
2383 | .write = serial_console_write, | |
2384 | .device = serial_console_device, | |
2385 | .wait_key = serial_console_wait_key, | |
2386 | .setup = serial_console_setup, | |
2387 | .flags = CON_PRINTBUFFER, | |
2388 | .index = CONFIG_SERIAL_CONSOLE_PORT, | |
2389 | }; | |
2390 | ||
2391 | ||
2392 | ||
2393 | /* | |
2394 | * Register console. | |
2395 | */ | |
2396 | long console_360_init(long kmem_start, long kmem_end) | |
2397 | { | |
2398 | register_console(&sercons); | |
2399 | /*register_console (console_print_68360); - 2.0.38 only required a write | |
2400 | function pointer. */ | |
2401 | return kmem_start; | |
2402 | } | |
2403 | ||
2404 | #endif | |
2405 | ||
2406 | /* Index in baud rate table of the default console baud rate. | |
2407 | */ | |
2408 | static int baud_idx; | |
2409 | ||
b68e31d0 | 2410 | static const struct tty_operations rs_360_ops = { |
1da177e4 LT |
2411 | .owner = THIS_MODULE, |
2412 | .open = rs_360_open, | |
2413 | .close = rs_360_close, | |
2414 | .write = rs_360_write, | |
2415 | .put_char = rs_360_put_char, | |
2416 | .write_room = rs_360_write_room, | |
2417 | .chars_in_buffer = rs_360_chars_in_buffer, | |
2418 | .flush_buffer = rs_360_flush_buffer, | |
2419 | .ioctl = rs_360_ioctl, | |
2420 | .throttle = rs_360_throttle, | |
2421 | .unthrottle = rs_360_unthrottle, | |
2422 | /* .send_xchar = rs_360_send_xchar, */ | |
2423 | .set_termios = rs_360_set_termios, | |
2424 | .stop = rs_360_stop, | |
2425 | .start = rs_360_start, | |
2426 | .hangup = rs_360_hangup, | |
2427 | /* .wait_until_sent = rs_360_wait_until_sent, */ | |
2428 | /* .read_proc = rs_360_read_proc, */ | |
2429 | .tiocmget = rs_360_tiocmget, | |
2430 | .tiocmset = rs_360_tiocmset, | |
2431 | }; | |
2432 | ||
a1007770 | 2433 | static int __init rs_360_init(void) |
1da177e4 LT |
2434 | { |
2435 | struct serial_state * state; | |
2436 | ser_info_t *info; | |
2437 | void *mem_addr; | |
2438 | uint dp_addr, iobits; | |
2439 | int i, j, idx; | |
2440 | ushort chan; | |
2441 | QUICC_BD *bdp; | |
2442 | volatile QUICC *cp; | |
2443 | volatile struct smc_regs *sp; | |
2444 | volatile struct smc_uart_pram *up; | |
2445 | volatile struct scc_regs *scp; | |
2446 | volatile struct uart_pram *sup; | |
2447 | /* volatile immap_t *immap; */ | |
2448 | ||
2449 | serial_driver = alloc_tty_driver(NR_PORTS); | |
2450 | if (!serial_driver) | |
2451 | return -1; | |
2452 | ||
2453 | show_serial_version(); | |
2454 | ||
2455 | serial_driver->name = "ttyS"; | |
2456 | serial_driver->major = TTY_MAJOR; | |
2457 | serial_driver->minor_start = 64; | |
2458 | serial_driver->type = TTY_DRIVER_TYPE_SERIAL; | |
2459 | serial_driver->subtype = SERIAL_TYPE_NORMAL; | |
2460 | serial_driver->init_termios = tty_std_termios; | |
2461 | serial_driver->init_termios.c_cflag = | |
2462 | baud_idx | CS8 | CREAD | HUPCL | CLOCAL; | |
2463 | serial_driver->flags = TTY_DRIVER_REAL_RAW; | |
2464 | tty_set_operations(serial_driver, &rs_360_ops); | |
2465 | ||
2466 | if (tty_register_driver(serial_driver)) | |
2467 | panic("Couldn't register serial driver\n"); | |
2468 | ||
2469 | cp = pquicc; /* Get pointer to Communication Processor */ | |
2470 | /* immap = (immap_t *)IMAP_ADDR; */ /* and to internal registers */ | |
2471 | ||
2472 | ||
2473 | /* Configure SCC2, SCC3, and SCC4 instead of port A parallel I/O. | |
2474 | */ | |
2475 | /* The "standard" configuration through the 860. | |
2476 | */ | |
2477 | /* immap->im_ioport.iop_papar |= 0x00fc; */ | |
2478 | /* immap->im_ioport.iop_padir &= ~0x00fc; */ | |
2479 | /* immap->im_ioport.iop_paodr &= ~0x00fc; */ | |
2480 | cp->pio_papar |= 0x00fc; | |
2481 | cp->pio_padir &= ~0x00fc; | |
2482 | /* cp->pio_paodr &= ~0x00fc; */ | |
2483 | ||
2484 | ||
2485 | /* Since we don't yet do modem control, connect the port C pins | |
2486 | * as general purpose I/O. This will assert CTS and CD for the | |
2487 | * SCC ports. | |
2488 | */ | |
2489 | /* FIXME: see 360um p.7-365 and 860um p.34-12 | |
2490 | * I can't make sense of these bits - mleslie*/ | |
2491 | /* immap->im_ioport.iop_pcdir |= 0x03c6; */ | |
2492 | /* immap->im_ioport.iop_pcpar &= ~0x03c6; */ | |
2493 | ||
2494 | /* cp->pio_pcdir |= 0x03c6; */ | |
2495 | /* cp->pio_pcpar &= ~0x03c6; */ | |
2496 | ||
2497 | ||
2498 | ||
2499 | /* Connect SCC2 and SCC3 to NMSI. Connect BRG3 to SCC2 and | |
2500 | * BRG4 to SCC3. | |
2501 | */ | |
2502 | cp->si_sicr &= ~0x00ffff00; | |
2503 | cp->si_sicr |= 0x001b1200; | |
2504 | ||
2505 | #ifdef CONFIG_PP04 | |
2506 | /* Frequentis PP04 forced to RS-232 until we know better. | |
2507 | * Port C 12 and 13 low enables RS-232 on SCC3 and SCC4. | |
2508 | */ | |
2509 | immap->im_ioport.iop_pcdir |= 0x000c; | |
2510 | immap->im_ioport.iop_pcpar &= ~0x000c; | |
2511 | immap->im_ioport.iop_pcdat &= ~0x000c; | |
2512 | ||
2513 | /* This enables the TX driver. | |
2514 | */ | |
2515 | cp->cp_pbpar &= ~0x6000; | |
2516 | cp->cp_pbdat &= ~0x6000; | |
2517 | #endif | |
2518 | ||
2519 | for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) { | |
2520 | state->magic = SSTATE_MAGIC; | |
2521 | state->line = i; | |
2522 | state->type = PORT_UNKNOWN; | |
2523 | state->custom_divisor = 0; | |
2524 | state->close_delay = 5*HZ/10; | |
2525 | state->closing_wait = 30*HZ; | |
2526 | state->icount.cts = state->icount.dsr = | |
2527 | state->icount.rng = state->icount.dcd = 0; | |
2528 | state->icount.rx = state->icount.tx = 0; | |
2529 | state->icount.frame = state->icount.parity = 0; | |
2530 | state->icount.overrun = state->icount.brk = 0; | |
2531 | printk(KERN_INFO "ttyS%d at irq 0x%02x is an %s\n", | |
2532 | i, (unsigned int)(state->irq), | |
2533 | (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC"); | |
2534 | ||
2535 | #ifdef CONFIG_SERIAL_CONSOLE | |
2536 | /* If we just printed the message on the console port, and | |
2537 | * we are about to initialize it for general use, we have | |
2538 | * to wait a couple of character times for the CR/NL to | |
2539 | * make it out of the transmit buffer. | |
2540 | */ | |
2541 | if (i == CONFIG_SERIAL_CONSOLE_PORT) | |
2542 | mdelay(8); | |
2543 | ||
2544 | ||
2545 | /* idx = PORT_NUM(info->state->smc_scc_num); */ | |
2546 | /* if (info->state->smc_scc_num & NUM_IS_SCC) */ | |
2547 | /* chan = scc_chan_map[idx]; */ | |
2548 | /* else */ | |
2549 | /* chan = smc_chan_map[idx]; */ | |
2550 | ||
2551 | /* cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG; */ | |
2552 | /* while (cp->cp_cr & CPM_CR_FLG); */ | |
2553 | ||
2554 | #endif | |
2555 | /* info = kmalloc(sizeof(ser_info_t), GFP_KERNEL); */ | |
2556 | info = &quicc_ser_info[i]; | |
2557 | if (info) { | |
2558 | memset (info, 0, sizeof(ser_info_t)); | |
2559 | info->magic = SERIAL_MAGIC; | |
2560 | info->line = i; | |
2561 | info->flags = state->flags; | |
2562 | INIT_WORK(&info->tqueue, do_softint, info); | |
2563 | INIT_WORK(&info->tqueue_hangup, do_serial_hangup, info); | |
2564 | init_waitqueue_head(&info->open_wait); | |
2565 | init_waitqueue_head(&info->close_wait); | |
2566 | info->state = state; | |
2567 | state->info = (struct async_struct *)info; | |
2568 | ||
2569 | /* We need to allocate a transmit and receive buffer | |
2570 | * descriptors from dual port ram, and a character | |
2571 | * buffer area from host mem. | |
2572 | */ | |
2573 | dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * RX_NUM_FIFO); | |
2574 | ||
2575 | /* Allocate space for FIFOs in the host memory. | |
2576 | * (for now this is from a static array of buffers :( | |
2577 | */ | |
2578 | /* mem_addr = m360_cpm_hostalloc(RX_NUM_FIFO * RX_BUF_SIZE); */ | |
2579 | /* mem_addr = kmalloc (RX_NUM_FIFO * RX_BUF_SIZE, GFP_BUFFER); */ | |
2580 | mem_addr = &rx_buf_pool[i * RX_NUM_FIFO * RX_BUF_SIZE]; | |
2581 | ||
2582 | /* Set the physical address of the host memory | |
2583 | * buffers in the buffer descriptors, and the | |
2584 | * virtual address for us to work with. | |
2585 | */ | |
2586 | bdp = (QUICC_BD *)((uint)pquicc + dp_addr); | |
2587 | info->rx_cur = info->rx_bd_base = bdp; | |
2588 | ||
2589 | /* initialize rx buffer descriptors */ | |
2590 | for (j=0; j<(RX_NUM_FIFO-1); j++) { | |
2591 | bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE]; | |
2592 | bdp->status = BD_SC_EMPTY | BD_SC_INTRPT; | |
2593 | mem_addr += RX_BUF_SIZE; | |
2594 | bdp++; | |
2595 | } | |
2596 | bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE]; | |
2597 | bdp->status = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT; | |
2598 | ||
2599 | ||
2600 | idx = PORT_NUM(info->state->smc_scc_num); | |
2601 | if (info->state->smc_scc_num & NUM_IS_SCC) { | |
2602 | ||
2603 | #if defined (CONFIG_UCQUICC) && 1 | |
2604 | /* set the transceiver mode to RS232 */ | |
2605 | sipex_mode_bits &= ~(uint)SIPEX_MODE(idx,0x0f); /* clear current mode */ | |
2606 | sipex_mode_bits |= (uint)SIPEX_MODE(idx,0x02); | |
2607 | *(uint *)_periph_base = sipex_mode_bits; | |
2608 | /* printk ("sipex bits = 0x%08x\n", sipex_mode_bits); */ | |
2609 | #endif | |
2610 | } | |
2611 | ||
2612 | dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * TX_NUM_FIFO); | |
2613 | ||
2614 | /* Allocate space for FIFOs in the host memory. | |
2615 | */ | |
2616 | /* mem_addr = m360_cpm_hostalloc(TX_NUM_FIFO * TX_BUF_SIZE); */ | |
2617 | /* mem_addr = kmalloc (TX_NUM_FIFO * TX_BUF_SIZE, GFP_BUFFER); */ | |
2618 | mem_addr = &tx_buf_pool[i * TX_NUM_FIFO * TX_BUF_SIZE]; | |
2619 | ||
2620 | /* Set the physical address of the host memory | |
2621 | * buffers in the buffer descriptors, and the | |
2622 | * virtual address for us to work with. | |
2623 | */ | |
2624 | /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */ | |
2625 | bdp = (QUICC_BD *)((uint)pquicc + dp_addr); | |
2626 | info->tx_cur = info->tx_bd_base = (QUICC_BD *)bdp; | |
2627 | ||
2628 | /* initialize tx buffer descriptors */ | |
2629 | for (j=0; j<(TX_NUM_FIFO-1); j++) { | |
2630 | bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE]; | |
2631 | bdp->status = BD_SC_INTRPT; | |
2632 | mem_addr += TX_BUF_SIZE; | |
2633 | bdp++; | |
2634 | } | |
2635 | bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE]; | |
2636 | bdp->status = (BD_SC_WRAP | BD_SC_INTRPT); | |
2637 | ||
2638 | if (info->state->smc_scc_num & NUM_IS_SCC) { | |
2639 | scp = &pquicc->scc_regs[idx]; | |
2640 | sup = &pquicc->pram[info->state->port].scc.pscc.u; | |
2641 | sup->rbase = dp_addr; | |
2642 | sup->tbase = dp_addr; | |
2643 | ||
2644 | /* Set up the uart parameters in the | |
2645 | * parameter ram. | |
2646 | */ | |
2647 | sup->rfcr = SMC_EB; | |
2648 | sup->tfcr = SMC_EB; | |
2649 | ||
2650 | /* Set this to 1 for now, so we get single | |
2651 | * character interrupts. Using idle charater | |
2652 | * time requires some additional tuning. | |
2653 | */ | |
2654 | sup->mrblr = 1; | |
2655 | sup->max_idl = 0; | |
2656 | sup->brkcr = 1; | |
2657 | sup->parec = 0; | |
2658 | sup->frmer = 0; | |
2659 | sup->nosec = 0; | |
2660 | sup->brkec = 0; | |
2661 | sup->uaddr1 = 0; | |
2662 | sup->uaddr2 = 0; | |
2663 | sup->toseq = 0; | |
2664 | { | |
2665 | int i; | |
2666 | for (i=0;i<8;i++) | |
2667 | sup->cc[i] = 0x8000; | |
2668 | } | |
2669 | sup->rccm = 0xc0ff; | |
2670 | ||
2671 | /* Send the CPM an initialize command. | |
2672 | */ | |
2673 | chan = scc_chan_map[idx]; | |
2674 | ||
2675 | /* execute the INIT RX & TX PARAMS command for this channel. */ | |
2676 | cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG; | |
2677 | while (cp->cp_cr & CPM_CR_FLG); | |
2678 | ||
2679 | /* Set UART mode, 8 bit, no parity, one stop. | |
2680 | * Enable receive and transmit. | |
2681 | */ | |
2682 | scp->scc_gsmr.w.high = 0; | |
2683 | scp->scc_gsmr.w.low = | |
2684 | (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16); | |
2685 | ||
2686 | /* Disable all interrupts and clear all pending | |
2687 | * events. | |
2688 | */ | |
2689 | scp->scc_sccm = 0; | |
2690 | scp->scc_scce = 0xffff; | |
2691 | scp->scc_dsr = 0x7e7e; | |
2692 | scp->scc_psmr = 0x3000; | |
2693 | ||
2694 | /* If the port is the console, enable Rx and Tx. | |
2695 | */ | |
2696 | #ifdef CONFIG_SERIAL_CONSOLE | |
2697 | if (i == CONFIG_SERIAL_CONSOLE_PORT) | |
2698 | scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT); | |
2699 | #endif | |
2700 | } | |
2701 | else { | |
2702 | /* Configure SMCs Tx/Rx instead of port B | |
2703 | * parallel I/O. | |
2704 | */ | |
2705 | up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u; | |
2706 | up->rbase = dp_addr; | |
2707 | ||
2708 | iobits = 0xc0 << (idx * 4); | |
2709 | cp->pip_pbpar |= iobits; | |
2710 | cp->pip_pbdir &= ~iobits; | |
2711 | cp->pip_pbodr &= ~iobits; | |
2712 | ||
2713 | ||
2714 | /* Connect the baud rate generator to the | |
2715 | * SMC based upon index in rs_table. Also | |
2716 | * make sure it is connected to NMSI. | |
2717 | */ | |
2718 | cp->si_simode &= ~(0xffff << (idx * 16)); | |
2719 | cp->si_simode |= (i << ((idx * 16) + 12)); | |
2720 | ||
2721 | up->tbase = dp_addr; | |
2722 | ||
2723 | /* Set up the uart parameters in the | |
2724 | * parameter ram. | |
2725 | */ | |
2726 | up->rfcr = SMC_EB; | |
2727 | up->tfcr = SMC_EB; | |
2728 | ||
2729 | /* Set this to 1 for now, so we get single | |
2730 | * character interrupts. Using idle charater | |
2731 | * time requires some additional tuning. | |
2732 | */ | |
2733 | up->mrblr = 1; | |
2734 | up->max_idl = 0; | |
2735 | up->brkcr = 1; | |
2736 | ||
2737 | /* Send the CPM an initialize command. | |
2738 | */ | |
2739 | chan = smc_chan_map[idx]; | |
2740 | ||
2741 | cp->cp_cr = mk_cr_cmd(chan, | |
2742 | CPM_CR_INIT_TRX) | CPM_CR_FLG; | |
2743 | #ifdef CONFIG_SERIAL_CONSOLE | |
2744 | if (i == CONFIG_SERIAL_CONSOLE_PORT) | |
2745 | printk(""); | |
2746 | #endif | |
2747 | while (cp->cp_cr & CPM_CR_FLG); | |
2748 | ||
2749 | /* Set UART mode, 8 bit, no parity, one stop. | |
2750 | * Enable receive and transmit. | |
2751 | */ | |
2752 | sp = &cp->smc_regs[idx]; | |
2753 | sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART; | |
2754 | ||
2755 | /* Disable all interrupts and clear all pending | |
2756 | * events. | |
2757 | */ | |
2758 | sp->smc_smcm = 0; | |
2759 | sp->smc_smce = 0xff; | |
2760 | ||
2761 | /* If the port is the console, enable Rx and Tx. | |
2762 | */ | |
2763 | #ifdef CONFIG_SERIAL_CONSOLE | |
2764 | if (i == CONFIG_SERIAL_CONSOLE_PORT) | |
2765 | sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN; | |
2766 | #endif | |
2767 | } | |
2768 | ||
2769 | /* Install interrupt handler. | |
2770 | */ | |
2771 | /* cpm_install_handler(IRQ_MACHSPEC | state->irq, rs_360_interrupt, info); */ | |
2772 | /*request_irq(IRQ_MACHSPEC | state->irq, rs_360_interrupt, */ | |
2773 | request_irq(state->irq, rs_360_interrupt, | |
2774 | IRQ_FLG_LOCK, "ttyS", (void *)info); | |
2775 | ||
2776 | /* Set up the baud rate generator. | |
2777 | */ | |
2778 | m360_cpm_setbrg(i, baud_table[baud_idx]); | |
2779 | ||
2780 | } | |
2781 | } | |
2782 | ||
2783 | return 0; | |
2784 | } | |
a1007770 | 2785 | module_init(rs_360_init); |
1da177e4 LT |
2786 | |
2787 | /* This must always be called before the rs_360_init() function, otherwise | |
2788 | * it blows away the port control information. | |
2789 | */ | |
2790 | //static int __init serial_console_setup( struct console *co, char *options) | |
2791 | int serial_console_setup( struct console *co, char *options) | |
2792 | { | |
2793 | struct serial_state *ser; | |
2794 | uint mem_addr, dp_addr, bidx, idx, iobits; | |
2795 | ushort chan; | |
2796 | QUICC_BD *bdp; | |
2797 | volatile QUICC *cp; | |
2798 | volatile struct smc_regs *sp; | |
2799 | volatile struct scc_regs *scp; | |
2800 | volatile struct smc_uart_pram *up; | |
2801 | volatile struct uart_pram *sup; | |
2802 | ||
2803 | /* mleslie TODO: | |
2804 | * add something to the 68k bootloader to store a desired initial console baud rate */ | |
2805 | ||
2806 | /* bd_t *bd; */ /* a board info struct used by EPPC-bug */ | |
2807 | /* bd = (bd_t *)__res; */ | |
2808 | ||
2809 | for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++) | |
2810 | /* if (bd->bi_baudrate == baud_table[bidx]) */ | |
2811 | if (CONSOLE_BAUDRATE == baud_table[bidx]) | |
2812 | break; | |
2813 | ||
2814 | /* co->cflag = CREAD|CLOCAL|bidx|CS8; */ | |
2815 | baud_idx = bidx; | |
2816 | ||
2817 | ser = rs_table + CONFIG_SERIAL_CONSOLE_PORT; | |
2818 | ||
2819 | cp = pquicc; /* Get pointer to Communication Processor */ | |
2820 | ||
2821 | idx = PORT_NUM(ser->smc_scc_num); | |
2822 | if (ser->smc_scc_num & NUM_IS_SCC) { | |
2823 | ||
2824 | /* TODO: need to set up SCC pin assignment etc. here */ | |
2825 | ||
2826 | } | |
2827 | else { | |
2828 | iobits = 0xc0 << (idx * 4); | |
2829 | cp->pip_pbpar |= iobits; | |
2830 | cp->pip_pbdir &= ~iobits; | |
2831 | cp->pip_pbodr &= ~iobits; | |
2832 | ||
2833 | /* Connect the baud rate generator to the | |
2834 | * SMC based upon index in rs_table. Also | |
2835 | * make sure it is connected to NMSI. | |
2836 | */ | |
2837 | cp->si_simode &= ~(0xffff << (idx * 16)); | |
2838 | cp->si_simode |= (idx << ((idx * 16) + 12)); | |
2839 | } | |
2840 | ||
2841 | /* When we get here, the CPM has been reset, so we need | |
2842 | * to configure the port. | |
2843 | * We need to allocate a transmit and receive buffer descriptor | |
2844 | * from dual port ram, and a character buffer area from host mem. | |
2845 | */ | |
2846 | ||
2847 | /* Allocate space for two buffer descriptors in the DP ram. | |
2848 | */ | |
2849 | dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * CONSOLE_NUM_FIFO); | |
2850 | ||
2851 | /* Allocate space for two 2 byte FIFOs in the host memory. | |
2852 | */ | |
2853 | /* mem_addr = m360_cpm_hostalloc(8); */ | |
2854 | mem_addr = (uint)console_fifos; | |
2855 | ||
2856 | ||
2857 | /* Set the physical address of the host memory buffers in | |
2858 | * the buffer descriptors. | |
2859 | */ | |
2860 | /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */ | |
2861 | bdp = (QUICC_BD *)((uint)pquicc + dp_addr); | |
2862 | bdp->buf = (char *)mem_addr; | |
2863 | (bdp+1)->buf = (char *)(mem_addr+4); | |
2864 | ||
2865 | /* For the receive, set empty and wrap. | |
2866 | * For transmit, set wrap. | |
2867 | */ | |
2868 | bdp->status = BD_SC_EMPTY | BD_SC_WRAP; | |
2869 | (bdp+1)->status = BD_SC_WRAP; | |
2870 | ||
2871 | /* Set up the uart parameters in the parameter ram. | |
2872 | */ | |
2873 | if (ser->smc_scc_num & NUM_IS_SCC) { | |
2874 | scp = &cp->scc_regs[idx]; | |
2875 | /* sup = (scc_uart_t *)&cp->cp_dparam[ser->port]; */ | |
2876 | sup = &pquicc->pram[ser->port].scc.pscc.u; | |
2877 | ||
2878 | sup->rbase = dp_addr; | |
2879 | sup->tbase = dp_addr + sizeof(QUICC_BD); | |
2880 | ||
2881 | /* Set up the uart parameters in the | |
2882 | * parameter ram. | |
2883 | */ | |
2884 | sup->rfcr = SMC_EB; | |
2885 | sup->tfcr = SMC_EB; | |
2886 | ||
2887 | /* Set this to 1 for now, so we get single | |
2888 | * character interrupts. Using idle charater | |
2889 | * time requires some additional tuning. | |
2890 | */ | |
2891 | sup->mrblr = 1; | |
2892 | sup->max_idl = 0; | |
2893 | sup->brkcr = 1; | |
2894 | sup->parec = 0; | |
2895 | sup->frmer = 0; | |
2896 | sup->nosec = 0; | |
2897 | sup->brkec = 0; | |
2898 | sup->uaddr1 = 0; | |
2899 | sup->uaddr2 = 0; | |
2900 | sup->toseq = 0; | |
2901 | { | |
2902 | int i; | |
2903 | for (i=0;i<8;i++) | |
2904 | sup->cc[i] = 0x8000; | |
2905 | } | |
2906 | sup->rccm = 0xc0ff; | |
2907 | ||
2908 | /* Send the CPM an initialize command. | |
2909 | */ | |
2910 | chan = scc_chan_map[idx]; | |
2911 | ||
2912 | cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG; | |
2913 | while (cp->cp_cr & CPM_CR_FLG); | |
2914 | ||
2915 | /* Set UART mode, 8 bit, no parity, one stop. | |
2916 | * Enable receive and transmit. | |
2917 | */ | |
2918 | scp->scc_gsmr.w.high = 0; | |
2919 | scp->scc_gsmr.w.low = | |
2920 | (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16); | |
2921 | ||
2922 | /* Disable all interrupts and clear all pending | |
2923 | * events. | |
2924 | */ | |
2925 | scp->scc_sccm = 0; | |
2926 | scp->scc_scce = 0xffff; | |
2927 | scp->scc_dsr = 0x7e7e; | |
2928 | scp->scc_psmr = 0x3000; | |
2929 | ||
2930 | scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT); | |
2931 | ||
2932 | } | |
2933 | else { | |
2934 | /* up = (smc_uart_t *)&cp->cp_dparam[ser->port]; */ | |
2935 | up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u; | |
2936 | ||
2937 | up->rbase = dp_addr; /* Base of receive buffer desc. */ | |
2938 | up->tbase = dp_addr+sizeof(QUICC_BD); /* Base of xmt buffer desc. */ | |
2939 | up->rfcr = SMC_EB; | |
2940 | up->tfcr = SMC_EB; | |
2941 | ||
2942 | /* Set this to 1 for now, so we get single character interrupts. | |
2943 | */ | |
2944 | up->mrblr = 1; /* receive buffer length */ | |
2945 | up->max_idl = 0; /* wait forever for next char */ | |
2946 | ||
2947 | /* Send the CPM an initialize command. | |
2948 | */ | |
2949 | chan = smc_chan_map[idx]; | |
2950 | cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG; | |
2951 | while (cp->cp_cr & CPM_CR_FLG); | |
2952 | ||
2953 | /* Set UART mode, 8 bit, no parity, one stop. | |
2954 | * Enable receive and transmit. | |
2955 | */ | |
2956 | sp = &cp->smc_regs[idx]; | |
2957 | sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART; | |
2958 | ||
2959 | /* And finally, enable Rx and Tx. | |
2960 | */ | |
2961 | sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN; | |
2962 | } | |
2963 | ||
2964 | /* Set up the baud rate generator. | |
2965 | */ | |
2966 | /* m360_cpm_setbrg((ser - rs_table), bd->bi_baudrate); */ | |
2967 | m360_cpm_setbrg((ser - rs_table), CONSOLE_BAUDRATE); | |
2968 | ||
2969 | return 0; | |
2970 | } | |
2971 | ||
2972 | /* | |
2973 | * Local variables: | |
2974 | * c-indent-level: 4 | |
2975 | * c-basic-offset: 4 | |
2976 | * tab-width: 4 | |
2977 | * End: | |
2978 | */ |