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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/drivers/serial/cpm_uart.c | |
3 | * | |
4 | * Driver for CPM (SCC/SMC) serial ports; core driver | |
5 | * | |
6 | * Based on arch/ppc/cpm2_io/uart.c by Dan Malek | |
7 | * Based on ppc8xx.c by Thomas Gleixner | |
8 | * Based on drivers/serial/amba.c by Russell King | |
9 | * | |
4c8d3d99 | 10 | * Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2) |
1da177e4 | 11 | * Pantelis Antoniou (panto@intracom.gr) (CPM1) |
311c4627 | 12 | * |
1da177e4 LT |
13 | * Copyright (C) 2004 Freescale Semiconductor, Inc. |
14 | * (C) 2004 Intracom, S.A. | |
311c4627 | 15 | * (C) 2005 MontaVista Software, Inc. by Vitaly Bordug <vbordug@ru.mvista.com> |
1da177e4 LT |
16 | * |
17 | * This program is free software; you can redistribute it and/or modify | |
18 | * it under the terms of the GNU General Public License as published by | |
19 | * the Free Software Foundation; either version 2 of the License, or | |
20 | * (at your option) any later version. | |
21 | * | |
22 | * This program is distributed in the hope that it will be useful, | |
23 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
24 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
25 | * GNU General Public License for more details. | |
26 | * | |
27 | * You should have received a copy of the GNU General Public License | |
28 | * along with this program; if not, write to the Free Software | |
29 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
30 | * | |
31 | */ | |
32 | ||
33 | #include <linux/config.h> | |
34 | #include <linux/module.h> | |
35 | #include <linux/tty.h> | |
36 | #include <linux/ioport.h> | |
37 | #include <linux/init.h> | |
38 | #include <linux/serial.h> | |
39 | #include <linux/console.h> | |
40 | #include <linux/sysrq.h> | |
41 | #include <linux/device.h> | |
42 | #include <linux/bootmem.h> | |
43 | #include <linux/dma-mapping.h> | |
e27987cd | 44 | #include <linux/fs_uart_pd.h> |
1da177e4 LT |
45 | |
46 | #include <asm/io.h> | |
47 | #include <asm/irq.h> | |
48 | #include <asm/delay.h> | |
49 | ||
50 | #if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | |
51 | #define SUPPORT_SYSRQ | |
52 | #endif | |
53 | ||
54 | #include <linux/serial_core.h> | |
55 | #include <linux/kernel.h> | |
56 | ||
57 | #include "cpm_uart.h" | |
58 | ||
59 | /***********************************************************************/ | |
60 | ||
61 | /* Track which ports are configured as uarts */ | |
62 | int cpm_uart_port_map[UART_NR]; | |
63 | /* How many ports did we config as uarts */ | |
e27987cd | 64 | int cpm_uart_nr = 0; |
1da177e4 LT |
65 | |
66 | /**************************************************************/ | |
67 | ||
68 | static int cpm_uart_tx_pump(struct uart_port *port); | |
69 | static void cpm_uart_init_smc(struct uart_cpm_port *pinfo); | |
70 | static void cpm_uart_init_scc(struct uart_cpm_port *pinfo); | |
71 | static void cpm_uart_initbd(struct uart_cpm_port *pinfo); | |
72 | ||
73 | /**************************************************************/ | |
74 | ||
311c4627 | 75 | |
e27987cd VB |
76 | /* Place-holder for board-specific stuff */ |
77 | struct platform_device* __attribute__ ((weak)) __init | |
78 | early_uart_get_pdev(int index) | |
79 | { | |
80 | return NULL; | |
81 | } | |
82 | ||
83 | ||
84 | void cpm_uart_count(void) | |
85 | { | |
86 | cpm_uart_nr = 0; | |
87 | #ifdef CONFIG_SERIAL_CPM_SMC1 | |
88 | cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1; | |
89 | #endif | |
90 | #ifdef CONFIG_SERIAL_CPM_SMC2 | |
91 | cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2; | |
92 | #endif | |
93 | #ifdef CONFIG_SERIAL_CPM_SCC1 | |
94 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1; | |
95 | #endif | |
96 | #ifdef CONFIG_SERIAL_CPM_SCC2 | |
97 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2; | |
98 | #endif | |
99 | #ifdef CONFIG_SERIAL_CPM_SCC3 | |
100 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3; | |
101 | #endif | |
102 | #ifdef CONFIG_SERIAL_CPM_SCC4 | |
103 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4; | |
104 | #endif | |
105 | } | |
106 | ||
1da177e4 | 107 | /* |
311c4627 | 108 | * Check, if transmit buffers are processed |
1da177e4 LT |
109 | */ |
110 | static unsigned int cpm_uart_tx_empty(struct uart_port *port) | |
111 | { | |
112 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | |
113 | volatile cbd_t *bdp = pinfo->tx_bd_base; | |
114 | int ret = 0; | |
115 | ||
116 | while (1) { | |
117 | if (bdp->cbd_sc & BD_SC_READY) | |
118 | break; | |
119 | ||
120 | if (bdp->cbd_sc & BD_SC_WRAP) { | |
121 | ret = TIOCSER_TEMT; | |
122 | break; | |
123 | } | |
124 | bdp++; | |
125 | } | |
126 | ||
127 | pr_debug("CPM uart[%d]:tx_empty: %d\n", port->line, ret); | |
128 | ||
129 | return ret; | |
130 | } | |
131 | ||
132 | static void cpm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) | |
133 | { | |
134 | /* Whee. Do nothing. */ | |
135 | } | |
136 | ||
137 | static unsigned int cpm_uart_get_mctrl(struct uart_port *port) | |
138 | { | |
139 | /* Whee. Do nothing. */ | |
140 | return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; | |
141 | } | |
142 | ||
143 | /* | |
144 | * Stop transmitter | |
145 | */ | |
b129a8cc | 146 | static void cpm_uart_stop_tx(struct uart_port *port) |
1da177e4 LT |
147 | { |
148 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | |
149 | volatile smc_t *smcp = pinfo->smcp; | |
150 | volatile scc_t *sccp = pinfo->sccp; | |
151 | ||
152 | pr_debug("CPM uart[%d]:stop tx\n", port->line); | |
153 | ||
154 | if (IS_SMC(pinfo)) | |
155 | smcp->smc_smcm &= ~SMCM_TX; | |
156 | else | |
157 | sccp->scc_sccm &= ~UART_SCCM_TX; | |
158 | } | |
159 | ||
160 | /* | |
161 | * Start transmitter | |
162 | */ | |
b129a8cc | 163 | static void cpm_uart_start_tx(struct uart_port *port) |
1da177e4 LT |
164 | { |
165 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | |
166 | volatile smc_t *smcp = pinfo->smcp; | |
167 | volatile scc_t *sccp = pinfo->sccp; | |
168 | ||
169 | pr_debug("CPM uart[%d]:start tx\n", port->line); | |
170 | ||
171 | if (IS_SMC(pinfo)) { | |
172 | if (smcp->smc_smcm & SMCM_TX) | |
173 | return; | |
174 | } else { | |
175 | if (sccp->scc_sccm & UART_SCCM_TX) | |
176 | return; | |
177 | } | |
178 | ||
179 | if (cpm_uart_tx_pump(port) != 0) { | |
311c4627 | 180 | if (IS_SMC(pinfo)) { |
1da177e4 | 181 | smcp->smc_smcm |= SMCM_TX; |
311c4627 KG |
182 | smcp->smc_smcmr |= SMCMR_TEN; |
183 | } else { | |
1da177e4 | 184 | sccp->scc_sccm |= UART_SCCM_TX; |
311c4627 KG |
185 | pinfo->sccp->scc_gsmrl |= SCC_GSMRL_ENT; |
186 | } | |
1da177e4 LT |
187 | } |
188 | } | |
189 | ||
190 | /* | |
311c4627 | 191 | * Stop receiver |
1da177e4 LT |
192 | */ |
193 | static void cpm_uart_stop_rx(struct uart_port *port) | |
194 | { | |
195 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | |
196 | volatile smc_t *smcp = pinfo->smcp; | |
197 | volatile scc_t *sccp = pinfo->sccp; | |
198 | ||
199 | pr_debug("CPM uart[%d]:stop rx\n", port->line); | |
200 | ||
201 | if (IS_SMC(pinfo)) | |
202 | smcp->smc_smcm &= ~SMCM_RX; | |
203 | else | |
204 | sccp->scc_sccm &= ~UART_SCCM_RX; | |
205 | } | |
206 | ||
207 | /* | |
208 | * Enable Modem status interrupts | |
209 | */ | |
210 | static void cpm_uart_enable_ms(struct uart_port *port) | |
211 | { | |
212 | pr_debug("CPM uart[%d]:enable ms\n", port->line); | |
213 | } | |
214 | ||
215 | /* | |
311c4627 | 216 | * Generate a break. |
1da177e4 LT |
217 | */ |
218 | static void cpm_uart_break_ctl(struct uart_port *port, int break_state) | |
219 | { | |
220 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | |
221 | int line = pinfo - cpm_uart_ports; | |
222 | ||
223 | pr_debug("CPM uart[%d]:break ctrl, break_state: %d\n", port->line, | |
224 | break_state); | |
225 | ||
226 | if (break_state) | |
227 | cpm_line_cr_cmd(line, CPM_CR_STOP_TX); | |
228 | else | |
229 | cpm_line_cr_cmd(line, CPM_CR_RESTART_TX); | |
230 | } | |
231 | ||
232 | /* | |
233 | * Transmit characters, refill buffer descriptor, if possible | |
234 | */ | |
235 | static void cpm_uart_int_tx(struct uart_port *port, struct pt_regs *regs) | |
236 | { | |
237 | pr_debug("CPM uart[%d]:TX INT\n", port->line); | |
238 | ||
239 | cpm_uart_tx_pump(port); | |
240 | } | |
241 | ||
242 | /* | |
243 | * Receive characters | |
244 | */ | |
245 | static void cpm_uart_int_rx(struct uart_port *port, struct pt_regs *regs) | |
246 | { | |
247 | int i; | |
248 | unsigned char ch, *cp; | |
249 | struct tty_struct *tty = port->info->tty; | |
250 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | |
251 | volatile cbd_t *bdp; | |
252 | u16 status; | |
253 | unsigned int flg; | |
254 | ||
255 | pr_debug("CPM uart[%d]:RX INT\n", port->line); | |
256 | ||
257 | /* Just loop through the closed BDs and copy the characters into | |
258 | * the buffer. | |
259 | */ | |
260 | bdp = pinfo->rx_cur; | |
261 | for (;;) { | |
262 | /* get status */ | |
263 | status = bdp->cbd_sc; | |
264 | /* If this one is empty, return happy */ | |
265 | if (status & BD_SC_EMPTY) | |
266 | break; | |
267 | ||
268 | /* get number of characters, and check spce in flip-buffer */ | |
269 | i = bdp->cbd_datlen; | |
270 | ||
311c4627 | 271 | /* If we have not enough room in tty flip buffer, then we try |
1da177e4 LT |
272 | * later, which will be the next rx-interrupt or a timeout |
273 | */ | |
76a55431 VB |
274 | if(tty_buffer_request_room(tty, i) < i) { |
275 | printk(KERN_WARNING "No room in flip buffer\n"); | |
276 | return; | |
1da177e4 LT |
277 | } |
278 | ||
279 | /* get pointer */ | |
09b03b6c | 280 | cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo); |
1da177e4 LT |
281 | |
282 | /* loop through the buffer */ | |
283 | while (i-- > 0) { | |
284 | ch = *cp++; | |
285 | port->icount.rx++; | |
286 | flg = TTY_NORMAL; | |
287 | ||
288 | if (status & | |
289 | (BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV)) | |
290 | goto handle_error; | |
291 | if (uart_handle_sysrq_char(port, ch, regs)) | |
292 | continue; | |
293 | ||
294 | error_return: | |
76a55431 | 295 | tty_insert_flip_char(tty, ch, flg); |
1da177e4 LT |
296 | |
297 | } /* End while (i--) */ | |
298 | ||
299 | /* This BD is ready to be used again. Clear status. get next */ | |
311c4627 | 300 | bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV | BD_SC_ID); |
1da177e4 LT |
301 | bdp->cbd_sc |= BD_SC_EMPTY; |
302 | ||
303 | if (bdp->cbd_sc & BD_SC_WRAP) | |
304 | bdp = pinfo->rx_bd_base; | |
305 | else | |
306 | bdp++; | |
311c4627 | 307 | |
1da177e4 LT |
308 | } /* End for (;;) */ |
309 | ||
310 | /* Write back buffer pointer */ | |
311 | pinfo->rx_cur = (volatile cbd_t *) bdp; | |
312 | ||
313 | /* activate BH processing */ | |
314 | tty_flip_buffer_push(tty); | |
315 | ||
316 | return; | |
317 | ||
318 | /* Error processing */ | |
319 | ||
320 | handle_error: | |
321 | /* Statistics */ | |
322 | if (status & BD_SC_BR) | |
323 | port->icount.brk++; | |
324 | if (status & BD_SC_PR) | |
325 | port->icount.parity++; | |
326 | if (status & BD_SC_FR) | |
327 | port->icount.frame++; | |
328 | if (status & BD_SC_OV) | |
329 | port->icount.overrun++; | |
330 | ||
331 | /* Mask out ignored conditions */ | |
332 | status &= port->read_status_mask; | |
333 | ||
334 | /* Handle the remaining ones */ | |
335 | if (status & BD_SC_BR) | |
336 | flg = TTY_BREAK; | |
337 | else if (status & BD_SC_PR) | |
338 | flg = TTY_PARITY; | |
339 | else if (status & BD_SC_FR) | |
340 | flg = TTY_FRAME; | |
341 | ||
342 | /* overrun does not affect the current character ! */ | |
343 | if (status & BD_SC_OV) { | |
344 | ch = 0; | |
345 | flg = TTY_OVERRUN; | |
346 | /* We skip this buffer */ | |
347 | /* CHECK: Is really nothing senseful there */ | |
348 | /* ASSUMPTION: it contains nothing valid */ | |
349 | i = 0; | |
350 | } | |
351 | #ifdef SUPPORT_SYSRQ | |
352 | port->sysrq = 0; | |
353 | #endif | |
354 | goto error_return; | |
355 | } | |
356 | ||
357 | /* | |
358 | * Asynchron mode interrupt handler | |
359 | */ | |
360 | static irqreturn_t cpm_uart_int(int irq, void *data, struct pt_regs *regs) | |
361 | { | |
362 | u8 events; | |
363 | struct uart_port *port = (struct uart_port *)data; | |
364 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | |
365 | volatile smc_t *smcp = pinfo->smcp; | |
366 | volatile scc_t *sccp = pinfo->sccp; | |
367 | ||
368 | pr_debug("CPM uart[%d]:IRQ\n", port->line); | |
369 | ||
370 | if (IS_SMC(pinfo)) { | |
371 | events = smcp->smc_smce; | |
311c4627 | 372 | smcp->smc_smce = events; |
1da177e4 LT |
373 | if (events & SMCM_BRKE) |
374 | uart_handle_break(port); | |
375 | if (events & SMCM_RX) | |
376 | cpm_uart_int_rx(port, regs); | |
377 | if (events & SMCM_TX) | |
378 | cpm_uart_int_tx(port, regs); | |
1da177e4 LT |
379 | } else { |
380 | events = sccp->scc_scce; | |
311c4627 | 381 | sccp->scc_scce = events; |
1da177e4 LT |
382 | if (events & UART_SCCM_BRKE) |
383 | uart_handle_break(port); | |
384 | if (events & UART_SCCM_RX) | |
385 | cpm_uart_int_rx(port, regs); | |
386 | if (events & UART_SCCM_TX) | |
387 | cpm_uart_int_tx(port, regs); | |
1da177e4 LT |
388 | } |
389 | return (events) ? IRQ_HANDLED : IRQ_NONE; | |
390 | } | |
391 | ||
392 | static int cpm_uart_startup(struct uart_port *port) | |
393 | { | |
394 | int retval; | |
395 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | |
311c4627 | 396 | int line = pinfo - cpm_uart_ports; |
1da177e4 LT |
397 | |
398 | pr_debug("CPM uart[%d]:startup\n", port->line); | |
399 | ||
400 | /* Install interrupt handler. */ | |
401 | retval = request_irq(port->irq, cpm_uart_int, 0, "cpm_uart", port); | |
402 | if (retval) | |
403 | return retval; | |
404 | ||
405 | /* Startup rx-int */ | |
406 | if (IS_SMC(pinfo)) { | |
407 | pinfo->smcp->smc_smcm |= SMCM_RX; | |
408 | pinfo->smcp->smc_smcmr |= SMCMR_REN; | |
409 | } else { | |
410 | pinfo->sccp->scc_sccm |= UART_SCCM_RX; | |
411 | } | |
412 | ||
311c4627 KG |
413 | if (!(pinfo->flags & FLAG_CONSOLE)) |
414 | cpm_line_cr_cmd(line,CPM_CR_INIT_TRX); | |
1da177e4 LT |
415 | return 0; |
416 | } | |
417 | ||
311c4627 KG |
418 | inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo) |
419 | { | |
638861d5 KG |
420 | set_current_state(TASK_UNINTERRUPTIBLE); |
421 | schedule_timeout(pinfo->wait_closing); | |
311c4627 KG |
422 | } |
423 | ||
1da177e4 LT |
424 | /* |
425 | * Shutdown the uart | |
426 | */ | |
427 | static void cpm_uart_shutdown(struct uart_port *port) | |
428 | { | |
429 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | |
430 | int line = pinfo - cpm_uart_ports; | |
431 | ||
432 | pr_debug("CPM uart[%d]:shutdown\n", port->line); | |
433 | ||
434 | /* free interrupt handler */ | |
435 | free_irq(port->irq, port); | |
436 | ||
437 | /* If the port is not the console, disable Rx and Tx. */ | |
438 | if (!(pinfo->flags & FLAG_CONSOLE)) { | |
311c4627 | 439 | /* Wait for all the BDs marked sent */ |
638861d5 KG |
440 | while(!cpm_uart_tx_empty(port)) { |
441 | set_current_state(TASK_UNINTERRUPTIBLE); | |
311c4627 | 442 | schedule_timeout(2); |
638861d5 KG |
443 | } |
444 | ||
445 | if (pinfo->wait_closing) | |
311c4627 KG |
446 | cpm_uart_wait_until_send(pinfo); |
447 | ||
1da177e4 LT |
448 | /* Stop uarts */ |
449 | if (IS_SMC(pinfo)) { | |
450 | volatile smc_t *smcp = pinfo->smcp; | |
451 | smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); | |
452 | smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX); | |
453 | } else { | |
454 | volatile scc_t *sccp = pinfo->sccp; | |
455 | sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | |
456 | sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX); | |
457 | } | |
458 | ||
459 | /* Shut them really down and reinit buffer descriptors */ | |
61f5657c VB |
460 | if (IS_SMC(pinfo)) |
461 | cpm_line_cr_cmd(line, CPM_CR_STOP_TX); | |
462 | else | |
463 | cpm_line_cr_cmd(line, CPM_CR_GRA_STOP_TX); | |
464 | ||
1da177e4 LT |
465 | cpm_uart_initbd(pinfo); |
466 | } | |
467 | } | |
468 | ||
469 | static void cpm_uart_set_termios(struct uart_port *port, | |
470 | struct termios *termios, struct termios *old) | |
471 | { | |
472 | int baud; | |
473 | unsigned long flags; | |
474 | u16 cval, scval, prev_mode; | |
475 | int bits, sbits; | |
476 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | |
477 | volatile smc_t *smcp = pinfo->smcp; | |
478 | volatile scc_t *sccp = pinfo->sccp; | |
479 | ||
480 | pr_debug("CPM uart[%d]:set_termios\n", port->line); | |
481 | ||
482 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16); | |
483 | ||
484 | /* Character length programmed into the mode register is the | |
485 | * sum of: 1 start bit, number of data bits, 0 or 1 parity bit, | |
486 | * 1 or 2 stop bits, minus 1. | |
487 | * The value 'bits' counts this for us. | |
488 | */ | |
489 | cval = 0; | |
490 | scval = 0; | |
491 | ||
492 | /* byte size */ | |
493 | switch (termios->c_cflag & CSIZE) { | |
494 | case CS5: | |
495 | bits = 5; | |
496 | break; | |
497 | case CS6: | |
498 | bits = 6; | |
499 | break; | |
500 | case CS7: | |
501 | bits = 7; | |
502 | break; | |
503 | case CS8: | |
504 | bits = 8; | |
505 | break; | |
506 | /* Never happens, but GCC is too dumb to figure it out */ | |
507 | default: | |
508 | bits = 8; | |
509 | break; | |
510 | } | |
511 | sbits = bits - 5; | |
512 | ||
513 | if (termios->c_cflag & CSTOPB) { | |
514 | cval |= SMCMR_SL; /* Two stops */ | |
515 | scval |= SCU_PSMR_SL; | |
516 | bits++; | |
517 | } | |
518 | ||
519 | if (termios->c_cflag & PARENB) { | |
520 | cval |= SMCMR_PEN; | |
521 | scval |= SCU_PSMR_PEN; | |
522 | bits++; | |
523 | if (!(termios->c_cflag & PARODD)) { | |
524 | cval |= SMCMR_PM_EVEN; | |
525 | scval |= (SCU_PSMR_REVP | SCU_PSMR_TEVP); | |
526 | } | |
527 | } | |
528 | ||
529 | /* | |
530 | * Set up parity check flag | |
531 | */ | |
532 | #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK)) | |
533 | ||
534 | port->read_status_mask = (BD_SC_EMPTY | BD_SC_OV); | |
535 | if (termios->c_iflag & INPCK) | |
536 | port->read_status_mask |= BD_SC_FR | BD_SC_PR; | |
537 | if ((termios->c_iflag & BRKINT) || (termios->c_iflag & PARMRK)) | |
538 | port->read_status_mask |= BD_SC_BR; | |
539 | ||
540 | /* | |
541 | * Characters to ignore | |
542 | */ | |
543 | port->ignore_status_mask = 0; | |
544 | if (termios->c_iflag & IGNPAR) | |
545 | port->ignore_status_mask |= BD_SC_PR | BD_SC_FR; | |
546 | if (termios->c_iflag & IGNBRK) { | |
547 | port->ignore_status_mask |= BD_SC_BR; | |
548 | /* | |
549 | * If we're ignore parity and break indicators, ignore | |
550 | * overruns too. (For real raw support). | |
551 | */ | |
552 | if (termios->c_iflag & IGNPAR) | |
553 | port->ignore_status_mask |= BD_SC_OV; | |
554 | } | |
555 | /* | |
556 | * !!! ignore all characters if CREAD is not set | |
557 | */ | |
558 | if ((termios->c_cflag & CREAD) == 0) | |
559 | port->read_status_mask &= ~BD_SC_EMPTY; | |
311c4627 | 560 | |
1da177e4 LT |
561 | spin_lock_irqsave(&port->lock, flags); |
562 | ||
563 | /* Start bit has not been added (so don't, because we would just | |
564 | * subtract it later), and we need to add one for the number of | |
565 | * stops bits (there is always at least one). | |
566 | */ | |
567 | bits++; | |
568 | if (IS_SMC(pinfo)) { | |
569 | /* Set the mode register. We want to keep a copy of the | |
570 | * enables, because we want to put them back if they were | |
571 | * present. | |
572 | */ | |
573 | prev_mode = smcp->smc_smcmr; | |
574 | smcp->smc_smcmr = smcr_mk_clen(bits) | cval | SMCMR_SM_UART; | |
575 | smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN)); | |
576 | } else { | |
577 | sccp->scc_psmr = (sbits << 12) | scval; | |
578 | } | |
579 | ||
580 | cpm_set_brg(pinfo->brg - 1, baud); | |
581 | spin_unlock_irqrestore(&port->lock, flags); | |
582 | ||
583 | } | |
584 | ||
585 | static const char *cpm_uart_type(struct uart_port *port) | |
586 | { | |
587 | pr_debug("CPM uart[%d]:uart_type\n", port->line); | |
588 | ||
589 | return port->type == PORT_CPM ? "CPM UART" : NULL; | |
590 | } | |
591 | ||
592 | /* | |
593 | * verify the new serial_struct (for TIOCSSERIAL). | |
594 | */ | |
595 | static int cpm_uart_verify_port(struct uart_port *port, | |
596 | struct serial_struct *ser) | |
597 | { | |
598 | int ret = 0; | |
599 | ||
600 | pr_debug("CPM uart[%d]:verify_port\n", port->line); | |
601 | ||
602 | if (ser->type != PORT_UNKNOWN && ser->type != PORT_CPM) | |
603 | ret = -EINVAL; | |
604 | if (ser->irq < 0 || ser->irq >= NR_IRQS) | |
605 | ret = -EINVAL; | |
606 | if (ser->baud_base < 9600) | |
607 | ret = -EINVAL; | |
608 | return ret; | |
609 | } | |
610 | ||
611 | /* | |
612 | * Transmit characters, refill buffer descriptor, if possible | |
613 | */ | |
614 | static int cpm_uart_tx_pump(struct uart_port *port) | |
615 | { | |
616 | volatile cbd_t *bdp; | |
617 | unsigned char *p; | |
618 | int count; | |
619 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | |
620 | struct circ_buf *xmit = &port->info->xmit; | |
621 | ||
622 | /* Handle xon/xoff */ | |
623 | if (port->x_char) { | |
624 | /* Pick next descriptor and fill from buffer */ | |
625 | bdp = pinfo->tx_cur; | |
626 | ||
09b03b6c | 627 | p = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo); |
311c4627 | 628 | |
03929c76 | 629 | *p++ = port->x_char; |
1da177e4 LT |
630 | bdp->cbd_datlen = 1; |
631 | bdp->cbd_sc |= BD_SC_READY; | |
632 | /* Get next BD. */ | |
633 | if (bdp->cbd_sc & BD_SC_WRAP) | |
634 | bdp = pinfo->tx_bd_base; | |
635 | else | |
636 | bdp++; | |
637 | pinfo->tx_cur = bdp; | |
638 | ||
639 | port->icount.tx++; | |
640 | port->x_char = 0; | |
641 | return 1; | |
642 | } | |
643 | ||
644 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | |
b129a8cc | 645 | cpm_uart_stop_tx(port); |
1da177e4 LT |
646 | return 0; |
647 | } | |
648 | ||
649 | /* Pick next descriptor and fill from buffer */ | |
650 | bdp = pinfo->tx_cur; | |
651 | ||
652 | while (!(bdp->cbd_sc & BD_SC_READY) && (xmit->tail != xmit->head)) { | |
653 | count = 0; | |
09b03b6c | 654 | p = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo); |
1da177e4 LT |
655 | while (count < pinfo->tx_fifosize) { |
656 | *p++ = xmit->buf[xmit->tail]; | |
657 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
658 | port->icount.tx++; | |
659 | count++; | |
660 | if (xmit->head == xmit->tail) | |
661 | break; | |
662 | } | |
663 | bdp->cbd_datlen = count; | |
664 | bdp->cbd_sc |= BD_SC_READY; | |
311c4627 | 665 | __asm__("eieio"); |
1da177e4 LT |
666 | /* Get next BD. */ |
667 | if (bdp->cbd_sc & BD_SC_WRAP) | |
668 | bdp = pinfo->tx_bd_base; | |
669 | else | |
670 | bdp++; | |
671 | } | |
672 | pinfo->tx_cur = bdp; | |
673 | ||
674 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
675 | uart_write_wakeup(port); | |
676 | ||
677 | if (uart_circ_empty(xmit)) { | |
b129a8cc | 678 | cpm_uart_stop_tx(port); |
1da177e4 LT |
679 | return 0; |
680 | } | |
681 | ||
682 | return 1; | |
683 | } | |
684 | ||
685 | /* | |
686 | * init buffer descriptors | |
687 | */ | |
688 | static void cpm_uart_initbd(struct uart_cpm_port *pinfo) | |
689 | { | |
690 | int i; | |
691 | u8 *mem_addr; | |
692 | volatile cbd_t *bdp; | |
693 | ||
694 | pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line); | |
695 | ||
696 | /* Set the physical address of the host memory | |
697 | * buffers in the buffer descriptors, and the | |
698 | * virtual address for us to work with. | |
699 | */ | |
700 | mem_addr = pinfo->mem_addr; | |
701 | bdp = pinfo->rx_cur = pinfo->rx_bd_base; | |
702 | for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) { | |
09b03b6c | 703 | bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo); |
1da177e4 LT |
704 | bdp->cbd_sc = BD_SC_EMPTY | BD_SC_INTRPT; |
705 | mem_addr += pinfo->rx_fifosize; | |
706 | } | |
311c4627 | 707 | |
09b03b6c | 708 | bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo); |
1da177e4 LT |
709 | bdp->cbd_sc = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT; |
710 | ||
711 | /* Set the physical address of the host memory | |
712 | * buffers in the buffer descriptors, and the | |
713 | * virtual address for us to work with. | |
714 | */ | |
715 | mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize); | |
716 | bdp = pinfo->tx_cur = pinfo->tx_bd_base; | |
717 | for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) { | |
09b03b6c | 718 | bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo); |
1da177e4 LT |
719 | bdp->cbd_sc = BD_SC_INTRPT; |
720 | mem_addr += pinfo->tx_fifosize; | |
721 | } | |
311c4627 | 722 | |
09b03b6c | 723 | bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo); |
1da177e4 LT |
724 | bdp->cbd_sc = BD_SC_WRAP | BD_SC_INTRPT; |
725 | } | |
726 | ||
727 | static void cpm_uart_init_scc(struct uart_cpm_port *pinfo) | |
728 | { | |
729 | int line = pinfo - cpm_uart_ports; | |
730 | volatile scc_t *scp; | |
731 | volatile scc_uart_t *sup; | |
732 | ||
733 | pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line); | |
734 | ||
735 | scp = pinfo->sccp; | |
736 | sup = pinfo->sccup; | |
737 | ||
738 | /* Store address */ | |
739 | pinfo->sccup->scc_genscc.scc_rbase = (unsigned char *)pinfo->rx_bd_base - DPRAM_BASE; | |
740 | pinfo->sccup->scc_genscc.scc_tbase = (unsigned char *)pinfo->tx_bd_base - DPRAM_BASE; | |
741 | ||
742 | /* Set up the uart parameters in the | |
743 | * parameter ram. | |
744 | */ | |
745 | ||
746 | cpm_set_scc_fcr(sup); | |
747 | ||
748 | sup->scc_genscc.scc_mrblr = pinfo->rx_fifosize; | |
749 | sup->scc_maxidl = pinfo->rx_fifosize; | |
750 | sup->scc_brkcr = 1; | |
751 | sup->scc_parec = 0; | |
752 | sup->scc_frmec = 0; | |
753 | sup->scc_nosec = 0; | |
754 | sup->scc_brkec = 0; | |
755 | sup->scc_uaddr1 = 0; | |
756 | sup->scc_uaddr2 = 0; | |
757 | sup->scc_toseq = 0; | |
758 | sup->scc_char1 = 0x8000; | |
759 | sup->scc_char2 = 0x8000; | |
760 | sup->scc_char3 = 0x8000; | |
761 | sup->scc_char4 = 0x8000; | |
762 | sup->scc_char5 = 0x8000; | |
763 | sup->scc_char6 = 0x8000; | |
764 | sup->scc_char7 = 0x8000; | |
765 | sup->scc_char8 = 0x8000; | |
766 | sup->scc_rccm = 0xc0ff; | |
767 | ||
768 | /* Send the CPM an initialize command. | |
769 | */ | |
770 | cpm_line_cr_cmd(line, CPM_CR_INIT_TRX); | |
771 | ||
772 | /* Set UART mode, 8 bit, no parity, one stop. | |
773 | * Enable receive and transmit. | |
774 | */ | |
775 | scp->scc_gsmrh = 0; | |
776 | scp->scc_gsmrl = | |
777 | (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16); | |
778 | ||
779 | /* Enable rx interrupts and clear all pending events. */ | |
780 | scp->scc_sccm = 0; | |
781 | scp->scc_scce = 0xffff; | |
782 | scp->scc_dsr = 0x7e7e; | |
783 | scp->scc_psmr = 0x3000; | |
784 | ||
785 | scp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT); | |
786 | } | |
787 | ||
788 | static void cpm_uart_init_smc(struct uart_cpm_port *pinfo) | |
789 | { | |
790 | int line = pinfo - cpm_uart_ports; | |
791 | volatile smc_t *sp; | |
792 | volatile smc_uart_t *up; | |
793 | ||
794 | pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line); | |
795 | ||
796 | sp = pinfo->smcp; | |
797 | up = pinfo->smcup; | |
798 | ||
799 | /* Store address */ | |
800 | pinfo->smcup->smc_rbase = (u_char *)pinfo->rx_bd_base - DPRAM_BASE; | |
801 | pinfo->smcup->smc_tbase = (u_char *)pinfo->tx_bd_base - DPRAM_BASE; | |
802 | ||
803 | /* | |
804 | * In case SMC1 is being relocated... | |
805 | */ | |
806 | #if defined (CONFIG_I2C_SPI_SMC1_UCODE_PATCH) | |
807 | up->smc_rbptr = pinfo->smcup->smc_rbase; | |
808 | up->smc_tbptr = pinfo->smcup->smc_tbase; | |
809 | up->smc_rstate = 0; | |
810 | up->smc_tstate = 0; | |
811 | up->smc_brkcr = 1; /* number of break chars */ | |
812 | up->smc_brkec = 0; | |
813 | #endif | |
814 | ||
815 | /* Set up the uart parameters in the | |
816 | * parameter ram. | |
817 | */ | |
818 | cpm_set_smc_fcr(up); | |
819 | ||
820 | /* Using idle charater time requires some additional tuning. */ | |
821 | up->smc_mrblr = pinfo->rx_fifosize; | |
822 | up->smc_maxidl = pinfo->rx_fifosize; | |
311c4627 KG |
823 | up->smc_brklen = 0; |
824 | up->smc_brkec = 0; | |
1da177e4 LT |
825 | up->smc_brkcr = 1; |
826 | ||
827 | cpm_line_cr_cmd(line, CPM_CR_INIT_TRX); | |
828 | ||
829 | /* Set UART mode, 8 bit, no parity, one stop. | |
830 | * Enable receive and transmit. | |
831 | */ | |
832 | sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART; | |
833 | ||
834 | /* Enable only rx interrupts clear all pending events. */ | |
835 | sp->smc_smcm = 0; | |
836 | sp->smc_smce = 0xff; | |
837 | ||
838 | sp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN); | |
839 | } | |
840 | ||
841 | /* | |
842 | * Initialize port. This is called from early_console stuff | |
843 | * so we have to be careful here ! | |
844 | */ | |
845 | static int cpm_uart_request_port(struct uart_port *port) | |
846 | { | |
847 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | |
848 | int ret; | |
849 | ||
850 | pr_debug("CPM uart[%d]:request port\n", port->line); | |
851 | ||
852 | if (pinfo->flags & FLAG_CONSOLE) | |
853 | return 0; | |
854 | ||
1da177e4 LT |
855 | if (IS_SMC(pinfo)) { |
856 | pinfo->smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX); | |
857 | pinfo->smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); | |
858 | } else { | |
859 | pinfo->sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX); | |
860 | pinfo->sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | |
861 | } | |
862 | ||
863 | ret = cpm_uart_allocbuf(pinfo, 0); | |
864 | ||
865 | if (ret) | |
866 | return ret; | |
867 | ||
868 | cpm_uart_initbd(pinfo); | |
311c4627 KG |
869 | if (IS_SMC(pinfo)) |
870 | cpm_uart_init_smc(pinfo); | |
871 | else | |
872 | cpm_uart_init_scc(pinfo); | |
1da177e4 LT |
873 | |
874 | return 0; | |
875 | } | |
876 | ||
877 | static void cpm_uart_release_port(struct uart_port *port) | |
878 | { | |
879 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | |
880 | ||
881 | if (!(pinfo->flags & FLAG_CONSOLE)) | |
882 | cpm_uart_freebuf(pinfo); | |
883 | } | |
884 | ||
885 | /* | |
886 | * Configure/autoconfigure the port. | |
887 | */ | |
888 | static void cpm_uart_config_port(struct uart_port *port, int flags) | |
889 | { | |
890 | pr_debug("CPM uart[%d]:config_port\n", port->line); | |
891 | ||
892 | if (flags & UART_CONFIG_TYPE) { | |
893 | port->type = PORT_CPM; | |
894 | cpm_uart_request_port(port); | |
895 | } | |
896 | } | |
897 | static struct uart_ops cpm_uart_pops = { | |
898 | .tx_empty = cpm_uart_tx_empty, | |
899 | .set_mctrl = cpm_uart_set_mctrl, | |
900 | .get_mctrl = cpm_uart_get_mctrl, | |
901 | .stop_tx = cpm_uart_stop_tx, | |
902 | .start_tx = cpm_uart_start_tx, | |
903 | .stop_rx = cpm_uart_stop_rx, | |
904 | .enable_ms = cpm_uart_enable_ms, | |
905 | .break_ctl = cpm_uart_break_ctl, | |
906 | .startup = cpm_uart_startup, | |
907 | .shutdown = cpm_uart_shutdown, | |
908 | .set_termios = cpm_uart_set_termios, | |
909 | .type = cpm_uart_type, | |
910 | .release_port = cpm_uart_release_port, | |
911 | .request_port = cpm_uart_request_port, | |
912 | .config_port = cpm_uart_config_port, | |
913 | .verify_port = cpm_uart_verify_port, | |
914 | }; | |
915 | ||
916 | struct uart_cpm_port cpm_uart_ports[UART_NR] = { | |
917 | [UART_SMC1] = { | |
918 | .port = { | |
919 | .irq = SMC1_IRQ, | |
920 | .ops = &cpm_uart_pops, | |
9b4a1617 | 921 | .iotype = UPIO_MEM, |
1da177e4 LT |
922 | .lock = SPIN_LOCK_UNLOCKED, |
923 | }, | |
924 | .flags = FLAG_SMC, | |
925 | .tx_nrfifos = TX_NUM_FIFO, | |
926 | .tx_fifosize = TX_BUF_SIZE, | |
311c4627 | 927 | .rx_nrfifos = RX_NUM_FIFO, |
1da177e4 LT |
928 | .rx_fifosize = RX_BUF_SIZE, |
929 | .set_lineif = smc1_lineif, | |
930 | }, | |
931 | [UART_SMC2] = { | |
932 | .port = { | |
933 | .irq = SMC2_IRQ, | |
934 | .ops = &cpm_uart_pops, | |
9b4a1617 | 935 | .iotype = UPIO_MEM, |
1da177e4 LT |
936 | .lock = SPIN_LOCK_UNLOCKED, |
937 | }, | |
938 | .flags = FLAG_SMC, | |
939 | .tx_nrfifos = TX_NUM_FIFO, | |
940 | .tx_fifosize = TX_BUF_SIZE, | |
311c4627 | 941 | .rx_nrfifos = RX_NUM_FIFO, |
1da177e4 LT |
942 | .rx_fifosize = RX_BUF_SIZE, |
943 | .set_lineif = smc2_lineif, | |
944 | #ifdef CONFIG_SERIAL_CPM_ALT_SMC2 | |
945 | .is_portb = 1, | |
946 | #endif | |
947 | }, | |
948 | [UART_SCC1] = { | |
949 | .port = { | |
950 | .irq = SCC1_IRQ, | |
951 | .ops = &cpm_uart_pops, | |
9b4a1617 | 952 | .iotype = UPIO_MEM, |
1da177e4 LT |
953 | .lock = SPIN_LOCK_UNLOCKED, |
954 | }, | |
955 | .tx_nrfifos = TX_NUM_FIFO, | |
956 | .tx_fifosize = TX_BUF_SIZE, | |
311c4627 | 957 | .rx_nrfifos = RX_NUM_FIFO, |
1da177e4 LT |
958 | .rx_fifosize = RX_BUF_SIZE, |
959 | .set_lineif = scc1_lineif, | |
311c4627 | 960 | .wait_closing = SCC_WAIT_CLOSING, |
1da177e4 LT |
961 | }, |
962 | [UART_SCC2] = { | |
963 | .port = { | |
964 | .irq = SCC2_IRQ, | |
965 | .ops = &cpm_uart_pops, | |
9b4a1617 | 966 | .iotype = UPIO_MEM, |
1da177e4 LT |
967 | .lock = SPIN_LOCK_UNLOCKED, |
968 | }, | |
969 | .tx_nrfifos = TX_NUM_FIFO, | |
970 | .tx_fifosize = TX_BUF_SIZE, | |
311c4627 | 971 | .rx_nrfifos = RX_NUM_FIFO, |
1da177e4 LT |
972 | .rx_fifosize = RX_BUF_SIZE, |
973 | .set_lineif = scc2_lineif, | |
311c4627 | 974 | .wait_closing = SCC_WAIT_CLOSING, |
1da177e4 LT |
975 | }, |
976 | [UART_SCC3] = { | |
977 | .port = { | |
978 | .irq = SCC3_IRQ, | |
979 | .ops = &cpm_uart_pops, | |
9b4a1617 | 980 | .iotype = UPIO_MEM, |
1da177e4 LT |
981 | .lock = SPIN_LOCK_UNLOCKED, |
982 | }, | |
983 | .tx_nrfifos = TX_NUM_FIFO, | |
984 | .tx_fifosize = TX_BUF_SIZE, | |
311c4627 | 985 | .rx_nrfifos = RX_NUM_FIFO, |
1da177e4 LT |
986 | .rx_fifosize = RX_BUF_SIZE, |
987 | .set_lineif = scc3_lineif, | |
311c4627 | 988 | .wait_closing = SCC_WAIT_CLOSING, |
1da177e4 LT |
989 | }, |
990 | [UART_SCC4] = { | |
991 | .port = { | |
992 | .irq = SCC4_IRQ, | |
993 | .ops = &cpm_uart_pops, | |
9b4a1617 | 994 | .iotype = UPIO_MEM, |
1da177e4 LT |
995 | .lock = SPIN_LOCK_UNLOCKED, |
996 | }, | |
997 | .tx_nrfifos = TX_NUM_FIFO, | |
998 | .tx_fifosize = TX_BUF_SIZE, | |
311c4627 | 999 | .rx_nrfifos = RX_NUM_FIFO, |
1da177e4 LT |
1000 | .rx_fifosize = RX_BUF_SIZE, |
1001 | .set_lineif = scc4_lineif, | |
311c4627 | 1002 | .wait_closing = SCC_WAIT_CLOSING, |
1da177e4 LT |
1003 | }, |
1004 | }; | |
1005 | ||
e27987cd VB |
1006 | int cpm_uart_drv_get_platform_data(struct platform_device *pdev, int is_con) |
1007 | { | |
1008 | struct resource *r; | |
1009 | struct fs_uart_platform_info *pdata = pdev->dev.platform_data; | |
1010 | int idx = pdata->fs_no; /* It is UART_SMCx or UART_SCCx index */ | |
1011 | struct uart_cpm_port *pinfo; | |
1012 | int line; | |
1013 | u32 mem, pram; | |
1014 | ||
1015 | for (line=0; line<UART_NR && cpm_uart_port_map[line]!=pdata->fs_no; line++); | |
1016 | ||
1017 | pinfo = (struct uart_cpm_port *) &cpm_uart_ports[idx]; | |
1018 | ||
1019 | pinfo->brg = pdata->brg; | |
1020 | ||
1021 | if (!is_con) { | |
1022 | pinfo->port.line = line; | |
1023 | pinfo->port.flags = UPF_BOOT_AUTOCONF; | |
1024 | } | |
1025 | ||
1026 | if (!(r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"))) | |
1027 | return -EINVAL; | |
1028 | mem = r->start; | |
1029 | ||
1030 | if (!(r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pram"))) | |
1031 | return -EINVAL; | |
1032 | pram = r->start; | |
1033 | ||
1034 | if(idx > fsid_smc2_uart) { | |
1035 | pinfo->sccp = (scc_t *)mem; | |
1036 | pinfo->sccup = (scc_uart_t *)pram; | |
1037 | } else { | |
1038 | pinfo->smcp = (smc_t *)mem; | |
1039 | pinfo->smcup = (smc_uart_t *)pram; | |
1040 | } | |
1041 | pinfo->tx_nrfifos = pdata->tx_num_fifo; | |
1042 | pinfo->tx_fifosize = pdata->tx_buf_size; | |
1043 | ||
1044 | pinfo->rx_nrfifos = pdata->rx_num_fifo; | |
1045 | pinfo->rx_fifosize = pdata->rx_buf_size; | |
1046 | ||
1047 | pinfo->port.uartclk = pdata->uart_clk; | |
1048 | pinfo->port.mapbase = (unsigned long)mem; | |
1049 | pinfo->port.irq = platform_get_irq(pdev, 0); | |
1050 | ||
1051 | return 0; | |
1052 | } | |
1053 | ||
1da177e4 LT |
1054 | #ifdef CONFIG_SERIAL_CPM_CONSOLE |
1055 | /* | |
1056 | * Print a string to the serial port trying not to disturb | |
1057 | * any possible real use of the port... | |
1058 | * | |
1059 | * Note that this is called with interrupts already disabled | |
1060 | */ | |
1061 | static void cpm_uart_console_write(struct console *co, const char *s, | |
1062 | u_int count) | |
1063 | { | |
1064 | struct uart_cpm_port *pinfo = | |
1065 | &cpm_uart_ports[cpm_uart_port_map[co->index]]; | |
1066 | unsigned int i; | |
1067 | volatile cbd_t *bdp, *bdbase; | |
1068 | volatile unsigned char *cp; | |
1069 | ||
1070 | /* Get the address of the host memory buffer. | |
1071 | */ | |
1072 | bdp = pinfo->tx_cur; | |
1073 | bdbase = pinfo->tx_bd_base; | |
1074 | ||
1075 | /* | |
1076 | * Now, do each character. This is not as bad as it looks | |
1077 | * since this is a holding FIFO and not a transmitting FIFO. | |
1078 | * We could add the complexity of filling the entire transmit | |
1079 | * buffer, but we would just wait longer between accesses...... | |
1080 | */ | |
1081 | for (i = 0; i < count; i++, s++) { | |
1082 | /* Wait for transmitter fifo to empty. | |
1083 | * Ready indicates output is ready, and xmt is doing | |
1084 | * that, not that it is ready for us to send. | |
1085 | */ | |
1086 | while ((bdp->cbd_sc & BD_SC_READY) != 0) | |
1087 | ; | |
1088 | ||
1089 | /* Send the character out. | |
1090 | * If the buffer address is in the CPM DPRAM, don't | |
1091 | * convert it. | |
1092 | */ | |
09b03b6c | 1093 | cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo); |
311c4627 | 1094 | |
1da177e4 LT |
1095 | *cp = *s; |
1096 | ||
1097 | bdp->cbd_datlen = 1; | |
1098 | bdp->cbd_sc |= BD_SC_READY; | |
1099 | ||
1100 | if (bdp->cbd_sc & BD_SC_WRAP) | |
1101 | bdp = bdbase; | |
1102 | else | |
1103 | bdp++; | |
1104 | ||
1105 | /* if a LF, also do CR... */ | |
1106 | if (*s == 10) { | |
1107 | while ((bdp->cbd_sc & BD_SC_READY) != 0) | |
1108 | ; | |
1109 | ||
09b03b6c | 1110 | cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo); |
1da177e4 LT |
1111 | |
1112 | *cp = 13; | |
1113 | bdp->cbd_datlen = 1; | |
1114 | bdp->cbd_sc |= BD_SC_READY; | |
1115 | ||
1116 | if (bdp->cbd_sc & BD_SC_WRAP) | |
1117 | bdp = bdbase; | |
1118 | else | |
1119 | bdp++; | |
1120 | } | |
1121 | } | |
1122 | ||
1123 | /* | |
1124 | * Finally, Wait for transmitter & holding register to empty | |
1125 | * and restore the IER | |
1126 | */ | |
1127 | while ((bdp->cbd_sc & BD_SC_READY) != 0) | |
1128 | ; | |
1129 | ||
1130 | pinfo->tx_cur = (volatile cbd_t *) bdp; | |
1131 | } | |
1132 | ||
e27987cd | 1133 | |
1da177e4 LT |
1134 | static int __init cpm_uart_console_setup(struct console *co, char *options) |
1135 | { | |
1136 | struct uart_port *port; | |
1137 | struct uart_cpm_port *pinfo; | |
1138 | int baud = 38400; | |
1139 | int bits = 8; | |
1140 | int parity = 'n'; | |
1141 | int flow = 'n'; | |
1142 | int ret; | |
1143 | ||
e27987cd VB |
1144 | struct fs_uart_platform_info *pdata; |
1145 | struct platform_device* pdev = early_uart_get_pdev(co->index); | |
1146 | ||
1da177e4 LT |
1147 | port = |
1148 | (struct uart_port *)&cpm_uart_ports[cpm_uart_port_map[co->index]]; | |
1149 | pinfo = (struct uart_cpm_port *)port; | |
e27987cd VB |
1150 | if (!pdev) { |
1151 | pr_info("cpm_uart: console: compat mode\n"); | |
1152 | /* compatibility - will be cleaned up */ | |
1153 | cpm_uart_init_portdesc(); | |
1154 | ||
1155 | if (pinfo->set_lineif) | |
1156 | pinfo->set_lineif(pinfo); | |
1157 | } else { | |
1158 | pdata = pdev->dev.platform_data; | |
1159 | if (pdata) | |
1160 | if (pdata->init_ioports) | |
1161 | pdata->init_ioports(); | |
1162 | ||
1163 | cpm_uart_drv_get_platform_data(pdev, 1); | |
1164 | } | |
311c4627 | 1165 | |
1da177e4 LT |
1166 | pinfo->flags |= FLAG_CONSOLE; |
1167 | ||
1168 | if (options) { | |
1169 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
1170 | } else { | |
1171 | bd_t *bd = (bd_t *) __res; | |
1172 | ||
1173 | if (bd->bi_baudrate) | |
1174 | baud = bd->bi_baudrate; | |
1175 | else | |
1176 | baud = 9600; | |
1177 | } | |
1178 | ||
1da177e4 LT |
1179 | if (IS_SMC(pinfo)) { |
1180 | pinfo->smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX); | |
1181 | pinfo->smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); | |
1182 | } else { | |
1183 | pinfo->sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX); | |
1184 | pinfo->sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | |
1185 | } | |
1186 | ||
1187 | ret = cpm_uart_allocbuf(pinfo, 1); | |
1188 | ||
1189 | if (ret) | |
1190 | return ret; | |
1191 | ||
1192 | cpm_uart_initbd(pinfo); | |
1193 | ||
1194 | if (IS_SMC(pinfo)) | |
1195 | cpm_uart_init_smc(pinfo); | |
1196 | else | |
1197 | cpm_uart_init_scc(pinfo); | |
1198 | ||
1199 | uart_set_options(port, co, baud, parity, bits, flow); | |
1200 | ||
1201 | return 0; | |
1202 | } | |
1203 | ||
36d2f5a1 | 1204 | static struct uart_driver cpm_reg; |
1da177e4 | 1205 | static struct console cpm_scc_uart_console = { |
36d2f5a1 KG |
1206 | .name = "ttyCPM", |
1207 | .write = cpm_uart_console_write, | |
1208 | .device = uart_console_device, | |
1209 | .setup = cpm_uart_console_setup, | |
1210 | .flags = CON_PRINTBUFFER, | |
1211 | .index = -1, | |
1da177e4 LT |
1212 | .data = &cpm_reg, |
1213 | }; | |
1214 | ||
1215 | int __init cpm_uart_console_init(void) | |
1216 | { | |
e27987cd VB |
1217 | register_console(&cpm_scc_uart_console); |
1218 | return 0; | |
1da177e4 LT |
1219 | } |
1220 | ||
1221 | console_initcall(cpm_uart_console_init); | |
1222 | ||
1223 | #define CPM_UART_CONSOLE &cpm_scc_uart_console | |
1224 | #else | |
1225 | #define CPM_UART_CONSOLE NULL | |
1226 | #endif | |
1227 | ||
1228 | static struct uart_driver cpm_reg = { | |
1229 | .owner = THIS_MODULE, | |
1230 | .driver_name = "ttyCPM", | |
1231 | .dev_name = "ttyCPM", | |
1232 | .major = SERIAL_CPM_MAJOR, | |
1233 | .minor = SERIAL_CPM_MINOR, | |
1234 | .cons = CPM_UART_CONSOLE, | |
1235 | }; | |
e27987cd | 1236 | static int cpm_uart_drv_probe(struct device *dev) |
1da177e4 | 1237 | { |
e27987cd VB |
1238 | struct platform_device *pdev = to_platform_device(dev); |
1239 | struct fs_uart_platform_info *pdata; | |
1240 | int ret = -ENODEV; | |
1da177e4 | 1241 | |
e27987cd VB |
1242 | if(!pdev) { |
1243 | printk(KERN_ERR"CPM UART: platform data missing!\n"); | |
1da177e4 | 1244 | return ret; |
e27987cd | 1245 | } |
1da177e4 | 1246 | |
e27987cd VB |
1247 | pdata = pdev->dev.platform_data; |
1248 | pr_debug("cpm_uart_drv_probe: Adding CPM UART %d\n", | |
1249 | cpm_uart_port_map[pdata->fs_no]); | |
1da177e4 | 1250 | |
e27987cd | 1251 | if ((ret = cpm_uart_drv_get_platform_data(pdev, 0))) |
1da177e4 LT |
1252 | return ret; |
1253 | ||
e27987cd VB |
1254 | if (pdata->init_ioports) |
1255 | pdata->init_ioports(); | |
1da177e4 | 1256 | |
e27987cd VB |
1257 | ret = uart_add_one_port(&cpm_reg, &cpm_uart_ports[pdata->fs_no].port); |
1258 | ||
1259 | return ret; | |
1da177e4 LT |
1260 | } |
1261 | ||
e27987cd VB |
1262 | static int cpm_uart_drv_remove(struct device *dev) |
1263 | { | |
1264 | struct platform_device *pdev = to_platform_device(dev); | |
1265 | struct fs_uart_platform_info *pdata = pdev->dev.platform_data; | |
1266 | ||
1267 | pr_debug("cpm_uart_drv_remove: Removing CPM UART %d\n", | |
1268 | cpm_uart_port_map[pdata->fs_no]); | |
1269 | ||
1270 | uart_remove_one_port(&cpm_reg, &cpm_uart_ports[pdata->fs_no].port); | |
1271 | return 0; | |
1272 | } | |
1273 | ||
1274 | static struct device_driver cpm_smc_uart_driver = { | |
1275 | .name = "fsl-cpm-smc:uart", | |
1276 | .bus = &platform_bus_type, | |
1277 | .probe = cpm_uart_drv_probe, | |
1278 | .remove = cpm_uart_drv_remove, | |
1279 | }; | |
1280 | ||
1281 | static struct device_driver cpm_scc_uart_driver = { | |
1282 | .name = "fsl-cpm-scc:uart", | |
1283 | .bus = &platform_bus_type, | |
1284 | .probe = cpm_uart_drv_probe, | |
1285 | .remove = cpm_uart_drv_remove, | |
1286 | }; | |
1287 | ||
1288 | /* | |
1289 | This is supposed to match uart devices on platform bus, | |
1290 | */ | |
1291 | static int match_is_uart (struct device* dev, void* data) | |
1da177e4 | 1292 | { |
e27987cd VB |
1293 | struct platform_device* pdev = container_of(dev, struct platform_device, dev); |
1294 | int ret = 0; | |
1295 | /* this was setfunc as uart */ | |
1296 | if(strstr(pdev->name,":uart")) { | |
1297 | ret = 1; | |
1298 | } | |
1299 | return ret; | |
1300 | } | |
1301 | ||
1302 | ||
1303 | static int cpm_uart_init(void) { | |
1304 | ||
1305 | int ret; | |
1da177e4 | 1306 | int i; |
e27987cd VB |
1307 | struct device *dev; |
1308 | printk(KERN_INFO "Serial: CPM driver $Revision: 0.02 $\n"); | |
1309 | ||
1310 | /* lookup the bus for uart devices */ | |
1311 | dev = bus_find_device(&platform_bus_type, NULL, 0, match_is_uart); | |
1312 | ||
1313 | /* There are devices on the bus - all should be OK */ | |
1314 | if (dev) { | |
1315 | cpm_uart_count(); | |
1316 | cpm_reg.nr = cpm_uart_nr; | |
1317 | ||
1318 | if (!(ret = uart_register_driver(&cpm_reg))) { | |
1319 | if ((ret = driver_register(&cpm_smc_uart_driver))) { | |
1320 | uart_unregister_driver(&cpm_reg); | |
1321 | return ret; | |
1322 | } | |
1323 | if ((ret = driver_register(&cpm_scc_uart_driver))) { | |
1324 | driver_unregister(&cpm_scc_uart_driver); | |
1325 | uart_unregister_driver(&cpm_reg); | |
1326 | } | |
1327 | } | |
1328 | } else { | |
1329 | /* No capable platform devices found - falling back to legacy mode */ | |
1330 | pr_info("cpm_uart: WARNING: no UART devices found on platform bus!\n"); | |
1331 | pr_info( | |
1332 | "cpm_uart: the driver will guess configuration, but this mode is no longer supported.\n"); | |
1333 | #ifndef CONFIG_SERIAL_CPM_CONSOLE | |
1334 | ret = cpm_uart_init_portdesc(); | |
1335 | if (ret) | |
1336 | return ret; | |
1337 | #endif | |
1338 | ||
1339 | cpm_reg.nr = cpm_uart_nr; | |
1340 | ret = uart_register_driver(&cpm_reg); | |
1341 | ||
1342 | if (ret) | |
1343 | return ret; | |
1344 | ||
1345 | for (i = 0; i < cpm_uart_nr; i++) { | |
1346 | int con = cpm_uart_port_map[i]; | |
1347 | cpm_uart_ports[con].port.line = i; | |
1348 | cpm_uart_ports[con].port.flags = UPF_BOOT_AUTOCONF; | |
1349 | uart_add_one_port(&cpm_reg, &cpm_uart_ports[con].port); | |
1350 | } | |
1da177e4 | 1351 | |
1da177e4 | 1352 | } |
e27987cd VB |
1353 | return ret; |
1354 | } | |
1da177e4 | 1355 | |
e27987cd VB |
1356 | static void __exit cpm_uart_exit(void) |
1357 | { | |
1358 | driver_unregister(&cpm_scc_uart_driver); | |
1359 | driver_unregister(&cpm_smc_uart_driver); | |
1da177e4 LT |
1360 | uart_unregister_driver(&cpm_reg); |
1361 | } | |
1362 | ||
1363 | module_init(cpm_uart_init); | |
1364 | module_exit(cpm_uart_exit); | |
1365 | ||
1366 | MODULE_AUTHOR("Kumar Gala/Antoniou Pantelis"); | |
1367 | MODULE_DESCRIPTION("CPM SCC/SMC port driver $Revision: 0.01 $"); | |
1368 | MODULE_LICENSE("GPL"); | |
1369 | MODULE_ALIAS_CHARDEV(SERIAL_CPM_MAJOR, SERIAL_CPM_MINOR); |