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1da177e4 1/*
1da177e4
LT
2 * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
3 *
4 * FIXME According to the usermanual the status bits in the status register
5 * are only updated when the peripherals access the FIFO and not when the
6 * CPU access them. So since we use this bits to know when we stop writing
7 * and reading, they may not be updated in-time and a race condition may
8 * exists. But I haven't be able to prove this and I don't care. But if
9 * any problem arises, it might worth checking. The TX/RX FIFO Stats
10 * registers should be used in addition.
11 * Update: Actually, they seem updated ... At least the bits we use.
12 *
13 *
14 * Maintainer : Sylvain Munaut <tnt@246tNt.com>
9b9129e7 15 *
1da177e4
LT
16 * Some of the code has been inspired/copied from the 2.4 code written
17 * by Dale Farnsworth <dfarnsworth@mvista.com>.
9b9129e7 18 *
b9272dfd
GL
19 * Copyright (C) 2006 Secret Lab Technologies Ltd.
20 * Grant Likely <grant.likely@secretlab.ca>
21 * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
1da177e4 22 * Copyright (C) 2003 MontaVista, Software, Inc.
9b9129e7 23 *
1da177e4
LT
24 * This file is licensed under the terms of the GNU General Public License
25 * version 2. This program is licensed "as is" without any warranty of any
26 * kind, whether express or implied.
27 */
9b9129e7 28
1da177e4
LT
29/* Platform device Usage :
30 *
31 * Since PSCs can have multiple function, the correct driver for each one
32 * is selected by calling mpc52xx_match_psc_function(...). The function
33 * handled by this driver is "uart".
34 *
35 * The driver init all necessary registers to place the PSC in uart mode without
36 * DCD. However, the pin multiplexing aren't changed and should be set either
37 * by the bootloader or in the platform init code.
38 *
39 * The idx field must be equal to the PSC index ( e.g. 0 for PSC1, 1 for PSC2,
d62de3aa
SM
40 * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
41 * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
42 * fpr the console code : without this 1:1 mapping, at early boot time, when we
c30fe7f7 43 * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
d62de3aa 44 * will be mapped to.
1da177e4
LT
45 */
46
b9272dfd
GL
47/* OF Platform device Usage :
48 *
49 * This driver is only used for PSCs configured in uart mode. The device
50 * tree will have a node for each PSC in uart mode w/ device_type = "serial"
51 * and "mpc52xx-psc-uart" in the compatible string
52 *
53 * By default, PSC devices are enumerated in the order they are found. However
54 * a particular PSC number can be forces by adding 'device_no = <port#>'
55 * to the device node.
56 *
57 * The driver init all necessary registers to place the PSC in uart mode without
58 * DCD. However, the pin multiplexing aren't changed and should be set either
59 * by the bootloader or in the platform init code.
60 */
61
62#undef DEBUG
63
64#include <linux/device.h>
1da177e4
LT
65#include <linux/module.h>
66#include <linux/tty.h>
67#include <linux/serial.h>
68#include <linux/sysrq.h>
69#include <linux/console.h>
70
71#include <asm/delay.h>
72#include <asm/io.h>
73
b9272dfd
GL
74#if defined(CONFIG_PPC_MERGE)
75#include <asm/of_platform.h>
76#else
77#include <linux/platform_device.h>
78#endif
79
1da177e4
LT
80#include <asm/mpc52xx.h>
81#include <asm/mpc52xx_psc.h>
82
83#if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
84#define SUPPORT_SYSRQ
85#endif
86
87#include <linux/serial_core.h>
88
89
d62de3aa
SM
90/* We've been assigned a range on the "Low-density serial ports" major */
91#define SERIAL_PSC_MAJOR 204
92#define SERIAL_PSC_MINOR 148
93
1da177e4
LT
94
95#define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
96
97
98static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
99 /* Rem: - We use the read_status_mask as a shadow of
100 * psc->mpc52xx_psc_imr
101 * - It's important that is array is all zero on start as we
102 * use it to know if it's initialized or not ! If it's not sure
103 * it's cleared, then a memset(...,0,...) should be added to
104 * the console_init
105 */
b9272dfd
GL
106#if defined(CONFIG_PPC_MERGE)
107/* lookup table for matching device nodes to index numbers */
108static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM];
109
110static void mpc52xx_uart_of_enumerate(void);
111#endif
1da177e4
LT
112
113#define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
114
115
116/* Forward declaration of the interruption handling routine */
7d12e780 117static irqreturn_t mpc52xx_uart_int(int irq,void *dev_id);
1da177e4
LT
118
119
120/* Simple macro to test if a port is console or not. This one is taken
121 * for serial_core.c and maybe should be moved to serial_core.h ? */
122#ifdef CONFIG_SERIAL_CORE_CONSOLE
123#define uart_console(port) ((port)->cons && (port)->cons->index == (port)->line)
124#else
125#define uart_console(port) (0)
126#endif
127
b9272dfd
GL
128#if defined(CONFIG_PPC_MERGE)
129static struct of_device_id mpc52xx_uart_of_match[] = {
130 { .type = "serial", .compatible = "mpc52xx-psc-uart", },
131 { .type = "serial", .compatible = "mpc5200-psc", }, /* Efika only! */
132 {},
133};
134#endif
135
1da177e4
LT
136
137/* ======================================================================== */
138/* UART operations */
139/* ======================================================================== */
140
9b9129e7 141static unsigned int
1da177e4
LT
142mpc52xx_uart_tx_empty(struct uart_port *port)
143{
144 int status = in_be16(&PSC(port)->mpc52xx_psc_status);
145 return (status & MPC52xx_PSC_SR_TXEMP) ? TIOCSER_TEMT : 0;
146}
147
9b9129e7 148static void
1da177e4
LT
149mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
150{
151 /* Not implemented */
152}
153
9b9129e7 154static unsigned int
1da177e4
LT
155mpc52xx_uart_get_mctrl(struct uart_port *port)
156{
157 /* Not implemented */
158 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
159}
160
9b9129e7 161static void
b129a8cc 162mpc52xx_uart_stop_tx(struct uart_port *port)
1da177e4
LT
163{
164 /* port->lock taken by caller */
165 port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
166 out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
167}
168
9b9129e7 169static void
b129a8cc 170mpc52xx_uart_start_tx(struct uart_port *port)
1da177e4
LT
171{
172 /* port->lock taken by caller */
173 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
174 out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
175}
176
9b9129e7 177static void
1da177e4
LT
178mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
179{
180 unsigned long flags;
181 spin_lock_irqsave(&port->lock, flags);
9b9129e7 182
1da177e4
LT
183 port->x_char = ch;
184 if (ch) {
185 /* Make sure tx interrupts are on */
186 /* Truly necessary ??? They should be anyway */
187 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
188 out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
189 }
9b9129e7 190
1da177e4
LT
191 spin_unlock_irqrestore(&port->lock, flags);
192}
193
194static void
195mpc52xx_uart_stop_rx(struct uart_port *port)
196{
197 /* port->lock taken by caller */
198 port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
199 out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
200}
201
202static void
203mpc52xx_uart_enable_ms(struct uart_port *port)
204{
205 /* Not implemented */
206}
207
208static void
209mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
210{
211 unsigned long flags;
212 spin_lock_irqsave(&port->lock, flags);
213
214 if ( ctl == -1 )
215 out_8(&PSC(port)->command,MPC52xx_PSC_START_BRK);
216 else
217 out_8(&PSC(port)->command,MPC52xx_PSC_STOP_BRK);
9b9129e7 218
1da177e4
LT
219 spin_unlock_irqrestore(&port->lock, flags);
220}
221
222static int
223mpc52xx_uart_startup(struct uart_port *port)
224{
225 struct mpc52xx_psc __iomem *psc = PSC(port);
226 int ret;
227
228 /* Request IRQ */
229 ret = request_irq(port->irq, mpc52xx_uart_int,
40663cc7 230 IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "mpc52xx_psc_uart", port);
1da177e4
LT
231 if (ret)
232 return ret;
233
234 /* Reset/activate the port, clear and enable interrupts */
235 out_8(&psc->command,MPC52xx_PSC_RST_RX);
236 out_8(&psc->command,MPC52xx_PSC_RST_TX);
9b9129e7 237
1da177e4
LT
238 out_be32(&psc->sicr,0); /* UART mode DCD ignored */
239
240 out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); /* /16 prescaler on */
9b9129e7 241
1da177e4
LT
242 out_8(&psc->rfcntl, 0x00);
243 out_be16(&psc->rfalarm, 0x1ff);
244 out_8(&psc->tfcntl, 0x07);
245 out_be16(&psc->tfalarm, 0x80);
246
247 port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
248 out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
9b9129e7 249
1da177e4
LT
250 out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
251 out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
9b9129e7 252
1da177e4
LT
253 return 0;
254}
255
256static void
257mpc52xx_uart_shutdown(struct uart_port *port)
258{
259 struct mpc52xx_psc __iomem *psc = PSC(port);
9b9129e7 260
1da177e4
LT
261 /* Shut down the port, interrupt and all */
262 out_8(&psc->command,MPC52xx_PSC_RST_RX);
263 out_8(&psc->command,MPC52xx_PSC_RST_TX);
9b9129e7
GL
264
265 port->read_status_mask = 0;
1da177e4
LT
266 out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
267
268 /* Release interrupt */
269 free_irq(port->irq, port);
270}
271
9b9129e7 272static void
606d099c
AC
273mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
274 struct ktermios *old)
1da177e4
LT
275{
276 struct mpc52xx_psc __iomem *psc = PSC(port);
277 unsigned long flags;
278 unsigned char mr1, mr2;
279 unsigned short ctr;
280 unsigned int j, baud, quot;
9b9129e7 281
1da177e4
LT
282 /* Prepare what we're gonna write */
283 mr1 = 0;
9b9129e7 284
1da177e4
LT
285 switch (new->c_cflag & CSIZE) {
286 case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
287 break;
288 case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
289 break;
290 case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
291 break;
292 case CS8:
293 default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
294 }
295
296 if (new->c_cflag & PARENB) {
297 mr1 |= (new->c_cflag & PARODD) ?
298 MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
299 } else
300 mr1 |= MPC52xx_PSC_MODE_PARNONE;
9b9129e7
GL
301
302
1da177e4
LT
303 mr2 = 0;
304
305 if (new->c_cflag & CSTOPB)
306 mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
307 else
308 mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
309 MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
310 MPC52xx_PSC_MODE_ONE_STOP;
311
312
313 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
314 quot = uart_get_divisor(port, baud);
315 ctr = quot & 0xffff;
9b9129e7 316
1da177e4
LT
317 /* Get the lock */
318 spin_lock_irqsave(&port->lock, flags);
319
320 /* Update the per-port timeout */
321 uart_update_timeout(port, new->c_cflag, baud);
322
323 /* Do our best to flush TX & RX, so we don't loose anything */
324 /* But we don't wait indefinitly ! */
325 j = 5000000; /* Maximum wait */
326 /* FIXME Can't receive chars since set_termios might be called at early
327 * boot for the console, all stuff is not yet ready to receive at that
328 * time and that just makes the kernel oops */
329 /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
9b9129e7 330 while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
1da177e4
LT
331 --j)
332 udelay(1);
333
334 if (!j)
335 printk( KERN_ERR "mpc52xx_uart.c: "
336 "Unable to flush RX & TX fifos in-time in set_termios."
9b9129e7 337 "Some chars may have been lost.\n" );
1da177e4
LT
338
339 /* Reset the TX & RX */
340 out_8(&psc->command,MPC52xx_PSC_RST_RX);
341 out_8(&psc->command,MPC52xx_PSC_RST_TX);
342
343 /* Send new mode settings */
344 out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
345 out_8(&psc->mode,mr1);
346 out_8(&psc->mode,mr2);
347 out_8(&psc->ctur,ctr >> 8);
348 out_8(&psc->ctlr,ctr & 0xff);
9b9129e7 349
1da177e4
LT
350 /* Reenable TX & RX */
351 out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
352 out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
353
354 /* We're all set, release the lock */
355 spin_unlock_irqrestore(&port->lock, flags);
356}
357
358static const char *
359mpc52xx_uart_type(struct uart_port *port)
360{
361 return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
362}
363
364static void
365mpc52xx_uart_release_port(struct uart_port *port)
366{
367 if (port->flags & UPF_IOREMAP) { /* remapped by us ? */
368 iounmap(port->membase);
369 port->membase = NULL;
370 }
371
b9272dfd 372 release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc));
1da177e4
LT
373}
374
375static int
376mpc52xx_uart_request_port(struct uart_port *port)
377{
be618f55
AL
378 int err;
379
1da177e4 380 if (port->flags & UPF_IOREMAP) /* Need to remap ? */
b9272dfd
GL
381 port->membase = ioremap(port->mapbase,
382 sizeof(struct mpc52xx_psc));
1da177e4
LT
383
384 if (!port->membase)
385 return -EINVAL;
386
b9272dfd 387 err = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc),
1da177e4 388 "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
be618f55
AL
389
390 if (err && (port->flags & UPF_IOREMAP)) {
391 iounmap(port->membase);
392 port->membase = NULL;
393 }
394
395 return err;
1da177e4
LT
396}
397
398static void
399mpc52xx_uart_config_port(struct uart_port *port, int flags)
400{
401 if ( (flags & UART_CONFIG_TYPE) &&
402 (mpc52xx_uart_request_port(port) == 0) )
403 port->type = PORT_MPC52xx;
404}
405
406static int
407mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
408{
409 if ( ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx )
410 return -EINVAL;
411
412 if ( (ser->irq != port->irq) ||
413 (ser->io_type != SERIAL_IO_MEM) ||
9b9129e7 414 (ser->baud_base != port->uartclk) ||
1da177e4
LT
415 (ser->iomem_base != (void*)port->mapbase) ||
416 (ser->hub6 != 0 ) )
417 return -EINVAL;
418
419 return 0;
420}
421
422
423static struct uart_ops mpc52xx_uart_ops = {
424 .tx_empty = mpc52xx_uart_tx_empty,
425 .set_mctrl = mpc52xx_uart_set_mctrl,
426 .get_mctrl = mpc52xx_uart_get_mctrl,
427 .stop_tx = mpc52xx_uart_stop_tx,
428 .start_tx = mpc52xx_uart_start_tx,
429 .send_xchar = mpc52xx_uart_send_xchar,
430 .stop_rx = mpc52xx_uart_stop_rx,
431 .enable_ms = mpc52xx_uart_enable_ms,
432 .break_ctl = mpc52xx_uart_break_ctl,
433 .startup = mpc52xx_uart_startup,
434 .shutdown = mpc52xx_uart_shutdown,
435 .set_termios = mpc52xx_uart_set_termios,
436/* .pm = mpc52xx_uart_pm, Not supported yet */
437/* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
438 .type = mpc52xx_uart_type,
439 .release_port = mpc52xx_uart_release_port,
440 .request_port = mpc52xx_uart_request_port,
441 .config_port = mpc52xx_uart_config_port,
442 .verify_port = mpc52xx_uart_verify_port
443};
444
9b9129e7 445
1da177e4
LT
446/* ======================================================================== */
447/* Interrupt handling */
448/* ======================================================================== */
9b9129e7 449
1da177e4 450static inline int
7d12e780 451mpc52xx_uart_int_rx_chars(struct uart_port *port)
1da177e4
LT
452{
453 struct tty_struct *tty = port->info->tty;
33f0f88f 454 unsigned char ch, flag;
1da177e4
LT
455 unsigned short status;
456
457 /* While we can read, do so ! */
458 while ( (status = in_be16(&PSC(port)->mpc52xx_psc_status)) &
459 MPC52xx_PSC_SR_RXRDY) {
460
1da177e4
LT
461 /* Get the char */
462 ch = in_8(&PSC(port)->mpc52xx_psc_buffer_8);
463
464 /* Handle sysreq char */
465#ifdef SUPPORT_SYSRQ
7d12e780 466 if (uart_handle_sysrq_char(port, ch)) {
1da177e4
LT
467 port->sysrq = 0;
468 continue;
469 }
470#endif
471
472 /* Store it */
33f0f88f
AC
473
474 flag = TTY_NORMAL;
1da177e4 475 port->icount.rx++;
9b9129e7 476
1da177e4
LT
477 if ( status & (MPC52xx_PSC_SR_PE |
478 MPC52xx_PSC_SR_FE |
33f0f88f 479 MPC52xx_PSC_SR_RB) ) {
9b9129e7 480
1da177e4 481 if (status & MPC52xx_PSC_SR_RB) {
33f0f88f 482 flag = TTY_BREAK;
1da177e4
LT
483 uart_handle_break(port);
484 } else if (status & MPC52xx_PSC_SR_PE)
33f0f88f 485 flag = TTY_PARITY;
1da177e4 486 else if (status & MPC52xx_PSC_SR_FE)
33f0f88f 487 flag = TTY_FRAME;
1da177e4
LT
488
489 /* Clear error condition */
490 out_8(&PSC(port)->command,MPC52xx_PSC_RST_ERR_STAT);
491
492 }
33f0f88f
AC
493 tty_insert_flip_char(tty, ch, flag);
494 if (status & MPC52xx_PSC_SR_OE) {
495 /*
496 * Overrun is special, since it's
497 * reported immediately, and doesn't
498 * affect the current character
499 */
500 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
501 }
1da177e4
LT
502 }
503
504 tty_flip_buffer_push(tty);
9b9129e7 505
1da177e4
LT
506 return in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_RXRDY;
507}
508
509static inline int
510mpc52xx_uart_int_tx_chars(struct uart_port *port)
511{
512 struct circ_buf *xmit = &port->info->xmit;
513
514 /* Process out of band chars */
515 if (port->x_char) {
516 out_8(&PSC(port)->mpc52xx_psc_buffer_8, port->x_char);
517 port->icount.tx++;
518 port->x_char = 0;
519 return 1;
520 }
521
522 /* Nothing to do ? */
523 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
b129a8cc 524 mpc52xx_uart_stop_tx(port);
1da177e4
LT
525 return 0;
526 }
527
528 /* Send chars */
529 while (in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXRDY) {
530 out_8(&PSC(port)->mpc52xx_psc_buffer_8, xmit->buf[xmit->tail]);
531 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
532 port->icount.tx++;
533 if (uart_circ_empty(xmit))
534 break;
535 }
536
537 /* Wake up */
538 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
539 uart_write_wakeup(port);
540
541 /* Maybe we're done after all */
542 if (uart_circ_empty(xmit)) {
b129a8cc 543 mpc52xx_uart_stop_tx(port);
1da177e4
LT
544 return 0;
545 }
546
547 return 1;
548}
549
9b9129e7 550static irqreturn_t
7d12e780 551mpc52xx_uart_int(int irq, void *dev_id)
1da177e4 552{
c7bec5ab 553 struct uart_port *port = dev_id;
1da177e4
LT
554 unsigned long pass = ISR_PASS_LIMIT;
555 unsigned int keepgoing;
556 unsigned short status;
9b9129e7 557
1da177e4 558 spin_lock(&port->lock);
9b9129e7 559
1da177e4
LT
560 /* While we have stuff to do, we continue */
561 do {
562 /* If we don't find anything to do, we stop */
9b9129e7
GL
563 keepgoing = 0;
564
1da177e4
LT
565 /* Read status */
566 status = in_be16(&PSC(port)->mpc52xx_psc_isr);
567 status &= port->read_status_mask;
9b9129e7 568
1da177e4
LT
569 /* Do we need to receive chars ? */
570 /* For this RX interrupts must be on and some chars waiting */
571 if ( status & MPC52xx_PSC_IMR_RXRDY )
7d12e780 572 keepgoing |= mpc52xx_uart_int_rx_chars(port);
1da177e4
LT
573
574 /* Do we need to send chars ? */
575 /* For this, TX must be ready and TX interrupt enabled */
576 if ( status & MPC52xx_PSC_IMR_TXRDY )
577 keepgoing |= mpc52xx_uart_int_tx_chars(port);
9b9129e7 578
1da177e4
LT
579 /* Limit number of iteration */
580 if ( !(--pass) )
581 keepgoing = 0;
582
583 } while (keepgoing);
9b9129e7 584
1da177e4 585 spin_unlock(&port->lock);
9b9129e7 586
1da177e4
LT
587 return IRQ_HANDLED;
588}
589
590
591/* ======================================================================== */
592/* Console ( if applicable ) */
593/* ======================================================================== */
594
595#ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
596
597static void __init
598mpc52xx_console_get_options(struct uart_port *port,
599 int *baud, int *parity, int *bits, int *flow)
600{
601 struct mpc52xx_psc __iomem *psc = PSC(port);
602 unsigned char mr1;
603
b9272dfd
GL
604 pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
605
1da177e4
LT
606 /* Read the mode registers */
607 out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
608 mr1 = in_8(&psc->mode);
9b9129e7 609
1da177e4 610 /* CT{U,L}R are write-only ! */
b9272dfd
GL
611 *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
612#if !defined(CONFIG_PPC_MERGE)
613 if (__res.bi_baudrate)
614 *baud = __res.bi_baudrate;
615#endif
1da177e4
LT
616
617 /* Parse them */
618 switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
619 case MPC52xx_PSC_MODE_5_BITS: *bits = 5; break;
620 case MPC52xx_PSC_MODE_6_BITS: *bits = 6; break;
621 case MPC52xx_PSC_MODE_7_BITS: *bits = 7; break;
622 case MPC52xx_PSC_MODE_8_BITS:
623 default: *bits = 8;
624 }
9b9129e7 625
1da177e4
LT
626 if (mr1 & MPC52xx_PSC_MODE_PARNONE)
627 *parity = 'n';
628 else
629 *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
630}
631
9b9129e7 632static void
1da177e4
LT
633mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
634{
635 struct uart_port *port = &mpc52xx_uart_ports[co->index];
636 struct mpc52xx_psc __iomem *psc = PSC(port);
637 unsigned int i, j;
9b9129e7 638
1da177e4
LT
639 /* Disable interrupts */
640 out_be16(&psc->mpc52xx_psc_imr, 0);
641
642 /* Wait the TX buffer to be empty */
9b9129e7
GL
643 j = 5000000; /* Maximum wait */
644 while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
1da177e4
LT
645 --j)
646 udelay(1);
647
648 /* Write all the chars */
d358788f 649 for (i = 0; i < count; i++, s++) {
1da177e4 650 /* Line return handling */
d358788f 651 if (*s == '\n')
1da177e4 652 out_8(&psc->mpc52xx_psc_buffer_8, '\r');
9b9129e7 653
d358788f
RK
654 /* Send the char */
655 out_8(&psc->mpc52xx_psc_buffer_8, *s);
656
1da177e4 657 /* Wait the TX buffer to be empty */
9b9129e7
GL
658 j = 20000; /* Maximum wait */
659 while (!(in_be16(&psc->mpc52xx_psc_status) &
1da177e4
LT
660 MPC52xx_PSC_SR_TXEMP) && --j)
661 udelay(1);
662 }
663
664 /* Restore interrupt state */
665 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
666}
667
b9272dfd 668#if !defined(CONFIG_PPC_MERGE)
1da177e4
LT
669static int __init
670mpc52xx_console_setup(struct console *co, char *options)
671{
672 struct uart_port *port = &mpc52xx_uart_ports[co->index];
673
674 int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
675 int bits = 8;
676 int parity = 'n';
677 int flow = 'n';
678
679 if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM)
680 return -EINVAL;
9b9129e7 681
1da177e4
LT
682 /* Basic port init. Needed since we use some uart_??? func before
683 * real init for early access */
684 spin_lock_init(&port->lock);
685 port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
686 port->ops = &mpc52xx_uart_ops;
687 port->mapbase = MPC52xx_PA(MPC52xx_PSCx_OFFSET(co->index+1));
688
689 /* We ioremap ourself */
690 port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE);
691 if (port->membase == NULL)
692 return -EINVAL;
693
694 /* Setup the port parameters accoding to options */
695 if (options)
696 uart_parse_options(options, &baud, &parity, &bits, &flow);
697 else
698 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
699
700 return uart_set_options(port, co, baud, parity, bits, flow);
701}
702
b9272dfd
GL
703#else
704
705static int __init
706mpc52xx_console_setup(struct console *co, char *options)
707{
708 struct uart_port *port = &mpc52xx_uart_ports[co->index];
709 struct device_node *np = mpc52xx_uart_nodes[co->index];
710 unsigned int ipb_freq;
711 struct resource res;
712 int ret;
713
714 int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
715 int bits = 8;
716 int parity = 'n';
717 int flow = 'n';
718
719 pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n",
720 co, co->index, options);
721
722 if ((co->index < 0) || (co->index > MPC52xx_PSC_MAXNUM)) {
723 pr_debug("PSC%x out of range\n", co->index);
724 return -EINVAL;
725 }
726
727 if (!np) {
728 pr_debug("PSC%x not found in device tree\n", co->index);
729 return -EINVAL;
730 }
731
732 pr_debug("Console on ttyPSC%x is %s\n",
733 co->index, mpc52xx_uart_nodes[co->index]->full_name);
734
735 /* Fetch register locations */
736 if ((ret = of_address_to_resource(np, 0, &res)) != 0) {
737 pr_debug("Could not get resources for PSC%x\n", co->index);
738 return ret;
739 }
740
741 /* Search for bus-frequency property in this node or a parent */
742 if ((ipb_freq = mpc52xx_find_ipb_freq(np)) == 0) {
743 pr_debug("Could not find IPB bus frequency!\n");
744 return -EINVAL;
745 }
746
747 /* Basic port init. Needed since we use some uart_??? func before
748 * real init for early access */
749 spin_lock_init(&port->lock);
750 port->uartclk = ipb_freq / 2;
751 port->ops = &mpc52xx_uart_ops;
752 port->mapbase = res.start;
753 port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
754 port->irq = irq_of_parse_and_map(np, 0);
755
756 if (port->membase == NULL)
757 return -EINVAL;
758
759 pr_debug("mpc52xx-psc uart at %lx, mapped to %p, irq=%x, freq=%i\n",
760 port->mapbase, port->membase, port->irq, port->uartclk);
761
762 /* Setup the port parameters accoding to options */
763 if (options)
764 uart_parse_options(options, &baud, &parity, &bits, &flow);
765 else
766 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
767
768 pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
769 baud, bits, parity, flow);
770
771 return uart_set_options(port, co, baud, parity, bits, flow);
772}
773#endif /* defined(CONFIG_PPC_MERGE) */
774
1da177e4 775
2d8179c0 776static struct uart_driver mpc52xx_uart_driver;
1da177e4
LT
777
778static struct console mpc52xx_console = {
d62de3aa 779 .name = "ttyPSC",
1da177e4
LT
780 .write = mpc52xx_console_write,
781 .device = uart_console_device,
782 .setup = mpc52xx_console_setup,
783 .flags = CON_PRINTBUFFER,
d62de3aa 784 .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0 ) */
1da177e4
LT
785 .data = &mpc52xx_uart_driver,
786};
787
9b9129e7
GL
788
789static int __init
1da177e4
LT
790mpc52xx_console_init(void)
791{
c98750c2 792#if defined(CONFIG_PPC_MERGE)
b9272dfd 793 mpc52xx_uart_of_enumerate();
c98750c2 794#endif
1da177e4
LT
795 register_console(&mpc52xx_console);
796 return 0;
797}
798
799console_initcall(mpc52xx_console_init);
800
801#define MPC52xx_PSC_CONSOLE &mpc52xx_console
802#else
803#define MPC52xx_PSC_CONSOLE NULL
804#endif
805
806
807/* ======================================================================== */
808/* UART Driver */
809/* ======================================================================== */
810
811static struct uart_driver mpc52xx_uart_driver = {
812 .owner = THIS_MODULE,
813 .driver_name = "mpc52xx_psc_uart",
d62de3aa 814 .dev_name = "ttyPSC",
d62de3aa
SM
815 .major = SERIAL_PSC_MAJOR,
816 .minor = SERIAL_PSC_MINOR,
1da177e4
LT
817 .nr = MPC52xx_PSC_MAXNUM,
818 .cons = MPC52xx_PSC_CONSOLE,
819};
820
821
b9272dfd 822#if !defined(CONFIG_PPC_MERGE)
1da177e4
LT
823/* ======================================================================== */
824/* Platform Driver */
825/* ======================================================================== */
826
827static int __devinit
3ae5eaec 828mpc52xx_uart_probe(struct platform_device *dev)
1da177e4 829{
3ae5eaec 830 struct resource *res = dev->resource;
1da177e4
LT
831
832 struct uart_port *port = NULL;
833 int i, idx, ret;
834
835 /* Check validity & presence */
38801e2e 836 idx = dev->id;
1da177e4
LT
837 if (idx < 0 || idx >= MPC52xx_PSC_MAXNUM)
838 return -EINVAL;
839
840 if (!mpc52xx_match_psc_function(idx,"uart"))
841 return -ENODEV;
842
843 /* Init the port structure */
844 port = &mpc52xx_uart_ports[idx];
845
1da177e4
LT
846 spin_lock_init(&port->lock);
847 port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
947deee8 848 port->fifosize = 512;
1da177e4
LT
849 port->iotype = UPIO_MEM;
850 port->flags = UPF_BOOT_AUTOCONF |
851 ( uart_console(port) ? 0 : UPF_IOREMAP );
852 port->line = idx;
853 port->ops = &mpc52xx_uart_ops;
b9272dfd 854 port->dev = &dev->dev;
1da177e4
LT
855
856 /* Search for IRQ and mapbase */
38801e2e 857 for (i=0 ; i<dev->num_resources ; i++, res++) {
1da177e4
LT
858 if (res->flags & IORESOURCE_MEM)
859 port->mapbase = res->start;
860 else if (res->flags & IORESOURCE_IRQ)
861 port->irq = res->start;
862 }
863 if (!port->irq || !port->mapbase)
864 return -EINVAL;
865
866 /* Add the port to the uart sub-system */
867 ret = uart_add_one_port(&mpc52xx_uart_driver, port);
868 if (!ret)
3ae5eaec 869 platform_set_drvdata(dev, (void*)port);
1da177e4
LT
870
871 return ret;
872}
873
874static int
3ae5eaec 875mpc52xx_uart_remove(struct platform_device *dev)
1da177e4 876{
3ae5eaec 877 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
1da177e4 878
3ae5eaec 879 platform_set_drvdata(dev, NULL);
1da177e4
LT
880
881 if (port)
882 uart_remove_one_port(&mpc52xx_uart_driver, port);
883
884 return 0;
885}
886
887#ifdef CONFIG_PM
888static int
3ae5eaec 889mpc52xx_uart_suspend(struct platform_device *dev, pm_message_t state)
1da177e4 890{
3ae5eaec 891 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
1da177e4 892
9b9129e7 893 if (port)
1da177e4
LT
894 uart_suspend_port(&mpc52xx_uart_driver, port);
895
896 return 0;
897}
898
899static int
3ae5eaec 900mpc52xx_uart_resume(struct platform_device *dev)
1da177e4 901{
3ae5eaec 902 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
1da177e4 903
9480e307 904 if (port)
1da177e4
LT
905 uart_resume_port(&mpc52xx_uart_driver, port);
906
907 return 0;
908}
909#endif
910
b9272dfd 911
3ae5eaec 912static struct platform_driver mpc52xx_uart_platform_driver = {
1da177e4
LT
913 .probe = mpc52xx_uart_probe,
914 .remove = mpc52xx_uart_remove,
915#ifdef CONFIG_PM
916 .suspend = mpc52xx_uart_suspend,
917 .resume = mpc52xx_uart_resume,
918#endif
3ae5eaec
RK
919 .driver = {
920 .name = "mpc52xx-psc",
921 },
1da177e4 922};
b9272dfd
GL
923#endif /* !defined(CONFIG_PPC_MERGE) */
924
925
926#if defined(CONFIG_PPC_MERGE)
927/* ======================================================================== */
928/* OF Platform Driver */
929/* ======================================================================== */
930
931static int __devinit
932mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
933{
934 int idx = -1;
935 unsigned int ipb_freq;
936 struct uart_port *port = NULL;
937 struct resource res;
938 int ret;
939
940 dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match);
941
942 /* Check validity & presence */
943 for (idx = 0; idx < MPC52xx_PSC_MAXNUM; idx++)
944 if (mpc52xx_uart_nodes[idx] == op->node)
945 break;
946 if (idx >= MPC52xx_PSC_MAXNUM)
947 return -EINVAL;
948 pr_debug("Found %s assigned to ttyPSC%x\n",
949 mpc52xx_uart_nodes[idx]->full_name, idx);
950
951 /* Search for bus-frequency property in this node or a parent */
952 if ((ipb_freq = mpc52xx_find_ipb_freq(op->node)) == 0) {
953 dev_dbg(&op->dev, "Could not find IPB bus frequency!\n");
954 return -EINVAL;
955 }
956
957 /* Init the port structure */
958 port = &mpc52xx_uart_ports[idx];
959
960 spin_lock_init(&port->lock);
961 port->uartclk = ipb_freq / 2;
962 port->fifosize = 512;
963 port->iotype = UPIO_MEM;
964 port->flags = UPF_BOOT_AUTOCONF |
965 ( uart_console(port) ? 0 : UPF_IOREMAP );
966 port->line = idx;
967 port->ops = &mpc52xx_uart_ops;
968 port->dev = &op->dev;
969
970 /* Search for IRQ and mapbase */
971 if ((ret = of_address_to_resource(op->node, 0, &res)) != 0)
972 return ret;
973
974 port->mapbase = res.start;
975 port->irq = irq_of_parse_and_map(op->node, 0);
976
977 dev_dbg(&op->dev, "mpc52xx-psc uart at %lx, irq=%x, freq=%i\n",
978 port->mapbase, port->irq, port->uartclk);
979
980 if ((port->irq==NO_IRQ) || !port->mapbase) {
981 printk(KERN_ERR "Could not allocate resources for PSC\n");
982 return -EINVAL;
983 }
984
985 /* Add the port to the uart sub-system */
986 ret = uart_add_one_port(&mpc52xx_uart_driver, port);
987 if (!ret)
988 dev_set_drvdata(&op->dev, (void*)port);
989
990 return ret;
991}
992
993static int
994mpc52xx_uart_of_remove(struct of_device *op)
995{
996 struct uart_port *port = dev_get_drvdata(&op->dev);
997 dev_set_drvdata(&op->dev, NULL);
998
999 if (port)
1000 uart_remove_one_port(&mpc52xx_uart_driver, port);
1001
1002 return 0;
1003}
1004
1005#ifdef CONFIG_PM
1006static int
1007mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state)
1008{
1009 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1010
1011 if (port)
1012 uart_suspend_port(&mpc52xx_uart_driver, port);
1013
1014 return 0;
1015}
1016
1017static int
1018mpc52xx_uart_of_resume(struct of_device *op)
1019{
1020 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1021
1022 if (port)
1023 uart_resume_port(&mpc52xx_uart_driver, port);
1024
1025 return 0;
1026}
1027#endif
1028
1029static void
1030mpc52xx_uart_of_assign(struct device_node *np, int idx)
1031{
1032 int free_idx = -1;
1033 int i;
1034
1035 /* Find the first free node */
1036 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1037 if (mpc52xx_uart_nodes[i] == NULL) {
1038 free_idx = i;
1039 break;
1040 }
1041 }
1042
1043 if ((idx < 0) || (idx >= MPC52xx_PSC_MAXNUM))
1044 idx = free_idx;
1045
1046 if (idx < 0)
1047 return; /* No free slot; abort */
1048
1049 /* If the slot is already occupied, then swap slots */
1050 if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
1051 mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
1052 mpc52xx_uart_nodes[i] = np;
1053}
1054
1055static void
1056mpc52xx_uart_of_enumerate(void)
1057{
1058 static int enum_done = 0;
1059 struct device_node *np;
1060 const unsigned int *devno;
1061 int i;
1062
1063 if (enum_done)
1064 return;
1065
1066 for_each_node_by_type(np, "serial") {
1067 if (!of_match_node(mpc52xx_uart_of_match, np))
1068 continue;
1069
1070 /* Is a particular device number requested? */
1071 devno = get_property(np, "device_no", NULL);
1072 mpc52xx_uart_of_assign(of_node_get(np), devno ? *devno : -1);
1073 }
1074
1075 enum_done = 1;
1076
1077 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1078 if (mpc52xx_uart_nodes[i])
1079 pr_debug("%s assigned to ttyPSC%x\n",
1080 mpc52xx_uart_nodes[i]->full_name, i);
1081 }
1082}
1083
1084MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match);
1085
1086static struct of_platform_driver mpc52xx_uart_of_driver = {
1087 .owner = THIS_MODULE,
1088 .name = "mpc52xx-psc-uart",
1089 .match_table = mpc52xx_uart_of_match,
1090 .probe = mpc52xx_uart_of_probe,
1091 .remove = mpc52xx_uart_of_remove,
1092#ifdef CONFIG_PM
1093 .suspend = mpc52xx_uart_of_suspend,
1094 .resume = mpc52xx_uart_of_resume,
1095#endif
1096 .driver = {
1097 .name = "mpc52xx-psc-uart",
1098 },
1099};
1100#endif /* defined(CONFIG_PPC_MERGE) */
1da177e4
LT
1101
1102
1103/* ======================================================================== */
1104/* Module */
1105/* ======================================================================== */
1106
1107static int __init
1108mpc52xx_uart_init(void)
1109{
1110 int ret;
1111
b9272dfd 1112 printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n");
1da177e4 1113
b9272dfd
GL
1114 if ((ret = uart_register_driver(&mpc52xx_uart_driver)) != 0) {
1115 printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
1116 __FILE__, ret);
1117 return ret;
1da177e4
LT
1118 }
1119
b9272dfd
GL
1120#if defined(CONFIG_PPC_MERGE)
1121 mpc52xx_uart_of_enumerate();
1122
1123 ret = of_register_platform_driver(&mpc52xx_uart_of_driver);
1124 if (ret) {
1125 printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n",
1126 __FILE__, ret);
1127 uart_unregister_driver(&mpc52xx_uart_driver);
1128 return ret;
1129 }
1130#else
1131 ret = platform_driver_register(&mpc52xx_uart_platform_driver);
1132 if (ret) {
1133 printk(KERN_ERR "%s: platform_driver_register failed (%i)\n",
1134 __FILE__, ret);
1135 uart_unregister_driver(&mpc52xx_uart_driver);
1136 return ret;
1137 }
1138#endif
1139
1140 return 0;
1da177e4
LT
1141}
1142
1143static void __exit
1144mpc52xx_uart_exit(void)
1145{
b9272dfd
GL
1146#if defined(CONFIG_PPC_MERGE)
1147 of_unregister_platform_driver(&mpc52xx_uart_of_driver);
1148#else
3ae5eaec 1149 platform_driver_unregister(&mpc52xx_uart_platform_driver);
b9272dfd 1150#endif
1da177e4
LT
1151 uart_unregister_driver(&mpc52xx_uart_driver);
1152}
1153
1154
1155module_init(mpc52xx_uart_init);
1156module_exit(mpc52xx_uart_exit);
1157
1158MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
1159MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
1160MODULE_LICENSE("GPL");