]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/blame - drivers/serial/mpc52xx_uart.c
[POWERPC] Rename get_property to of_get_property: drivers
[mirror_ubuntu-jammy-kernel.git] / drivers / serial / mpc52xx_uart.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
3 *
4 * FIXME According to the usermanual the status bits in the status register
5 * are only updated when the peripherals access the FIFO and not when the
6 * CPU access them. So since we use this bits to know when we stop writing
7 * and reading, they may not be updated in-time and a race condition may
8 * exists. But I haven't be able to prove this and I don't care. But if
9 * any problem arises, it might worth checking. The TX/RX FIFO Stats
10 * registers should be used in addition.
11 * Update: Actually, they seem updated ... At least the bits we use.
12 *
13 *
14 * Maintainer : Sylvain Munaut <tnt@246tNt.com>
9b9129e7 15 *
1da177e4
LT
16 * Some of the code has been inspired/copied from the 2.4 code written
17 * by Dale Farnsworth <dfarnsworth@mvista.com>.
9b9129e7 18 *
b9272dfd
GL
19 * Copyright (C) 2006 Secret Lab Technologies Ltd.
20 * Grant Likely <grant.likely@secretlab.ca>
21 * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
1da177e4 22 * Copyright (C) 2003 MontaVista, Software, Inc.
9b9129e7 23 *
1da177e4
LT
24 * This file is licensed under the terms of the GNU General Public License
25 * version 2. This program is licensed "as is" without any warranty of any
26 * kind, whether express or implied.
27 */
9b9129e7 28
1da177e4
LT
29/* Platform device Usage :
30 *
31 * Since PSCs can have multiple function, the correct driver for each one
32 * is selected by calling mpc52xx_match_psc_function(...). The function
33 * handled by this driver is "uart".
34 *
35 * The driver init all necessary registers to place the PSC in uart mode without
36 * DCD. However, the pin multiplexing aren't changed and should be set either
37 * by the bootloader or in the platform init code.
38 *
39 * The idx field must be equal to the PSC index ( e.g. 0 for PSC1, 1 for PSC2,
d62de3aa
SM
40 * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
41 * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
42 * fpr the console code : without this 1:1 mapping, at early boot time, when we
c30fe7f7 43 * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
d62de3aa 44 * will be mapped to.
1da177e4
LT
45 */
46
b9272dfd
GL
47/* OF Platform device Usage :
48 *
49 * This driver is only used for PSCs configured in uart mode. The device
50 * tree will have a node for each PSC in uart mode w/ device_type = "serial"
51 * and "mpc52xx-psc-uart" in the compatible string
52 *
53 * By default, PSC devices are enumerated in the order they are found. However
54 * a particular PSC number can be forces by adding 'device_no = <port#>'
55 * to the device node.
56 *
57 * The driver init all necessary registers to place the PSC in uart mode without
58 * DCD. However, the pin multiplexing aren't changed and should be set either
59 * by the bootloader or in the platform init code.
60 */
61
62#undef DEBUG
63
64#include <linux/device.h>
1da177e4
LT
65#include <linux/module.h>
66#include <linux/tty.h>
67#include <linux/serial.h>
68#include <linux/sysrq.h>
69#include <linux/console.h>
70
71#include <asm/delay.h>
72#include <asm/io.h>
73
b9272dfd
GL
74#if defined(CONFIG_PPC_MERGE)
75#include <asm/of_platform.h>
76#else
77#include <linux/platform_device.h>
78#endif
79
1da177e4
LT
80#include <asm/mpc52xx.h>
81#include <asm/mpc52xx_psc.h>
82
83#if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
84#define SUPPORT_SYSRQ
85#endif
86
87#include <linux/serial_core.h>
88
89
d62de3aa
SM
90/* We've been assigned a range on the "Low-density serial ports" major */
91#define SERIAL_PSC_MAJOR 204
92#define SERIAL_PSC_MINOR 148
93
1da177e4
LT
94
95#define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
96
97
98static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
99 /* Rem: - We use the read_status_mask as a shadow of
100 * psc->mpc52xx_psc_imr
101 * - It's important that is array is all zero on start as we
102 * use it to know if it's initialized or not ! If it's not sure
103 * it's cleared, then a memset(...,0,...) should be added to
104 * the console_init
105 */
b9272dfd
GL
106#if defined(CONFIG_PPC_MERGE)
107/* lookup table for matching device nodes to index numbers */
108static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM];
109
110static void mpc52xx_uart_of_enumerate(void);
111#endif
1da177e4
LT
112
113#define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
114
115
116/* Forward declaration of the interruption handling routine */
7d12e780 117static irqreturn_t mpc52xx_uart_int(int irq,void *dev_id);
1da177e4
LT
118
119
120/* Simple macro to test if a port is console or not. This one is taken
121 * for serial_core.c and maybe should be moved to serial_core.h ? */
122#ifdef CONFIG_SERIAL_CORE_CONSOLE
123#define uart_console(port) ((port)->cons && (port)->cons->index == (port)->line)
124#else
125#define uart_console(port) (0)
126#endif
127
b9272dfd
GL
128#if defined(CONFIG_PPC_MERGE)
129static struct of_device_id mpc52xx_uart_of_match[] = {
e3aba81d 130 { .type = "serial", .compatible = "mpc5200-psc-uart", },
b9272dfd
GL
131 {},
132};
133#endif
134
1da177e4
LT
135
136/* ======================================================================== */
137/* UART operations */
138/* ======================================================================== */
139
9b9129e7 140static unsigned int
1da177e4
LT
141mpc52xx_uart_tx_empty(struct uart_port *port)
142{
143 int status = in_be16(&PSC(port)->mpc52xx_psc_status);
144 return (status & MPC52xx_PSC_SR_TXEMP) ? TIOCSER_TEMT : 0;
145}
146
9b9129e7 147static void
1da177e4
LT
148mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
149{
150 /* Not implemented */
151}
152
9b9129e7 153static unsigned int
1da177e4
LT
154mpc52xx_uart_get_mctrl(struct uart_port *port)
155{
156 /* Not implemented */
157 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
158}
159
9b9129e7 160static void
b129a8cc 161mpc52xx_uart_stop_tx(struct uart_port *port)
1da177e4
LT
162{
163 /* port->lock taken by caller */
164 port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
165 out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
166}
167
9b9129e7 168static void
b129a8cc 169mpc52xx_uart_start_tx(struct uart_port *port)
1da177e4
LT
170{
171 /* port->lock taken by caller */
172 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
173 out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
174}
175
9b9129e7 176static void
1da177e4
LT
177mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
178{
179 unsigned long flags;
180 spin_lock_irqsave(&port->lock, flags);
9b9129e7 181
1da177e4
LT
182 port->x_char = ch;
183 if (ch) {
184 /* Make sure tx interrupts are on */
185 /* Truly necessary ??? They should be anyway */
186 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
187 out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
188 }
9b9129e7 189
1da177e4
LT
190 spin_unlock_irqrestore(&port->lock, flags);
191}
192
193static void
194mpc52xx_uart_stop_rx(struct uart_port *port)
195{
196 /* port->lock taken by caller */
197 port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
198 out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
199}
200
201static void
202mpc52xx_uart_enable_ms(struct uart_port *port)
203{
204 /* Not implemented */
205}
206
207static void
208mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
209{
210 unsigned long flags;
211 spin_lock_irqsave(&port->lock, flags);
212
213 if ( ctl == -1 )
214 out_8(&PSC(port)->command,MPC52xx_PSC_START_BRK);
215 else
216 out_8(&PSC(port)->command,MPC52xx_PSC_STOP_BRK);
9b9129e7 217
1da177e4
LT
218 spin_unlock_irqrestore(&port->lock, flags);
219}
220
221static int
222mpc52xx_uart_startup(struct uart_port *port)
223{
224 struct mpc52xx_psc __iomem *psc = PSC(port);
225 int ret;
226
227 /* Request IRQ */
228 ret = request_irq(port->irq, mpc52xx_uart_int,
40663cc7 229 IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "mpc52xx_psc_uart", port);
1da177e4
LT
230 if (ret)
231 return ret;
232
233 /* Reset/activate the port, clear and enable interrupts */
234 out_8(&psc->command,MPC52xx_PSC_RST_RX);
235 out_8(&psc->command,MPC52xx_PSC_RST_TX);
9b9129e7 236
1da177e4
LT
237 out_be32(&psc->sicr,0); /* UART mode DCD ignored */
238
239 out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); /* /16 prescaler on */
9b9129e7 240
1da177e4
LT
241 out_8(&psc->rfcntl, 0x00);
242 out_be16(&psc->rfalarm, 0x1ff);
243 out_8(&psc->tfcntl, 0x07);
244 out_be16(&psc->tfalarm, 0x80);
245
246 port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
247 out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
9b9129e7 248
1da177e4
LT
249 out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
250 out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
9b9129e7 251
1da177e4
LT
252 return 0;
253}
254
255static void
256mpc52xx_uart_shutdown(struct uart_port *port)
257{
258 struct mpc52xx_psc __iomem *psc = PSC(port);
9b9129e7 259
1da177e4
LT
260 /* Shut down the port, interrupt and all */
261 out_8(&psc->command,MPC52xx_PSC_RST_RX);
262 out_8(&psc->command,MPC52xx_PSC_RST_TX);
9b9129e7
GL
263
264 port->read_status_mask = 0;
1da177e4
LT
265 out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
266
267 /* Release interrupt */
268 free_irq(port->irq, port);
269}
270
9b9129e7 271static void
606d099c
AC
272mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
273 struct ktermios *old)
1da177e4
LT
274{
275 struct mpc52xx_psc __iomem *psc = PSC(port);
276 unsigned long flags;
277 unsigned char mr1, mr2;
278 unsigned short ctr;
279 unsigned int j, baud, quot;
9b9129e7 280
1da177e4
LT
281 /* Prepare what we're gonna write */
282 mr1 = 0;
9b9129e7 283
1da177e4
LT
284 switch (new->c_cflag & CSIZE) {
285 case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
286 break;
287 case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
288 break;
289 case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
290 break;
291 case CS8:
292 default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
293 }
294
295 if (new->c_cflag & PARENB) {
296 mr1 |= (new->c_cflag & PARODD) ?
297 MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
298 } else
299 mr1 |= MPC52xx_PSC_MODE_PARNONE;
9b9129e7
GL
300
301
1da177e4
LT
302 mr2 = 0;
303
304 if (new->c_cflag & CSTOPB)
305 mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
306 else
307 mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
308 MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
309 MPC52xx_PSC_MODE_ONE_STOP;
310
311
312 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
313 quot = uart_get_divisor(port, baud);
314 ctr = quot & 0xffff;
9b9129e7 315
1da177e4
LT
316 /* Get the lock */
317 spin_lock_irqsave(&port->lock, flags);
318
319 /* Update the per-port timeout */
320 uart_update_timeout(port, new->c_cflag, baud);
321
322 /* Do our best to flush TX & RX, so we don't loose anything */
323 /* But we don't wait indefinitly ! */
324 j = 5000000; /* Maximum wait */
325 /* FIXME Can't receive chars since set_termios might be called at early
326 * boot for the console, all stuff is not yet ready to receive at that
327 * time and that just makes the kernel oops */
328 /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
9b9129e7 329 while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
1da177e4
LT
330 --j)
331 udelay(1);
332
333 if (!j)
334 printk( KERN_ERR "mpc52xx_uart.c: "
335 "Unable to flush RX & TX fifos in-time in set_termios."
9b9129e7 336 "Some chars may have been lost.\n" );
1da177e4
LT
337
338 /* Reset the TX & RX */
339 out_8(&psc->command,MPC52xx_PSC_RST_RX);
340 out_8(&psc->command,MPC52xx_PSC_RST_TX);
341
342 /* Send new mode settings */
343 out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
344 out_8(&psc->mode,mr1);
345 out_8(&psc->mode,mr2);
346 out_8(&psc->ctur,ctr >> 8);
347 out_8(&psc->ctlr,ctr & 0xff);
9b9129e7 348
1da177e4
LT
349 /* Reenable TX & RX */
350 out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
351 out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
352
353 /* We're all set, release the lock */
354 spin_unlock_irqrestore(&port->lock, flags);
355}
356
357static const char *
358mpc52xx_uart_type(struct uart_port *port)
359{
360 return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
361}
362
363static void
364mpc52xx_uart_release_port(struct uart_port *port)
365{
366 if (port->flags & UPF_IOREMAP) { /* remapped by us ? */
367 iounmap(port->membase);
368 port->membase = NULL;
369 }
370
b9272dfd 371 release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc));
1da177e4
LT
372}
373
374static int
375mpc52xx_uart_request_port(struct uart_port *port)
376{
be618f55
AL
377 int err;
378
1da177e4 379 if (port->flags & UPF_IOREMAP) /* Need to remap ? */
b9272dfd
GL
380 port->membase = ioremap(port->mapbase,
381 sizeof(struct mpc52xx_psc));
1da177e4
LT
382
383 if (!port->membase)
384 return -EINVAL;
385
b9272dfd 386 err = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc),
1da177e4 387 "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
be618f55
AL
388
389 if (err && (port->flags & UPF_IOREMAP)) {
390 iounmap(port->membase);
391 port->membase = NULL;
392 }
393
394 return err;
1da177e4
LT
395}
396
397static void
398mpc52xx_uart_config_port(struct uart_port *port, int flags)
399{
400 if ( (flags & UART_CONFIG_TYPE) &&
401 (mpc52xx_uart_request_port(port) == 0) )
402 port->type = PORT_MPC52xx;
403}
404
405static int
406mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
407{
408 if ( ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx )
409 return -EINVAL;
410
411 if ( (ser->irq != port->irq) ||
412 (ser->io_type != SERIAL_IO_MEM) ||
9b9129e7 413 (ser->baud_base != port->uartclk) ||
1da177e4
LT
414 (ser->iomem_base != (void*)port->mapbase) ||
415 (ser->hub6 != 0 ) )
416 return -EINVAL;
417
418 return 0;
419}
420
421
422static struct uart_ops mpc52xx_uart_ops = {
423 .tx_empty = mpc52xx_uart_tx_empty,
424 .set_mctrl = mpc52xx_uart_set_mctrl,
425 .get_mctrl = mpc52xx_uart_get_mctrl,
426 .stop_tx = mpc52xx_uart_stop_tx,
427 .start_tx = mpc52xx_uart_start_tx,
428 .send_xchar = mpc52xx_uart_send_xchar,
429 .stop_rx = mpc52xx_uart_stop_rx,
430 .enable_ms = mpc52xx_uart_enable_ms,
431 .break_ctl = mpc52xx_uart_break_ctl,
432 .startup = mpc52xx_uart_startup,
433 .shutdown = mpc52xx_uart_shutdown,
434 .set_termios = mpc52xx_uart_set_termios,
435/* .pm = mpc52xx_uart_pm, Not supported yet */
436/* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
437 .type = mpc52xx_uart_type,
438 .release_port = mpc52xx_uart_release_port,
439 .request_port = mpc52xx_uart_request_port,
440 .config_port = mpc52xx_uart_config_port,
441 .verify_port = mpc52xx_uart_verify_port
442};
443
9b9129e7 444
1da177e4
LT
445/* ======================================================================== */
446/* Interrupt handling */
447/* ======================================================================== */
9b9129e7 448
1da177e4 449static inline int
7d12e780 450mpc52xx_uart_int_rx_chars(struct uart_port *port)
1da177e4
LT
451{
452 struct tty_struct *tty = port->info->tty;
33f0f88f 453 unsigned char ch, flag;
1da177e4
LT
454 unsigned short status;
455
456 /* While we can read, do so ! */
457 while ( (status = in_be16(&PSC(port)->mpc52xx_psc_status)) &
458 MPC52xx_PSC_SR_RXRDY) {
459
1da177e4
LT
460 /* Get the char */
461 ch = in_8(&PSC(port)->mpc52xx_psc_buffer_8);
462
463 /* Handle sysreq char */
464#ifdef SUPPORT_SYSRQ
7d12e780 465 if (uart_handle_sysrq_char(port, ch)) {
1da177e4
LT
466 port->sysrq = 0;
467 continue;
468 }
469#endif
470
471 /* Store it */
33f0f88f
AC
472
473 flag = TTY_NORMAL;
1da177e4 474 port->icount.rx++;
9b9129e7 475
1da177e4
LT
476 if ( status & (MPC52xx_PSC_SR_PE |
477 MPC52xx_PSC_SR_FE |
33f0f88f 478 MPC52xx_PSC_SR_RB) ) {
9b9129e7 479
1da177e4 480 if (status & MPC52xx_PSC_SR_RB) {
33f0f88f 481 flag = TTY_BREAK;
1da177e4
LT
482 uart_handle_break(port);
483 } else if (status & MPC52xx_PSC_SR_PE)
33f0f88f 484 flag = TTY_PARITY;
1da177e4 485 else if (status & MPC52xx_PSC_SR_FE)
33f0f88f 486 flag = TTY_FRAME;
1da177e4
LT
487
488 /* Clear error condition */
489 out_8(&PSC(port)->command,MPC52xx_PSC_RST_ERR_STAT);
490
491 }
33f0f88f
AC
492 tty_insert_flip_char(tty, ch, flag);
493 if (status & MPC52xx_PSC_SR_OE) {
494 /*
495 * Overrun is special, since it's
496 * reported immediately, and doesn't
497 * affect the current character
498 */
499 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
500 }
1da177e4
LT
501 }
502
503 tty_flip_buffer_push(tty);
9b9129e7 504
1da177e4
LT
505 return in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_RXRDY;
506}
507
508static inline int
509mpc52xx_uart_int_tx_chars(struct uart_port *port)
510{
511 struct circ_buf *xmit = &port->info->xmit;
512
513 /* Process out of band chars */
514 if (port->x_char) {
515 out_8(&PSC(port)->mpc52xx_psc_buffer_8, port->x_char);
516 port->icount.tx++;
517 port->x_char = 0;
518 return 1;
519 }
520
521 /* Nothing to do ? */
522 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
b129a8cc 523 mpc52xx_uart_stop_tx(port);
1da177e4
LT
524 return 0;
525 }
526
527 /* Send chars */
528 while (in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXRDY) {
529 out_8(&PSC(port)->mpc52xx_psc_buffer_8, xmit->buf[xmit->tail]);
530 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
531 port->icount.tx++;
532 if (uart_circ_empty(xmit))
533 break;
534 }
535
536 /* Wake up */
537 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
538 uart_write_wakeup(port);
539
540 /* Maybe we're done after all */
541 if (uart_circ_empty(xmit)) {
b129a8cc 542 mpc52xx_uart_stop_tx(port);
1da177e4
LT
543 return 0;
544 }
545
546 return 1;
547}
548
9b9129e7 549static irqreturn_t
7d12e780 550mpc52xx_uart_int(int irq, void *dev_id)
1da177e4 551{
c7bec5ab 552 struct uart_port *port = dev_id;
1da177e4
LT
553 unsigned long pass = ISR_PASS_LIMIT;
554 unsigned int keepgoing;
555 unsigned short status;
9b9129e7 556
1da177e4 557 spin_lock(&port->lock);
9b9129e7 558
1da177e4
LT
559 /* While we have stuff to do, we continue */
560 do {
561 /* If we don't find anything to do, we stop */
9b9129e7
GL
562 keepgoing = 0;
563
1da177e4
LT
564 /* Read status */
565 status = in_be16(&PSC(port)->mpc52xx_psc_isr);
566 status &= port->read_status_mask;
9b9129e7 567
1da177e4
LT
568 /* Do we need to receive chars ? */
569 /* For this RX interrupts must be on and some chars waiting */
570 if ( status & MPC52xx_PSC_IMR_RXRDY )
7d12e780 571 keepgoing |= mpc52xx_uart_int_rx_chars(port);
1da177e4
LT
572
573 /* Do we need to send chars ? */
574 /* For this, TX must be ready and TX interrupt enabled */
575 if ( status & MPC52xx_PSC_IMR_TXRDY )
576 keepgoing |= mpc52xx_uart_int_tx_chars(port);
9b9129e7 577
1da177e4
LT
578 /* Limit number of iteration */
579 if ( !(--pass) )
580 keepgoing = 0;
581
582 } while (keepgoing);
9b9129e7 583
1da177e4 584 spin_unlock(&port->lock);
9b9129e7 585
1da177e4
LT
586 return IRQ_HANDLED;
587}
588
589
590/* ======================================================================== */
591/* Console ( if applicable ) */
592/* ======================================================================== */
593
594#ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
595
596static void __init
597mpc52xx_console_get_options(struct uart_port *port,
598 int *baud, int *parity, int *bits, int *flow)
599{
600 struct mpc52xx_psc __iomem *psc = PSC(port);
601 unsigned char mr1;
602
b9272dfd
GL
603 pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
604
1da177e4
LT
605 /* Read the mode registers */
606 out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
607 mr1 = in_8(&psc->mode);
9b9129e7 608
1da177e4 609 /* CT{U,L}R are write-only ! */
b9272dfd
GL
610 *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
611#if !defined(CONFIG_PPC_MERGE)
612 if (__res.bi_baudrate)
613 *baud = __res.bi_baudrate;
614#endif
1da177e4
LT
615
616 /* Parse them */
617 switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
618 case MPC52xx_PSC_MODE_5_BITS: *bits = 5; break;
619 case MPC52xx_PSC_MODE_6_BITS: *bits = 6; break;
620 case MPC52xx_PSC_MODE_7_BITS: *bits = 7; break;
621 case MPC52xx_PSC_MODE_8_BITS:
622 default: *bits = 8;
623 }
9b9129e7 624
1da177e4
LT
625 if (mr1 & MPC52xx_PSC_MODE_PARNONE)
626 *parity = 'n';
627 else
628 *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
629}
630
9b9129e7 631static void
1da177e4
LT
632mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
633{
634 struct uart_port *port = &mpc52xx_uart_ports[co->index];
635 struct mpc52xx_psc __iomem *psc = PSC(port);
636 unsigned int i, j;
9b9129e7 637
1da177e4
LT
638 /* Disable interrupts */
639 out_be16(&psc->mpc52xx_psc_imr, 0);
640
641 /* Wait the TX buffer to be empty */
9b9129e7
GL
642 j = 5000000; /* Maximum wait */
643 while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
1da177e4
LT
644 --j)
645 udelay(1);
646
647 /* Write all the chars */
d358788f 648 for (i = 0; i < count; i++, s++) {
1da177e4 649 /* Line return handling */
d358788f 650 if (*s == '\n')
1da177e4 651 out_8(&psc->mpc52xx_psc_buffer_8, '\r');
9b9129e7 652
d358788f
RK
653 /* Send the char */
654 out_8(&psc->mpc52xx_psc_buffer_8, *s);
655
1da177e4 656 /* Wait the TX buffer to be empty */
9b9129e7
GL
657 j = 20000; /* Maximum wait */
658 while (!(in_be16(&psc->mpc52xx_psc_status) &
1da177e4
LT
659 MPC52xx_PSC_SR_TXEMP) && --j)
660 udelay(1);
661 }
662
663 /* Restore interrupt state */
664 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
665}
666
b9272dfd 667#if !defined(CONFIG_PPC_MERGE)
1da177e4
LT
668static int __init
669mpc52xx_console_setup(struct console *co, char *options)
670{
671 struct uart_port *port = &mpc52xx_uart_ports[co->index];
672
673 int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
674 int bits = 8;
675 int parity = 'n';
676 int flow = 'n';
677
678 if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM)
679 return -EINVAL;
9b9129e7 680
1da177e4
LT
681 /* Basic port init. Needed since we use some uart_??? func before
682 * real init for early access */
683 spin_lock_init(&port->lock);
684 port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
685 port->ops = &mpc52xx_uart_ops;
686 port->mapbase = MPC52xx_PA(MPC52xx_PSCx_OFFSET(co->index+1));
687
688 /* We ioremap ourself */
689 port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE);
690 if (port->membase == NULL)
691 return -EINVAL;
692
693 /* Setup the port parameters accoding to options */
694 if (options)
695 uart_parse_options(options, &baud, &parity, &bits, &flow);
696 else
697 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
698
699 return uart_set_options(port, co, baud, parity, bits, flow);
700}
701
b9272dfd
GL
702#else
703
704static int __init
705mpc52xx_console_setup(struct console *co, char *options)
706{
707 struct uart_port *port = &mpc52xx_uart_ports[co->index];
708 struct device_node *np = mpc52xx_uart_nodes[co->index];
709 unsigned int ipb_freq;
710 struct resource res;
711 int ret;
712
713 int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
714 int bits = 8;
715 int parity = 'n';
716 int flow = 'n';
717
718 pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n",
719 co, co->index, options);
720
721 if ((co->index < 0) || (co->index > MPC52xx_PSC_MAXNUM)) {
722 pr_debug("PSC%x out of range\n", co->index);
723 return -EINVAL;
724 }
725
726 if (!np) {
727 pr_debug("PSC%x not found in device tree\n", co->index);
728 return -EINVAL;
729 }
730
731 pr_debug("Console on ttyPSC%x is %s\n",
732 co->index, mpc52xx_uart_nodes[co->index]->full_name);
733
734 /* Fetch register locations */
735 if ((ret = of_address_to_resource(np, 0, &res)) != 0) {
736 pr_debug("Could not get resources for PSC%x\n", co->index);
737 return ret;
738 }
739
740 /* Search for bus-frequency property in this node or a parent */
741 if ((ipb_freq = mpc52xx_find_ipb_freq(np)) == 0) {
742 pr_debug("Could not find IPB bus frequency!\n");
743 return -EINVAL;
744 }
745
746 /* Basic port init. Needed since we use some uart_??? func before
747 * real init for early access */
748 spin_lock_init(&port->lock);
749 port->uartclk = ipb_freq / 2;
750 port->ops = &mpc52xx_uart_ops;
751 port->mapbase = res.start;
752 port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
753 port->irq = irq_of_parse_and_map(np, 0);
754
755 if (port->membase == NULL)
756 return -EINVAL;
757
758 pr_debug("mpc52xx-psc uart at %lx, mapped to %p, irq=%x, freq=%i\n",
759 port->mapbase, port->membase, port->irq, port->uartclk);
760
761 /* Setup the port parameters accoding to options */
762 if (options)
763 uart_parse_options(options, &baud, &parity, &bits, &flow);
764 else
765 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
766
767 pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
768 baud, bits, parity, flow);
769
770 return uart_set_options(port, co, baud, parity, bits, flow);
771}
772#endif /* defined(CONFIG_PPC_MERGE) */
773
1da177e4 774
2d8179c0 775static struct uart_driver mpc52xx_uart_driver;
1da177e4
LT
776
777static struct console mpc52xx_console = {
d62de3aa 778 .name = "ttyPSC",
1da177e4
LT
779 .write = mpc52xx_console_write,
780 .device = uart_console_device,
781 .setup = mpc52xx_console_setup,
782 .flags = CON_PRINTBUFFER,
d62de3aa 783 .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0 ) */
1da177e4
LT
784 .data = &mpc52xx_uart_driver,
785};
786
9b9129e7
GL
787
788static int __init
1da177e4
LT
789mpc52xx_console_init(void)
790{
c98750c2 791#if defined(CONFIG_PPC_MERGE)
b9272dfd 792 mpc52xx_uart_of_enumerate();
c98750c2 793#endif
1da177e4
LT
794 register_console(&mpc52xx_console);
795 return 0;
796}
797
798console_initcall(mpc52xx_console_init);
799
800#define MPC52xx_PSC_CONSOLE &mpc52xx_console
801#else
802#define MPC52xx_PSC_CONSOLE NULL
803#endif
804
805
806/* ======================================================================== */
807/* UART Driver */
808/* ======================================================================== */
809
810static struct uart_driver mpc52xx_uart_driver = {
811 .owner = THIS_MODULE,
812 .driver_name = "mpc52xx_psc_uart",
d62de3aa 813 .dev_name = "ttyPSC",
d62de3aa
SM
814 .major = SERIAL_PSC_MAJOR,
815 .minor = SERIAL_PSC_MINOR,
1da177e4
LT
816 .nr = MPC52xx_PSC_MAXNUM,
817 .cons = MPC52xx_PSC_CONSOLE,
818};
819
820
b9272dfd 821#if !defined(CONFIG_PPC_MERGE)
1da177e4
LT
822/* ======================================================================== */
823/* Platform Driver */
824/* ======================================================================== */
825
826static int __devinit
3ae5eaec 827mpc52xx_uart_probe(struct platform_device *dev)
1da177e4 828{
3ae5eaec 829 struct resource *res = dev->resource;
1da177e4
LT
830
831 struct uart_port *port = NULL;
832 int i, idx, ret;
833
834 /* Check validity & presence */
38801e2e 835 idx = dev->id;
1da177e4
LT
836 if (idx < 0 || idx >= MPC52xx_PSC_MAXNUM)
837 return -EINVAL;
838
839 if (!mpc52xx_match_psc_function(idx,"uart"))
840 return -ENODEV;
841
842 /* Init the port structure */
843 port = &mpc52xx_uart_ports[idx];
844
1da177e4
LT
845 spin_lock_init(&port->lock);
846 port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
947deee8 847 port->fifosize = 512;
1da177e4
LT
848 port->iotype = UPIO_MEM;
849 port->flags = UPF_BOOT_AUTOCONF |
850 ( uart_console(port) ? 0 : UPF_IOREMAP );
851 port->line = idx;
852 port->ops = &mpc52xx_uart_ops;
b9272dfd 853 port->dev = &dev->dev;
1da177e4
LT
854
855 /* Search for IRQ and mapbase */
38801e2e 856 for (i=0 ; i<dev->num_resources ; i++, res++) {
1da177e4
LT
857 if (res->flags & IORESOURCE_MEM)
858 port->mapbase = res->start;
859 else if (res->flags & IORESOURCE_IRQ)
860 port->irq = res->start;
861 }
862 if (!port->irq || !port->mapbase)
863 return -EINVAL;
864
865 /* Add the port to the uart sub-system */
866 ret = uart_add_one_port(&mpc52xx_uart_driver, port);
867 if (!ret)
3ae5eaec 868 platform_set_drvdata(dev, (void*)port);
1da177e4
LT
869
870 return ret;
871}
872
873static int
3ae5eaec 874mpc52xx_uart_remove(struct platform_device *dev)
1da177e4 875{
3ae5eaec 876 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
1da177e4 877
3ae5eaec 878 platform_set_drvdata(dev, NULL);
1da177e4
LT
879
880 if (port)
881 uart_remove_one_port(&mpc52xx_uart_driver, port);
882
883 return 0;
884}
885
886#ifdef CONFIG_PM
887static int
3ae5eaec 888mpc52xx_uart_suspend(struct platform_device *dev, pm_message_t state)
1da177e4 889{
3ae5eaec 890 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
1da177e4 891
9b9129e7 892 if (port)
1da177e4
LT
893 uart_suspend_port(&mpc52xx_uart_driver, port);
894
895 return 0;
896}
897
898static int
3ae5eaec 899mpc52xx_uart_resume(struct platform_device *dev)
1da177e4 900{
3ae5eaec 901 struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
1da177e4 902
9480e307 903 if (port)
1da177e4
LT
904 uart_resume_port(&mpc52xx_uart_driver, port);
905
906 return 0;
907}
908#endif
909
b9272dfd 910
3ae5eaec 911static struct platform_driver mpc52xx_uart_platform_driver = {
1da177e4
LT
912 .probe = mpc52xx_uart_probe,
913 .remove = mpc52xx_uart_remove,
914#ifdef CONFIG_PM
915 .suspend = mpc52xx_uart_suspend,
916 .resume = mpc52xx_uart_resume,
917#endif
3ae5eaec
RK
918 .driver = {
919 .name = "mpc52xx-psc",
920 },
1da177e4 921};
b9272dfd
GL
922#endif /* !defined(CONFIG_PPC_MERGE) */
923
924
925#if defined(CONFIG_PPC_MERGE)
926/* ======================================================================== */
927/* OF Platform Driver */
928/* ======================================================================== */
929
930static int __devinit
931mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
932{
933 int idx = -1;
934 unsigned int ipb_freq;
935 struct uart_port *port = NULL;
936 struct resource res;
937 int ret;
938
939 dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match);
940
941 /* Check validity & presence */
942 for (idx = 0; idx < MPC52xx_PSC_MAXNUM; idx++)
943 if (mpc52xx_uart_nodes[idx] == op->node)
944 break;
945 if (idx >= MPC52xx_PSC_MAXNUM)
946 return -EINVAL;
947 pr_debug("Found %s assigned to ttyPSC%x\n",
948 mpc52xx_uart_nodes[idx]->full_name, idx);
949
950 /* Search for bus-frequency property in this node or a parent */
951 if ((ipb_freq = mpc52xx_find_ipb_freq(op->node)) == 0) {
952 dev_dbg(&op->dev, "Could not find IPB bus frequency!\n");
953 return -EINVAL;
954 }
955
956 /* Init the port structure */
957 port = &mpc52xx_uart_ports[idx];
958
959 spin_lock_init(&port->lock);
960 port->uartclk = ipb_freq / 2;
961 port->fifosize = 512;
962 port->iotype = UPIO_MEM;
963 port->flags = UPF_BOOT_AUTOCONF |
964 ( uart_console(port) ? 0 : UPF_IOREMAP );
965 port->line = idx;
966 port->ops = &mpc52xx_uart_ops;
967 port->dev = &op->dev;
968
969 /* Search for IRQ and mapbase */
970 if ((ret = of_address_to_resource(op->node, 0, &res)) != 0)
971 return ret;
972
973 port->mapbase = res.start;
974 port->irq = irq_of_parse_and_map(op->node, 0);
975
976 dev_dbg(&op->dev, "mpc52xx-psc uart at %lx, irq=%x, freq=%i\n",
977 port->mapbase, port->irq, port->uartclk);
978
979 if ((port->irq==NO_IRQ) || !port->mapbase) {
980 printk(KERN_ERR "Could not allocate resources for PSC\n");
981 return -EINVAL;
982 }
983
984 /* Add the port to the uart sub-system */
985 ret = uart_add_one_port(&mpc52xx_uart_driver, port);
986 if (!ret)
987 dev_set_drvdata(&op->dev, (void*)port);
988
989 return ret;
990}
991
992static int
993mpc52xx_uart_of_remove(struct of_device *op)
994{
995 struct uart_port *port = dev_get_drvdata(&op->dev);
996 dev_set_drvdata(&op->dev, NULL);
997
fc7900bb 998 if (port) {
b9272dfd 999 uart_remove_one_port(&mpc52xx_uart_driver, port);
fc7900bb
SM
1000 irq_dispose_mapping(port->irq);
1001 }
b9272dfd
GL
1002
1003 return 0;
1004}
1005
1006#ifdef CONFIG_PM
1007static int
1008mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state)
1009{
1010 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1011
1012 if (port)
1013 uart_suspend_port(&mpc52xx_uart_driver, port);
1014
1015 return 0;
1016}
1017
1018static int
1019mpc52xx_uart_of_resume(struct of_device *op)
1020{
1021 struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
1022
1023 if (port)
1024 uart_resume_port(&mpc52xx_uart_driver, port);
1025
1026 return 0;
1027}
1028#endif
1029
1030static void
1031mpc52xx_uart_of_assign(struct device_node *np, int idx)
1032{
1033 int free_idx = -1;
1034 int i;
1035
1036 /* Find the first free node */
1037 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1038 if (mpc52xx_uart_nodes[i] == NULL) {
1039 free_idx = i;
1040 break;
1041 }
1042 }
1043
1044 if ((idx < 0) || (idx >= MPC52xx_PSC_MAXNUM))
1045 idx = free_idx;
1046
1047 if (idx < 0)
1048 return; /* No free slot; abort */
1049
1050 /* If the slot is already occupied, then swap slots */
1051 if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
1052 mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
1053 mpc52xx_uart_nodes[i] = np;
1054}
1055
1056static void
1057mpc52xx_uart_of_enumerate(void)
1058{
1059 static int enum_done = 0;
1060 struct device_node *np;
1061 const unsigned int *devno;
1062 int i;
1063
1064 if (enum_done)
1065 return;
1066
1067 for_each_node_by_type(np, "serial") {
1068 if (!of_match_node(mpc52xx_uart_of_match, np))
1069 continue;
1070
1071 /* Is a particular device number requested? */
40cd3a45 1072 devno = of_get_property(np, "port-number", NULL);
b9272dfd
GL
1073 mpc52xx_uart_of_assign(of_node_get(np), devno ? *devno : -1);
1074 }
1075
1076 enum_done = 1;
1077
1078 for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
1079 if (mpc52xx_uart_nodes[i])
1080 pr_debug("%s assigned to ttyPSC%x\n",
1081 mpc52xx_uart_nodes[i]->full_name, i);
1082 }
1083}
1084
1085MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match);
1086
1087static struct of_platform_driver mpc52xx_uart_of_driver = {
1088 .owner = THIS_MODULE,
1089 .name = "mpc52xx-psc-uart",
1090 .match_table = mpc52xx_uart_of_match,
1091 .probe = mpc52xx_uart_of_probe,
1092 .remove = mpc52xx_uart_of_remove,
1093#ifdef CONFIG_PM
1094 .suspend = mpc52xx_uart_of_suspend,
1095 .resume = mpc52xx_uart_of_resume,
1096#endif
1097 .driver = {
1098 .name = "mpc52xx-psc-uart",
1099 },
1100};
1101#endif /* defined(CONFIG_PPC_MERGE) */
1da177e4
LT
1102
1103
1104/* ======================================================================== */
1105/* Module */
1106/* ======================================================================== */
1107
1108static int __init
1109mpc52xx_uart_init(void)
1110{
1111 int ret;
1112
b9272dfd 1113 printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n");
1da177e4 1114
b9272dfd
GL
1115 if ((ret = uart_register_driver(&mpc52xx_uart_driver)) != 0) {
1116 printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
1117 __FILE__, ret);
1118 return ret;
1da177e4
LT
1119 }
1120
b9272dfd
GL
1121#if defined(CONFIG_PPC_MERGE)
1122 mpc52xx_uart_of_enumerate();
1123
1124 ret = of_register_platform_driver(&mpc52xx_uart_of_driver);
1125 if (ret) {
1126 printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n",
1127 __FILE__, ret);
1128 uart_unregister_driver(&mpc52xx_uart_driver);
1129 return ret;
1130 }
1131#else
1132 ret = platform_driver_register(&mpc52xx_uart_platform_driver);
1133 if (ret) {
1134 printk(KERN_ERR "%s: platform_driver_register failed (%i)\n",
1135 __FILE__, ret);
1136 uart_unregister_driver(&mpc52xx_uart_driver);
1137 return ret;
1138 }
1139#endif
1140
1141 return 0;
1da177e4
LT
1142}
1143
1144static void __exit
1145mpc52xx_uart_exit(void)
1146{
b9272dfd
GL
1147#if defined(CONFIG_PPC_MERGE)
1148 of_unregister_platform_driver(&mpc52xx_uart_of_driver);
1149#else
3ae5eaec 1150 platform_driver_unregister(&mpc52xx_uart_platform_driver);
b9272dfd 1151#endif
1da177e4
LT
1152 uart_unregister_driver(&mpc52xx_uart_driver);
1153}
1154
1155
1156module_init(mpc52xx_uart_init);
1157module_exit(mpc52xx_uart_exit);
1158
1159MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
1160MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
1161MODULE_LICENSE("GPL");