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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs. |
3 | * | |
4 | * FIXME According to the usermanual the status bits in the status register | |
5 | * are only updated when the peripherals access the FIFO and not when the | |
6 | * CPU access them. So since we use this bits to know when we stop writing | |
7 | * and reading, they may not be updated in-time and a race condition may | |
8 | * exists. But I haven't be able to prove this and I don't care. But if | |
9 | * any problem arises, it might worth checking. The TX/RX FIFO Stats | |
10 | * registers should be used in addition. | |
11 | * Update: Actually, they seem updated ... At least the bits we use. | |
12 | * | |
13 | * | |
14 | * Maintainer : Sylvain Munaut <tnt@246tNt.com> | |
9b9129e7 | 15 | * |
1da177e4 LT |
16 | * Some of the code has been inspired/copied from the 2.4 code written |
17 | * by Dale Farnsworth <dfarnsworth@mvista.com>. | |
9b9129e7 | 18 | * |
b9272dfd GL |
19 | * Copyright (C) 2006 Secret Lab Technologies Ltd. |
20 | * Grant Likely <grant.likely@secretlab.ca> | |
21 | * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com> | |
1da177e4 | 22 | * Copyright (C) 2003 MontaVista, Software, Inc. |
9b9129e7 | 23 | * |
1da177e4 LT |
24 | * This file is licensed under the terms of the GNU General Public License |
25 | * version 2. This program is licensed "as is" without any warranty of any | |
26 | * kind, whether express or implied. | |
27 | */ | |
9b9129e7 | 28 | |
1da177e4 LT |
29 | /* Platform device Usage : |
30 | * | |
31 | * Since PSCs can have multiple function, the correct driver for each one | |
32 | * is selected by calling mpc52xx_match_psc_function(...). The function | |
33 | * handled by this driver is "uart". | |
34 | * | |
35 | * The driver init all necessary registers to place the PSC in uart mode without | |
36 | * DCD. However, the pin multiplexing aren't changed and should be set either | |
37 | * by the bootloader or in the platform init code. | |
38 | * | |
406b7d4f | 39 | * The idx field must be equal to the PSC index (e.g. 0 for PSC1, 1 for PSC2, |
d62de3aa SM |
40 | * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and |
41 | * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly | |
42 | * fpr the console code : without this 1:1 mapping, at early boot time, when we | |
c30fe7f7 | 43 | * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it |
d62de3aa | 44 | * will be mapped to. |
1da177e4 LT |
45 | */ |
46 | ||
b9272dfd GL |
47 | /* OF Platform device Usage : |
48 | * | |
49 | * This driver is only used for PSCs configured in uart mode. The device | |
50 | * tree will have a node for each PSC in uart mode w/ device_type = "serial" | |
51 | * and "mpc52xx-psc-uart" in the compatible string | |
52 | * | |
53 | * By default, PSC devices are enumerated in the order they are found. However | |
54 | * a particular PSC number can be forces by adding 'device_no = <port#>' | |
55 | * to the device node. | |
56 | * | |
57 | * The driver init all necessary registers to place the PSC in uart mode without | |
58 | * DCD. However, the pin multiplexing aren't changed and should be set either | |
59 | * by the bootloader or in the platform init code. | |
60 | */ | |
61 | ||
62 | #undef DEBUG | |
63 | ||
64 | #include <linux/device.h> | |
1da177e4 LT |
65 | #include <linux/module.h> |
66 | #include <linux/tty.h> | |
67 | #include <linux/serial.h> | |
68 | #include <linux/sysrq.h> | |
69 | #include <linux/console.h> | |
406b7d4f JR |
70 | #include <linux/delay.h> |
71 | #include <linux/io.h> | |
1da177e4 | 72 | |
b9272dfd | 73 | #if defined(CONFIG_PPC_MERGE) |
283029d1 GL |
74 | #include <linux/of.h> |
75 | #include <linux/of_platform.h> | |
b9272dfd GL |
76 | #else |
77 | #include <linux/platform_device.h> | |
78 | #endif | |
79 | ||
1da177e4 LT |
80 | #include <asm/mpc52xx.h> |
81 | #include <asm/mpc52xx_psc.h> | |
82 | ||
83 | #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | |
84 | #define SUPPORT_SYSRQ | |
85 | #endif | |
86 | ||
87 | #include <linux/serial_core.h> | |
88 | ||
89 | ||
d62de3aa SM |
90 | /* We've been assigned a range on the "Low-density serial ports" major */ |
91 | #define SERIAL_PSC_MAJOR 204 | |
92 | #define SERIAL_PSC_MINOR 148 | |
93 | ||
1da177e4 LT |
94 | |
95 | #define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */ | |
96 | ||
97 | ||
98 | static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM]; | |
99 | /* Rem: - We use the read_status_mask as a shadow of | |
100 | * psc->mpc52xx_psc_imr | |
101 | * - It's important that is array is all zero on start as we | |
102 | * use it to know if it's initialized or not ! If it's not sure | |
103 | * it's cleared, then a memset(...,0,...) should be added to | |
104 | * the console_init | |
105 | */ | |
b9272dfd GL |
106 | #if defined(CONFIG_PPC_MERGE) |
107 | /* lookup table for matching device nodes to index numbers */ | |
108 | static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM]; | |
109 | ||
110 | static void mpc52xx_uart_of_enumerate(void); | |
111 | #endif | |
1da177e4 | 112 | |
599f030c | 113 | |
1da177e4 LT |
114 | #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase)) |
115 | ||
116 | ||
117 | /* Forward declaration of the interruption handling routine */ | |
406b7d4f | 118 | static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id); |
1da177e4 LT |
119 | |
120 | ||
121 | /* Simple macro to test if a port is console or not. This one is taken | |
122 | * for serial_core.c and maybe should be moved to serial_core.h ? */ | |
123 | #ifdef CONFIG_SERIAL_CORE_CONSOLE | |
406b7d4f JR |
124 | #define uart_console(port) \ |
125 | ((port)->cons && (port)->cons->index == (port)->line) | |
1da177e4 LT |
126 | #else |
127 | #define uart_console(port) (0) | |
128 | #endif | |
129 | ||
b9272dfd GL |
130 | #if defined(CONFIG_PPC_MERGE) |
131 | static struct of_device_id mpc52xx_uart_of_match[] = { | |
66ffbe49 GL |
132 | { .type = "serial", .compatible = "fsl,mpc5200-psc-uart", }, |
133 | { .type = "serial", .compatible = "mpc5200-psc-uart", }, /* lite5200 */ | |
134 | { .type = "serial", .compatible = "mpc5200-serial", }, /* efika */ | |
b9272dfd GL |
135 | {}, |
136 | }; | |
137 | #endif | |
138 | ||
599f030c JR |
139 | /* ======================================================================== */ |
140 | /* PSC fifo operations for isolating differences between 52xx and 512x */ | |
141 | /* ======================================================================== */ | |
142 | ||
143 | struct psc_ops { | |
144 | void (*fifo_init)(struct uart_port *port); | |
145 | int (*raw_rx_rdy)(struct uart_port *port); | |
146 | int (*raw_tx_rdy)(struct uart_port *port); | |
147 | int (*rx_rdy)(struct uart_port *port); | |
148 | int (*tx_rdy)(struct uart_port *port); | |
149 | int (*tx_empty)(struct uart_port *port); | |
150 | void (*stop_rx)(struct uart_port *port); | |
151 | void (*start_tx)(struct uart_port *port); | |
152 | void (*stop_tx)(struct uart_port *port); | |
153 | void (*rx_clr_irq)(struct uart_port *port); | |
154 | void (*tx_clr_irq)(struct uart_port *port); | |
155 | void (*write_char)(struct uart_port *port, unsigned char c); | |
156 | unsigned char (*read_char)(struct uart_port *port); | |
157 | void (*cw_disable_ints)(struct uart_port *port); | |
158 | void (*cw_restore_ints)(struct uart_port *port); | |
159 | unsigned long (*getuartclk)(void *p); | |
160 | }; | |
161 | ||
162 | #define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1)) | |
163 | static void mpc52xx_psc_fifo_init(struct uart_port *port) | |
164 | { | |
165 | struct mpc52xx_psc __iomem *psc = PSC(port); | |
166 | struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port); | |
167 | ||
168 | /* /32 prescaler */ | |
169 | out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); | |
170 | ||
171 | out_8(&fifo->rfcntl, 0x00); | |
172 | out_be16(&fifo->rfalarm, 0x1ff); | |
173 | out_8(&fifo->tfcntl, 0x07); | |
174 | out_be16(&fifo->tfalarm, 0x80); | |
175 | ||
176 | port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY; | |
177 | out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask); | |
178 | } | |
179 | ||
180 | static int mpc52xx_psc_raw_rx_rdy(struct uart_port *port) | |
181 | { | |
182 | return in_be16(&PSC(port)->mpc52xx_psc_status) | |
183 | & MPC52xx_PSC_SR_RXRDY; | |
184 | } | |
185 | ||
186 | static int mpc52xx_psc_raw_tx_rdy(struct uart_port *port) | |
187 | { | |
188 | return in_be16(&PSC(port)->mpc52xx_psc_status) | |
189 | & MPC52xx_PSC_SR_TXRDY; | |
190 | } | |
191 | ||
192 | ||
193 | static int mpc52xx_psc_rx_rdy(struct uart_port *port) | |
194 | { | |
195 | return in_be16(&PSC(port)->mpc52xx_psc_isr) | |
196 | & port->read_status_mask | |
197 | & MPC52xx_PSC_IMR_RXRDY; | |
198 | } | |
199 | ||
200 | static int mpc52xx_psc_tx_rdy(struct uart_port *port) | |
201 | { | |
202 | return in_be16(&PSC(port)->mpc52xx_psc_isr) | |
203 | & port->read_status_mask | |
204 | & MPC52xx_PSC_IMR_TXRDY; | |
205 | } | |
206 | ||
207 | static int mpc52xx_psc_tx_empty(struct uart_port *port) | |
208 | { | |
209 | return in_be16(&PSC(port)->mpc52xx_psc_status) | |
210 | & MPC52xx_PSC_SR_TXEMP; | |
211 | } | |
212 | ||
213 | static void mpc52xx_psc_start_tx(struct uart_port *port) | |
214 | { | |
215 | port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY; | |
216 | out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask); | |
217 | } | |
218 | ||
219 | static void mpc52xx_psc_stop_tx(struct uart_port *port) | |
220 | { | |
221 | port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY; | |
222 | out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask); | |
223 | } | |
224 | ||
225 | static void mpc52xx_psc_stop_rx(struct uart_port *port) | |
226 | { | |
227 | port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY; | |
228 | out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask); | |
229 | } | |
230 | ||
231 | static void mpc52xx_psc_rx_clr_irq(struct uart_port *port) | |
232 | { | |
233 | } | |
234 | ||
235 | static void mpc52xx_psc_tx_clr_irq(struct uart_port *port) | |
236 | { | |
237 | } | |
238 | ||
239 | static void mpc52xx_psc_write_char(struct uart_port *port, unsigned char c) | |
240 | { | |
241 | out_8(&PSC(port)->mpc52xx_psc_buffer_8, c); | |
242 | } | |
243 | ||
244 | static unsigned char mpc52xx_psc_read_char(struct uart_port *port) | |
245 | { | |
246 | return in_8(&PSC(port)->mpc52xx_psc_buffer_8); | |
247 | } | |
248 | ||
249 | static void mpc52xx_psc_cw_disable_ints(struct uart_port *port) | |
250 | { | |
251 | out_be16(&PSC(port)->mpc52xx_psc_imr, 0); | |
252 | } | |
253 | ||
254 | static void mpc52xx_psc_cw_restore_ints(struct uart_port *port) | |
255 | { | |
256 | out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask); | |
257 | } | |
258 | ||
259 | /* Search for bus-frequency property in this node or a parent */ | |
260 | static unsigned long mpc52xx_getuartclk(void *p) | |
261 | { | |
262 | #if defined(CONFIG_PPC_MERGE) | |
263 | /* | |
264 | * 5200 UARTs have a / 32 prescaler | |
265 | * but the generic serial code assumes 16 | |
266 | * so return ipb freq / 2 | |
267 | */ | |
268 | return mpc52xx_find_ipb_freq(p) / 2; | |
269 | #else | |
270 | pr_debug("unexpected call to mpc52xx_getuartclk with arch/ppc\n"); | |
271 | return NULL; | |
272 | #endif | |
273 | } | |
274 | ||
275 | static struct psc_ops mpc52xx_psc_ops = { | |
276 | .fifo_init = mpc52xx_psc_fifo_init, | |
277 | .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy, | |
278 | .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy, | |
279 | .rx_rdy = mpc52xx_psc_rx_rdy, | |
280 | .tx_rdy = mpc52xx_psc_tx_rdy, | |
281 | .tx_empty = mpc52xx_psc_tx_empty, | |
282 | .stop_rx = mpc52xx_psc_stop_rx, | |
283 | .start_tx = mpc52xx_psc_start_tx, | |
284 | .stop_tx = mpc52xx_psc_stop_tx, | |
285 | .rx_clr_irq = mpc52xx_psc_rx_clr_irq, | |
286 | .tx_clr_irq = mpc52xx_psc_tx_clr_irq, | |
287 | .write_char = mpc52xx_psc_write_char, | |
288 | .read_char = mpc52xx_psc_read_char, | |
289 | .cw_disable_ints = mpc52xx_psc_cw_disable_ints, | |
290 | .cw_restore_ints = mpc52xx_psc_cw_restore_ints, | |
291 | .getuartclk = mpc52xx_getuartclk, | |
292 | }; | |
293 | ||
294 | static struct psc_ops *psc_ops = &mpc52xx_psc_ops; | |
1da177e4 LT |
295 | |
296 | /* ======================================================================== */ | |
297 | /* UART operations */ | |
298 | /* ======================================================================== */ | |
299 | ||
9b9129e7 | 300 | static unsigned int |
1da177e4 LT |
301 | mpc52xx_uart_tx_empty(struct uart_port *port) |
302 | { | |
599f030c | 303 | return psc_ops->tx_empty(port) ? TIOCSER_TEMT : 0; |
1da177e4 LT |
304 | } |
305 | ||
9b9129e7 | 306 | static void |
1da177e4 LT |
307 | mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) |
308 | { | |
309 | /* Not implemented */ | |
310 | } | |
311 | ||
9b9129e7 | 312 | static unsigned int |
1da177e4 LT |
313 | mpc52xx_uart_get_mctrl(struct uart_port *port) |
314 | { | |
315 | /* Not implemented */ | |
316 | return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; | |
317 | } | |
318 | ||
9b9129e7 | 319 | static void |
b129a8cc | 320 | mpc52xx_uart_stop_tx(struct uart_port *port) |
1da177e4 LT |
321 | { |
322 | /* port->lock taken by caller */ | |
599f030c | 323 | psc_ops->stop_tx(port); |
1da177e4 LT |
324 | } |
325 | ||
9b9129e7 | 326 | static void |
b129a8cc | 327 | mpc52xx_uart_start_tx(struct uart_port *port) |
1da177e4 LT |
328 | { |
329 | /* port->lock taken by caller */ | |
599f030c | 330 | psc_ops->start_tx(port); |
1da177e4 LT |
331 | } |
332 | ||
9b9129e7 | 333 | static void |
1da177e4 LT |
334 | mpc52xx_uart_send_xchar(struct uart_port *port, char ch) |
335 | { | |
336 | unsigned long flags; | |
337 | spin_lock_irqsave(&port->lock, flags); | |
9b9129e7 | 338 | |
1da177e4 LT |
339 | port->x_char = ch; |
340 | if (ch) { | |
341 | /* Make sure tx interrupts are on */ | |
342 | /* Truly necessary ??? They should be anyway */ | |
599f030c | 343 | psc_ops->start_tx(port); |
1da177e4 | 344 | } |
9b9129e7 | 345 | |
1da177e4 LT |
346 | spin_unlock_irqrestore(&port->lock, flags); |
347 | } | |
348 | ||
349 | static void | |
350 | mpc52xx_uart_stop_rx(struct uart_port *port) | |
351 | { | |
352 | /* port->lock taken by caller */ | |
599f030c | 353 | psc_ops->stop_rx(port); |
1da177e4 LT |
354 | } |
355 | ||
356 | static void | |
357 | mpc52xx_uart_enable_ms(struct uart_port *port) | |
358 | { | |
359 | /* Not implemented */ | |
360 | } | |
361 | ||
362 | static void | |
363 | mpc52xx_uart_break_ctl(struct uart_port *port, int ctl) | |
364 | { | |
365 | unsigned long flags; | |
366 | spin_lock_irqsave(&port->lock, flags); | |
367 | ||
406b7d4f JR |
368 | if (ctl == -1) |
369 | out_8(&PSC(port)->command, MPC52xx_PSC_START_BRK); | |
1da177e4 | 370 | else |
406b7d4f | 371 | out_8(&PSC(port)->command, MPC52xx_PSC_STOP_BRK); |
9b9129e7 | 372 | |
1da177e4 LT |
373 | spin_unlock_irqrestore(&port->lock, flags); |
374 | } | |
375 | ||
376 | static int | |
377 | mpc52xx_uart_startup(struct uart_port *port) | |
378 | { | |
379 | struct mpc52xx_psc __iomem *psc = PSC(port); | |
380 | int ret; | |
381 | ||
382 | /* Request IRQ */ | |
383 | ret = request_irq(port->irq, mpc52xx_uart_int, | |
40663cc7 | 384 | IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "mpc52xx_psc_uart", port); |
1da177e4 LT |
385 | if (ret) |
386 | return ret; | |
387 | ||
388 | /* Reset/activate the port, clear and enable interrupts */ | |
406b7d4f JR |
389 | out_8(&psc->command, MPC52xx_PSC_RST_RX); |
390 | out_8(&psc->command, MPC52xx_PSC_RST_TX); | |
9b9129e7 | 391 | |
406b7d4f | 392 | out_be32(&psc->sicr, 0); /* UART mode DCD ignored */ |
1da177e4 | 393 | |
599f030c | 394 | psc_ops->fifo_init(port); |
9b9129e7 | 395 | |
406b7d4f JR |
396 | out_8(&psc->command, MPC52xx_PSC_TX_ENABLE); |
397 | out_8(&psc->command, MPC52xx_PSC_RX_ENABLE); | |
9b9129e7 | 398 | |
1da177e4 LT |
399 | return 0; |
400 | } | |
401 | ||
402 | static void | |
403 | mpc52xx_uart_shutdown(struct uart_port *port) | |
404 | { | |
405 | struct mpc52xx_psc __iomem *psc = PSC(port); | |
9b9129e7 | 406 | |
a3481197 | 407 | /* Shut down the port. Leave TX active if on a console port */ |
406b7d4f | 408 | out_8(&psc->command, MPC52xx_PSC_RST_RX); |
a3481197 | 409 | if (!uart_console(port)) |
406b7d4f | 410 | out_8(&psc->command, MPC52xx_PSC_RST_TX); |
9b9129e7 GL |
411 | |
412 | port->read_status_mask = 0; | |
406b7d4f | 413 | out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask); |
1da177e4 LT |
414 | |
415 | /* Release interrupt */ | |
416 | free_irq(port->irq, port); | |
417 | } | |
418 | ||
9b9129e7 | 419 | static void |
606d099c | 420 | mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new, |
406b7d4f | 421 | struct ktermios *old) |
1da177e4 LT |
422 | { |
423 | struct mpc52xx_psc __iomem *psc = PSC(port); | |
424 | unsigned long flags; | |
425 | unsigned char mr1, mr2; | |
426 | unsigned short ctr; | |
427 | unsigned int j, baud, quot; | |
9b9129e7 | 428 | |
1da177e4 LT |
429 | /* Prepare what we're gonna write */ |
430 | mr1 = 0; | |
9b9129e7 | 431 | |
1da177e4 | 432 | switch (new->c_cflag & CSIZE) { |
406b7d4f JR |
433 | case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS; |
434 | break; | |
435 | case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS; | |
436 | break; | |
437 | case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS; | |
438 | break; | |
439 | case CS8: | |
440 | default: mr1 |= MPC52xx_PSC_MODE_8_BITS; | |
1da177e4 LT |
441 | } |
442 | ||
443 | if (new->c_cflag & PARENB) { | |
444 | mr1 |= (new->c_cflag & PARODD) ? | |
445 | MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN; | |
446 | } else | |
447 | mr1 |= MPC52xx_PSC_MODE_PARNONE; | |
9b9129e7 GL |
448 | |
449 | ||
1da177e4 LT |
450 | mr2 = 0; |
451 | ||
452 | if (new->c_cflag & CSTOPB) | |
453 | mr2 |= MPC52xx_PSC_MODE_TWO_STOP; | |
454 | else | |
455 | mr2 |= ((new->c_cflag & CSIZE) == CS5) ? | |
456 | MPC52xx_PSC_MODE_ONE_STOP_5_BITS : | |
457 | MPC52xx_PSC_MODE_ONE_STOP; | |
458 | ||
459 | ||
460 | baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16); | |
461 | quot = uart_get_divisor(port, baud); | |
462 | ctr = quot & 0xffff; | |
9b9129e7 | 463 | |
1da177e4 LT |
464 | /* Get the lock */ |
465 | spin_lock_irqsave(&port->lock, flags); | |
466 | ||
467 | /* Update the per-port timeout */ | |
468 | uart_update_timeout(port, new->c_cflag, baud); | |
469 | ||
470 | /* Do our best to flush TX & RX, so we don't loose anything */ | |
471 | /* But we don't wait indefinitly ! */ | |
472 | j = 5000000; /* Maximum wait */ | |
473 | /* FIXME Can't receive chars since set_termios might be called at early | |
474 | * boot for the console, all stuff is not yet ready to receive at that | |
475 | * time and that just makes the kernel oops */ | |
476 | /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */ | |
599f030c | 477 | while (!mpc52xx_uart_tx_empty(port) && --j) |
1da177e4 LT |
478 | udelay(1); |
479 | ||
480 | if (!j) | |
406b7d4f | 481 | printk(KERN_ERR "mpc52xx_uart.c: " |
1da177e4 | 482 | "Unable to flush RX & TX fifos in-time in set_termios." |
406b7d4f | 483 | "Some chars may have been lost.\n"); |
1da177e4 LT |
484 | |
485 | /* Reset the TX & RX */ | |
406b7d4f JR |
486 | out_8(&psc->command, MPC52xx_PSC_RST_RX); |
487 | out_8(&psc->command, MPC52xx_PSC_RST_TX); | |
1da177e4 LT |
488 | |
489 | /* Send new mode settings */ | |
406b7d4f JR |
490 | out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1); |
491 | out_8(&psc->mode, mr1); | |
492 | out_8(&psc->mode, mr2); | |
493 | out_8(&psc->ctur, ctr >> 8); | |
494 | out_8(&psc->ctlr, ctr & 0xff); | |
9b9129e7 | 495 | |
1da177e4 | 496 | /* Reenable TX & RX */ |
406b7d4f JR |
497 | out_8(&psc->command, MPC52xx_PSC_TX_ENABLE); |
498 | out_8(&psc->command, MPC52xx_PSC_RX_ENABLE); | |
1da177e4 LT |
499 | |
500 | /* We're all set, release the lock */ | |
501 | spin_unlock_irqrestore(&port->lock, flags); | |
502 | } | |
503 | ||
504 | static const char * | |
505 | mpc52xx_uart_type(struct uart_port *port) | |
506 | { | |
507 | return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL; | |
508 | } | |
509 | ||
510 | static void | |
511 | mpc52xx_uart_release_port(struct uart_port *port) | |
512 | { | |
406b7d4f JR |
513 | /* remapped by us ? */ |
514 | if (port->flags & UPF_IOREMAP) { | |
1da177e4 LT |
515 | iounmap(port->membase); |
516 | port->membase = NULL; | |
517 | } | |
518 | ||
b9272dfd | 519 | release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc)); |
1da177e4 LT |
520 | } |
521 | ||
522 | static int | |
523 | mpc52xx_uart_request_port(struct uart_port *port) | |
524 | { | |
be618f55 AL |
525 | int err; |
526 | ||
1da177e4 | 527 | if (port->flags & UPF_IOREMAP) /* Need to remap ? */ |
b9272dfd | 528 | port->membase = ioremap(port->mapbase, |
406b7d4f | 529 | sizeof(struct mpc52xx_psc)); |
1da177e4 LT |
530 | |
531 | if (!port->membase) | |
532 | return -EINVAL; | |
533 | ||
b9272dfd | 534 | err = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc), |
1da177e4 | 535 | "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY; |
be618f55 AL |
536 | |
537 | if (err && (port->flags & UPF_IOREMAP)) { | |
538 | iounmap(port->membase); | |
539 | port->membase = NULL; | |
540 | } | |
541 | ||
542 | return err; | |
1da177e4 LT |
543 | } |
544 | ||
545 | static void | |
546 | mpc52xx_uart_config_port(struct uart_port *port, int flags) | |
547 | { | |
406b7d4f JR |
548 | if ((flags & UART_CONFIG_TYPE) |
549 | && (mpc52xx_uart_request_port(port) == 0)) | |
550 | port->type = PORT_MPC52xx; | |
1da177e4 LT |
551 | } |
552 | ||
553 | static int | |
554 | mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser) | |
555 | { | |
406b7d4f | 556 | if (ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx) |
1da177e4 LT |
557 | return -EINVAL; |
558 | ||
406b7d4f JR |
559 | if ((ser->irq != port->irq) || |
560 | (ser->io_type != SERIAL_IO_MEM) || | |
561 | (ser->baud_base != port->uartclk) || | |
562 | (ser->iomem_base != (void *)port->mapbase) || | |
563 | (ser->hub6 != 0)) | |
1da177e4 LT |
564 | return -EINVAL; |
565 | ||
566 | return 0; | |
567 | } | |
568 | ||
569 | ||
570 | static struct uart_ops mpc52xx_uart_ops = { | |
571 | .tx_empty = mpc52xx_uart_tx_empty, | |
572 | .set_mctrl = mpc52xx_uart_set_mctrl, | |
573 | .get_mctrl = mpc52xx_uart_get_mctrl, | |
574 | .stop_tx = mpc52xx_uart_stop_tx, | |
575 | .start_tx = mpc52xx_uart_start_tx, | |
576 | .send_xchar = mpc52xx_uart_send_xchar, | |
577 | .stop_rx = mpc52xx_uart_stop_rx, | |
578 | .enable_ms = mpc52xx_uart_enable_ms, | |
579 | .break_ctl = mpc52xx_uart_break_ctl, | |
580 | .startup = mpc52xx_uart_startup, | |
581 | .shutdown = mpc52xx_uart_shutdown, | |
582 | .set_termios = mpc52xx_uart_set_termios, | |
583 | /* .pm = mpc52xx_uart_pm, Not supported yet */ | |
584 | /* .set_wake = mpc52xx_uart_set_wake, Not supported yet */ | |
585 | .type = mpc52xx_uart_type, | |
586 | .release_port = mpc52xx_uart_release_port, | |
587 | .request_port = mpc52xx_uart_request_port, | |
588 | .config_port = mpc52xx_uart_config_port, | |
589 | .verify_port = mpc52xx_uart_verify_port | |
590 | }; | |
591 | ||
9b9129e7 | 592 | |
1da177e4 LT |
593 | /* ======================================================================== */ |
594 | /* Interrupt handling */ | |
595 | /* ======================================================================== */ | |
9b9129e7 | 596 | |
1da177e4 | 597 | static inline int |
7d12e780 | 598 | mpc52xx_uart_int_rx_chars(struct uart_port *port) |
1da177e4 LT |
599 | { |
600 | struct tty_struct *tty = port->info->tty; | |
33f0f88f | 601 | unsigned char ch, flag; |
1da177e4 LT |
602 | unsigned short status; |
603 | ||
604 | /* While we can read, do so ! */ | |
599f030c | 605 | while (psc_ops->raw_rx_rdy(port)) { |
1da177e4 | 606 | /* Get the char */ |
599f030c | 607 | ch = psc_ops->read_char(port); |
1da177e4 LT |
608 | |
609 | /* Handle sysreq char */ | |
610 | #ifdef SUPPORT_SYSRQ | |
7d12e780 | 611 | if (uart_handle_sysrq_char(port, ch)) { |
1da177e4 LT |
612 | port->sysrq = 0; |
613 | continue; | |
614 | } | |
615 | #endif | |
616 | ||
617 | /* Store it */ | |
33f0f88f AC |
618 | |
619 | flag = TTY_NORMAL; | |
1da177e4 | 620 | port->icount.rx++; |
9b9129e7 | 621 | |
599f030c JR |
622 | status = in_be16(&PSC(port)->mpc52xx_psc_status); |
623 | ||
406b7d4f JR |
624 | if (status & (MPC52xx_PSC_SR_PE | |
625 | MPC52xx_PSC_SR_FE | | |
626 | MPC52xx_PSC_SR_RB)) { | |
9b9129e7 | 627 | |
1da177e4 | 628 | if (status & MPC52xx_PSC_SR_RB) { |
33f0f88f | 629 | flag = TTY_BREAK; |
1da177e4 LT |
630 | uart_handle_break(port); |
631 | } else if (status & MPC52xx_PSC_SR_PE) | |
33f0f88f | 632 | flag = TTY_PARITY; |
1da177e4 | 633 | else if (status & MPC52xx_PSC_SR_FE) |
33f0f88f | 634 | flag = TTY_FRAME; |
1da177e4 LT |
635 | |
636 | /* Clear error condition */ | |
406b7d4f | 637 | out_8(&PSC(port)->command, MPC52xx_PSC_RST_ERR_STAT); |
1da177e4 LT |
638 | |
639 | } | |
33f0f88f AC |
640 | tty_insert_flip_char(tty, ch, flag); |
641 | if (status & MPC52xx_PSC_SR_OE) { | |
642 | /* | |
643 | * Overrun is special, since it's | |
644 | * reported immediately, and doesn't | |
645 | * affect the current character | |
646 | */ | |
647 | tty_insert_flip_char(tty, 0, TTY_OVERRUN); | |
648 | } | |
1da177e4 LT |
649 | } |
650 | ||
651 | tty_flip_buffer_push(tty); | |
9b9129e7 | 652 | |
599f030c | 653 | return psc_ops->raw_rx_rdy(port); |
1da177e4 LT |
654 | } |
655 | ||
656 | static inline int | |
657 | mpc52xx_uart_int_tx_chars(struct uart_port *port) | |
658 | { | |
659 | struct circ_buf *xmit = &port->info->xmit; | |
660 | ||
661 | /* Process out of band chars */ | |
662 | if (port->x_char) { | |
599f030c | 663 | psc_ops->write_char(port, port->x_char); |
1da177e4 LT |
664 | port->icount.tx++; |
665 | port->x_char = 0; | |
666 | return 1; | |
667 | } | |
668 | ||
669 | /* Nothing to do ? */ | |
670 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | |
b129a8cc | 671 | mpc52xx_uart_stop_tx(port); |
1da177e4 LT |
672 | return 0; |
673 | } | |
674 | ||
675 | /* Send chars */ | |
599f030c JR |
676 | while (psc_ops->raw_tx_rdy(port)) { |
677 | psc_ops->write_char(port, xmit->buf[xmit->tail]); | |
1da177e4 LT |
678 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
679 | port->icount.tx++; | |
680 | if (uart_circ_empty(xmit)) | |
681 | break; | |
682 | } | |
683 | ||
684 | /* Wake up */ | |
685 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
686 | uart_write_wakeup(port); | |
687 | ||
688 | /* Maybe we're done after all */ | |
689 | if (uart_circ_empty(xmit)) { | |
b129a8cc | 690 | mpc52xx_uart_stop_tx(port); |
1da177e4 LT |
691 | return 0; |
692 | } | |
693 | ||
694 | return 1; | |
695 | } | |
696 | ||
9b9129e7 | 697 | static irqreturn_t |
7d12e780 | 698 | mpc52xx_uart_int(int irq, void *dev_id) |
1da177e4 | 699 | { |
c7bec5ab | 700 | struct uart_port *port = dev_id; |
1da177e4 LT |
701 | unsigned long pass = ISR_PASS_LIMIT; |
702 | unsigned int keepgoing; | |
9b9129e7 | 703 | |
1da177e4 | 704 | spin_lock(&port->lock); |
9b9129e7 | 705 | |
1da177e4 LT |
706 | /* While we have stuff to do, we continue */ |
707 | do { | |
708 | /* If we don't find anything to do, we stop */ | |
9b9129e7 GL |
709 | keepgoing = 0; |
710 | ||
599f030c JR |
711 | psc_ops->rx_clr_irq(port); |
712 | if (psc_ops->rx_rdy(port)) | |
7d12e780 | 713 | keepgoing |= mpc52xx_uart_int_rx_chars(port); |
1da177e4 | 714 | |
599f030c JR |
715 | psc_ops->tx_clr_irq(port); |
716 | if (psc_ops->tx_rdy(port)) | |
1da177e4 | 717 | keepgoing |= mpc52xx_uart_int_tx_chars(port); |
9b9129e7 | 718 | |
1da177e4 | 719 | /* Limit number of iteration */ |
406b7d4f | 720 | if (!(--pass)) |
1da177e4 LT |
721 | keepgoing = 0; |
722 | ||
723 | } while (keepgoing); | |
9b9129e7 | 724 | |
1da177e4 | 725 | spin_unlock(&port->lock); |
9b9129e7 | 726 | |
1da177e4 LT |
727 | return IRQ_HANDLED; |
728 | } | |
729 | ||
730 | ||
731 | /* ======================================================================== */ | |
732 | /* Console ( if applicable ) */ | |
733 | /* ======================================================================== */ | |
734 | ||
735 | #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE | |
736 | ||
737 | static void __init | |
738 | mpc52xx_console_get_options(struct uart_port *port, | |
406b7d4f | 739 | int *baud, int *parity, int *bits, int *flow) |
1da177e4 LT |
740 | { |
741 | struct mpc52xx_psc __iomem *psc = PSC(port); | |
742 | unsigned char mr1; | |
743 | ||
b9272dfd GL |
744 | pr_debug("mpc52xx_console_get_options(port=%p)\n", port); |
745 | ||
1da177e4 | 746 | /* Read the mode registers */ |
406b7d4f | 747 | out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1); |
1da177e4 | 748 | mr1 = in_8(&psc->mode); |
9b9129e7 | 749 | |
1da177e4 | 750 | /* CT{U,L}R are write-only ! */ |
b9272dfd GL |
751 | *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD; |
752 | #if !defined(CONFIG_PPC_MERGE) | |
753 | if (__res.bi_baudrate) | |
754 | *baud = __res.bi_baudrate; | |
755 | #endif | |
1da177e4 LT |
756 | |
757 | /* Parse them */ | |
758 | switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) { | |
406b7d4f JR |
759 | case MPC52xx_PSC_MODE_5_BITS: |
760 | *bits = 5; | |
761 | break; | |
762 | case MPC52xx_PSC_MODE_6_BITS: | |
763 | *bits = 6; | |
764 | break; | |
765 | case MPC52xx_PSC_MODE_7_BITS: | |
766 | *bits = 7; | |
767 | break; | |
768 | case MPC52xx_PSC_MODE_8_BITS: | |
769 | default: | |
770 | *bits = 8; | |
1da177e4 | 771 | } |
9b9129e7 | 772 | |
1da177e4 LT |
773 | if (mr1 & MPC52xx_PSC_MODE_PARNONE) |
774 | *parity = 'n'; | |
775 | else | |
776 | *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e'; | |
777 | } | |
778 | ||
9b9129e7 | 779 | static void |
1da177e4 LT |
780 | mpc52xx_console_write(struct console *co, const char *s, unsigned int count) |
781 | { | |
782 | struct uart_port *port = &mpc52xx_uart_ports[co->index]; | |
1da177e4 | 783 | unsigned int i, j; |
9b9129e7 | 784 | |
1da177e4 | 785 | /* Disable interrupts */ |
599f030c | 786 | psc_ops->cw_disable_ints(port); |
1da177e4 LT |
787 | |
788 | /* Wait the TX buffer to be empty */ | |
9b9129e7 | 789 | j = 5000000; /* Maximum wait */ |
599f030c | 790 | while (!mpc52xx_uart_tx_empty(port) && --j) |
1da177e4 LT |
791 | udelay(1); |
792 | ||
793 | /* Write all the chars */ | |
d358788f | 794 | for (i = 0; i < count; i++, s++) { |
1da177e4 | 795 | /* Line return handling */ |
d358788f | 796 | if (*s == '\n') |
599f030c | 797 | psc_ops->write_char(port, '\r'); |
9b9129e7 | 798 | |
d358788f | 799 | /* Send the char */ |
599f030c | 800 | psc_ops->write_char(port, *s); |
d358788f | 801 | |
1da177e4 | 802 | /* Wait the TX buffer to be empty */ |
9b9129e7 | 803 | j = 20000; /* Maximum wait */ |
599f030c | 804 | while (!mpc52xx_uart_tx_empty(port) && --j) |
1da177e4 LT |
805 | udelay(1); |
806 | } | |
807 | ||
808 | /* Restore interrupt state */ | |
599f030c | 809 | psc_ops->cw_restore_ints(port); |
1da177e4 LT |
810 | } |
811 | ||
b9272dfd | 812 | #if !defined(CONFIG_PPC_MERGE) |
1da177e4 LT |
813 | static int __init |
814 | mpc52xx_console_setup(struct console *co, char *options) | |
815 | { | |
816 | struct uart_port *port = &mpc52xx_uart_ports[co->index]; | |
817 | ||
818 | int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD; | |
819 | int bits = 8; | |
820 | int parity = 'n'; | |
821 | int flow = 'n'; | |
822 | ||
823 | if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM) | |
824 | return -EINVAL; | |
9b9129e7 | 825 | |
1da177e4 LT |
826 | /* Basic port init. Needed since we use some uart_??? func before |
827 | * real init for early access */ | |
828 | spin_lock_init(&port->lock); | |
829 | port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */ | |
830 | port->ops = &mpc52xx_uart_ops; | |
831 | port->mapbase = MPC52xx_PA(MPC52xx_PSCx_OFFSET(co->index+1)); | |
832 | ||
833 | /* We ioremap ourself */ | |
834 | port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE); | |
835 | if (port->membase == NULL) | |
836 | return -EINVAL; | |
837 | ||
838 | /* Setup the port parameters accoding to options */ | |
839 | if (options) | |
840 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
841 | else | |
842 | mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow); | |
843 | ||
844 | return uart_set_options(port, co, baud, parity, bits, flow); | |
845 | } | |
846 | ||
b9272dfd GL |
847 | #else |
848 | ||
849 | static int __init | |
850 | mpc52xx_console_setup(struct console *co, char *options) | |
851 | { | |
852 | struct uart_port *port = &mpc52xx_uart_ports[co->index]; | |
853 | struct device_node *np = mpc52xx_uart_nodes[co->index]; | |
599f030c | 854 | unsigned int uartclk; |
b9272dfd GL |
855 | struct resource res; |
856 | int ret; | |
857 | ||
858 | int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD; | |
859 | int bits = 8; | |
860 | int parity = 'n'; | |
861 | int flow = 'n'; | |
862 | ||
863 | pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n", | |
864 | co, co->index, options); | |
865 | ||
866 | if ((co->index < 0) || (co->index > MPC52xx_PSC_MAXNUM)) { | |
867 | pr_debug("PSC%x out of range\n", co->index); | |
868 | return -EINVAL; | |
869 | } | |
870 | ||
871 | if (!np) { | |
872 | pr_debug("PSC%x not found in device tree\n", co->index); | |
873 | return -EINVAL; | |
874 | } | |
875 | ||
876 | pr_debug("Console on ttyPSC%x is %s\n", | |
406b7d4f | 877 | co->index, mpc52xx_uart_nodes[co->index]->full_name); |
b9272dfd GL |
878 | |
879 | /* Fetch register locations */ | |
406b7d4f JR |
880 | ret = of_address_to_resource(np, 0, &res); |
881 | if (ret) { | |
b9272dfd GL |
882 | pr_debug("Could not get resources for PSC%x\n", co->index); |
883 | return ret; | |
884 | } | |
885 | ||
599f030c JR |
886 | uartclk = psc_ops->getuartclk(np); |
887 | if (uartclk == 0) { | |
888 | pr_debug("Could not find uart clock frequency!\n"); | |
b9272dfd GL |
889 | return -EINVAL; |
890 | } | |
891 | ||
892 | /* Basic port init. Needed since we use some uart_??? func before | |
893 | * real init for early access */ | |
894 | spin_lock_init(&port->lock); | |
599f030c | 895 | port->uartclk = uartclk; |
b9272dfd GL |
896 | port->ops = &mpc52xx_uart_ops; |
897 | port->mapbase = res.start; | |
898 | port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc)); | |
899 | port->irq = irq_of_parse_and_map(np, 0); | |
900 | ||
901 | if (port->membase == NULL) | |
902 | return -EINVAL; | |
903 | ||
5dd80d5d | 904 | pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n", |
406b7d4f JR |
905 | (void *)port->mapbase, port->membase, |
906 | port->irq, port->uartclk); | |
b9272dfd GL |
907 | |
908 | /* Setup the port parameters accoding to options */ | |
909 | if (options) | |
910 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
911 | else | |
912 | mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow); | |
913 | ||
914 | pr_debug("Setting console parameters: %i %i%c1 flow=%c\n", | |
406b7d4f | 915 | baud, bits, parity, flow); |
b9272dfd GL |
916 | |
917 | return uart_set_options(port, co, baud, parity, bits, flow); | |
918 | } | |
919 | #endif /* defined(CONFIG_PPC_MERGE) */ | |
920 | ||
1da177e4 | 921 | |
2d8179c0 | 922 | static struct uart_driver mpc52xx_uart_driver; |
1da177e4 LT |
923 | |
924 | static struct console mpc52xx_console = { | |
d62de3aa | 925 | .name = "ttyPSC", |
1da177e4 LT |
926 | .write = mpc52xx_console_write, |
927 | .device = uart_console_device, | |
928 | .setup = mpc52xx_console_setup, | |
929 | .flags = CON_PRINTBUFFER, | |
406b7d4f | 930 | .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0) */ |
1da177e4 LT |
931 | .data = &mpc52xx_uart_driver, |
932 | }; | |
933 | ||
9b9129e7 GL |
934 | |
935 | static int __init | |
1da177e4 LT |
936 | mpc52xx_console_init(void) |
937 | { | |
c98750c2 | 938 | #if defined(CONFIG_PPC_MERGE) |
b9272dfd | 939 | mpc52xx_uart_of_enumerate(); |
c98750c2 | 940 | #endif |
1da177e4 LT |
941 | register_console(&mpc52xx_console); |
942 | return 0; | |
943 | } | |
944 | ||
945 | console_initcall(mpc52xx_console_init); | |
946 | ||
947 | #define MPC52xx_PSC_CONSOLE &mpc52xx_console | |
948 | #else | |
949 | #define MPC52xx_PSC_CONSOLE NULL | |
950 | #endif | |
951 | ||
952 | ||
953 | /* ======================================================================== */ | |
954 | /* UART Driver */ | |
955 | /* ======================================================================== */ | |
956 | ||
957 | static struct uart_driver mpc52xx_uart_driver = { | |
1da177e4 | 958 | .driver_name = "mpc52xx_psc_uart", |
d62de3aa | 959 | .dev_name = "ttyPSC", |
d62de3aa SM |
960 | .major = SERIAL_PSC_MAJOR, |
961 | .minor = SERIAL_PSC_MINOR, | |
1da177e4 LT |
962 | .nr = MPC52xx_PSC_MAXNUM, |
963 | .cons = MPC52xx_PSC_CONSOLE, | |
964 | }; | |
965 | ||
966 | ||
b9272dfd | 967 | #if !defined(CONFIG_PPC_MERGE) |
1da177e4 LT |
968 | /* ======================================================================== */ |
969 | /* Platform Driver */ | |
970 | /* ======================================================================== */ | |
971 | ||
972 | static int __devinit | |
3ae5eaec | 973 | mpc52xx_uart_probe(struct platform_device *dev) |
1da177e4 | 974 | { |
3ae5eaec | 975 | struct resource *res = dev->resource; |
1da177e4 LT |
976 | |
977 | struct uart_port *port = NULL; | |
978 | int i, idx, ret; | |
979 | ||
980 | /* Check validity & presence */ | |
38801e2e | 981 | idx = dev->id; |
1da177e4 LT |
982 | if (idx < 0 || idx >= MPC52xx_PSC_MAXNUM) |
983 | return -EINVAL; | |
984 | ||
406b7d4f | 985 | if (!mpc52xx_match_psc_function(idx, "uart")) |
1da177e4 LT |
986 | return -ENODEV; |
987 | ||
988 | /* Init the port structure */ | |
989 | port = &mpc52xx_uart_ports[idx]; | |
990 | ||
1da177e4 LT |
991 | spin_lock_init(&port->lock); |
992 | port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */ | |
947deee8 | 993 | port->fifosize = 512; |
1da177e4 LT |
994 | port->iotype = UPIO_MEM; |
995 | port->flags = UPF_BOOT_AUTOCONF | | |
406b7d4f | 996 | (uart_console(port) ? 0 : UPF_IOREMAP); |
1da177e4 LT |
997 | port->line = idx; |
998 | port->ops = &mpc52xx_uart_ops; | |
b9272dfd | 999 | port->dev = &dev->dev; |
1da177e4 LT |
1000 | |
1001 | /* Search for IRQ and mapbase */ | |
406b7d4f | 1002 | for (i = 0 ; i < dev->num_resources ; i++, res++) { |
1da177e4 LT |
1003 | if (res->flags & IORESOURCE_MEM) |
1004 | port->mapbase = res->start; | |
1005 | else if (res->flags & IORESOURCE_IRQ) | |
1006 | port->irq = res->start; | |
1007 | } | |
1008 | if (!port->irq || !port->mapbase) | |
1009 | return -EINVAL; | |
1010 | ||
1011 | /* Add the port to the uart sub-system */ | |
1012 | ret = uart_add_one_port(&mpc52xx_uart_driver, port); | |
1013 | if (!ret) | |
406b7d4f | 1014 | platform_set_drvdata(dev, (void *)port); |
1da177e4 LT |
1015 | |
1016 | return ret; | |
1017 | } | |
1018 | ||
1019 | static int | |
3ae5eaec | 1020 | mpc52xx_uart_remove(struct platform_device *dev) |
1da177e4 | 1021 | { |
3ae5eaec | 1022 | struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev); |
1da177e4 | 1023 | |
3ae5eaec | 1024 | platform_set_drvdata(dev, NULL); |
1da177e4 LT |
1025 | |
1026 | if (port) | |
1027 | uart_remove_one_port(&mpc52xx_uart_driver, port); | |
1028 | ||
1029 | return 0; | |
1030 | } | |
1031 | ||
1032 | #ifdef CONFIG_PM | |
1033 | static int | |
3ae5eaec | 1034 | mpc52xx_uart_suspend(struct platform_device *dev, pm_message_t state) |
1da177e4 | 1035 | { |
3ae5eaec | 1036 | struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev); |
1da177e4 | 1037 | |
9b9129e7 | 1038 | if (port) |
1da177e4 LT |
1039 | uart_suspend_port(&mpc52xx_uart_driver, port); |
1040 | ||
1041 | return 0; | |
1042 | } | |
1043 | ||
1044 | static int | |
3ae5eaec | 1045 | mpc52xx_uart_resume(struct platform_device *dev) |
1da177e4 | 1046 | { |
3ae5eaec | 1047 | struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev); |
1da177e4 | 1048 | |
9480e307 | 1049 | if (port) |
1da177e4 LT |
1050 | uart_resume_port(&mpc52xx_uart_driver, port); |
1051 | ||
1052 | return 0; | |
1053 | } | |
1054 | #endif | |
1055 | ||
b9272dfd | 1056 | |
3ae5eaec | 1057 | static struct platform_driver mpc52xx_uart_platform_driver = { |
1da177e4 LT |
1058 | .probe = mpc52xx_uart_probe, |
1059 | .remove = mpc52xx_uart_remove, | |
1060 | #ifdef CONFIG_PM | |
1061 | .suspend = mpc52xx_uart_suspend, | |
1062 | .resume = mpc52xx_uart_resume, | |
1063 | #endif | |
3ae5eaec | 1064 | .driver = { |
406b7d4f | 1065 | .owner = THIS_MODULE, |
3ae5eaec RK |
1066 | .name = "mpc52xx-psc", |
1067 | }, | |
1da177e4 | 1068 | }; |
b9272dfd GL |
1069 | #endif /* !defined(CONFIG_PPC_MERGE) */ |
1070 | ||
1071 | ||
1072 | #if defined(CONFIG_PPC_MERGE) | |
1073 | /* ======================================================================== */ | |
1074 | /* OF Platform Driver */ | |
1075 | /* ======================================================================== */ | |
1076 | ||
1077 | static int __devinit | |
1078 | mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match) | |
1079 | { | |
1080 | int idx = -1; | |
599f030c | 1081 | unsigned int uartclk; |
b9272dfd GL |
1082 | struct uart_port *port = NULL; |
1083 | struct resource res; | |
1084 | int ret; | |
1085 | ||
1086 | dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match); | |
1087 | ||
1088 | /* Check validity & presence */ | |
1089 | for (idx = 0; idx < MPC52xx_PSC_MAXNUM; idx++) | |
1090 | if (mpc52xx_uart_nodes[idx] == op->node) | |
1091 | break; | |
1092 | if (idx >= MPC52xx_PSC_MAXNUM) | |
1093 | return -EINVAL; | |
1094 | pr_debug("Found %s assigned to ttyPSC%x\n", | |
406b7d4f | 1095 | mpc52xx_uart_nodes[idx]->full_name, idx); |
b9272dfd | 1096 | |
599f030c JR |
1097 | uartclk = psc_ops->getuartclk(op->node); |
1098 | if (uartclk == 0) { | |
1099 | dev_dbg(&op->dev, "Could not find uart clock frequency!\n"); | |
b9272dfd GL |
1100 | return -EINVAL; |
1101 | } | |
1102 | ||
1103 | /* Init the port structure */ | |
1104 | port = &mpc52xx_uart_ports[idx]; | |
1105 | ||
1106 | spin_lock_init(&port->lock); | |
599f030c | 1107 | port->uartclk = uartclk; |
b9272dfd GL |
1108 | port->fifosize = 512; |
1109 | port->iotype = UPIO_MEM; | |
1110 | port->flags = UPF_BOOT_AUTOCONF | | |
406b7d4f | 1111 | (uart_console(port) ? 0 : UPF_IOREMAP); |
b9272dfd GL |
1112 | port->line = idx; |
1113 | port->ops = &mpc52xx_uart_ops; | |
1114 | port->dev = &op->dev; | |
1115 | ||
1116 | /* Search for IRQ and mapbase */ | |
406b7d4f JR |
1117 | ret = of_address_to_resource(op->node, 0, &res); |
1118 | if (ret) | |
b9272dfd GL |
1119 | return ret; |
1120 | ||
1121 | port->mapbase = res.start; | |
1122 | port->irq = irq_of_parse_and_map(op->node, 0); | |
1123 | ||
5dd80d5d | 1124 | dev_dbg(&op->dev, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n", |
406b7d4f | 1125 | (void *)port->mapbase, port->irq, port->uartclk); |
b9272dfd | 1126 | |
406b7d4f | 1127 | if ((port->irq == NO_IRQ) || !port->mapbase) { |
b9272dfd GL |
1128 | printk(KERN_ERR "Could not allocate resources for PSC\n"); |
1129 | return -EINVAL; | |
1130 | } | |
1131 | ||
1132 | /* Add the port to the uart sub-system */ | |
1133 | ret = uart_add_one_port(&mpc52xx_uart_driver, port); | |
1134 | if (!ret) | |
406b7d4f | 1135 | dev_set_drvdata(&op->dev, (void *)port); |
b9272dfd GL |
1136 | |
1137 | return ret; | |
1138 | } | |
1139 | ||
1140 | static int | |
1141 | mpc52xx_uart_of_remove(struct of_device *op) | |
1142 | { | |
1143 | struct uart_port *port = dev_get_drvdata(&op->dev); | |
1144 | dev_set_drvdata(&op->dev, NULL); | |
1145 | ||
fc7900bb | 1146 | if (port) { |
b9272dfd | 1147 | uart_remove_one_port(&mpc52xx_uart_driver, port); |
fc7900bb SM |
1148 | irq_dispose_mapping(port->irq); |
1149 | } | |
b9272dfd GL |
1150 | |
1151 | return 0; | |
1152 | } | |
1153 | ||
1154 | #ifdef CONFIG_PM | |
1155 | static int | |
1156 | mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state) | |
1157 | { | |
1158 | struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev); | |
1159 | ||
1160 | if (port) | |
1161 | uart_suspend_port(&mpc52xx_uart_driver, port); | |
1162 | ||
1163 | return 0; | |
1164 | } | |
1165 | ||
1166 | static int | |
1167 | mpc52xx_uart_of_resume(struct of_device *op) | |
1168 | { | |
1169 | struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev); | |
1170 | ||
1171 | if (port) | |
1172 | uart_resume_port(&mpc52xx_uart_driver, port); | |
1173 | ||
1174 | return 0; | |
1175 | } | |
1176 | #endif | |
1177 | ||
1178 | static void | |
1179 | mpc52xx_uart_of_assign(struct device_node *np, int idx) | |
1180 | { | |
1181 | int free_idx = -1; | |
1182 | int i; | |
1183 | ||
1184 | /* Find the first free node */ | |
1185 | for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) { | |
1186 | if (mpc52xx_uart_nodes[i] == NULL) { | |
1187 | free_idx = i; | |
1188 | break; | |
1189 | } | |
1190 | } | |
1191 | ||
1192 | if ((idx < 0) || (idx >= MPC52xx_PSC_MAXNUM)) | |
1193 | idx = free_idx; | |
1194 | ||
1195 | if (idx < 0) | |
1196 | return; /* No free slot; abort */ | |
1197 | ||
406b7d4f | 1198 | of_node_get(np); |
b9272dfd GL |
1199 | /* If the slot is already occupied, then swap slots */ |
1200 | if (mpc52xx_uart_nodes[idx] && (free_idx != -1)) | |
1201 | mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx]; | |
af6a9aab | 1202 | mpc52xx_uart_nodes[idx] = np; |
b9272dfd GL |
1203 | } |
1204 | ||
1205 | static void | |
1206 | mpc52xx_uart_of_enumerate(void) | |
1207 | { | |
406b7d4f | 1208 | static int enum_done; |
b9272dfd GL |
1209 | struct device_node *np; |
1210 | const unsigned int *devno; | |
1211 | int i; | |
1212 | ||
1213 | if (enum_done) | |
1214 | return; | |
1215 | ||
1216 | for_each_node_by_type(np, "serial") { | |
1217 | if (!of_match_node(mpc52xx_uart_of_match, np)) | |
1218 | continue; | |
1219 | ||
1220 | /* Is a particular device number requested? */ | |
40cd3a45 | 1221 | devno = of_get_property(np, "port-number", NULL); |
406b7d4f | 1222 | mpc52xx_uart_of_assign(np, devno ? *devno : -1); |
b9272dfd GL |
1223 | } |
1224 | ||
1225 | enum_done = 1; | |
1226 | ||
1227 | for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) { | |
1228 | if (mpc52xx_uart_nodes[i]) | |
1229 | pr_debug("%s assigned to ttyPSC%x\n", | |
406b7d4f | 1230 | mpc52xx_uart_nodes[i]->full_name, i); |
b9272dfd GL |
1231 | } |
1232 | } | |
1233 | ||
1234 | MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match); | |
1235 | ||
1236 | static struct of_platform_driver mpc52xx_uart_of_driver = { | |
b9272dfd GL |
1237 | .match_table = mpc52xx_uart_of_match, |
1238 | .probe = mpc52xx_uart_of_probe, | |
1239 | .remove = mpc52xx_uart_of_remove, | |
1240 | #ifdef CONFIG_PM | |
1241 | .suspend = mpc52xx_uart_of_suspend, | |
1242 | .resume = mpc52xx_uart_of_resume, | |
1243 | #endif | |
1244 | .driver = { | |
1245 | .name = "mpc52xx-psc-uart", | |
1246 | }, | |
1247 | }; | |
1248 | #endif /* defined(CONFIG_PPC_MERGE) */ | |
1da177e4 LT |
1249 | |
1250 | ||
1251 | /* ======================================================================== */ | |
1252 | /* Module */ | |
1253 | /* ======================================================================== */ | |
1254 | ||
1255 | static int __init | |
1256 | mpc52xx_uart_init(void) | |
1257 | { | |
1258 | int ret; | |
1259 | ||
b9272dfd | 1260 | printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n"); |
1da177e4 | 1261 | |
406b7d4f JR |
1262 | ret = uart_register_driver(&mpc52xx_uart_driver); |
1263 | if (ret) { | |
b9272dfd GL |
1264 | printk(KERN_ERR "%s: uart_register_driver failed (%i)\n", |
1265 | __FILE__, ret); | |
1266 | return ret; | |
1da177e4 LT |
1267 | } |
1268 | ||
b9272dfd GL |
1269 | #if defined(CONFIG_PPC_MERGE) |
1270 | mpc52xx_uart_of_enumerate(); | |
1271 | ||
1272 | ret = of_register_platform_driver(&mpc52xx_uart_of_driver); | |
1273 | if (ret) { | |
1274 | printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n", | |
1275 | __FILE__, ret); | |
1276 | uart_unregister_driver(&mpc52xx_uart_driver); | |
1277 | return ret; | |
1278 | } | |
1279 | #else | |
1280 | ret = platform_driver_register(&mpc52xx_uart_platform_driver); | |
1281 | if (ret) { | |
1282 | printk(KERN_ERR "%s: platform_driver_register failed (%i)\n", | |
1283 | __FILE__, ret); | |
1284 | uart_unregister_driver(&mpc52xx_uart_driver); | |
1285 | return ret; | |
1286 | } | |
1287 | #endif | |
1288 | ||
1289 | return 0; | |
1da177e4 LT |
1290 | } |
1291 | ||
1292 | static void __exit | |
1293 | mpc52xx_uart_exit(void) | |
1294 | { | |
b9272dfd GL |
1295 | #if defined(CONFIG_PPC_MERGE) |
1296 | of_unregister_platform_driver(&mpc52xx_uart_of_driver); | |
1297 | #else | |
3ae5eaec | 1298 | platform_driver_unregister(&mpc52xx_uart_platform_driver); |
b9272dfd | 1299 | #endif |
1da177e4 LT |
1300 | uart_unregister_driver(&mpc52xx_uart_driver); |
1301 | } | |
1302 | ||
1303 | ||
1304 | module_init(mpc52xx_uart_init); | |
1305 | module_exit(mpc52xx_uart_exit); | |
1306 | ||
1307 | MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>"); | |
1308 | MODULE_DESCRIPTION("Freescale MPC52xx PSC UART"); | |
1309 | MODULE_LICENSE("GPL"); |