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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * sunzilog.c | |
3 | * | |
4 | * Driver for Zilog serial chips found on Sun workstations and | |
5 | * servers. This driver could actually be made more generic. | |
6 | * | |
7 | * This is based on the old drivers/sbus/char/zs.c code. A lot | |
8 | * of code has been simply moved over directly from there but | |
9 | * much has been rewritten. Credits therefore go out to Eddie | |
10 | * C. Dost, Pete Zaitcev, Ted Ts'o and Alex Buell for their | |
11 | * work there. | |
12 | * | |
13 | * Copyright (C) 2002 David S. Miller (davem@redhat.com) | |
14 | */ | |
15 | ||
16 | #include <linux/config.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/sched.h> | |
20 | #include <linux/errno.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/tty.h> | |
23 | #include <linux/tty_flip.h> | |
24 | #include <linux/major.h> | |
25 | #include <linux/string.h> | |
26 | #include <linux/ptrace.h> | |
27 | #include <linux/ioport.h> | |
28 | #include <linux/slab.h> | |
29 | #include <linux/circ_buf.h> | |
30 | #include <linux/serial.h> | |
31 | #include <linux/sysrq.h> | |
32 | #include <linux/console.h> | |
33 | #include <linux/spinlock.h> | |
34 | #ifdef CONFIG_SERIO | |
35 | #include <linux/serio.h> | |
36 | #endif | |
37 | #include <linux/init.h> | |
38 | ||
39 | #include <asm/io.h> | |
40 | #include <asm/irq.h> | |
41 | #ifdef CONFIG_SPARC64 | |
42 | #include <asm/fhc.h> | |
43 | #endif | |
44 | #include <asm/sbus.h> | |
45 | ||
46 | #if defined(CONFIG_SERIAL_SUNZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | |
47 | #define SUPPORT_SYSRQ | |
48 | #endif | |
49 | ||
50 | #include <linux/serial_core.h> | |
51 | ||
52 | #include "suncore.h" | |
53 | #include "sunzilog.h" | |
54 | ||
55 | /* On 32-bit sparcs we need to delay after register accesses | |
56 | * to accommodate sun4 systems, but we do not need to flush writes. | |
57 | * On 64-bit sparc we only need to flush single writes to ensure | |
58 | * completion. | |
59 | */ | |
60 | #ifndef CONFIG_SPARC64 | |
61 | #define ZSDELAY() udelay(5) | |
62 | #define ZSDELAY_LONG() udelay(20) | |
63 | #define ZS_WSYNC(channel) do { } while (0) | |
64 | #else | |
65 | #define ZSDELAY() | |
66 | #define ZSDELAY_LONG() | |
67 | #define ZS_WSYNC(__channel) \ | |
68 | sbus_readb(&((__channel)->control)) | |
69 | #endif | |
70 | ||
71 | static int num_sunzilog; | |
72 | #define NUM_SUNZILOG num_sunzilog | |
73 | #define NUM_CHANNELS (NUM_SUNZILOG * 2) | |
74 | ||
75 | #define KEYBOARD_LINE 0x2 | |
76 | #define MOUSE_LINE 0x3 | |
77 | ||
78 | #define ZS_CLOCK 4915200 /* Zilog input clock rate. */ | |
79 | #define ZS_CLOCK_DIVISOR 16 /* Divisor this driver uses. */ | |
80 | ||
81 | /* | |
82 | * We wrap our port structure around the generic uart_port. | |
83 | */ | |
84 | struct uart_sunzilog_port { | |
85 | struct uart_port port; | |
86 | ||
87 | /* IRQ servicing chain. */ | |
88 | struct uart_sunzilog_port *next; | |
89 | ||
90 | /* Current values of Zilog write registers. */ | |
91 | unsigned char curregs[NUM_ZSREGS]; | |
92 | ||
93 | unsigned int flags; | |
94 | #define SUNZILOG_FLAG_CONS_KEYB 0x00000001 | |
95 | #define SUNZILOG_FLAG_CONS_MOUSE 0x00000002 | |
96 | #define SUNZILOG_FLAG_IS_CONS 0x00000004 | |
97 | #define SUNZILOG_FLAG_IS_KGDB 0x00000008 | |
98 | #define SUNZILOG_FLAG_MODEM_STATUS 0x00000010 | |
99 | #define SUNZILOG_FLAG_IS_CHANNEL_A 0x00000020 | |
100 | #define SUNZILOG_FLAG_REGS_HELD 0x00000040 | |
101 | #define SUNZILOG_FLAG_TX_STOPPED 0x00000080 | |
102 | #define SUNZILOG_FLAG_TX_ACTIVE 0x00000100 | |
103 | ||
104 | unsigned int cflag; | |
105 | ||
106 | unsigned char parity_mask; | |
107 | unsigned char prev_status; | |
108 | ||
109 | #ifdef CONFIG_SERIO | |
110 | struct serio *serio; | |
111 | int serio_open; | |
112 | #endif | |
113 | }; | |
114 | ||
115 | #define ZILOG_CHANNEL_FROM_PORT(PORT) ((struct zilog_channel __iomem *)((PORT)->membase)) | |
116 | #define UART_ZILOG(PORT) ((struct uart_sunzilog_port *)(PORT)) | |
117 | ||
118 | #define ZS_IS_KEYB(UP) ((UP)->flags & SUNZILOG_FLAG_CONS_KEYB) | |
119 | #define ZS_IS_MOUSE(UP) ((UP)->flags & SUNZILOG_FLAG_CONS_MOUSE) | |
120 | #define ZS_IS_CONS(UP) ((UP)->flags & SUNZILOG_FLAG_IS_CONS) | |
121 | #define ZS_IS_KGDB(UP) ((UP)->flags & SUNZILOG_FLAG_IS_KGDB) | |
122 | #define ZS_WANTS_MODEM_STATUS(UP) ((UP)->flags & SUNZILOG_FLAG_MODEM_STATUS) | |
123 | #define ZS_IS_CHANNEL_A(UP) ((UP)->flags & SUNZILOG_FLAG_IS_CHANNEL_A) | |
124 | #define ZS_REGS_HELD(UP) ((UP)->flags & SUNZILOG_FLAG_REGS_HELD) | |
125 | #define ZS_TX_STOPPED(UP) ((UP)->flags & SUNZILOG_FLAG_TX_STOPPED) | |
126 | #define ZS_TX_ACTIVE(UP) ((UP)->flags & SUNZILOG_FLAG_TX_ACTIVE) | |
127 | ||
128 | /* Reading and writing Zilog8530 registers. The delays are to make this | |
129 | * driver work on the Sun4 which needs a settling delay after each chip | |
130 | * register access, other machines handle this in hardware via auxiliary | |
131 | * flip-flops which implement the settle time we do in software. | |
132 | * | |
133 | * The port lock must be held and local IRQs must be disabled | |
134 | * when {read,write}_zsreg is invoked. | |
135 | */ | |
136 | static unsigned char read_zsreg(struct zilog_channel __iomem *channel, | |
137 | unsigned char reg) | |
138 | { | |
139 | unsigned char retval; | |
140 | ||
141 | sbus_writeb(reg, &channel->control); | |
142 | ZSDELAY(); | |
143 | retval = sbus_readb(&channel->control); | |
144 | ZSDELAY(); | |
145 | ||
146 | return retval; | |
147 | } | |
148 | ||
149 | static void write_zsreg(struct zilog_channel __iomem *channel, | |
150 | unsigned char reg, unsigned char value) | |
151 | { | |
152 | sbus_writeb(reg, &channel->control); | |
153 | ZSDELAY(); | |
154 | sbus_writeb(value, &channel->control); | |
155 | ZSDELAY(); | |
156 | } | |
157 | ||
158 | static void sunzilog_clear_fifo(struct zilog_channel __iomem *channel) | |
159 | { | |
160 | int i; | |
161 | ||
162 | for (i = 0; i < 32; i++) { | |
163 | unsigned char regval; | |
164 | ||
165 | regval = sbus_readb(&channel->control); | |
166 | ZSDELAY(); | |
167 | if (regval & Rx_CH_AV) | |
168 | break; | |
169 | ||
170 | regval = read_zsreg(channel, R1); | |
171 | sbus_readb(&channel->data); | |
172 | ZSDELAY(); | |
173 | ||
174 | if (regval & (PAR_ERR | Rx_OVR | CRC_ERR)) { | |
175 | sbus_writeb(ERR_RES, &channel->control); | |
176 | ZSDELAY(); | |
177 | ZS_WSYNC(channel); | |
178 | } | |
179 | } | |
180 | } | |
181 | ||
182 | /* This function must only be called when the TX is not busy. The UART | |
183 | * port lock must be held and local interrupts disabled. | |
184 | */ | |
185 | static void __load_zsregs(struct zilog_channel __iomem *channel, unsigned char *regs) | |
186 | { | |
187 | int i; | |
188 | ||
189 | /* Let pending transmits finish. */ | |
190 | for (i = 0; i < 1000; i++) { | |
191 | unsigned char stat = read_zsreg(channel, R1); | |
192 | if (stat & ALL_SNT) | |
193 | break; | |
194 | udelay(100); | |
195 | } | |
196 | ||
197 | sbus_writeb(ERR_RES, &channel->control); | |
198 | ZSDELAY(); | |
199 | ZS_WSYNC(channel); | |
200 | ||
201 | sunzilog_clear_fifo(channel); | |
202 | ||
203 | /* Disable all interrupts. */ | |
204 | write_zsreg(channel, R1, | |
205 | regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB)); | |
206 | ||
207 | /* Set parity, sync config, stop bits, and clock divisor. */ | |
208 | write_zsreg(channel, R4, regs[R4]); | |
209 | ||
210 | /* Set misc. TX/RX control bits. */ | |
211 | write_zsreg(channel, R10, regs[R10]); | |
212 | ||
213 | /* Set TX/RX controls sans the enable bits. */ | |
214 | write_zsreg(channel, R3, regs[R3] & ~RxENAB); | |
215 | write_zsreg(channel, R5, regs[R5] & ~TxENAB); | |
216 | ||
217 | /* Synchronous mode config. */ | |
218 | write_zsreg(channel, R6, regs[R6]); | |
219 | write_zsreg(channel, R7, regs[R7]); | |
220 | ||
221 | /* Don't mess with the interrupt vector (R2, unused by us) and | |
222 | * master interrupt control (R9). We make sure this is setup | |
223 | * properly at probe time then never touch it again. | |
224 | */ | |
225 | ||
226 | /* Disable baud generator. */ | |
227 | write_zsreg(channel, R14, regs[R14] & ~BRENAB); | |
228 | ||
229 | /* Clock mode control. */ | |
230 | write_zsreg(channel, R11, regs[R11]); | |
231 | ||
232 | /* Lower and upper byte of baud rate generator divisor. */ | |
233 | write_zsreg(channel, R12, regs[R12]); | |
234 | write_zsreg(channel, R13, regs[R13]); | |
235 | ||
236 | /* Now rewrite R14, with BRENAB (if set). */ | |
237 | write_zsreg(channel, R14, regs[R14]); | |
238 | ||
239 | /* External status interrupt control. */ | |
240 | write_zsreg(channel, R15, regs[R15]); | |
241 | ||
242 | /* Reset external status interrupts. */ | |
243 | write_zsreg(channel, R0, RES_EXT_INT); | |
244 | write_zsreg(channel, R0, RES_EXT_INT); | |
245 | ||
246 | /* Rewrite R3/R5, this time without enables masked. */ | |
247 | write_zsreg(channel, R3, regs[R3]); | |
248 | write_zsreg(channel, R5, regs[R5]); | |
249 | ||
250 | /* Rewrite R1, this time without IRQ enabled masked. */ | |
251 | write_zsreg(channel, R1, regs[R1]); | |
252 | } | |
253 | ||
254 | /* Reprogram the Zilog channel HW registers with the copies found in the | |
255 | * software state struct. If the transmitter is busy, we defer this update | |
256 | * until the next TX complete interrupt. Else, we do it right now. | |
257 | * | |
258 | * The UART port lock must be held and local interrupts disabled. | |
259 | */ | |
260 | static void sunzilog_maybe_update_regs(struct uart_sunzilog_port *up, | |
261 | struct zilog_channel __iomem *channel) | |
262 | { | |
263 | if (!ZS_REGS_HELD(up)) { | |
264 | if (ZS_TX_ACTIVE(up)) { | |
265 | up->flags |= SUNZILOG_FLAG_REGS_HELD; | |
266 | } else { | |
267 | __load_zsregs(channel, up->curregs); | |
268 | } | |
269 | } | |
270 | } | |
271 | ||
272 | static void sunzilog_change_mouse_baud(struct uart_sunzilog_port *up) | |
273 | { | |
274 | unsigned int cur_cflag = up->cflag; | |
275 | int brg, new_baud; | |
276 | ||
277 | up->cflag &= ~CBAUD; | |
278 | up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud); | |
279 | ||
280 | brg = BPS_TO_BRG(new_baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); | |
281 | up->curregs[R12] = (brg & 0xff); | |
282 | up->curregs[R13] = (brg >> 8) & 0xff; | |
283 | sunzilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(&up->port)); | |
284 | } | |
285 | ||
286 | static void sunzilog_kbdms_receive_chars(struct uart_sunzilog_port *up, | |
287 | unsigned char ch, int is_break, | |
288 | struct pt_regs *regs) | |
289 | { | |
290 | if (ZS_IS_KEYB(up)) { | |
291 | /* Stop-A is handled by drivers/char/keyboard.c now. */ | |
292 | #ifdef CONFIG_SERIO | |
293 | if (up->serio_open) | |
294 | serio_interrupt(up->serio, ch, 0, regs); | |
295 | #endif | |
296 | } else if (ZS_IS_MOUSE(up)) { | |
297 | int ret = suncore_mouse_baud_detection(ch, is_break); | |
298 | ||
299 | switch (ret) { | |
300 | case 2: | |
301 | sunzilog_change_mouse_baud(up); | |
302 | /* fallthru */ | |
303 | case 1: | |
304 | break; | |
305 | ||
306 | case 0: | |
307 | #ifdef CONFIG_SERIO | |
308 | if (up->serio_open) | |
309 | serio_interrupt(up->serio, ch, 0, regs); | |
310 | #endif | |
311 | break; | |
312 | }; | |
313 | } | |
314 | } | |
315 | ||
316 | static struct tty_struct * | |
317 | sunzilog_receive_chars(struct uart_sunzilog_port *up, | |
318 | struct zilog_channel __iomem *channel, | |
319 | struct pt_regs *regs) | |
320 | { | |
321 | struct tty_struct *tty; | |
322 | unsigned char ch, r1; | |
323 | ||
324 | tty = NULL; | |
325 | if (up->port.info != NULL && /* Unopened serial console */ | |
326 | up->port.info->tty != NULL) /* Keyboard || mouse */ | |
327 | tty = up->port.info->tty; | |
328 | ||
329 | for (;;) { | |
330 | ||
331 | r1 = read_zsreg(channel, R1); | |
332 | if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR)) { | |
333 | sbus_writeb(ERR_RES, &channel->control); | |
334 | ZSDELAY(); | |
335 | ZS_WSYNC(channel); | |
336 | } | |
337 | ||
338 | ch = sbus_readb(&channel->control); | |
339 | ZSDELAY(); | |
340 | ||
341 | /* This funny hack depends upon BRK_ABRT not interfering | |
342 | * with the other bits we care about in R1. | |
343 | */ | |
344 | if (ch & BRK_ABRT) | |
345 | r1 |= BRK_ABRT; | |
346 | ||
347 | if (!(ch & Rx_CH_AV)) | |
348 | break; | |
349 | ||
350 | ch = sbus_readb(&channel->data); | |
351 | ZSDELAY(); | |
352 | ||
353 | ch &= up->parity_mask; | |
354 | ||
355 | if (unlikely(ZS_IS_KEYB(up)) || unlikely(ZS_IS_MOUSE(up))) { | |
356 | sunzilog_kbdms_receive_chars(up, ch, 0, regs); | |
357 | continue; | |
358 | } | |
359 | ||
360 | if (tty == NULL) { | |
361 | uart_handle_sysrq_char(&up->port, ch, regs); | |
362 | continue; | |
363 | } | |
364 | ||
365 | if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) { | |
366 | tty->flip.work.func((void *)tty); | |
367 | /* | |
368 | * The 8250 bails out of the loop here, | |
369 | * but we need to read everything, or die. | |
370 | */ | |
371 | if (tty->flip.count >= TTY_FLIPBUF_SIZE) | |
372 | continue; | |
373 | } | |
374 | ||
375 | /* A real serial line, record the character and status. */ | |
376 | *tty->flip.char_buf_ptr = ch; | |
377 | *tty->flip.flag_buf_ptr = TTY_NORMAL; | |
378 | up->port.icount.rx++; | |
379 | if (r1 & (BRK_ABRT | PAR_ERR | Rx_OVR | CRC_ERR)) { | |
380 | if (r1 & BRK_ABRT) { | |
381 | r1 &= ~(PAR_ERR | CRC_ERR); | |
382 | up->port.icount.brk++; | |
383 | if (uart_handle_break(&up->port)) | |
384 | continue; | |
385 | } | |
386 | else if (r1 & PAR_ERR) | |
387 | up->port.icount.parity++; | |
388 | else if (r1 & CRC_ERR) | |
389 | up->port.icount.frame++; | |
390 | if (r1 & Rx_OVR) | |
391 | up->port.icount.overrun++; | |
392 | r1 &= up->port.read_status_mask; | |
393 | if (r1 & BRK_ABRT) | |
394 | *tty->flip.flag_buf_ptr = TTY_BREAK; | |
395 | else if (r1 & PAR_ERR) | |
396 | *tty->flip.flag_buf_ptr = TTY_PARITY; | |
397 | else if (r1 & CRC_ERR) | |
398 | *tty->flip.flag_buf_ptr = TTY_FRAME; | |
399 | } | |
400 | if (uart_handle_sysrq_char(&up->port, ch, regs)) | |
401 | continue; | |
402 | ||
403 | if (up->port.ignore_status_mask == 0xff || | |
404 | (r1 & up->port.ignore_status_mask) == 0) { | |
405 | tty->flip.flag_buf_ptr++; | |
406 | tty->flip.char_buf_ptr++; | |
407 | tty->flip.count++; | |
408 | } | |
409 | if ((r1 & Rx_OVR) && | |
410 | tty->flip.count < TTY_FLIPBUF_SIZE) { | |
411 | *tty->flip.flag_buf_ptr = TTY_OVERRUN; | |
412 | tty->flip.flag_buf_ptr++; | |
413 | tty->flip.char_buf_ptr++; | |
414 | tty->flip.count++; | |
415 | } | |
416 | } | |
417 | ||
418 | return tty; | |
419 | } | |
420 | ||
421 | static void sunzilog_status_handle(struct uart_sunzilog_port *up, | |
422 | struct zilog_channel __iomem *channel, | |
423 | struct pt_regs *regs) | |
424 | { | |
425 | unsigned char status; | |
426 | ||
427 | status = sbus_readb(&channel->control); | |
428 | ZSDELAY(); | |
429 | ||
430 | sbus_writeb(RES_EXT_INT, &channel->control); | |
431 | ZSDELAY(); | |
432 | ZS_WSYNC(channel); | |
433 | ||
434 | if (status & BRK_ABRT) { | |
435 | if (ZS_IS_MOUSE(up)) | |
436 | sunzilog_kbdms_receive_chars(up, 0, 1, regs); | |
437 | if (ZS_IS_CONS(up)) { | |
438 | /* Wait for BREAK to deassert to avoid potentially | |
439 | * confusing the PROM. | |
440 | */ | |
441 | while (1) { | |
442 | status = sbus_readb(&channel->control); | |
443 | ZSDELAY(); | |
444 | if (!(status & BRK_ABRT)) | |
445 | break; | |
446 | } | |
447 | sun_do_break(); | |
448 | return; | |
449 | } | |
450 | } | |
451 | ||
452 | if (ZS_WANTS_MODEM_STATUS(up)) { | |
453 | if (status & SYNC) | |
454 | up->port.icount.dsr++; | |
455 | ||
456 | /* The Zilog just gives us an interrupt when DCD/CTS/etc. change. | |
457 | * But it does not tell us which bit has changed, we have to keep | |
458 | * track of this ourselves. | |
459 | */ | |
460 | if ((status ^ up->prev_status) ^ DCD) | |
461 | uart_handle_dcd_change(&up->port, | |
462 | (status & DCD)); | |
463 | if ((status ^ up->prev_status) ^ CTS) | |
464 | uart_handle_cts_change(&up->port, | |
465 | (status & CTS)); | |
466 | ||
467 | wake_up_interruptible(&up->port.info->delta_msr_wait); | |
468 | } | |
469 | ||
470 | up->prev_status = status; | |
471 | } | |
472 | ||
473 | static void sunzilog_transmit_chars(struct uart_sunzilog_port *up, | |
474 | struct zilog_channel __iomem *channel) | |
475 | { | |
476 | struct circ_buf *xmit; | |
477 | ||
478 | if (ZS_IS_CONS(up)) { | |
479 | unsigned char status = sbus_readb(&channel->control); | |
480 | ZSDELAY(); | |
481 | ||
482 | /* TX still busy? Just wait for the next TX done interrupt. | |
483 | * | |
484 | * It can occur because of how we do serial console writes. It would | |
485 | * be nice to transmit console writes just like we normally would for | |
486 | * a TTY line. (ie. buffered and TX interrupt driven). That is not | |
487 | * easy because console writes cannot sleep. One solution might be | |
488 | * to poll on enough port->xmit space becomming free. -DaveM | |
489 | */ | |
490 | if (!(status & Tx_BUF_EMP)) | |
491 | return; | |
492 | } | |
493 | ||
494 | up->flags &= ~SUNZILOG_FLAG_TX_ACTIVE; | |
495 | ||
496 | if (ZS_REGS_HELD(up)) { | |
497 | __load_zsregs(channel, up->curregs); | |
498 | up->flags &= ~SUNZILOG_FLAG_REGS_HELD; | |
499 | } | |
500 | ||
501 | if (ZS_TX_STOPPED(up)) { | |
502 | up->flags &= ~SUNZILOG_FLAG_TX_STOPPED; | |
503 | goto ack_tx_int; | |
504 | } | |
505 | ||
506 | if (up->port.x_char) { | |
507 | up->flags |= SUNZILOG_FLAG_TX_ACTIVE; | |
508 | sbus_writeb(up->port.x_char, &channel->data); | |
509 | ZSDELAY(); | |
510 | ZS_WSYNC(channel); | |
511 | ||
512 | up->port.icount.tx++; | |
513 | up->port.x_char = 0; | |
514 | return; | |
515 | } | |
516 | ||
517 | if (up->port.info == NULL) | |
518 | goto ack_tx_int; | |
519 | xmit = &up->port.info->xmit; | |
520 | if (uart_circ_empty(xmit)) { | |
521 | uart_write_wakeup(&up->port); | |
522 | goto ack_tx_int; | |
523 | } | |
524 | if (uart_tx_stopped(&up->port)) | |
525 | goto ack_tx_int; | |
526 | ||
527 | up->flags |= SUNZILOG_FLAG_TX_ACTIVE; | |
528 | sbus_writeb(xmit->buf[xmit->tail], &channel->data); | |
529 | ZSDELAY(); | |
530 | ZS_WSYNC(channel); | |
531 | ||
532 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
533 | up->port.icount.tx++; | |
534 | ||
535 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
536 | uart_write_wakeup(&up->port); | |
537 | ||
538 | return; | |
539 | ||
540 | ack_tx_int: | |
541 | sbus_writeb(RES_Tx_P, &channel->control); | |
542 | ZSDELAY(); | |
543 | ZS_WSYNC(channel); | |
544 | } | |
545 | ||
546 | static irqreturn_t sunzilog_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |
547 | { | |
548 | struct uart_sunzilog_port *up = dev_id; | |
549 | ||
550 | while (up) { | |
551 | struct zilog_channel __iomem *channel | |
552 | = ZILOG_CHANNEL_FROM_PORT(&up->port); | |
553 | struct tty_struct *tty; | |
554 | unsigned char r3; | |
555 | ||
556 | spin_lock(&up->port.lock); | |
557 | r3 = read_zsreg(channel, R3); | |
558 | ||
559 | /* Channel A */ | |
560 | tty = NULL; | |
561 | if (r3 & (CHAEXT | CHATxIP | CHARxIP)) { | |
562 | sbus_writeb(RES_H_IUS, &channel->control); | |
563 | ZSDELAY(); | |
564 | ZS_WSYNC(channel); | |
565 | ||
566 | if (r3 & CHARxIP) | |
567 | tty = sunzilog_receive_chars(up, channel, regs); | |
568 | if (r3 & CHAEXT) | |
569 | sunzilog_status_handle(up, channel, regs); | |
570 | if (r3 & CHATxIP) | |
571 | sunzilog_transmit_chars(up, channel); | |
572 | } | |
573 | spin_unlock(&up->port.lock); | |
574 | ||
575 | if (tty) | |
576 | tty_flip_buffer_push(tty); | |
577 | ||
578 | /* Channel B */ | |
579 | up = up->next; | |
580 | channel = ZILOG_CHANNEL_FROM_PORT(&up->port); | |
581 | ||
582 | spin_lock(&up->port.lock); | |
583 | tty = NULL; | |
584 | if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) { | |
585 | sbus_writeb(RES_H_IUS, &channel->control); | |
586 | ZSDELAY(); | |
587 | ZS_WSYNC(channel); | |
588 | ||
589 | if (r3 & CHBRxIP) | |
590 | tty = sunzilog_receive_chars(up, channel, regs); | |
591 | if (r3 & CHBEXT) | |
592 | sunzilog_status_handle(up, channel, regs); | |
593 | if (r3 & CHBTxIP) | |
594 | sunzilog_transmit_chars(up, channel); | |
595 | } | |
596 | spin_unlock(&up->port.lock); | |
597 | ||
598 | if (tty) | |
599 | tty_flip_buffer_push(tty); | |
600 | ||
601 | up = up->next; | |
602 | } | |
603 | ||
604 | return IRQ_HANDLED; | |
605 | } | |
606 | ||
607 | /* A convenient way to quickly get R0 status. The caller must _not_ hold the | |
608 | * port lock, it is acquired here. | |
609 | */ | |
610 | static __inline__ unsigned char sunzilog_read_channel_status(struct uart_port *port) | |
611 | { | |
612 | struct zilog_channel __iomem *channel; | |
1da177e4 LT |
613 | unsigned char status; |
614 | ||
1da177e4 LT |
615 | channel = ZILOG_CHANNEL_FROM_PORT(port); |
616 | status = sbus_readb(&channel->control); | |
617 | ZSDELAY(); | |
618 | ||
1da177e4 LT |
619 | return status; |
620 | } | |
621 | ||
622 | /* The port lock is not held. */ | |
623 | static unsigned int sunzilog_tx_empty(struct uart_port *port) | |
624 | { | |
c5f4644e | 625 | unsigned long flags; |
1da177e4 LT |
626 | unsigned char status; |
627 | unsigned int ret; | |
628 | ||
c5f4644e RK |
629 | spin_lock_irqsave(&port->lock, flags); |
630 | ||
1da177e4 | 631 | status = sunzilog_read_channel_status(port); |
c5f4644e RK |
632 | |
633 | spin_unlock_irqrestore(&port->lock, flags); | |
634 | ||
1da177e4 LT |
635 | if (status & Tx_BUF_EMP) |
636 | ret = TIOCSER_TEMT; | |
637 | else | |
638 | ret = 0; | |
639 | ||
640 | return ret; | |
641 | } | |
642 | ||
c5f4644e | 643 | /* The port lock is held and interrupts are disabled. */ |
1da177e4 LT |
644 | static unsigned int sunzilog_get_mctrl(struct uart_port *port) |
645 | { | |
646 | unsigned char status; | |
647 | unsigned int ret; | |
648 | ||
649 | status = sunzilog_read_channel_status(port); | |
650 | ||
651 | ret = 0; | |
652 | if (status & DCD) | |
653 | ret |= TIOCM_CAR; | |
654 | if (status & SYNC) | |
655 | ret |= TIOCM_DSR; | |
656 | if (status & CTS) | |
657 | ret |= TIOCM_CTS; | |
658 | ||
659 | return ret; | |
660 | } | |
661 | ||
662 | /* The port lock is held and interrupts are disabled. */ | |
663 | static void sunzilog_set_mctrl(struct uart_port *port, unsigned int mctrl) | |
664 | { | |
665 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; | |
666 | struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); | |
667 | unsigned char set_bits, clear_bits; | |
668 | ||
669 | set_bits = clear_bits = 0; | |
670 | ||
671 | if (mctrl & TIOCM_RTS) | |
672 | set_bits |= RTS; | |
673 | else | |
674 | clear_bits |= RTS; | |
675 | if (mctrl & TIOCM_DTR) | |
676 | set_bits |= DTR; | |
677 | else | |
678 | clear_bits |= DTR; | |
679 | ||
680 | /* NOTE: Not subject to 'transmitter active' rule. */ | |
681 | up->curregs[R5] |= set_bits; | |
682 | up->curregs[R5] &= ~clear_bits; | |
683 | write_zsreg(channel, R5, up->curregs[R5]); | |
684 | } | |
685 | ||
686 | /* The port lock is held and interrupts are disabled. */ | |
b129a8cc | 687 | static void sunzilog_stop_tx(struct uart_port *port) |
1da177e4 LT |
688 | { |
689 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; | |
690 | ||
691 | up->flags |= SUNZILOG_FLAG_TX_STOPPED; | |
692 | } | |
693 | ||
694 | /* The port lock is held and interrupts are disabled. */ | |
b129a8cc | 695 | static void sunzilog_start_tx(struct uart_port *port) |
1da177e4 LT |
696 | { |
697 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; | |
698 | struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); | |
699 | unsigned char status; | |
700 | ||
701 | up->flags |= SUNZILOG_FLAG_TX_ACTIVE; | |
702 | up->flags &= ~SUNZILOG_FLAG_TX_STOPPED; | |
703 | ||
704 | status = sbus_readb(&channel->control); | |
705 | ZSDELAY(); | |
706 | ||
707 | /* TX busy? Just wait for the TX done interrupt. */ | |
708 | if (!(status & Tx_BUF_EMP)) | |
709 | return; | |
710 | ||
711 | /* Send the first character to jump-start the TX done | |
712 | * IRQ sending engine. | |
713 | */ | |
714 | if (port->x_char) { | |
715 | sbus_writeb(port->x_char, &channel->data); | |
716 | ZSDELAY(); | |
717 | ZS_WSYNC(channel); | |
718 | ||
719 | port->icount.tx++; | |
720 | port->x_char = 0; | |
721 | } else { | |
722 | struct circ_buf *xmit = &port->info->xmit; | |
723 | ||
724 | sbus_writeb(xmit->buf[xmit->tail], &channel->data); | |
725 | ZSDELAY(); | |
726 | ZS_WSYNC(channel); | |
727 | ||
728 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
729 | port->icount.tx++; | |
730 | ||
731 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
732 | uart_write_wakeup(&up->port); | |
733 | } | |
734 | } | |
735 | ||
736 | /* The port lock is held. */ | |
737 | static void sunzilog_stop_rx(struct uart_port *port) | |
738 | { | |
739 | struct uart_sunzilog_port *up = UART_ZILOG(port); | |
740 | struct zilog_channel __iomem *channel; | |
741 | ||
742 | if (ZS_IS_CONS(up)) | |
743 | return; | |
744 | ||
745 | channel = ZILOG_CHANNEL_FROM_PORT(port); | |
746 | ||
747 | /* Disable all RX interrupts. */ | |
748 | up->curregs[R1] &= ~RxINT_MASK; | |
749 | sunzilog_maybe_update_regs(up, channel); | |
750 | } | |
751 | ||
752 | /* The port lock is held. */ | |
753 | static void sunzilog_enable_ms(struct uart_port *port) | |
754 | { | |
755 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; | |
756 | struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); | |
757 | unsigned char new_reg; | |
758 | ||
759 | new_reg = up->curregs[R15] | (DCDIE | SYNCIE | CTSIE); | |
760 | if (new_reg != up->curregs[R15]) { | |
761 | up->curregs[R15] = new_reg; | |
762 | ||
763 | /* NOTE: Not subject to 'transmitter active' rule. */ | |
764 | write_zsreg(channel, R15, up->curregs[R15]); | |
765 | } | |
766 | } | |
767 | ||
768 | /* The port lock is not held. */ | |
769 | static void sunzilog_break_ctl(struct uart_port *port, int break_state) | |
770 | { | |
771 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; | |
772 | struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(port); | |
773 | unsigned char set_bits, clear_bits, new_reg; | |
774 | unsigned long flags; | |
775 | ||
776 | set_bits = clear_bits = 0; | |
777 | ||
778 | if (break_state) | |
779 | set_bits |= SND_BRK; | |
780 | else | |
781 | clear_bits |= SND_BRK; | |
782 | ||
783 | spin_lock_irqsave(&port->lock, flags); | |
784 | ||
785 | new_reg = (up->curregs[R5] | set_bits) & ~clear_bits; | |
786 | if (new_reg != up->curregs[R5]) { | |
787 | up->curregs[R5] = new_reg; | |
788 | ||
789 | /* NOTE: Not subject to 'transmitter active' rule. */ | |
790 | write_zsreg(channel, R5, up->curregs[R5]); | |
791 | } | |
792 | ||
793 | spin_unlock_irqrestore(&port->lock, flags); | |
794 | } | |
795 | ||
796 | static void __sunzilog_startup(struct uart_sunzilog_port *up) | |
797 | { | |
798 | struct zilog_channel __iomem *channel; | |
799 | ||
800 | channel = ZILOG_CHANNEL_FROM_PORT(&up->port); | |
801 | up->prev_status = sbus_readb(&channel->control); | |
802 | ||
803 | /* Enable receiver and transmitter. */ | |
804 | up->curregs[R3] |= RxENAB; | |
805 | up->curregs[R5] |= TxENAB; | |
806 | ||
807 | up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; | |
808 | sunzilog_maybe_update_regs(up, channel); | |
809 | } | |
810 | ||
811 | static int sunzilog_startup(struct uart_port *port) | |
812 | { | |
813 | struct uart_sunzilog_port *up = UART_ZILOG(port); | |
814 | unsigned long flags; | |
815 | ||
816 | if (ZS_IS_CONS(up)) | |
817 | return 0; | |
818 | ||
819 | spin_lock_irqsave(&port->lock, flags); | |
820 | __sunzilog_startup(up); | |
821 | spin_unlock_irqrestore(&port->lock, flags); | |
822 | return 0; | |
823 | } | |
824 | ||
825 | /* | |
826 | * The test for ZS_IS_CONS is explained by the following e-mail: | |
827 | ***** | |
828 | * From: Russell King <rmk@arm.linux.org.uk> | |
829 | * Date: Sun, 8 Dec 2002 10:18:38 +0000 | |
830 | * | |
831 | * On Sun, Dec 08, 2002 at 02:43:36AM -0500, Pete Zaitcev wrote: | |
832 | * > I boot my 2.5 boxes using "console=ttyS0,9600" argument, | |
833 | * > and I noticed that something is not right with reference | |
834 | * > counting in this case. It seems that when the console | |
835 | * > is open by kernel initially, this is not accounted | |
836 | * > as an open, and uart_startup is not called. | |
837 | * | |
838 | * That is correct. We are unable to call uart_startup when the serial | |
839 | * console is initialised because it may need to allocate memory (as | |
840 | * request_irq does) and the memory allocators may not have been | |
841 | * initialised. | |
842 | * | |
843 | * 1. initialise the port into a state where it can send characters in the | |
844 | * console write method. | |
845 | * | |
846 | * 2. don't do the actual hardware shutdown in your shutdown() method (but | |
847 | * do the normal software shutdown - ie, free irqs etc) | |
848 | ***** | |
849 | */ | |
850 | static void sunzilog_shutdown(struct uart_port *port) | |
851 | { | |
852 | struct uart_sunzilog_port *up = UART_ZILOG(port); | |
853 | struct zilog_channel __iomem *channel; | |
854 | unsigned long flags; | |
855 | ||
856 | if (ZS_IS_CONS(up)) | |
857 | return; | |
858 | ||
859 | spin_lock_irqsave(&port->lock, flags); | |
860 | ||
861 | channel = ZILOG_CHANNEL_FROM_PORT(port); | |
862 | ||
863 | /* Disable receiver and transmitter. */ | |
864 | up->curregs[R3] &= ~RxENAB; | |
865 | up->curregs[R5] &= ~TxENAB; | |
866 | ||
867 | /* Disable all interrupts and BRK assertion. */ | |
868 | up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); | |
869 | up->curregs[R5] &= ~SND_BRK; | |
870 | sunzilog_maybe_update_regs(up, channel); | |
871 | ||
872 | spin_unlock_irqrestore(&port->lock, flags); | |
873 | } | |
874 | ||
875 | /* Shared by TTY driver and serial console setup. The port lock is held | |
876 | * and local interrupts are disabled. | |
877 | */ | |
878 | static void | |
879 | sunzilog_convert_to_zs(struct uart_sunzilog_port *up, unsigned int cflag, | |
880 | unsigned int iflag, int brg) | |
881 | { | |
882 | ||
883 | up->curregs[R10] = NRZ; | |
884 | up->curregs[R11] = TCBR | RCBR; | |
885 | ||
886 | /* Program BAUD and clock source. */ | |
887 | up->curregs[R4] &= ~XCLK_MASK; | |
888 | up->curregs[R4] |= X16CLK; | |
889 | up->curregs[R12] = brg & 0xff; | |
890 | up->curregs[R13] = (brg >> 8) & 0xff; | |
891 | up->curregs[R14] = BRSRC | BRENAB; | |
892 | ||
893 | /* Character size, stop bits, and parity. */ | |
894 | up->curregs[3] &= ~RxN_MASK; | |
895 | up->curregs[5] &= ~TxN_MASK; | |
896 | switch (cflag & CSIZE) { | |
897 | case CS5: | |
898 | up->curregs[3] |= Rx5; | |
899 | up->curregs[5] |= Tx5; | |
900 | up->parity_mask = 0x1f; | |
901 | break; | |
902 | case CS6: | |
903 | up->curregs[3] |= Rx6; | |
904 | up->curregs[5] |= Tx6; | |
905 | up->parity_mask = 0x3f; | |
906 | break; | |
907 | case CS7: | |
908 | up->curregs[3] |= Rx7; | |
909 | up->curregs[5] |= Tx7; | |
910 | up->parity_mask = 0x7f; | |
911 | break; | |
912 | case CS8: | |
913 | default: | |
914 | up->curregs[3] |= Rx8; | |
915 | up->curregs[5] |= Tx8; | |
916 | up->parity_mask = 0xff; | |
917 | break; | |
918 | }; | |
919 | up->curregs[4] &= ~0x0c; | |
920 | if (cflag & CSTOPB) | |
921 | up->curregs[4] |= SB2; | |
922 | else | |
923 | up->curregs[4] |= SB1; | |
924 | if (cflag & PARENB) | |
925 | up->curregs[4] |= PAR_ENAB; | |
926 | else | |
927 | up->curregs[4] &= ~PAR_ENAB; | |
928 | if (!(cflag & PARODD)) | |
929 | up->curregs[4] |= PAR_EVEN; | |
930 | else | |
931 | up->curregs[4] &= ~PAR_EVEN; | |
932 | ||
933 | up->port.read_status_mask = Rx_OVR; | |
934 | if (iflag & INPCK) | |
935 | up->port.read_status_mask |= CRC_ERR | PAR_ERR; | |
936 | if (iflag & (BRKINT | PARMRK)) | |
937 | up->port.read_status_mask |= BRK_ABRT; | |
938 | ||
939 | up->port.ignore_status_mask = 0; | |
940 | if (iflag & IGNPAR) | |
941 | up->port.ignore_status_mask |= CRC_ERR | PAR_ERR; | |
942 | if (iflag & IGNBRK) { | |
943 | up->port.ignore_status_mask |= BRK_ABRT; | |
944 | if (iflag & IGNPAR) | |
945 | up->port.ignore_status_mask |= Rx_OVR; | |
946 | } | |
947 | ||
948 | if ((cflag & CREAD) == 0) | |
949 | up->port.ignore_status_mask = 0xff; | |
950 | } | |
951 | ||
952 | /* The port lock is not held. */ | |
953 | static void | |
954 | sunzilog_set_termios(struct uart_port *port, struct termios *termios, | |
955 | struct termios *old) | |
956 | { | |
957 | struct uart_sunzilog_port *up = (struct uart_sunzilog_port *) port; | |
958 | unsigned long flags; | |
959 | int baud, brg; | |
960 | ||
961 | baud = uart_get_baud_rate(port, termios, old, 1200, 76800); | |
962 | ||
963 | spin_lock_irqsave(&up->port.lock, flags); | |
964 | ||
965 | brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); | |
966 | ||
967 | sunzilog_convert_to_zs(up, termios->c_cflag, termios->c_iflag, brg); | |
968 | ||
969 | if (UART_ENABLE_MS(&up->port, termios->c_cflag)) | |
970 | up->flags |= SUNZILOG_FLAG_MODEM_STATUS; | |
971 | else | |
972 | up->flags &= ~SUNZILOG_FLAG_MODEM_STATUS; | |
973 | ||
974 | up->cflag = termios->c_cflag; | |
975 | ||
976 | sunzilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(port)); | |
977 | ||
978 | uart_update_timeout(port, termios->c_cflag, baud); | |
979 | ||
980 | spin_unlock_irqrestore(&up->port.lock, flags); | |
981 | } | |
982 | ||
983 | static const char *sunzilog_type(struct uart_port *port) | |
984 | { | |
985 | return "SunZilog"; | |
986 | } | |
987 | ||
988 | /* We do not request/release mappings of the registers here, this | |
989 | * happens at early serial probe time. | |
990 | */ | |
991 | static void sunzilog_release_port(struct uart_port *port) | |
992 | { | |
993 | } | |
994 | ||
995 | static int sunzilog_request_port(struct uart_port *port) | |
996 | { | |
997 | return 0; | |
998 | } | |
999 | ||
1000 | /* These do not need to do anything interesting either. */ | |
1001 | static void sunzilog_config_port(struct uart_port *port, int flags) | |
1002 | { | |
1003 | } | |
1004 | ||
1005 | /* We do not support letting the user mess with the divisor, IRQ, etc. */ | |
1006 | static int sunzilog_verify_port(struct uart_port *port, struct serial_struct *ser) | |
1007 | { | |
1008 | return -EINVAL; | |
1009 | } | |
1010 | ||
1011 | static struct uart_ops sunzilog_pops = { | |
1012 | .tx_empty = sunzilog_tx_empty, | |
1013 | .set_mctrl = sunzilog_set_mctrl, | |
1014 | .get_mctrl = sunzilog_get_mctrl, | |
1015 | .stop_tx = sunzilog_stop_tx, | |
1016 | .start_tx = sunzilog_start_tx, | |
1017 | .stop_rx = sunzilog_stop_rx, | |
1018 | .enable_ms = sunzilog_enable_ms, | |
1019 | .break_ctl = sunzilog_break_ctl, | |
1020 | .startup = sunzilog_startup, | |
1021 | .shutdown = sunzilog_shutdown, | |
1022 | .set_termios = sunzilog_set_termios, | |
1023 | .type = sunzilog_type, | |
1024 | .release_port = sunzilog_release_port, | |
1025 | .request_port = sunzilog_request_port, | |
1026 | .config_port = sunzilog_config_port, | |
1027 | .verify_port = sunzilog_verify_port, | |
1028 | }; | |
1029 | ||
1030 | static struct uart_sunzilog_port *sunzilog_port_table; | |
1031 | static struct zilog_layout __iomem **sunzilog_chip_regs; | |
1032 | ||
1033 | static struct uart_sunzilog_port *sunzilog_irq_chain; | |
1034 | static int zilog_irq = -1; | |
1035 | ||
1036 | static struct uart_driver sunzilog_reg = { | |
1037 | .owner = THIS_MODULE, | |
1038 | .driver_name = "ttyS", | |
1039 | .devfs_name = "tts/", | |
1040 | .dev_name = "ttyS", | |
1041 | .major = TTY_MAJOR, | |
1042 | }; | |
1043 | ||
1044 | static void * __init alloc_one_table(unsigned long size) | |
1045 | { | |
1046 | void *ret; | |
1047 | ||
1048 | ret = kmalloc(size, GFP_KERNEL); | |
1049 | if (ret != NULL) | |
1050 | memset(ret, 0, size); | |
1051 | ||
1052 | return ret; | |
1053 | } | |
1054 | ||
1055 | static void __init sunzilog_alloc_tables(void) | |
1056 | { | |
1057 | sunzilog_port_table = | |
1058 | alloc_one_table(NUM_CHANNELS * sizeof(struct uart_sunzilog_port)); | |
1059 | sunzilog_chip_regs = | |
1060 | alloc_one_table(NUM_SUNZILOG * sizeof(struct zilog_layout __iomem *)); | |
1061 | ||
1062 | if (sunzilog_port_table == NULL || sunzilog_chip_regs == NULL) { | |
1063 | prom_printf("SunZilog: Cannot allocate tables.\n"); | |
1064 | prom_halt(); | |
1065 | } | |
1066 | } | |
1067 | ||
1068 | #ifdef CONFIG_SPARC64 | |
1069 | ||
1070 | /* We used to attempt to use the address property of the Zilog device node | |
1071 | * but that totally is not necessary on sparc64. | |
1072 | */ | |
1073 | static struct zilog_layout __iomem * __init get_zs_sun4u(int chip, int zsnode) | |
1074 | { | |
37616578 | 1075 | void __iomem *mapped_addr; |
1da177e4 LT |
1076 | unsigned int sun4u_ino; |
1077 | struct sbus_bus *sbus = NULL; | |
1078 | struct sbus_dev *sdev = NULL; | |
1079 | int err; | |
1080 | ||
1081 | if (central_bus == NULL) { | |
1082 | for_each_sbus(sbus) { | |
1083 | for_each_sbusdev(sdev, sbus) { | |
1084 | if (sdev->prom_node == zsnode) | |
1085 | goto found; | |
1086 | } | |
1087 | } | |
1088 | } | |
1089 | found: | |
1090 | if (sdev == NULL && central_bus == NULL) { | |
1091 | prom_printf("SunZilog: sdev&¢ral == NULL for " | |
1092 | "Zilog %d in get_zs_sun4u.\n", chip); | |
1093 | prom_halt(); | |
1094 | } | |
1095 | if (central_bus == NULL) { | |
1096 | mapped_addr = | |
1097 | sbus_ioremap(&sdev->resource[0], 0, | |
1098 | PAGE_SIZE, | |
1099 | "Zilog Registers"); | |
1100 | } else { | |
1101 | struct linux_prom_registers zsregs[1]; | |
1102 | ||
1103 | err = prom_getproperty(zsnode, "reg", | |
1104 | (char *) &zsregs[0], | |
1105 | sizeof(zsregs)); | |
1106 | if (err == -1) { | |
1107 | prom_printf("SunZilog: Cannot map " | |
1108 | "Zilog %d regs on " | |
1109 | "central bus.\n", chip); | |
1110 | prom_halt(); | |
1111 | } | |
1112 | apply_fhc_ranges(central_bus->child, | |
1113 | &zsregs[0], 1); | |
1114 | apply_central_ranges(central_bus, &zsregs[0], 1); | |
37616578 WLII |
1115 | mapped_addr = (void __iomem *) |
1116 | ((((u64)zsregs[0].which_io)<<32UL) | | |
1117 | ((u64)zsregs[0].phys_addr)); | |
1da177e4 LT |
1118 | } |
1119 | ||
1120 | if (zilog_irq == -1) { | |
1121 | if (central_bus) { | |
1122 | unsigned long iclr, imap; | |
1123 | ||
1124 | iclr = central_bus->child->fhc_regs.uregs | |
1125 | + FHC_UREGS_ICLR; | |
1126 | imap = central_bus->child->fhc_regs.uregs | |
1127 | + FHC_UREGS_IMAP; | |
1128 | zilog_irq = build_irq(12, 0, iclr, imap); | |
1129 | } else { | |
1130 | err = prom_getproperty(zsnode, "interrupts", | |
1131 | (char *) &sun4u_ino, | |
1132 | sizeof(sun4u_ino)); | |
1133 | zilog_irq = sbus_build_irq(sbus_root, sun4u_ino); | |
1134 | } | |
1135 | } | |
1136 | ||
1137 | return (struct zilog_layout __iomem *) mapped_addr; | |
1138 | } | |
1139 | #else /* CONFIG_SPARC64 */ | |
1140 | ||
1141 | /* | |
1142 | * XXX The sun4d case is utterly screwed: it tries to re-walk the tree | |
1143 | * (for the 3rd time) in order to find bootbus and cpu. Streamline it. | |
1144 | */ | |
1145 | static struct zilog_layout __iomem * __init get_zs_sun4cmd(int chip, int node) | |
1146 | { | |
1147 | struct linux_prom_irqs irq_info[2]; | |
1148 | void __iomem *mapped_addr = NULL; | |
1149 | int zsnode, cpunode, bbnode; | |
1150 | struct linux_prom_registers zsreg[4]; | |
1151 | struct resource res; | |
1152 | ||
1153 | if (sparc_cpu_model == sun4d) { | |
1154 | int walk; | |
1155 | ||
1156 | zsnode = 0; | |
1157 | bbnode = 0; | |
1158 | cpunode = 0; | |
1159 | for (walk = prom_getchild(prom_root_node); | |
1160 | (walk = prom_searchsiblings(walk, "cpu-unit")) != 0; | |
1161 | walk = prom_getsibling(walk)) { | |
1162 | bbnode = prom_getchild(walk); | |
1163 | if (bbnode && | |
1164 | (bbnode = prom_searchsiblings(bbnode, "bootbus"))) { | |
1165 | if ((zsnode = prom_getchild(bbnode)) == node) { | |
1166 | cpunode = walk; | |
1167 | break; | |
1168 | } | |
1169 | } | |
1170 | } | |
1171 | if (!walk) { | |
1172 | prom_printf("SunZilog: Cannot find the %d'th bootbus on sun4d.\n", | |
1173 | (chip / 2)); | |
1174 | prom_halt(); | |
1175 | } | |
1176 | ||
1177 | if (prom_getproperty(zsnode, "reg", | |
1178 | (char *) zsreg, sizeof(zsreg)) == -1) { | |
1179 | prom_printf("SunZilog: Cannot map Zilog %d\n", chip); | |
1180 | prom_halt(); | |
1181 | } | |
1182 | /* XXX Looks like an off by one? */ | |
1183 | prom_apply_generic_ranges(bbnode, cpunode, zsreg, 1); | |
1184 | res.start = zsreg[0].phys_addr; | |
1185 | res.end = res.start + (8 - 1); | |
1186 | res.flags = zsreg[0].which_io | IORESOURCE_IO; | |
1187 | mapped_addr = sbus_ioremap(&res, 0, 8, "Zilog Serial"); | |
1188 | ||
1189 | } else { | |
1190 | zsnode = node; | |
1191 | ||
1192 | #if 0 /* XXX When was this used? */ | |
1193 | if (prom_getintdefault(zsnode, "slave", -1) != chipid) { | |
1194 | zsnode = prom_getsibling(zsnode); | |
1195 | continue; | |
1196 | } | |
1197 | #endif | |
1198 | ||
1199 | /* | |
1200 | * "address" is only present on ports that OBP opened | |
1201 | * (from Mitch Bradley's "Hitchhiker's Guide to OBP"). | |
1202 | * We do not use it. | |
1203 | */ | |
1204 | ||
1205 | if (prom_getproperty(zsnode, "reg", | |
1206 | (char *) zsreg, sizeof(zsreg)) == -1) { | |
1207 | prom_printf("SunZilog: Cannot map Zilog %d\n", chip); | |
1208 | prom_halt(); | |
1209 | } | |
1210 | if (sparc_cpu_model == sun4m) /* Crude. Pass parent. XXX */ | |
1211 | prom_apply_obio_ranges(zsreg, 1); | |
1212 | res.start = zsreg[0].phys_addr; | |
1213 | res.end = res.start + (8 - 1); | |
1214 | res.flags = zsreg[0].which_io | IORESOURCE_IO; | |
1215 | mapped_addr = sbus_ioremap(&res, 0, 8, "Zilog Serial"); | |
1216 | } | |
1217 | ||
1218 | if (prom_getproperty(zsnode, "intr", | |
1219 | (char *) irq_info, sizeof(irq_info)) | |
1220 | % sizeof(struct linux_prom_irqs)) { | |
1221 | prom_printf("SunZilog: Cannot get IRQ property for Zilog %d.\n", | |
1222 | chip); | |
1223 | prom_halt(); | |
1224 | } | |
1225 | if (zilog_irq == -1) { | |
1226 | zilog_irq = irq_info[0].pri; | |
1227 | } else if (zilog_irq != irq_info[0].pri) { | |
1228 | /* XXX. Dumb. Should handle per-chip IRQ, for add-ons. */ | |
1229 | prom_printf("SunZilog: Inconsistent IRQ layout for Zilog %d.\n", | |
1230 | chip); | |
1231 | prom_halt(); | |
1232 | } | |
1233 | ||
1234 | return (struct zilog_layout __iomem *) mapped_addr; | |
1235 | } | |
1236 | #endif /* !(CONFIG_SPARC64) */ | |
1237 | ||
1238 | /* Get the address of the registers for SunZilog instance CHIP. */ | |
1239 | static struct zilog_layout __iomem * __init get_zs(int chip, int node) | |
1240 | { | |
1241 | if (chip < 0 || chip >= NUM_SUNZILOG) { | |
1242 | prom_printf("SunZilog: Illegal chip number %d in get_zs.\n", chip); | |
1243 | prom_halt(); | |
1244 | } | |
1245 | ||
1246 | #ifdef CONFIG_SPARC64 | |
1247 | return get_zs_sun4u(chip, node); | |
1248 | #else | |
1249 | ||
1250 | if (sparc_cpu_model == sun4) { | |
1251 | struct resource res; | |
1252 | ||
1253 | /* Not probe-able, hard code it. */ | |
1254 | switch (chip) { | |
1255 | case 0: | |
1256 | res.start = 0xf1000000; | |
1257 | break; | |
1258 | case 1: | |
1259 | res.start = 0xf0000000; | |
1260 | break; | |
1261 | }; | |
1262 | zilog_irq = 12; | |
1263 | res.end = (res.start + (8 - 1)); | |
1264 | res.flags = IORESOURCE_IO; | |
1265 | return sbus_ioremap(&res, 0, 8, "SunZilog"); | |
1266 | } | |
1267 | ||
1268 | return get_zs_sun4cmd(chip, node); | |
1269 | #endif | |
1270 | } | |
1271 | ||
1272 | #define ZS_PUT_CHAR_MAX_DELAY 2000 /* 10 ms */ | |
1273 | ||
1274 | static void sunzilog_put_char(struct zilog_channel __iomem *channel, unsigned char ch) | |
1275 | { | |
1276 | int loops = ZS_PUT_CHAR_MAX_DELAY; | |
1277 | ||
1278 | /* This is a timed polling loop so do not switch the explicit | |
1279 | * udelay with ZSDELAY as that is a NOP on some platforms. -DaveM | |
1280 | */ | |
1281 | do { | |
1282 | unsigned char val = sbus_readb(&channel->control); | |
1283 | if (val & Tx_BUF_EMP) { | |
1284 | ZSDELAY(); | |
1285 | break; | |
1286 | } | |
1287 | udelay(5); | |
1288 | } while (--loops); | |
1289 | ||
1290 | sbus_writeb(ch, &channel->data); | |
1291 | ZSDELAY(); | |
1292 | ZS_WSYNC(channel); | |
1293 | } | |
1294 | ||
1295 | #ifdef CONFIG_SERIO | |
1296 | ||
1297 | static DEFINE_SPINLOCK(sunzilog_serio_lock); | |
1298 | ||
1299 | static int sunzilog_serio_write(struct serio *serio, unsigned char ch) | |
1300 | { | |
1301 | struct uart_sunzilog_port *up = serio->port_data; | |
1302 | unsigned long flags; | |
1303 | ||
1304 | spin_lock_irqsave(&sunzilog_serio_lock, flags); | |
1305 | ||
1306 | sunzilog_put_char(ZILOG_CHANNEL_FROM_PORT(&up->port), ch); | |
1307 | ||
1308 | spin_unlock_irqrestore(&sunzilog_serio_lock, flags); | |
1309 | ||
1310 | return 0; | |
1311 | } | |
1312 | ||
1313 | static int sunzilog_serio_open(struct serio *serio) | |
1314 | { | |
1315 | struct uart_sunzilog_port *up = serio->port_data; | |
1316 | unsigned long flags; | |
1317 | int ret; | |
1318 | ||
1319 | spin_lock_irqsave(&sunzilog_serio_lock, flags); | |
1320 | if (!up->serio_open) { | |
1321 | up->serio_open = 1; | |
1322 | ret = 0; | |
1323 | } else | |
1324 | ret = -EBUSY; | |
1325 | spin_unlock_irqrestore(&sunzilog_serio_lock, flags); | |
1326 | ||
1327 | return ret; | |
1328 | } | |
1329 | ||
1330 | static void sunzilog_serio_close(struct serio *serio) | |
1331 | { | |
1332 | struct uart_sunzilog_port *up = serio->port_data; | |
1333 | unsigned long flags; | |
1334 | ||
1335 | spin_lock_irqsave(&sunzilog_serio_lock, flags); | |
1336 | up->serio_open = 0; | |
1337 | spin_unlock_irqrestore(&sunzilog_serio_lock, flags); | |
1338 | } | |
1339 | ||
1340 | #endif /* CONFIG_SERIO */ | |
1341 | ||
1342 | #ifdef CONFIG_SERIAL_SUNZILOG_CONSOLE | |
1343 | static void | |
1344 | sunzilog_console_write(struct console *con, const char *s, unsigned int count) | |
1345 | { | |
1346 | struct uart_sunzilog_port *up = &sunzilog_port_table[con->index]; | |
1347 | struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(&up->port); | |
1348 | unsigned long flags; | |
1349 | int i; | |
1350 | ||
1351 | spin_lock_irqsave(&up->port.lock, flags); | |
1352 | for (i = 0; i < count; i++, s++) { | |
1353 | sunzilog_put_char(channel, *s); | |
1354 | if (*s == 10) | |
1355 | sunzilog_put_char(channel, 13); | |
1356 | } | |
1357 | udelay(2); | |
1358 | spin_unlock_irqrestore(&up->port.lock, flags); | |
1359 | } | |
1360 | ||
1361 | static int __init sunzilog_console_setup(struct console *con, char *options) | |
1362 | { | |
1363 | struct uart_sunzilog_port *up = &sunzilog_port_table[con->index]; | |
1364 | unsigned long flags; | |
1365 | int baud, brg; | |
1366 | ||
1367 | printk(KERN_INFO "Console: ttyS%d (SunZilog zs%d)\n", | |
1368 | (sunzilog_reg.minor - 64) + con->index, con->index); | |
1369 | ||
1370 | /* Get firmware console settings. */ | |
1371 | sunserial_console_termios(con); | |
1372 | ||
1373 | /* Firmware console speed is limited to 150-->38400 baud so | |
1374 | * this hackish cflag thing is OK. | |
1375 | */ | |
1376 | switch (con->cflag & CBAUD) { | |
1377 | case B150: baud = 150; break; | |
1378 | case B300: baud = 300; break; | |
1379 | case B600: baud = 600; break; | |
1380 | case B1200: baud = 1200; break; | |
1381 | case B2400: baud = 2400; break; | |
1382 | case B4800: baud = 4800; break; | |
1383 | default: case B9600: baud = 9600; break; | |
1384 | case B19200: baud = 19200; break; | |
1385 | case B38400: baud = 38400; break; | |
1386 | }; | |
1387 | ||
1388 | brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); | |
1389 | ||
1390 | spin_lock_irqsave(&up->port.lock, flags); | |
1391 | ||
1392 | up->curregs[R15] = BRKIE; | |
1393 | sunzilog_convert_to_zs(up, con->cflag, 0, brg); | |
1394 | ||
1395 | sunzilog_set_mctrl(&up->port, TIOCM_DTR | TIOCM_RTS); | |
1396 | __sunzilog_startup(up); | |
1397 | ||
1398 | spin_unlock_irqrestore(&up->port.lock, flags); | |
1399 | ||
1400 | return 0; | |
1401 | } | |
1402 | ||
1403 | static struct console sunzilog_console = { | |
1404 | .name = "ttyS", | |
1405 | .write = sunzilog_console_write, | |
1406 | .device = uart_console_device, | |
1407 | .setup = sunzilog_console_setup, | |
1408 | .flags = CON_PRINTBUFFER, | |
1409 | .index = -1, | |
1410 | .data = &sunzilog_reg, | |
1411 | }; | |
1412 | #define SUNZILOG_CONSOLE (&sunzilog_console) | |
1413 | ||
1414 | static int __init sunzilog_console_init(void) | |
1415 | { | |
1416 | int i; | |
1417 | ||
1418 | if (con_is_present()) | |
1419 | return 0; | |
1420 | ||
1421 | for (i = 0; i < NUM_CHANNELS; i++) { | |
1422 | int this_minor = sunzilog_reg.minor + i; | |
1423 | ||
1424 | if ((this_minor - 64) == (serial_console - 1)) | |
1425 | break; | |
1426 | } | |
1427 | if (i == NUM_CHANNELS) | |
1428 | return 0; | |
1429 | ||
1430 | sunzilog_console.index = i; | |
1431 | sunzilog_port_table[i].flags |= SUNZILOG_FLAG_IS_CONS; | |
1432 | register_console(&sunzilog_console); | |
1433 | return 0; | |
1434 | } | |
1435 | #else | |
1436 | #define SUNZILOG_CONSOLE (NULL) | |
1437 | #define sunzilog_console_init() do { } while (0) | |
1438 | #endif | |
1439 | ||
1440 | /* | |
1441 | * We scan the PROM tree recursively. This is the most reliable way | |
1442 | * to find Zilog nodes on various platforms. However, we face an extreme | |
1443 | * shortage of kernel stack, so we must be very careful. To that end, | |
1444 | * we scan only to a certain depth, and we use a common property buffer | |
1445 | * in the scan structure. | |
1446 | */ | |
1447 | #define ZS_PROPSIZE 128 | |
1448 | #define ZS_SCAN_DEPTH 5 | |
1449 | ||
1450 | struct zs_probe_scan { | |
1451 | int depth; | |
1452 | void (*scanner)(struct zs_probe_scan *t, int node); | |
1453 | ||
1454 | int devices; | |
1455 | char prop[ZS_PROPSIZE]; | |
1456 | }; | |
1457 | ||
1458 | static int __inline__ sunzilog_node_ok(int node, const char *name, int len) | |
1459 | { | |
1460 | if (strncmp(name, "zs", len) == 0) | |
1461 | return 1; | |
1462 | /* Don't fold this procedure just yet. Compare to su_node_ok(). */ | |
1463 | return 0; | |
1464 | } | |
1465 | ||
1466 | static void __init sunzilog_scan(struct zs_probe_scan *t, int node) | |
1467 | { | |
1468 | int len; | |
1469 | ||
1470 | for (; node != 0; node = prom_getsibling(node)) { | |
1471 | len = prom_getproperty(node, "name", t->prop, ZS_PROPSIZE); | |
1472 | if (len <= 1) | |
1473 | continue; /* Broken PROM node */ | |
1474 | if (sunzilog_node_ok(node, t->prop, len)) { | |
1475 | (*t->scanner)(t, node); | |
1476 | } else { | |
1477 | if (t->depth < ZS_SCAN_DEPTH) { | |
1478 | t->depth++; | |
1479 | sunzilog_scan(t, prom_getchild(node)); | |
1480 | --t->depth; | |
1481 | } | |
1482 | } | |
1483 | } | |
1484 | } | |
1485 | ||
1486 | static void __init sunzilog_prepare(void) | |
1487 | { | |
1488 | struct uart_sunzilog_port *up; | |
1489 | struct zilog_layout __iomem *rp; | |
1490 | int channel, chip; | |
1491 | ||
1492 | /* | |
1493 | * Temporary fix. | |
1494 | */ | |
1495 | for (channel = 0; channel < NUM_CHANNELS; channel++) | |
1496 | spin_lock_init(&sunzilog_port_table[channel].port.lock); | |
1497 | ||
1498 | sunzilog_irq_chain = up = &sunzilog_port_table[0]; | |
1499 | for (channel = 0; channel < NUM_CHANNELS - 1; channel++) | |
1500 | up[channel].next = &up[channel + 1]; | |
1501 | up[channel].next = NULL; | |
1502 | ||
1503 | for (chip = 0; chip < NUM_SUNZILOG; chip++) { | |
1504 | rp = sunzilog_chip_regs[chip]; | |
1505 | up[(chip * 2) + 0].port.membase = (void __iomem *)&rp->channelA; | |
1506 | up[(chip * 2) + 1].port.membase = (void __iomem *)&rp->channelB; | |
1507 | ||
1508 | /* Channel A */ | |
1509 | up[(chip * 2) + 0].port.iotype = SERIAL_IO_MEM; | |
1510 | up[(chip * 2) + 0].port.irq = zilog_irq; | |
1511 | up[(chip * 2) + 0].port.uartclk = ZS_CLOCK; | |
1512 | up[(chip * 2) + 0].port.fifosize = 1; | |
1513 | up[(chip * 2) + 0].port.ops = &sunzilog_pops; | |
1514 | up[(chip * 2) + 0].port.type = PORT_SUNZILOG; | |
1515 | up[(chip * 2) + 0].port.flags = 0; | |
1516 | up[(chip * 2) + 0].port.line = (chip * 2) + 0; | |
1517 | up[(chip * 2) + 0].flags |= SUNZILOG_FLAG_IS_CHANNEL_A; | |
1518 | ||
1519 | /* Channel B */ | |
1520 | up[(chip * 2) + 1].port.iotype = SERIAL_IO_MEM; | |
1521 | up[(chip * 2) + 1].port.irq = zilog_irq; | |
1522 | up[(chip * 2) + 1].port.uartclk = ZS_CLOCK; | |
1523 | up[(chip * 2) + 1].port.fifosize = 1; | |
1524 | up[(chip * 2) + 1].port.ops = &sunzilog_pops; | |
1525 | up[(chip * 2) + 1].port.type = PORT_SUNZILOG; | |
1526 | up[(chip * 2) + 1].port.flags = 0; | |
1527 | up[(chip * 2) + 1].port.line = (chip * 2) + 1; | |
1528 | up[(chip * 2) + 1].flags |= 0; | |
1529 | } | |
1530 | } | |
1531 | ||
1532 | static void __init sunzilog_init_kbdms(struct uart_sunzilog_port *up, int channel) | |
1533 | { | |
1534 | int baud, brg; | |
1535 | ||
1536 | if (channel == KEYBOARD_LINE) { | |
1537 | up->flags |= SUNZILOG_FLAG_CONS_KEYB; | |
1538 | up->cflag = B1200 | CS8 | CLOCAL | CREAD; | |
1539 | baud = 1200; | |
1540 | } else { | |
1541 | up->flags |= SUNZILOG_FLAG_CONS_MOUSE; | |
1542 | up->cflag = B4800 | CS8 | CLOCAL | CREAD; | |
1543 | baud = 4800; | |
1544 | } | |
1545 | printk(KERN_INFO "zs%d at 0x%p (irq = %s) is a SunZilog\n", | |
1546 | channel, up->port.membase, __irq_itoa(zilog_irq)); | |
1547 | ||
1548 | up->curregs[R15] = BRKIE; | |
1549 | brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); | |
1550 | sunzilog_convert_to_zs(up, up->cflag, 0, brg); | |
1551 | sunzilog_set_mctrl(&up->port, TIOCM_DTR | TIOCM_RTS); | |
1552 | __sunzilog_startup(up); | |
1553 | } | |
1554 | ||
1555 | #ifdef CONFIG_SERIO | |
1556 | static void __init sunzilog_register_serio(struct uart_sunzilog_port *up, int channel) | |
1557 | { | |
1558 | struct serio *serio; | |
1559 | ||
1560 | up->serio = serio = kmalloc(sizeof(struct serio), GFP_KERNEL); | |
1561 | if (serio) { | |
1562 | memset(serio, 0, sizeof(*serio)); | |
1563 | ||
1564 | serio->port_data = up; | |
1565 | ||
1566 | serio->id.type = SERIO_RS232; | |
1567 | if (channel == KEYBOARD_LINE) { | |
1568 | serio->id.proto = SERIO_SUNKBD; | |
1569 | strlcpy(serio->name, "zskbd", sizeof(serio->name)); | |
1570 | } else { | |
1571 | serio->id.proto = SERIO_SUN; | |
1572 | serio->id.extra = 1; | |
1573 | strlcpy(serio->name, "zsms", sizeof(serio->name)); | |
1574 | } | |
1575 | strlcpy(serio->phys, | |
1576 | (channel == KEYBOARD_LINE ? "zs/serio0" : "zs/serio1"), | |
1577 | sizeof(serio->phys)); | |
1578 | ||
1579 | serio->write = sunzilog_serio_write; | |
1580 | serio->open = sunzilog_serio_open; | |
1581 | serio->close = sunzilog_serio_close; | |
1582 | ||
1583 | serio_register_port(serio); | |
1584 | } else { | |
1585 | printk(KERN_WARNING "zs%d: not enough memory for serio port\n", | |
1586 | channel); | |
1587 | } | |
1588 | } | |
1589 | #endif | |
1590 | ||
1591 | static void __init sunzilog_init_hw(void) | |
1592 | { | |
1593 | int i; | |
1594 | ||
1595 | for (i = 0; i < NUM_CHANNELS; i++) { | |
1596 | struct uart_sunzilog_port *up = &sunzilog_port_table[i]; | |
1597 | struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(&up->port); | |
1598 | unsigned long flags; | |
1599 | int baud, brg; | |
1600 | ||
1601 | spin_lock_irqsave(&up->port.lock, flags); | |
1602 | ||
1603 | if (ZS_IS_CHANNEL_A(up)) { | |
1604 | write_zsreg(channel, R9, FHWRES); | |
1605 | ZSDELAY_LONG(); | |
1606 | (void) read_zsreg(channel, R0); | |
1607 | } | |
1608 | ||
1609 | if (i == KEYBOARD_LINE || i == MOUSE_LINE) { | |
1610 | sunzilog_init_kbdms(up, i); | |
1611 | up->curregs[R9] |= (NV | MIE); | |
1612 | write_zsreg(channel, R9, up->curregs[R9]); | |
1613 | } else { | |
1614 | /* Normal serial TTY. */ | |
1615 | up->parity_mask = 0xff; | |
1616 | up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; | |
1617 | up->curregs[R4] = PAR_EVEN | X16CLK | SB1; | |
1618 | up->curregs[R3] = RxENAB | Rx8; | |
1619 | up->curregs[R5] = TxENAB | Tx8; | |
1620 | up->curregs[R9] = NV | MIE; | |
1621 | up->curregs[R10] = NRZ; | |
1622 | up->curregs[R11] = TCBR | RCBR; | |
1623 | baud = 9600; | |
1624 | brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); | |
1625 | up->curregs[R12] = (brg & 0xff); | |
1626 | up->curregs[R13] = (brg >> 8) & 0xff; | |
1627 | up->curregs[R14] = BRSRC | BRENAB; | |
1628 | __load_zsregs(channel, up->curregs); | |
1629 | write_zsreg(channel, R9, up->curregs[R9]); | |
1630 | } | |
1631 | ||
1632 | spin_unlock_irqrestore(&up->port.lock, flags); | |
1633 | ||
1634 | #ifdef CONFIG_SERIO | |
1635 | if (i == KEYBOARD_LINE || i == MOUSE_LINE) | |
1636 | sunzilog_register_serio(up, i); | |
1637 | #endif | |
1638 | } | |
1639 | } | |
1640 | ||
1641 | static struct zilog_layout __iomem * __init get_zs(int chip, int node); | |
1642 | ||
1643 | static void __init sunzilog_scan_probe(struct zs_probe_scan *t, int node) | |
1644 | { | |
1645 | sunzilog_chip_regs[t->devices] = get_zs(t->devices, node); | |
1646 | t->devices++; | |
1647 | } | |
1648 | ||
1649 | static int __init sunzilog_ports_init(void) | |
1650 | { | |
1651 | struct zs_probe_scan scan; | |
1652 | int ret; | |
1653 | int uart_count; | |
1654 | int i; | |
1655 | ||
1656 | printk(KERN_DEBUG "SunZilog: %d chips.\n", NUM_SUNZILOG); | |
1657 | ||
1658 | scan.scanner = sunzilog_scan_probe; | |
1659 | scan.depth = 0; | |
1660 | scan.devices = 0; | |
1661 | sunzilog_scan(&scan, prom_getchild(prom_root_node)); | |
1662 | ||
1663 | sunzilog_prepare(); | |
1664 | ||
1665 | if (request_irq(zilog_irq, sunzilog_interrupt, SA_SHIRQ, | |
1666 | "SunZilog", sunzilog_irq_chain)) { | |
1667 | prom_printf("SunZilog: Unable to register zs interrupt handler.\n"); | |
1668 | prom_halt(); | |
1669 | } | |
1670 | ||
1671 | sunzilog_init_hw(); | |
1672 | ||
1673 | /* We can only init this once we have probed the Zilogs | |
1674 | * in the system. Do not count channels assigned to keyboards | |
1675 | * or mice when we are deciding how many ports to register. | |
1676 | */ | |
1677 | uart_count = 0; | |
1678 | for (i = 0; i < NUM_CHANNELS; i++) { | |
1679 | struct uart_sunzilog_port *up = &sunzilog_port_table[i]; | |
1680 | ||
1681 | if (ZS_IS_KEYB(up) || ZS_IS_MOUSE(up)) | |
1682 | continue; | |
1683 | ||
1684 | uart_count++; | |
1685 | } | |
1686 | ||
1687 | sunzilog_reg.nr = uart_count; | |
1688 | sunzilog_reg.cons = SUNZILOG_CONSOLE; | |
1689 | ||
1690 | sunzilog_reg.minor = sunserial_current_minor; | |
1691 | sunserial_current_minor += uart_count; | |
1692 | ||
1693 | ret = uart_register_driver(&sunzilog_reg); | |
1694 | if (ret == 0) { | |
1695 | sunzilog_console_init(); | |
1696 | for (i = 0; i < NUM_CHANNELS; i++) { | |
1697 | struct uart_sunzilog_port *up = &sunzilog_port_table[i]; | |
1698 | ||
1699 | if (ZS_IS_KEYB(up) || ZS_IS_MOUSE(up)) | |
1700 | continue; | |
1701 | ||
1702 | if (uart_add_one_port(&sunzilog_reg, &up->port)) { | |
1703 | printk(KERN_ERR | |
1704 | "SunZilog: failed to add port zs%d\n", i); | |
1705 | } | |
1706 | } | |
1707 | } | |
1708 | ||
1709 | return ret; | |
1710 | } | |
1711 | ||
1712 | static void __init sunzilog_scan_count(struct zs_probe_scan *t, int node) | |
1713 | { | |
1714 | t->devices++; | |
1715 | } | |
1716 | ||
1717 | static int __init sunzilog_ports_count(void) | |
1718 | { | |
1719 | struct zs_probe_scan scan; | |
1720 | ||
1721 | /* Sun4 Zilog setup is hard coded, no probing to do. */ | |
1722 | if (sparc_cpu_model == sun4) | |
1723 | return 2; | |
1724 | ||
1725 | scan.scanner = sunzilog_scan_count; | |
1726 | scan.depth = 0; | |
1727 | scan.devices = 0; | |
1728 | ||
1729 | sunzilog_scan(&scan, prom_getchild(prom_root_node)); | |
1730 | ||
1731 | return scan.devices; | |
1732 | } | |
1733 | ||
1734 | static int __init sunzilog_init(void) | |
1735 | { | |
1736 | ||
1737 | NUM_SUNZILOG = sunzilog_ports_count(); | |
1738 | if (NUM_SUNZILOG == 0) | |
1739 | return -ENODEV; | |
1740 | ||
1741 | sunzilog_alloc_tables(); | |
1742 | ||
1743 | sunzilog_ports_init(); | |
1744 | ||
1745 | return 0; | |
1746 | } | |
1747 | ||
1748 | static void __exit sunzilog_exit(void) | |
1749 | { | |
1750 | int i; | |
1751 | ||
1752 | for (i = 0; i < NUM_CHANNELS; i++) { | |
1753 | struct uart_sunzilog_port *up = &sunzilog_port_table[i]; | |
1754 | ||
1755 | if (ZS_IS_KEYB(up) || ZS_IS_MOUSE(up)) { | |
1756 | #ifdef CONFIG_SERIO | |
1757 | if (up->serio) { | |
1758 | serio_unregister_port(up->serio); | |
1759 | up->serio = NULL; | |
1760 | } | |
1761 | #endif | |
1762 | } else | |
1763 | uart_remove_one_port(&sunzilog_reg, &up->port); | |
1764 | } | |
1765 | ||
1766 | uart_unregister_driver(&sunzilog_reg); | |
1767 | } | |
1768 | ||
1769 | module_init(sunzilog_init); | |
1770 | module_exit(sunzilog_exit); | |
1771 | ||
1772 | MODULE_AUTHOR("David S. Miller"); | |
1773 | MODULE_DESCRIPTION("Sun Zilog serial port driver"); | |
1774 | MODULE_LICENSE("GPL"); |