[mirror_ubuntu-zesty-kernel.git] / drivers / serial / uartlite.c

/*
 * uartlite.c: Serial driver for Xilinx uartlite serial controller
 *
 * Peter Korsgaard <jacmet@sunsite.dk>
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

#include <linux/platform_device.h>
#include <linux/module.h>
#include <linux/console.h>
#include <linux/serial.h>
#include <linux/serial_core.h>
#include <linux/tty.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <asm/io.h>

#define ULITE_NAME		"ttyUL"
#define ULITE_MAJOR		204
#define ULITE_MINOR		187
#define ULITE_NR_UARTS		4

/* For register details see datasheet:
   http://www.xilinx.com/bvdocs/ipcenter/data_sheet/opb_uartlite.pdf
*/
#define ULITE_RX		0x00
#define ULITE_TX		0x04
#define ULITE_STATUS		0x08
#define ULITE_CONTROL		0x0c

#define ULITE_REGION		16

#define ULITE_STATUS_RXVALID	0x01
#define ULITE_STATUS_RXFULL	0x02
#define ULITE_STATUS_TXEMPTY	0x04
#define ULITE_STATUS_TXFULL	0x08
#define ULITE_STATUS_IE		0x10
#define ULITE_STATUS_OVERRUN	0x20
#define ULITE_STATUS_FRAME	0x40
#define ULITE_STATUS_PARITY	0x80

#define ULITE_CONTROL_RST_TX	0x01
#define ULITE_CONTROL_RST_RX	0x02
#define ULITE_CONTROL_IE	0x10


static struct uart_port ulite_ports[ULITE_NR_UARTS];

static int ulite_receive(struct uart_port *port, int stat)
{
	struct tty_struct *tty = port->info->tty;
	unsigned char ch = 0;
	char flag = TTY_NORMAL;

	if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
		     | ULITE_STATUS_FRAME)) == 0)
		return 0;

	/* stats */
	if (stat & ULITE_STATUS_RXVALID) {
		port->icount.rx++;
		ch = in_be32((void*)port->membase + ULITE_RX);

		if (stat & ULITE_STATUS_PARITY)
			port->icount.parity++;
	}

	if (stat & ULITE_STATUS_OVERRUN)
		port->icount.overrun++;

	if (stat & ULITE_STATUS_FRAME)
		port->icount.frame++;


	/* drop byte with parity error if IGNPAR specificed */
	if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
		stat &= ~ULITE_STATUS_RXVALID;

	stat &= port->read_status_mask;

	if (stat & ULITE_STATUS_PARITY)
		flag = TTY_PARITY;


	stat &= ~port->ignore_status_mask;

	if (stat & ULITE_STATUS_RXVALID)
		tty_insert_flip_char(tty, ch, flag);

	if (stat & ULITE_STATUS_FRAME)
		tty_insert_flip_char(tty, 0, TTY_FRAME);

	if (stat & ULITE_STATUS_OVERRUN)
		tty_insert_flip_char(tty, 0, TTY_OVERRUN);

	return 1;
}

static int ulite_transmit(struct uart_port *port, int stat)
{
	struct circ_buf *xmit  = &port->info->xmit;

	if (stat & ULITE_STATUS_TXFULL)
		return 0;

	if (port->x_char) {
		out_be32((void*)port->membase + ULITE_TX, port->x_char);
		port->x_char = 0;
		port->icount.tx++;
		return 1;
	}

	if (uart_circ_empty(xmit) || uart_tx_stopped(port))
		return 0;

	out_be32((void*)port->membase + ULITE_TX, xmit->buf[xmit->tail]);
	xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
	port->icount.tx++;

	/* wake up */
	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
		uart_write_wakeup(port);

	return 1;
}

static irqreturn_t ulite_isr(int irq, void *dev_id)
{
	struct uart_port *port = (struct uart_port *)dev_id;
	int busy;

	do {
		int stat = in_be32((void*)port->membase + ULITE_STATUS);
		busy  = ulite_receive(port, stat);
		busy |= ulite_transmit(port, stat);
	} while (busy);

	tty_flip_buffer_push(port->info->tty);

	return IRQ_HANDLED;
}

static unsigned int ulite_tx_empty(struct uart_port *port)
{
	unsigned long flags;
	unsigned int ret;

	spin_lock_irqsave(&port->lock, flags);
	ret = in_be32((void*)port->membase + ULITE_STATUS);
	spin_unlock_irqrestore(&port->lock, flags);

	return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
}

static unsigned int ulite_get_mctrl(struct uart_port *port)
{
	return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
}

static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
{
	/* N/A */
}

static void ulite_stop_tx(struct uart_port *port)
{
	/* N/A */
}

static void ulite_start_tx(struct uart_port *port)
{
	ulite_transmit(port, in_be32((void*)port->membase + ULITE_STATUS));
}

static void ulite_stop_rx(struct uart_port *port)
{
	/* don't forward any more data (like !CREAD) */
	port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
		| ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
}

static void ulite_enable_ms(struct uart_port *port)
{
	/* N/A */
}

static void ulite_break_ctl(struct uart_port *port, int ctl)
{
	/* N/A */
}

static int ulite_startup(struct uart_port *port)
{
	int ret;

	ret = request_irq(port->irq, ulite_isr,
			  IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "uartlite", port);
	if (ret)
		return ret;

	out_be32((void*)port->membase + ULITE_CONTROL,
	         ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
	out_be32((void*)port->membase + ULITE_CONTROL, ULITE_CONTROL_IE);

	return 0;
}

static void ulite_shutdown(struct uart_port *port)
{
	out_be32((void*)port->membase + ULITE_CONTROL, 0);
	in_be32((void*)port->membase + ULITE_CONTROL); /* dummy */
	free_irq(port->irq, port);
}

static void ulite_set_termios(struct uart_port *port, struct ktermios *termios,
			      struct ktermios *old)
{
	unsigned long flags;
	unsigned int baud;

	spin_lock_irqsave(&port->lock, flags);

	port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
		| ULITE_STATUS_TXFULL;

	if (termios->c_iflag & INPCK)
		port->read_status_mask |=
			ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;

	port->ignore_status_mask = 0;
	if (termios->c_iflag & IGNPAR)
		port->ignore_status_mask |= ULITE_STATUS_PARITY
			| ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;

	/* ignore all characters if CREAD is not set */
	if ((termios->c_cflag & CREAD) == 0)
		port->ignore_status_mask |=
			ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
			| ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;

	/* update timeout */
	baud = uart_get_baud_rate(port, termios, old, 0, 460800);
	uart_update_timeout(port, termios->c_cflag, baud);

	spin_unlock_irqrestore(&port->lock, flags);
}

static const char *ulite_type(struct uart_port *port)
{
	return port->type == PORT_UARTLITE ? "uartlite" : NULL;
}

static void ulite_release_port(struct uart_port *port)
{
	release_mem_region(port->mapbase, ULITE_REGION);
	iounmap(port->membase);
	port->membase = NULL;
}

static int ulite_request_port(struct uart_port *port)
{
	if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
		dev_err(port->dev, "Memory region busy\n");
		return -EBUSY;
	}

	port->membase = ioremap(port->mapbase, ULITE_REGION);
	if (!port->membase) {
		dev_err(port->dev, "Unable to map registers\n");
		release_mem_region(port->mapbase, ULITE_REGION);
		return -EBUSY;
	}

	return 0;
}

static void ulite_config_port(struct uart_port *port, int flags)
{
	if (!ulite_request_port(port))
		port->type = PORT_UARTLITE;
}

static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
{
	/* we don't want the core code to modify any port params */
	return -EINVAL;
}

static struct uart_ops ulite_ops = {
	.tx_empty	= ulite_tx_empty,
	.set_mctrl	= ulite_set_mctrl,
	.get_mctrl	= ulite_get_mctrl,
	.stop_tx	= ulite_stop_tx,
	.start_tx	= ulite_start_tx,
	.stop_rx	= ulite_stop_rx,
	.enable_ms	= ulite_enable_ms,
	.break_ctl	= ulite_break_ctl,
	.startup	= ulite_startup,
	.shutdown	= ulite_shutdown,
	.set_termios	= ulite_set_termios,
	.type		= ulite_type,
	.release_port	= ulite_release_port,
	.request_port	= ulite_request_port,
	.config_port	= ulite_config_port,
	.verify_port	= ulite_verify_port
};

#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
static void ulite_console_wait_tx(struct uart_port *port)
{
	int i;

	/* wait up to 10ms for the character(s) to be sent */
	for (i = 0; i < 10000; i++) {
		if (in_be32((void*)port->membase + ULITE_STATUS) & ULITE_STATUS_TXEMPTY)
			break;
		udelay(1);
	}
}

static void ulite_console_putchar(struct uart_port *port, int ch)
{
	ulite_console_wait_tx(port);
	out_be32((void*)port->membase + ULITE_TX, ch);
}

static void ulite_console_write(struct console *co, const char *s,
				unsigned int count)
{
	struct uart_port *port = &ulite_ports[co->index];
	unsigned long flags;
	unsigned int ier;
	int locked = 1;

	if (oops_in_progress) {
		locked = spin_trylock_irqsave(&port->lock, flags);
	} else
		spin_lock_irqsave(&port->lock, flags);

	/* save and disable interrupt */
	ier = in_be32((void*)port->membase + ULITE_STATUS) & ULITE_STATUS_IE;
	out_be32((void*)port->membase + ULITE_CONTROL, 0);

	uart_console_write(port, s, count, ulite_console_putchar);

	ulite_console_wait_tx(port);

	/* restore interrupt state */
	if (ier)
		out_be32((void*)port->membase + ULITE_CONTROL, ULITE_CONTROL_IE);

	if (locked)
		spin_unlock_irqrestore(&port->lock, flags);
}

static int __init ulite_console_setup(struct console *co, char *options)
{
	struct uart_port *port;
	int baud = 9600;
	int bits = 8;
	int parity = 'n';
	int flow = 'n';

	if (co->index < 0 || co->index >= ULITE_NR_UARTS)
		return -EINVAL;

	port = &ulite_ports[co->index];

	/* not initialized yet? */
	if (!port->membase)
		return -ENODEV;

	if (options)
		uart_parse_options(options, &baud, &parity, &bits, &flow);

	return uart_set_options(port, co, baud, parity, bits, flow);
}

static struct uart_driver ulite_uart_driver;

static struct console ulite_console = {
	.name	= ULITE_NAME,
	.write	= ulite_console_write,
	.device	= uart_console_device,
	.setup	= ulite_console_setup,
	.flags	= CON_PRINTBUFFER,
	.index	= -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
	.data	= &ulite_uart_driver,
};

static int __init ulite_console_init(void)
{
	register_console(&ulite_console);
	return 0;
}

console_initcall(ulite_console_init);

#endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */

static struct uart_driver ulite_uart_driver = {
	.owner		= THIS_MODULE,
	.driver_name	= "uartlite",
	.dev_name	= ULITE_NAME,
	.major		= ULITE_MAJOR,
	.minor		= ULITE_MINOR,
	.nr		= ULITE_NR_UARTS,
#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
	.cons		= &ulite_console,
#endif
};

static int __devinit ulite_probe(struct platform_device *pdev)
{
	struct resource *res, *res2;
	struct uart_port *port;

	if (pdev->id < 0 || pdev->id >= ULITE_NR_UARTS)
		return -EINVAL;

	if (ulite_ports[pdev->id].membase)
		return -EBUSY;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res)
		return -ENODEV;

	res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
	if (!res2)
		return -ENODEV;

	port = &ulite_ports[pdev->id];

	port->fifosize	= 16;
	port->regshift	= 2;
	port->iotype	= UPIO_MEM;
	port->iobase	= 1; /* mark port in use */
	port->mapbase	= res->start;
	port->membase	= NULL;
	port->ops	= &ulite_ops;
	port->irq	= res2->start;
	port->flags	= UPF_BOOT_AUTOCONF;
	port->dev	= &pdev->dev;
	port->type	= PORT_UNKNOWN;
	port->line	= pdev->id;

	uart_add_one_port(&ulite_uart_driver, port);
	platform_set_drvdata(pdev, port);

	return 0;
}

static int ulite_remove(struct platform_device *pdev)
{
	struct uart_port *port = platform_get_drvdata(pdev);

	platform_set_drvdata(pdev, NULL);

	if (port)
		uart_remove_one_port(&ulite_uart_driver, port);

	/* mark port as free */
	port->membase = NULL;

	return 0;
}

static struct platform_driver ulite_platform_driver = {
	.probe	= ulite_probe,
	.remove	= ulite_remove,
	.driver	= {
		   .owner = THIS_MODULE,
		   .name  = "uartlite",
		   },
};

int __init ulite_init(void)
{
	int ret;

	ret = uart_register_driver(&ulite_uart_driver);
	if (ret)
		return ret;

	ret = platform_driver_register(&ulite_platform_driver);
	if (ret)
		uart_unregister_driver(&ulite_uart_driver);

	return ret;
}

void __exit ulite_exit(void)
{
	platform_driver_unregister(&ulite_platform_driver);
	uart_unregister_driver(&ulite_uart_driver);
}

module_init(ulite_init);
module_exit(ulite_exit);

MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
MODULE_DESCRIPTION("Xilinx uartlite serial driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
238b8721 PK	1	/*
	2	* uartlite.c: Serial driver for Xilinx uartlite serial controller
	3	*
	4	* Peter Korsgaard <jacmet@sunsite.dk>
	5	*
	6	* This file is licensed under the terms of the GNU General Public License
	7	* version 2. This program is licensed "as is" without any warranty of any
	8	* kind, whether express or implied.
	9	*/
	10
	11	#include <linux/platform_device.h>
	12	#include <linux/module.h>
	13	#include <linux/console.h>
	14	#include <linux/serial.h>
	15	#include <linux/serial_core.h>
	16	#include <linux/tty.h>
	17	#include <linux/delay.h>
	18	#include <linux/interrupt.h>
	19	#include <asm/io.h>
	20
00775828	21	#define ULITE_NAME "ttyUL"
238b8721 PK	22	#define ULITE_MAJOR 204
	23	#define ULITE_MINOR 187
	24	#define ULITE_NR_UARTS 4
	25
	26	/* For register details see datasheet:
	27	http://www.xilinx.com/bvdocs/ipcenter/data_sheet/opb_uartlite.pdf
	28	*/
	29	#define ULITE_RX 0x00
	30	#define ULITE_TX 0x04
	31	#define ULITE_STATUS 0x08
	32	#define ULITE_CONTROL 0x0c
	33
	34	#define ULITE_REGION 16
	35
	36	#define ULITE_STATUS_RXVALID 0x01
	37	#define ULITE_STATUS_RXFULL 0x02
	38	#define ULITE_STATUS_TXEMPTY 0x04
	39	#define ULITE_STATUS_TXFULL 0x08
	40	#define ULITE_STATUS_IE 0x10
	41	#define ULITE_STATUS_OVERRUN 0x20
	42	#define ULITE_STATUS_FRAME 0x40
	43	#define ULITE_STATUS_PARITY 0x80
	44
	45	#define ULITE_CONTROL_RST_TX 0x01
	46	#define ULITE_CONTROL_RST_RX 0x02
	47	#define ULITE_CONTROL_IE 0x10
	48
	49
483c79db	50	static struct uart_port ulite_ports[ULITE_NR_UARTS];
238b8721 PK	51
	52	static int ulite_receive(struct uart_port *port, int stat)
	53	{
	54	struct tty_struct *tty = port->info->tty;
	55	unsigned char ch = 0;
	56	char flag = TTY_NORMAL;
	57
	58	if ((stat & (ULITE_STATUS_RXVALID \| ULITE_STATUS_OVERRUN
	59	\| ULITE_STATUS_FRAME)) == 0)
	60	return 0;
	61
	62	/* stats */
	63	if (stat & ULITE_STATUS_RXVALID) {
	64	port->icount.rx++;
a15da8ef	65	ch = in_be32((void*)port->membase + ULITE_RX);
238b8721 PK	66
	67	if (stat & ULITE_STATUS_PARITY)
	68	port->icount.parity++;
	69	}
	70
	71	if (stat & ULITE_STATUS_OVERRUN)
	72	port->icount.overrun++;
	73
	74	if (stat & ULITE_STATUS_FRAME)
	75	port->icount.frame++;
	76
	77
	78	/* drop byte with parity error if IGNPAR specificed */
	79	if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
	80	stat &= ~ULITE_STATUS_RXVALID;
	81
	82	stat &= port->read_status_mask;
	83
	84	if (stat & ULITE_STATUS_PARITY)
	85	flag = TTY_PARITY;
	86
	87
	88	stat &= ~port->ignore_status_mask;
	89
	90	if (stat & ULITE_STATUS_RXVALID)
	91	tty_insert_flip_char(tty, ch, flag);
	92
	93	if (stat & ULITE_STATUS_FRAME)
	94	tty_insert_flip_char(tty, 0, TTY_FRAME);
	95
	96	if (stat & ULITE_STATUS_OVERRUN)
	97	tty_insert_flip_char(tty, 0, TTY_OVERRUN);
	98
	99	return 1;
	100	}
	101
	102	static int ulite_transmit(struct uart_port *port, int stat)
	103	{
	104	struct circ_buf *xmit = &port->info->xmit;
	105
	106	if (stat & ULITE_STATUS_TXFULL)
	107	return 0;
	108
	109	if (port->x_char) {
a15da8ef	110	out_be32((void*)port->membase + ULITE_TX, port->x_char);
238b8721 PK	111	port->x_char = 0;
	112	port->icount.tx++;
	113	return 1;
	114	}
	115
	116	if (uart_circ_empty(xmit) \|\| uart_tx_stopped(port))
	117	return 0;
	118
a15da8ef	119	out_be32((void*)port->membase + ULITE_TX, xmit->buf[xmit->tail]);
238b8721 PK	120	xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
	121	port->icount.tx++;
	122
	123	/* wake up */
	124	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
	125	uart_write_wakeup(port);
	126
	127	return 1;
	128	}
	129
	130	static irqreturn_t ulite_isr(int irq, void *dev_id)
	131	{
	132	struct uart_port port = (struct uart_port )dev_id;
	133	int busy;
	134
	135	do {
a15da8ef	136	int stat = in_be32((void*)port->membase + ULITE_STATUS);
238b8721 PK	137	busy = ulite_receive(port, stat);
	138	busy \|= ulite_transmit(port, stat);
	139	} while (busy);
	140
	141	tty_flip_buffer_push(port->info->tty);
	142
	143	return IRQ_HANDLED;
	144	}
	145
	146	static unsigned int ulite_tx_empty(struct uart_port *port)
	147	{
	148	unsigned long flags;
	149	unsigned int ret;
	150
	151	spin_lock_irqsave(&port->lock, flags);
a15da8ef	152	ret = in_be32((void*)port->membase + ULITE_STATUS);
238b8721 PK	153	spin_unlock_irqrestore(&port->lock, flags);
	154
	155	return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
	156	}
	157
	158	static unsigned int ulite_get_mctrl(struct uart_port *port)
	159	{
	160	return TIOCM_CTS \| TIOCM_DSR \| TIOCM_CAR;
	161	}
	162
	163	static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
	164	{
	165	/* N/A */
	166	}
	167
	168	static void ulite_stop_tx(struct uart_port *port)
	169	{
	170	/* N/A */
	171	}
	172
	173	static void ulite_start_tx(struct uart_port *port)
	174	{
a15da8ef	175	ulite_transmit(port, in_be32((void*)port->membase + ULITE_STATUS));
238b8721 PK	176	}
	177
	178	static void ulite_stop_rx(struct uart_port *port)
	179	{
	180	/* don't forward any more data (like !CREAD) */
	181	port->ignore_status_mask = ULITE_STATUS_RXVALID \| ULITE_STATUS_PARITY
	182	\| ULITE_STATUS_FRAME \| ULITE_STATUS_OVERRUN;
	183	}
	184
	185	static void ulite_enable_ms(struct uart_port *port)
	186	{
	187	/* N/A */
	188	}
	189
	190	static void ulite_break_ctl(struct uart_port *port, int ctl)
	191	{
	192	/* N/A */
	193	}
	194
	195	static int ulite_startup(struct uart_port *port)
	196	{
	197	int ret;
	198
	199	ret = request_irq(port->irq, ulite_isr,
	200	IRQF_DISABLED \| IRQF_SAMPLE_RANDOM, "uartlite", port);
	201	if (ret)
	202	return ret;
	203
a15da8ef GL	204	out_be32((void*)port->membase + ULITE_CONTROL,
	205	ULITE_CONTROL_RST_RX \| ULITE_CONTROL_RST_TX);
	206	out_be32((void*)port->membase + ULITE_CONTROL, ULITE_CONTROL_IE);
238b8721 PK	207
	208	return 0;
	209	}
	210
	211	static void ulite_shutdown(struct uart_port *port)
	212	{
a15da8ef GL	213	out_be32((void*)port->membase + ULITE_CONTROL, 0);
a15da8ef GL	214	in_be32((void)port->membase + ULITE_CONTROL); / dummy */
238b8721 PK	215	free_irq(port->irq, port);
	216	}
	217
606d099c AC	218	static void ulite_set_termios(struct uart_port port, struct ktermios termios,
606d099c AC	219	struct ktermios *old)
238b8721 PK	220	{
	221	unsigned long flags;
	222	unsigned int baud;
	223
	224	spin_lock_irqsave(&port->lock, flags);
	225
	226	port->read_status_mask = ULITE_STATUS_RXVALID \| ULITE_STATUS_OVERRUN
	227	\| ULITE_STATUS_TXFULL;
	228
	229	if (termios->c_iflag & INPCK)
	230	port->read_status_mask \|=
	231	ULITE_STATUS_PARITY \| ULITE_STATUS_FRAME;
	232
	233	port->ignore_status_mask = 0;
	234	if (termios->c_iflag & IGNPAR)
	235	port->ignore_status_mask \|= ULITE_STATUS_PARITY
	236	\| ULITE_STATUS_FRAME \| ULITE_STATUS_OVERRUN;
	237
	238	/* ignore all characters if CREAD is not set */
	239	if ((termios->c_cflag & CREAD) == 0)
	240	port->ignore_status_mask \|=
	241	ULITE_STATUS_RXVALID \| ULITE_STATUS_PARITY
	242	\| ULITE_STATUS_FRAME \| ULITE_STATUS_OVERRUN;
	243
	244	/* update timeout */
	245	baud = uart_get_baud_rate(port, termios, old, 0, 460800);
	246	uart_update_timeout(port, termios->c_cflag, baud);
	247
	248	spin_unlock_irqrestore(&port->lock, flags);
	249	}
	250
	251	static const char ulite_type(struct uart_port port)
	252	{
	253	return port->type == PORT_UARTLITE ? "uartlite" : NULL;
	254	}
	255
	256	static void ulite_release_port(struct uart_port *port)
	257	{
	258	release_mem_region(port->mapbase, ULITE_REGION);
	259	iounmap(port->membase);
b81831c6	260	port->membase = NULL;
238b8721 PK	261	}
	262
	263	static int ulite_request_port(struct uart_port *port)
	264	{
	265	if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
	266	dev_err(port->dev, "Memory region busy\n");
	267	return -EBUSY;
	268	}
	269
	270	port->membase = ioremap(port->mapbase, ULITE_REGION);
	271	if (!port->membase) {
	272	dev_err(port->dev, "Unable to map registers\n");
	273	release_mem_region(port->mapbase, ULITE_REGION);
	274	return -EBUSY;
	275	}
	276
	277	return 0;
	278	}
	279
	280	static void ulite_config_port(struct uart_port *port, int flags)
	281	{
e21654a7 PK	282	if (!ulite_request_port(port))
e21654a7 PK	283	port->type = PORT_UARTLITE;
238b8721 PK	284	}
	285
	286	static int ulite_verify_port(struct uart_port port, struct serial_struct ser)
	287	{
	288	/* we don't want the core code to modify any port params */
	289	return -EINVAL;
	290	}
	291
	292	static struct uart_ops ulite_ops = {
	293	.tx_empty = ulite_tx_empty,
	294	.set_mctrl = ulite_set_mctrl,
	295	.get_mctrl = ulite_get_mctrl,
	296	.stop_tx = ulite_stop_tx,
	297	.start_tx = ulite_start_tx,
	298	.stop_rx = ulite_stop_rx,
	299	.enable_ms = ulite_enable_ms,
	300	.break_ctl = ulite_break_ctl,
	301	.startup = ulite_startup,
	302	.shutdown = ulite_shutdown,
	303	.set_termios = ulite_set_termios,
	304	.type = ulite_type,
	305	.release_port = ulite_release_port,
	306	.request_port = ulite_request_port,
	307	.config_port = ulite_config_port,
	308	.verify_port = ulite_verify_port
	309	};
	310
	311	#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
	312	static void ulite_console_wait_tx(struct uart_port *port)
	313	{
	314	int i;
	315
	316	/* wait up to 10ms for the character(s) to be sent */
	317	for (i = 0; i < 10000; i++) {
a15da8ef	318	if (in_be32((void*)port->membase + ULITE_STATUS) & ULITE_STATUS_TXEMPTY)
238b8721 PK	319	break;
	320	udelay(1);
	321	}
	322	}
	323
	324	static void ulite_console_putchar(struct uart_port *port, int ch)
	325	{
	326	ulite_console_wait_tx(port);
a15da8ef	327	out_be32((void*)port->membase + ULITE_TX, ch);
238b8721 PK	328	}
	329
	330	static void ulite_console_write(struct console co, const char s,
	331	unsigned int count)
	332	{
483c79db	333	struct uart_port *port = &ulite_ports[co->index];
238b8721 PK	334	unsigned long flags;
	335	unsigned int ier;
	336	int locked = 1;
	337
	338	if (oops_in_progress) {
	339	locked = spin_trylock_irqsave(&port->lock, flags);
	340	} else
	341	spin_lock_irqsave(&port->lock, flags);
	342
	343	/* save and disable interrupt */
a15da8ef GL	344	ier = in_be32((void*)port->membase + ULITE_STATUS) & ULITE_STATUS_IE;
a15da8ef GL	345	out_be32((void*)port->membase + ULITE_CONTROL, 0);
238b8721 PK	346
	347	uart_console_write(port, s, count, ulite_console_putchar);
	348
	349	ulite_console_wait_tx(port);
	350
	351	/* restore interrupt state */
	352	if (ier)
a15da8ef	353	out_be32((void*)port->membase + ULITE_CONTROL, ULITE_CONTROL_IE);
238b8721 PK	354
	355	if (locked)
	356	spin_unlock_irqrestore(&port->lock, flags);
	357	}
	358
	359	static int __init ulite_console_setup(struct console co, char options)
	360	{
	361	struct uart_port *port;
	362	int baud = 9600;
	363	int bits = 8;
	364	int parity = 'n';
	365	int flow = 'n';
	366
	367	if (co->index < 0 \|\| co->index >= ULITE_NR_UARTS)
	368	return -EINVAL;
	369
483c79db	370	port = &ulite_ports[co->index];
238b8721 PK	371
	372	/* not initialized yet? */
	373	if (!port->membase)
	374	return -ENODEV;
	375
	376	if (options)
	377	uart_parse_options(options, &baud, &parity, &bits, &flow);
	378
	379	return uart_set_options(port, co, baud, parity, bits, flow);
	380	}
	381
	382	static struct uart_driver ulite_uart_driver;
	383
	384	static struct console ulite_console = {
00775828	385	.name = ULITE_NAME,
238b8721 PK	386	.write = ulite_console_write,
	387	.device = uart_console_device,
	388	.setup = ulite_console_setup,
	389	.flags = CON_PRINTBUFFER,
	390	.index = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
	391	.data = &ulite_uart_driver,
	392	};
	393
	394	static int __init ulite_console_init(void)
	395	{
	396	register_console(&ulite_console);
	397	return 0;
	398	}
	399
	400	console_initcall(ulite_console_init);
	401
	402	#endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
	403
	404	static struct uart_driver ulite_uart_driver = {
	405	.owner = THIS_MODULE,
	406	.driver_name = "uartlite",
00775828	407	.dev_name = ULITE_NAME,
238b8721 PK	408	.major = ULITE_MAJOR,
	409	.minor = ULITE_MINOR,
	410	.nr = ULITE_NR_UARTS,
	411	#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
	412	.cons = &ulite_console,
	413	#endif
	414	};
	415
	416	static int __devinit ulite_probe(struct platform_device *pdev)
	417	{
	418	struct resource res, res2;
	419	struct uart_port *port;
	420
	421	if (pdev->id < 0 \|\| pdev->id >= ULITE_NR_UARTS)
	422	return -EINVAL;
	423
483c79db	424	if (ulite_ports[pdev->id].membase)
238b8721 PK	425	return -EBUSY;
	426
	427	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	428	if (!res)
	429	return -ENODEV;
	430
	431	res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
	432	if (!res2)
	433	return -ENODEV;
	434
483c79db	435	port = &ulite_ports[pdev->id];
238b8721 PK	436
	437	port->fifosize = 16;
	438	port->regshift = 2;
	439	port->iotype = UPIO_MEM;
	440	port->iobase = 1; /* mark port in use */
	441	port->mapbase = res->start;
b81831c6	442	port->membase = NULL;
238b8721 PK	443	port->ops = &ulite_ops;
	444	port->irq = res2->start;
	445	port->flags = UPF_BOOT_AUTOCONF;
	446	port->dev = &pdev->dev;
	447	port->type = PORT_UNKNOWN;
	448	port->line = pdev->id;
	449
	450	uart_add_one_port(&ulite_uart_driver, port);
	451	platform_set_drvdata(pdev, port);
	452
	453	return 0;
	454	}
	455
	456	static int ulite_remove(struct platform_device *pdev)
	457	{
	458	struct uart_port *port = platform_get_drvdata(pdev);
	459
	460	platform_set_drvdata(pdev, NULL);
	461
	462	if (port)
	463	uart_remove_one_port(&ulite_uart_driver, port);
	464
	465	/* mark port as free */
b81831c6	466	port->membase = NULL;
238b8721 PK	467
	468	return 0;
	469	}
	470
	471	static struct platform_driver ulite_platform_driver = {
	472	.probe = ulite_probe,
	473	.remove = ulite_remove,
	474	.driver = {
	475	.owner = THIS_MODULE,
	476	.name = "uartlite",
	477	},
	478	};
	479
	480	int __init ulite_init(void)
	481	{
	482	int ret;
	483
	484	ret = uart_register_driver(&ulite_uart_driver);
	485	if (ret)
	486	return ret;
	487
	488	ret = platform_driver_register(&ulite_platform_driver);
	489	if (ret)
	490	uart_unregister_driver(&ulite_uart_driver);
	491
	492	return ret;
	493	}
	494
	495	void __exit ulite_exit(void)
	496	{
	497	platform_driver_unregister(&ulite_platform_driver);
	498	uart_unregister_driver(&ulite_uart_driver);
	499	}
	500
	501	module_init(ulite_init);
	502	module_exit(ulite_exit);
	503
	504	MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
	505	MODULE_DESCRIPTION("Xilinx uartlite serial driver");
	506	MODULE_LICENSE("GPL");