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Commit | Line | Data |
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ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
1d6a21b0 | 2 | config SH_INTC |
049d2804 | 3 | bool |
1d6a21b0 PM |
4 | select IRQ_DOMAIN |
5 | ||
049d2804 GU |
6 | if SH_INTC |
7 | ||
33fc1a21 PM |
8 | comment "Interrupt controller options" |
9 | ||
10 | config INTC_USERIMASK | |
11 | bool "Userspace interrupt masking support" | |
39c5abbc | 12 | depends on (SUPERH && CPU_SH4A) || COMPILE_TEST |
33fc1a21 PM |
13 | help |
14 | This enables support for hardware-assisted userspace hardirq | |
15 | masking. | |
16 | ||
17 | SH-4A and newer interrupt blocks all support a special shadowed | |
18 | page with all non-masking registers obscured when mapped in to | |
19 | userspace. This is primarily for use by userspace device | |
20 | drivers that are using special priority levels. | |
21 | ||
22 | If in doubt, say N. | |
23 | ||
24 | config INTC_BALANCING | |
25 | bool "Hardware IRQ balancing support" | |
26 | depends on SMP && SUPERH && CPU_SHX3 | |
27 | help | |
28 | This enables support for IRQ auto-distribution mode on SH-X3 | |
29 | SMP parts. All of the balancing and CPU wakeup decisions are | |
30 | taken care of automatically by hardware for distributed | |
31 | vectors. | |
32 | ||
33 | If in doubt, say N. | |
34 | ||
35 | config INTC_MAPPING_DEBUG | |
36 | bool "Expose IRQ to per-controller id mapping via debugfs" | |
37 | depends on DEBUG_FS | |
38 | help | |
39 | This will create a debugfs entry for showing the relationship | |
40 | between system IRQs and the per-controller id tables. | |
41 | ||
42 | If in doubt, say N. | |
049d2804 GU |
43 | |
44 | endif |