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Commit | Line | Data |
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7d44d2ba | 1 | /* |
14fc8b93 | 2 | * Copyright (c) 2011-2014 Samsung Electronics Co., Ltd. |
e28e3014 JL |
3 | * http://www.samsung.com/ |
4 | * | |
7d44d2ba | 5 | * EXYNOS - CPU PMU(Power Management Unit) support |
e28e3014 JL |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
14fc8b93 | 12 | #include <linux/of.h> |
8cfc7fdd | 13 | #include <linux/of_address.h> |
ec7cc5b1 | 14 | #include <linux/of_device.h> |
76640b84 | 15 | #include <linux/mfd/syscon.h> |
14fc8b93 | 16 | #include <linux/platform_device.h> |
af2e0a07 AK |
17 | #include <linux/delay.h> |
18 | ||
2262d6ef PD |
19 | #include <linux/soc/samsung/exynos-regs-pmu.h> |
20 | #include <linux/soc/samsung/exynos-pmu.h> | |
e28e3014 | 21 | |
c21100c9 | 22 | #include "exynos-pmu.h" |
14fc8b93 PD |
23 | |
24 | struct exynos_pmu_context { | |
25 | struct device *dev; | |
26 | const struct exynos_pmu_data *pmu_data; | |
27 | }; | |
28 | ||
c21100c9 | 29 | void __iomem *pmu_base_addr; |
14fc8b93 | 30 | static struct exynos_pmu_context *pmu_context; |
e28e3014 | 31 | |
c21100c9 | 32 | void pmu_raw_writel(u32 val, u32 offset) |
6b7bfd82 PD |
33 | { |
34 | writel_relaxed(val, pmu_base_addr + offset); | |
35 | } | |
36 | ||
c21100c9 | 37 | u32 pmu_raw_readl(u32 offset) |
6b7bfd82 PD |
38 | { |
39 | return readl_relaxed(pmu_base_addr + offset); | |
40 | } | |
41 | ||
7d44d2ba | 42 | void exynos_sys_powerdown_conf(enum sys_powerdown mode) |
e28e3014 | 43 | { |
0dba4dc4 | 44 | unsigned int i; |
ce36f6ad PD |
45 | const struct exynos_pmu_data *pmu_data; |
46 | ||
47 | if (!pmu_context) | |
48 | return; | |
0dba4dc4 | 49 | |
ce36f6ad | 50 | pmu_data = pmu_context->pmu_data; |
60e49ca6 | 51 | |
14fc8b93 PD |
52 | if (pmu_data->powerdown_conf) |
53 | pmu_data->powerdown_conf(mode); | |
5ddfa842 | 54 | |
14fc8b93 PD |
55 | if (pmu_data->pmu_config) { |
56 | for (i = 0; (pmu_data->pmu_config[i].offset != PMU_TABLE_END); i++) | |
57 | pmu_raw_writel(pmu_data->pmu_config[i].val[mode], | |
58 | pmu_data->pmu_config[i].offset); | |
59 | } | |
60 | ||
8fcc774f BZ |
61 | if (pmu_data->powerdown_conf_extra) |
62 | pmu_data->powerdown_conf_extra(mode); | |
63 | ||
14fc8b93 PD |
64 | if (pmu_data->pmu_config_extra) { |
65 | for (i = 0; pmu_data->pmu_config_extra[i].offset != PMU_TABLE_END; i++) | |
66 | pmu_raw_writel(pmu_data->pmu_config_extra[i].val[mode], | |
67 | pmu_data->pmu_config_extra[i].offset); | |
5ddfa842 | 68 | } |
0dba4dc4 JL |
69 | } |
70 | ||
14fc8b93 PD |
71 | /* |
72 | * PMU platform driver and devicetree bindings. | |
73 | */ | |
74 | static const struct of_device_id exynos_pmu_of_device_ids[] = { | |
75 | { | |
8fcc774f BZ |
76 | .compatible = "samsung,exynos3250-pmu", |
77 | .data = &exynos3250_pmu_data, | |
78 | }, { | |
14fc8b93 PD |
79 | .compatible = "samsung,exynos4210-pmu", |
80 | .data = &exynos4210_pmu_data, | |
81 | }, { | |
82 | .compatible = "samsung,exynos4212-pmu", | |
83 | .data = &exynos4212_pmu_data, | |
84 | }, { | |
85 | .compatible = "samsung,exynos4412-pmu", | |
86 | .data = &exynos4412_pmu_data, | |
87 | }, { | |
88 | .compatible = "samsung,exynos5250-pmu", | |
89 | .data = &exynos5250_pmu_data, | |
af2e0a07 AK |
90 | }, { |
91 | .compatible = "samsung,exynos5420-pmu", | |
92 | .data = &exynos5420_pmu_data, | |
14fc8b93 PD |
93 | }, |
94 | { /*sentinel*/ }, | |
95 | }; | |
7d896aac | 96 | |
76640b84 MS |
97 | struct regmap *exynos_get_pmu_regmap(void) |
98 | { | |
99 | struct device_node *np = of_find_matching_node(NULL, | |
100 | exynos_pmu_of_device_ids); | |
101 | if (np) | |
102 | return syscon_node_to_regmap(np); | |
103 | return ERR_PTR(-ENODEV); | |
104 | } | |
105 | EXPORT_SYMBOL_GPL(exynos_get_pmu_regmap); | |
106 | ||
14fc8b93 PD |
107 | static int exynos_pmu_probe(struct platform_device *pdev) |
108 | { | |
14fc8b93 PD |
109 | struct device *dev = &pdev->dev; |
110 | struct resource *res; | |
111 | ||
112 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
113 | pmu_base_addr = devm_ioremap_resource(dev, res); | |
114 | if (IS_ERR(pmu_base_addr)) | |
115 | return PTR_ERR(pmu_base_addr); | |
116 | ||
117 | pmu_context = devm_kzalloc(&pdev->dev, | |
118 | sizeof(struct exynos_pmu_context), | |
119 | GFP_KERNEL); | |
120 | if (!pmu_context) { | |
121 | dev_err(dev, "Cannot allocate memory.\n"); | |
122 | return -ENOMEM; | |
00a351f2 | 123 | } |
14fc8b93 | 124 | pmu_context->dev = dev; |
ec7cc5b1 | 125 | pmu_context->pmu_data = of_device_get_match_data(dev); |
e28e3014 | 126 | |
14fc8b93 PD |
127 | if (pmu_context->pmu_data->pmu_init) |
128 | pmu_context->pmu_data->pmu_init(); | |
129 | ||
130 | platform_set_drvdata(pdev, pmu_context); | |
131 | ||
132 | dev_dbg(dev, "Exynos PMU Driver probe done\n"); | |
0dba4dc4 | 133 | return 0; |
e28e3014 | 134 | } |
14fc8b93 PD |
135 | |
136 | static struct platform_driver exynos_pmu_driver = { | |
137 | .driver = { | |
138 | .name = "exynos-pmu", | |
14fc8b93 PD |
139 | .of_match_table = exynos_pmu_of_device_ids, |
140 | }, | |
141 | .probe = exynos_pmu_probe, | |
142 | }; | |
143 | ||
144 | static int __init exynos_pmu_init(void) | |
145 | { | |
146 | return platform_driver_register(&exynos_pmu_driver); | |
147 | ||
148 | } | |
149 | postcore_initcall(exynos_pmu_init); |