projects / mirror_ubuntu-jammy-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 9c92ab61 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 783c8f4c PDS |
2 | /* |
| 3 | * Copyright (C) 2010 Google, Inc. | |
| 4 | * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. | |
| 5 | * | |
| 6 | * Author: | |
| 7 | * Colin Cross <ccross@android.com> | |
| 783c8f4c PDS |
8 | */ |
| 9 | ||
| 10 | #ifndef __DRIVERS_MISC_TEGRA_FUSE_H | |
| 11 | #define __DRIVERS_MISC_TEGRA_FUSE_H | |
| 12 | ||
| 7e939de1 TR |
13 | #include <linux/dmaengine.h> |
| 14 | #include <linux/types.h> | |
| 783c8f4c | 15 | |
| 7e939de1 TR |
16 | struct tegra_fuse; |
| 17 | ||
| 18 | struct tegra_fuse_info { | |
| 19 | u32 (*read)(struct tegra_fuse *fuse, unsigned int offset); | |
| 20 | unsigned int size; | |
| 21 | unsigned int spare; | |
| 22 | }; | |
| 23 | ||
| 24 | struct tegra_fuse_soc { | |
| 25 | void (*init)(struct tegra_fuse *fuse); | |
| 26 | void (*speedo_init)(struct tegra_sku_info *info); | |
| 27 | int (*probe)(struct tegra_fuse *fuse); | |
| 28 | ||
| 29 | const struct tegra_fuse_info *info; | |
| 30 | }; | |
| 31 | ||
| 32 | struct tegra_fuse { | |
| 33 | struct device *dev; | |
| 34 | void __iomem *base; | |
| 35 | phys_addr_t phys; | |
| 36 | struct clk *clk; | |
| 37 | ||
| 38 | u32 (*read_early)(struct tegra_fuse *fuse, unsigned int offset); | |
| 39 | u32 (*read)(struct tegra_fuse *fuse, unsigned int offset); | |
| 40 | const struct tegra_fuse_soc *soc; | |
| 41 | ||
| 42 | /* APBDMA on Tegra20 */ | |
| 43 | struct { | |
| 44 | struct mutex lock; | |
| 45 | struct completion wait; | |
| 46 | struct dma_chan *chan; | |
| 47 | struct dma_slave_config config; | |
| 48 | dma_addr_t phys; | |
| 49 | u32 *virt; | |
| 50 | } apbdma; | |
| 51 | }; | |
| 783c8f4c | 52 | |
| 783c8f4c PDS |
53 | void tegra_init_revision(void); |
| 54 | void tegra_init_apbmisc(void); | |
| 55 | ||
| 7e939de1 TR |
56 | bool __init tegra_fuse_read_spare(unsigned int spare); |
| 57 | u32 __init tegra_fuse_read_early(unsigned int offset); | |
| 58 | ||
| 783c8f4c PDS |
59 | #ifdef CONFIG_ARCH_TEGRA_2x_SOC |
| 60 | void tegra20_init_speedo_data(struct tegra_sku_info *sku_info); | |
| 783c8f4c PDS |
61 | #endif |
| 62 | ||
| 783c8f4c PDS |
63 | #ifdef CONFIG_ARCH_TEGRA_3x_SOC |
| 64 | void tegra30_init_speedo_data(struct tegra_sku_info *sku_info); | |
| 783c8f4c PDS |
65 | #endif |
| 66 | ||
| 67 | #ifdef CONFIG_ARCH_TEGRA_114_SOC | |
| 68 | void tegra114_init_speedo_data(struct tegra_sku_info *sku_info); | |
| 783c8f4c PDS |
69 | #endif |
| 70 | ||
| 7e939de1 | 71 | #if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC) |
| 783c8f4c | 72 | void tegra124_init_speedo_data(struct tegra_sku_info *sku_info); |
| 7e939de1 TR |
73 | #endif |
| 74 | ||
| 0dc5a0d8 TR |
75 | #ifdef CONFIG_ARCH_TEGRA_210_SOC |
| 76 | void tegra210_init_speedo_data(struct tegra_sku_info *sku_info); | |
| 77 | #endif | |
| 78 | ||
| 7e939de1 TR |
79 | #ifdef CONFIG_ARCH_TEGRA_2x_SOC |
| 80 | extern const struct tegra_fuse_soc tegra20_fuse_soc; | |
| 81 | #endif | |
| 82 | ||
| 83 | #ifdef CONFIG_ARCH_TEGRA_3x_SOC | |
| 84 | extern const struct tegra_fuse_soc tegra30_fuse_soc; | |
| 85 | #endif | |
| 86 | ||
| 87 | #ifdef CONFIG_ARCH_TEGRA_114_SOC | |
| 88 | extern const struct tegra_fuse_soc tegra114_fuse_soc; | |
| 89 | #endif | |
| 90 | ||
| 91 | #if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC) | |
| 92 | extern const struct tegra_fuse_soc tegra124_fuse_soc; | |
| 783c8f4c PDS |
93 | #endif |
| 94 | ||
| 0dc5a0d8 TR |
95 | #ifdef CONFIG_ARCH_TEGRA_210_SOC |
| 96 | extern const struct tegra_fuse_soc tegra210_fuse_soc; | |
| 97 | #endif | |
| 98 | ||
| 83468fe2 TA |
99 | #ifdef CONFIG_ARCH_TEGRA_186_SOC |
| 100 | extern const struct tegra_fuse_soc tegra186_fuse_soc; | |
| 101 | #endif | |
| 102 | ||
| 783c8f4c | 103 | #endif |