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1// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2// Copyright(c) 2015-17 Intel Corporation.
3
4#include <linux/acpi.h>
0231453b 5#include <linux/delay.h>
7c3cd189 6#include <linux/mod_devicetable.h>
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7#include <linux/pm_runtime.h>
8#include <linux/soundwire/sdw_registers.h>
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9#include <linux/soundwire/sdw.h>
10#include "bus.h"
bcac5902 11#include "sysfs_local.h"
7c3cd189 12
dbb50c7a
BL
13static DEFINE_IDA(sdw_ida);
14
15static int sdw_get_id(struct sdw_bus *bus)
16{
17 int rc = ida_alloc(&sdw_ida, GFP_KERNEL);
18
19 if (rc < 0)
20 return rc;
21
22 bus->id = rc;
23 return 0;
24}
25
7c3cd189 26/**
5cab3ff2 27 * sdw_bus_master_add() - add a bus Master instance
7c3cd189 28 * @bus: bus instance
5cab3ff2
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29 * @parent: parent device
30 * @fwnode: firmware node handle
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31 *
32 * Initializes the bus instance, read properties and create child
33 * devices.
34 */
5cab3ff2
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35int sdw_bus_master_add(struct sdw_bus *bus, struct device *parent,
36 struct fwnode_handle *fwnode)
7c3cd189 37{
5c3eb9f7 38 struct sdw_master_prop *prop = NULL;
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39 int ret;
40
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41 if (!parent) {
42 pr_err("SoundWire parent device is not set\n");
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43 return -ENODEV;
44 }
45
dbb50c7a 46 ret = sdw_get_id(bus);
a5759f19 47 if (ret < 0) {
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48 dev_err(parent, "Failed to get bus id\n");
49 return ret;
50 }
51
52 ret = sdw_master_device_add(bus, parent, fwnode);
a5759f19 53 if (ret < 0) {
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54 dev_err(parent, "Failed to add master device at link %d\n",
55 bus->link_id);
dbb50c7a
BL
56 return ret;
57 }
58
9d715fa0 59 if (!bus->ops) {
17ed5bef 60 dev_err(bus->dev, "SoundWire Bus ops are not set\n");
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61 return -EINVAL;
62 }
63
9026118f
BL
64 if (!bus->compute_params) {
65 dev_err(bus->dev,
66 "Bandwidth allocation not configured, compute_params no set\n");
67 return -EINVAL;
68 }
69
9d715fa0 70 mutex_init(&bus->msg_lock);
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71 mutex_init(&bus->bus_lock);
72 INIT_LIST_HEAD(&bus->slaves);
89e59053 73 INIT_LIST_HEAD(&bus->m_rt_list);
7c3cd189 74
ce6e74d0
SN
75 /*
76 * Initialize multi_link flag
77 * TODO: populate this flag by reading property from FW node
78 */
79 bus->multi_link = false;
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80 if (bus->ops->read_prop) {
81 ret = bus->ops->read_prop(bus);
82 if (ret < 0) {
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83 dev_err(bus->dev,
84 "Bus read properties failed:%d\n", ret);
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85 return ret;
86 }
87 }
88
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89 sdw_bus_debugfs_init(bus);
90
7c3cd189 91 /*
21c2de29 92 * Device numbers in SoundWire are 0 through 15. Enumeration device
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93 * number (0), Broadcast device number (15), Group numbers (12 and
94 * 13) and Master device number (14) are not used for assignment so
95 * mask these and other higher bits.
96 */
97
98 /* Set higher order bits */
99 *bus->assigned = ~GENMASK(SDW_BROADCAST_DEV_NUM, SDW_ENUM_DEV_NUM);
100
101 /* Set enumuration device number and broadcast device number */
102 set_bit(SDW_ENUM_DEV_NUM, bus->assigned);
103 set_bit(SDW_BROADCAST_DEV_NUM, bus->assigned);
104
105 /* Set group device numbers and master device number */
106 set_bit(SDW_GROUP12_DEV_NUM, bus->assigned);
107 set_bit(SDW_GROUP13_DEV_NUM, bus->assigned);
108 set_bit(SDW_MASTER_DEV_NUM, bus->assigned);
109
110 /*
111 * SDW is an enumerable bus, but devices can be powered off. So,
112 * they won't be able to report as present.
113 *
114 * Create Slave devices based on Slaves described in
115 * the respective firmware (ACPI/DT)
116 */
117 if (IS_ENABLED(CONFIG_ACPI) && ACPI_HANDLE(bus->dev))
118 ret = sdw_acpi_find_slaves(bus);
a2e48458
SK
119 else if (IS_ENABLED(CONFIG_OF) && bus->dev->of_node)
120 ret = sdw_of_find_slaves(bus);
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121 else
122 ret = -ENOTSUPP; /* No ACPI/DT so error out */
123
a5759f19 124 if (ret < 0) {
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125 dev_err(bus->dev, "Finding slaves failed:%d\n", ret);
126 return ret;
127 }
128
99b8a5d6 129 /*
5c3eb9f7 130 * Initialize clock values based on Master properties. The max
3424305b 131 * frequency is read from max_clk_freq property. Current assumption
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132 * is that the bus will start at highest clock frequency when
133 * powered on.
134 *
99b8a5d6
SK
135 * Default active bank will be 0 as out of reset the Slaves have
136 * to start with bank 0 (Table 40 of Spec)
137 */
5c3eb9f7 138 prop = &bus->prop;
3424305b 139 bus->params.max_dr_freq = prop->max_clk_freq * SDW_DOUBLE_RATE_FACTOR;
5c3eb9f7 140 bus->params.curr_dr_freq = bus->params.max_dr_freq;
99b8a5d6
SK
141 bus->params.curr_bank = SDW_BANK0;
142 bus->params.next_bank = SDW_BANK1;
143
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144 return 0;
145}
5cab3ff2 146EXPORT_SYMBOL(sdw_bus_master_add);
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147
148static int sdw_delete_slave(struct device *dev, void *data)
149{
150 struct sdw_slave *slave = dev_to_sdw_dev(dev);
151 struct sdw_bus *bus = slave->bus;
152
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153 pm_runtime_disable(dev);
154
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155 sdw_slave_debugfs_exit(slave);
156
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157 mutex_lock(&bus->bus_lock);
158
159 if (slave->dev_num) /* clear dev_num if assigned */
160 clear_bit(slave->dev_num, bus->assigned);
161
162 list_del_init(&slave->node);
163 mutex_unlock(&bus->bus_lock);
164
165 device_unregister(dev);
166 return 0;
167}
168
169/**
5cab3ff2 170 * sdw_bus_master_delete() - delete the bus master instance
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171 * @bus: bus to be deleted
172 *
173 * Remove the instance, delete the child devices.
174 */
5cab3ff2 175void sdw_bus_master_delete(struct sdw_bus *bus)
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176{
177 device_for_each_child(bus->dev, NULL, sdw_delete_slave);
7ceaa40b 178 sdw_master_device_del(bus);
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179
180 sdw_bus_debugfs_exit(bus);
dbb50c7a 181 ida_free(&sdw_ida, bus->id);
7c3cd189 182}
5cab3ff2 183EXPORT_SYMBOL(sdw_bus_master_delete);
7c3cd189 184
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185/*
186 * SDW IO Calls
187 */
188
189static inline int find_response_code(enum sdw_command_response resp)
190{
191 switch (resp) {
192 case SDW_CMD_OK:
193 return 0;
194
195 case SDW_CMD_IGNORED:
196 return -ENODATA;
197
198 case SDW_CMD_TIMEOUT:
199 return -ETIMEDOUT;
200
201 default:
202 return -EIO;
203 }
204}
205
206static inline int do_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
207{
208 int retry = bus->prop.err_threshold;
209 enum sdw_command_response resp;
210 int ret = 0, i;
211
212 for (i = 0; i <= retry; i++) {
213 resp = bus->ops->xfer_msg(bus, msg);
214 ret = find_response_code(resp);
215
216 /* if cmd is ok or ignored return */
217 if (ret == 0 || ret == -ENODATA)
218 return ret;
219 }
220
221 return ret;
222}
223
224static inline int do_transfer_defer(struct sdw_bus *bus,
73ede046
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225 struct sdw_msg *msg,
226 struct sdw_defer *defer)
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227{
228 int retry = bus->prop.err_threshold;
229 enum sdw_command_response resp;
230 int ret = 0, i;
231
232 defer->msg = msg;
233 defer->length = msg->len;
a306a0e4 234 init_completion(&defer->complete);
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235
236 for (i = 0; i <= retry; i++) {
237 resp = bus->ops->xfer_msg_defer(bus, msg, defer);
238 ret = find_response_code(resp);
239 /* if cmd is ok or ignored return */
240 if (ret == 0 || ret == -ENODATA)
241 return ret;
242 }
243
244 return ret;
245}
246
247static int sdw_reset_page(struct sdw_bus *bus, u16 dev_num)
248{
249 int retry = bus->prop.err_threshold;
250 enum sdw_command_response resp;
251 int ret = 0, i;
252
253 for (i = 0; i <= retry; i++) {
254 resp = bus->ops->reset_page_addr(bus, dev_num);
255 ret = find_response_code(resp);
256 /* if cmd is ok or ignored return */
257 if (ret == 0 || ret == -ENODATA)
258 return ret;
259 }
260
261 return ret;
262}
263
a350aff4
PLB
264static int sdw_transfer_unlocked(struct sdw_bus *bus, struct sdw_msg *msg)
265{
266 int ret;
267
268 ret = do_transfer(bus, msg);
269 if (ret != 0 && ret != -ENODATA)
ec475187
BL
270 dev_err(bus->dev, "trf on Slave %d failed:%d %s addr %x count %d\n",
271 msg->dev_num, ret,
272 (msg->flags & SDW_MSG_FLAG_WRITE) ? "write" : "read",
273 msg->addr, msg->len);
a350aff4
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274
275 if (msg->page)
276 sdw_reset_page(bus, msg->dev_num);
277
278 return ret;
279}
280
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281/**
282 * sdw_transfer() - Synchronous transfer message to a SDW Slave device
283 * @bus: SDW bus
284 * @msg: SDW message to be xfered
285 */
286int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
287{
288 int ret;
289
290 mutex_lock(&bus->msg_lock);
291
a350aff4 292 ret = sdw_transfer_unlocked(bus, msg);
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293
294 mutex_unlock(&bus->msg_lock);
295
296 return ret;
297}
298
299/**
300 * sdw_transfer_defer() - Asynchronously transfer message to a SDW Slave device
301 * @bus: SDW bus
302 * @msg: SDW message to be xfered
303 * @defer: Defer block for signal completion
304 *
305 * Caller needs to hold the msg_lock lock while calling this
306 */
307int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg,
73ede046 308 struct sdw_defer *defer)
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309{
310 int ret;
311
312 if (!bus->ops->xfer_msg_defer)
313 return -ENOTSUPP;
314
315 ret = do_transfer_defer(bus, msg, defer);
316 if (ret != 0 && ret != -ENODATA)
317 dev_err(bus->dev, "Defer trf on Slave %d failed:%d\n",
73ede046 318 msg->dev_num, ret);
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319
320 if (msg->page)
321 sdw_reset_page(bus, msg->dev_num);
322
323 return ret;
324}
325
9d715fa0 326int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave,
73ede046 327 u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf)
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328{
329 memset(msg, 0, sizeof(*msg));
330 msg->addr = addr; /* addr is 16 bit and truncated here */
331 msg->len = count;
332 msg->dev_num = dev_num;
333 msg->flags = flags;
334 msg->buf = buf;
9d715fa0 335
f779ad09 336 if (addr < SDW_REG_NO_PAGE) /* no paging area */
9d715fa0 337 return 0;
f779ad09
GL
338
339 if (addr >= SDW_REG_MAX) { /* illegal addr */
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340 pr_err("SDW: Invalid address %x passed\n", addr);
341 return -EINVAL;
342 }
343
344 if (addr < SDW_REG_OPTIONAL_PAGE) { /* 32k but no page */
345 if (slave && !slave->prop.paging_support)
346 return 0;
21c2de29 347 /* no need for else as that will fall-through to paging */
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348 }
349
350 /* paging mandatory */
351 if (dev_num == SDW_ENUM_DEV_NUM || dev_num == SDW_BROADCAST_DEV_NUM) {
352 pr_err("SDW: Invalid device for paging :%d\n", dev_num);
353 return -EINVAL;
354 }
355
356 if (!slave) {
357 pr_err("SDW: No slave for paging addr\n");
358 return -EINVAL;
f779ad09
GL
359 }
360
361 if (!slave->prop.paging_support) {
9d715fa0 362 dev_err(&slave->dev,
17ed5bef 363 "address %x needs paging but no support\n", addr);
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364 return -EINVAL;
365 }
366
d5826a4b
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367 msg->addr_page1 = FIELD_GET(SDW_SCP_ADDRPAGE1_MASK, addr);
368 msg->addr_page2 = FIELD_GET(SDW_SCP_ADDRPAGE2_MASK, addr);
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369 msg->addr |= BIT(15);
370 msg->page = true;
371
372 return 0;
373}
374
60ee9be2
PLB
375/*
376 * Read/Write IO functions.
377 * no_pm versions can only be called by the bus, e.g. while enumerating or
378 * handling suspend-resume sequences.
379 * all clients need to use the pm versions
380 */
381
382static int
383sdw_nread_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
384{
385 struct sdw_msg msg;
386 int ret;
387
388 ret = sdw_fill_msg(&msg, slave, addr, count,
389 slave->dev_num, SDW_MSG_FLAG_READ, val);
390 if (ret < 0)
391 return ret;
392
7fae3cfb
PLB
393 ret = sdw_transfer(slave->bus, &msg);
394 if (slave->is_mockup_device)
395 ret = 0;
396 return ret;
60ee9be2
PLB
397}
398
399static int
031e668b 400sdw_nwrite_no_pm(struct sdw_slave *slave, u32 addr, size_t count, const u8 *val)
60ee9be2
PLB
401{
402 struct sdw_msg msg;
403 int ret;
404
405 ret = sdw_fill_msg(&msg, slave, addr, count,
031e668b 406 slave->dev_num, SDW_MSG_FLAG_WRITE, (u8 *)val);
60ee9be2
PLB
407 if (ret < 0)
408 return ret;
409
7fae3cfb
PLB
410 ret = sdw_transfer(slave->bus, &msg);
411 if (slave->is_mockup_device)
412 ret = 0;
413 return ret;
60ee9be2
PLB
414}
415
167790ab 416int sdw_write_no_pm(struct sdw_slave *slave, u32 addr, u8 value)
60ee9be2
PLB
417{
418 return sdw_nwrite_no_pm(slave, addr, 1, &value);
419}
167790ab 420EXPORT_SYMBOL(sdw_write_no_pm);
60ee9be2 421
0231453b
RW
422static int
423sdw_bread_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr)
424{
425 struct sdw_msg msg;
426 u8 buf;
427 int ret;
428
429 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
430 SDW_MSG_FLAG_READ, &buf);
a5759f19 431 if (ret < 0)
0231453b
RW
432 return ret;
433
434 ret = sdw_transfer(bus, &msg);
435 if (ret < 0)
436 return ret;
f779ad09
GL
437
438 return buf;
0231453b
RW
439}
440
441static int
442sdw_bwrite_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value)
443{
444 struct sdw_msg msg;
445 int ret;
446
447 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
448 SDW_MSG_FLAG_WRITE, &value);
a5759f19 449 if (ret < 0)
0231453b
RW
450 return ret;
451
452 return sdw_transfer(bus, &msg);
453}
454
a350aff4
PLB
455int sdw_bread_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr)
456{
457 struct sdw_msg msg;
458 u8 buf;
459 int ret;
460
461 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
462 SDW_MSG_FLAG_READ, &buf);
a5759f19 463 if (ret < 0)
a350aff4
PLB
464 return ret;
465
466 ret = sdw_transfer_unlocked(bus, &msg);
467 if (ret < 0)
468 return ret;
469
470 return buf;
471}
472EXPORT_SYMBOL(sdw_bread_no_pm_unlocked);
473
474int sdw_bwrite_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value)
475{
476 struct sdw_msg msg;
477 int ret;
478
479 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
480 SDW_MSG_FLAG_WRITE, &value);
a5759f19 481 if (ret < 0)
a350aff4
PLB
482 return ret;
483
484 return sdw_transfer_unlocked(bus, &msg);
485}
486EXPORT_SYMBOL(sdw_bwrite_no_pm_unlocked);
487
167790ab 488int sdw_read_no_pm(struct sdw_slave *slave, u32 addr)
0231453b
RW
489{
490 u8 buf;
491 int ret;
492
493 ret = sdw_nread_no_pm(slave, addr, 1, &buf);
494 if (ret < 0)
495 return ret;
496 else
497 return buf;
498}
167790ab 499EXPORT_SYMBOL(sdw_read_no_pm);
0231453b 500
d38ebaf2 501int sdw_update_no_pm(struct sdw_slave *slave, u32 addr, u8 mask, u8 val)
b04c975e
PLB
502{
503 int tmp;
504
505 tmp = sdw_read_no_pm(slave, addr);
506 if (tmp < 0)
507 return tmp;
508
509 tmp = (tmp & ~mask) | val;
510 return sdw_write_no_pm(slave, addr, tmp);
511}
d38ebaf2
PLB
512EXPORT_SYMBOL(sdw_update_no_pm);
513
514/* Read-Modify-Write Slave register */
515int sdw_update(struct sdw_slave *slave, u32 addr, u8 mask, u8 val)
516{
517 int tmp;
518
519 tmp = sdw_read(slave, addr);
520 if (tmp < 0)
521 return tmp;
522
523 tmp = (tmp & ~mask) | val;
524 return sdw_write(slave, addr, tmp);
525}
526EXPORT_SYMBOL(sdw_update);
b04c975e 527
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528/**
529 * sdw_nread() - Read "n" contiguous SDW Slave registers
530 * @slave: SDW Slave
531 * @addr: Register address
532 * @count: length
533 * @val: Buffer for values to be read
534 */
535int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
536{
9d715fa0
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537 int ret;
538
973794e8 539 ret = pm_runtime_get_sync(&slave->dev);
60ee9be2 540 if (ret < 0 && ret != -EACCES) {
973794e8 541 pm_runtime_put_noidle(&slave->dev);
9d715fa0 542 return ret;
60ee9be2
PLB
543 }
544
545 ret = sdw_nread_no_pm(slave, addr, count, val);
9d715fa0 546
973794e8
PLB
547 pm_runtime_mark_last_busy(&slave->dev);
548 pm_runtime_put(&slave->dev);
9d715fa0
VK
549
550 return ret;
551}
552EXPORT_SYMBOL(sdw_nread);
553
554/**
555 * sdw_nwrite() - Write "n" contiguous SDW Slave registers
556 * @slave: SDW Slave
557 * @addr: Register address
558 * @count: length
031e668b 559 * @val: Buffer for values to be written
9d715fa0 560 */
031e668b 561int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, const u8 *val)
9d715fa0 562{
9d715fa0
VK
563 int ret;
564
973794e8 565 ret = pm_runtime_get_sync(&slave->dev);
60ee9be2 566 if (ret < 0 && ret != -EACCES) {
973794e8 567 pm_runtime_put_noidle(&slave->dev);
9d715fa0 568 return ret;
60ee9be2
PLB
569 }
570
571 ret = sdw_nwrite_no_pm(slave, addr, count, val);
9d715fa0 572
973794e8
PLB
573 pm_runtime_mark_last_busy(&slave->dev);
574 pm_runtime_put(&slave->dev);
9d715fa0
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575
576 return ret;
577}
578EXPORT_SYMBOL(sdw_nwrite);
579
580/**
581 * sdw_read() - Read a SDW Slave register
582 * @slave: SDW Slave
583 * @addr: Register address
584 */
585int sdw_read(struct sdw_slave *slave, u32 addr)
586{
587 u8 buf;
588 int ret;
589
590 ret = sdw_nread(slave, addr, 1, &buf);
591 if (ret < 0)
592 return ret;
f779ad09
GL
593
594 return buf;
9d715fa0
VK
595}
596EXPORT_SYMBOL(sdw_read);
597
598/**
599 * sdw_write() - Write a SDW Slave register
600 * @slave: SDW Slave
601 * @addr: Register address
602 * @value: Register value
603 */
604int sdw_write(struct sdw_slave *slave, u32 addr, u8 value)
605{
606 return sdw_nwrite(slave, addr, 1, &value);
9d715fa0
VK
607}
608EXPORT_SYMBOL(sdw_write);
609
d52d7a1b
SK
610/*
611 * SDW alert handling
612 */
613
614/* called with bus_lock held */
615static struct sdw_slave *sdw_get_slave(struct sdw_bus *bus, int i)
616{
1429cc26 617 struct sdw_slave *slave;
d52d7a1b
SK
618
619 list_for_each_entry(slave, &bus->slaves, node) {
620 if (slave->dev_num == i)
621 return slave;
622 }
623
624 return NULL;
625}
626
01ad444e 627int sdw_compare_devid(struct sdw_slave *slave, struct sdw_slave_id id)
d52d7a1b 628{
2e8c4ad1 629 if (slave->id.mfg_id != id.mfg_id ||
09830d5e 630 slave->id.part_id != id.part_id ||
2e8c4ad1
PLB
631 slave->id.class_id != id.class_id ||
632 (slave->id.unique_id != SDW_IGNORED_UNIQUE_ID &&
633 slave->id.unique_id != id.unique_id))
d52d7a1b
SK
634 return -ENODEV;
635
636 return 0;
637}
01ad444e 638EXPORT_SYMBOL(sdw_compare_devid);
d52d7a1b
SK
639
640/* called with bus_lock held */
641static int sdw_get_device_num(struct sdw_slave *slave)
642{
643 int bit;
644
645 bit = find_first_zero_bit(slave->bus->assigned, SDW_MAX_DEVICES);
646 if (bit == SDW_MAX_DEVICES) {
647 bit = -ENODEV;
648 goto err;
649 }
650
651 /*
652 * Do not update dev_num in Slave data structure here,
653 * Update once program dev_num is successful
654 */
655 set_bit(bit, slave->bus->assigned);
656
657err:
658 return bit;
659}
660
661static int sdw_assign_device_num(struct sdw_slave *slave)
662{
6d7a1ff7 663 struct sdw_bus *bus = slave->bus;
d52d7a1b 664 int ret, dev_num;
fd6a3ac8 665 bool new_device = false;
d52d7a1b
SK
666
667 /* check first if device number is assigned, if so reuse that */
668 if (!slave->dev_num) {
fd6a3ac8
PLB
669 if (!slave->dev_num_sticky) {
670 mutex_lock(&slave->bus->bus_lock);
671 dev_num = sdw_get_device_num(slave);
672 mutex_unlock(&slave->bus->bus_lock);
673 if (dev_num < 0) {
6d7a1ff7 674 dev_err(bus->dev, "Get dev_num failed: %d\n",
fd6a3ac8
PLB
675 dev_num);
676 return dev_num;
677 }
678 slave->dev_num = dev_num;
679 slave->dev_num_sticky = dev_num;
680 new_device = true;
681 } else {
682 slave->dev_num = slave->dev_num_sticky;
d52d7a1b 683 }
fd6a3ac8
PLB
684 }
685
686 if (!new_device)
6d7a1ff7 687 dev_dbg(bus->dev,
f48f4fd9
PLB
688 "Slave already registered, reusing dev_num:%d\n",
689 slave->dev_num);
d52d7a1b 690
fd6a3ac8
PLB
691 /* Clear the slave->dev_num to transfer message on device 0 */
692 dev_num = slave->dev_num;
693 slave->dev_num = 0;
d52d7a1b 694
d300de4f 695 ret = sdw_write_no_pm(slave, SDW_SCP_DEVNUMBER, dev_num);
d52d7a1b 696 if (ret < 0) {
6d7a1ff7 697 dev_err(bus->dev, "Program device_num %d failed: %d\n",
6e0ac6a6 698 dev_num, ret);
d52d7a1b
SK
699 return ret;
700 }
701
702 /* After xfer of msg, restore dev_num */
fd6a3ac8 703 slave->dev_num = slave->dev_num_sticky;
d52d7a1b
SK
704
705 return 0;
706}
707
7c3cd189 708void sdw_extract_slave_id(struct sdw_bus *bus,
73ede046 709 u64 addr, struct sdw_slave_id *id)
7c3cd189 710{
17ed5bef 711 dev_dbg(bus->dev, "SDW Slave Addr: %llx\n", addr);
7c3cd189 712
2c6cff68
PLB
713 id->sdw_version = SDW_VERSION(addr);
714 id->unique_id = SDW_UNIQUE_ID(addr);
715 id->mfg_id = SDW_MFG_ID(addr);
716 id->part_id = SDW_PART_ID(addr);
717 id->class_id = SDW_CLASS_ID(addr);
7c3cd189
VK
718
719 dev_dbg(bus->dev,
c397efb7
PLB
720 "SDW Slave class_id 0x%02x, mfg_id 0x%04x, part_id 0x%04x, unique_id 0x%x, version 0x%x\n",
721 id->class_id, id->mfg_id, id->part_id, id->unique_id, id->sdw_version);
7c3cd189 722}
01ad444e 723EXPORT_SYMBOL(sdw_extract_slave_id);
d52d7a1b
SK
724
725static int sdw_program_device_num(struct sdw_bus *bus)
726{
727 u8 buf[SDW_NUM_DEV_ID_REGISTERS] = {0};
728 struct sdw_slave *slave, *_s;
729 struct sdw_slave_id id;
730 struct sdw_msg msg;
f03690f4 731 bool found;
d52d7a1b
SK
732 int count = 0, ret;
733 u64 addr;
734
735 /* No Slave, so use raw xfer api */
736 ret = sdw_fill_msg(&msg, NULL, SDW_SCP_DEVID_0,
73ede046 737 SDW_NUM_DEV_ID_REGISTERS, 0, SDW_MSG_FLAG_READ, buf);
d52d7a1b
SK
738 if (ret < 0)
739 return ret;
740
741 do {
742 ret = sdw_transfer(bus, &msg);
743 if (ret == -ENODATA) { /* end of device id reads */
6e0ac6a6 744 dev_dbg(bus->dev, "No more devices to enumerate\n");
d52d7a1b
SK
745 ret = 0;
746 break;
747 }
748 if (ret < 0) {
749 dev_err(bus->dev, "DEVID read fail:%d\n", ret);
750 break;
751 }
752
753 /*
754 * Construct the addr and extract. Cast the higher shift
755 * bits to avoid truncation due to size limit.
756 */
757 addr = buf[5] | (buf[4] << 8) | (buf[3] << 16) |
0132af05
CIK
758 ((u64)buf[2] << 24) | ((u64)buf[1] << 32) |
759 ((u64)buf[0] << 40);
d52d7a1b
SK
760
761 sdw_extract_slave_id(bus, addr, &id);
762
f03690f4 763 found = false;
d52d7a1b
SK
764 /* Now compare with entries */
765 list_for_each_entry_safe(slave, _s, &bus->slaves, node) {
766 if (sdw_compare_devid(slave, id) == 0) {
767 found = true;
768
769 /*
770 * Assign a new dev_num to this Slave and
771 * not mark it present. It will be marked
772 * present after it reports ATTACHED on new
773 * dev_num
774 */
775 ret = sdw_assign_device_num(slave);
a5759f19 776 if (ret < 0) {
6d7a1ff7 777 dev_err(bus->dev,
17ed5bef 778 "Assign dev_num failed:%d\n",
d52d7a1b
SK
779 ret);
780 return ret;
781 }
782
783 break;
784 }
785 }
786
d7b956b6 787 if (!found) {
d52d7a1b 788 /* TODO: Park this device in Group 13 */
fcb9d730
SK
789
790 /*
791 * add Slave device even if there is no platform
792 * firmware description. There will be no driver probe
793 * but the user/integration will be able to see the
794 * device, enumeration status and device number in sysfs
795 */
796 sdw_slave_add(bus, &id, NULL);
797
17ed5bef 798 dev_err(bus->dev, "Slave Entry not found\n");
d52d7a1b
SK
799 }
800
801 count++;
802
803 /*
804 * Check till error out or retry (count) exhausts.
805 * Device can drop off and rejoin during enumeration
806 * so count till twice the bound.
807 */
808
809 } while (ret == 0 && count < (SDW_MAX_DEVICES * 2));
810
811 return ret;
812}
813
814static void sdw_modify_slave_status(struct sdw_slave *slave,
73ede046 815 enum sdw_slave_status status)
d52d7a1b 816{
6d7a1ff7
PLB
817 struct sdw_bus *bus = slave->bus;
818
819 mutex_lock(&bus->bus_lock);
fb9469e5 820
6d7a1ff7 821 dev_vdbg(bus->dev,
fb9469e5
PLB
822 "%s: changing status slave %d status %d new status %d\n",
823 __func__, slave->dev_num, slave->status, status);
824
825 if (status == SDW_SLAVE_UNATTACHED) {
826 dev_dbg(&slave->dev,
f1b69026 827 "%s: initializing enumeration and init completion for Slave %d\n",
fb9469e5
PLB
828 __func__, slave->dev_num);
829
830 init_completion(&slave->enumeration_complete);
a90def06 831 init_completion(&slave->initialization_complete);
fb9469e5
PLB
832
833 } else if ((status == SDW_SLAVE_ATTACHED) &&
834 (slave->status == SDW_SLAVE_UNATTACHED)) {
835 dev_dbg(&slave->dev,
f1b69026 836 "%s: signaling enumeration completion for Slave %d\n",
fb9469e5
PLB
837 __func__, slave->dev_num);
838
839 complete(&slave->enumeration_complete);
840 }
d52d7a1b 841 slave->status = status;
6d7a1ff7 842 mutex_unlock(&bus->bus_lock);
d52d7a1b
SK
843}
844
0231453b
RW
845static int sdw_slave_clk_stop_callback(struct sdw_slave *slave,
846 enum sdw_clk_stop_mode mode,
847 enum sdw_clk_stop_type type)
848{
849 int ret;
850
851 if (slave->ops && slave->ops->clk_stop) {
852 ret = slave->ops->clk_stop(slave, mode, type);
b50bb8ba 853 if (ret < 0)
0231453b 854 return ret;
0231453b
RW
855 }
856
857 return 0;
858}
859
860static int sdw_slave_clk_stop_prepare(struct sdw_slave *slave,
861 enum sdw_clk_stop_mode mode,
862 bool prepare)
863{
864 bool wake_en;
865 u32 val = 0;
866 int ret;
867
868 wake_en = slave->prop.wake_capable;
869
870 if (prepare) {
871 val = SDW_SCP_SYSTEMCTRL_CLK_STP_PREP;
872
873 if (mode == SDW_CLK_STOP_MODE1)
874 val |= SDW_SCP_SYSTEMCTRL_CLK_STP_MODE1;
875
876 if (wake_en)
877 val |= SDW_SCP_SYSTEMCTRL_WAKE_UP_EN;
878 } else {
665cf215
PLB
879 ret = sdw_read_no_pm(slave, SDW_SCP_SYSTEMCTRL);
880 if (ret < 0) {
b50bb8ba
PLB
881 if (ret != -ENODATA)
882 dev_err(&slave->dev, "SDW_SCP_SYSTEMCTRL read failed:%d\n", ret);
665cf215
PLB
883 return ret;
884 }
885 val = ret;
0231453b
RW
886 val &= ~(SDW_SCP_SYSTEMCTRL_CLK_STP_PREP);
887 }
888
889 ret = sdw_write_no_pm(slave, SDW_SCP_SYSTEMCTRL, val);
890
b50bb8ba
PLB
891 if (ret < 0 && ret != -ENODATA)
892 dev_err(&slave->dev, "SDW_SCP_SYSTEMCTRL write failed:%d\n", ret);
0231453b
RW
893
894 return ret;
895}
896
897static int sdw_bus_wait_for_clk_prep_deprep(struct sdw_bus *bus, u16 dev_num)
898{
899 int retry = bus->clk_stop_timeout;
900 int val;
901
902 do {
665cf215
PLB
903 val = sdw_bread_no_pm(bus, dev_num, SDW_SCP_STAT);
904 if (val < 0) {
9f9bc7d5
PLB
905 if (val != -ENODATA)
906 dev_err(bus->dev, "SDW_SCP_STAT bread failed:%d\n", val);
665cf215
PLB
907 return val;
908 }
909 val &= SDW_SCP_STAT_CLK_STP_NF;
0231453b 910 if (!val) {
54a6ca4f 911 dev_dbg(bus->dev, "clock stop prep/de-prep done slave:%d\n",
af7254b4 912 dev_num);
0231453b
RW
913 return 0;
914 }
915
916 usleep_range(1000, 1500);
917 retry--;
918 } while (retry);
919
54a6ca4f 920 dev_err(bus->dev, "clock stop prep/de-prep failed slave:%d\n",
0231453b
RW
921 dev_num);
922
923 return -ETIMEDOUT;
924}
925
926/**
927 * sdw_bus_prep_clk_stop: prepare Slave(s) for clock stop
928 *
929 * @bus: SDW bus instance
930 *
931 * Query Slave for clock stop mode and prepare for that mode.
932 */
933int sdw_bus_prep_clk_stop(struct sdw_bus *bus)
934{
0231453b
RW
935 bool simple_clk_stop = true;
936 struct sdw_slave *slave;
937 bool is_slave = false;
938 int ret = 0;
939
940 /*
941 * In order to save on transition time, prepare
942 * each Slave and then wait for all Slave(s) to be
943 * prepared for clock stop.
b50bb8ba
PLB
944 * If one of the Slave devices has lost sync and
945 * replies with Command Ignored/-ENODATA, we continue
946 * the loop
0231453b
RW
947 */
948 list_for_each_entry(slave, &bus->slaves, node) {
949 if (!slave->dev_num)
950 continue;
951
0231453b
RW
952 if (slave->status != SDW_SLAVE_ATTACHED &&
953 slave->status != SDW_SLAVE_ALERT)
954 continue;
955
929cfee3
BL
956 /* Identify if Slave(s) are available on Bus */
957 is_slave = true;
958
345e9f5c
PLB
959 ret = sdw_slave_clk_stop_callback(slave,
960 SDW_CLK_STOP_MODE0,
0231453b 961 SDW_CLK_PRE_PREPARE);
b50bb8ba
PLB
962 if (ret < 0 && ret != -ENODATA) {
963 dev_err(&slave->dev, "clock stop pre-prepare cb failed:%d\n", ret);
0231453b
RW
964 return ret;
965 }
966
345e9f5c
PLB
967 /* Only prepare a Slave device if needed */
968 if (!slave->prop.simple_clk_stop_capable) {
0231453b 969 simple_clk_stop = false;
345e9f5c
PLB
970
971 ret = sdw_slave_clk_stop_prepare(slave,
972 SDW_CLK_STOP_MODE0,
973 true);
b50bb8ba
PLB
974 if (ret < 0 && ret != -ENODATA) {
975 dev_err(&slave->dev, "clock stop prepare failed:%d\n", ret);
345e9f5c
PLB
976 return ret;
977 }
978 }
0231453b
RW
979 }
980
18de2f72
CS
981 /* Skip remaining clock stop preparation if no Slave is attached */
982 if (!is_slave)
b50bb8ba 983 return 0;
18de2f72 984
345e9f5c
PLB
985 /*
986 * Don't wait for all Slaves to be ready if they follow the simple
987 * state machine
988 */
18de2f72 989 if (!simple_clk_stop) {
0231453b
RW
990 ret = sdw_bus_wait_for_clk_prep_deprep(bus,
991 SDW_BROADCAST_DEV_NUM);
b50bb8ba
PLB
992 /*
993 * if there are no Slave devices present and the reply is
994 * Command_Ignored/-ENODATA, we don't need to continue with the
995 * flow and can just return here. The error code is not modified
996 * and its handling left as an exercise for the caller.
997 */
0231453b
RW
998 if (ret < 0)
999 return ret;
1000 }
1001
1002 /* Inform slaves that prep is done */
1003 list_for_each_entry(slave, &bus->slaves, node) {
1004 if (!slave->dev_num)
1005 continue;
1006
1007 if (slave->status != SDW_SLAVE_ATTACHED &&
1008 slave->status != SDW_SLAVE_ALERT)
1009 continue;
1010
345e9f5c
PLB
1011 ret = sdw_slave_clk_stop_callback(slave,
1012 SDW_CLK_STOP_MODE0,
1013 SDW_CLK_POST_PREPARE);
0231453b 1014
b50bb8ba
PLB
1015 if (ret < 0 && ret != -ENODATA) {
1016 dev_err(&slave->dev, "clock stop post-prepare cb failed:%d\n", ret);
1017 return ret;
0231453b
RW
1018 }
1019 }
1020
b50bb8ba 1021 return 0;
0231453b
RW
1022}
1023EXPORT_SYMBOL(sdw_bus_prep_clk_stop);
1024
1025/**
1026 * sdw_bus_clk_stop: stop bus clock
1027 *
1028 * @bus: SDW bus instance
1029 *
1030 * After preparing the Slaves for clock stop, stop the clock by broadcasting
1031 * write to SCP_CTRL register.
1032 */
1033int sdw_bus_clk_stop(struct sdw_bus *bus)
1034{
1035 int ret;
1036
1037 /*
1038 * broadcast clock stop now, attached Slaves will ACK this,
1039 * unattached will ignore
1040 */
1041 ret = sdw_bwrite_no_pm(bus, SDW_BROADCAST_DEV_NUM,
1042 SDW_SCP_CTRL, SDW_SCP_CTRL_CLK_STP_NOW);
1043 if (ret < 0) {
b50bb8ba
PLB
1044 if (ret != -ENODATA)
1045 dev_err(bus->dev, "ClockStopNow Broadcast msg failed %d\n", ret);
0231453b
RW
1046 return ret;
1047 }
1048
1049 return 0;
1050}
1051EXPORT_SYMBOL(sdw_bus_clk_stop);
1052
1053/**
1054 * sdw_bus_exit_clk_stop: Exit clock stop mode
1055 *
1056 * @bus: SDW bus instance
1057 *
1058 * This De-prepares the Slaves by exiting Clock Stop Mode 0. For the Slaves
1059 * exiting Clock Stop Mode 1, they will be de-prepared after they enumerate
1060 * back.
1061 */
1062int sdw_bus_exit_clk_stop(struct sdw_bus *bus)
1063{
0231453b
RW
1064 bool simple_clk_stop = true;
1065 struct sdw_slave *slave;
1066 bool is_slave = false;
1067 int ret;
1068
1069 /*
1070 * In order to save on transition time, de-prepare
1071 * each Slave and then wait for all Slave(s) to be
1072 * de-prepared after clock resume.
1073 */
1074 list_for_each_entry(slave, &bus->slaves, node) {
1075 if (!slave->dev_num)
1076 continue;
1077
0231453b
RW
1078 if (slave->status != SDW_SLAVE_ATTACHED &&
1079 slave->status != SDW_SLAVE_ALERT)
1080 continue;
1081
929cfee3
BL
1082 /* Identify if Slave(s) are available on Bus */
1083 is_slave = true;
1084
345e9f5c 1085 ret = sdw_slave_clk_stop_callback(slave, SDW_CLK_STOP_MODE0,
0231453b
RW
1086 SDW_CLK_PRE_DEPREPARE);
1087 if (ret < 0)
b50bb8ba 1088 dev_warn(&slave->dev, "clock stop pre-deprepare cb failed:%d\n", ret);
0231453b 1089
345e9f5c
PLB
1090 /* Only de-prepare a Slave device if needed */
1091 if (!slave->prop.simple_clk_stop_capable) {
1092 simple_clk_stop = false;
0231453b 1093
345e9f5c
PLB
1094 ret = sdw_slave_clk_stop_prepare(slave, SDW_CLK_STOP_MODE0,
1095 false);
0231453b 1096
345e9f5c 1097 if (ret < 0)
b50bb8ba 1098 dev_warn(&slave->dev, "clock stop deprepare failed:%d\n", ret);
345e9f5c 1099 }
0231453b
RW
1100 }
1101
18de2f72 1102 /* Skip remaining clock stop de-preparation if no Slave is attached */
929cfee3
BL
1103 if (!is_slave)
1104 return 0;
1105
345e9f5c
PLB
1106 /*
1107 * Don't wait for all Slaves to be ready if they follow the simple
1108 * state machine
1109 */
b50bb8ba
PLB
1110 if (!simple_clk_stop) {
1111 ret = sdw_bus_wait_for_clk_prep_deprep(bus, SDW_BROADCAST_DEV_NUM);
1112 if (ret < 0)
9dcaf668 1113 dev_warn(bus->dev, "clock stop deprepare wait failed:%d\n", ret);
b50bb8ba 1114 }
18de2f72 1115
0231453b
RW
1116 list_for_each_entry(slave, &bus->slaves, node) {
1117 if (!slave->dev_num)
1118 continue;
1119
1120 if (slave->status != SDW_SLAVE_ATTACHED &&
1121 slave->status != SDW_SLAVE_ALERT)
1122 continue;
1123
b50bb8ba
PLB
1124 ret = sdw_slave_clk_stop_callback(slave, SDW_CLK_STOP_MODE0,
1125 SDW_CLK_POST_DEPREPARE);
1126 if (ret < 0)
1127 dev_warn(&slave->dev, "clock stop post-deprepare cb failed:%d\n", ret);
0231453b
RW
1128 }
1129
1130 return 0;
1131}
1132EXPORT_SYMBOL(sdw_bus_exit_clk_stop);
1133
79df15b7 1134int sdw_configure_dpn_intr(struct sdw_slave *slave,
73ede046 1135 int port, bool enable, int mask)
79df15b7
SK
1136{
1137 u32 addr;
1138 int ret;
1139 u8 val = 0;
1140
dd87a72a
PLB
1141 if (slave->bus->params.s_data_mode != SDW_PORT_DATA_MODE_NORMAL) {
1142 dev_dbg(&slave->dev, "TEST FAIL interrupt %s\n",
1143 enable ? "on" : "off");
1144 mask |= SDW_DPN_INT_TEST_FAIL;
1145 }
1146
79df15b7
SK
1147 addr = SDW_DPN_INTMASK(port);
1148
1149 /* Set/Clear port ready interrupt mask */
1150 if (enable) {
1151 val |= mask;
1152 val |= SDW_DPN_INT_PORT_READY;
1153 } else {
1154 val &= ~(mask);
1155 val &= ~SDW_DPN_INT_PORT_READY;
1156 }
1157
1158 ret = sdw_update(slave, addr, (mask | SDW_DPN_INT_PORT_READY), val);
1159 if (ret < 0)
6d7a1ff7 1160 dev_err(&slave->dev,
17ed5bef 1161 "SDW_DPN_INTMASK write failed:%d\n", val);
79df15b7
SK
1162
1163 return ret;
1164}
1165
29d158f9
PLB
1166static int sdw_slave_set_frequency(struct sdw_slave *slave)
1167{
1168 u32 mclk_freq = slave->bus->prop.mclk_freq;
1169 u32 curr_freq = slave->bus->params.curr_dr_freq >> 1;
1170 unsigned int scale;
1171 u8 scale_index;
1172 u8 base;
1173 int ret;
1174
1175 /*
1176 * frequency base and scale registers are required for SDCA
1177 * devices. They may also be used for 1.2+/non-SDCA devices,
1178 * but we will need a DisCo property to cover this case
1179 */
1180 if (!slave->id.class_id)
1181 return 0;
1182
1183 if (!mclk_freq) {
1184 dev_err(&slave->dev,
1185 "no bus MCLK, cannot set SDW_SCP_BUS_CLOCK_BASE\n");
1186 return -EINVAL;
1187 }
1188
1189 /*
1190 * map base frequency using Table 89 of SoundWire 1.2 spec.
1191 * The order of the tests just follows the specification, this
1192 * is not a selection between possible values or a search for
1193 * the best value but just a mapping. Only one case per platform
1194 * is relevant.
1195 * Some BIOS have inconsistent values for mclk_freq but a
1196 * correct root so we force the mclk_freq to avoid variations.
1197 */
1198 if (!(19200000 % mclk_freq)) {
1199 mclk_freq = 19200000;
1200 base = SDW_SCP_BASE_CLOCK_19200000_HZ;
1201 } else if (!(24000000 % mclk_freq)) {
1202 mclk_freq = 24000000;
1203 base = SDW_SCP_BASE_CLOCK_24000000_HZ;
1204 } else if (!(24576000 % mclk_freq)) {
1205 mclk_freq = 24576000;
1206 base = SDW_SCP_BASE_CLOCK_24576000_HZ;
1207 } else if (!(22579200 % mclk_freq)) {
1208 mclk_freq = 22579200;
1209 base = SDW_SCP_BASE_CLOCK_22579200_HZ;
1210 } else if (!(32000000 % mclk_freq)) {
1211 mclk_freq = 32000000;
1212 base = SDW_SCP_BASE_CLOCK_32000000_HZ;
1213 } else {
1214 dev_err(&slave->dev,
1215 "Unsupported clock base, mclk %d\n",
1216 mclk_freq);
1217 return -EINVAL;
1218 }
1219
1220 if (mclk_freq % curr_freq) {
1221 dev_err(&slave->dev,
1222 "mclk %d is not multiple of bus curr_freq %d\n",
1223 mclk_freq, curr_freq);
1224 return -EINVAL;
1225 }
1226
1227 scale = mclk_freq / curr_freq;
1228
1229 /*
1230 * map scale to Table 90 of SoundWire 1.2 spec - and check
1231 * that the scale is a power of two and maximum 64
1232 */
1233 scale_index = ilog2(scale);
1234
1235 if (BIT(scale_index) != scale || scale_index > 6) {
1236 dev_err(&slave->dev,
1237 "No match found for scale %d, bus mclk %d curr_freq %d\n",
1238 scale, mclk_freq, curr_freq);
1239 return -EINVAL;
1240 }
1241 scale_index++;
1242
299e9780 1243 ret = sdw_write_no_pm(slave, SDW_SCP_BUS_CLOCK_BASE, base);
29d158f9
PLB
1244 if (ret < 0) {
1245 dev_err(&slave->dev,
1246 "SDW_SCP_BUS_CLOCK_BASE write failed:%d\n", ret);
1247 return ret;
1248 }
1249
1250 /* initialize scale for both banks */
299e9780 1251 ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B0, scale_index);
29d158f9
PLB
1252 if (ret < 0) {
1253 dev_err(&slave->dev,
1254 "SDW_SCP_BUSCLOCK_SCALE_B0 write failed:%d\n", ret);
1255 return ret;
1256 }
299e9780 1257 ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B1, scale_index);
29d158f9
PLB
1258 if (ret < 0)
1259 dev_err(&slave->dev,
1260 "SDW_SCP_BUSCLOCK_SCALE_B1 write failed:%d\n", ret);
1261
1262 dev_dbg(&slave->dev,
1263 "Configured bus base %d, scale %d, mclk %d, curr_freq %d\n",
1264 base, scale_index, mclk_freq, curr_freq);
1265
1266 return ret;
1267}
1268
d52d7a1b
SK
1269static int sdw_initialize_slave(struct sdw_slave *slave)
1270{
1271 struct sdw_slave_prop *prop = &slave->prop;
6b8caa6f 1272 int status;
d52d7a1b
SK
1273 int ret;
1274 u8 val;
1275
29d158f9
PLB
1276 ret = sdw_slave_set_frequency(slave);
1277 if (ret < 0)
1278 return ret;
1279
6b8caa6f
BL
1280 if (slave->bus->prop.quirks & SDW_MASTER_QUIRKS_CLEAR_INITIAL_CLASH) {
1281 /* Clear bus clash interrupt before enabling interrupt mask */
1282 status = sdw_read_no_pm(slave, SDW_SCP_INT1);
1283 if (status < 0) {
1284 dev_err(&slave->dev,
1285 "SDW_SCP_INT1 (BUS_CLASH) read failed:%d\n", status);
1286 return status;
1287 }
1288 if (status & SDW_SCP_INT1_BUS_CLASH) {
1289 dev_warn(&slave->dev, "Bus clash detected before INT mask is enabled\n");
1290 ret = sdw_write_no_pm(slave, SDW_SCP_INT1, SDW_SCP_INT1_BUS_CLASH);
1291 if (ret < 0) {
1292 dev_err(&slave->dev,
1293 "SDW_SCP_INT1 (BUS_CLASH) write failed:%d\n", ret);
1294 return ret;
1295 }
1296 }
1297 }
1298 if ((slave->bus->prop.quirks & SDW_MASTER_QUIRKS_CLEAR_INITIAL_PARITY) &&
1299 !(slave->prop.quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY)) {
1300 /* Clear parity interrupt before enabling interrupt mask */
1301 status = sdw_read_no_pm(slave, SDW_SCP_INT1);
1302 if (status < 0) {
1303 dev_err(&slave->dev,
1304 "SDW_SCP_INT1 (PARITY) read failed:%d\n", status);
1305 return status;
1306 }
1307 if (status & SDW_SCP_INT1_PARITY) {
1308 dev_warn(&slave->dev, "PARITY error detected before INT mask is enabled\n");
1309 ret = sdw_write_no_pm(slave, SDW_SCP_INT1, SDW_SCP_INT1_PARITY);
1310 if (ret < 0) {
1311 dev_err(&slave->dev,
1312 "SDW_SCP_INT1 (PARITY) write failed:%d\n", ret);
1313 return ret;
1314 }
1315 }
1316 }
1317
d52d7a1b 1318 /*
2acd30b9
PLB
1319 * Set SCP_INT1_MASK register, typically bus clash and
1320 * implementation-defined interrupt mask. The Parity detection
1321 * may not always be correct on startup so its use is
1322 * device-dependent, it might e.g. only be enabled in
1323 * steady-state after a couple of frames.
d52d7a1b 1324 */
2acd30b9 1325 val = slave->prop.scp_int1_mask;
d52d7a1b
SK
1326
1327 /* Enable SCP interrupts */
b04c975e 1328 ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1, val, val);
d52d7a1b 1329 if (ret < 0) {
6d7a1ff7 1330 dev_err(&slave->dev,
17ed5bef 1331 "SDW_SCP_INTMASK1 write failed:%d\n", ret);
d52d7a1b
SK
1332 return ret;
1333 }
1334
1335 /* No need to continue if DP0 is not present */
1336 if (!slave->prop.dp0_prop)
1337 return 0;
1338
1339 /* Enable DP0 interrupts */
8acbbfec 1340 val = prop->dp0_prop->imp_def_interrupts;
d52d7a1b
SK
1341 val |= SDW_DP0_INT_PORT_READY | SDW_DP0_INT_BRA_FAILURE;
1342
b04c975e 1343 ret = sdw_update_no_pm(slave, SDW_DP0_INTMASK, val, val);
5de79ba8 1344 if (ret < 0)
6d7a1ff7 1345 dev_err(&slave->dev,
17ed5bef 1346 "SDW_DP0_INTMASK read failed:%d\n", ret);
5de79ba8 1347 return ret;
d52d7a1b 1348}
b0a9c37b
VK
1349
1350static int sdw_handle_dp0_interrupt(struct sdw_slave *slave, u8 *slave_status)
1351{
b35991de 1352 u8 clear, impl_int_mask;
b0a9c37b
VK
1353 int status, status2, ret, count = 0;
1354
c30b63ef 1355 status = sdw_read_no_pm(slave, SDW_DP0_INT);
b0a9c37b 1356 if (status < 0) {
6d7a1ff7 1357 dev_err(&slave->dev,
17ed5bef 1358 "SDW_DP0_INT read failed:%d\n", status);
b0a9c37b
VK
1359 return status;
1360 }
1361
1362 do {
b35991de
PLB
1363 clear = status & ~SDW_DP0_INTERRUPTS;
1364
b0a9c37b 1365 if (status & SDW_DP0_INT_TEST_FAIL) {
17ed5bef 1366 dev_err(&slave->dev, "Test fail for port 0\n");
b0a9c37b
VK
1367 clear |= SDW_DP0_INT_TEST_FAIL;
1368 }
1369
1370 /*
1371 * Assumption: PORT_READY interrupt will be received only for
1372 * ports implementing Channel Prepare state machine (CP_SM)
1373 */
1374
1375 if (status & SDW_DP0_INT_PORT_READY) {
1376 complete(&slave->port_ready[0]);
1377 clear |= SDW_DP0_INT_PORT_READY;
1378 }
1379
1380 if (status & SDW_DP0_INT_BRA_FAILURE) {
17ed5bef 1381 dev_err(&slave->dev, "BRA failed\n");
b0a9c37b
VK
1382 clear |= SDW_DP0_INT_BRA_FAILURE;
1383 }
1384
1385 impl_int_mask = SDW_DP0_INT_IMPDEF1 |
1386 SDW_DP0_INT_IMPDEF2 | SDW_DP0_INT_IMPDEF3;
1387
1388 if (status & impl_int_mask) {
1389 clear |= impl_int_mask;
1390 *slave_status = clear;
1391 }
1392
b35991de 1393 /* clear the interrupts but don't touch reserved and SDCA_CASCADE fields */
c30b63ef 1394 ret = sdw_write_no_pm(slave, SDW_DP0_INT, clear);
b0a9c37b 1395 if (ret < 0) {
6d7a1ff7 1396 dev_err(&slave->dev,
17ed5bef 1397 "SDW_DP0_INT write failed:%d\n", ret);
b0a9c37b
VK
1398 return ret;
1399 }
1400
1401 /* Read DP0 interrupt again */
c30b63ef 1402 status2 = sdw_read_no_pm(slave, SDW_DP0_INT);
b0a9c37b 1403 if (status2 < 0) {
6d7a1ff7 1404 dev_err(&slave->dev,
17ed5bef 1405 "SDW_DP0_INT read failed:%d\n", status2);
80cd8f01 1406 return status2;
b0a9c37b 1407 }
6e06a855 1408 /* filter to limit loop to interrupts identified in the first status read */
b0a9c37b
VK
1409 status &= status2;
1410
1411 count++;
1412
1413 /* we can get alerts while processing so keep retrying */
b35991de 1414 } while ((status & SDW_DP0_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY));
b0a9c37b
VK
1415
1416 if (count == SDW_READ_INTR_CLEAR_RETRY)
6d7a1ff7 1417 dev_warn(&slave->dev, "Reached MAX_RETRY on DP0 read\n");
b0a9c37b
VK
1418
1419 return ret;
1420}
1421
1422static int sdw_handle_port_interrupt(struct sdw_slave *slave,
73ede046 1423 int port, u8 *slave_status)
b0a9c37b 1424{
47b85209 1425 u8 clear, impl_int_mask;
b0a9c37b
VK
1426 int status, status2, ret, count = 0;
1427 u32 addr;
1428
1429 if (port == 0)
1430 return sdw_handle_dp0_interrupt(slave, slave_status);
1431
1432 addr = SDW_DPN_INT(port);
c30b63ef 1433 status = sdw_read_no_pm(slave, addr);
b0a9c37b 1434 if (status < 0) {
6d7a1ff7 1435 dev_err(&slave->dev,
17ed5bef 1436 "SDW_DPN_INT read failed:%d\n", status);
b0a9c37b
VK
1437
1438 return status;
1439 }
1440
1441 do {
47b85209
PLB
1442 clear = status & ~SDW_DPN_INTERRUPTS;
1443
b0a9c37b 1444 if (status & SDW_DPN_INT_TEST_FAIL) {
17ed5bef 1445 dev_err(&slave->dev, "Test fail for port:%d\n", port);
b0a9c37b
VK
1446 clear |= SDW_DPN_INT_TEST_FAIL;
1447 }
1448
1449 /*
1450 * Assumption: PORT_READY interrupt will be received only
1451 * for ports implementing CP_SM.
1452 */
1453 if (status & SDW_DPN_INT_PORT_READY) {
1454 complete(&slave->port_ready[port]);
1455 clear |= SDW_DPN_INT_PORT_READY;
1456 }
1457
1458 impl_int_mask = SDW_DPN_INT_IMPDEF1 |
1459 SDW_DPN_INT_IMPDEF2 | SDW_DPN_INT_IMPDEF3;
1460
b0a9c37b
VK
1461 if (status & impl_int_mask) {
1462 clear |= impl_int_mask;
1463 *slave_status = clear;
1464 }
1465
47b85209 1466 /* clear the interrupt but don't touch reserved fields */
c30b63ef 1467 ret = sdw_write_no_pm(slave, addr, clear);
b0a9c37b 1468 if (ret < 0) {
6d7a1ff7 1469 dev_err(&slave->dev,
17ed5bef 1470 "SDW_DPN_INT write failed:%d\n", ret);
b0a9c37b
VK
1471 return ret;
1472 }
1473
1474 /* Read DPN interrupt again */
c30b63ef 1475 status2 = sdw_read_no_pm(slave, addr);
80cd8f01 1476 if (status2 < 0) {
6d7a1ff7 1477 dev_err(&slave->dev,
17ed5bef 1478 "SDW_DPN_INT read failed:%d\n", status2);
80cd8f01 1479 return status2;
b0a9c37b 1480 }
6e06a855 1481 /* filter to limit loop to interrupts identified in the first status read */
b0a9c37b
VK
1482 status &= status2;
1483
1484 count++;
1485
1486 /* we can get alerts while processing so keep retrying */
47b85209 1487 } while ((status & SDW_DPN_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY));
b0a9c37b
VK
1488
1489 if (count == SDW_READ_INTR_CLEAR_RETRY)
6d7a1ff7 1490 dev_warn(&slave->dev, "Reached MAX_RETRY on port read");
b0a9c37b
VK
1491
1492 return ret;
1493}
1494
1495static int sdw_handle_slave_alerts(struct sdw_slave *slave)
1496{
1497 struct sdw_slave_intr_status slave_intr;
f1fac63a 1498 u8 clear = 0, bit, port_status[15] = {0};
b0a9c37b
VK
1499 int port_num, stat, ret, count = 0;
1500 unsigned long port;
7ffaba04 1501 bool slave_notify;
b7cab9be 1502 u8 sdca_cascade = 0;
b0a9c37b 1503 u8 buf, buf2[2], _buf, _buf2[2];
4724f12c
PLB
1504 bool parity_check;
1505 bool parity_quirk;
b0a9c37b
VK
1506
1507 sdw_modify_slave_status(slave, SDW_SLAVE_ALERT);
1508
aa792935
RW
1509 ret = pm_runtime_get_sync(&slave->dev);
1510 if (ret < 0 && ret != -EACCES) {
1511 dev_err(&slave->dev, "Failed to resume device: %d\n", ret);
973794e8 1512 pm_runtime_put_noidle(&slave->dev);
aa792935
RW
1513 return ret;
1514 }
1515
f8d0168e 1516 /* Read Intstat 1, Intstat 2 and Intstat 3 registers */
c30b63ef 1517 ret = sdw_read_no_pm(slave, SDW_SCP_INT1);
b0a9c37b 1518 if (ret < 0) {
6d7a1ff7 1519 dev_err(&slave->dev,
17ed5bef 1520 "SDW_SCP_INT1 read failed:%d\n", ret);
aa792935 1521 goto io_err;
b0a9c37b 1522 }
72b16d4a 1523 buf = ret;
b0a9c37b 1524
c30b63ef 1525 ret = sdw_nread_no_pm(slave, SDW_SCP_INTSTAT2, 2, buf2);
b0a9c37b 1526 if (ret < 0) {
6d7a1ff7 1527 dev_err(&slave->dev,
17ed5bef 1528 "SDW_SCP_INT2/3 read failed:%d\n", ret);
aa792935 1529 goto io_err;
b0a9c37b
VK
1530 }
1531
b7cab9be 1532 if (slave->prop.is_sdca) {
c30b63ef 1533 ret = sdw_read_no_pm(slave, SDW_DP0_INT);
b7cab9be 1534 if (ret < 0) {
6d7a1ff7 1535 dev_err(&slave->dev,
b7cab9be
PLB
1536 "SDW_DP0_INT read failed:%d\n", ret);
1537 goto io_err;
1538 }
1539 sdca_cascade = ret & SDW_DP0_SDCA_CASCADE;
1540 }
1541
b0a9c37b 1542 do {
7ffaba04
PLB
1543 slave_notify = false;
1544
b0a9c37b
VK
1545 /*
1546 * Check parity, bus clash and Slave (impl defined)
1547 * interrupt
1548 */
1549 if (buf & SDW_SCP_INT1_PARITY) {
4724f12c
PLB
1550 parity_check = slave->prop.scp_int1_mask & SDW_SCP_INT1_PARITY;
1551 parity_quirk = !slave->first_interrupt_done &&
1552 (slave->prop.quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY);
1553
1554 if (parity_check && !parity_quirk)
310f6dc6 1555 dev_err(&slave->dev, "Parity error detected\n");
b0a9c37b
VK
1556 clear |= SDW_SCP_INT1_PARITY;
1557 }
1558
1559 if (buf & SDW_SCP_INT1_BUS_CLASH) {
310f6dc6
PLB
1560 if (slave->prop.scp_int1_mask & SDW_SCP_INT1_BUS_CLASH)
1561 dev_err(&slave->dev, "Bus clash detected\n");
b0a9c37b
VK
1562 clear |= SDW_SCP_INT1_BUS_CLASH;
1563 }
1564
1565 /*
1566 * When bus clash or parity errors are detected, such errors
1567 * are unlikely to be recoverable errors.
1568 * TODO: In such scenario, reset bus. Make this configurable
1569 * via sysfs property with bus reset being the default.
1570 */
1571
1572 if (buf & SDW_SCP_INT1_IMPL_DEF) {
310f6dc6
PLB
1573 if (slave->prop.scp_int1_mask & SDW_SCP_INT1_IMPL_DEF) {
1574 dev_dbg(&slave->dev, "Slave impl defined interrupt\n");
1575 slave_notify = true;
1576 }
b0a9c37b 1577 clear |= SDW_SCP_INT1_IMPL_DEF;
b0a9c37b
VK
1578 }
1579
b7cab9be
PLB
1580 /* the SDCA interrupts are cleared in the codec driver .interrupt_callback() */
1581 if (sdca_cascade)
1582 slave_notify = true;
1583
b0a9c37b
VK
1584 /* Check port 0 - 3 interrupts */
1585 port = buf & SDW_SCP_INT1_PORT0_3;
1586
1587 /* To get port number corresponding to bits, shift it */
d5826a4b 1588 port = FIELD_GET(SDW_SCP_INT1_PORT0_3, port);
b0a9c37b
VK
1589 for_each_set_bit(bit, &port, 8) {
1590 sdw_handle_port_interrupt(slave, bit,
73ede046 1591 &port_status[bit]);
b0a9c37b
VK
1592 }
1593
1594 /* Check if cascade 2 interrupt is present */
1595 if (buf & SDW_SCP_INT1_SCP2_CASCADE) {
1596 port = buf2[0] & SDW_SCP_INTSTAT2_PORT4_10;
1597 for_each_set_bit(bit, &port, 8) {
1598 /* scp2 ports start from 4 */
1599 port_num = bit + 3;
1600 sdw_handle_port_interrupt(slave,
1601 port_num,
1602 &port_status[port_num]);
1603 }
1604 }
1605
1606 /* now check last cascade */
1607 if (buf2[0] & SDW_SCP_INTSTAT2_SCP3_CASCADE) {
1608 port = buf2[1] & SDW_SCP_INTSTAT3_PORT11_14;
1609 for_each_set_bit(bit, &port, 8) {
1610 /* scp3 ports start from 11 */
1611 port_num = bit + 10;
1612 sdw_handle_port_interrupt(slave,
1613 port_num,
1614 &port_status[port_num]);
1615 }
1616 }
1617
1618 /* Update the Slave driver */
09830d5e
PLB
1619 if (slave_notify && slave->ops &&
1620 slave->ops->interrupt_callback) {
b7cab9be 1621 slave_intr.sdca_cascade = sdca_cascade;
b0a9c37b
VK
1622 slave_intr.control_port = clear;
1623 memcpy(slave_intr.port, &port_status,
73ede046 1624 sizeof(slave_intr.port));
b0a9c37b
VK
1625
1626 slave->ops->interrupt_callback(slave, &slave_intr);
1627 }
1628
1629 /* Ack interrupt */
c30b63ef 1630 ret = sdw_write_no_pm(slave, SDW_SCP_INT1, clear);
b0a9c37b 1631 if (ret < 0) {
6d7a1ff7 1632 dev_err(&slave->dev,
17ed5bef 1633 "SDW_SCP_INT1 write failed:%d\n", ret);
aa792935 1634 goto io_err;
b0a9c37b
VK
1635 }
1636
c2819e19
PLB
1637 /* at this point all initial interrupt sources were handled */
1638 slave->first_interrupt_done = true;
1639
b0a9c37b
VK
1640 /*
1641 * Read status again to ensure no new interrupts arrived
1642 * while servicing interrupts.
1643 */
c30b63ef 1644 ret = sdw_read_no_pm(slave, SDW_SCP_INT1);
b0a9c37b 1645 if (ret < 0) {
6d7a1ff7 1646 dev_err(&slave->dev,
b500127e 1647 "SDW_SCP_INT1 recheck read failed:%d\n", ret);
aa792935 1648 goto io_err;
b0a9c37b 1649 }
72b16d4a 1650 _buf = ret;
b0a9c37b 1651
c30b63ef 1652 ret = sdw_nread_no_pm(slave, SDW_SCP_INTSTAT2, 2, _buf2);
b0a9c37b 1653 if (ret < 0) {
6d7a1ff7 1654 dev_err(&slave->dev,
b500127e 1655 "SDW_SCP_INT2/3 recheck read failed:%d\n", ret);
aa792935 1656 goto io_err;
b0a9c37b
VK
1657 }
1658
b7cab9be 1659 if (slave->prop.is_sdca) {
c30b63ef 1660 ret = sdw_read_no_pm(slave, SDW_DP0_INT);
b7cab9be 1661 if (ret < 0) {
6d7a1ff7 1662 dev_err(&slave->dev,
b500127e 1663 "SDW_DP0_INT recheck read failed:%d\n", ret);
b7cab9be
PLB
1664 goto io_err;
1665 }
1666 sdca_cascade = ret & SDW_DP0_SDCA_CASCADE;
1667 }
1668
6e06a855
PLB
1669 /*
1670 * Make sure no interrupts are pending, but filter to limit loop
1671 * to interrupts identified in the first status read
1672 */
b0a9c37b
VK
1673 buf &= _buf;
1674 buf2[0] &= _buf2[0];
1675 buf2[1] &= _buf2[1];
b7cab9be 1676 stat = buf || buf2[0] || buf2[1] || sdca_cascade;
b0a9c37b
VK
1677
1678 /*
1679 * Exit loop if Slave is continuously in ALERT state even
1680 * after servicing the interrupt multiple times.
1681 */
1682 count++;
1683
1684 /* we can get alerts while processing so keep retrying */
1685 } while (stat != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
1686
1687 if (count == SDW_READ_INTR_CLEAR_RETRY)
6d7a1ff7 1688 dev_warn(&slave->dev, "Reached MAX_RETRY on alert read\n");
b0a9c37b 1689
aa792935
RW
1690io_err:
1691 pm_runtime_mark_last_busy(&slave->dev);
1692 pm_runtime_put_autosuspend(&slave->dev);
1693
b0a9c37b
VK
1694 return ret;
1695}
1696
1697static int sdw_update_slave_status(struct sdw_slave *slave,
73ede046 1698 enum sdw_slave_status status)
b0a9c37b 1699{
2140b66b 1700 unsigned long time;
b0a9c37b 1701
2140b66b
PLB
1702 if (!slave->probed) {
1703 /*
1704 * the slave status update is typically handled in an
1705 * interrupt thread, which can race with the driver
1706 * probe, e.g. when a module needs to be loaded.
1707 *
1708 * make sure the probe is complete before updating
1709 * status.
1710 */
1711 time = wait_for_completion_timeout(&slave->probe_complete,
1712 msecs_to_jiffies(DEFAULT_PROBE_TIMEOUT));
1713 if (!time) {
1714 dev_err(&slave->dev, "Probe not complete, timed out\n");
1715 return -ETIMEDOUT;
1716 }
1717 }
1718
1719 if (!slave->ops || !slave->ops->update_status)
1720 return 0;
1721
1722 return slave->ops->update_status(slave, status);
b0a9c37b
VK
1723}
1724
1725/**
1726 * sdw_handle_slave_status() - Handle Slave status
1727 * @bus: SDW bus instance
1728 * @status: Status for all Slave(s)
1729 */
1730int sdw_handle_slave_status(struct sdw_bus *bus,
73ede046 1731 enum sdw_slave_status status[])
b0a9c37b
VK
1732{
1733 enum sdw_slave_status prev_status;
1734 struct sdw_slave *slave;
a90def06 1735 bool attached_initializing;
b0a9c37b
VK
1736 int i, ret = 0;
1737
61061901
PLB
1738 /* first check if any Slaves fell off the bus */
1739 for (i = 1; i <= SDW_MAX_DEVICES; i++) {
1740 mutex_lock(&bus->bus_lock);
1741 if (test_bit(i, bus->assigned) == false) {
1742 mutex_unlock(&bus->bus_lock);
1743 continue;
1744 }
1745 mutex_unlock(&bus->bus_lock);
1746
1747 slave = sdw_get_slave(bus, i);
1748 if (!slave)
1749 continue;
1750
1751 if (status[i] == SDW_SLAVE_UNATTACHED &&
1752 slave->status != SDW_SLAVE_UNATTACHED)
1753 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
1754 }
1755
b0a9c37b 1756 if (status[0] == SDW_SLAVE_ATTACHED) {
6e0ac6a6 1757 dev_dbg(bus->dev, "Slave attached, programming device number\n");
b0a9c37b 1758 ret = sdw_program_device_num(bus);
a5759f19 1759 if (ret < 0)
17ed5bef 1760 dev_err(bus->dev, "Slave attach failed: %d\n", ret);
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1761 /*
1762 * programming a device number will have side effects,
1763 * so we deal with other devices at a later time
1764 */
1765 return ret;
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VK
1766 }
1767
1768 /* Continue to check other slave statuses */
1769 for (i = 1; i <= SDW_MAX_DEVICES; i++) {
1770 mutex_lock(&bus->bus_lock);
1771 if (test_bit(i, bus->assigned) == false) {
1772 mutex_unlock(&bus->bus_lock);
1773 continue;
1774 }
1775 mutex_unlock(&bus->bus_lock);
1776
1777 slave = sdw_get_slave(bus, i);
1778 if (!slave)
1779 continue;
1780
a90def06
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1781 attached_initializing = false;
1782
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VK
1783 switch (status[i]) {
1784 case SDW_SLAVE_UNATTACHED:
1785 if (slave->status == SDW_SLAVE_UNATTACHED)
1786 break;
1787
1788 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
1789 break;
1790
1791 case SDW_SLAVE_ALERT:
1792 ret = sdw_handle_slave_alerts(slave);
a5759f19 1793 if (ret < 0)
6d7a1ff7 1794 dev_err(&slave->dev,
17ed5bef 1795 "Slave %d alert handling failed: %d\n",
b0a9c37b
VK
1796 i, ret);
1797 break;
1798
1799 case SDW_SLAVE_ATTACHED:
1800 if (slave->status == SDW_SLAVE_ATTACHED)
1801 break;
1802
1803 prev_status = slave->status;
1804 sdw_modify_slave_status(slave, SDW_SLAVE_ATTACHED);
1805
1806 if (prev_status == SDW_SLAVE_ALERT)
1807 break;
1808
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1809 attached_initializing = true;
1810
b0a9c37b 1811 ret = sdw_initialize_slave(slave);
a5759f19 1812 if (ret < 0)
6d7a1ff7 1813 dev_err(&slave->dev,
17ed5bef 1814 "Slave %d initialization failed: %d\n",
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VK
1815 i, ret);
1816
1817 break;
1818
1819 default:
6d7a1ff7 1820 dev_err(&slave->dev, "Invalid slave %d status:%d\n",
73ede046 1821 i, status[i]);
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VK
1822 break;
1823 }
1824
1825 ret = sdw_update_slave_status(slave, status[i]);
a5759f19 1826 if (ret < 0)
6d7a1ff7 1827 dev_err(&slave->dev,
17ed5bef 1828 "Update Slave status failed:%d\n", ret);
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PLB
1829 if (attached_initializing) {
1830 dev_dbg(&slave->dev,
1831 "%s: signaling initialization completion for Slave %d\n",
1832 __func__, slave->dev_num);
1833
a90def06 1834 complete(&slave->initialization_complete);
f1b69026 1835 }
b0a9c37b
VK
1836 }
1837
1838 return ret;
1839}
1840EXPORT_SYMBOL(sdw_handle_slave_status);
3ab2ca40
PLB
1841
1842void sdw_clear_slave_status(struct sdw_bus *bus, u32 request)
1843{
1844 struct sdw_slave *slave;
1845 int i;
1846
1847 /* Check all non-zero devices */
1848 for (i = 1; i <= SDW_MAX_DEVICES; i++) {
1849 mutex_lock(&bus->bus_lock);
1850 if (test_bit(i, bus->assigned) == false) {
1851 mutex_unlock(&bus->bus_lock);
1852 continue;
1853 }
1854 mutex_unlock(&bus->bus_lock);
1855
1856 slave = sdw_get_slave(bus, i);
1857 if (!slave)
1858 continue;
1859
c2819e19 1860 if (slave->status != SDW_SLAVE_UNATTACHED) {
3ab2ca40 1861 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
c2819e19 1862 slave->first_interrupt_done = false;
899a7509 1863 sdw_update_slave_status(slave, SDW_SLAVE_UNATTACHED);
c2819e19 1864 }
3ab2ca40
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1865
1866 /* keep track of request, used in pm_runtime resume */
1867 slave->unattach_request = request;
1868 }
1869}
1870EXPORT_SYMBOL(sdw_clear_slave_status);