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7c3cd189 VK |
1 | // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) |
2 | // Copyright(c) 2015-17 Intel Corporation. | |
3 | ||
4 | #include <linux/acpi.h> | |
5 | #include <linux/mod_devicetable.h> | |
9d715fa0 VK |
6 | #include <linux/pm_runtime.h> |
7 | #include <linux/soundwire/sdw_registers.h> | |
7c3cd189 VK |
8 | #include <linux/soundwire/sdw.h> |
9 | #include "bus.h" | |
10 | ||
11 | /** | |
12 | * sdw_add_bus_master() - add a bus Master instance | |
13 | * @bus: bus instance | |
14 | * | |
15 | * Initializes the bus instance, read properties and create child | |
16 | * devices. | |
17 | */ | |
18 | int sdw_add_bus_master(struct sdw_bus *bus) | |
19 | { | |
5c3eb9f7 | 20 | struct sdw_master_prop *prop = NULL; |
7c3cd189 VK |
21 | int ret; |
22 | ||
23 | if (!bus->dev) { | |
17ed5bef | 24 | pr_err("SoundWire bus has no device\n"); |
7c3cd189 VK |
25 | return -ENODEV; |
26 | } | |
27 | ||
9d715fa0 | 28 | if (!bus->ops) { |
17ed5bef | 29 | dev_err(bus->dev, "SoundWire Bus ops are not set\n"); |
9d715fa0 VK |
30 | return -EINVAL; |
31 | } | |
32 | ||
33 | mutex_init(&bus->msg_lock); | |
7c3cd189 VK |
34 | mutex_init(&bus->bus_lock); |
35 | INIT_LIST_HEAD(&bus->slaves); | |
89e59053 | 36 | INIT_LIST_HEAD(&bus->m_rt_list); |
7c3cd189 | 37 | |
ce6e74d0 SN |
38 | /* |
39 | * Initialize multi_link flag | |
40 | * TODO: populate this flag by reading property from FW node | |
41 | */ | |
42 | bus->multi_link = false; | |
56d4fe31 VK |
43 | if (bus->ops->read_prop) { |
44 | ret = bus->ops->read_prop(bus); | |
45 | if (ret < 0) { | |
62f0cec3 VK |
46 | dev_err(bus->dev, |
47 | "Bus read properties failed:%d\n", ret); | |
56d4fe31 VK |
48 | return ret; |
49 | } | |
50 | } | |
51 | ||
7c3cd189 | 52 | /* |
21c2de29 | 53 | * Device numbers in SoundWire are 0 through 15. Enumeration device |
7c3cd189 VK |
54 | * number (0), Broadcast device number (15), Group numbers (12 and |
55 | * 13) and Master device number (14) are not used for assignment so | |
56 | * mask these and other higher bits. | |
57 | */ | |
58 | ||
59 | /* Set higher order bits */ | |
60 | *bus->assigned = ~GENMASK(SDW_BROADCAST_DEV_NUM, SDW_ENUM_DEV_NUM); | |
61 | ||
62 | /* Set enumuration device number and broadcast device number */ | |
63 | set_bit(SDW_ENUM_DEV_NUM, bus->assigned); | |
64 | set_bit(SDW_BROADCAST_DEV_NUM, bus->assigned); | |
65 | ||
66 | /* Set group device numbers and master device number */ | |
67 | set_bit(SDW_GROUP12_DEV_NUM, bus->assigned); | |
68 | set_bit(SDW_GROUP13_DEV_NUM, bus->assigned); | |
69 | set_bit(SDW_MASTER_DEV_NUM, bus->assigned); | |
70 | ||
71 | /* | |
72 | * SDW is an enumerable bus, but devices can be powered off. So, | |
73 | * they won't be able to report as present. | |
74 | * | |
75 | * Create Slave devices based on Slaves described in | |
76 | * the respective firmware (ACPI/DT) | |
77 | */ | |
78 | if (IS_ENABLED(CONFIG_ACPI) && ACPI_HANDLE(bus->dev)) | |
79 | ret = sdw_acpi_find_slaves(bus); | |
80 | else | |
81 | ret = -ENOTSUPP; /* No ACPI/DT so error out */ | |
82 | ||
83 | if (ret) { | |
84 | dev_err(bus->dev, "Finding slaves failed:%d\n", ret); | |
85 | return ret; | |
86 | } | |
87 | ||
99b8a5d6 | 88 | /* |
5c3eb9f7 SK |
89 | * Initialize clock values based on Master properties. The max |
90 | * frequency is read from max_freq property. Current assumption | |
91 | * is that the bus will start at highest clock frequency when | |
92 | * powered on. | |
93 | * | |
99b8a5d6 SK |
94 | * Default active bank will be 0 as out of reset the Slaves have |
95 | * to start with bank 0 (Table 40 of Spec) | |
96 | */ | |
5c3eb9f7 SK |
97 | prop = &bus->prop; |
98 | bus->params.max_dr_freq = prop->max_freq * SDW_DOUBLE_RATE_FACTOR; | |
99 | bus->params.curr_dr_freq = bus->params.max_dr_freq; | |
99b8a5d6 SK |
100 | bus->params.curr_bank = SDW_BANK0; |
101 | bus->params.next_bank = SDW_BANK1; | |
102 | ||
7c3cd189 VK |
103 | return 0; |
104 | } | |
105 | EXPORT_SYMBOL(sdw_add_bus_master); | |
106 | ||
107 | static int sdw_delete_slave(struct device *dev, void *data) | |
108 | { | |
109 | struct sdw_slave *slave = dev_to_sdw_dev(dev); | |
110 | struct sdw_bus *bus = slave->bus; | |
111 | ||
112 | mutex_lock(&bus->bus_lock); | |
113 | ||
114 | if (slave->dev_num) /* clear dev_num if assigned */ | |
115 | clear_bit(slave->dev_num, bus->assigned); | |
116 | ||
117 | list_del_init(&slave->node); | |
118 | mutex_unlock(&bus->bus_lock); | |
119 | ||
120 | device_unregister(dev); | |
121 | return 0; | |
122 | } | |
123 | ||
124 | /** | |
125 | * sdw_delete_bus_master() - delete the bus master instance | |
126 | * @bus: bus to be deleted | |
127 | * | |
128 | * Remove the instance, delete the child devices. | |
129 | */ | |
130 | void sdw_delete_bus_master(struct sdw_bus *bus) | |
131 | { | |
132 | device_for_each_child(bus->dev, NULL, sdw_delete_slave); | |
133 | } | |
134 | EXPORT_SYMBOL(sdw_delete_bus_master); | |
135 | ||
9d715fa0 VK |
136 | /* |
137 | * SDW IO Calls | |
138 | */ | |
139 | ||
140 | static inline int find_response_code(enum sdw_command_response resp) | |
141 | { | |
142 | switch (resp) { | |
143 | case SDW_CMD_OK: | |
144 | return 0; | |
145 | ||
146 | case SDW_CMD_IGNORED: | |
147 | return -ENODATA; | |
148 | ||
149 | case SDW_CMD_TIMEOUT: | |
150 | return -ETIMEDOUT; | |
151 | ||
152 | default: | |
153 | return -EIO; | |
154 | } | |
155 | } | |
156 | ||
157 | static inline int do_transfer(struct sdw_bus *bus, struct sdw_msg *msg) | |
158 | { | |
159 | int retry = bus->prop.err_threshold; | |
160 | enum sdw_command_response resp; | |
161 | int ret = 0, i; | |
162 | ||
163 | for (i = 0; i <= retry; i++) { | |
164 | resp = bus->ops->xfer_msg(bus, msg); | |
165 | ret = find_response_code(resp); | |
166 | ||
167 | /* if cmd is ok or ignored return */ | |
168 | if (ret == 0 || ret == -ENODATA) | |
169 | return ret; | |
170 | } | |
171 | ||
172 | return ret; | |
173 | } | |
174 | ||
175 | static inline int do_transfer_defer(struct sdw_bus *bus, | |
73ede046 PLB |
176 | struct sdw_msg *msg, |
177 | struct sdw_defer *defer) | |
9d715fa0 VK |
178 | { |
179 | int retry = bus->prop.err_threshold; | |
180 | enum sdw_command_response resp; | |
181 | int ret = 0, i; | |
182 | ||
183 | defer->msg = msg; | |
184 | defer->length = msg->len; | |
a306a0e4 | 185 | init_completion(&defer->complete); |
9d715fa0 VK |
186 | |
187 | for (i = 0; i <= retry; i++) { | |
188 | resp = bus->ops->xfer_msg_defer(bus, msg, defer); | |
189 | ret = find_response_code(resp); | |
190 | /* if cmd is ok or ignored return */ | |
191 | if (ret == 0 || ret == -ENODATA) | |
192 | return ret; | |
193 | } | |
194 | ||
195 | return ret; | |
196 | } | |
197 | ||
198 | static int sdw_reset_page(struct sdw_bus *bus, u16 dev_num) | |
199 | { | |
200 | int retry = bus->prop.err_threshold; | |
201 | enum sdw_command_response resp; | |
202 | int ret = 0, i; | |
203 | ||
204 | for (i = 0; i <= retry; i++) { | |
205 | resp = bus->ops->reset_page_addr(bus, dev_num); | |
206 | ret = find_response_code(resp); | |
207 | /* if cmd is ok or ignored return */ | |
208 | if (ret == 0 || ret == -ENODATA) | |
209 | return ret; | |
210 | } | |
211 | ||
212 | return ret; | |
213 | } | |
214 | ||
215 | /** | |
216 | * sdw_transfer() - Synchronous transfer message to a SDW Slave device | |
217 | * @bus: SDW bus | |
218 | * @msg: SDW message to be xfered | |
219 | */ | |
220 | int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg) | |
221 | { | |
222 | int ret; | |
223 | ||
224 | mutex_lock(&bus->msg_lock); | |
225 | ||
226 | ret = do_transfer(bus, msg); | |
227 | if (ret != 0 && ret != -ENODATA) | |
228 | dev_err(bus->dev, "trf on Slave %d failed:%d\n", | |
73ede046 | 229 | msg->dev_num, ret); |
9d715fa0 VK |
230 | |
231 | if (msg->page) | |
232 | sdw_reset_page(bus, msg->dev_num); | |
233 | ||
234 | mutex_unlock(&bus->msg_lock); | |
235 | ||
236 | return ret; | |
237 | } | |
238 | ||
239 | /** | |
240 | * sdw_transfer_defer() - Asynchronously transfer message to a SDW Slave device | |
241 | * @bus: SDW bus | |
242 | * @msg: SDW message to be xfered | |
243 | * @defer: Defer block for signal completion | |
244 | * | |
245 | * Caller needs to hold the msg_lock lock while calling this | |
246 | */ | |
247 | int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg, | |
73ede046 | 248 | struct sdw_defer *defer) |
9d715fa0 VK |
249 | { |
250 | int ret; | |
251 | ||
252 | if (!bus->ops->xfer_msg_defer) | |
253 | return -ENOTSUPP; | |
254 | ||
255 | ret = do_transfer_defer(bus, msg, defer); | |
256 | if (ret != 0 && ret != -ENODATA) | |
257 | dev_err(bus->dev, "Defer trf on Slave %d failed:%d\n", | |
73ede046 | 258 | msg->dev_num, ret); |
9d715fa0 VK |
259 | |
260 | if (msg->page) | |
261 | sdw_reset_page(bus, msg->dev_num); | |
262 | ||
263 | return ret; | |
264 | } | |
265 | ||
9d715fa0 | 266 | int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave, |
73ede046 | 267 | u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf) |
9d715fa0 VK |
268 | { |
269 | memset(msg, 0, sizeof(*msg)); | |
270 | msg->addr = addr; /* addr is 16 bit and truncated here */ | |
271 | msg->len = count; | |
272 | msg->dev_num = dev_num; | |
273 | msg->flags = flags; | |
274 | msg->buf = buf; | |
9d715fa0 VK |
275 | |
276 | if (addr < SDW_REG_NO_PAGE) { /* no paging area */ | |
277 | return 0; | |
278 | } else if (addr >= SDW_REG_MAX) { /* illegal addr */ | |
279 | pr_err("SDW: Invalid address %x passed\n", addr); | |
280 | return -EINVAL; | |
281 | } | |
282 | ||
283 | if (addr < SDW_REG_OPTIONAL_PAGE) { /* 32k but no page */ | |
284 | if (slave && !slave->prop.paging_support) | |
285 | return 0; | |
21c2de29 | 286 | /* no need for else as that will fall-through to paging */ |
9d715fa0 VK |
287 | } |
288 | ||
289 | /* paging mandatory */ | |
290 | if (dev_num == SDW_ENUM_DEV_NUM || dev_num == SDW_BROADCAST_DEV_NUM) { | |
291 | pr_err("SDW: Invalid device for paging :%d\n", dev_num); | |
292 | return -EINVAL; | |
293 | } | |
294 | ||
295 | if (!slave) { | |
296 | pr_err("SDW: No slave for paging addr\n"); | |
297 | return -EINVAL; | |
298 | } else if (!slave->prop.paging_support) { | |
299 | dev_err(&slave->dev, | |
17ed5bef | 300 | "address %x needs paging but no support\n", addr); |
9d715fa0 VK |
301 | return -EINVAL; |
302 | } | |
303 | ||
304 | msg->addr_page1 = (addr >> SDW_REG_SHIFT(SDW_SCP_ADDRPAGE1_MASK)); | |
305 | msg->addr_page2 = (addr >> SDW_REG_SHIFT(SDW_SCP_ADDRPAGE2_MASK)); | |
306 | msg->addr |= BIT(15); | |
307 | msg->page = true; | |
308 | ||
309 | return 0; | |
310 | } | |
311 | ||
312 | /** | |
313 | * sdw_nread() - Read "n" contiguous SDW Slave registers | |
314 | * @slave: SDW Slave | |
315 | * @addr: Register address | |
316 | * @count: length | |
317 | * @val: Buffer for values to be read | |
318 | */ | |
319 | int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val) | |
320 | { | |
321 | struct sdw_msg msg; | |
322 | int ret; | |
323 | ||
324 | ret = sdw_fill_msg(&msg, slave, addr, count, | |
73ede046 | 325 | slave->dev_num, SDW_MSG_FLAG_READ, val); |
9d715fa0 VK |
326 | if (ret < 0) |
327 | return ret; | |
328 | ||
329 | ret = pm_runtime_get_sync(slave->bus->dev); | |
c22c0ae5 | 330 | if (ret < 0) |
9d715fa0 VK |
331 | return ret; |
332 | ||
333 | ret = sdw_transfer(slave->bus, &msg); | |
334 | pm_runtime_put(slave->bus->dev); | |
335 | ||
336 | return ret; | |
337 | } | |
338 | EXPORT_SYMBOL(sdw_nread); | |
339 | ||
340 | /** | |
341 | * sdw_nwrite() - Write "n" contiguous SDW Slave registers | |
342 | * @slave: SDW Slave | |
343 | * @addr: Register address | |
344 | * @count: length | |
345 | * @val: Buffer for values to be read | |
346 | */ | |
347 | int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, u8 *val) | |
348 | { | |
349 | struct sdw_msg msg; | |
350 | int ret; | |
351 | ||
352 | ret = sdw_fill_msg(&msg, slave, addr, count, | |
73ede046 | 353 | slave->dev_num, SDW_MSG_FLAG_WRITE, val); |
9d715fa0 VK |
354 | if (ret < 0) |
355 | return ret; | |
356 | ||
357 | ret = pm_runtime_get_sync(slave->bus->dev); | |
c22c0ae5 | 358 | if (ret < 0) |
9d715fa0 VK |
359 | return ret; |
360 | ||
361 | ret = sdw_transfer(slave->bus, &msg); | |
362 | pm_runtime_put(slave->bus->dev); | |
363 | ||
364 | return ret; | |
365 | } | |
366 | EXPORT_SYMBOL(sdw_nwrite); | |
367 | ||
368 | /** | |
369 | * sdw_read() - Read a SDW Slave register | |
370 | * @slave: SDW Slave | |
371 | * @addr: Register address | |
372 | */ | |
373 | int sdw_read(struct sdw_slave *slave, u32 addr) | |
374 | { | |
375 | u8 buf; | |
376 | int ret; | |
377 | ||
378 | ret = sdw_nread(slave, addr, 1, &buf); | |
379 | if (ret < 0) | |
380 | return ret; | |
381 | else | |
382 | return buf; | |
383 | } | |
384 | EXPORT_SYMBOL(sdw_read); | |
385 | ||
386 | /** | |
387 | * sdw_write() - Write a SDW Slave register | |
388 | * @slave: SDW Slave | |
389 | * @addr: Register address | |
390 | * @value: Register value | |
391 | */ | |
392 | int sdw_write(struct sdw_slave *slave, u32 addr, u8 value) | |
393 | { | |
394 | return sdw_nwrite(slave, addr, 1, &value); | |
9d715fa0 VK |
395 | } |
396 | EXPORT_SYMBOL(sdw_write); | |
397 | ||
d52d7a1b SK |
398 | /* |
399 | * SDW alert handling | |
400 | */ | |
401 | ||
402 | /* called with bus_lock held */ | |
403 | static struct sdw_slave *sdw_get_slave(struct sdw_bus *bus, int i) | |
404 | { | |
405 | struct sdw_slave *slave = NULL; | |
406 | ||
407 | list_for_each_entry(slave, &bus->slaves, node) { | |
408 | if (slave->dev_num == i) | |
409 | return slave; | |
410 | } | |
411 | ||
412 | return NULL; | |
413 | } | |
414 | ||
415 | static int sdw_compare_devid(struct sdw_slave *slave, struct sdw_slave_id id) | |
416 | { | |
09830d5e PLB |
417 | if (slave->id.unique_id != id.unique_id || |
418 | slave->id.mfg_id != id.mfg_id || | |
419 | slave->id.part_id != id.part_id || | |
420 | slave->id.class_id != id.class_id) | |
d52d7a1b SK |
421 | return -ENODEV; |
422 | ||
423 | return 0; | |
424 | } | |
425 | ||
426 | /* called with bus_lock held */ | |
427 | static int sdw_get_device_num(struct sdw_slave *slave) | |
428 | { | |
429 | int bit; | |
430 | ||
431 | bit = find_first_zero_bit(slave->bus->assigned, SDW_MAX_DEVICES); | |
432 | if (bit == SDW_MAX_DEVICES) { | |
433 | bit = -ENODEV; | |
434 | goto err; | |
435 | } | |
436 | ||
437 | /* | |
438 | * Do not update dev_num in Slave data structure here, | |
439 | * Update once program dev_num is successful | |
440 | */ | |
441 | set_bit(bit, slave->bus->assigned); | |
442 | ||
443 | err: | |
444 | return bit; | |
445 | } | |
446 | ||
447 | static int sdw_assign_device_num(struct sdw_slave *slave) | |
448 | { | |
449 | int ret, dev_num; | |
450 | ||
451 | /* check first if device number is assigned, if so reuse that */ | |
452 | if (!slave->dev_num) { | |
453 | mutex_lock(&slave->bus->bus_lock); | |
454 | dev_num = sdw_get_device_num(slave); | |
455 | mutex_unlock(&slave->bus->bus_lock); | |
456 | if (dev_num < 0) { | |
17ed5bef | 457 | dev_err(slave->bus->dev, "Get dev_num failed: %d\n", |
73ede046 | 458 | dev_num); |
d52d7a1b SK |
459 | return dev_num; |
460 | } | |
461 | } else { | |
462 | dev_info(slave->bus->dev, | |
17ed5bef | 463 | "Slave already registered dev_num:%d\n", |
73ede046 | 464 | slave->dev_num); |
d52d7a1b SK |
465 | |
466 | /* Clear the slave->dev_num to transfer message on device 0 */ | |
467 | dev_num = slave->dev_num; | |
468 | slave->dev_num = 0; | |
d52d7a1b SK |
469 | } |
470 | ||
471 | ret = sdw_write(slave, SDW_SCP_DEVNUMBER, dev_num); | |
472 | if (ret < 0) { | |
17ed5bef | 473 | dev_err(&slave->dev, "Program device_num failed: %d\n", ret); |
d52d7a1b SK |
474 | return ret; |
475 | } | |
476 | ||
477 | /* After xfer of msg, restore dev_num */ | |
478 | slave->dev_num = dev_num; | |
479 | ||
480 | return 0; | |
481 | } | |
482 | ||
7c3cd189 | 483 | void sdw_extract_slave_id(struct sdw_bus *bus, |
73ede046 | 484 | u64 addr, struct sdw_slave_id *id) |
7c3cd189 | 485 | { |
17ed5bef | 486 | dev_dbg(bus->dev, "SDW Slave Addr: %llx\n", addr); |
7c3cd189 VK |
487 | |
488 | /* | |
489 | * Spec definition | |
490 | * Register Bit Contents | |
491 | * DevId_0 [7:4] 47:44 sdw_version | |
492 | * DevId_0 [3:0] 43:40 unique_id | |
493 | * DevId_1 39:32 mfg_id [15:8] | |
494 | * DevId_2 31:24 mfg_id [7:0] | |
495 | * DevId_3 23:16 part_id [15:8] | |
496 | * DevId_4 15:08 part_id [7:0] | |
497 | * DevId_5 07:00 class_id | |
498 | */ | |
499 | id->sdw_version = (addr >> 44) & GENMASK(3, 0); | |
500 | id->unique_id = (addr >> 40) & GENMASK(3, 0); | |
501 | id->mfg_id = (addr >> 24) & GENMASK(15, 0); | |
502 | id->part_id = (addr >> 8) & GENMASK(15, 0); | |
503 | id->class_id = addr & GENMASK(7, 0); | |
504 | ||
505 | dev_dbg(bus->dev, | |
17ed5bef | 506 | "SDW Slave class_id %x, part_id %x, mfg_id %x, unique_id %x, version %x\n", |
7c3cd189 VK |
507 | id->class_id, id->part_id, id->mfg_id, |
508 | id->unique_id, id->sdw_version); | |
7c3cd189 | 509 | } |
d52d7a1b SK |
510 | |
511 | static int sdw_program_device_num(struct sdw_bus *bus) | |
512 | { | |
513 | u8 buf[SDW_NUM_DEV_ID_REGISTERS] = {0}; | |
514 | struct sdw_slave *slave, *_s; | |
515 | struct sdw_slave_id id; | |
516 | struct sdw_msg msg; | |
517 | bool found = false; | |
518 | int count = 0, ret; | |
519 | u64 addr; | |
520 | ||
521 | /* No Slave, so use raw xfer api */ | |
522 | ret = sdw_fill_msg(&msg, NULL, SDW_SCP_DEVID_0, | |
73ede046 | 523 | SDW_NUM_DEV_ID_REGISTERS, 0, SDW_MSG_FLAG_READ, buf); |
d52d7a1b SK |
524 | if (ret < 0) |
525 | return ret; | |
526 | ||
527 | do { | |
528 | ret = sdw_transfer(bus, &msg); | |
529 | if (ret == -ENODATA) { /* end of device id reads */ | |
530 | ret = 0; | |
531 | break; | |
532 | } | |
533 | if (ret < 0) { | |
534 | dev_err(bus->dev, "DEVID read fail:%d\n", ret); | |
535 | break; | |
536 | } | |
537 | ||
538 | /* | |
539 | * Construct the addr and extract. Cast the higher shift | |
540 | * bits to avoid truncation due to size limit. | |
541 | */ | |
542 | addr = buf[5] | (buf[4] << 8) | (buf[3] << 16) | | |
0132af05 CIK |
543 | ((u64)buf[2] << 24) | ((u64)buf[1] << 32) | |
544 | ((u64)buf[0] << 40); | |
d52d7a1b SK |
545 | |
546 | sdw_extract_slave_id(bus, addr, &id); | |
547 | ||
548 | /* Now compare with entries */ | |
549 | list_for_each_entry_safe(slave, _s, &bus->slaves, node) { | |
550 | if (sdw_compare_devid(slave, id) == 0) { | |
551 | found = true; | |
552 | ||
553 | /* | |
554 | * Assign a new dev_num to this Slave and | |
555 | * not mark it present. It will be marked | |
556 | * present after it reports ATTACHED on new | |
557 | * dev_num | |
558 | */ | |
559 | ret = sdw_assign_device_num(slave); | |
560 | if (ret) { | |
561 | dev_err(slave->bus->dev, | |
17ed5bef | 562 | "Assign dev_num failed:%d\n", |
d52d7a1b SK |
563 | ret); |
564 | return ret; | |
565 | } | |
566 | ||
567 | break; | |
568 | } | |
569 | } | |
570 | ||
d7b956b6 | 571 | if (!found) { |
d52d7a1b | 572 | /* TODO: Park this device in Group 13 */ |
17ed5bef | 573 | dev_err(bus->dev, "Slave Entry not found\n"); |
d52d7a1b SK |
574 | } |
575 | ||
576 | count++; | |
577 | ||
578 | /* | |
579 | * Check till error out or retry (count) exhausts. | |
580 | * Device can drop off and rejoin during enumeration | |
581 | * so count till twice the bound. | |
582 | */ | |
583 | ||
584 | } while (ret == 0 && count < (SDW_MAX_DEVICES * 2)); | |
585 | ||
586 | return ret; | |
587 | } | |
588 | ||
589 | static void sdw_modify_slave_status(struct sdw_slave *slave, | |
73ede046 | 590 | enum sdw_slave_status status) |
d52d7a1b SK |
591 | { |
592 | mutex_lock(&slave->bus->bus_lock); | |
593 | slave->status = status; | |
594 | mutex_unlock(&slave->bus->bus_lock); | |
595 | } | |
596 | ||
79df15b7 | 597 | int sdw_configure_dpn_intr(struct sdw_slave *slave, |
73ede046 | 598 | int port, bool enable, int mask) |
79df15b7 SK |
599 | { |
600 | u32 addr; | |
601 | int ret; | |
602 | u8 val = 0; | |
603 | ||
604 | addr = SDW_DPN_INTMASK(port); | |
605 | ||
606 | /* Set/Clear port ready interrupt mask */ | |
607 | if (enable) { | |
608 | val |= mask; | |
609 | val |= SDW_DPN_INT_PORT_READY; | |
610 | } else { | |
611 | val &= ~(mask); | |
612 | val &= ~SDW_DPN_INT_PORT_READY; | |
613 | } | |
614 | ||
615 | ret = sdw_update(slave, addr, (mask | SDW_DPN_INT_PORT_READY), val); | |
616 | if (ret < 0) | |
617 | dev_err(slave->bus->dev, | |
17ed5bef | 618 | "SDW_DPN_INTMASK write failed:%d\n", val); |
79df15b7 SK |
619 | |
620 | return ret; | |
621 | } | |
622 | ||
d52d7a1b SK |
623 | static int sdw_initialize_slave(struct sdw_slave *slave) |
624 | { | |
625 | struct sdw_slave_prop *prop = &slave->prop; | |
626 | int ret; | |
627 | u8 val; | |
628 | ||
629 | /* | |
630 | * Set bus clash, parity and SCP implementation | |
631 | * defined interrupt mask | |
632 | * TODO: Read implementation defined interrupt mask | |
633 | * from Slave property | |
634 | */ | |
635 | val = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH | | |
636 | SDW_SCP_INT1_PARITY; | |
637 | ||
638 | /* Enable SCP interrupts */ | |
639 | ret = sdw_update(slave, SDW_SCP_INTMASK1, val, val); | |
640 | if (ret < 0) { | |
641 | dev_err(slave->bus->dev, | |
17ed5bef | 642 | "SDW_SCP_INTMASK1 write failed:%d\n", ret); |
d52d7a1b SK |
643 | return ret; |
644 | } | |
645 | ||
646 | /* No need to continue if DP0 is not present */ | |
647 | if (!slave->prop.dp0_prop) | |
648 | return 0; | |
649 | ||
650 | /* Enable DP0 interrupts */ | |
651 | val = prop->dp0_prop->device_interrupts; | |
652 | val |= SDW_DP0_INT_PORT_READY | SDW_DP0_INT_BRA_FAILURE; | |
653 | ||
654 | ret = sdw_update(slave, SDW_DP0_INTMASK, val, val); | |
655 | if (ret < 0) { | |
656 | dev_err(slave->bus->dev, | |
17ed5bef | 657 | "SDW_DP0_INTMASK read failed:%d\n", ret); |
d52d7a1b SK |
658 | return val; |
659 | } | |
660 | ||
661 | return 0; | |
662 | } | |
b0a9c37b VK |
663 | |
664 | static int sdw_handle_dp0_interrupt(struct sdw_slave *slave, u8 *slave_status) | |
665 | { | |
666 | u8 clear = 0, impl_int_mask; | |
667 | int status, status2, ret, count = 0; | |
668 | ||
669 | status = sdw_read(slave, SDW_DP0_INT); | |
670 | if (status < 0) { | |
671 | dev_err(slave->bus->dev, | |
17ed5bef | 672 | "SDW_DP0_INT read failed:%d\n", status); |
b0a9c37b VK |
673 | return status; |
674 | } | |
675 | ||
676 | do { | |
b0a9c37b | 677 | if (status & SDW_DP0_INT_TEST_FAIL) { |
17ed5bef | 678 | dev_err(&slave->dev, "Test fail for port 0\n"); |
b0a9c37b VK |
679 | clear |= SDW_DP0_INT_TEST_FAIL; |
680 | } | |
681 | ||
682 | /* | |
683 | * Assumption: PORT_READY interrupt will be received only for | |
684 | * ports implementing Channel Prepare state machine (CP_SM) | |
685 | */ | |
686 | ||
687 | if (status & SDW_DP0_INT_PORT_READY) { | |
688 | complete(&slave->port_ready[0]); | |
689 | clear |= SDW_DP0_INT_PORT_READY; | |
690 | } | |
691 | ||
692 | if (status & SDW_DP0_INT_BRA_FAILURE) { | |
17ed5bef | 693 | dev_err(&slave->dev, "BRA failed\n"); |
b0a9c37b VK |
694 | clear |= SDW_DP0_INT_BRA_FAILURE; |
695 | } | |
696 | ||
697 | impl_int_mask = SDW_DP0_INT_IMPDEF1 | | |
698 | SDW_DP0_INT_IMPDEF2 | SDW_DP0_INT_IMPDEF3; | |
699 | ||
700 | if (status & impl_int_mask) { | |
701 | clear |= impl_int_mask; | |
702 | *slave_status = clear; | |
703 | } | |
704 | ||
705 | /* clear the interrupt */ | |
706 | ret = sdw_write(slave, SDW_DP0_INT, clear); | |
707 | if (ret < 0) { | |
708 | dev_err(slave->bus->dev, | |
17ed5bef | 709 | "SDW_DP0_INT write failed:%d\n", ret); |
b0a9c37b VK |
710 | return ret; |
711 | } | |
712 | ||
713 | /* Read DP0 interrupt again */ | |
714 | status2 = sdw_read(slave, SDW_DP0_INT); | |
715 | if (status2 < 0) { | |
716 | dev_err(slave->bus->dev, | |
17ed5bef | 717 | "SDW_DP0_INT read failed:%d\n", status2); |
80cd8f01 | 718 | return status2; |
b0a9c37b VK |
719 | } |
720 | status &= status2; | |
721 | ||
722 | count++; | |
723 | ||
724 | /* we can get alerts while processing so keep retrying */ | |
725 | } while (status != 0 && count < SDW_READ_INTR_CLEAR_RETRY); | |
726 | ||
727 | if (count == SDW_READ_INTR_CLEAR_RETRY) | |
17ed5bef | 728 | dev_warn(slave->bus->dev, "Reached MAX_RETRY on DP0 read\n"); |
b0a9c37b VK |
729 | |
730 | return ret; | |
731 | } | |
732 | ||
733 | static int sdw_handle_port_interrupt(struct sdw_slave *slave, | |
73ede046 | 734 | int port, u8 *slave_status) |
b0a9c37b VK |
735 | { |
736 | u8 clear = 0, impl_int_mask; | |
737 | int status, status2, ret, count = 0; | |
738 | u32 addr; | |
739 | ||
740 | if (port == 0) | |
741 | return sdw_handle_dp0_interrupt(slave, slave_status); | |
742 | ||
743 | addr = SDW_DPN_INT(port); | |
744 | status = sdw_read(slave, addr); | |
745 | if (status < 0) { | |
746 | dev_err(slave->bus->dev, | |
17ed5bef | 747 | "SDW_DPN_INT read failed:%d\n", status); |
b0a9c37b VK |
748 | |
749 | return status; | |
750 | } | |
751 | ||
752 | do { | |
b0a9c37b | 753 | if (status & SDW_DPN_INT_TEST_FAIL) { |
17ed5bef | 754 | dev_err(&slave->dev, "Test fail for port:%d\n", port); |
b0a9c37b VK |
755 | clear |= SDW_DPN_INT_TEST_FAIL; |
756 | } | |
757 | ||
758 | /* | |
759 | * Assumption: PORT_READY interrupt will be received only | |
760 | * for ports implementing CP_SM. | |
761 | */ | |
762 | if (status & SDW_DPN_INT_PORT_READY) { | |
763 | complete(&slave->port_ready[port]); | |
764 | clear |= SDW_DPN_INT_PORT_READY; | |
765 | } | |
766 | ||
767 | impl_int_mask = SDW_DPN_INT_IMPDEF1 | | |
768 | SDW_DPN_INT_IMPDEF2 | SDW_DPN_INT_IMPDEF3; | |
769 | ||
b0a9c37b VK |
770 | if (status & impl_int_mask) { |
771 | clear |= impl_int_mask; | |
772 | *slave_status = clear; | |
773 | } | |
774 | ||
775 | /* clear the interrupt */ | |
776 | ret = sdw_write(slave, addr, clear); | |
777 | if (ret < 0) { | |
778 | dev_err(slave->bus->dev, | |
17ed5bef | 779 | "SDW_DPN_INT write failed:%d\n", ret); |
b0a9c37b VK |
780 | return ret; |
781 | } | |
782 | ||
783 | /* Read DPN interrupt again */ | |
784 | status2 = sdw_read(slave, addr); | |
80cd8f01 | 785 | if (status2 < 0) { |
b0a9c37b | 786 | dev_err(slave->bus->dev, |
17ed5bef | 787 | "SDW_DPN_INT read failed:%d\n", status2); |
80cd8f01 | 788 | return status2; |
b0a9c37b VK |
789 | } |
790 | status &= status2; | |
791 | ||
792 | count++; | |
793 | ||
794 | /* we can get alerts while processing so keep retrying */ | |
795 | } while (status != 0 && count < SDW_READ_INTR_CLEAR_RETRY); | |
796 | ||
797 | if (count == SDW_READ_INTR_CLEAR_RETRY) | |
798 | dev_warn(slave->bus->dev, "Reached MAX_RETRY on port read"); | |
799 | ||
800 | return ret; | |
801 | } | |
802 | ||
803 | static int sdw_handle_slave_alerts(struct sdw_slave *slave) | |
804 | { | |
805 | struct sdw_slave_intr_status slave_intr; | |
806 | u8 clear = 0, bit, port_status[15]; | |
807 | int port_num, stat, ret, count = 0; | |
808 | unsigned long port; | |
809 | bool slave_notify = false; | |
810 | u8 buf, buf2[2], _buf, _buf2[2]; | |
811 | ||
812 | sdw_modify_slave_status(slave, SDW_SLAVE_ALERT); | |
813 | ||
814 | /* Read Instat 1, Instat 2 and Instat 3 registers */ | |
72b16d4a | 815 | ret = sdw_read(slave, SDW_SCP_INT1); |
b0a9c37b VK |
816 | if (ret < 0) { |
817 | dev_err(slave->bus->dev, | |
17ed5bef | 818 | "SDW_SCP_INT1 read failed:%d\n", ret); |
b0a9c37b VK |
819 | return ret; |
820 | } | |
72b16d4a | 821 | buf = ret; |
b0a9c37b VK |
822 | |
823 | ret = sdw_nread(slave, SDW_SCP_INTSTAT2, 2, buf2); | |
824 | if (ret < 0) { | |
825 | dev_err(slave->bus->dev, | |
17ed5bef | 826 | "SDW_SCP_INT2/3 read failed:%d\n", ret); |
b0a9c37b VK |
827 | return ret; |
828 | } | |
829 | ||
830 | do { | |
831 | /* | |
832 | * Check parity, bus clash and Slave (impl defined) | |
833 | * interrupt | |
834 | */ | |
835 | if (buf & SDW_SCP_INT1_PARITY) { | |
17ed5bef | 836 | dev_err(&slave->dev, "Parity error detected\n"); |
b0a9c37b VK |
837 | clear |= SDW_SCP_INT1_PARITY; |
838 | } | |
839 | ||
840 | if (buf & SDW_SCP_INT1_BUS_CLASH) { | |
17ed5bef | 841 | dev_err(&slave->dev, "Bus clash error detected\n"); |
b0a9c37b VK |
842 | clear |= SDW_SCP_INT1_BUS_CLASH; |
843 | } | |
844 | ||
845 | /* | |
846 | * When bus clash or parity errors are detected, such errors | |
847 | * are unlikely to be recoverable errors. | |
848 | * TODO: In such scenario, reset bus. Make this configurable | |
849 | * via sysfs property with bus reset being the default. | |
850 | */ | |
851 | ||
852 | if (buf & SDW_SCP_INT1_IMPL_DEF) { | |
853 | dev_dbg(&slave->dev, "Slave impl defined interrupt\n"); | |
854 | clear |= SDW_SCP_INT1_IMPL_DEF; | |
855 | slave_notify = true; | |
856 | } | |
857 | ||
858 | /* Check port 0 - 3 interrupts */ | |
859 | port = buf & SDW_SCP_INT1_PORT0_3; | |
860 | ||
861 | /* To get port number corresponding to bits, shift it */ | |
862 | port = port >> SDW_REG_SHIFT(SDW_SCP_INT1_PORT0_3); | |
863 | for_each_set_bit(bit, &port, 8) { | |
864 | sdw_handle_port_interrupt(slave, bit, | |
73ede046 | 865 | &port_status[bit]); |
b0a9c37b VK |
866 | } |
867 | ||
868 | /* Check if cascade 2 interrupt is present */ | |
869 | if (buf & SDW_SCP_INT1_SCP2_CASCADE) { | |
870 | port = buf2[0] & SDW_SCP_INTSTAT2_PORT4_10; | |
871 | for_each_set_bit(bit, &port, 8) { | |
872 | /* scp2 ports start from 4 */ | |
873 | port_num = bit + 3; | |
874 | sdw_handle_port_interrupt(slave, | |
875 | port_num, | |
876 | &port_status[port_num]); | |
877 | } | |
878 | } | |
879 | ||
880 | /* now check last cascade */ | |
881 | if (buf2[0] & SDW_SCP_INTSTAT2_SCP3_CASCADE) { | |
882 | port = buf2[1] & SDW_SCP_INTSTAT3_PORT11_14; | |
883 | for_each_set_bit(bit, &port, 8) { | |
884 | /* scp3 ports start from 11 */ | |
885 | port_num = bit + 10; | |
886 | sdw_handle_port_interrupt(slave, | |
887 | port_num, | |
888 | &port_status[port_num]); | |
889 | } | |
890 | } | |
891 | ||
892 | /* Update the Slave driver */ | |
09830d5e PLB |
893 | if (slave_notify && slave->ops && |
894 | slave->ops->interrupt_callback) { | |
b0a9c37b VK |
895 | slave_intr.control_port = clear; |
896 | memcpy(slave_intr.port, &port_status, | |
73ede046 | 897 | sizeof(slave_intr.port)); |
b0a9c37b VK |
898 | |
899 | slave->ops->interrupt_callback(slave, &slave_intr); | |
900 | } | |
901 | ||
902 | /* Ack interrupt */ | |
903 | ret = sdw_write(slave, SDW_SCP_INT1, clear); | |
904 | if (ret < 0) { | |
905 | dev_err(slave->bus->dev, | |
17ed5bef | 906 | "SDW_SCP_INT1 write failed:%d\n", ret); |
b0a9c37b VK |
907 | return ret; |
908 | } | |
909 | ||
910 | /* | |
911 | * Read status again to ensure no new interrupts arrived | |
912 | * while servicing interrupts. | |
913 | */ | |
72b16d4a | 914 | ret = sdw_read(slave, SDW_SCP_INT1); |
b0a9c37b VK |
915 | if (ret < 0) { |
916 | dev_err(slave->bus->dev, | |
17ed5bef | 917 | "SDW_SCP_INT1 read failed:%d\n", ret); |
b0a9c37b VK |
918 | return ret; |
919 | } | |
72b16d4a | 920 | _buf = ret; |
b0a9c37b VK |
921 | |
922 | ret = sdw_nread(slave, SDW_SCP_INTSTAT2, 2, _buf2); | |
923 | if (ret < 0) { | |
924 | dev_err(slave->bus->dev, | |
17ed5bef | 925 | "SDW_SCP_INT2/3 read failed:%d\n", ret); |
b0a9c37b VK |
926 | return ret; |
927 | } | |
928 | ||
929 | /* Make sure no interrupts are pending */ | |
930 | buf &= _buf; | |
931 | buf2[0] &= _buf2[0]; | |
932 | buf2[1] &= _buf2[1]; | |
933 | stat = buf || buf2[0] || buf2[1]; | |
934 | ||
935 | /* | |
936 | * Exit loop if Slave is continuously in ALERT state even | |
937 | * after servicing the interrupt multiple times. | |
938 | */ | |
939 | count++; | |
940 | ||
941 | /* we can get alerts while processing so keep retrying */ | |
942 | } while (stat != 0 && count < SDW_READ_INTR_CLEAR_RETRY); | |
943 | ||
944 | if (count == SDW_READ_INTR_CLEAR_RETRY) | |
17ed5bef | 945 | dev_warn(slave->bus->dev, "Reached MAX_RETRY on alert read\n"); |
b0a9c37b VK |
946 | |
947 | return ret; | |
948 | } | |
949 | ||
950 | static int sdw_update_slave_status(struct sdw_slave *slave, | |
73ede046 | 951 | enum sdw_slave_status status) |
b0a9c37b | 952 | { |
09830d5e | 953 | if (slave->ops && slave->ops->update_status) |
b0a9c37b VK |
954 | return slave->ops->update_status(slave, status); |
955 | ||
956 | return 0; | |
957 | } | |
958 | ||
959 | /** | |
960 | * sdw_handle_slave_status() - Handle Slave status | |
961 | * @bus: SDW bus instance | |
962 | * @status: Status for all Slave(s) | |
963 | */ | |
964 | int sdw_handle_slave_status(struct sdw_bus *bus, | |
73ede046 | 965 | enum sdw_slave_status status[]) |
b0a9c37b VK |
966 | { |
967 | enum sdw_slave_status prev_status; | |
968 | struct sdw_slave *slave; | |
969 | int i, ret = 0; | |
970 | ||
971 | if (status[0] == SDW_SLAVE_ATTACHED) { | |
972 | ret = sdw_program_device_num(bus); | |
973 | if (ret) | |
17ed5bef | 974 | dev_err(bus->dev, "Slave attach failed: %d\n", ret); |
b0a9c37b VK |
975 | } |
976 | ||
977 | /* Continue to check other slave statuses */ | |
978 | for (i = 1; i <= SDW_MAX_DEVICES; i++) { | |
979 | mutex_lock(&bus->bus_lock); | |
980 | if (test_bit(i, bus->assigned) == false) { | |
981 | mutex_unlock(&bus->bus_lock); | |
982 | continue; | |
983 | } | |
984 | mutex_unlock(&bus->bus_lock); | |
985 | ||
986 | slave = sdw_get_slave(bus, i); | |
987 | if (!slave) | |
988 | continue; | |
989 | ||
990 | switch (status[i]) { | |
991 | case SDW_SLAVE_UNATTACHED: | |
992 | if (slave->status == SDW_SLAVE_UNATTACHED) | |
993 | break; | |
994 | ||
995 | sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED); | |
996 | break; | |
997 | ||
998 | case SDW_SLAVE_ALERT: | |
999 | ret = sdw_handle_slave_alerts(slave); | |
1000 | if (ret) | |
1001 | dev_err(bus->dev, | |
17ed5bef | 1002 | "Slave %d alert handling failed: %d\n", |
b0a9c37b VK |
1003 | i, ret); |
1004 | break; | |
1005 | ||
1006 | case SDW_SLAVE_ATTACHED: | |
1007 | if (slave->status == SDW_SLAVE_ATTACHED) | |
1008 | break; | |
1009 | ||
1010 | prev_status = slave->status; | |
1011 | sdw_modify_slave_status(slave, SDW_SLAVE_ATTACHED); | |
1012 | ||
1013 | if (prev_status == SDW_SLAVE_ALERT) | |
1014 | break; | |
1015 | ||
1016 | ret = sdw_initialize_slave(slave); | |
1017 | if (ret) | |
1018 | dev_err(bus->dev, | |
17ed5bef | 1019 | "Slave %d initialization failed: %d\n", |
b0a9c37b VK |
1020 | i, ret); |
1021 | ||
1022 | break; | |
1023 | ||
1024 | default: | |
17ed5bef | 1025 | dev_err(bus->dev, "Invalid slave %d status:%d\n", |
73ede046 | 1026 | i, status[i]); |
b0a9c37b VK |
1027 | break; |
1028 | } | |
1029 | ||
1030 | ret = sdw_update_slave_status(slave, status[i]); | |
1031 | if (ret) | |
1032 | dev_err(slave->bus->dev, | |
17ed5bef | 1033 | "Update Slave status failed:%d\n", ret); |
b0a9c37b VK |
1034 | } |
1035 | ||
1036 | return ret; | |
1037 | } | |
1038 | EXPORT_SYMBOL(sdw_handle_slave_status); |