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[mirror_ubuntu-hirsute-kernel.git] / drivers / soundwire / bus.c
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1// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2// Copyright(c) 2015-17 Intel Corporation.
3
4#include <linux/acpi.h>
0231453b 5#include <linux/delay.h>
7c3cd189 6#include <linux/mod_devicetable.h>
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7#include <linux/pm_runtime.h>
8#include <linux/soundwire/sdw_registers.h>
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9#include <linux/soundwire/sdw.h>
10#include "bus.h"
bcac5902 11#include "sysfs_local.h"
7c3cd189 12
dbb50c7a
BL
13static DEFINE_IDA(sdw_ida);
14
15static int sdw_get_id(struct sdw_bus *bus)
16{
17 int rc = ida_alloc(&sdw_ida, GFP_KERNEL);
18
19 if (rc < 0)
20 return rc;
21
22 bus->id = rc;
23 return 0;
24}
25
7c3cd189 26/**
5cab3ff2 27 * sdw_bus_master_add() - add a bus Master instance
7c3cd189 28 * @bus: bus instance
5cab3ff2
PLB
29 * @parent: parent device
30 * @fwnode: firmware node handle
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31 *
32 * Initializes the bus instance, read properties and create child
33 * devices.
34 */
5cab3ff2
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35int sdw_bus_master_add(struct sdw_bus *bus, struct device *parent,
36 struct fwnode_handle *fwnode)
7c3cd189 37{
5c3eb9f7 38 struct sdw_master_prop *prop = NULL;
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39 int ret;
40
7ceaa40b
PLB
41 if (!parent) {
42 pr_err("SoundWire parent device is not set\n");
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43 return -ENODEV;
44 }
45
dbb50c7a
BL
46 ret = sdw_get_id(bus);
47 if (ret) {
7ceaa40b
PLB
48 dev_err(parent, "Failed to get bus id\n");
49 return ret;
50 }
51
52 ret = sdw_master_device_add(bus, parent, fwnode);
53 if (ret) {
54 dev_err(parent, "Failed to add master device at link %d\n",
55 bus->link_id);
dbb50c7a
BL
56 return ret;
57 }
58
9d715fa0 59 if (!bus->ops) {
17ed5bef 60 dev_err(bus->dev, "SoundWire Bus ops are not set\n");
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61 return -EINVAL;
62 }
63
9026118f
BL
64 if (!bus->compute_params) {
65 dev_err(bus->dev,
66 "Bandwidth allocation not configured, compute_params no set\n");
67 return -EINVAL;
68 }
69
9d715fa0 70 mutex_init(&bus->msg_lock);
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71 mutex_init(&bus->bus_lock);
72 INIT_LIST_HEAD(&bus->slaves);
89e59053 73 INIT_LIST_HEAD(&bus->m_rt_list);
7c3cd189 74
ce6e74d0
SN
75 /*
76 * Initialize multi_link flag
77 * TODO: populate this flag by reading property from FW node
78 */
79 bus->multi_link = false;
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80 if (bus->ops->read_prop) {
81 ret = bus->ops->read_prop(bus);
82 if (ret < 0) {
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83 dev_err(bus->dev,
84 "Bus read properties failed:%d\n", ret);
56d4fe31
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85 return ret;
86 }
87 }
88
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89 sdw_bus_debugfs_init(bus);
90
7c3cd189 91 /*
21c2de29 92 * Device numbers in SoundWire are 0 through 15. Enumeration device
7c3cd189
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93 * number (0), Broadcast device number (15), Group numbers (12 and
94 * 13) and Master device number (14) are not used for assignment so
95 * mask these and other higher bits.
96 */
97
98 /* Set higher order bits */
99 *bus->assigned = ~GENMASK(SDW_BROADCAST_DEV_NUM, SDW_ENUM_DEV_NUM);
100
101 /* Set enumuration device number and broadcast device number */
102 set_bit(SDW_ENUM_DEV_NUM, bus->assigned);
103 set_bit(SDW_BROADCAST_DEV_NUM, bus->assigned);
104
105 /* Set group device numbers and master device number */
106 set_bit(SDW_GROUP12_DEV_NUM, bus->assigned);
107 set_bit(SDW_GROUP13_DEV_NUM, bus->assigned);
108 set_bit(SDW_MASTER_DEV_NUM, bus->assigned);
109
110 /*
111 * SDW is an enumerable bus, but devices can be powered off. So,
112 * they won't be able to report as present.
113 *
114 * Create Slave devices based on Slaves described in
115 * the respective firmware (ACPI/DT)
116 */
117 if (IS_ENABLED(CONFIG_ACPI) && ACPI_HANDLE(bus->dev))
118 ret = sdw_acpi_find_slaves(bus);
a2e48458
SK
119 else if (IS_ENABLED(CONFIG_OF) && bus->dev->of_node)
120 ret = sdw_of_find_slaves(bus);
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121 else
122 ret = -ENOTSUPP; /* No ACPI/DT so error out */
123
124 if (ret) {
125 dev_err(bus->dev, "Finding slaves failed:%d\n", ret);
126 return ret;
127 }
128
99b8a5d6 129 /*
5c3eb9f7 130 * Initialize clock values based on Master properties. The max
3424305b 131 * frequency is read from max_clk_freq property. Current assumption
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132 * is that the bus will start at highest clock frequency when
133 * powered on.
134 *
99b8a5d6
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135 * Default active bank will be 0 as out of reset the Slaves have
136 * to start with bank 0 (Table 40 of Spec)
137 */
5c3eb9f7 138 prop = &bus->prop;
3424305b 139 bus->params.max_dr_freq = prop->max_clk_freq * SDW_DOUBLE_RATE_FACTOR;
5c3eb9f7 140 bus->params.curr_dr_freq = bus->params.max_dr_freq;
99b8a5d6
SK
141 bus->params.curr_bank = SDW_BANK0;
142 bus->params.next_bank = SDW_BANK1;
143
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144 return 0;
145}
5cab3ff2 146EXPORT_SYMBOL(sdw_bus_master_add);
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147
148static int sdw_delete_slave(struct device *dev, void *data)
149{
150 struct sdw_slave *slave = dev_to_sdw_dev(dev);
151 struct sdw_bus *bus = slave->bus;
152
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153 pm_runtime_disable(dev);
154
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155 sdw_slave_debugfs_exit(slave);
156
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157 mutex_lock(&bus->bus_lock);
158
159 if (slave->dev_num) /* clear dev_num if assigned */
160 clear_bit(slave->dev_num, bus->assigned);
161
162 list_del_init(&slave->node);
163 mutex_unlock(&bus->bus_lock);
164
165 device_unregister(dev);
166 return 0;
167}
168
169/**
5cab3ff2 170 * sdw_bus_master_delete() - delete the bus master instance
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171 * @bus: bus to be deleted
172 *
173 * Remove the instance, delete the child devices.
174 */
5cab3ff2 175void sdw_bus_master_delete(struct sdw_bus *bus)
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176{
177 device_for_each_child(bus->dev, NULL, sdw_delete_slave);
7ceaa40b 178 sdw_master_device_del(bus);
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179
180 sdw_bus_debugfs_exit(bus);
dbb50c7a 181 ida_free(&sdw_ida, bus->id);
7c3cd189 182}
5cab3ff2 183EXPORT_SYMBOL(sdw_bus_master_delete);
7c3cd189 184
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185/*
186 * SDW IO Calls
187 */
188
189static inline int find_response_code(enum sdw_command_response resp)
190{
191 switch (resp) {
192 case SDW_CMD_OK:
193 return 0;
194
195 case SDW_CMD_IGNORED:
196 return -ENODATA;
197
198 case SDW_CMD_TIMEOUT:
199 return -ETIMEDOUT;
200
201 default:
202 return -EIO;
203 }
204}
205
206static inline int do_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
207{
208 int retry = bus->prop.err_threshold;
209 enum sdw_command_response resp;
210 int ret = 0, i;
211
212 for (i = 0; i <= retry; i++) {
213 resp = bus->ops->xfer_msg(bus, msg);
214 ret = find_response_code(resp);
215
216 /* if cmd is ok or ignored return */
217 if (ret == 0 || ret == -ENODATA)
218 return ret;
219 }
220
221 return ret;
222}
223
224static inline int do_transfer_defer(struct sdw_bus *bus,
73ede046
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225 struct sdw_msg *msg,
226 struct sdw_defer *defer)
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227{
228 int retry = bus->prop.err_threshold;
229 enum sdw_command_response resp;
230 int ret = 0, i;
231
232 defer->msg = msg;
233 defer->length = msg->len;
a306a0e4 234 init_completion(&defer->complete);
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235
236 for (i = 0; i <= retry; i++) {
237 resp = bus->ops->xfer_msg_defer(bus, msg, defer);
238 ret = find_response_code(resp);
239 /* if cmd is ok or ignored return */
240 if (ret == 0 || ret == -ENODATA)
241 return ret;
242 }
243
244 return ret;
245}
246
247static int sdw_reset_page(struct sdw_bus *bus, u16 dev_num)
248{
249 int retry = bus->prop.err_threshold;
250 enum sdw_command_response resp;
251 int ret = 0, i;
252
253 for (i = 0; i <= retry; i++) {
254 resp = bus->ops->reset_page_addr(bus, dev_num);
255 ret = find_response_code(resp);
256 /* if cmd is ok or ignored return */
257 if (ret == 0 || ret == -ENODATA)
258 return ret;
259 }
260
261 return ret;
262}
263
a350aff4
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264static int sdw_transfer_unlocked(struct sdw_bus *bus, struct sdw_msg *msg)
265{
266 int ret;
267
268 ret = do_transfer(bus, msg);
269 if (ret != 0 && ret != -ENODATA)
270 dev_err(bus->dev, "trf on Slave %d failed:%d\n",
271 msg->dev_num, ret);
272
273 if (msg->page)
274 sdw_reset_page(bus, msg->dev_num);
275
276 return ret;
277}
278
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279/**
280 * sdw_transfer() - Synchronous transfer message to a SDW Slave device
281 * @bus: SDW bus
282 * @msg: SDW message to be xfered
283 */
284int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
285{
286 int ret;
287
288 mutex_lock(&bus->msg_lock);
289
a350aff4 290 ret = sdw_transfer_unlocked(bus, msg);
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291
292 mutex_unlock(&bus->msg_lock);
293
294 return ret;
295}
296
297/**
298 * sdw_transfer_defer() - Asynchronously transfer message to a SDW Slave device
299 * @bus: SDW bus
300 * @msg: SDW message to be xfered
301 * @defer: Defer block for signal completion
302 *
303 * Caller needs to hold the msg_lock lock while calling this
304 */
305int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg,
73ede046 306 struct sdw_defer *defer)
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307{
308 int ret;
309
310 if (!bus->ops->xfer_msg_defer)
311 return -ENOTSUPP;
312
313 ret = do_transfer_defer(bus, msg, defer);
314 if (ret != 0 && ret != -ENODATA)
315 dev_err(bus->dev, "Defer trf on Slave %d failed:%d\n",
73ede046 316 msg->dev_num, ret);
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317
318 if (msg->page)
319 sdw_reset_page(bus, msg->dev_num);
320
321 return ret;
322}
323
9d715fa0 324int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave,
73ede046 325 u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf)
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326{
327 memset(msg, 0, sizeof(*msg));
328 msg->addr = addr; /* addr is 16 bit and truncated here */
329 msg->len = count;
330 msg->dev_num = dev_num;
331 msg->flags = flags;
332 msg->buf = buf;
9d715fa0 333
f779ad09 334 if (addr < SDW_REG_NO_PAGE) /* no paging area */
9d715fa0 335 return 0;
f779ad09
GL
336
337 if (addr >= SDW_REG_MAX) { /* illegal addr */
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338 pr_err("SDW: Invalid address %x passed\n", addr);
339 return -EINVAL;
340 }
341
342 if (addr < SDW_REG_OPTIONAL_PAGE) { /* 32k but no page */
343 if (slave && !slave->prop.paging_support)
344 return 0;
21c2de29 345 /* no need for else as that will fall-through to paging */
9d715fa0
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346 }
347
348 /* paging mandatory */
349 if (dev_num == SDW_ENUM_DEV_NUM || dev_num == SDW_BROADCAST_DEV_NUM) {
350 pr_err("SDW: Invalid device for paging :%d\n", dev_num);
351 return -EINVAL;
352 }
353
354 if (!slave) {
355 pr_err("SDW: No slave for paging addr\n");
356 return -EINVAL;
f779ad09
GL
357 }
358
359 if (!slave->prop.paging_support) {
9d715fa0 360 dev_err(&slave->dev,
17ed5bef 361 "address %x needs paging but no support\n", addr);
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362 return -EINVAL;
363 }
364
d5826a4b
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365 msg->addr_page1 = FIELD_GET(SDW_SCP_ADDRPAGE1_MASK, addr);
366 msg->addr_page2 = FIELD_GET(SDW_SCP_ADDRPAGE2_MASK, addr);
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367 msg->addr |= BIT(15);
368 msg->page = true;
369
370 return 0;
371}
372
60ee9be2
PLB
373/*
374 * Read/Write IO functions.
375 * no_pm versions can only be called by the bus, e.g. while enumerating or
376 * handling suspend-resume sequences.
377 * all clients need to use the pm versions
378 */
379
380static int
381sdw_nread_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
382{
383 struct sdw_msg msg;
384 int ret;
385
386 ret = sdw_fill_msg(&msg, slave, addr, count,
387 slave->dev_num, SDW_MSG_FLAG_READ, val);
388 if (ret < 0)
389 return ret;
390
391 return sdw_transfer(slave->bus, &msg);
392}
393
394static int
395sdw_nwrite_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
396{
397 struct sdw_msg msg;
398 int ret;
399
400 ret = sdw_fill_msg(&msg, slave, addr, count,
401 slave->dev_num, SDW_MSG_FLAG_WRITE, val);
402 if (ret < 0)
403 return ret;
404
405 return sdw_transfer(slave->bus, &msg);
406}
407
408static int sdw_write_no_pm(struct sdw_slave *slave, u32 addr, u8 value)
409{
410 return sdw_nwrite_no_pm(slave, addr, 1, &value);
411}
412
0231453b
RW
413static int
414sdw_bread_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr)
415{
416 struct sdw_msg msg;
417 u8 buf;
418 int ret;
419
420 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
421 SDW_MSG_FLAG_READ, &buf);
422 if (ret)
423 return ret;
424
425 ret = sdw_transfer(bus, &msg);
426 if (ret < 0)
427 return ret;
f779ad09
GL
428
429 return buf;
0231453b
RW
430}
431
432static int
433sdw_bwrite_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value)
434{
435 struct sdw_msg msg;
436 int ret;
437
438 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
439 SDW_MSG_FLAG_WRITE, &value);
440 if (ret)
441 return ret;
442
443 return sdw_transfer(bus, &msg);
444}
445
a350aff4
PLB
446int sdw_bread_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr)
447{
448 struct sdw_msg msg;
449 u8 buf;
450 int ret;
451
452 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
453 SDW_MSG_FLAG_READ, &buf);
454 if (ret)
455 return ret;
456
457 ret = sdw_transfer_unlocked(bus, &msg);
458 if (ret < 0)
459 return ret;
460
461 return buf;
462}
463EXPORT_SYMBOL(sdw_bread_no_pm_unlocked);
464
465int sdw_bwrite_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value)
466{
467 struct sdw_msg msg;
468 int ret;
469
470 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
471 SDW_MSG_FLAG_WRITE, &value);
472 if (ret)
473 return ret;
474
475 return sdw_transfer_unlocked(bus, &msg);
476}
477EXPORT_SYMBOL(sdw_bwrite_no_pm_unlocked);
478
0231453b
RW
479static int
480sdw_read_no_pm(struct sdw_slave *slave, u32 addr)
481{
482 u8 buf;
483 int ret;
484
485 ret = sdw_nread_no_pm(slave, addr, 1, &buf);
486 if (ret < 0)
487 return ret;
488 else
489 return buf;
490}
491
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492/**
493 * sdw_nread() - Read "n" contiguous SDW Slave registers
494 * @slave: SDW Slave
495 * @addr: Register address
496 * @count: length
497 * @val: Buffer for values to be read
498 */
499int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
500{
9d715fa0
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501 int ret;
502
9d715fa0 503 ret = pm_runtime_get_sync(slave->bus->dev);
60ee9be2
PLB
504 if (ret < 0 && ret != -EACCES) {
505 pm_runtime_put_noidle(slave->bus->dev);
9d715fa0 506 return ret;
60ee9be2
PLB
507 }
508
509 ret = sdw_nread_no_pm(slave, addr, count, val);
9d715fa0 510
60ee9be2 511 pm_runtime_mark_last_busy(slave->bus->dev);
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VK
512 pm_runtime_put(slave->bus->dev);
513
514 return ret;
515}
516EXPORT_SYMBOL(sdw_nread);
517
518/**
519 * sdw_nwrite() - Write "n" contiguous SDW Slave registers
520 * @slave: SDW Slave
521 * @addr: Register address
522 * @count: length
523 * @val: Buffer for values to be read
524 */
525int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
526{
9d715fa0
VK
527 int ret;
528
9d715fa0 529 ret = pm_runtime_get_sync(slave->bus->dev);
60ee9be2
PLB
530 if (ret < 0 && ret != -EACCES) {
531 pm_runtime_put_noidle(slave->bus->dev);
9d715fa0 532 return ret;
60ee9be2
PLB
533 }
534
535 ret = sdw_nwrite_no_pm(slave, addr, count, val);
9d715fa0 536
60ee9be2 537 pm_runtime_mark_last_busy(slave->bus->dev);
9d715fa0
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538 pm_runtime_put(slave->bus->dev);
539
540 return ret;
541}
542EXPORT_SYMBOL(sdw_nwrite);
543
544/**
545 * sdw_read() - Read a SDW Slave register
546 * @slave: SDW Slave
547 * @addr: Register address
548 */
549int sdw_read(struct sdw_slave *slave, u32 addr)
550{
551 u8 buf;
552 int ret;
553
554 ret = sdw_nread(slave, addr, 1, &buf);
555 if (ret < 0)
556 return ret;
f779ad09
GL
557
558 return buf;
9d715fa0
VK
559}
560EXPORT_SYMBOL(sdw_read);
561
562/**
563 * sdw_write() - Write a SDW Slave register
564 * @slave: SDW Slave
565 * @addr: Register address
566 * @value: Register value
567 */
568int sdw_write(struct sdw_slave *slave, u32 addr, u8 value)
569{
570 return sdw_nwrite(slave, addr, 1, &value);
9d715fa0
VK
571}
572EXPORT_SYMBOL(sdw_write);
573
d52d7a1b
SK
574/*
575 * SDW alert handling
576 */
577
578/* called with bus_lock held */
579static struct sdw_slave *sdw_get_slave(struct sdw_bus *bus, int i)
580{
581 struct sdw_slave *slave = NULL;
582
583 list_for_each_entry(slave, &bus->slaves, node) {
584 if (slave->dev_num == i)
585 return slave;
586 }
587
588 return NULL;
589}
590
591static int sdw_compare_devid(struct sdw_slave *slave, struct sdw_slave_id id)
592{
2e8c4ad1 593 if (slave->id.mfg_id != id.mfg_id ||
09830d5e 594 slave->id.part_id != id.part_id ||
2e8c4ad1
PLB
595 slave->id.class_id != id.class_id ||
596 (slave->id.unique_id != SDW_IGNORED_UNIQUE_ID &&
597 slave->id.unique_id != id.unique_id))
d52d7a1b
SK
598 return -ENODEV;
599
600 return 0;
601}
602
603/* called with bus_lock held */
604static int sdw_get_device_num(struct sdw_slave *slave)
605{
606 int bit;
607
608 bit = find_first_zero_bit(slave->bus->assigned, SDW_MAX_DEVICES);
609 if (bit == SDW_MAX_DEVICES) {
610 bit = -ENODEV;
611 goto err;
612 }
613
614 /*
615 * Do not update dev_num in Slave data structure here,
616 * Update once program dev_num is successful
617 */
618 set_bit(bit, slave->bus->assigned);
619
620err:
621 return bit;
622}
623
624static int sdw_assign_device_num(struct sdw_slave *slave)
625{
626 int ret, dev_num;
fd6a3ac8 627 bool new_device = false;
d52d7a1b
SK
628
629 /* check first if device number is assigned, if so reuse that */
630 if (!slave->dev_num) {
fd6a3ac8
PLB
631 if (!slave->dev_num_sticky) {
632 mutex_lock(&slave->bus->bus_lock);
633 dev_num = sdw_get_device_num(slave);
634 mutex_unlock(&slave->bus->bus_lock);
635 if (dev_num < 0) {
636 dev_err(slave->bus->dev, "Get dev_num failed: %d\n",
637 dev_num);
638 return dev_num;
639 }
640 slave->dev_num = dev_num;
641 slave->dev_num_sticky = dev_num;
642 new_device = true;
643 } else {
644 slave->dev_num = slave->dev_num_sticky;
d52d7a1b 645 }
fd6a3ac8
PLB
646 }
647
648 if (!new_device)
f48f4fd9
PLB
649 dev_dbg(slave->bus->dev,
650 "Slave already registered, reusing dev_num:%d\n",
651 slave->dev_num);
d52d7a1b 652
fd6a3ac8
PLB
653 /* Clear the slave->dev_num to transfer message on device 0 */
654 dev_num = slave->dev_num;
655 slave->dev_num = 0;
d52d7a1b 656
d300de4f 657 ret = sdw_write_no_pm(slave, SDW_SCP_DEVNUMBER, dev_num);
d52d7a1b 658 if (ret < 0) {
6e0ac6a6
PLB
659 dev_err(&slave->dev, "Program device_num %d failed: %d\n",
660 dev_num, ret);
d52d7a1b
SK
661 return ret;
662 }
663
664 /* After xfer of msg, restore dev_num */
fd6a3ac8 665 slave->dev_num = slave->dev_num_sticky;
d52d7a1b
SK
666
667 return 0;
668}
669
7c3cd189 670void sdw_extract_slave_id(struct sdw_bus *bus,
73ede046 671 u64 addr, struct sdw_slave_id *id)
7c3cd189 672{
17ed5bef 673 dev_dbg(bus->dev, "SDW Slave Addr: %llx\n", addr);
7c3cd189 674
2c6cff68
PLB
675 id->sdw_version = SDW_VERSION(addr);
676 id->unique_id = SDW_UNIQUE_ID(addr);
677 id->mfg_id = SDW_MFG_ID(addr);
678 id->part_id = SDW_PART_ID(addr);
679 id->class_id = SDW_CLASS_ID(addr);
7c3cd189
VK
680
681 dev_dbg(bus->dev,
17ed5bef 682 "SDW Slave class_id %x, part_id %x, mfg_id %x, unique_id %x, version %x\n",
7c3cd189
VK
683 id->class_id, id->part_id, id->mfg_id,
684 id->unique_id, id->sdw_version);
7c3cd189 685}
d52d7a1b
SK
686
687static int sdw_program_device_num(struct sdw_bus *bus)
688{
689 u8 buf[SDW_NUM_DEV_ID_REGISTERS] = {0};
690 struct sdw_slave *slave, *_s;
691 struct sdw_slave_id id;
692 struct sdw_msg msg;
693 bool found = false;
694 int count = 0, ret;
695 u64 addr;
696
697 /* No Slave, so use raw xfer api */
698 ret = sdw_fill_msg(&msg, NULL, SDW_SCP_DEVID_0,
73ede046 699 SDW_NUM_DEV_ID_REGISTERS, 0, SDW_MSG_FLAG_READ, buf);
d52d7a1b
SK
700 if (ret < 0)
701 return ret;
702
703 do {
704 ret = sdw_transfer(bus, &msg);
705 if (ret == -ENODATA) { /* end of device id reads */
6e0ac6a6 706 dev_dbg(bus->dev, "No more devices to enumerate\n");
d52d7a1b
SK
707 ret = 0;
708 break;
709 }
710 if (ret < 0) {
711 dev_err(bus->dev, "DEVID read fail:%d\n", ret);
712 break;
713 }
714
715 /*
716 * Construct the addr and extract. Cast the higher shift
717 * bits to avoid truncation due to size limit.
718 */
719 addr = buf[5] | (buf[4] << 8) | (buf[3] << 16) |
0132af05
CIK
720 ((u64)buf[2] << 24) | ((u64)buf[1] << 32) |
721 ((u64)buf[0] << 40);
d52d7a1b
SK
722
723 sdw_extract_slave_id(bus, addr, &id);
724
725 /* Now compare with entries */
726 list_for_each_entry_safe(slave, _s, &bus->slaves, node) {
727 if (sdw_compare_devid(slave, id) == 0) {
728 found = true;
729
730 /*
731 * Assign a new dev_num to this Slave and
732 * not mark it present. It will be marked
733 * present after it reports ATTACHED on new
734 * dev_num
735 */
736 ret = sdw_assign_device_num(slave);
737 if (ret) {
738 dev_err(slave->bus->dev,
17ed5bef 739 "Assign dev_num failed:%d\n",
d52d7a1b
SK
740 ret);
741 return ret;
742 }
743
744 break;
745 }
746 }
747
d7b956b6 748 if (!found) {
d52d7a1b 749 /* TODO: Park this device in Group 13 */
fcb9d730
SK
750
751 /*
752 * add Slave device even if there is no platform
753 * firmware description. There will be no driver probe
754 * but the user/integration will be able to see the
755 * device, enumeration status and device number in sysfs
756 */
757 sdw_slave_add(bus, &id, NULL);
758
17ed5bef 759 dev_err(bus->dev, "Slave Entry not found\n");
d52d7a1b
SK
760 }
761
762 count++;
763
764 /*
765 * Check till error out or retry (count) exhausts.
766 * Device can drop off and rejoin during enumeration
767 * so count till twice the bound.
768 */
769
770 } while (ret == 0 && count < (SDW_MAX_DEVICES * 2));
771
772 return ret;
773}
774
775static void sdw_modify_slave_status(struct sdw_slave *slave,
73ede046 776 enum sdw_slave_status status)
d52d7a1b
SK
777{
778 mutex_lock(&slave->bus->bus_lock);
fb9469e5
PLB
779
780 dev_vdbg(&slave->dev,
781 "%s: changing status slave %d status %d new status %d\n",
782 __func__, slave->dev_num, slave->status, status);
783
784 if (status == SDW_SLAVE_UNATTACHED) {
785 dev_dbg(&slave->dev,
786 "%s: initializing completion for Slave %d\n",
787 __func__, slave->dev_num);
788
789 init_completion(&slave->enumeration_complete);
a90def06 790 init_completion(&slave->initialization_complete);
fb9469e5
PLB
791
792 } else if ((status == SDW_SLAVE_ATTACHED) &&
793 (slave->status == SDW_SLAVE_UNATTACHED)) {
794 dev_dbg(&slave->dev,
795 "%s: signaling completion for Slave %d\n",
796 __func__, slave->dev_num);
797
798 complete(&slave->enumeration_complete);
799 }
d52d7a1b
SK
800 slave->status = status;
801 mutex_unlock(&slave->bus->bus_lock);
802}
803
0231453b
RW
804static enum sdw_clk_stop_mode sdw_get_clk_stop_mode(struct sdw_slave *slave)
805{
806 enum sdw_clk_stop_mode mode;
807
808 /*
809 * Query for clock stop mode if Slave implements
810 * ops->get_clk_stop_mode, else read from property.
811 */
812 if (slave->ops && slave->ops->get_clk_stop_mode) {
813 mode = slave->ops->get_clk_stop_mode(slave);
814 } else {
815 if (slave->prop.clk_stop_mode1)
816 mode = SDW_CLK_STOP_MODE1;
817 else
818 mode = SDW_CLK_STOP_MODE0;
819 }
820
821 return mode;
822}
823
824static int sdw_slave_clk_stop_callback(struct sdw_slave *slave,
825 enum sdw_clk_stop_mode mode,
826 enum sdw_clk_stop_type type)
827{
828 int ret;
829
830 if (slave->ops && slave->ops->clk_stop) {
831 ret = slave->ops->clk_stop(slave, mode, type);
832 if (ret < 0) {
833 dev_err(&slave->dev,
834 "Clk Stop type =%d failed: %d\n", type, ret);
835 return ret;
836 }
837 }
838
839 return 0;
840}
841
842static int sdw_slave_clk_stop_prepare(struct sdw_slave *slave,
843 enum sdw_clk_stop_mode mode,
844 bool prepare)
845{
846 bool wake_en;
847 u32 val = 0;
848 int ret;
849
850 wake_en = slave->prop.wake_capable;
851
852 if (prepare) {
853 val = SDW_SCP_SYSTEMCTRL_CLK_STP_PREP;
854
855 if (mode == SDW_CLK_STOP_MODE1)
856 val |= SDW_SCP_SYSTEMCTRL_CLK_STP_MODE1;
857
858 if (wake_en)
859 val |= SDW_SCP_SYSTEMCTRL_WAKE_UP_EN;
860 } else {
861 val = sdw_read_no_pm(slave, SDW_SCP_SYSTEMCTRL);
862
863 val &= ~(SDW_SCP_SYSTEMCTRL_CLK_STP_PREP);
864 }
865
866 ret = sdw_write_no_pm(slave, SDW_SCP_SYSTEMCTRL, val);
867
868 if (ret != 0)
869 dev_err(&slave->dev,
870 "Clock Stop prepare failed for slave: %d", ret);
871
872 return ret;
873}
874
875static int sdw_bus_wait_for_clk_prep_deprep(struct sdw_bus *bus, u16 dev_num)
876{
877 int retry = bus->clk_stop_timeout;
878 int val;
879
880 do {
881 val = sdw_bread_no_pm(bus, dev_num, SDW_SCP_STAT) &
882 SDW_SCP_STAT_CLK_STP_NF;
883 if (!val) {
884 dev_info(bus->dev, "clock stop prep/de-prep done slave:%d",
885 dev_num);
886 return 0;
887 }
888
889 usleep_range(1000, 1500);
890 retry--;
891 } while (retry);
892
893 dev_err(bus->dev, "clock stop prep/de-prep failed slave:%d",
894 dev_num);
895
896 return -ETIMEDOUT;
897}
898
899/**
900 * sdw_bus_prep_clk_stop: prepare Slave(s) for clock stop
901 *
902 * @bus: SDW bus instance
903 *
904 * Query Slave for clock stop mode and prepare for that mode.
905 */
906int sdw_bus_prep_clk_stop(struct sdw_bus *bus)
907{
908 enum sdw_clk_stop_mode slave_mode;
909 bool simple_clk_stop = true;
910 struct sdw_slave *slave;
911 bool is_slave = false;
912 int ret = 0;
913
914 /*
915 * In order to save on transition time, prepare
916 * each Slave and then wait for all Slave(s) to be
917 * prepared for clock stop.
918 */
919 list_for_each_entry(slave, &bus->slaves, node) {
920 if (!slave->dev_num)
921 continue;
922
0231453b
RW
923 if (slave->status != SDW_SLAVE_ATTACHED &&
924 slave->status != SDW_SLAVE_ALERT)
925 continue;
926
929cfee3
BL
927 /* Identify if Slave(s) are available on Bus */
928 is_slave = true;
929
0231453b
RW
930 slave_mode = sdw_get_clk_stop_mode(slave);
931 slave->curr_clk_stop_mode = slave_mode;
932
933 ret = sdw_slave_clk_stop_callback(slave, slave_mode,
934 SDW_CLK_PRE_PREPARE);
935 if (ret < 0) {
936 dev_err(&slave->dev,
937 "pre-prepare failed:%d", ret);
938 return ret;
939 }
940
941 ret = sdw_slave_clk_stop_prepare(slave,
942 slave_mode, true);
943 if (ret < 0) {
944 dev_err(&slave->dev,
945 "pre-prepare failed:%d", ret);
946 return ret;
947 }
948
949 if (slave_mode == SDW_CLK_STOP_MODE1)
950 simple_clk_stop = false;
951 }
952
953 if (is_slave && !simple_clk_stop) {
954 ret = sdw_bus_wait_for_clk_prep_deprep(bus,
955 SDW_BROADCAST_DEV_NUM);
956 if (ret < 0)
957 return ret;
958 }
959
929cfee3
BL
960 /* Don't need to inform slaves if there is no slave attached */
961 if (!is_slave)
962 return ret;
963
0231453b
RW
964 /* Inform slaves that prep is done */
965 list_for_each_entry(slave, &bus->slaves, node) {
966 if (!slave->dev_num)
967 continue;
968
969 if (slave->status != SDW_SLAVE_ATTACHED &&
970 slave->status != SDW_SLAVE_ALERT)
971 continue;
972
973 slave_mode = slave->curr_clk_stop_mode;
974
975 if (slave_mode == SDW_CLK_STOP_MODE1) {
976 ret = sdw_slave_clk_stop_callback(slave,
977 slave_mode,
978 SDW_CLK_POST_PREPARE);
979
980 if (ret < 0) {
981 dev_err(&slave->dev,
982 "post-prepare failed:%d", ret);
983 }
984 }
985 }
986
987 return ret;
988}
989EXPORT_SYMBOL(sdw_bus_prep_clk_stop);
990
991/**
992 * sdw_bus_clk_stop: stop bus clock
993 *
994 * @bus: SDW bus instance
995 *
996 * After preparing the Slaves for clock stop, stop the clock by broadcasting
997 * write to SCP_CTRL register.
998 */
999int sdw_bus_clk_stop(struct sdw_bus *bus)
1000{
1001 int ret;
1002
1003 /*
1004 * broadcast clock stop now, attached Slaves will ACK this,
1005 * unattached will ignore
1006 */
1007 ret = sdw_bwrite_no_pm(bus, SDW_BROADCAST_DEV_NUM,
1008 SDW_SCP_CTRL, SDW_SCP_CTRL_CLK_STP_NOW);
1009 if (ret < 0) {
dde73538
PLB
1010 if (ret == -ENODATA)
1011 dev_dbg(bus->dev,
1012 "ClockStopNow Broadcast msg ignored %d", ret);
1013 else
1014 dev_err(bus->dev,
1015 "ClockStopNow Broadcast msg failed %d", ret);
0231453b
RW
1016 return ret;
1017 }
1018
1019 return 0;
1020}
1021EXPORT_SYMBOL(sdw_bus_clk_stop);
1022
1023/**
1024 * sdw_bus_exit_clk_stop: Exit clock stop mode
1025 *
1026 * @bus: SDW bus instance
1027 *
1028 * This De-prepares the Slaves by exiting Clock Stop Mode 0. For the Slaves
1029 * exiting Clock Stop Mode 1, they will be de-prepared after they enumerate
1030 * back.
1031 */
1032int sdw_bus_exit_clk_stop(struct sdw_bus *bus)
1033{
1034 enum sdw_clk_stop_mode mode;
1035 bool simple_clk_stop = true;
1036 struct sdw_slave *slave;
1037 bool is_slave = false;
1038 int ret;
1039
1040 /*
1041 * In order to save on transition time, de-prepare
1042 * each Slave and then wait for all Slave(s) to be
1043 * de-prepared after clock resume.
1044 */
1045 list_for_each_entry(slave, &bus->slaves, node) {
1046 if (!slave->dev_num)
1047 continue;
1048
0231453b
RW
1049 if (slave->status != SDW_SLAVE_ATTACHED &&
1050 slave->status != SDW_SLAVE_ALERT)
1051 continue;
1052
929cfee3
BL
1053 /* Identify if Slave(s) are available on Bus */
1054 is_slave = true;
1055
0231453b
RW
1056 mode = slave->curr_clk_stop_mode;
1057
1058 if (mode == SDW_CLK_STOP_MODE1) {
1059 simple_clk_stop = false;
1060 continue;
1061 }
1062
1063 ret = sdw_slave_clk_stop_callback(slave, mode,
1064 SDW_CLK_PRE_DEPREPARE);
1065 if (ret < 0)
1066 dev_warn(&slave->dev,
1067 "clk stop deprep failed:%d", ret);
1068
1069 ret = sdw_slave_clk_stop_prepare(slave, mode,
1070 false);
1071
1072 if (ret < 0)
1073 dev_warn(&slave->dev,
1074 "clk stop deprep failed:%d", ret);
1075 }
1076
1077 if (is_slave && !simple_clk_stop)
1078 sdw_bus_wait_for_clk_prep_deprep(bus, SDW_BROADCAST_DEV_NUM);
1079
929cfee3
BL
1080 /*
1081 * Don't need to call slave callback function if there is no slave
1082 * attached
1083 */
1084 if (!is_slave)
1085 return 0;
1086
0231453b
RW
1087 list_for_each_entry(slave, &bus->slaves, node) {
1088 if (!slave->dev_num)
1089 continue;
1090
1091 if (slave->status != SDW_SLAVE_ATTACHED &&
1092 slave->status != SDW_SLAVE_ALERT)
1093 continue;
1094
1095 mode = slave->curr_clk_stop_mode;
1096 sdw_slave_clk_stop_callback(slave, mode,
1097 SDW_CLK_POST_DEPREPARE);
1098 }
1099
1100 return 0;
1101}
1102EXPORT_SYMBOL(sdw_bus_exit_clk_stop);
1103
79df15b7 1104int sdw_configure_dpn_intr(struct sdw_slave *slave,
73ede046 1105 int port, bool enable, int mask)
79df15b7
SK
1106{
1107 u32 addr;
1108 int ret;
1109 u8 val = 0;
1110
dd87a72a
PLB
1111 if (slave->bus->params.s_data_mode != SDW_PORT_DATA_MODE_NORMAL) {
1112 dev_dbg(&slave->dev, "TEST FAIL interrupt %s\n",
1113 enable ? "on" : "off");
1114 mask |= SDW_DPN_INT_TEST_FAIL;
1115 }
1116
79df15b7
SK
1117 addr = SDW_DPN_INTMASK(port);
1118
1119 /* Set/Clear port ready interrupt mask */
1120 if (enable) {
1121 val |= mask;
1122 val |= SDW_DPN_INT_PORT_READY;
1123 } else {
1124 val &= ~(mask);
1125 val &= ~SDW_DPN_INT_PORT_READY;
1126 }
1127
1128 ret = sdw_update(slave, addr, (mask | SDW_DPN_INT_PORT_READY), val);
1129 if (ret < 0)
1130 dev_err(slave->bus->dev,
17ed5bef 1131 "SDW_DPN_INTMASK write failed:%d\n", val);
79df15b7
SK
1132
1133 return ret;
1134}
1135
29d158f9
PLB
1136static int sdw_slave_set_frequency(struct sdw_slave *slave)
1137{
1138 u32 mclk_freq = slave->bus->prop.mclk_freq;
1139 u32 curr_freq = slave->bus->params.curr_dr_freq >> 1;
1140 unsigned int scale;
1141 u8 scale_index;
1142 u8 base;
1143 int ret;
1144
1145 /*
1146 * frequency base and scale registers are required for SDCA
1147 * devices. They may also be used for 1.2+/non-SDCA devices,
1148 * but we will need a DisCo property to cover this case
1149 */
1150 if (!slave->id.class_id)
1151 return 0;
1152
1153 if (!mclk_freq) {
1154 dev_err(&slave->dev,
1155 "no bus MCLK, cannot set SDW_SCP_BUS_CLOCK_BASE\n");
1156 return -EINVAL;
1157 }
1158
1159 /*
1160 * map base frequency using Table 89 of SoundWire 1.2 spec.
1161 * The order of the tests just follows the specification, this
1162 * is not a selection between possible values or a search for
1163 * the best value but just a mapping. Only one case per platform
1164 * is relevant.
1165 * Some BIOS have inconsistent values for mclk_freq but a
1166 * correct root so we force the mclk_freq to avoid variations.
1167 */
1168 if (!(19200000 % mclk_freq)) {
1169 mclk_freq = 19200000;
1170 base = SDW_SCP_BASE_CLOCK_19200000_HZ;
1171 } else if (!(24000000 % mclk_freq)) {
1172 mclk_freq = 24000000;
1173 base = SDW_SCP_BASE_CLOCK_24000000_HZ;
1174 } else if (!(24576000 % mclk_freq)) {
1175 mclk_freq = 24576000;
1176 base = SDW_SCP_BASE_CLOCK_24576000_HZ;
1177 } else if (!(22579200 % mclk_freq)) {
1178 mclk_freq = 22579200;
1179 base = SDW_SCP_BASE_CLOCK_22579200_HZ;
1180 } else if (!(32000000 % mclk_freq)) {
1181 mclk_freq = 32000000;
1182 base = SDW_SCP_BASE_CLOCK_32000000_HZ;
1183 } else {
1184 dev_err(&slave->dev,
1185 "Unsupported clock base, mclk %d\n",
1186 mclk_freq);
1187 return -EINVAL;
1188 }
1189
1190 if (mclk_freq % curr_freq) {
1191 dev_err(&slave->dev,
1192 "mclk %d is not multiple of bus curr_freq %d\n",
1193 mclk_freq, curr_freq);
1194 return -EINVAL;
1195 }
1196
1197 scale = mclk_freq / curr_freq;
1198
1199 /*
1200 * map scale to Table 90 of SoundWire 1.2 spec - and check
1201 * that the scale is a power of two and maximum 64
1202 */
1203 scale_index = ilog2(scale);
1204
1205 if (BIT(scale_index) != scale || scale_index > 6) {
1206 dev_err(&slave->dev,
1207 "No match found for scale %d, bus mclk %d curr_freq %d\n",
1208 scale, mclk_freq, curr_freq);
1209 return -EINVAL;
1210 }
1211 scale_index++;
1212
1213 ret = sdw_write(slave, SDW_SCP_BUS_CLOCK_BASE, base);
1214 if (ret < 0) {
1215 dev_err(&slave->dev,
1216 "SDW_SCP_BUS_CLOCK_BASE write failed:%d\n", ret);
1217 return ret;
1218 }
1219
1220 /* initialize scale for both banks */
1221 ret = sdw_write(slave, SDW_SCP_BUSCLOCK_SCALE_B0, scale_index);
1222 if (ret < 0) {
1223 dev_err(&slave->dev,
1224 "SDW_SCP_BUSCLOCK_SCALE_B0 write failed:%d\n", ret);
1225 return ret;
1226 }
1227 ret = sdw_write(slave, SDW_SCP_BUSCLOCK_SCALE_B1, scale_index);
1228 if (ret < 0)
1229 dev_err(&slave->dev,
1230 "SDW_SCP_BUSCLOCK_SCALE_B1 write failed:%d\n", ret);
1231
1232 dev_dbg(&slave->dev,
1233 "Configured bus base %d, scale %d, mclk %d, curr_freq %d\n",
1234 base, scale_index, mclk_freq, curr_freq);
1235
1236 return ret;
1237}
1238
d52d7a1b
SK
1239static int sdw_initialize_slave(struct sdw_slave *slave)
1240{
1241 struct sdw_slave_prop *prop = &slave->prop;
1242 int ret;
1243 u8 val;
1244
29d158f9
PLB
1245 ret = sdw_slave_set_frequency(slave);
1246 if (ret < 0)
1247 return ret;
1248
d52d7a1b 1249 /*
2acd30b9
PLB
1250 * Set SCP_INT1_MASK register, typically bus clash and
1251 * implementation-defined interrupt mask. The Parity detection
1252 * may not always be correct on startup so its use is
1253 * device-dependent, it might e.g. only be enabled in
1254 * steady-state after a couple of frames.
d52d7a1b 1255 */
2acd30b9 1256 val = slave->prop.scp_int1_mask;
d52d7a1b
SK
1257
1258 /* Enable SCP interrupts */
1259 ret = sdw_update(slave, SDW_SCP_INTMASK1, val, val);
1260 if (ret < 0) {
1261 dev_err(slave->bus->dev,
17ed5bef 1262 "SDW_SCP_INTMASK1 write failed:%d\n", ret);
d52d7a1b
SK
1263 return ret;
1264 }
1265
1266 /* No need to continue if DP0 is not present */
1267 if (!slave->prop.dp0_prop)
1268 return 0;
1269
1270 /* Enable DP0 interrupts */
8acbbfec 1271 val = prop->dp0_prop->imp_def_interrupts;
d52d7a1b
SK
1272 val |= SDW_DP0_INT_PORT_READY | SDW_DP0_INT_BRA_FAILURE;
1273
1274 ret = sdw_update(slave, SDW_DP0_INTMASK, val, val);
5de79ba8 1275 if (ret < 0)
d52d7a1b 1276 dev_err(slave->bus->dev,
17ed5bef 1277 "SDW_DP0_INTMASK read failed:%d\n", ret);
5de79ba8 1278 return ret;
d52d7a1b 1279}
b0a9c37b
VK
1280
1281static int sdw_handle_dp0_interrupt(struct sdw_slave *slave, u8 *slave_status)
1282{
b35991de 1283 u8 clear, impl_int_mask;
b0a9c37b
VK
1284 int status, status2, ret, count = 0;
1285
1286 status = sdw_read(slave, SDW_DP0_INT);
1287 if (status < 0) {
1288 dev_err(slave->bus->dev,
17ed5bef 1289 "SDW_DP0_INT read failed:%d\n", status);
b0a9c37b
VK
1290 return status;
1291 }
1292
1293 do {
b35991de
PLB
1294 clear = status & ~SDW_DP0_INTERRUPTS;
1295
b0a9c37b 1296 if (status & SDW_DP0_INT_TEST_FAIL) {
17ed5bef 1297 dev_err(&slave->dev, "Test fail for port 0\n");
b0a9c37b
VK
1298 clear |= SDW_DP0_INT_TEST_FAIL;
1299 }
1300
1301 /*
1302 * Assumption: PORT_READY interrupt will be received only for
1303 * ports implementing Channel Prepare state machine (CP_SM)
1304 */
1305
1306 if (status & SDW_DP0_INT_PORT_READY) {
1307 complete(&slave->port_ready[0]);
1308 clear |= SDW_DP0_INT_PORT_READY;
1309 }
1310
1311 if (status & SDW_DP0_INT_BRA_FAILURE) {
17ed5bef 1312 dev_err(&slave->dev, "BRA failed\n");
b0a9c37b
VK
1313 clear |= SDW_DP0_INT_BRA_FAILURE;
1314 }
1315
1316 impl_int_mask = SDW_DP0_INT_IMPDEF1 |
1317 SDW_DP0_INT_IMPDEF2 | SDW_DP0_INT_IMPDEF3;
1318
1319 if (status & impl_int_mask) {
1320 clear |= impl_int_mask;
1321 *slave_status = clear;
1322 }
1323
b35991de 1324 /* clear the interrupts but don't touch reserved and SDCA_CASCADE fields */
b0a9c37b
VK
1325 ret = sdw_write(slave, SDW_DP0_INT, clear);
1326 if (ret < 0) {
1327 dev_err(slave->bus->dev,
17ed5bef 1328 "SDW_DP0_INT write failed:%d\n", ret);
b0a9c37b
VK
1329 return ret;
1330 }
1331
1332 /* Read DP0 interrupt again */
1333 status2 = sdw_read(slave, SDW_DP0_INT);
1334 if (status2 < 0) {
1335 dev_err(slave->bus->dev,
17ed5bef 1336 "SDW_DP0_INT read failed:%d\n", status2);
80cd8f01 1337 return status2;
b0a9c37b 1338 }
6e06a855 1339 /* filter to limit loop to interrupts identified in the first status read */
b0a9c37b
VK
1340 status &= status2;
1341
1342 count++;
1343
1344 /* we can get alerts while processing so keep retrying */
b35991de 1345 } while ((status & SDW_DP0_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY));
b0a9c37b
VK
1346
1347 if (count == SDW_READ_INTR_CLEAR_RETRY)
17ed5bef 1348 dev_warn(slave->bus->dev, "Reached MAX_RETRY on DP0 read\n");
b0a9c37b
VK
1349
1350 return ret;
1351}
1352
1353static int sdw_handle_port_interrupt(struct sdw_slave *slave,
73ede046 1354 int port, u8 *slave_status)
b0a9c37b 1355{
47b85209 1356 u8 clear, impl_int_mask;
b0a9c37b
VK
1357 int status, status2, ret, count = 0;
1358 u32 addr;
1359
1360 if (port == 0)
1361 return sdw_handle_dp0_interrupt(slave, slave_status);
1362
1363 addr = SDW_DPN_INT(port);
1364 status = sdw_read(slave, addr);
1365 if (status < 0) {
1366 dev_err(slave->bus->dev,
17ed5bef 1367 "SDW_DPN_INT read failed:%d\n", status);
b0a9c37b
VK
1368
1369 return status;
1370 }
1371
1372 do {
47b85209
PLB
1373 clear = status & ~SDW_DPN_INTERRUPTS;
1374
b0a9c37b 1375 if (status & SDW_DPN_INT_TEST_FAIL) {
17ed5bef 1376 dev_err(&slave->dev, "Test fail for port:%d\n", port);
b0a9c37b
VK
1377 clear |= SDW_DPN_INT_TEST_FAIL;
1378 }
1379
1380 /*
1381 * Assumption: PORT_READY interrupt will be received only
1382 * for ports implementing CP_SM.
1383 */
1384 if (status & SDW_DPN_INT_PORT_READY) {
1385 complete(&slave->port_ready[port]);
1386 clear |= SDW_DPN_INT_PORT_READY;
1387 }
1388
1389 impl_int_mask = SDW_DPN_INT_IMPDEF1 |
1390 SDW_DPN_INT_IMPDEF2 | SDW_DPN_INT_IMPDEF3;
1391
b0a9c37b
VK
1392 if (status & impl_int_mask) {
1393 clear |= impl_int_mask;
1394 *slave_status = clear;
1395 }
1396
47b85209 1397 /* clear the interrupt but don't touch reserved fields */
b0a9c37b
VK
1398 ret = sdw_write(slave, addr, clear);
1399 if (ret < 0) {
1400 dev_err(slave->bus->dev,
17ed5bef 1401 "SDW_DPN_INT write failed:%d\n", ret);
b0a9c37b
VK
1402 return ret;
1403 }
1404
1405 /* Read DPN interrupt again */
1406 status2 = sdw_read(slave, addr);
80cd8f01 1407 if (status2 < 0) {
b0a9c37b 1408 dev_err(slave->bus->dev,
17ed5bef 1409 "SDW_DPN_INT read failed:%d\n", status2);
80cd8f01 1410 return status2;
b0a9c37b 1411 }
6e06a855 1412 /* filter to limit loop to interrupts identified in the first status read */
b0a9c37b
VK
1413 status &= status2;
1414
1415 count++;
1416
1417 /* we can get alerts while processing so keep retrying */
47b85209 1418 } while ((status & SDW_DPN_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY));
b0a9c37b
VK
1419
1420 if (count == SDW_READ_INTR_CLEAR_RETRY)
1421 dev_warn(slave->bus->dev, "Reached MAX_RETRY on port read");
1422
1423 return ret;
1424}
1425
1426static int sdw_handle_slave_alerts(struct sdw_slave *slave)
1427{
1428 struct sdw_slave_intr_status slave_intr;
f1fac63a 1429 u8 clear = 0, bit, port_status[15] = {0};
b0a9c37b
VK
1430 int port_num, stat, ret, count = 0;
1431 unsigned long port;
7ffaba04 1432 bool slave_notify;
b7cab9be 1433 u8 sdca_cascade = 0;
b0a9c37b 1434 u8 buf, buf2[2], _buf, _buf2[2];
4724f12c
PLB
1435 bool parity_check;
1436 bool parity_quirk;
b0a9c37b
VK
1437
1438 sdw_modify_slave_status(slave, SDW_SLAVE_ALERT);
1439
aa792935
RW
1440 ret = pm_runtime_get_sync(&slave->dev);
1441 if (ret < 0 && ret != -EACCES) {
1442 dev_err(&slave->dev, "Failed to resume device: %d\n", ret);
1443 pm_runtime_put_noidle(slave->bus->dev);
1444 return ret;
1445 }
1446
f8d0168e 1447 /* Read Intstat 1, Intstat 2 and Intstat 3 registers */
72b16d4a 1448 ret = sdw_read(slave, SDW_SCP_INT1);
b0a9c37b
VK
1449 if (ret < 0) {
1450 dev_err(slave->bus->dev,
17ed5bef 1451 "SDW_SCP_INT1 read failed:%d\n", ret);
aa792935 1452 goto io_err;
b0a9c37b 1453 }
72b16d4a 1454 buf = ret;
b0a9c37b
VK
1455
1456 ret = sdw_nread(slave, SDW_SCP_INTSTAT2, 2, buf2);
1457 if (ret < 0) {
1458 dev_err(slave->bus->dev,
17ed5bef 1459 "SDW_SCP_INT2/3 read failed:%d\n", ret);
aa792935 1460 goto io_err;
b0a9c37b
VK
1461 }
1462
b7cab9be
PLB
1463 if (slave->prop.is_sdca) {
1464 ret = sdw_read(slave, SDW_DP0_INT);
1465 if (ret < 0) {
1466 dev_err(slave->bus->dev,
1467 "SDW_DP0_INT read failed:%d\n", ret);
1468 goto io_err;
1469 }
1470 sdca_cascade = ret & SDW_DP0_SDCA_CASCADE;
1471 }
1472
b0a9c37b 1473 do {
7ffaba04
PLB
1474 slave_notify = false;
1475
b0a9c37b
VK
1476 /*
1477 * Check parity, bus clash and Slave (impl defined)
1478 * interrupt
1479 */
1480 if (buf & SDW_SCP_INT1_PARITY) {
4724f12c
PLB
1481 parity_check = slave->prop.scp_int1_mask & SDW_SCP_INT1_PARITY;
1482 parity_quirk = !slave->first_interrupt_done &&
1483 (slave->prop.quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY);
1484
1485 if (parity_check && !parity_quirk)
310f6dc6 1486 dev_err(&slave->dev, "Parity error detected\n");
b0a9c37b
VK
1487 clear |= SDW_SCP_INT1_PARITY;
1488 }
1489
1490 if (buf & SDW_SCP_INT1_BUS_CLASH) {
310f6dc6
PLB
1491 if (slave->prop.scp_int1_mask & SDW_SCP_INT1_BUS_CLASH)
1492 dev_err(&slave->dev, "Bus clash detected\n");
b0a9c37b
VK
1493 clear |= SDW_SCP_INT1_BUS_CLASH;
1494 }
1495
1496 /*
1497 * When bus clash or parity errors are detected, such errors
1498 * are unlikely to be recoverable errors.
1499 * TODO: In such scenario, reset bus. Make this configurable
1500 * via sysfs property with bus reset being the default.
1501 */
1502
1503 if (buf & SDW_SCP_INT1_IMPL_DEF) {
310f6dc6
PLB
1504 if (slave->prop.scp_int1_mask & SDW_SCP_INT1_IMPL_DEF) {
1505 dev_dbg(&slave->dev, "Slave impl defined interrupt\n");
1506 slave_notify = true;
1507 }
b0a9c37b 1508 clear |= SDW_SCP_INT1_IMPL_DEF;
b0a9c37b
VK
1509 }
1510
b7cab9be
PLB
1511 /* the SDCA interrupts are cleared in the codec driver .interrupt_callback() */
1512 if (sdca_cascade)
1513 slave_notify = true;
1514
b0a9c37b
VK
1515 /* Check port 0 - 3 interrupts */
1516 port = buf & SDW_SCP_INT1_PORT0_3;
1517
1518 /* To get port number corresponding to bits, shift it */
d5826a4b 1519 port = FIELD_GET(SDW_SCP_INT1_PORT0_3, port);
b0a9c37b
VK
1520 for_each_set_bit(bit, &port, 8) {
1521 sdw_handle_port_interrupt(slave, bit,
73ede046 1522 &port_status[bit]);
b0a9c37b
VK
1523 }
1524
1525 /* Check if cascade 2 interrupt is present */
1526 if (buf & SDW_SCP_INT1_SCP2_CASCADE) {
1527 port = buf2[0] & SDW_SCP_INTSTAT2_PORT4_10;
1528 for_each_set_bit(bit, &port, 8) {
1529 /* scp2 ports start from 4 */
1530 port_num = bit + 3;
1531 sdw_handle_port_interrupt(slave,
1532 port_num,
1533 &port_status[port_num]);
1534 }
1535 }
1536
1537 /* now check last cascade */
1538 if (buf2[0] & SDW_SCP_INTSTAT2_SCP3_CASCADE) {
1539 port = buf2[1] & SDW_SCP_INTSTAT3_PORT11_14;
1540 for_each_set_bit(bit, &port, 8) {
1541 /* scp3 ports start from 11 */
1542 port_num = bit + 10;
1543 sdw_handle_port_interrupt(slave,
1544 port_num,
1545 &port_status[port_num]);
1546 }
1547 }
1548
1549 /* Update the Slave driver */
09830d5e
PLB
1550 if (slave_notify && slave->ops &&
1551 slave->ops->interrupt_callback) {
b7cab9be 1552 slave_intr.sdca_cascade = sdca_cascade;
b0a9c37b
VK
1553 slave_intr.control_port = clear;
1554 memcpy(slave_intr.port, &port_status,
73ede046 1555 sizeof(slave_intr.port));
b0a9c37b
VK
1556
1557 slave->ops->interrupt_callback(slave, &slave_intr);
1558 }
1559
1560 /* Ack interrupt */
1561 ret = sdw_write(slave, SDW_SCP_INT1, clear);
1562 if (ret < 0) {
1563 dev_err(slave->bus->dev,
17ed5bef 1564 "SDW_SCP_INT1 write failed:%d\n", ret);
aa792935 1565 goto io_err;
b0a9c37b
VK
1566 }
1567
c2819e19
PLB
1568 /* at this point all initial interrupt sources were handled */
1569 slave->first_interrupt_done = true;
1570
b0a9c37b
VK
1571 /*
1572 * Read status again to ensure no new interrupts arrived
1573 * while servicing interrupts.
1574 */
72b16d4a 1575 ret = sdw_read(slave, SDW_SCP_INT1);
b0a9c37b
VK
1576 if (ret < 0) {
1577 dev_err(slave->bus->dev,
17ed5bef 1578 "SDW_SCP_INT1 read failed:%d\n", ret);
aa792935 1579 goto io_err;
b0a9c37b 1580 }
72b16d4a 1581 _buf = ret;
b0a9c37b
VK
1582
1583 ret = sdw_nread(slave, SDW_SCP_INTSTAT2, 2, _buf2);
1584 if (ret < 0) {
1585 dev_err(slave->bus->dev,
17ed5bef 1586 "SDW_SCP_INT2/3 read failed:%d\n", ret);
aa792935 1587 goto io_err;
b0a9c37b
VK
1588 }
1589
b7cab9be
PLB
1590 if (slave->prop.is_sdca) {
1591 ret = sdw_read(slave, SDW_DP0_INT);
1592 if (ret < 0) {
1593 dev_err(slave->bus->dev,
1594 "SDW_DP0_INT read failed:%d\n", ret);
1595 goto io_err;
1596 }
1597 sdca_cascade = ret & SDW_DP0_SDCA_CASCADE;
1598 }
1599
6e06a855
PLB
1600 /*
1601 * Make sure no interrupts are pending, but filter to limit loop
1602 * to interrupts identified in the first status read
1603 */
b0a9c37b
VK
1604 buf &= _buf;
1605 buf2[0] &= _buf2[0];
1606 buf2[1] &= _buf2[1];
b7cab9be 1607 stat = buf || buf2[0] || buf2[1] || sdca_cascade;
b0a9c37b
VK
1608
1609 /*
1610 * Exit loop if Slave is continuously in ALERT state even
1611 * after servicing the interrupt multiple times.
1612 */
1613 count++;
1614
1615 /* we can get alerts while processing so keep retrying */
1616 } while (stat != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
1617
1618 if (count == SDW_READ_INTR_CLEAR_RETRY)
17ed5bef 1619 dev_warn(slave->bus->dev, "Reached MAX_RETRY on alert read\n");
b0a9c37b 1620
aa792935
RW
1621io_err:
1622 pm_runtime_mark_last_busy(&slave->dev);
1623 pm_runtime_put_autosuspend(&slave->dev);
1624
b0a9c37b
VK
1625 return ret;
1626}
1627
1628static int sdw_update_slave_status(struct sdw_slave *slave,
73ede046 1629 enum sdw_slave_status status)
b0a9c37b 1630{
2140b66b 1631 unsigned long time;
b0a9c37b 1632
2140b66b
PLB
1633 if (!slave->probed) {
1634 /*
1635 * the slave status update is typically handled in an
1636 * interrupt thread, which can race with the driver
1637 * probe, e.g. when a module needs to be loaded.
1638 *
1639 * make sure the probe is complete before updating
1640 * status.
1641 */
1642 time = wait_for_completion_timeout(&slave->probe_complete,
1643 msecs_to_jiffies(DEFAULT_PROBE_TIMEOUT));
1644 if (!time) {
1645 dev_err(&slave->dev, "Probe not complete, timed out\n");
1646 return -ETIMEDOUT;
1647 }
1648 }
1649
1650 if (!slave->ops || !slave->ops->update_status)
1651 return 0;
1652
1653 return slave->ops->update_status(slave, status);
b0a9c37b
VK
1654}
1655
1656/**
1657 * sdw_handle_slave_status() - Handle Slave status
1658 * @bus: SDW bus instance
1659 * @status: Status for all Slave(s)
1660 */
1661int sdw_handle_slave_status(struct sdw_bus *bus,
73ede046 1662 enum sdw_slave_status status[])
b0a9c37b
VK
1663{
1664 enum sdw_slave_status prev_status;
1665 struct sdw_slave *slave;
a90def06 1666 bool attached_initializing;
b0a9c37b
VK
1667 int i, ret = 0;
1668
61061901
PLB
1669 /* first check if any Slaves fell off the bus */
1670 for (i = 1; i <= SDW_MAX_DEVICES; i++) {
1671 mutex_lock(&bus->bus_lock);
1672 if (test_bit(i, bus->assigned) == false) {
1673 mutex_unlock(&bus->bus_lock);
1674 continue;
1675 }
1676 mutex_unlock(&bus->bus_lock);
1677
1678 slave = sdw_get_slave(bus, i);
1679 if (!slave)
1680 continue;
1681
1682 if (status[i] == SDW_SLAVE_UNATTACHED &&
1683 slave->status != SDW_SLAVE_UNATTACHED)
1684 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
1685 }
1686
b0a9c37b 1687 if (status[0] == SDW_SLAVE_ATTACHED) {
6e0ac6a6 1688 dev_dbg(bus->dev, "Slave attached, programming device number\n");
b0a9c37b
VK
1689 ret = sdw_program_device_num(bus);
1690 if (ret)
17ed5bef 1691 dev_err(bus->dev, "Slave attach failed: %d\n", ret);
15ed3ea2
PLB
1692 /*
1693 * programming a device number will have side effects,
1694 * so we deal with other devices at a later time
1695 */
1696 return ret;
b0a9c37b
VK
1697 }
1698
1699 /* Continue to check other slave statuses */
1700 for (i = 1; i <= SDW_MAX_DEVICES; i++) {
1701 mutex_lock(&bus->bus_lock);
1702 if (test_bit(i, bus->assigned) == false) {
1703 mutex_unlock(&bus->bus_lock);
1704 continue;
1705 }
1706 mutex_unlock(&bus->bus_lock);
1707
1708 slave = sdw_get_slave(bus, i);
1709 if (!slave)
1710 continue;
1711
a90def06
PLB
1712 attached_initializing = false;
1713
b0a9c37b
VK
1714 switch (status[i]) {
1715 case SDW_SLAVE_UNATTACHED:
1716 if (slave->status == SDW_SLAVE_UNATTACHED)
1717 break;
1718
1719 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
1720 break;
1721
1722 case SDW_SLAVE_ALERT:
1723 ret = sdw_handle_slave_alerts(slave);
1724 if (ret)
1725 dev_err(bus->dev,
17ed5bef 1726 "Slave %d alert handling failed: %d\n",
b0a9c37b
VK
1727 i, ret);
1728 break;
1729
1730 case SDW_SLAVE_ATTACHED:
1731 if (slave->status == SDW_SLAVE_ATTACHED)
1732 break;
1733
1734 prev_status = slave->status;
1735 sdw_modify_slave_status(slave, SDW_SLAVE_ATTACHED);
1736
1737 if (prev_status == SDW_SLAVE_ALERT)
1738 break;
1739
a90def06
PLB
1740 attached_initializing = true;
1741
b0a9c37b
VK
1742 ret = sdw_initialize_slave(slave);
1743 if (ret)
1744 dev_err(bus->dev,
17ed5bef 1745 "Slave %d initialization failed: %d\n",
b0a9c37b
VK
1746 i, ret);
1747
1748 break;
1749
1750 default:
17ed5bef 1751 dev_err(bus->dev, "Invalid slave %d status:%d\n",
73ede046 1752 i, status[i]);
b0a9c37b
VK
1753 break;
1754 }
1755
1756 ret = sdw_update_slave_status(slave, status[i]);
1757 if (ret)
1758 dev_err(slave->bus->dev,
17ed5bef 1759 "Update Slave status failed:%d\n", ret);
a90def06
PLB
1760 if (attached_initializing)
1761 complete(&slave->initialization_complete);
b0a9c37b
VK
1762 }
1763
1764 return ret;
1765}
1766EXPORT_SYMBOL(sdw_handle_slave_status);
3ab2ca40
PLB
1767
1768void sdw_clear_slave_status(struct sdw_bus *bus, u32 request)
1769{
1770 struct sdw_slave *slave;
1771 int i;
1772
1773 /* Check all non-zero devices */
1774 for (i = 1; i <= SDW_MAX_DEVICES; i++) {
1775 mutex_lock(&bus->bus_lock);
1776 if (test_bit(i, bus->assigned) == false) {
1777 mutex_unlock(&bus->bus_lock);
1778 continue;
1779 }
1780 mutex_unlock(&bus->bus_lock);
1781
1782 slave = sdw_get_slave(bus, i);
1783 if (!slave)
1784 continue;
1785
c2819e19 1786 if (slave->status != SDW_SLAVE_UNATTACHED) {
3ab2ca40 1787 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
c2819e19
PLB
1788 slave->first_interrupt_done = false;
1789 }
3ab2ca40
PLB
1790
1791 /* keep track of request, used in pm_runtime resume */
1792 slave->unattach_request = request;
1793 }
1794}
1795EXPORT_SYMBOL(sdw_clear_slave_status);