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23859465 PLB |
1 | /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */ |
2 | /* Copyright(c) 2015-17 Intel Corporation. */ | |
7c3cd189 VK |
3 | |
4 | #ifndef __SDW_BUS_H | |
5 | #define __SDW_BUS_H | |
6 | ||
ce6e74d0 | 7 | #define DEFAULT_BANK_SWITCH_TIMEOUT 3000 |
2140b66b | 8 | #define DEFAULT_PROBE_TIMEOUT 2000 |
ce6e74d0 | 9 | |
7c3cd189 VK |
10 | #if IS_ENABLED(CONFIG_ACPI) |
11 | int sdw_acpi_find_slaves(struct sdw_bus *bus); | |
12 | #else | |
13 | static inline int sdw_acpi_find_slaves(struct sdw_bus *bus) | |
14 | { | |
15 | return -ENOTSUPP; | |
16 | } | |
17 | #endif | |
18 | ||
a2e48458 | 19 | int sdw_of_find_slaves(struct sdw_bus *bus); |
7c3cd189 | 20 | void sdw_extract_slave_id(struct sdw_bus *bus, |
806a11f0 | 21 | u64 addr, struct sdw_slave_id *id); |
fcb9d730 SK |
22 | int sdw_slave_add(struct sdw_bus *bus, struct sdw_slave_id *id, |
23 | struct fwnode_handle *fwnode); | |
7ceaa40b PLB |
24 | int sdw_master_device_add(struct sdw_bus *bus, struct device *parent, |
25 | struct fwnode_handle *fwnode); | |
26 | int sdw_master_device_del(struct sdw_bus *bus); | |
7c3cd189 | 27 | |
bf03473d PLB |
28 | #ifdef CONFIG_DEBUG_FS |
29 | void sdw_bus_debugfs_init(struct sdw_bus *bus); | |
30 | void sdw_bus_debugfs_exit(struct sdw_bus *bus); | |
31 | void sdw_slave_debugfs_init(struct sdw_slave *slave); | |
32 | void sdw_slave_debugfs_exit(struct sdw_slave *slave); | |
33 | void sdw_debugfs_init(void); | |
34 | void sdw_debugfs_exit(void); | |
35 | #else | |
36 | static inline void sdw_bus_debugfs_init(struct sdw_bus *bus) {} | |
37 | static inline void sdw_bus_debugfs_exit(struct sdw_bus *bus) {} | |
38 | static inline void sdw_slave_debugfs_init(struct sdw_slave *slave) {} | |
39 | static inline void sdw_slave_debugfs_exit(struct sdw_slave *slave) {} | |
40 | static inline void sdw_debugfs_init(void) {} | |
41 | static inline void sdw_debugfs_exit(void) {} | |
42 | #endif | |
43 | ||
9d715fa0 VK |
44 | enum { |
45 | SDW_MSG_FLAG_READ = 0, | |
46 | SDW_MSG_FLAG_WRITE, | |
47 | }; | |
48 | ||
49 | /** | |
50 | * struct sdw_msg - Message structure | |
51 | * @addr: Register address accessed in the Slave | |
52 | * @len: number of messages | |
53 | * @dev_num: Slave device number | |
54 | * @addr_page1: SCP address page 1 Slave register | |
55 | * @addr_page2: SCP address page 2 Slave register | |
56 | * @flags: transfer flags, indicate if xfer is read or write | |
57 | * @buf: message data buffer | |
58 | * @ssp_sync: Send message at SSP (Stream Synchronization Point) | |
59 | * @page: address requires paging | |
60 | */ | |
61 | struct sdw_msg { | |
62 | u16 addr; | |
63 | u16 len; | |
64 | u8 dev_num; | |
65 | u8 addr_page1; | |
66 | u8 addr_page2; | |
67 | u8 flags; | |
68 | u8 *buf; | |
69 | bool ssp_sync; | |
70 | bool page; | |
71 | }; | |
72 | ||
99b8a5d6 | 73 | #define SDW_DOUBLE_RATE_FACTOR 2 |
9026118f | 74 | #define SDW_STRM_RATE_GROUPING 1 |
99b8a5d6 | 75 | |
fe4b70f2 PLB |
76 | extern int sdw_rows[SDW_FRAME_ROWS]; |
77 | extern int sdw_cols[SDW_FRAME_COLS]; | |
78 | ||
79 | int sdw_find_row_index(int row); | |
80 | int sdw_find_col_index(int col); | |
99b8a5d6 | 81 | |
bbe7379d SK |
82 | /** |
83 | * sdw_port_runtime: Runtime port parameters for Master or Slave | |
84 | * | |
85 | * @num: Port number. For audio streams, valid port number ranges from | |
86 | * [1,14] | |
87 | * @ch_mask: Channel mask | |
88 | * @transport_params: Transport parameters | |
89 | * @port_params: Port parameters | |
90 | * @port_node: List node for Master or Slave port_list | |
91 | * | |
92 | * SoundWire spec has no mention of ports for Master interface but the | |
93 | * concept is logically extended. | |
94 | */ | |
95 | struct sdw_port_runtime { | |
96 | int num; | |
97 | int ch_mask; | |
98 | struct sdw_transport_params transport_params; | |
99 | struct sdw_port_params port_params; | |
100 | struct list_head port_node; | |
101 | }; | |
102 | ||
89e59053 SK |
103 | /** |
104 | * sdw_slave_runtime: Runtime Stream parameters for Slave | |
105 | * | |
106 | * @slave: Slave handle | |
107 | * @direction: Data direction for Slave | |
108 | * @ch_count: Number of channels handled by the Slave for | |
109 | * this stream | |
110 | * @m_rt_node: sdw_master_runtime list node | |
bbe7379d | 111 | * @port_list: List of Slave Ports configured for this stream |
89e59053 SK |
112 | */ |
113 | struct sdw_slave_runtime { | |
114 | struct sdw_slave *slave; | |
115 | enum sdw_data_direction direction; | |
116 | unsigned int ch_count; | |
117 | struct list_head m_rt_node; | |
bbe7379d | 118 | struct list_head port_list; |
89e59053 SK |
119 | }; |
120 | ||
121 | /** | |
122 | * sdw_master_runtime: Runtime stream parameters for Master | |
123 | * | |
124 | * @bus: Bus handle | |
125 | * @stream: Stream runtime handle | |
126 | * @direction: Data direction for Master | |
127 | * @ch_count: Number of channels handled by the Master for | |
128 | * this stream, can be zero. | |
129 | * @slave_rt_list: Slave runtime list | |
bbe7379d | 130 | * @port_list: List of Master Ports configured for this stream, can be zero. |
0c4a1049 | 131 | * @stream_node: sdw_stream_runtime master_list node |
89e59053 SK |
132 | * @bus_node: sdw_bus m_rt_list node |
133 | */ | |
134 | struct sdw_master_runtime { | |
135 | struct sdw_bus *bus; | |
136 | struct sdw_stream_runtime *stream; | |
137 | enum sdw_data_direction direction; | |
138 | unsigned int ch_count; | |
139 | struct list_head slave_rt_list; | |
bbe7379d | 140 | struct list_head port_list; |
0c4a1049 | 141 | struct list_head stream_node; |
89e59053 SK |
142 | struct list_head bus_node; |
143 | }; | |
144 | ||
f8101c74 | 145 | struct sdw_dpn_prop *sdw_get_slave_dpn_prop(struct sdw_slave *slave, |
806a11f0 PLB |
146 | enum sdw_data_direction direction, |
147 | unsigned int port_num); | |
79df15b7 | 148 | int sdw_configure_dpn_intr(struct sdw_slave *slave, int port, |
806a11f0 | 149 | bool enable, int mask); |
f8101c74 | 150 | |
9d715fa0 VK |
151 | int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg); |
152 | int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg, | |
806a11f0 | 153 | struct sdw_defer *defer); |
9d715fa0 | 154 | |
b0a9c37b VK |
155 | #define SDW_READ_INTR_CLEAR_RETRY 10 |
156 | ||
9d715fa0 | 157 | int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave, |
806a11f0 | 158 | u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf); |
9d715fa0 | 159 | |
9026118f BL |
160 | /* Retrieve and return channel count from channel mask */ |
161 | static inline int sdw_ch_mask_to_ch(int ch_mask) | |
162 | { | |
163 | int c = 0; | |
164 | ||
165 | for (c = 0; ch_mask; ch_mask >>= 1) | |
166 | c += ch_mask & 1; | |
167 | ||
168 | return c; | |
169 | } | |
170 | ||
171 | /* Fill transport parameter data structure */ | |
172 | static inline void sdw_fill_xport_params(struct sdw_transport_params *params, | |
173 | int port_num, bool grp_ctrl_valid, | |
174 | int grp_ctrl, int sample_int, | |
175 | int off1, int off2, | |
176 | int hstart, int hstop, | |
177 | int pack_mode, int lane_ctrl) | |
178 | { | |
179 | params->port_num = port_num; | |
180 | params->blk_grp_ctrl_valid = grp_ctrl_valid; | |
181 | params->blk_grp_ctrl = grp_ctrl; | |
182 | params->sample_interval = sample_int; | |
183 | params->offset1 = off1; | |
184 | params->offset2 = off2; | |
185 | params->hstart = hstart; | |
186 | params->hstop = hstop; | |
187 | params->blk_pkg_mode = pack_mode; | |
188 | params->lane_ctrl = lane_ctrl; | |
189 | } | |
190 | ||
191 | /* Fill port parameter data structure */ | |
192 | static inline void sdw_fill_port_params(struct sdw_port_params *params, | |
193 | int port_num, int bps, | |
194 | int flow_mode, int data_mode) | |
195 | { | |
196 | params->num = port_num; | |
197 | params->bps = bps; | |
198 | params->flow_mode = flow_mode; | |
199 | params->data_mode = data_mode; | |
200 | } | |
201 | ||
d52d7a1b | 202 | /* Read-Modify-Write Slave register */ |
9026118f | 203 | static inline int sdw_update(struct sdw_slave *slave, u32 addr, u8 mask, u8 val) |
d52d7a1b SK |
204 | { |
205 | int tmp; | |
206 | ||
207 | tmp = sdw_read(slave, addr); | |
208 | if (tmp < 0) | |
209 | return tmp; | |
210 | ||
211 | tmp = (tmp & ~mask) | val; | |
212 | return sdw_write(slave, addr, tmp); | |
213 | } | |
214 | ||
a350aff4 PLB |
215 | /* broadcast read/write for tests */ |
216 | int sdw_bread_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr); | |
217 | int sdw_bwrite_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value); | |
218 | ||
3ab2ca40 PLB |
219 | /* |
220 | * At the moment we only track Master-initiated hw_reset. | |
221 | * Additional fields can be added as needed | |
222 | */ | |
223 | #define SDW_UNATTACH_REQUEST_MASTER_RESET BIT(0) | |
224 | ||
225 | void sdw_clear_slave_status(struct sdw_bus *bus, u32 request); | |
bcac5902 | 226 | int sdw_slave_modalias(const struct sdw_slave *slave, char *buf, size_t size); |
3ab2ca40 | 227 | |
7c3cd189 | 228 | #endif /* __SDW_BUS_H */ |