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89e59053
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1// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2// Copyright(c) 2015-18 Intel Corporation.
3
4/*
5 * stream.c - SoundWire Bus stream operations.
6 */
7
8#include <linux/delay.h>
9#include <linux/device.h>
10#include <linux/init.h>
11#include <linux/module.h>
12#include <linux/mod_devicetable.h>
13#include <linux/slab.h>
f8101c74 14#include <linux/soundwire/sdw_registers.h>
89e59053 15#include <linux/soundwire/sdw.h>
4550569b 16#include <sound/soc.h>
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17#include "bus.h"
18
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19/*
20 * Array of supported rows and columns as per MIPI SoundWire Specification 1.1
21 *
22 * The rows are arranged as per the array index value programmed
23 * in register. The index 15 has dummy value 0 in order to fill hole.
24 */
fe4b70f2 25int sdw_rows[SDW_FRAME_ROWS] = {48, 50, 60, 64, 75, 80, 125, 147,
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26 96, 100, 120, 128, 150, 160, 250, 0,
27 192, 200, 240, 256, 72, 144, 90, 180};
9026118f 28EXPORT_SYMBOL(sdw_rows);
99b8a5d6 29
fe4b70f2 30int sdw_cols[SDW_FRAME_COLS] = {2, 4, 6, 8, 10, 12, 14, 16};
9026118f 31EXPORT_SYMBOL(sdw_cols);
99b8a5d6 32
fe4b70f2 33int sdw_find_col_index(int col)
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34{
35 int i;
36
37 for (i = 0; i < SDW_FRAME_COLS; i++) {
fe4b70f2 38 if (sdw_cols[i] == col)
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39 return i;
40 }
41
42 pr_warn("Requested column not found, selecting lowest column no: 2\n");
43 return 0;
44}
fe4b70f2 45EXPORT_SYMBOL(sdw_find_col_index);
99b8a5d6 46
fe4b70f2 47int sdw_find_row_index(int row)
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48{
49 int i;
50
51 for (i = 0; i < SDW_FRAME_ROWS; i++) {
fe4b70f2 52 if (sdw_rows[i] == row)
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53 return i;
54 }
55
56 pr_warn("Requested row not found, selecting lowest row no: 48\n");
57 return 0;
58}
fe4b70f2 59EXPORT_SYMBOL(sdw_find_row_index);
897fe40e 60
f8101c74 61static int _sdw_program_slave_port_params(struct sdw_bus *bus,
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62 struct sdw_slave *slave,
63 struct sdw_transport_params *t_params,
64 enum sdw_dpn_type type)
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65{
66 u32 addr1, addr2, addr3, addr4;
67 int ret;
68 u16 wbuf;
69
70 if (bus->params.next_bank) {
71 addr1 = SDW_DPN_OFFSETCTRL2_B1(t_params->port_num);
72 addr2 = SDW_DPN_BLOCKCTRL3_B1(t_params->port_num);
73 addr3 = SDW_DPN_SAMPLECTRL2_B1(t_params->port_num);
74 addr4 = SDW_DPN_HCTRL_B1(t_params->port_num);
75 } else {
76 addr1 = SDW_DPN_OFFSETCTRL2_B0(t_params->port_num);
77 addr2 = SDW_DPN_BLOCKCTRL3_B0(t_params->port_num);
78 addr3 = SDW_DPN_SAMPLECTRL2_B0(t_params->port_num);
79 addr4 = SDW_DPN_HCTRL_B0(t_params->port_num);
80 }
81
82 /* Program DPN_OffsetCtrl2 registers */
83 ret = sdw_write(slave, addr1, t_params->offset2);
84 if (ret < 0) {
17ed5bef 85 dev_err(bus->dev, "DPN_OffsetCtrl2 register write failed\n");
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86 return ret;
87 }
88
89 /* Program DPN_BlockCtrl3 register */
90 ret = sdw_write(slave, addr2, t_params->blk_pkg_mode);
91 if (ret < 0) {
17ed5bef 92 dev_err(bus->dev, "DPN_BlockCtrl3 register write failed\n");
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93 return ret;
94 }
95
96 /*
97 * Data ports are FULL, SIMPLE and REDUCED. This function handles
7d3b3cdf 98 * FULL and REDUCED only and beyond this point only FULL is
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99 * handled, so bail out if we are not FULL data port type
100 */
101 if (type != SDW_DPN_FULL)
102 return ret;
103
104 /* Program DPN_SampleCtrl2 register */
41ff9174 105 wbuf = FIELD_GET(SDW_DPN_SAMPLECTRL_HIGH, t_params->sample_interval - 1);
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106
107 ret = sdw_write(slave, addr3, wbuf);
108 if (ret < 0) {
17ed5bef 109 dev_err(bus->dev, "DPN_SampleCtrl2 register write failed\n");
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110 return ret;
111 }
112
113 /* Program DPN_HCtrl register */
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114 wbuf = FIELD_PREP(SDW_DPN_HCTRL_HSTART, t_params->hstart);
115 wbuf |= FIELD_PREP(SDW_DPN_HCTRL_HSTOP, t_params->hstop);
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116
117 ret = sdw_write(slave, addr4, wbuf);
118 if (ret < 0)
17ed5bef 119 dev_err(bus->dev, "DPN_HCtrl register write failed\n");
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120
121 return ret;
122}
123
124static int sdw_program_slave_port_params(struct sdw_bus *bus,
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125 struct sdw_slave_runtime *s_rt,
126 struct sdw_port_runtime *p_rt)
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127{
128 struct sdw_transport_params *t_params = &p_rt->transport_params;
129 struct sdw_port_params *p_params = &p_rt->port_params;
130 struct sdw_slave_prop *slave_prop = &s_rt->slave->prop;
131 u32 addr1, addr2, addr3, addr4, addr5, addr6;
132 struct sdw_dpn_prop *dpn_prop;
133 int ret;
134 u8 wbuf;
135
136 dpn_prop = sdw_get_slave_dpn_prop(s_rt->slave,
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137 s_rt->direction,
138 t_params->port_num);
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139 if (!dpn_prop)
140 return -EINVAL;
141
142 addr1 = SDW_DPN_PORTCTRL(t_params->port_num);
143 addr2 = SDW_DPN_BLOCKCTRL1(t_params->port_num);
144
145 if (bus->params.next_bank) {
146 addr3 = SDW_DPN_SAMPLECTRL1_B1(t_params->port_num);
147 addr4 = SDW_DPN_OFFSETCTRL1_B1(t_params->port_num);
148 addr5 = SDW_DPN_BLOCKCTRL2_B1(t_params->port_num);
149 addr6 = SDW_DPN_LANECTRL_B1(t_params->port_num);
150
151 } else {
152 addr3 = SDW_DPN_SAMPLECTRL1_B0(t_params->port_num);
153 addr4 = SDW_DPN_OFFSETCTRL1_B0(t_params->port_num);
154 addr5 = SDW_DPN_BLOCKCTRL2_B0(t_params->port_num);
155 addr6 = SDW_DPN_LANECTRL_B0(t_params->port_num);
156 }
157
158 /* Program DPN_PortCtrl register */
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159 wbuf = FIELD_PREP(SDW_DPN_PORTCTRL_DATAMODE, p_params->data_mode);
160 wbuf |= FIELD_PREP(SDW_DPN_PORTCTRL_FLOWMODE, p_params->flow_mode);
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161
162 ret = sdw_update(s_rt->slave, addr1, 0xF, wbuf);
163 if (ret < 0) {
164 dev_err(&s_rt->slave->dev,
17ed5bef 165 "DPN_PortCtrl register write failed for port %d\n",
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166 t_params->port_num);
167 return ret;
168 }
169
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170 if (!dpn_prop->read_only_wordlength) {
171 /* Program DPN_BlockCtrl1 register */
172 ret = sdw_write(s_rt->slave, addr2, (p_params->bps - 1));
173 if (ret < 0) {
174 dev_err(&s_rt->slave->dev,
175 "DPN_BlockCtrl1 register write failed for port %d\n",
176 t_params->port_num);
177 return ret;
178 }
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179 }
180
181 /* Program DPN_SampleCtrl1 register */
182 wbuf = (t_params->sample_interval - 1) & SDW_DPN_SAMPLECTRL_LOW;
183 ret = sdw_write(s_rt->slave, addr3, wbuf);
184 if (ret < 0) {
185 dev_err(&s_rt->slave->dev,
17ed5bef 186 "DPN_SampleCtrl1 register write failed for port %d\n",
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187 t_params->port_num);
188 return ret;
189 }
190
191 /* Program DPN_OffsetCtrl1 registers */
192 ret = sdw_write(s_rt->slave, addr4, t_params->offset1);
193 if (ret < 0) {
194 dev_err(&s_rt->slave->dev,
17ed5bef 195 "DPN_OffsetCtrl1 register write failed for port %d\n",
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196 t_params->port_num);
197 return ret;
198 }
199
200 /* Program DPN_BlockCtrl2 register*/
201 if (t_params->blk_grp_ctrl_valid) {
202 ret = sdw_write(s_rt->slave, addr5, t_params->blk_grp_ctrl);
203 if (ret < 0) {
204 dev_err(&s_rt->slave->dev,
17ed5bef 205 "DPN_BlockCtrl2 reg write failed for port %d\n",
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206 t_params->port_num);
207 return ret;
208 }
209 }
210
211 /* program DPN_LaneCtrl register */
212 if (slave_prop->lane_control_support) {
213 ret = sdw_write(s_rt->slave, addr6, t_params->lane_ctrl);
214 if (ret < 0) {
215 dev_err(&s_rt->slave->dev,
17ed5bef 216 "DPN_LaneCtrl register write failed for port %d\n",
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217 t_params->port_num);
218 return ret;
219 }
220 }
221
222 if (dpn_prop->type != SDW_DPN_SIMPLE) {
223 ret = _sdw_program_slave_port_params(bus, s_rt->slave,
1fe74a5e 224 t_params, dpn_prop->type);
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225 if (ret < 0)
226 dev_err(&s_rt->slave->dev,
17ed5bef 227 "Transport reg write failed for port: %d\n",
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228 t_params->port_num);
229 }
230
231 return ret;
232}
233
234static int sdw_program_master_port_params(struct sdw_bus *bus,
1fe74a5e 235 struct sdw_port_runtime *p_rt)
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236{
237 int ret;
238
239 /*
240 * we need to set transport and port parameters for the port.
7d3b3cdf 241 * Transport parameters refers to the sample interval, offsets and
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242 * hstart/stop etc of the data. Port parameters refers to word
243 * length, flow mode etc of the port
244 */
245 ret = bus->port_ops->dpn_set_port_transport_params(bus,
246 &p_rt->transport_params,
247 bus->params.next_bank);
248 if (ret < 0)
249 return ret;
250
251 return bus->port_ops->dpn_set_port_params(bus,
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252 &p_rt->port_params,
253 bus->params.next_bank);
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254}
255
256/**
257 * sdw_program_port_params() - Programs transport parameters of Master(s)
258 * and Slave(s)
259 *
260 * @m_rt: Master stream runtime
261 */
262static int sdw_program_port_params(struct sdw_master_runtime *m_rt)
263{
264 struct sdw_slave_runtime *s_rt = NULL;
265 struct sdw_bus *bus = m_rt->bus;
266 struct sdw_port_runtime *p_rt;
267 int ret = 0;
268
269 /* Program transport & port parameters for Slave(s) */
270 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
271 list_for_each_entry(p_rt, &s_rt->port_list, port_node) {
272 ret = sdw_program_slave_port_params(bus, s_rt, p_rt);
273 if (ret < 0)
274 return ret;
275 }
276 }
277
278 /* Program transport & port parameters for Master(s) */
279 list_for_each_entry(p_rt, &m_rt->port_list, port_node) {
280 ret = sdw_program_master_port_params(bus, p_rt);
281 if (ret < 0)
282 return ret;
283 }
284
285 return 0;
286}
287
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288/**
289 * sdw_enable_disable_slave_ports: Enable/disable slave data port
290 *
291 * @bus: bus instance
292 * @s_rt: slave runtime
293 * @p_rt: port runtime
294 * @en: enable or disable operation
295 *
296 * This function only sets the enable/disable bits in the relevant bank, the
297 * actual enable/disable is done with a bank switch
298 */
299static int sdw_enable_disable_slave_ports(struct sdw_bus *bus,
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300 struct sdw_slave_runtime *s_rt,
301 struct sdw_port_runtime *p_rt,
302 bool en)
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303{
304 struct sdw_transport_params *t_params = &p_rt->transport_params;
305 u32 addr;
306 int ret;
307
308 if (bus->params.next_bank)
309 addr = SDW_DPN_CHANNELEN_B1(p_rt->num);
310 else
311 addr = SDW_DPN_CHANNELEN_B0(p_rt->num);
312
313 /*
314 * Since bus doesn't support sharing a port across two streams,
315 * it is safe to reset this register
316 */
317 if (en)
0b43fef9 318 ret = sdw_write(s_rt->slave, addr, p_rt->ch_mask);
79df15b7 319 else
0b43fef9 320 ret = sdw_write(s_rt->slave, addr, 0x0);
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321
322 if (ret < 0)
323 dev_err(&s_rt->slave->dev,
17ed5bef 324 "Slave chn_en reg write failed:%d port:%d\n",
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325 ret, t_params->port_num);
326
327 return ret;
328}
329
330static int sdw_enable_disable_master_ports(struct sdw_master_runtime *m_rt,
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331 struct sdw_port_runtime *p_rt,
332 bool en)
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333{
334 struct sdw_transport_params *t_params = &p_rt->transport_params;
335 struct sdw_bus *bus = m_rt->bus;
336 struct sdw_enable_ch enable_ch;
a25eab29 337 int ret;
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338
339 enable_ch.port_num = p_rt->num;
340 enable_ch.ch_mask = p_rt->ch_mask;
341 enable_ch.enable = en;
342
343 /* Perform Master port channel(s) enable/disable */
344 if (bus->port_ops->dpn_port_enable_ch) {
345 ret = bus->port_ops->dpn_port_enable_ch(bus,
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346 &enable_ch,
347 bus->params.next_bank);
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348 if (ret < 0) {
349 dev_err(bus->dev,
17ed5bef 350 "Master chn_en write failed:%d port:%d\n",
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351 ret, t_params->port_num);
352 return ret;
353 }
354 } else {
355 dev_err(bus->dev,
356 "dpn_port_enable_ch not supported, %s failed\n",
357 en ? "enable" : "disable");
358 return -EINVAL;
359 }
360
361 return 0;
362}
363
364/**
365 * sdw_enable_disable_ports() - Enable/disable port(s) for Master and
366 * Slave(s)
367 *
368 * @m_rt: Master stream runtime
369 * @en: mode (enable/disable)
370 */
371static int sdw_enable_disable_ports(struct sdw_master_runtime *m_rt, bool en)
372{
373 struct sdw_port_runtime *s_port, *m_port;
3a0be1a6 374 struct sdw_slave_runtime *s_rt;
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375 int ret = 0;
376
377 /* Enable/Disable Slave port(s) */
378 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
379 list_for_each_entry(s_port, &s_rt->port_list, port_node) {
380 ret = sdw_enable_disable_slave_ports(m_rt->bus, s_rt,
1fe74a5e 381 s_port, en);
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382 if (ret < 0)
383 return ret;
384 }
385 }
386
387 /* Enable/Disable Master port(s) */
388 list_for_each_entry(m_port, &m_rt->port_list, port_node) {
389 ret = sdw_enable_disable_master_ports(m_rt, m_port, en);
390 if (ret < 0)
391 return ret;
392 }
393
394 return 0;
395}
396
397static int sdw_do_port_prep(struct sdw_slave_runtime *s_rt,
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398 struct sdw_prepare_ch prep_ch,
399 enum sdw_port_prep_ops cmd)
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400{
401 const struct sdw_slave_ops *ops = s_rt->slave->ops;
402 int ret;
403
404 if (ops->port_prep) {
405 ret = ops->port_prep(s_rt->slave, &prep_ch, cmd);
406 if (ret < 0) {
407 dev_err(&s_rt->slave->dev,
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408 "Slave Port Prep cmd %d failed: %d\n",
409 cmd, ret);
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410 return ret;
411 }
412 }
413
414 return 0;
415}
416
417static int sdw_prep_deprep_slave_ports(struct sdw_bus *bus,
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418 struct sdw_slave_runtime *s_rt,
419 struct sdw_port_runtime *p_rt,
420 bool prep)
79df15b7 421{
3a0be1a6 422 struct completion *port_ready;
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423 struct sdw_dpn_prop *dpn_prop;
424 struct sdw_prepare_ch prep_ch;
425 unsigned int time_left;
426 bool intr = false;
427 int ret = 0, val;
428 u32 addr;
429
430 prep_ch.num = p_rt->num;
431 prep_ch.ch_mask = p_rt->ch_mask;
432
433 dpn_prop = sdw_get_slave_dpn_prop(s_rt->slave,
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434 s_rt->direction,
435 prep_ch.num);
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436 if (!dpn_prop) {
437 dev_err(bus->dev,
17ed5bef 438 "Slave Port:%d properties not found\n", prep_ch.num);
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439 return -EINVAL;
440 }
441
442 prep_ch.prepare = prep;
443
444 prep_ch.bank = bus->params.next_bank;
445
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446 if (dpn_prop->imp_def_interrupts || !dpn_prop->simple_ch_prep_sm ||
447 bus->params.s_data_mode != SDW_PORT_DATA_MODE_NORMAL)
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448 intr = true;
449
450 /*
451 * Enable interrupt before Port prepare.
452 * For Port de-prepare, it is assumed that port
453 * was prepared earlier
454 */
455 if (prep && intr) {
456 ret = sdw_configure_dpn_intr(s_rt->slave, p_rt->num, prep,
8acbbfec 457 dpn_prop->imp_def_interrupts);
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458 if (ret < 0)
459 return ret;
460 }
461
462 /* Inform slave about the impending port prepare */
463 sdw_do_port_prep(s_rt, prep_ch, SDW_OPS_PORT_PRE_PREP);
464
465 /* Prepare Slave port implementing CP_SM */
466 if (!dpn_prop->simple_ch_prep_sm) {
467 addr = SDW_DPN_PREPARECTRL(p_rt->num);
468
469 if (prep)
0b43fef9 470 ret = sdw_write(s_rt->slave, addr, p_rt->ch_mask);
79df15b7 471 else
0b43fef9 472 ret = sdw_write(s_rt->slave, addr, 0x0);
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473
474 if (ret < 0) {
475 dev_err(&s_rt->slave->dev,
17ed5bef 476 "Slave prep_ctrl reg write failed\n");
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477 return ret;
478 }
479
480 /* Wait for completion on port ready */
481 port_ready = &s_rt->slave->port_ready[prep_ch.num];
482 time_left = wait_for_completion_timeout(port_ready,
483 msecs_to_jiffies(dpn_prop->ch_prep_timeout));
484
485 val = sdw_read(s_rt->slave, SDW_DPN_PREPARESTATUS(p_rt->num));
486 val &= p_rt->ch_mask;
487 if (!time_left || val) {
488 dev_err(&s_rt->slave->dev,
17ed5bef 489 "Chn prep failed for port:%d\n", prep_ch.num);
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490 return -ETIMEDOUT;
491 }
492 }
493
494 /* Inform slaves about ports prepared */
495 sdw_do_port_prep(s_rt, prep_ch, SDW_OPS_PORT_POST_PREP);
496
497 /* Disable interrupt after Port de-prepare */
498 if (!prep && intr)
499 ret = sdw_configure_dpn_intr(s_rt->slave, p_rt->num, prep,
8acbbfec 500 dpn_prop->imp_def_interrupts);
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501
502 return ret;
503}
504
505static int sdw_prep_deprep_master_ports(struct sdw_master_runtime *m_rt,
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506 struct sdw_port_runtime *p_rt,
507 bool prep)
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508{
509 struct sdw_transport_params *t_params = &p_rt->transport_params;
510 struct sdw_bus *bus = m_rt->bus;
511 const struct sdw_master_port_ops *ops = bus->port_ops;
512 struct sdw_prepare_ch prep_ch;
513 int ret = 0;
514
515 prep_ch.num = p_rt->num;
516 prep_ch.ch_mask = p_rt->ch_mask;
517 prep_ch.prepare = prep; /* Prepare/De-prepare */
518 prep_ch.bank = bus->params.next_bank;
519
520 /* Pre-prepare/Pre-deprepare port(s) */
521 if (ops->dpn_port_prep) {
522 ret = ops->dpn_port_prep(bus, &prep_ch);
523 if (ret < 0) {
17ed5bef 524 dev_err(bus->dev, "Port prepare failed for port:%d\n",
1fe74a5e 525 t_params->port_num);
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526 return ret;
527 }
528 }
529
530 return ret;
531}
532
533/**
534 * sdw_prep_deprep_ports() - Prepare/De-prepare port(s) for Master(s) and
535 * Slave(s)
536 *
537 * @m_rt: Master runtime handle
538 * @prep: Prepare or De-prepare
539 */
540static int sdw_prep_deprep_ports(struct sdw_master_runtime *m_rt, bool prep)
541{
3a0be1a6 542 struct sdw_slave_runtime *s_rt;
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543 struct sdw_port_runtime *p_rt;
544 int ret = 0;
545
546 /* Prepare/De-prepare Slave port(s) */
547 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
548 list_for_each_entry(p_rt, &s_rt->port_list, port_node) {
549 ret = sdw_prep_deprep_slave_ports(m_rt->bus, s_rt,
1fe74a5e 550 p_rt, prep);
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551 if (ret < 0)
552 return ret;
553 }
554 }
555
556 /* Prepare/De-prepare Master port(s) */
557 list_for_each_entry(p_rt, &m_rt->port_list, port_node) {
558 ret = sdw_prep_deprep_master_ports(m_rt, p_rt, prep);
559 if (ret < 0)
560 return ret;
561 }
562
563 return ret;
564}
565
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566/**
567 * sdw_notify_config() - Notify bus configuration
568 *
569 * @m_rt: Master runtime handle
570 *
571 * This function notifies the Master(s) and Slave(s) of the
572 * new bus configuration.
573 */
574static int sdw_notify_config(struct sdw_master_runtime *m_rt)
575{
576 struct sdw_slave_runtime *s_rt;
577 struct sdw_bus *bus = m_rt->bus;
578 struct sdw_slave *slave;
579 int ret = 0;
580
581 if (bus->ops->set_bus_conf) {
582 ret = bus->ops->set_bus_conf(bus, &bus->params);
583 if (ret < 0)
584 return ret;
585 }
586
587 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
588 slave = s_rt->slave;
589
590 if (slave->ops->bus_config) {
591 ret = slave->ops->bus_config(slave, &bus->params);
60835022 592 if (ret < 0) {
17ed5bef 593 dev_err(bus->dev, "Notify Slave: %d failed\n",
1fe74a5e 594 slave->dev_num);
60835022
RW
595 return ret;
596 }
99b8a5d6
SK
597 }
598 }
599
600 return ret;
601}
602
603/**
604 * sdw_program_params() - Program transport and port parameters for Master(s)
605 * and Slave(s)
606 *
607 * @bus: SDW bus instance
bfaa3549 608 * @prepare: true if sdw_program_params() is called by _prepare.
99b8a5d6 609 */
bfaa3549 610static int sdw_program_params(struct sdw_bus *bus, bool prepare)
99b8a5d6 611{
3a0be1a6 612 struct sdw_master_runtime *m_rt;
99b8a5d6
SK
613 int ret = 0;
614
615 list_for_each_entry(m_rt, &bus->m_rt_list, bus_node) {
bfaa3549
RW
616
617 /*
618 * this loop walks through all master runtimes for a
619 * bus, but the ports can only be configured while
620 * explicitly preparing a stream or handling an
621 * already-prepared stream otherwise.
622 */
623 if (!prepare &&
624 m_rt->stream->state == SDW_STREAM_CONFIGURED)
625 continue;
626
99b8a5d6
SK
627 ret = sdw_program_port_params(m_rt);
628 if (ret < 0) {
629 dev_err(bus->dev,
17ed5bef 630 "Program transport params failed: %d\n", ret);
99b8a5d6
SK
631 return ret;
632 }
633
634 ret = sdw_notify_config(m_rt);
635 if (ret < 0) {
62f0cec3
VK
636 dev_err(bus->dev,
637 "Notify bus config failed: %d\n", ret);
99b8a5d6
SK
638 return ret;
639 }
640
641 /* Enable port(s) on alternate bank for all active streams */
642 if (m_rt->stream->state != SDW_STREAM_ENABLED)
643 continue;
644
645 ret = sdw_enable_disable_ports(m_rt, true);
646 if (ret < 0) {
17ed5bef 647 dev_err(bus->dev, "Enable channel failed: %d\n", ret);
99b8a5d6
SK
648 return ret;
649 }
650 }
651
652 return ret;
653}
654
ce6e74d0 655static int sdw_bank_switch(struct sdw_bus *bus, int m_rt_count)
99b8a5d6
SK
656{
657 int col_index, row_index;
ce6e74d0 658 bool multi_link;
99b8a5d6 659 struct sdw_msg *wr_msg;
3a0be1a6
PLB
660 u8 *wbuf;
661 int ret;
99b8a5d6
SK
662 u16 addr;
663
664 wr_msg = kzalloc(sizeof(*wr_msg), GFP_KERNEL);
665 if (!wr_msg)
666 return -ENOMEM;
667
ce6e74d0
SN
668 bus->defer_msg.msg = wr_msg;
669
99b8a5d6
SK
670 wbuf = kzalloc(sizeof(*wbuf), GFP_KERNEL);
671 if (!wbuf) {
672 ret = -ENOMEM;
673 goto error_1;
674 }
675
676 /* Get row and column index to program register */
677 col_index = sdw_find_col_index(bus->params.col);
678 row_index = sdw_find_row_index(bus->params.row);
679 wbuf[0] = col_index | (row_index << 3);
680
681 if (bus->params.next_bank)
682 addr = SDW_SCP_FRAMECTRL_B1;
683 else
684 addr = SDW_SCP_FRAMECTRL_B0;
685
686 sdw_fill_msg(wr_msg, NULL, addr, 1, SDW_BROADCAST_DEV_NUM,
1fe74a5e 687 SDW_MSG_FLAG_WRITE, wbuf);
99b8a5d6
SK
688 wr_msg->ssp_sync = true;
689
ce6e74d0
SN
690 /*
691 * Set the multi_link flag only when both the hardware supports
063ff4e5 692 * and hardware-based sync is required
ce6e74d0 693 */
063ff4e5 694 multi_link = bus->multi_link && (m_rt_count >= bus->hw_sync_min_links);
ce6e74d0
SN
695
696 if (multi_link)
697 ret = sdw_transfer_defer(bus, wr_msg, &bus->defer_msg);
698 else
699 ret = sdw_transfer(bus, wr_msg);
700
99b8a5d6 701 if (ret < 0) {
17ed5bef 702 dev_err(bus->dev, "Slave frame_ctrl reg write failed\n");
99b8a5d6
SK
703 goto error;
704 }
705
ce6e74d0
SN
706 if (!multi_link) {
707 kfree(wr_msg);
708 kfree(wbuf);
709 bus->defer_msg.msg = NULL;
710 bus->params.curr_bank = !bus->params.curr_bank;
711 bus->params.next_bank = !bus->params.next_bank;
712 }
99b8a5d6
SK
713
714 return 0;
715
716error:
717 kfree(wbuf);
718error_1:
719 kfree(wr_msg);
3fbbf214 720 bus->defer_msg.msg = NULL;
99b8a5d6
SK
721 return ret;
722}
723
ce6e74d0
SN
724/**
725 * sdw_ml_sync_bank_switch: Multilink register bank switch
726 *
727 * @bus: SDW bus instance
728 *
729 * Caller function should free the buffers on error
730 */
731static int sdw_ml_sync_bank_switch(struct sdw_bus *bus)
732{
733 unsigned long time_left;
734
735 if (!bus->multi_link)
736 return 0;
737
738 /* Wait for completion of transfer */
739 time_left = wait_for_completion_timeout(&bus->defer_msg.complete,
740 bus->bank_switch_timeout);
741
742 if (!time_left) {
17ed5bef 743 dev_err(bus->dev, "Controller Timed out on bank switch\n");
ce6e74d0
SN
744 return -ETIMEDOUT;
745 }
746
747 bus->params.curr_bank = !bus->params.curr_bank;
748 bus->params.next_bank = !bus->params.next_bank;
749
750 if (bus->defer_msg.msg) {
751 kfree(bus->defer_msg.msg->buf);
752 kfree(bus->defer_msg.msg);
753 }
754
755 return 0;
756}
757
99b8a5d6
SK
758static int do_bank_switch(struct sdw_stream_runtime *stream)
759{
3a0be1a6 760 struct sdw_master_runtime *m_rt;
99b8a5d6 761 const struct sdw_master_ops *ops;
3a0be1a6 762 struct sdw_bus *bus;
ce6e74d0 763 bool multi_link = false;
063ff4e5 764 int m_rt_count;
99b8a5d6
SK
765 int ret = 0;
766
063ff4e5
PLB
767 m_rt_count = stream->m_rt_count;
768
48949722
VK
769 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
770 bus = m_rt->bus;
771 ops = bus->ops;
772
063ff4e5 773 if (bus->multi_link && m_rt_count >= bus->hw_sync_min_links) {
ce6e74d0
SN
774 multi_link = true;
775 mutex_lock(&bus->msg_lock);
776 }
777
48949722
VK
778 /* Pre-bank switch */
779 if (ops->pre_bank_switch) {
780 ret = ops->pre_bank_switch(bus);
781 if (ret < 0) {
782 dev_err(bus->dev,
17ed5bef 783 "Pre bank switch op failed: %d\n", ret);
ce6e74d0 784 goto msg_unlock;
48949722
VK
785 }
786 }
787
ce6e74d0
SN
788 /*
789 * Perform Bank switch operation.
790 * For multi link cases, the actual bank switch is
791 * synchronized across all Masters and happens later as a
792 * part of post_bank_switch ops.
793 */
063ff4e5 794 ret = sdw_bank_switch(bus, m_rt_count);
99b8a5d6 795 if (ret < 0) {
17ed5bef 796 dev_err(bus->dev, "Bank switch failed: %d\n", ret);
ce6e74d0 797 goto error;
99b8a5d6
SK
798 }
799 }
800
ce6e74d0
SN
801 /*
802 * For multi link cases, it is expected that the bank switch is
803 * triggered by the post_bank_switch for the first Master in the list
804 * and for the other Masters the post_bank_switch() should return doing
805 * nothing.
806 */
48949722
VK
807 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
808 bus = m_rt->bus;
809 ops = bus->ops;
99b8a5d6 810
48949722
VK
811 /* Post-bank switch */
812 if (ops->post_bank_switch) {
813 ret = ops->post_bank_switch(bus);
814 if (ret < 0) {
815 dev_err(bus->dev,
62f0cec3
VK
816 "Post bank switch op failed: %d\n",
817 ret);
ce6e74d0 818 goto error;
48949722 819 }
063ff4e5 820 } else if (multi_link) {
ce6e74d0 821 dev_err(bus->dev,
17ed5bef 822 "Post bank switch ops not implemented\n");
ce6e74d0
SN
823 goto error;
824 }
825
826 /* Set the bank switch timeout to default, if not set */
827 if (!bus->bank_switch_timeout)
828 bus->bank_switch_timeout = DEFAULT_BANK_SWITCH_TIMEOUT;
829
830 /* Check if bank switch was successful */
831 ret = sdw_ml_sync_bank_switch(bus);
832 if (ret < 0) {
833 dev_err(bus->dev,
17ed5bef 834 "multi link bank switch failed: %d\n", ret);
ce6e74d0
SN
835 goto error;
836 }
837
063ff4e5 838 if (multi_link)
9315d904 839 mutex_unlock(&bus->msg_lock);
ce6e74d0
SN
840 }
841
842 return ret;
843
844error:
845 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
ce6e74d0 846 bus = m_rt->bus;
3fbbf214
TR
847 if (bus->defer_msg.msg) {
848 kfree(bus->defer_msg.msg->buf);
849 kfree(bus->defer_msg.msg);
850 }
ce6e74d0
SN
851 }
852
853msg_unlock:
854
855 if (multi_link) {
856 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
857 bus = m_rt->bus;
858 if (mutex_is_locked(&bus->msg_lock))
859 mutex_unlock(&bus->msg_lock);
99b8a5d6
SK
860 }
861 }
862
863 return ret;
864}
865
89e59053
SK
866/**
867 * sdw_release_stream() - Free the assigned stream runtime
868 *
869 * @stream: SoundWire stream runtime
870 *
871 * sdw_release_stream should be called only once per stream
872 */
873void sdw_release_stream(struct sdw_stream_runtime *stream)
874{
875 kfree(stream);
876}
877EXPORT_SYMBOL(sdw_release_stream);
878
879/**
880 * sdw_alloc_stream() - Allocate and return stream runtime
881 *
882 * @stream_name: SoundWire stream name
883 *
884 * Allocates a SoundWire stream runtime instance.
885 * sdw_alloc_stream should be called only once per stream. Typically
886 * invoked from ALSA/ASoC machine/platform driver.
887 */
dfcff3f8 888struct sdw_stream_runtime *sdw_alloc_stream(const char *stream_name)
89e59053
SK
889{
890 struct sdw_stream_runtime *stream;
891
892 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
893 if (!stream)
894 return NULL;
895
896 stream->name = stream_name;
0c4a1049 897 INIT_LIST_HEAD(&stream->master_list);
89e59053 898 stream->state = SDW_STREAM_ALLOCATED;
9b5c132a 899 stream->m_rt_count = 0;
89e59053
SK
900
901 return stream;
902}
903EXPORT_SYMBOL(sdw_alloc_stream);
904
48949722
VK
905static struct sdw_master_runtime
906*sdw_find_master_rt(struct sdw_bus *bus,
1fe74a5e 907 struct sdw_stream_runtime *stream)
48949722 908{
3a0be1a6 909 struct sdw_master_runtime *m_rt;
48949722
VK
910
911 /* Retrieve Bus handle if already available */
912 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
913 if (m_rt->bus == bus)
914 return m_rt;
915 }
916
917 return NULL;
918}
919
89e59053
SK
920/**
921 * sdw_alloc_master_rt() - Allocates and initialize Master runtime handle
922 *
923 * @bus: SDW bus instance
924 * @stream_config: Stream configuration
925 * @stream: Stream runtime handle.
926 *
927 * This function is to be called with bus_lock held.
928 */
929static struct sdw_master_runtime
930*sdw_alloc_master_rt(struct sdw_bus *bus,
1fe74a5e
PLB
931 struct sdw_stream_config *stream_config,
932 struct sdw_stream_runtime *stream)
89e59053
SK
933{
934 struct sdw_master_runtime *m_rt;
935
89e59053
SK
936 /*
937 * check if Master is already allocated (as a result of Slave adding
938 * it first), if so skip allocation and go to configure
939 */
48949722 940 m_rt = sdw_find_master_rt(bus, stream);
89e59053
SK
941 if (m_rt)
942 goto stream_config;
943
944 m_rt = kzalloc(sizeof(*m_rt), GFP_KERNEL);
945 if (!m_rt)
946 return NULL;
947
948 /* Initialization of Master runtime handle */
bbe7379d 949 INIT_LIST_HEAD(&m_rt->port_list);
89e59053 950 INIT_LIST_HEAD(&m_rt->slave_rt_list);
48949722 951 list_add_tail(&m_rt->stream_node, &stream->master_list);
89e59053
SK
952
953 list_add_tail(&m_rt->bus_node, &bus->m_rt_list);
954
955stream_config:
956 m_rt->ch_count = stream_config->ch_count;
957 m_rt->bus = bus;
958 m_rt->stream = stream;
959 m_rt->direction = stream_config->direction;
960
961 return m_rt;
962}
963
964/**
965 * sdw_alloc_slave_rt() - Allocate and initialize Slave runtime handle.
966 *
967 * @slave: Slave handle
968 * @stream_config: Stream configuration
969 * @stream: Stream runtime handle
970 *
971 * This function is to be called with bus_lock held.
972 */
973static struct sdw_slave_runtime
974*sdw_alloc_slave_rt(struct sdw_slave *slave,
1fe74a5e
PLB
975 struct sdw_stream_config *stream_config,
976 struct sdw_stream_runtime *stream)
89e59053 977{
3a0be1a6 978 struct sdw_slave_runtime *s_rt;
89e59053
SK
979
980 s_rt = kzalloc(sizeof(*s_rt), GFP_KERNEL);
981 if (!s_rt)
982 return NULL;
983
bbe7379d 984 INIT_LIST_HEAD(&s_rt->port_list);
89e59053
SK
985 s_rt->ch_count = stream_config->ch_count;
986 s_rt->direction = stream_config->direction;
987 s_rt->slave = slave;
988
989 return s_rt;
990}
991
bbe7379d 992static void sdw_master_port_release(struct sdw_bus *bus,
1fe74a5e 993 struct sdw_master_runtime *m_rt)
bbe7379d
SK
994{
995 struct sdw_port_runtime *p_rt, *_p_rt;
996
1fe74a5e 997 list_for_each_entry_safe(p_rt, _p_rt, &m_rt->port_list, port_node) {
bbe7379d
SK
998 list_del(&p_rt->port_node);
999 kfree(p_rt);
1000 }
1001}
1002
1003static void sdw_slave_port_release(struct sdw_bus *bus,
1fe74a5e
PLB
1004 struct sdw_slave *slave,
1005 struct sdw_stream_runtime *stream)
bbe7379d
SK
1006{
1007 struct sdw_port_runtime *p_rt, *_p_rt;
48949722 1008 struct sdw_master_runtime *m_rt;
bbe7379d
SK
1009 struct sdw_slave_runtime *s_rt;
1010
48949722
VK
1011 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1012 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
48949722
VK
1013 if (s_rt->slave != slave)
1014 continue;
1015
1016 list_for_each_entry_safe(p_rt, _p_rt,
1fe74a5e 1017 &s_rt->port_list, port_node) {
48949722
VK
1018 list_del(&p_rt->port_node);
1019 kfree(p_rt);
1020 }
bbe7379d
SK
1021 }
1022 }
1023}
1024
89e59053
SK
1025/**
1026 * sdw_release_slave_stream() - Free Slave(s) runtime handle
1027 *
1028 * @slave: Slave handle.
1029 * @stream: Stream runtime handle.
1030 *
1031 * This function is to be called with bus_lock held.
1032 */
1033static void sdw_release_slave_stream(struct sdw_slave *slave,
1fe74a5e 1034 struct sdw_stream_runtime *stream)
89e59053
SK
1035{
1036 struct sdw_slave_runtime *s_rt, *_s_rt;
48949722 1037 struct sdw_master_runtime *m_rt;
89e59053 1038
48949722
VK
1039 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1040 /* Retrieve Slave runtime handle */
1041 list_for_each_entry_safe(s_rt, _s_rt,
1fe74a5e 1042 &m_rt->slave_rt_list, m_rt_node) {
48949722
VK
1043 if (s_rt->slave == slave) {
1044 list_del(&s_rt->m_rt_node);
1045 kfree(s_rt);
1046 return;
1047 }
89e59053
SK
1048 }
1049 }
1050}
1051
1052/**
1053 * sdw_release_master_stream() - Free Master runtime handle
1054 *
48949722 1055 * @m_rt: Master runtime node
89e59053
SK
1056 * @stream: Stream runtime handle.
1057 *
1058 * This function is to be called with bus_lock held
1059 * It frees the Master runtime handle and associated Slave(s) runtime
1060 * handle. If this is called first then sdw_release_slave_stream() will have
1061 * no effect as Slave(s) runtime handle would already be freed up.
1062 */
48949722 1063static void sdw_release_master_stream(struct sdw_master_runtime *m_rt,
1fe74a5e 1064 struct sdw_stream_runtime *stream)
89e59053 1065{
89e59053
SK
1066 struct sdw_slave_runtime *s_rt, *_s_rt;
1067
8d6ccf5c
SK
1068 list_for_each_entry_safe(s_rt, _s_rt, &m_rt->slave_rt_list, m_rt_node) {
1069 sdw_slave_port_release(s_rt->slave->bus, s_rt->slave, stream);
1070 sdw_release_slave_stream(s_rt->slave, stream);
1071 }
89e59053 1072
48949722 1073 list_del(&m_rt->stream_node);
89e59053 1074 list_del(&m_rt->bus_node);
48949722 1075 kfree(m_rt);
89e59053
SK
1076}
1077
1078/**
1079 * sdw_stream_remove_master() - Remove master from sdw_stream
1080 *
1081 * @bus: SDW Bus instance
1082 * @stream: SoundWire stream
1083 *
bbe7379d 1084 * This removes and frees port_rt and master_rt from a stream
89e59053
SK
1085 */
1086int sdw_stream_remove_master(struct sdw_bus *bus,
1fe74a5e 1087 struct sdw_stream_runtime *stream)
89e59053 1088{
48949722
VK
1089 struct sdw_master_runtime *m_rt, *_m_rt;
1090
89e59053
SK
1091 mutex_lock(&bus->bus_lock);
1092
48949722 1093 list_for_each_entry_safe(m_rt, _m_rt,
1fe74a5e 1094 &stream->master_list, stream_node) {
48949722
VK
1095 if (m_rt->bus != bus)
1096 continue;
1097
1098 sdw_master_port_release(bus, m_rt);
1099 sdw_release_master_stream(m_rt, stream);
ce6e74d0 1100 stream->m_rt_count--;
48949722
VK
1101 }
1102
1103 if (list_empty(&stream->master_list))
1104 stream->state = SDW_STREAM_RELEASED;
89e59053
SK
1105
1106 mutex_unlock(&bus->bus_lock);
1107
1108 return 0;
1109}
1110EXPORT_SYMBOL(sdw_stream_remove_master);
1111
1112/**
1113 * sdw_stream_remove_slave() - Remove slave from sdw_stream
1114 *
1115 * @slave: SDW Slave instance
1116 * @stream: SoundWire stream
1117 *
bbe7379d 1118 * This removes and frees port_rt and slave_rt from a stream
89e59053
SK
1119 */
1120int sdw_stream_remove_slave(struct sdw_slave *slave,
1fe74a5e 1121 struct sdw_stream_runtime *stream)
89e59053
SK
1122{
1123 mutex_lock(&slave->bus->bus_lock);
1124
bbe7379d 1125 sdw_slave_port_release(slave->bus, slave, stream);
89e59053
SK
1126 sdw_release_slave_stream(slave, stream);
1127
1128 mutex_unlock(&slave->bus->bus_lock);
1129
1130 return 0;
1131}
1132EXPORT_SYMBOL(sdw_stream_remove_slave);
1133
1134/**
1135 * sdw_config_stream() - Configure the allocated stream
1136 *
1137 * @dev: SDW device
1138 * @stream: SoundWire stream
1139 * @stream_config: Stream configuration for audio stream
1140 * @is_slave: is API called from Slave or Master
1141 *
1142 * This function is to be called with bus_lock held.
1143 */
1144static int sdw_config_stream(struct device *dev,
1fe74a5e
PLB
1145 struct sdw_stream_runtime *stream,
1146 struct sdw_stream_config *stream_config,
1147 bool is_slave)
89e59053
SK
1148{
1149 /*
1150 * Update the stream rate, channel and bps based on data
1151 * source. For more than one data source (multilink),
1152 * match the rate, bps, stream type and increment number of channels.
1153 *
1154 * If rate/bps is zero, it means the values are not set, so skip
1155 * comparison and allow the value to be set and stored in stream
1156 */
1157 if (stream->params.rate &&
1fe74a5e 1158 stream->params.rate != stream_config->frame_rate) {
17ed5bef 1159 dev_err(dev, "rate not matching, stream:%s\n", stream->name);
89e59053
SK
1160 return -EINVAL;
1161 }
1162
1163 if (stream->params.bps &&
1fe74a5e 1164 stream->params.bps != stream_config->bps) {
17ed5bef 1165 dev_err(dev, "bps not matching, stream:%s\n", stream->name);
89e59053
SK
1166 return -EINVAL;
1167 }
1168
1169 stream->type = stream_config->type;
1170 stream->params.rate = stream_config->frame_rate;
1171 stream->params.bps = stream_config->bps;
1172
1173 /* TODO: Update this check during Device-device support */
1174 if (is_slave)
1175 stream->params.ch_count += stream_config->ch_count;
1176
1177 return 0;
1178}
1179
bbe7379d 1180static int sdw_is_valid_port_range(struct device *dev,
1fe74a5e 1181 struct sdw_port_runtime *p_rt)
bbe7379d
SK
1182{
1183 if (!SDW_VALID_PORT_RANGE(p_rt->num)) {
1184 dev_err(dev,
17ed5bef 1185 "SoundWire: Invalid port number :%d\n", p_rt->num);
bbe7379d
SK
1186 return -EINVAL;
1187 }
1188
1189 return 0;
1190}
1191
1fe74a5e
PLB
1192static struct sdw_port_runtime
1193*sdw_port_alloc(struct device *dev,
1194 struct sdw_port_config *port_config,
1195 int port_index)
bbe7379d
SK
1196{
1197 struct sdw_port_runtime *p_rt;
1198
1199 p_rt = kzalloc(sizeof(*p_rt), GFP_KERNEL);
1200 if (!p_rt)
1201 return NULL;
1202
1203 p_rt->ch_mask = port_config[port_index].ch_mask;
1204 p_rt->num = port_config[port_index].num;
1205
1206 return p_rt;
1207}
1208
1209static int sdw_master_port_config(struct sdw_bus *bus,
1fe74a5e
PLB
1210 struct sdw_master_runtime *m_rt,
1211 struct sdw_port_config *port_config,
1212 unsigned int num_ports)
bbe7379d
SK
1213{
1214 struct sdw_port_runtime *p_rt;
1215 int i;
1216
1217 /* Iterate for number of ports to perform initialization */
1218 for (i = 0; i < num_ports; i++) {
1219 p_rt = sdw_port_alloc(bus->dev, port_config, i);
1220 if (!p_rt)
1221 return -ENOMEM;
1222
1223 /*
1224 * TODO: Check port capabilities for requested
1225 * configuration (audio mode support)
1226 */
1227
1228 list_add_tail(&p_rt->port_node, &m_rt->port_list);
1229 }
1230
1231 return 0;
1232}
1233
1234static int sdw_slave_port_config(struct sdw_slave *slave,
1fe74a5e
PLB
1235 struct sdw_slave_runtime *s_rt,
1236 struct sdw_port_config *port_config,
1237 unsigned int num_config)
bbe7379d
SK
1238{
1239 struct sdw_port_runtime *p_rt;
1240 int i, ret;
1241
1242 /* Iterate for number of ports to perform initialization */
1243 for (i = 0; i < num_config; i++) {
1244 p_rt = sdw_port_alloc(&slave->dev, port_config, i);
1245 if (!p_rt)
1246 return -ENOMEM;
1247
1248 /*
1249 * TODO: Check valid port range as defined by DisCo/
1250 * slave
1251 */
1252 ret = sdw_is_valid_port_range(&slave->dev, p_rt);
1253 if (ret < 0) {
1254 kfree(p_rt);
1255 return ret;
1256 }
1257
1258 /*
1259 * TODO: Check port capabilities for requested
1260 * configuration (audio mode support)
1261 */
1262
1263 list_add_tail(&p_rt->port_node, &s_rt->port_list);
1264 }
1265
1266 return 0;
1267}
1268
89e59053
SK
1269/**
1270 * sdw_stream_add_master() - Allocate and add master runtime to a stream
1271 *
1272 * @bus: SDW Bus instance
1273 * @stream_config: Stream configuration for audio stream
bbe7379d
SK
1274 * @port_config: Port configuration for audio stream
1275 * @num_ports: Number of ports
89e59053
SK
1276 * @stream: SoundWire stream
1277 */
1278int sdw_stream_add_master(struct sdw_bus *bus,
1fe74a5e
PLB
1279 struct sdw_stream_config *stream_config,
1280 struct sdw_port_config *port_config,
1281 unsigned int num_ports,
1282 struct sdw_stream_runtime *stream)
89e59053 1283{
3a0be1a6 1284 struct sdw_master_runtime *m_rt;
89e59053
SK
1285 int ret;
1286
1287 mutex_lock(&bus->bus_lock);
1288
ce6e74d0
SN
1289 /*
1290 * For multi link streams, add the second master only if
1291 * the bus supports it.
1292 * Check if bus->multi_link is set
1293 */
1294 if (!bus->multi_link && stream->m_rt_count > 0) {
1295 dev_err(bus->dev,
17ed5bef 1296 "Multilink not supported, link %d\n", bus->link_id);
ce6e74d0
SN
1297 ret = -EINVAL;
1298 goto unlock;
1299 }
1300
89e59053
SK
1301 m_rt = sdw_alloc_master_rt(bus, stream_config, stream);
1302 if (!m_rt) {
1303 dev_err(bus->dev,
17ed5bef 1304 "Master runtime config failed for stream:%s\n",
1fe74a5e 1305 stream->name);
89e59053 1306 ret = -ENOMEM;
3fef1a22 1307 goto unlock;
89e59053
SK
1308 }
1309
1310 ret = sdw_config_stream(bus->dev, stream, stream_config, false);
1311 if (ret)
1312 goto stream_error;
1313
bbe7379d
SK
1314 ret = sdw_master_port_config(bus, m_rt, port_config, num_ports);
1315 if (ret)
1316 goto stream_error;
1317
ce6e74d0
SN
1318 stream->m_rt_count++;
1319
3fef1a22
SN
1320 goto unlock;
1321
89e59053 1322stream_error:
48949722 1323 sdw_release_master_stream(m_rt, stream);
3fef1a22 1324unlock:
89e59053
SK
1325 mutex_unlock(&bus->bus_lock);
1326 return ret;
1327}
1328EXPORT_SYMBOL(sdw_stream_add_master);
1329
1330/**
1331 * sdw_stream_add_slave() - Allocate and add master/slave runtime to a stream
1332 *
1333 * @slave: SDW Slave instance
1334 * @stream_config: Stream configuration for audio stream
1335 * @stream: SoundWire stream
bbe7379d
SK
1336 * @port_config: Port configuration for audio stream
1337 * @num_ports: Number of ports
0aebe40b
SN
1338 *
1339 * It is expected that Slave is added before adding Master
1340 * to the Stream.
1341 *
89e59053
SK
1342 */
1343int sdw_stream_add_slave(struct sdw_slave *slave,
1fe74a5e
PLB
1344 struct sdw_stream_config *stream_config,
1345 struct sdw_port_config *port_config,
1346 unsigned int num_ports,
1347 struct sdw_stream_runtime *stream)
89e59053
SK
1348{
1349 struct sdw_slave_runtime *s_rt;
1350 struct sdw_master_runtime *m_rt;
1351 int ret;
1352
1353 mutex_lock(&slave->bus->bus_lock);
1354
1355 /*
1356 * If this API is invoked by Slave first then m_rt is not valid.
1357 * So, allocate m_rt and add Slave to it.
1358 */
1359 m_rt = sdw_alloc_master_rt(slave->bus, stream_config, stream);
1360 if (!m_rt) {
1361 dev_err(&slave->dev,
17ed5bef 1362 "alloc master runtime failed for stream:%s\n",
1fe74a5e 1363 stream->name);
89e59053
SK
1364 ret = -ENOMEM;
1365 goto error;
1366 }
1367
1368 s_rt = sdw_alloc_slave_rt(slave, stream_config, stream);
1369 if (!s_rt) {
1370 dev_err(&slave->dev,
17ed5bef 1371 "Slave runtime config failed for stream:%s\n",
1fe74a5e 1372 stream->name);
89e59053
SK
1373 ret = -ENOMEM;
1374 goto stream_error;
1375 }
1376
1377 ret = sdw_config_stream(&slave->dev, stream, stream_config, true);
1378 if (ret)
1379 goto stream_error;
1380
1381 list_add_tail(&s_rt->m_rt_node, &m_rt->slave_rt_list);
1382
bbe7379d
SK
1383 ret = sdw_slave_port_config(slave, s_rt, port_config, num_ports);
1384 if (ret)
1385 goto stream_error;
1386
0aebe40b
SN
1387 /*
1388 * Change stream state to CONFIGURED on first Slave add.
1389 * Bus is not aware of number of Slave(s) in a stream at this
1390 * point so cannot depend on all Slave(s) to be added in order to
1391 * change stream state to CONFIGURED.
1392 */
89e59053
SK
1393 stream->state = SDW_STREAM_CONFIGURED;
1394 goto error;
1395
1396stream_error:
1397 /*
1398 * we hit error so cleanup the stream, release all Slave(s) and
1399 * Master runtime
1400 */
48949722 1401 sdw_release_master_stream(m_rt, stream);
89e59053
SK
1402error:
1403 mutex_unlock(&slave->bus->bus_lock);
1404 return ret;
1405}
1406EXPORT_SYMBOL(sdw_stream_add_slave);
f8101c74
SK
1407
1408/**
1409 * sdw_get_slave_dpn_prop() - Get Slave port capabilities
1410 *
1411 * @slave: Slave handle
1412 * @direction: Data direction.
1413 * @port_num: Port number
1414 */
1415struct sdw_dpn_prop *sdw_get_slave_dpn_prop(struct sdw_slave *slave,
1fe74a5e
PLB
1416 enum sdw_data_direction direction,
1417 unsigned int port_num)
f8101c74
SK
1418{
1419 struct sdw_dpn_prop *dpn_prop;
1420 u8 num_ports;
1421 int i;
1422
1423 if (direction == SDW_DATA_DIR_TX) {
1424 num_ports = hweight32(slave->prop.source_ports);
1425 dpn_prop = slave->prop.src_dpn_prop;
1426 } else {
1427 num_ports = hweight32(slave->prop.sink_ports);
1428 dpn_prop = slave->prop.sink_dpn_prop;
1429 }
1430
1431 for (i = 0; i < num_ports; i++) {
03ecad90 1432 if (dpn_prop[i].num == port_num)
f8101c74
SK
1433 return &dpn_prop[i];
1434 }
1435
1436 return NULL;
1437}
5c3eb9f7 1438
0c4a1049
SK
1439/**
1440 * sdw_acquire_bus_lock: Acquire bus lock for all Master runtime(s)
1441 *
1442 * @stream: SoundWire stream
1443 *
1444 * Acquire bus_lock for each of the master runtime(m_rt) part of this
1445 * stream to reconfigure the bus.
1446 * NOTE: This function is called from SoundWire stream ops and is
1447 * expected that a global lock is held before acquiring bus_lock.
1448 */
1449static void sdw_acquire_bus_lock(struct sdw_stream_runtime *stream)
1450{
3a0be1a6 1451 struct sdw_master_runtime *m_rt;
0c4a1049
SK
1452 struct sdw_bus *bus = NULL;
1453
1454 /* Iterate for all Master(s) in Master list */
1455 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1456 bus = m_rt->bus;
1457
1458 mutex_lock(&bus->bus_lock);
1459 }
1460}
1461
1462/**
1463 * sdw_release_bus_lock: Release bus lock for all Master runtime(s)
1464 *
1465 * @stream: SoundWire stream
1466 *
1467 * Release the previously held bus_lock after reconfiguring the bus.
48949722
VK
1468 * NOTE: This function is called from SoundWire stream ops and is
1469 * expected that a global lock is held before releasing bus_lock.
0c4a1049
SK
1470 */
1471static void sdw_release_bus_lock(struct sdw_stream_runtime *stream)
1472{
1473 struct sdw_master_runtime *m_rt = NULL;
1474 struct sdw_bus *bus = NULL;
1475
1476 /* Iterate for all Master(s) in Master list */
1477 list_for_each_entry_reverse(m_rt, &stream->master_list, stream_node) {
1478 bus = m_rt->bus;
1479 mutex_unlock(&bus->bus_lock);
1480 }
1481}
1482
c7a8f049
PLB
1483static int _sdw_prepare_stream(struct sdw_stream_runtime *stream,
1484 bool update_params)
5c3eb9f7 1485{
3a0be1a6 1486 struct sdw_master_runtime *m_rt;
48949722 1487 struct sdw_bus *bus = NULL;
3a0be1a6 1488 struct sdw_master_prop *prop;
5c3eb9f7
SK
1489 struct sdw_bus_params params;
1490 int ret;
1491
48949722
VK
1492 /* Prepare Master(s) and Slave(s) port(s) associated with stream */
1493 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1494 bus = m_rt->bus;
1495 prop = &bus->prop;
1496 memcpy(&params, &bus->params, sizeof(params));
5c3eb9f7 1497
48949722 1498 /* TODO: Support Asynchronous mode */
3424305b 1499 if ((prop->max_clk_freq % stream->params.rate) != 0) {
17ed5bef 1500 dev_err(bus->dev, "Async mode not supported\n");
48949722
VK
1501 return -EINVAL;
1502 }
5c3eb9f7 1503
c7a8f049
PLB
1504 if (!update_params)
1505 goto program_params;
1506
48949722
VK
1507 /* Increment cumulative bus bandwidth */
1508 /* TODO: Update this during Device-Device support */
1509 bus->params.bandwidth += m_rt->stream->params.rate *
1510 m_rt->ch_count * m_rt->stream->params.bps;
1511
c7578c1d
VK
1512 /* Compute params */
1513 if (bus->compute_params) {
1514 ret = bus->compute_params(bus);
1515 if (ret < 0) {
1516 dev_err(bus->dev, "Compute params failed: %d",
1517 ret);
1518 return ret;
1519 }
1520 }
1521
c7a8f049 1522program_params:
48949722 1523 /* Program params */
bfaa3549 1524 ret = sdw_program_params(bus, true);
48949722 1525 if (ret < 0) {
17ed5bef 1526 dev_err(bus->dev, "Program params failed: %d\n", ret);
48949722
VK
1527 goto restore_params;
1528 }
5c3eb9f7
SK
1529 }
1530
3a0be1a6
PLB
1531 if (!bus) {
1532 pr_err("Configuration error in %s\n", __func__);
1533 return -EINVAL;
1534 }
1535
5c3eb9f7
SK
1536 ret = do_bank_switch(stream);
1537 if (ret < 0) {
17ed5bef 1538 dev_err(bus->dev, "Bank switch failed: %d\n", ret);
5c3eb9f7
SK
1539 goto restore_params;
1540 }
1541
48949722
VK
1542 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1543 bus = m_rt->bus;
1544
1545 /* Prepare port(s) on the new clock configuration */
1546 ret = sdw_prep_deprep_ports(m_rt, true);
1547 if (ret < 0) {
17ed5bef 1548 dev_err(bus->dev, "Prepare port(s) failed ret = %d\n",
1fe74a5e 1549 ret);
48949722
VK
1550 return ret;
1551 }
5c3eb9f7
SK
1552 }
1553
1554 stream->state = SDW_STREAM_PREPARED;
1555
1556 return ret;
1557
1558restore_params:
1559 memcpy(&bus->params, &params, sizeof(params));
1560 return ret;
1561}
1562
1563/**
1564 * sdw_prepare_stream() - Prepare SoundWire stream
1565 *
1566 * @stream: Soundwire stream
1567 *
34962fb8 1568 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
5c3eb9f7
SK
1569 */
1570int sdw_prepare_stream(struct sdw_stream_runtime *stream)
1571{
c7a8f049 1572 bool update_params = true;
c32464c9 1573 int ret;
5c3eb9f7
SK
1574
1575 if (!stream) {
17ed5bef 1576 pr_err("SoundWire: Handle not found for stream\n");
5c3eb9f7
SK
1577 return -EINVAL;
1578 }
1579
48949722 1580 sdw_acquire_bus_lock(stream);
5c3eb9f7 1581
c32464c9
BL
1582 if (stream->state == SDW_STREAM_PREPARED) {
1583 ret = 0;
1584 goto state_err;
1585 }
1586
59528807
PLB
1587 if (stream->state != SDW_STREAM_CONFIGURED &&
1588 stream->state != SDW_STREAM_DEPREPARED &&
1589 stream->state != SDW_STREAM_DISABLED) {
1590 pr_err("%s: %s: inconsistent state state %d\n",
1591 __func__, stream->name, stream->state);
1592 ret = -EINVAL;
1593 goto state_err;
1594 }
1595
c7a8f049
PLB
1596 /*
1597 * when the stream is DISABLED, this means sdw_prepare_stream()
1598 * is called as a result of an underflow or a resume operation.
1599 * In this case, the bus parameters shall not be recomputed, but
1600 * still need to be re-applied
1601 */
1602 if (stream->state == SDW_STREAM_DISABLED)
1603 update_params = false;
1604
1605 ret = _sdw_prepare_stream(stream, update_params);
5c3eb9f7 1606
59528807 1607state_err:
48949722 1608 sdw_release_bus_lock(stream);
5c3eb9f7
SK
1609 return ret;
1610}
1611EXPORT_SYMBOL(sdw_prepare_stream);
1612
1613static int _sdw_enable_stream(struct sdw_stream_runtime *stream)
1614{
3a0be1a6 1615 struct sdw_master_runtime *m_rt;
48949722 1616 struct sdw_bus *bus = NULL;
5c3eb9f7
SK
1617 int ret;
1618
48949722
VK
1619 /* Enable Master(s) and Slave(s) port(s) associated with stream */
1620 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1621 bus = m_rt->bus;
5c3eb9f7 1622
48949722 1623 /* Program params */
bfaa3549 1624 ret = sdw_program_params(bus, false);
48949722 1625 if (ret < 0) {
17ed5bef 1626 dev_err(bus->dev, "Program params failed: %d\n", ret);
48949722
VK
1627 return ret;
1628 }
1629
1630 /* Enable port(s) */
1631 ret = sdw_enable_disable_ports(m_rt, true);
1632 if (ret < 0) {
62f0cec3
VK
1633 dev_err(bus->dev,
1634 "Enable port(s) failed ret: %d\n", ret);
48949722
VK
1635 return ret;
1636 }
5c3eb9f7
SK
1637 }
1638
3a0be1a6
PLB
1639 if (!bus) {
1640 pr_err("Configuration error in %s\n", __func__);
1641 return -EINVAL;
1642 }
1643
5c3eb9f7
SK
1644 ret = do_bank_switch(stream);
1645 if (ret < 0) {
17ed5bef 1646 dev_err(bus->dev, "Bank switch failed: %d\n", ret);
5c3eb9f7
SK
1647 return ret;
1648 }
1649
1650 stream->state = SDW_STREAM_ENABLED;
1651 return 0;
1652}
1653
1654/**
1655 * sdw_enable_stream() - Enable SoundWire stream
1656 *
1657 * @stream: Soundwire stream
1658 *
34962fb8 1659 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
5c3eb9f7
SK
1660 */
1661int sdw_enable_stream(struct sdw_stream_runtime *stream)
1662{
3a0be1a6 1663 int ret;
5c3eb9f7
SK
1664
1665 if (!stream) {
17ed5bef 1666 pr_err("SoundWire: Handle not found for stream\n");
5c3eb9f7
SK
1667 return -EINVAL;
1668 }
1669
48949722 1670 sdw_acquire_bus_lock(stream);
5c3eb9f7 1671
59528807
PLB
1672 if (stream->state != SDW_STREAM_PREPARED &&
1673 stream->state != SDW_STREAM_DISABLED) {
1674 pr_err("%s: %s: inconsistent state state %d\n",
1675 __func__, stream->name, stream->state);
1676 ret = -EINVAL;
1677 goto state_err;
1678 }
1679
5c3eb9f7 1680 ret = _sdw_enable_stream(stream);
5c3eb9f7 1681
59528807 1682state_err:
48949722 1683 sdw_release_bus_lock(stream);
5c3eb9f7
SK
1684 return ret;
1685}
1686EXPORT_SYMBOL(sdw_enable_stream);
1687
1688static int _sdw_disable_stream(struct sdw_stream_runtime *stream)
1689{
3a0be1a6 1690 struct sdw_master_runtime *m_rt;
5c3eb9f7
SK
1691 int ret;
1692
48949722 1693 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
3a0be1a6
PLB
1694 struct sdw_bus *bus = m_rt->bus;
1695
48949722
VK
1696 /* Disable port(s) */
1697 ret = sdw_enable_disable_ports(m_rt, false);
1698 if (ret < 0) {
17ed5bef 1699 dev_err(bus->dev, "Disable port(s) failed: %d\n", ret);
48949722
VK
1700 return ret;
1701 }
5c3eb9f7 1702 }
5c3eb9f7
SK
1703 stream->state = SDW_STREAM_DISABLED;
1704
48949722 1705 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
3a0be1a6
PLB
1706 struct sdw_bus *bus = m_rt->bus;
1707
48949722 1708 /* Program params */
bfaa3549 1709 ret = sdw_program_params(bus, false);
48949722 1710 if (ret < 0) {
17ed5bef 1711 dev_err(bus->dev, "Program params failed: %d\n", ret);
48949722
VK
1712 return ret;
1713 }
5c3eb9f7
SK
1714 }
1715
e0279b6b
PLB
1716 ret = do_bank_switch(stream);
1717 if (ret < 0) {
3a0be1a6 1718 pr_err("Bank switch failed: %d\n", ret);
e0279b6b
PLB
1719 return ret;
1720 }
1721
1722 /* make sure alternate bank (previous current) is also disabled */
1723 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
3a0be1a6
PLB
1724 struct sdw_bus *bus = m_rt->bus;
1725
e0279b6b
PLB
1726 /* Disable port(s) */
1727 ret = sdw_enable_disable_ports(m_rt, false);
1728 if (ret < 0) {
1729 dev_err(bus->dev, "Disable port(s) failed: %d\n", ret);
1730 return ret;
1731 }
1732 }
1733
1734 return 0;
5c3eb9f7
SK
1735}
1736
1737/**
1738 * sdw_disable_stream() - Disable SoundWire stream
1739 *
1740 * @stream: Soundwire stream
1741 *
34962fb8 1742 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
5c3eb9f7
SK
1743 */
1744int sdw_disable_stream(struct sdw_stream_runtime *stream)
1745{
3a0be1a6 1746 int ret;
5c3eb9f7
SK
1747
1748 if (!stream) {
17ed5bef 1749 pr_err("SoundWire: Handle not found for stream\n");
5c3eb9f7
SK
1750 return -EINVAL;
1751 }
1752
48949722 1753 sdw_acquire_bus_lock(stream);
5c3eb9f7 1754
59528807
PLB
1755 if (stream->state != SDW_STREAM_ENABLED) {
1756 pr_err("%s: %s: inconsistent state state %d\n",
1757 __func__, stream->name, stream->state);
1758 ret = -EINVAL;
1759 goto state_err;
1760 }
1761
5c3eb9f7 1762 ret = _sdw_disable_stream(stream);
5c3eb9f7 1763
59528807 1764state_err:
48949722 1765 sdw_release_bus_lock(stream);
5c3eb9f7
SK
1766 return ret;
1767}
1768EXPORT_SYMBOL(sdw_disable_stream);
1769
1770static int _sdw_deprepare_stream(struct sdw_stream_runtime *stream)
1771{
3a0be1a6
PLB
1772 struct sdw_master_runtime *m_rt;
1773 struct sdw_bus *bus;
5c3eb9f7
SK
1774 int ret = 0;
1775
48949722
VK
1776 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1777 bus = m_rt->bus;
1778 /* De-prepare port(s) */
1779 ret = sdw_prep_deprep_ports(m_rt, false);
1780 if (ret < 0) {
62f0cec3
VK
1781 dev_err(bus->dev,
1782 "De-prepare port(s) failed: %d\n", ret);
48949722
VK
1783 return ret;
1784 }
5c3eb9f7 1785
48949722
VK
1786 /* TODO: Update this during Device-Device support */
1787 bus->params.bandwidth -= m_rt->stream->params.rate *
1788 m_rt->ch_count * m_rt->stream->params.bps;
5c3eb9f7 1789
9026118f
BL
1790 /* Compute params */
1791 if (bus->compute_params) {
1792 ret = bus->compute_params(bus);
1793 if (ret < 0) {
1794 dev_err(bus->dev, "Compute params failed: %d",
1795 ret);
1796 return ret;
1797 }
1798 }
1799
48949722 1800 /* Program params */
bfaa3549 1801 ret = sdw_program_params(bus, false);
48949722 1802 if (ret < 0) {
17ed5bef 1803 dev_err(bus->dev, "Program params failed: %d\n", ret);
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VK
1804 return ret;
1805 }
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SK
1806 }
1807
48949722 1808 stream->state = SDW_STREAM_DEPREPARED;
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SK
1809 return do_bank_switch(stream);
1810}
1811
1812/**
1813 * sdw_deprepare_stream() - Deprepare SoundWire stream
1814 *
1815 * @stream: Soundwire stream
1816 *
34962fb8 1817 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
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SK
1818 */
1819int sdw_deprepare_stream(struct sdw_stream_runtime *stream)
1820{
3a0be1a6 1821 int ret;
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SK
1822
1823 if (!stream) {
17ed5bef 1824 pr_err("SoundWire: Handle not found for stream\n");
5c3eb9f7
SK
1825 return -EINVAL;
1826 }
1827
48949722 1828 sdw_acquire_bus_lock(stream);
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1829
1830 if (stream->state != SDW_STREAM_PREPARED &&
1831 stream->state != SDW_STREAM_DISABLED) {
1832 pr_err("%s: %s: inconsistent state state %d\n",
1833 __func__, stream->name, stream->state);
1834 ret = -EINVAL;
1835 goto state_err;
1836 }
1837
5c3eb9f7 1838 ret = _sdw_deprepare_stream(stream);
5c3eb9f7 1839
59528807 1840state_err:
48949722 1841 sdw_release_bus_lock(stream);
5c3eb9f7
SK
1842 return ret;
1843}
1844EXPORT_SYMBOL(sdw_deprepare_stream);
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1845
1846static int set_stream(struct snd_pcm_substream *substream,
1847 struct sdw_stream_runtime *sdw_stream)
1848{
1849 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1850 struct snd_soc_dai *dai;
1851 int ret = 0;
1852 int i;
1853
1854 /* Set stream pointer on all DAIs */
1855 for_each_rtd_dais(rtd, i, dai) {
1856 ret = snd_soc_dai_set_sdw_stream(dai, sdw_stream, substream->stream);
1857 if (ret < 0) {
1858 dev_err(rtd->dev, "failed to set stream pointer on dai %s", dai->name);
1859 break;
1860 }
1861 }
1862
1863 return ret;
1864}
1865
1866/**
1867 * sdw_startup_stream() - Startup SoundWire stream
1868 *
3b71c690 1869 * @sdw_substream: Soundwire stream
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1870 *
1871 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
1872 */
1873int sdw_startup_stream(void *sdw_substream)
1874{
1875 struct snd_pcm_substream *substream = sdw_substream;
1876 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1877 struct sdw_stream_runtime *sdw_stream;
1878 char *name;
1879 int ret;
1880
1881 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1882 name = kasprintf(GFP_KERNEL, "%s-Playback", substream->name);
1883 else
1884 name = kasprintf(GFP_KERNEL, "%s-Capture", substream->name);
1885
1886 if (!name)
1887 return -ENOMEM;
1888
1889 sdw_stream = sdw_alloc_stream(name);
1890 if (!sdw_stream) {
1891 dev_err(rtd->dev, "alloc stream failed for substream DAI %s", substream->name);
1892 ret = -ENOMEM;
1893 goto error;
1894 }
1895
1896 ret = set_stream(substream, sdw_stream);
1897 if (ret < 0)
1898 goto release_stream;
1899 return 0;
1900
1901release_stream:
1902 sdw_release_stream(sdw_stream);
1903 set_stream(substream, NULL);
1904error:
1905 kfree(name);
1906 return ret;
1907}
1908EXPORT_SYMBOL(sdw_startup_stream);
1909
1910/**
1911 * sdw_shutdown_stream() - Shutdown SoundWire stream
1912 *
3b71c690 1913 * @sdw_substream: Soundwire stream
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1914 *
1915 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
1916 */
1917void sdw_shutdown_stream(void *sdw_substream)
1918{
1919 struct snd_pcm_substream *substream = sdw_substream;
1920 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1921 struct sdw_stream_runtime *sdw_stream;
1922 struct snd_soc_dai *dai;
1923
1924 /* Find stream from first CPU DAI */
1925 dai = asoc_rtd_to_cpu(rtd, 0);
1926
1927 sdw_stream = snd_soc_dai_get_sdw_stream(dai, substream->stream);
1928
3471d2a1 1929 if (IS_ERR(sdw_stream)) {
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1930 dev_err(rtd->dev, "no stream found for DAI %s", dai->name);
1931 return;
1932 }
1933
1934 /* release memory */
1935 kfree(sdw_stream->name);
1936 sdw_release_stream(sdw_stream);
1937
1938 /* clear DAI data */
1939 set_stream(substream, NULL);
1940}
1941EXPORT_SYMBOL(sdw_shutdown_stream);