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1// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2// Copyright(c) 2015-18 Intel Corporation.
3
4/*
5 * stream.c - SoundWire Bus stream operations.
6 */
7
8#include <linux/delay.h>
9#include <linux/device.h>
10#include <linux/init.h>
11#include <linux/module.h>
12#include <linux/mod_devicetable.h>
13#include <linux/slab.h>
f8101c74 14#include <linux/soundwire/sdw_registers.h>
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15#include <linux/soundwire/sdw.h>
16#include "bus.h"
17
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18/*
19 * Array of supported rows and columns as per MIPI SoundWire Specification 1.1
20 *
21 * The rows are arranged as per the array index value programmed
22 * in register. The index 15 has dummy value 0 in order to fill hole.
23 */
24int rows[SDW_FRAME_ROWS] = {48, 50, 60, 64, 75, 80, 125, 147,
25 96, 100, 120, 128, 150, 160, 250, 0,
26 192, 200, 240, 256, 72, 144, 90, 180};
27
28int cols[SDW_FRAME_COLS] = {2, 4, 6, 8, 10, 12, 14, 16};
29
30static int sdw_find_col_index(int col)
31{
32 int i;
33
34 for (i = 0; i < SDW_FRAME_COLS; i++) {
35 if (cols[i] == col)
36 return i;
37 }
38
39 pr_warn("Requested column not found, selecting lowest column no: 2\n");
40 return 0;
41}
42
43static int sdw_find_row_index(int row)
44{
45 int i;
46
47 for (i = 0; i < SDW_FRAME_ROWS; i++) {
48 if (rows[i] == row)
49 return i;
50 }
51
52 pr_warn("Requested row not found, selecting lowest row no: 48\n");
53 return 0;
54}
897fe40e 55
f8101c74 56static int _sdw_program_slave_port_params(struct sdw_bus *bus,
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57 struct sdw_slave *slave,
58 struct sdw_transport_params *t_params,
59 enum sdw_dpn_type type)
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60{
61 u32 addr1, addr2, addr3, addr4;
62 int ret;
63 u16 wbuf;
64
65 if (bus->params.next_bank) {
66 addr1 = SDW_DPN_OFFSETCTRL2_B1(t_params->port_num);
67 addr2 = SDW_DPN_BLOCKCTRL3_B1(t_params->port_num);
68 addr3 = SDW_DPN_SAMPLECTRL2_B1(t_params->port_num);
69 addr4 = SDW_DPN_HCTRL_B1(t_params->port_num);
70 } else {
71 addr1 = SDW_DPN_OFFSETCTRL2_B0(t_params->port_num);
72 addr2 = SDW_DPN_BLOCKCTRL3_B0(t_params->port_num);
73 addr3 = SDW_DPN_SAMPLECTRL2_B0(t_params->port_num);
74 addr4 = SDW_DPN_HCTRL_B0(t_params->port_num);
75 }
76
77 /* Program DPN_OffsetCtrl2 registers */
78 ret = sdw_write(slave, addr1, t_params->offset2);
79 if (ret < 0) {
17ed5bef 80 dev_err(bus->dev, "DPN_OffsetCtrl2 register write failed\n");
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81 return ret;
82 }
83
84 /* Program DPN_BlockCtrl3 register */
85 ret = sdw_write(slave, addr2, t_params->blk_pkg_mode);
86 if (ret < 0) {
17ed5bef 87 dev_err(bus->dev, "DPN_BlockCtrl3 register write failed\n");
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88 return ret;
89 }
90
91 /*
92 * Data ports are FULL, SIMPLE and REDUCED. This function handles
7d3b3cdf 93 * FULL and REDUCED only and beyond this point only FULL is
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94 * handled, so bail out if we are not FULL data port type
95 */
96 if (type != SDW_DPN_FULL)
97 return ret;
98
99 /* Program DPN_SampleCtrl2 register */
100 wbuf = (t_params->sample_interval - 1);
101 wbuf &= SDW_DPN_SAMPLECTRL_HIGH;
102 wbuf >>= SDW_REG_SHIFT(SDW_DPN_SAMPLECTRL_HIGH);
103
104 ret = sdw_write(slave, addr3, wbuf);
105 if (ret < 0) {
17ed5bef 106 dev_err(bus->dev, "DPN_SampleCtrl2 register write failed\n");
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107 return ret;
108 }
109
110 /* Program DPN_HCtrl register */
111 wbuf = t_params->hstart;
112 wbuf <<= SDW_REG_SHIFT(SDW_DPN_HCTRL_HSTART);
113 wbuf |= t_params->hstop;
114
115 ret = sdw_write(slave, addr4, wbuf);
116 if (ret < 0)
17ed5bef 117 dev_err(bus->dev, "DPN_HCtrl register write failed\n");
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118
119 return ret;
120}
121
122static int sdw_program_slave_port_params(struct sdw_bus *bus,
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123 struct sdw_slave_runtime *s_rt,
124 struct sdw_port_runtime *p_rt)
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125{
126 struct sdw_transport_params *t_params = &p_rt->transport_params;
127 struct sdw_port_params *p_params = &p_rt->port_params;
128 struct sdw_slave_prop *slave_prop = &s_rt->slave->prop;
129 u32 addr1, addr2, addr3, addr4, addr5, addr6;
130 struct sdw_dpn_prop *dpn_prop;
131 int ret;
132 u8 wbuf;
133
134 dpn_prop = sdw_get_slave_dpn_prop(s_rt->slave,
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135 s_rt->direction,
136 t_params->port_num);
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137 if (!dpn_prop)
138 return -EINVAL;
139
140 addr1 = SDW_DPN_PORTCTRL(t_params->port_num);
141 addr2 = SDW_DPN_BLOCKCTRL1(t_params->port_num);
142
143 if (bus->params.next_bank) {
144 addr3 = SDW_DPN_SAMPLECTRL1_B1(t_params->port_num);
145 addr4 = SDW_DPN_OFFSETCTRL1_B1(t_params->port_num);
146 addr5 = SDW_DPN_BLOCKCTRL2_B1(t_params->port_num);
147 addr6 = SDW_DPN_LANECTRL_B1(t_params->port_num);
148
149 } else {
150 addr3 = SDW_DPN_SAMPLECTRL1_B0(t_params->port_num);
151 addr4 = SDW_DPN_OFFSETCTRL1_B0(t_params->port_num);
152 addr5 = SDW_DPN_BLOCKCTRL2_B0(t_params->port_num);
153 addr6 = SDW_DPN_LANECTRL_B0(t_params->port_num);
154 }
155
156 /* Program DPN_PortCtrl register */
157 wbuf = p_params->data_mode << SDW_REG_SHIFT(SDW_DPN_PORTCTRL_DATAMODE);
158 wbuf |= p_params->flow_mode;
159
160 ret = sdw_update(s_rt->slave, addr1, 0xF, wbuf);
161 if (ret < 0) {
162 dev_err(&s_rt->slave->dev,
17ed5bef 163 "DPN_PortCtrl register write failed for port %d\n",
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164 t_params->port_num);
165 return ret;
166 }
167
168 /* Program DPN_BlockCtrl1 register */
169 ret = sdw_write(s_rt->slave, addr2, (p_params->bps - 1));
170 if (ret < 0) {
171 dev_err(&s_rt->slave->dev,
17ed5bef 172 "DPN_BlockCtrl1 register write failed for port %d\n",
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173 t_params->port_num);
174 return ret;
175 }
176
177 /* Program DPN_SampleCtrl1 register */
178 wbuf = (t_params->sample_interval - 1) & SDW_DPN_SAMPLECTRL_LOW;
179 ret = sdw_write(s_rt->slave, addr3, wbuf);
180 if (ret < 0) {
181 dev_err(&s_rt->slave->dev,
17ed5bef 182 "DPN_SampleCtrl1 register write failed for port %d\n",
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183 t_params->port_num);
184 return ret;
185 }
186
187 /* Program DPN_OffsetCtrl1 registers */
188 ret = sdw_write(s_rt->slave, addr4, t_params->offset1);
189 if (ret < 0) {
190 dev_err(&s_rt->slave->dev,
17ed5bef 191 "DPN_OffsetCtrl1 register write failed for port %d\n",
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192 t_params->port_num);
193 return ret;
194 }
195
196 /* Program DPN_BlockCtrl2 register*/
197 if (t_params->blk_grp_ctrl_valid) {
198 ret = sdw_write(s_rt->slave, addr5, t_params->blk_grp_ctrl);
199 if (ret < 0) {
200 dev_err(&s_rt->slave->dev,
17ed5bef 201 "DPN_BlockCtrl2 reg write failed for port %d\n",
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202 t_params->port_num);
203 return ret;
204 }
205 }
206
207 /* program DPN_LaneCtrl register */
208 if (slave_prop->lane_control_support) {
209 ret = sdw_write(s_rt->slave, addr6, t_params->lane_ctrl);
210 if (ret < 0) {
211 dev_err(&s_rt->slave->dev,
17ed5bef 212 "DPN_LaneCtrl register write failed for port %d\n",
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213 t_params->port_num);
214 return ret;
215 }
216 }
217
218 if (dpn_prop->type != SDW_DPN_SIMPLE) {
219 ret = _sdw_program_slave_port_params(bus, s_rt->slave,
1fe74a5e 220 t_params, dpn_prop->type);
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221 if (ret < 0)
222 dev_err(&s_rt->slave->dev,
17ed5bef 223 "Transport reg write failed for port: %d\n",
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224 t_params->port_num);
225 }
226
227 return ret;
228}
229
230static int sdw_program_master_port_params(struct sdw_bus *bus,
1fe74a5e 231 struct sdw_port_runtime *p_rt)
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232{
233 int ret;
234
235 /*
236 * we need to set transport and port parameters for the port.
7d3b3cdf 237 * Transport parameters refers to the sample interval, offsets and
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238 * hstart/stop etc of the data. Port parameters refers to word
239 * length, flow mode etc of the port
240 */
241 ret = bus->port_ops->dpn_set_port_transport_params(bus,
242 &p_rt->transport_params,
243 bus->params.next_bank);
244 if (ret < 0)
245 return ret;
246
247 return bus->port_ops->dpn_set_port_params(bus,
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248 &p_rt->port_params,
249 bus->params.next_bank);
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250}
251
252/**
253 * sdw_program_port_params() - Programs transport parameters of Master(s)
254 * and Slave(s)
255 *
256 * @m_rt: Master stream runtime
257 */
258static int sdw_program_port_params(struct sdw_master_runtime *m_rt)
259{
260 struct sdw_slave_runtime *s_rt = NULL;
261 struct sdw_bus *bus = m_rt->bus;
262 struct sdw_port_runtime *p_rt;
263 int ret = 0;
264
265 /* Program transport & port parameters for Slave(s) */
266 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
267 list_for_each_entry(p_rt, &s_rt->port_list, port_node) {
268 ret = sdw_program_slave_port_params(bus, s_rt, p_rt);
269 if (ret < 0)
270 return ret;
271 }
272 }
273
274 /* Program transport & port parameters for Master(s) */
275 list_for_each_entry(p_rt, &m_rt->port_list, port_node) {
276 ret = sdw_program_master_port_params(bus, p_rt);
277 if (ret < 0)
278 return ret;
279 }
280
281 return 0;
282}
283
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284/**
285 * sdw_enable_disable_slave_ports: Enable/disable slave data port
286 *
287 * @bus: bus instance
288 * @s_rt: slave runtime
289 * @p_rt: port runtime
290 * @en: enable or disable operation
291 *
292 * This function only sets the enable/disable bits in the relevant bank, the
293 * actual enable/disable is done with a bank switch
294 */
295static int sdw_enable_disable_slave_ports(struct sdw_bus *bus,
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296 struct sdw_slave_runtime *s_rt,
297 struct sdw_port_runtime *p_rt,
298 bool en)
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299{
300 struct sdw_transport_params *t_params = &p_rt->transport_params;
301 u32 addr;
302 int ret;
303
304 if (bus->params.next_bank)
305 addr = SDW_DPN_CHANNELEN_B1(p_rt->num);
306 else
307 addr = SDW_DPN_CHANNELEN_B0(p_rt->num);
308
309 /*
310 * Since bus doesn't support sharing a port across two streams,
311 * it is safe to reset this register
312 */
313 if (en)
314 ret = sdw_update(s_rt->slave, addr, 0xFF, p_rt->ch_mask);
315 else
316 ret = sdw_update(s_rt->slave, addr, 0xFF, 0x0);
317
318 if (ret < 0)
319 dev_err(&s_rt->slave->dev,
17ed5bef 320 "Slave chn_en reg write failed:%d port:%d\n",
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321 ret, t_params->port_num);
322
323 return ret;
324}
325
326static int sdw_enable_disable_master_ports(struct sdw_master_runtime *m_rt,
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327 struct sdw_port_runtime *p_rt,
328 bool en)
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329{
330 struct sdw_transport_params *t_params = &p_rt->transport_params;
331 struct sdw_bus *bus = m_rt->bus;
332 struct sdw_enable_ch enable_ch;
a25eab29 333 int ret;
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334
335 enable_ch.port_num = p_rt->num;
336 enable_ch.ch_mask = p_rt->ch_mask;
337 enable_ch.enable = en;
338
339 /* Perform Master port channel(s) enable/disable */
340 if (bus->port_ops->dpn_port_enable_ch) {
341 ret = bus->port_ops->dpn_port_enable_ch(bus,
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342 &enable_ch,
343 bus->params.next_bank);
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344 if (ret < 0) {
345 dev_err(bus->dev,
17ed5bef 346 "Master chn_en write failed:%d port:%d\n",
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347 ret, t_params->port_num);
348 return ret;
349 }
350 } else {
351 dev_err(bus->dev,
352 "dpn_port_enable_ch not supported, %s failed\n",
353 en ? "enable" : "disable");
354 return -EINVAL;
355 }
356
357 return 0;
358}
359
360/**
361 * sdw_enable_disable_ports() - Enable/disable port(s) for Master and
362 * Slave(s)
363 *
364 * @m_rt: Master stream runtime
365 * @en: mode (enable/disable)
366 */
367static int sdw_enable_disable_ports(struct sdw_master_runtime *m_rt, bool en)
368{
369 struct sdw_port_runtime *s_port, *m_port;
370 struct sdw_slave_runtime *s_rt = NULL;
371 int ret = 0;
372
373 /* Enable/Disable Slave port(s) */
374 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
375 list_for_each_entry(s_port, &s_rt->port_list, port_node) {
376 ret = sdw_enable_disable_slave_ports(m_rt->bus, s_rt,
1fe74a5e 377 s_port, en);
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378 if (ret < 0)
379 return ret;
380 }
381 }
382
383 /* Enable/Disable Master port(s) */
384 list_for_each_entry(m_port, &m_rt->port_list, port_node) {
385 ret = sdw_enable_disable_master_ports(m_rt, m_port, en);
386 if (ret < 0)
387 return ret;
388 }
389
390 return 0;
391}
392
393static int sdw_do_port_prep(struct sdw_slave_runtime *s_rt,
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394 struct sdw_prepare_ch prep_ch,
395 enum sdw_port_prep_ops cmd)
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396{
397 const struct sdw_slave_ops *ops = s_rt->slave->ops;
398 int ret;
399
400 if (ops->port_prep) {
401 ret = ops->port_prep(s_rt->slave, &prep_ch, cmd);
402 if (ret < 0) {
403 dev_err(&s_rt->slave->dev,
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404 "Slave Port Prep cmd %d failed: %d\n",
405 cmd, ret);
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406 return ret;
407 }
408 }
409
410 return 0;
411}
412
413static int sdw_prep_deprep_slave_ports(struct sdw_bus *bus,
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414 struct sdw_slave_runtime *s_rt,
415 struct sdw_port_runtime *p_rt,
416 bool prep)
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417{
418 struct completion *port_ready = NULL;
419 struct sdw_dpn_prop *dpn_prop;
420 struct sdw_prepare_ch prep_ch;
421 unsigned int time_left;
422 bool intr = false;
423 int ret = 0, val;
424 u32 addr;
425
426 prep_ch.num = p_rt->num;
427 prep_ch.ch_mask = p_rt->ch_mask;
428
429 dpn_prop = sdw_get_slave_dpn_prop(s_rt->slave,
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430 s_rt->direction,
431 prep_ch.num);
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432 if (!dpn_prop) {
433 dev_err(bus->dev,
17ed5bef 434 "Slave Port:%d properties not found\n", prep_ch.num);
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435 return -EINVAL;
436 }
437
438 prep_ch.prepare = prep;
439
440 prep_ch.bank = bus->params.next_bank;
441
442 if (dpn_prop->device_interrupts || !dpn_prop->simple_ch_prep_sm)
443 intr = true;
444
445 /*
446 * Enable interrupt before Port prepare.
447 * For Port de-prepare, it is assumed that port
448 * was prepared earlier
449 */
450 if (prep && intr) {
451 ret = sdw_configure_dpn_intr(s_rt->slave, p_rt->num, prep,
1fe74a5e 452 dpn_prop->device_interrupts);
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453 if (ret < 0)
454 return ret;
455 }
456
457 /* Inform slave about the impending port prepare */
458 sdw_do_port_prep(s_rt, prep_ch, SDW_OPS_PORT_PRE_PREP);
459
460 /* Prepare Slave port implementing CP_SM */
461 if (!dpn_prop->simple_ch_prep_sm) {
462 addr = SDW_DPN_PREPARECTRL(p_rt->num);
463
464 if (prep)
465 ret = sdw_update(s_rt->slave, addr,
1fe74a5e 466 0xFF, p_rt->ch_mask);
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467 else
468 ret = sdw_update(s_rt->slave, addr, 0xFF, 0x0);
469
470 if (ret < 0) {
471 dev_err(&s_rt->slave->dev,
17ed5bef 472 "Slave prep_ctrl reg write failed\n");
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473 return ret;
474 }
475
476 /* Wait for completion on port ready */
477 port_ready = &s_rt->slave->port_ready[prep_ch.num];
478 time_left = wait_for_completion_timeout(port_ready,
479 msecs_to_jiffies(dpn_prop->ch_prep_timeout));
480
481 val = sdw_read(s_rt->slave, SDW_DPN_PREPARESTATUS(p_rt->num));
482 val &= p_rt->ch_mask;
483 if (!time_left || val) {
484 dev_err(&s_rt->slave->dev,
17ed5bef 485 "Chn prep failed for port:%d\n", prep_ch.num);
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486 return -ETIMEDOUT;
487 }
488 }
489
490 /* Inform slaves about ports prepared */
491 sdw_do_port_prep(s_rt, prep_ch, SDW_OPS_PORT_POST_PREP);
492
493 /* Disable interrupt after Port de-prepare */
494 if (!prep && intr)
495 ret = sdw_configure_dpn_intr(s_rt->slave, p_rt->num, prep,
1fe74a5e 496 dpn_prop->device_interrupts);
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497
498 return ret;
499}
500
501static int sdw_prep_deprep_master_ports(struct sdw_master_runtime *m_rt,
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502 struct sdw_port_runtime *p_rt,
503 bool prep)
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504{
505 struct sdw_transport_params *t_params = &p_rt->transport_params;
506 struct sdw_bus *bus = m_rt->bus;
507 const struct sdw_master_port_ops *ops = bus->port_ops;
508 struct sdw_prepare_ch prep_ch;
509 int ret = 0;
510
511 prep_ch.num = p_rt->num;
512 prep_ch.ch_mask = p_rt->ch_mask;
513 prep_ch.prepare = prep; /* Prepare/De-prepare */
514 prep_ch.bank = bus->params.next_bank;
515
516 /* Pre-prepare/Pre-deprepare port(s) */
517 if (ops->dpn_port_prep) {
518 ret = ops->dpn_port_prep(bus, &prep_ch);
519 if (ret < 0) {
17ed5bef 520 dev_err(bus->dev, "Port prepare failed for port:%d\n",
1fe74a5e 521 t_params->port_num);
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522 return ret;
523 }
524 }
525
526 return ret;
527}
528
529/**
530 * sdw_prep_deprep_ports() - Prepare/De-prepare port(s) for Master(s) and
531 * Slave(s)
532 *
533 * @m_rt: Master runtime handle
534 * @prep: Prepare or De-prepare
535 */
536static int sdw_prep_deprep_ports(struct sdw_master_runtime *m_rt, bool prep)
537{
538 struct sdw_slave_runtime *s_rt = NULL;
539 struct sdw_port_runtime *p_rt;
540 int ret = 0;
541
542 /* Prepare/De-prepare Slave port(s) */
543 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
544 list_for_each_entry(p_rt, &s_rt->port_list, port_node) {
545 ret = sdw_prep_deprep_slave_ports(m_rt->bus, s_rt,
1fe74a5e 546 p_rt, prep);
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547 if (ret < 0)
548 return ret;
549 }
550 }
551
552 /* Prepare/De-prepare Master port(s) */
553 list_for_each_entry(p_rt, &m_rt->port_list, port_node) {
554 ret = sdw_prep_deprep_master_ports(m_rt, p_rt, prep);
555 if (ret < 0)
556 return ret;
557 }
558
559 return ret;
560}
561
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562/**
563 * sdw_notify_config() - Notify bus configuration
564 *
565 * @m_rt: Master runtime handle
566 *
567 * This function notifies the Master(s) and Slave(s) of the
568 * new bus configuration.
569 */
570static int sdw_notify_config(struct sdw_master_runtime *m_rt)
571{
572 struct sdw_slave_runtime *s_rt;
573 struct sdw_bus *bus = m_rt->bus;
574 struct sdw_slave *slave;
575 int ret = 0;
576
577 if (bus->ops->set_bus_conf) {
578 ret = bus->ops->set_bus_conf(bus, &bus->params);
579 if (ret < 0)
580 return ret;
581 }
582
583 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
584 slave = s_rt->slave;
585
586 if (slave->ops->bus_config) {
587 ret = slave->ops->bus_config(slave, &bus->params);
588 if (ret < 0)
17ed5bef 589 dev_err(bus->dev, "Notify Slave: %d failed\n",
1fe74a5e 590 slave->dev_num);
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591 return ret;
592 }
593 }
594
595 return ret;
596}
597
598/**
599 * sdw_program_params() - Program transport and port parameters for Master(s)
600 * and Slave(s)
601 *
602 * @bus: SDW bus instance
603 */
604static int sdw_program_params(struct sdw_bus *bus)
605{
606 struct sdw_master_runtime *m_rt = NULL;
607 int ret = 0;
608
609 list_for_each_entry(m_rt, &bus->m_rt_list, bus_node) {
610 ret = sdw_program_port_params(m_rt);
611 if (ret < 0) {
612 dev_err(bus->dev,
17ed5bef 613 "Program transport params failed: %d\n", ret);
99b8a5d6
SK
614 return ret;
615 }
616
617 ret = sdw_notify_config(m_rt);
618 if (ret < 0) {
62f0cec3
VK
619 dev_err(bus->dev,
620 "Notify bus config failed: %d\n", ret);
99b8a5d6
SK
621 return ret;
622 }
623
624 /* Enable port(s) on alternate bank for all active streams */
625 if (m_rt->stream->state != SDW_STREAM_ENABLED)
626 continue;
627
628 ret = sdw_enable_disable_ports(m_rt, true);
629 if (ret < 0) {
17ed5bef 630 dev_err(bus->dev, "Enable channel failed: %d\n", ret);
99b8a5d6
SK
631 return ret;
632 }
633 }
634
635 return ret;
636}
637
ce6e74d0 638static int sdw_bank_switch(struct sdw_bus *bus, int m_rt_count)
99b8a5d6
SK
639{
640 int col_index, row_index;
ce6e74d0 641 bool multi_link;
99b8a5d6
SK
642 struct sdw_msg *wr_msg;
643 u8 *wbuf = NULL;
644 int ret = 0;
645 u16 addr;
646
647 wr_msg = kzalloc(sizeof(*wr_msg), GFP_KERNEL);
648 if (!wr_msg)
649 return -ENOMEM;
650
ce6e74d0
SN
651 bus->defer_msg.msg = wr_msg;
652
99b8a5d6
SK
653 wbuf = kzalloc(sizeof(*wbuf), GFP_KERNEL);
654 if (!wbuf) {
655 ret = -ENOMEM;
656 goto error_1;
657 }
658
659 /* Get row and column index to program register */
660 col_index = sdw_find_col_index(bus->params.col);
661 row_index = sdw_find_row_index(bus->params.row);
662 wbuf[0] = col_index | (row_index << 3);
663
664 if (bus->params.next_bank)
665 addr = SDW_SCP_FRAMECTRL_B1;
666 else
667 addr = SDW_SCP_FRAMECTRL_B0;
668
669 sdw_fill_msg(wr_msg, NULL, addr, 1, SDW_BROADCAST_DEV_NUM,
1fe74a5e 670 SDW_MSG_FLAG_WRITE, wbuf);
99b8a5d6
SK
671 wr_msg->ssp_sync = true;
672
ce6e74d0
SN
673 /*
674 * Set the multi_link flag only when both the hardware supports
675 * and there is a stream handled by multiple masters
676 */
677 multi_link = bus->multi_link && (m_rt_count > 1);
678
679 if (multi_link)
680 ret = sdw_transfer_defer(bus, wr_msg, &bus->defer_msg);
681 else
682 ret = sdw_transfer(bus, wr_msg);
683
99b8a5d6 684 if (ret < 0) {
17ed5bef 685 dev_err(bus->dev, "Slave frame_ctrl reg write failed\n");
99b8a5d6
SK
686 goto error;
687 }
688
ce6e74d0
SN
689 if (!multi_link) {
690 kfree(wr_msg);
691 kfree(wbuf);
692 bus->defer_msg.msg = NULL;
693 bus->params.curr_bank = !bus->params.curr_bank;
694 bus->params.next_bank = !bus->params.next_bank;
695 }
99b8a5d6
SK
696
697 return 0;
698
699error:
700 kfree(wbuf);
701error_1:
702 kfree(wr_msg);
703 return ret;
704}
705
ce6e74d0
SN
706/**
707 * sdw_ml_sync_bank_switch: Multilink register bank switch
708 *
709 * @bus: SDW bus instance
710 *
711 * Caller function should free the buffers on error
712 */
713static int sdw_ml_sync_bank_switch(struct sdw_bus *bus)
714{
715 unsigned long time_left;
716
717 if (!bus->multi_link)
718 return 0;
719
720 /* Wait for completion of transfer */
721 time_left = wait_for_completion_timeout(&bus->defer_msg.complete,
722 bus->bank_switch_timeout);
723
724 if (!time_left) {
17ed5bef 725 dev_err(bus->dev, "Controller Timed out on bank switch\n");
ce6e74d0
SN
726 return -ETIMEDOUT;
727 }
728
729 bus->params.curr_bank = !bus->params.curr_bank;
730 bus->params.next_bank = !bus->params.next_bank;
731
732 if (bus->defer_msg.msg) {
733 kfree(bus->defer_msg.msg->buf);
734 kfree(bus->defer_msg.msg);
735 }
736
737 return 0;
738}
739
99b8a5d6
SK
740static int do_bank_switch(struct sdw_stream_runtime *stream)
741{
48949722 742 struct sdw_master_runtime *m_rt = NULL;
99b8a5d6 743 const struct sdw_master_ops *ops;
48949722 744 struct sdw_bus *bus = NULL;
ce6e74d0 745 bool multi_link = false;
99b8a5d6
SK
746 int ret = 0;
747
48949722
VK
748 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
749 bus = m_rt->bus;
750 ops = bus->ops;
751
ce6e74d0
SN
752 if (bus->multi_link) {
753 multi_link = true;
754 mutex_lock(&bus->msg_lock);
755 }
756
48949722
VK
757 /* Pre-bank switch */
758 if (ops->pre_bank_switch) {
759 ret = ops->pre_bank_switch(bus);
760 if (ret < 0) {
761 dev_err(bus->dev,
17ed5bef 762 "Pre bank switch op failed: %d\n", ret);
ce6e74d0 763 goto msg_unlock;
48949722
VK
764 }
765 }
766
ce6e74d0
SN
767 /*
768 * Perform Bank switch operation.
769 * For multi link cases, the actual bank switch is
770 * synchronized across all Masters and happens later as a
771 * part of post_bank_switch ops.
772 */
773 ret = sdw_bank_switch(bus, stream->m_rt_count);
99b8a5d6 774 if (ret < 0) {
17ed5bef 775 dev_err(bus->dev, "Bank switch failed: %d\n", ret);
ce6e74d0 776 goto error;
99b8a5d6
SK
777 }
778 }
779
ce6e74d0
SN
780 /*
781 * For multi link cases, it is expected that the bank switch is
782 * triggered by the post_bank_switch for the first Master in the list
783 * and for the other Masters the post_bank_switch() should return doing
784 * nothing.
785 */
48949722
VK
786 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
787 bus = m_rt->bus;
788 ops = bus->ops;
99b8a5d6 789
48949722
VK
790 /* Post-bank switch */
791 if (ops->post_bank_switch) {
792 ret = ops->post_bank_switch(bus);
793 if (ret < 0) {
794 dev_err(bus->dev,
62f0cec3
VK
795 "Post bank switch op failed: %d\n",
796 ret);
ce6e74d0 797 goto error;
48949722 798 }
ce6e74d0
SN
799 } else if (bus->multi_link && stream->m_rt_count > 1) {
800 dev_err(bus->dev,
17ed5bef 801 "Post bank switch ops not implemented\n");
ce6e74d0
SN
802 goto error;
803 }
804
805 /* Set the bank switch timeout to default, if not set */
806 if (!bus->bank_switch_timeout)
807 bus->bank_switch_timeout = DEFAULT_BANK_SWITCH_TIMEOUT;
808
809 /* Check if bank switch was successful */
810 ret = sdw_ml_sync_bank_switch(bus);
811 if (ret < 0) {
812 dev_err(bus->dev,
17ed5bef 813 "multi link bank switch failed: %d\n", ret);
ce6e74d0
SN
814 goto error;
815 }
816
9315d904
SK
817 if (bus->multi_link)
818 mutex_unlock(&bus->msg_lock);
ce6e74d0
SN
819 }
820
821 return ret;
822
823error:
824 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
ce6e74d0
SN
825 bus = m_rt->bus;
826
827 kfree(bus->defer_msg.msg->buf);
828 kfree(bus->defer_msg.msg);
829 }
830
831msg_unlock:
832
833 if (multi_link) {
834 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
835 bus = m_rt->bus;
836 if (mutex_is_locked(&bus->msg_lock))
837 mutex_unlock(&bus->msg_lock);
99b8a5d6
SK
838 }
839 }
840
841 return ret;
842}
843
89e59053
SK
844/**
845 * sdw_release_stream() - Free the assigned stream runtime
846 *
847 * @stream: SoundWire stream runtime
848 *
849 * sdw_release_stream should be called only once per stream
850 */
851void sdw_release_stream(struct sdw_stream_runtime *stream)
852{
853 kfree(stream);
854}
855EXPORT_SYMBOL(sdw_release_stream);
856
857/**
858 * sdw_alloc_stream() - Allocate and return stream runtime
859 *
860 * @stream_name: SoundWire stream name
861 *
862 * Allocates a SoundWire stream runtime instance.
863 * sdw_alloc_stream should be called only once per stream. Typically
864 * invoked from ALSA/ASoC machine/platform driver.
865 */
866struct sdw_stream_runtime *sdw_alloc_stream(char *stream_name)
867{
868 struct sdw_stream_runtime *stream;
869
870 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
871 if (!stream)
872 return NULL;
873
874 stream->name = stream_name;
0c4a1049 875 INIT_LIST_HEAD(&stream->master_list);
89e59053 876 stream->state = SDW_STREAM_ALLOCATED;
9b5c132a 877 stream->m_rt_count = 0;
89e59053
SK
878
879 return stream;
880}
881EXPORT_SYMBOL(sdw_alloc_stream);
882
48949722
VK
883static struct sdw_master_runtime
884*sdw_find_master_rt(struct sdw_bus *bus,
1fe74a5e 885 struct sdw_stream_runtime *stream)
48949722
VK
886{
887 struct sdw_master_runtime *m_rt = NULL;
888
889 /* Retrieve Bus handle if already available */
890 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
891 if (m_rt->bus == bus)
892 return m_rt;
893 }
894
895 return NULL;
896}
897
89e59053
SK
898/**
899 * sdw_alloc_master_rt() - Allocates and initialize Master runtime handle
900 *
901 * @bus: SDW bus instance
902 * @stream_config: Stream configuration
903 * @stream: Stream runtime handle.
904 *
905 * This function is to be called with bus_lock held.
906 */
907static struct sdw_master_runtime
908*sdw_alloc_master_rt(struct sdw_bus *bus,
1fe74a5e
PLB
909 struct sdw_stream_config *stream_config,
910 struct sdw_stream_runtime *stream)
89e59053
SK
911{
912 struct sdw_master_runtime *m_rt;
913
89e59053
SK
914 /*
915 * check if Master is already allocated (as a result of Slave adding
916 * it first), if so skip allocation and go to configure
917 */
48949722 918 m_rt = sdw_find_master_rt(bus, stream);
89e59053
SK
919 if (m_rt)
920 goto stream_config;
921
922 m_rt = kzalloc(sizeof(*m_rt), GFP_KERNEL);
923 if (!m_rt)
924 return NULL;
925
926 /* Initialization of Master runtime handle */
bbe7379d 927 INIT_LIST_HEAD(&m_rt->port_list);
89e59053 928 INIT_LIST_HEAD(&m_rt->slave_rt_list);
48949722 929 list_add_tail(&m_rt->stream_node, &stream->master_list);
89e59053
SK
930
931 list_add_tail(&m_rt->bus_node, &bus->m_rt_list);
932
933stream_config:
934 m_rt->ch_count = stream_config->ch_count;
935 m_rt->bus = bus;
936 m_rt->stream = stream;
937 m_rt->direction = stream_config->direction;
938
939 return m_rt;
940}
941
942/**
943 * sdw_alloc_slave_rt() - Allocate and initialize Slave runtime handle.
944 *
945 * @slave: Slave handle
946 * @stream_config: Stream configuration
947 * @stream: Stream runtime handle
948 *
949 * This function is to be called with bus_lock held.
950 */
951static struct sdw_slave_runtime
952*sdw_alloc_slave_rt(struct sdw_slave *slave,
1fe74a5e
PLB
953 struct sdw_stream_config *stream_config,
954 struct sdw_stream_runtime *stream)
89e59053
SK
955{
956 struct sdw_slave_runtime *s_rt = NULL;
957
958 s_rt = kzalloc(sizeof(*s_rt), GFP_KERNEL);
959 if (!s_rt)
960 return NULL;
961
bbe7379d 962 INIT_LIST_HEAD(&s_rt->port_list);
89e59053
SK
963 s_rt->ch_count = stream_config->ch_count;
964 s_rt->direction = stream_config->direction;
965 s_rt->slave = slave;
966
967 return s_rt;
968}
969
bbe7379d 970static void sdw_master_port_release(struct sdw_bus *bus,
1fe74a5e 971 struct sdw_master_runtime *m_rt)
bbe7379d
SK
972{
973 struct sdw_port_runtime *p_rt, *_p_rt;
974
1fe74a5e 975 list_for_each_entry_safe(p_rt, _p_rt, &m_rt->port_list, port_node) {
bbe7379d
SK
976 list_del(&p_rt->port_node);
977 kfree(p_rt);
978 }
979}
980
981static void sdw_slave_port_release(struct sdw_bus *bus,
1fe74a5e
PLB
982 struct sdw_slave *slave,
983 struct sdw_stream_runtime *stream)
bbe7379d
SK
984{
985 struct sdw_port_runtime *p_rt, *_p_rt;
48949722 986 struct sdw_master_runtime *m_rt;
bbe7379d
SK
987 struct sdw_slave_runtime *s_rt;
988
48949722
VK
989 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
990 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
48949722
VK
991 if (s_rt->slave != slave)
992 continue;
993
994 list_for_each_entry_safe(p_rt, _p_rt,
1fe74a5e 995 &s_rt->port_list, port_node) {
48949722
VK
996 list_del(&p_rt->port_node);
997 kfree(p_rt);
998 }
bbe7379d
SK
999 }
1000 }
1001}
1002
89e59053
SK
1003/**
1004 * sdw_release_slave_stream() - Free Slave(s) runtime handle
1005 *
1006 * @slave: Slave handle.
1007 * @stream: Stream runtime handle.
1008 *
1009 * This function is to be called with bus_lock held.
1010 */
1011static void sdw_release_slave_stream(struct sdw_slave *slave,
1fe74a5e 1012 struct sdw_stream_runtime *stream)
89e59053
SK
1013{
1014 struct sdw_slave_runtime *s_rt, *_s_rt;
48949722 1015 struct sdw_master_runtime *m_rt;
89e59053 1016
48949722
VK
1017 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1018 /* Retrieve Slave runtime handle */
1019 list_for_each_entry_safe(s_rt, _s_rt,
1fe74a5e 1020 &m_rt->slave_rt_list, m_rt_node) {
48949722
VK
1021 if (s_rt->slave == slave) {
1022 list_del(&s_rt->m_rt_node);
1023 kfree(s_rt);
1024 return;
1025 }
89e59053
SK
1026 }
1027 }
1028}
1029
1030/**
1031 * sdw_release_master_stream() - Free Master runtime handle
1032 *
48949722 1033 * @m_rt: Master runtime node
89e59053
SK
1034 * @stream: Stream runtime handle.
1035 *
1036 * This function is to be called with bus_lock held
1037 * It frees the Master runtime handle and associated Slave(s) runtime
1038 * handle. If this is called first then sdw_release_slave_stream() will have
1039 * no effect as Slave(s) runtime handle would already be freed up.
1040 */
48949722 1041static void sdw_release_master_stream(struct sdw_master_runtime *m_rt,
1fe74a5e 1042 struct sdw_stream_runtime *stream)
89e59053 1043{
89e59053
SK
1044 struct sdw_slave_runtime *s_rt, *_s_rt;
1045
8d6ccf5c
SK
1046 list_for_each_entry_safe(s_rt, _s_rt, &m_rt->slave_rt_list, m_rt_node) {
1047 sdw_slave_port_release(s_rt->slave->bus, s_rt->slave, stream);
1048 sdw_release_slave_stream(s_rt->slave, stream);
1049 }
89e59053 1050
48949722 1051 list_del(&m_rt->stream_node);
89e59053 1052 list_del(&m_rt->bus_node);
48949722 1053 kfree(m_rt);
89e59053
SK
1054}
1055
1056/**
1057 * sdw_stream_remove_master() - Remove master from sdw_stream
1058 *
1059 * @bus: SDW Bus instance
1060 * @stream: SoundWire stream
1061 *
bbe7379d 1062 * This removes and frees port_rt and master_rt from a stream
89e59053
SK
1063 */
1064int sdw_stream_remove_master(struct sdw_bus *bus,
1fe74a5e 1065 struct sdw_stream_runtime *stream)
89e59053 1066{
48949722
VK
1067 struct sdw_master_runtime *m_rt, *_m_rt;
1068
89e59053
SK
1069 mutex_lock(&bus->bus_lock);
1070
48949722 1071 list_for_each_entry_safe(m_rt, _m_rt,
1fe74a5e 1072 &stream->master_list, stream_node) {
48949722
VK
1073 if (m_rt->bus != bus)
1074 continue;
1075
1076 sdw_master_port_release(bus, m_rt);
1077 sdw_release_master_stream(m_rt, stream);
ce6e74d0 1078 stream->m_rt_count--;
48949722
VK
1079 }
1080
1081 if (list_empty(&stream->master_list))
1082 stream->state = SDW_STREAM_RELEASED;
89e59053
SK
1083
1084 mutex_unlock(&bus->bus_lock);
1085
1086 return 0;
1087}
1088EXPORT_SYMBOL(sdw_stream_remove_master);
1089
1090/**
1091 * sdw_stream_remove_slave() - Remove slave from sdw_stream
1092 *
1093 * @slave: SDW Slave instance
1094 * @stream: SoundWire stream
1095 *
bbe7379d 1096 * This removes and frees port_rt and slave_rt from a stream
89e59053
SK
1097 */
1098int sdw_stream_remove_slave(struct sdw_slave *slave,
1fe74a5e 1099 struct sdw_stream_runtime *stream)
89e59053
SK
1100{
1101 mutex_lock(&slave->bus->bus_lock);
1102
bbe7379d 1103 sdw_slave_port_release(slave->bus, slave, stream);
89e59053
SK
1104 sdw_release_slave_stream(slave, stream);
1105
1106 mutex_unlock(&slave->bus->bus_lock);
1107
1108 return 0;
1109}
1110EXPORT_SYMBOL(sdw_stream_remove_slave);
1111
1112/**
1113 * sdw_config_stream() - Configure the allocated stream
1114 *
1115 * @dev: SDW device
1116 * @stream: SoundWire stream
1117 * @stream_config: Stream configuration for audio stream
1118 * @is_slave: is API called from Slave or Master
1119 *
1120 * This function is to be called with bus_lock held.
1121 */
1122static int sdw_config_stream(struct device *dev,
1fe74a5e
PLB
1123 struct sdw_stream_runtime *stream,
1124 struct sdw_stream_config *stream_config,
1125 bool is_slave)
89e59053
SK
1126{
1127 /*
1128 * Update the stream rate, channel and bps based on data
1129 * source. For more than one data source (multilink),
1130 * match the rate, bps, stream type and increment number of channels.
1131 *
1132 * If rate/bps is zero, it means the values are not set, so skip
1133 * comparison and allow the value to be set and stored in stream
1134 */
1135 if (stream->params.rate &&
1fe74a5e 1136 stream->params.rate != stream_config->frame_rate) {
17ed5bef 1137 dev_err(dev, "rate not matching, stream:%s\n", stream->name);
89e59053
SK
1138 return -EINVAL;
1139 }
1140
1141 if (stream->params.bps &&
1fe74a5e 1142 stream->params.bps != stream_config->bps) {
17ed5bef 1143 dev_err(dev, "bps not matching, stream:%s\n", stream->name);
89e59053
SK
1144 return -EINVAL;
1145 }
1146
1147 stream->type = stream_config->type;
1148 stream->params.rate = stream_config->frame_rate;
1149 stream->params.bps = stream_config->bps;
1150
1151 /* TODO: Update this check during Device-device support */
1152 if (is_slave)
1153 stream->params.ch_count += stream_config->ch_count;
1154
1155 return 0;
1156}
1157
bbe7379d 1158static int sdw_is_valid_port_range(struct device *dev,
1fe74a5e 1159 struct sdw_port_runtime *p_rt)
bbe7379d
SK
1160{
1161 if (!SDW_VALID_PORT_RANGE(p_rt->num)) {
1162 dev_err(dev,
17ed5bef 1163 "SoundWire: Invalid port number :%d\n", p_rt->num);
bbe7379d
SK
1164 return -EINVAL;
1165 }
1166
1167 return 0;
1168}
1169
1fe74a5e
PLB
1170static struct sdw_port_runtime
1171*sdw_port_alloc(struct device *dev,
1172 struct sdw_port_config *port_config,
1173 int port_index)
bbe7379d
SK
1174{
1175 struct sdw_port_runtime *p_rt;
1176
1177 p_rt = kzalloc(sizeof(*p_rt), GFP_KERNEL);
1178 if (!p_rt)
1179 return NULL;
1180
1181 p_rt->ch_mask = port_config[port_index].ch_mask;
1182 p_rt->num = port_config[port_index].num;
1183
1184 return p_rt;
1185}
1186
1187static int sdw_master_port_config(struct sdw_bus *bus,
1fe74a5e
PLB
1188 struct sdw_master_runtime *m_rt,
1189 struct sdw_port_config *port_config,
1190 unsigned int num_ports)
bbe7379d
SK
1191{
1192 struct sdw_port_runtime *p_rt;
1193 int i;
1194
1195 /* Iterate for number of ports to perform initialization */
1196 for (i = 0; i < num_ports; i++) {
1197 p_rt = sdw_port_alloc(bus->dev, port_config, i);
1198 if (!p_rt)
1199 return -ENOMEM;
1200
1201 /*
1202 * TODO: Check port capabilities for requested
1203 * configuration (audio mode support)
1204 */
1205
1206 list_add_tail(&p_rt->port_node, &m_rt->port_list);
1207 }
1208
1209 return 0;
1210}
1211
1212static int sdw_slave_port_config(struct sdw_slave *slave,
1fe74a5e
PLB
1213 struct sdw_slave_runtime *s_rt,
1214 struct sdw_port_config *port_config,
1215 unsigned int num_config)
bbe7379d
SK
1216{
1217 struct sdw_port_runtime *p_rt;
1218 int i, ret;
1219
1220 /* Iterate for number of ports to perform initialization */
1221 for (i = 0; i < num_config; i++) {
1222 p_rt = sdw_port_alloc(&slave->dev, port_config, i);
1223 if (!p_rt)
1224 return -ENOMEM;
1225
1226 /*
1227 * TODO: Check valid port range as defined by DisCo/
1228 * slave
1229 */
1230 ret = sdw_is_valid_port_range(&slave->dev, p_rt);
1231 if (ret < 0) {
1232 kfree(p_rt);
1233 return ret;
1234 }
1235
1236 /*
1237 * TODO: Check port capabilities for requested
1238 * configuration (audio mode support)
1239 */
1240
1241 list_add_tail(&p_rt->port_node, &s_rt->port_list);
1242 }
1243
1244 return 0;
1245}
1246
89e59053
SK
1247/**
1248 * sdw_stream_add_master() - Allocate and add master runtime to a stream
1249 *
1250 * @bus: SDW Bus instance
1251 * @stream_config: Stream configuration for audio stream
bbe7379d
SK
1252 * @port_config: Port configuration for audio stream
1253 * @num_ports: Number of ports
89e59053
SK
1254 * @stream: SoundWire stream
1255 */
1256int sdw_stream_add_master(struct sdw_bus *bus,
1fe74a5e
PLB
1257 struct sdw_stream_config *stream_config,
1258 struct sdw_port_config *port_config,
1259 unsigned int num_ports,
1260 struct sdw_stream_runtime *stream)
89e59053
SK
1261{
1262 struct sdw_master_runtime *m_rt = NULL;
1263 int ret;
1264
1265 mutex_lock(&bus->bus_lock);
1266
ce6e74d0
SN
1267 /*
1268 * For multi link streams, add the second master only if
1269 * the bus supports it.
1270 * Check if bus->multi_link is set
1271 */
1272 if (!bus->multi_link && stream->m_rt_count > 0) {
1273 dev_err(bus->dev,
17ed5bef 1274 "Multilink not supported, link %d\n", bus->link_id);
ce6e74d0
SN
1275 ret = -EINVAL;
1276 goto unlock;
1277 }
1278
89e59053
SK
1279 m_rt = sdw_alloc_master_rt(bus, stream_config, stream);
1280 if (!m_rt) {
1281 dev_err(bus->dev,
17ed5bef 1282 "Master runtime config failed for stream:%s\n",
1fe74a5e 1283 stream->name);
89e59053 1284 ret = -ENOMEM;
3fef1a22 1285 goto unlock;
89e59053
SK
1286 }
1287
1288 ret = sdw_config_stream(bus->dev, stream, stream_config, false);
1289 if (ret)
1290 goto stream_error;
1291
bbe7379d
SK
1292 ret = sdw_master_port_config(bus, m_rt, port_config, num_ports);
1293 if (ret)
1294 goto stream_error;
1295
ce6e74d0
SN
1296 stream->m_rt_count++;
1297
3fef1a22
SN
1298 goto unlock;
1299
89e59053 1300stream_error:
48949722 1301 sdw_release_master_stream(m_rt, stream);
3fef1a22 1302unlock:
89e59053
SK
1303 mutex_unlock(&bus->bus_lock);
1304 return ret;
1305}
1306EXPORT_SYMBOL(sdw_stream_add_master);
1307
1308/**
1309 * sdw_stream_add_slave() - Allocate and add master/slave runtime to a stream
1310 *
1311 * @slave: SDW Slave instance
1312 * @stream_config: Stream configuration for audio stream
1313 * @stream: SoundWire stream
bbe7379d
SK
1314 * @port_config: Port configuration for audio stream
1315 * @num_ports: Number of ports
0aebe40b
SN
1316 *
1317 * It is expected that Slave is added before adding Master
1318 * to the Stream.
1319 *
89e59053
SK
1320 */
1321int sdw_stream_add_slave(struct sdw_slave *slave,
1fe74a5e
PLB
1322 struct sdw_stream_config *stream_config,
1323 struct sdw_port_config *port_config,
1324 unsigned int num_ports,
1325 struct sdw_stream_runtime *stream)
89e59053
SK
1326{
1327 struct sdw_slave_runtime *s_rt;
1328 struct sdw_master_runtime *m_rt;
1329 int ret;
1330
1331 mutex_lock(&slave->bus->bus_lock);
1332
1333 /*
1334 * If this API is invoked by Slave first then m_rt is not valid.
1335 * So, allocate m_rt and add Slave to it.
1336 */
1337 m_rt = sdw_alloc_master_rt(slave->bus, stream_config, stream);
1338 if (!m_rt) {
1339 dev_err(&slave->dev,
17ed5bef 1340 "alloc master runtime failed for stream:%s\n",
1fe74a5e 1341 stream->name);
89e59053
SK
1342 ret = -ENOMEM;
1343 goto error;
1344 }
1345
1346 s_rt = sdw_alloc_slave_rt(slave, stream_config, stream);
1347 if (!s_rt) {
1348 dev_err(&slave->dev,
17ed5bef 1349 "Slave runtime config failed for stream:%s\n",
1fe74a5e 1350 stream->name);
89e59053
SK
1351 ret = -ENOMEM;
1352 goto stream_error;
1353 }
1354
1355 ret = sdw_config_stream(&slave->dev, stream, stream_config, true);
1356 if (ret)
1357 goto stream_error;
1358
1359 list_add_tail(&s_rt->m_rt_node, &m_rt->slave_rt_list);
1360
bbe7379d
SK
1361 ret = sdw_slave_port_config(slave, s_rt, port_config, num_ports);
1362 if (ret)
1363 goto stream_error;
1364
0aebe40b
SN
1365 /*
1366 * Change stream state to CONFIGURED on first Slave add.
1367 * Bus is not aware of number of Slave(s) in a stream at this
1368 * point so cannot depend on all Slave(s) to be added in order to
1369 * change stream state to CONFIGURED.
1370 */
89e59053
SK
1371 stream->state = SDW_STREAM_CONFIGURED;
1372 goto error;
1373
1374stream_error:
1375 /*
1376 * we hit error so cleanup the stream, release all Slave(s) and
1377 * Master runtime
1378 */
48949722 1379 sdw_release_master_stream(m_rt, stream);
89e59053
SK
1380error:
1381 mutex_unlock(&slave->bus->bus_lock);
1382 return ret;
1383}
1384EXPORT_SYMBOL(sdw_stream_add_slave);
f8101c74
SK
1385
1386/**
1387 * sdw_get_slave_dpn_prop() - Get Slave port capabilities
1388 *
1389 * @slave: Slave handle
1390 * @direction: Data direction.
1391 * @port_num: Port number
1392 */
1393struct sdw_dpn_prop *sdw_get_slave_dpn_prop(struct sdw_slave *slave,
1fe74a5e
PLB
1394 enum sdw_data_direction direction,
1395 unsigned int port_num)
f8101c74
SK
1396{
1397 struct sdw_dpn_prop *dpn_prop;
1398 u8 num_ports;
1399 int i;
1400
1401 if (direction == SDW_DATA_DIR_TX) {
1402 num_ports = hweight32(slave->prop.source_ports);
1403 dpn_prop = slave->prop.src_dpn_prop;
1404 } else {
1405 num_ports = hweight32(slave->prop.sink_ports);
1406 dpn_prop = slave->prop.sink_dpn_prop;
1407 }
1408
1409 for (i = 0; i < num_ports; i++) {
03ecad90 1410 if (dpn_prop[i].num == port_num)
f8101c74
SK
1411 return &dpn_prop[i];
1412 }
1413
1414 return NULL;
1415}
5c3eb9f7 1416
0c4a1049
SK
1417/**
1418 * sdw_acquire_bus_lock: Acquire bus lock for all Master runtime(s)
1419 *
1420 * @stream: SoundWire stream
1421 *
1422 * Acquire bus_lock for each of the master runtime(m_rt) part of this
1423 * stream to reconfigure the bus.
1424 * NOTE: This function is called from SoundWire stream ops and is
1425 * expected that a global lock is held before acquiring bus_lock.
1426 */
1427static void sdw_acquire_bus_lock(struct sdw_stream_runtime *stream)
1428{
1429 struct sdw_master_runtime *m_rt = NULL;
1430 struct sdw_bus *bus = NULL;
1431
1432 /* Iterate for all Master(s) in Master list */
1433 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1434 bus = m_rt->bus;
1435
1436 mutex_lock(&bus->bus_lock);
1437 }
1438}
1439
1440/**
1441 * sdw_release_bus_lock: Release bus lock for all Master runtime(s)
1442 *
1443 * @stream: SoundWire stream
1444 *
1445 * Release the previously held bus_lock after reconfiguring the bus.
48949722
VK
1446 * NOTE: This function is called from SoundWire stream ops and is
1447 * expected that a global lock is held before releasing bus_lock.
0c4a1049
SK
1448 */
1449static void sdw_release_bus_lock(struct sdw_stream_runtime *stream)
1450{
1451 struct sdw_master_runtime *m_rt = NULL;
1452 struct sdw_bus *bus = NULL;
1453
1454 /* Iterate for all Master(s) in Master list */
1455 list_for_each_entry_reverse(m_rt, &stream->master_list, stream_node) {
1456 bus = m_rt->bus;
1457 mutex_unlock(&bus->bus_lock);
1458 }
1459}
1460
5c3eb9f7
SK
1461static int _sdw_prepare_stream(struct sdw_stream_runtime *stream)
1462{
48949722
VK
1463 struct sdw_master_runtime *m_rt = NULL;
1464 struct sdw_bus *bus = NULL;
5c3eb9f7
SK
1465 struct sdw_master_prop *prop = NULL;
1466 struct sdw_bus_params params;
1467 int ret;
1468
48949722
VK
1469 /* Prepare Master(s) and Slave(s) port(s) associated with stream */
1470 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1471 bus = m_rt->bus;
1472 prop = &bus->prop;
1473 memcpy(&params, &bus->params, sizeof(params));
5c3eb9f7 1474
48949722
VK
1475 /* TODO: Support Asynchronous mode */
1476 if ((prop->max_freq % stream->params.rate) != 0) {
17ed5bef 1477 dev_err(bus->dev, "Async mode not supported\n");
48949722
VK
1478 return -EINVAL;
1479 }
5c3eb9f7 1480
48949722
VK
1481 /* Increment cumulative bus bandwidth */
1482 /* TODO: Update this during Device-Device support */
1483 bus->params.bandwidth += m_rt->stream->params.rate *
1484 m_rt->ch_count * m_rt->stream->params.bps;
1485
1486 /* Program params */
1487 ret = sdw_program_params(bus);
1488 if (ret < 0) {
17ed5bef 1489 dev_err(bus->dev, "Program params failed: %d\n", ret);
48949722
VK
1490 goto restore_params;
1491 }
5c3eb9f7
SK
1492 }
1493
1494 ret = do_bank_switch(stream);
1495 if (ret < 0) {
17ed5bef 1496 dev_err(bus->dev, "Bank switch failed: %d\n", ret);
5c3eb9f7
SK
1497 goto restore_params;
1498 }
1499
48949722
VK
1500 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1501 bus = m_rt->bus;
1502
1503 /* Prepare port(s) on the new clock configuration */
1504 ret = sdw_prep_deprep_ports(m_rt, true);
1505 if (ret < 0) {
17ed5bef 1506 dev_err(bus->dev, "Prepare port(s) failed ret = %d\n",
1fe74a5e 1507 ret);
48949722
VK
1508 return ret;
1509 }
5c3eb9f7
SK
1510 }
1511
1512 stream->state = SDW_STREAM_PREPARED;
1513
1514 return ret;
1515
1516restore_params:
1517 memcpy(&bus->params, &params, sizeof(params));
1518 return ret;
1519}
1520
1521/**
1522 * sdw_prepare_stream() - Prepare SoundWire stream
1523 *
1524 * @stream: Soundwire stream
1525 *
34962fb8 1526 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
5c3eb9f7
SK
1527 */
1528int sdw_prepare_stream(struct sdw_stream_runtime *stream)
1529{
1530 int ret = 0;
1531
1532 if (!stream) {
17ed5bef 1533 pr_err("SoundWire: Handle not found for stream\n");
5c3eb9f7
SK
1534 return -EINVAL;
1535 }
1536
48949722 1537 sdw_acquire_bus_lock(stream);
5c3eb9f7
SK
1538
1539 ret = _sdw_prepare_stream(stream);
1540 if (ret < 0)
17ed5bef 1541 pr_err("Prepare for stream:%s failed: %d\n", stream->name, ret);
5c3eb9f7 1542
48949722 1543 sdw_release_bus_lock(stream);
5c3eb9f7
SK
1544 return ret;
1545}
1546EXPORT_SYMBOL(sdw_prepare_stream);
1547
1548static int _sdw_enable_stream(struct sdw_stream_runtime *stream)
1549{
48949722
VK
1550 struct sdw_master_runtime *m_rt = NULL;
1551 struct sdw_bus *bus = NULL;
5c3eb9f7
SK
1552 int ret;
1553
48949722
VK
1554 /* Enable Master(s) and Slave(s) port(s) associated with stream */
1555 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1556 bus = m_rt->bus;
5c3eb9f7 1557
48949722
VK
1558 /* Program params */
1559 ret = sdw_program_params(bus);
1560 if (ret < 0) {
17ed5bef 1561 dev_err(bus->dev, "Program params failed: %d\n", ret);
48949722
VK
1562 return ret;
1563 }
1564
1565 /* Enable port(s) */
1566 ret = sdw_enable_disable_ports(m_rt, true);
1567 if (ret < 0) {
62f0cec3
VK
1568 dev_err(bus->dev,
1569 "Enable port(s) failed ret: %d\n", ret);
48949722
VK
1570 return ret;
1571 }
5c3eb9f7
SK
1572 }
1573
1574 ret = do_bank_switch(stream);
1575 if (ret < 0) {
17ed5bef 1576 dev_err(bus->dev, "Bank switch failed: %d\n", ret);
5c3eb9f7
SK
1577 return ret;
1578 }
1579
1580 stream->state = SDW_STREAM_ENABLED;
1581 return 0;
1582}
1583
1584/**
1585 * sdw_enable_stream() - Enable SoundWire stream
1586 *
1587 * @stream: Soundwire stream
1588 *
34962fb8 1589 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
5c3eb9f7
SK
1590 */
1591int sdw_enable_stream(struct sdw_stream_runtime *stream)
1592{
1593 int ret = 0;
1594
1595 if (!stream) {
17ed5bef 1596 pr_err("SoundWire: Handle not found for stream\n");
5c3eb9f7
SK
1597 return -EINVAL;
1598 }
1599
48949722 1600 sdw_acquire_bus_lock(stream);
5c3eb9f7
SK
1601
1602 ret = _sdw_enable_stream(stream);
1603 if (ret < 0)
17ed5bef 1604 pr_err("Enable for stream:%s failed: %d\n", stream->name, ret);
5c3eb9f7 1605
48949722 1606 sdw_release_bus_lock(stream);
5c3eb9f7
SK
1607 return ret;
1608}
1609EXPORT_SYMBOL(sdw_enable_stream);
1610
1611static int _sdw_disable_stream(struct sdw_stream_runtime *stream)
1612{
48949722
VK
1613 struct sdw_master_runtime *m_rt = NULL;
1614 struct sdw_bus *bus = NULL;
5c3eb9f7
SK
1615 int ret;
1616
48949722
VK
1617 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1618 bus = m_rt->bus;
1619 /* Disable port(s) */
1620 ret = sdw_enable_disable_ports(m_rt, false);
1621 if (ret < 0) {
17ed5bef 1622 dev_err(bus->dev, "Disable port(s) failed: %d\n", ret);
48949722
VK
1623 return ret;
1624 }
5c3eb9f7 1625 }
5c3eb9f7
SK
1626 stream->state = SDW_STREAM_DISABLED;
1627
48949722
VK
1628 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1629 bus = m_rt->bus;
1630 /* Program params */
1631 ret = sdw_program_params(bus);
1632 if (ret < 0) {
17ed5bef 1633 dev_err(bus->dev, "Program params failed: %d\n", ret);
48949722
VK
1634 return ret;
1635 }
5c3eb9f7
SK
1636 }
1637
1638 return do_bank_switch(stream);
1639}
1640
1641/**
1642 * sdw_disable_stream() - Disable SoundWire stream
1643 *
1644 * @stream: Soundwire stream
1645 *
34962fb8 1646 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
5c3eb9f7
SK
1647 */
1648int sdw_disable_stream(struct sdw_stream_runtime *stream)
1649{
1650 int ret = 0;
1651
1652 if (!stream) {
17ed5bef 1653 pr_err("SoundWire: Handle not found for stream\n");
5c3eb9f7
SK
1654 return -EINVAL;
1655 }
1656
48949722 1657 sdw_acquire_bus_lock(stream);
5c3eb9f7
SK
1658
1659 ret = _sdw_disable_stream(stream);
1660 if (ret < 0)
17ed5bef 1661 pr_err("Disable for stream:%s failed: %d\n", stream->name, ret);
5c3eb9f7 1662
48949722 1663 sdw_release_bus_lock(stream);
5c3eb9f7
SK
1664 return ret;
1665}
1666EXPORT_SYMBOL(sdw_disable_stream);
1667
1668static int _sdw_deprepare_stream(struct sdw_stream_runtime *stream)
1669{
48949722
VK
1670 struct sdw_master_runtime *m_rt = NULL;
1671 struct sdw_bus *bus = NULL;
5c3eb9f7
SK
1672 int ret = 0;
1673
48949722
VK
1674 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1675 bus = m_rt->bus;
1676 /* De-prepare port(s) */
1677 ret = sdw_prep_deprep_ports(m_rt, false);
1678 if (ret < 0) {
62f0cec3
VK
1679 dev_err(bus->dev,
1680 "De-prepare port(s) failed: %d\n", ret);
48949722
VK
1681 return ret;
1682 }
5c3eb9f7 1683
48949722
VK
1684 /* TODO: Update this during Device-Device support */
1685 bus->params.bandwidth -= m_rt->stream->params.rate *
1686 m_rt->ch_count * m_rt->stream->params.bps;
5c3eb9f7 1687
48949722
VK
1688 /* Program params */
1689 ret = sdw_program_params(bus);
1690 if (ret < 0) {
17ed5bef 1691 dev_err(bus->dev, "Program params failed: %d\n", ret);
48949722
VK
1692 return ret;
1693 }
5c3eb9f7
SK
1694 }
1695
48949722 1696 stream->state = SDW_STREAM_DEPREPARED;
5c3eb9f7
SK
1697 return do_bank_switch(stream);
1698}
1699
1700/**
1701 * sdw_deprepare_stream() - Deprepare SoundWire stream
1702 *
1703 * @stream: Soundwire stream
1704 *
34962fb8 1705 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
5c3eb9f7
SK
1706 */
1707int sdw_deprepare_stream(struct sdw_stream_runtime *stream)
1708{
1709 int ret = 0;
1710
1711 if (!stream) {
17ed5bef 1712 pr_err("SoundWire: Handle not found for stream\n");
5c3eb9f7
SK
1713 return -EINVAL;
1714 }
1715
48949722 1716 sdw_acquire_bus_lock(stream);
5c3eb9f7
SK
1717 ret = _sdw_deprepare_stream(stream);
1718 if (ret < 0)
17ed5bef 1719 pr_err("De-prepare for stream:%d failed: %d\n", ret, ret);
5c3eb9f7 1720
48949722 1721 sdw_release_bus_lock(stream);
5c3eb9f7
SK
1722 return ret;
1723}
1724EXPORT_SYMBOL(sdw_deprepare_stream);