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Commit | Line | Data |
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ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
8ae12a0d DB |
2 | # |
3 | # SPI driver configuration | |
4 | # | |
79d8c7a8 | 5 | menuconfig SPI |
8ae12a0d | 6 | bool "SPI support" |
79d8c7a8 | 7 | depends on HAS_IOMEM |
8ae12a0d DB |
8 | help |
9 | The "Serial Peripheral Interface" is a low level synchronous | |
10 | protocol. Chips that support SPI can have data transfer rates | |
11 | up to several tens of Mbit/sec. Chips are addressed with a | |
12 | controller and a chipselect. Most SPI slaves don't support | |
13 | dynamic device discovery; some are even write-only or read-only. | |
14 | ||
3cb2fccc | 15 | SPI is widely used by microcontrollers to talk with sensors, |
8ae12a0d DB |
16 | eeprom and flash memory, codecs and various other controller |
17 | chips, analog to digital (and d-to-a) converters, and more. | |
18 | MMC and SD cards can be accessed using SPI protocol; and for | |
19 | DataFlash cards used in MMC sockets, SPI must always be used. | |
20 | ||
21 | SPI is one of a family of similar protocols using a four wire | |
22 | interface (select, clock, data in, data out) including Microwire | |
23 | (half duplex), SSP, SSI, and PSP. This driver framework should | |
24 | work with most such devices and controllers. | |
25 | ||
79d8c7a8 AG |
26 | if SPI |
27 | ||
8ae12a0d | 28 | config SPI_DEBUG |
6341e62b | 29 | bool "Debug support for SPI drivers" |
79d8c7a8 | 30 | depends on DEBUG_KERNEL |
8ae12a0d DB |
31 | help |
32 | Say "yes" to enable debug messaging (like dev_dbg and pr_debug), | |
33 | sysfs, and debugfs support in SPI controller and protocol drivers. | |
34 | ||
35 | # | |
36 | # MASTER side ... talking to discrete SPI slave chips including microcontrollers | |
37 | # | |
38 | ||
39 | config SPI_MASTER | |
6341e62b CJ |
40 | # bool "SPI Master Support" |
41 | bool | |
8ae12a0d DB |
42 | default SPI |
43 | help | |
44 | If your system has an master-capable SPI controller (which | |
45 | provides the clock and chipselect), you can enable that | |
46 | controller and the protocol drivers for the SPI slave chips | |
47 | that are connected. | |
48 | ||
6291fe2a RD |
49 | if SPI_MASTER |
50 | ||
c36ff266 BB |
51 | config SPI_MEM |
52 | bool "SPI memory extension" | |
53 | help | |
54 | Enable this option if you want to enable the SPI memory extension. | |
55 | This extension is meant to simplify interaction with SPI memories | |
29e795ca | 56 | by providing a high-level interface to send memory-like commands. |
c36ff266 | 57 | |
8ae12a0d | 58 | comment "SPI Master Controller Drivers" |
8ae12a0d | 59 | |
0b782531 | 60 | config SPI_ALTERA |
b0c3d935 MG |
61 | tristate "Altera SPI Controller platform driver" |
62 | select SPI_ALTERA_CORE | |
3c651973 | 63 | select REGMAP_MMIO |
0b782531 TC |
64 | help |
65 | This is the driver for the Altera SPI Controller. | |
66 | ||
b0c3d935 MG |
67 | config SPI_ALTERA_CORE |
68 | tristate "Altera SPI Controller core code" | |
69 | select REGMAP | |
70 | help | |
71 | "The core code for the Altera SPI Controller" | |
72 | ||
ba2fc167 MG |
73 | config SPI_ALTERA_DFL |
74 | tristate "DFL bus driver for Altera SPI Controller" | |
75 | depends on FPGA_DFL | |
76 | select SPI_ALTERA_CORE | |
77 | help | |
78 | This is a Device Feature List (DFL) bus driver for the | |
79 | Altera SPI master controller. The SPI master is connected | |
80 | to a SPI slave to Avalon bridge in a Intel MAX BMC. | |
81 | ||
047980c5 CG |
82 | config SPI_AR934X |
83 | tristate "Qualcomm Atheros AR934X/QCA95XX SPI controller driver" | |
84 | depends on ATH79 || COMPILE_TEST | |
85 | help | |
86 | This enables support for the SPI controller present on the | |
87 | Qualcomm Atheros AR934X/QCA95XX SoCs. | |
88 | ||
8efaef4d GJ |
89 | config SPI_ATH79 |
90 | tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver" | |
b172fd0c | 91 | depends on ATH79 || COMPILE_TEST |
8efaef4d GJ |
92 | select SPI_BITBANG |
93 | help | |
94 | This enables support for the SPI controller present on the | |
95 | Atheros AR71XX/AR724X/AR913X SoCs. | |
96 | ||
5762ab71 RP |
97 | config SPI_ARMADA_3700 |
98 | tristate "Marvell Armada 3700 SPI Controller" | |
99 | depends on (ARCH_MVEBU && OF) || COMPILE_TEST | |
100 | help | |
101 | This enables support for the SPI controller present on the | |
102 | Marvell Armada 3700 SoCs. | |
103 | ||
754ce4f2 HS |
104 | config SPI_ATMEL |
105 | tristate "Atmel SPI Controller" | |
a687a533 | 106 | depends on ARCH_AT91 || COMPILE_TEST |
1cb84b02 | 107 | depends on OF |
754ce4f2 HS |
108 | help |
109 | This selects a driver for the Atmel SPI Controller, present on | |
a687a533 | 110 | many AT91 ARM chips. |
754ce4f2 | 111 | |
e1892546 RP |
112 | config SPI_AT91_USART |
113 | tristate "Atmel USART Controller SPI driver" | |
114 | depends on (ARCH_AT91 || COMPILE_TEST) | |
115 | depends on MFD_AT91_USART | |
116 | help | |
117 | This selects a driver for the AT91 USART Controller as SPI Master, | |
118 | present on AT91 and SAMA5 SoC series. | |
119 | ||
0e6aae08 PB |
120 | config SPI_ATMEL_QUADSPI |
121 | tristate "Atmel Quad SPI Controller" | |
b780c3f3 | 122 | depends on ARCH_AT91 || COMPILE_TEST |
0e6aae08 PB |
123 | depends on OF && HAS_IOMEM |
124 | help | |
125 | This enables support for the Quad SPI controller in master mode. | |
126 | This driver does not support generic SPI. The implementation only | |
127 | supports spi-mem interface. | |
128 | ||
e32bb870 MB |
129 | config SPI_AU1550 |
130 | tristate "Au1550/Au1200/Au1300 SPI Controller" | |
131 | depends on MIPS_ALCHEMY | |
132 | select SPI_BITBANG | |
133 | help | |
134 | If you say yes to this option, support will be included for the | |
135 | PSC SPI controller found on Au1550, Au1200 and Au1300 series. | |
136 | ||
b1353d1c LPC |
137 | config SPI_AXI_SPI_ENGINE |
138 | tristate "Analog Devices AXI SPI Engine controller" | |
139 | depends on HAS_IOMEM | |
140 | help | |
141 | This enables support for the Analog Devices AXI SPI Engine SPI controller. | |
142 | It is part of the SPI Engine framework that is used in some Analog Devices | |
143 | reference designs for FPGAs. | |
144 | ||
f8043872 CB |
145 | config SPI_BCM2835 |
146 | tristate "BCM2835 SPI controller" | |
e0d58cdc | 147 | depends on GPIOLIB |
35ceb675 | 148 | depends on ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST |
f8043872 CB |
149 | help |
150 | This selects a driver for the Broadcom BCM2835 SPI master. | |
151 | ||
152 | The BCM2835 contains two types of SPI master controller; the | |
153 | "universal SPI master", and the regular SPI controller. This driver | |
154 | is for the regular SPI controller. Slave mode operation is not also | |
155 | not supported. | |
156 | ||
1ea29b39 MS |
157 | config SPI_BCM2835AUX |
158 | tristate "BCM2835 SPI auxiliary controller" | |
35ceb675 | 159 | depends on ((ARCH_BCM2835 || ARCH_BRCMSTB) && GPIOLIB) || COMPILE_TEST |
1ea29b39 MS |
160 | help |
161 | This selects a driver for the Broadcom BCM2835 SPI aux master. | |
162 | ||
163 | The BCM2835 contains two types of SPI master controller; the | |
164 | "universal SPI master", and the regular SPI controller. | |
165 | This driver is for the universal/auxiliary SPI controller. | |
166 | ||
b42dfed8 FF |
167 | config SPI_BCM63XX |
168 | tristate "Broadcom BCM63xx SPI controller" | |
3a521450 | 169 | depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST |
b42dfed8 | 170 | help |
554bbe72 | 171 | Enable support for the SPI controller on the Broadcom BCM63xx SoCs. |
b42dfed8 | 172 | |
142168eb JG |
173 | config SPI_BCM63XX_HSSPI |
174 | tristate "Broadcom BCM63XX HS SPI controller driver" | |
ba2137f3 | 175 | depends on BCM63XX || BMIPS_GENERIC || ARCH_BCM_63XX || COMPILE_TEST |
142168eb JG |
176 | help |
177 | This enables support for the High Speed SPI controller present on | |
178 | newer Broadcom BCM63XX SoCs. | |
179 | ||
fa236a7e KD |
180 | config SPI_BCM_QSPI |
181 | tristate "Broadcom BSPI and MSPI controller support" | |
279e4af7 JS |
182 | depends on ARCH_BRCMSTB || ARCH_BCM || ARCH_BCM_IPROC || \ |
183 | BMIPS_GENERIC || COMPILE_TEST | |
fa236a7e KD |
184 | default ARCH_BCM_IPROC |
185 | help | |
186 | Enables support for the Broadcom SPI flash and MSPI controller. | |
187 | Select this option for any one of BRCMSTB, iProc NSP and NS2 SoCs | |
3e84cdd4 | 188 | based platforms. This driver works for both SPI master for SPI NOR |
fa236a7e KD |
189 | flash device as well as MSPI device. |
190 | ||
9904f22a | 191 | config SPI_BITBANG |
d29389de | 192 | tristate "Utilities for Bitbanging SPI masters" |
9904f22a DB |
193 | help |
194 | With a few GPIO pins, your system can bitbang the SPI protocol. | |
195 | Select this to get SPI support through I/O pins (GPIO, parallel | |
196 | port, etc). Or, some systems' SPI master controller drivers use | |
197 | this code to manage the per-word or per-transfer accesses to the | |
198 | hardware shift registers. | |
199 | ||
200 | This is library code, and is automatically selected by drivers that | |
201 | need it. You only need to select this explicitly to support driver | |
202 | modules that aren't part of this kernel tree. | |
8ae12a0d | 203 | |
7111763d DB |
204 | config SPI_BUTTERFLY |
205 | tristate "Parallel port adapter for AVR Butterfly (DEVELOPMENT)" | |
6291fe2a | 206 | depends on PARPORT |
7111763d DB |
207 | select SPI_BITBANG |
208 | help | |
209 | This uses a custom parallel port cable to connect to an AVR | |
210 | Butterfly <http://www.atmel.com/products/avr/butterfly>, an | |
211 | inexpensive battery powered microcontroller evaluation board. | |
212 | This same cable can be used to flash new firmware. | |
213 | ||
c474b386 HK |
214 | config SPI_CADENCE |
215 | tristate "Cadence SPI controller" | |
c474b386 HK |
216 | help |
217 | This selects the Cadence SPI controller master driver | |
38b6484e | 218 | used by Xilinx Zynq and ZynqMP. |
c474b386 | 219 | |
31fb632b RVM |
220 | config SPI_CADENCE_QUADSPI |
221 | tristate "Cadence Quad SPI controller" | |
ab2d2875 | 222 | depends on OF && (ARM || ARM64 || X86 || COMPILE_TEST) |
31fb632b RVM |
223 | help |
224 | Enable support for the Cadence Quad SPI Flash controller. | |
225 | ||
226 | Cadence QSPI is a specialized controller for connecting an SPI | |
227 | Flash over 1/2/4-bit wide bus. Enable this option if you have a | |
228 | device with a Cadence QSPI controller and want to access the | |
229 | Flash as an MTD device. | |
230 | ||
161b96c3 AS |
231 | config SPI_CLPS711X |
232 | tristate "CLPS711X host SPI controller" | |
5634dd8b | 233 | depends on ARCH_CLPS711X || COMPILE_TEST |
161b96c3 AS |
234 | help |
235 | This enables dedicated general purpose SPI/Microwire1-compatible | |
236 | master mode interface (SSI1) for CLPS711X-based CPUs. | |
237 | ||
34b8c661 SK |
238 | config SPI_COLDFIRE_QSPI |
239 | tristate "Freescale Coldfire QSPI controller" | |
bce4d12b | 240 | depends on (M520x || M523x || M5249 || M525x || M527x || M528x || M532x) |
34b8c661 SK |
241 | help |
242 | This enables support for the Coldfire QSPI controller in master | |
243 | mode. | |
244 | ||
358934a6 | 245 | config SPI_DAVINCI |
23ce17ad | 246 | tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller" |
78848914 | 247 | depends on ARCH_DAVINCI || ARCH_KEYSTONE |
358934a6 SP |
248 | select SPI_BITBANG |
249 | help | |
23ce17ad SN |
250 | SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules. |
251 | ||
e32bb870 MB |
252 | config SPI_DESIGNWARE |
253 | tristate "DesignWare SPI controller core support" | |
6423207e | 254 | imply SPI_MEM |
e32bb870 MB |
255 | help |
256 | general driver for SPI controller core from DesignWare | |
257 | ||
ecb3a67e SS |
258 | if SPI_DESIGNWARE |
259 | ||
6c710c0c SS |
260 | config SPI_DW_DMA |
261 | bool "DMA support for DW SPI controller" | |
6c710c0c | 262 | |
e32bb870 MB |
263 | config SPI_DW_PCI |
264 | tristate "PCI interface driver for DW SPI core" | |
ecb3a67e | 265 | depends on PCI |
e32bb870 | 266 | |
e32bb870 MB |
267 | config SPI_DW_MMIO |
268 | tristate "Memory-mapped io interface driver for DW SPI core" | |
ecb3a67e SS |
269 | depends on HAS_IOMEM |
270 | ||
abf00907 SS |
271 | config SPI_DW_BT1 |
272 | tristate "Baikal-T1 SPI driver for DW SPI core" | |
273 | depends on MIPS_BAIKAL_T1 || COMPILE_TEST | |
72188381 SS |
274 | select MULTIPLEXER |
275 | select MUX_MMIO | |
abf00907 SS |
276 | help |
277 | Baikal-T1 SoC is equipped with three DW APB SSI-based MMIO SPI | |
278 | controllers. Two of them are pretty much normal: with IRQ, DMA, | |
279 | FIFOs of 64 words depth, 4x CSs, but the third one as being a | |
280 | part of the Baikal-T1 System Boot Controller has got a very | |
281 | limited resources: no IRQ, no DMA, only a single native | |
282 | chip-select and Tx/Rx FIFO with just 8 words depth available. | |
283 | The later one is normally connected to an external SPI-nor flash | |
284 | of 128Mb (in general can be of bigger size). | |
285 | ||
286 | config SPI_DW_BT1_DIRMAP | |
287 | bool "Directly mapped Baikal-T1 Boot SPI flash support" | |
288 | depends on SPI_DW_BT1 | |
abf00907 SS |
289 | help |
290 | Directly mapped SPI flash memory is an interface specific to the | |
291 | Baikal-T1 System Boot Controller. It is a 16MB MMIO region, which | |
292 | can be used to access a peripheral memory device just by | |
293 | reading/writing data from/to it. Note that the system APB bus | |
294 | will stall during each IO from/to the dirmap region until the | |
295 | operation is finished. So try not to use it concurrently with | |
296 | time-critical tasks (like the SPI memory operations implemented | |
297 | in this driver). | |
298 | ||
ecb3a67e | 299 | endif |
e32bb870 | 300 | |
3d8c0d74 LP |
301 | config SPI_DLN2 |
302 | tristate "Diolan DLN-2 USB SPI adapter" | |
303 | depends on MFD_DLN2 | |
304 | help | |
554bbe72 KK |
305 | If you say yes to this option, support will be included for Diolan |
306 | DLN2, a USB to SPI interface. | |
3d8c0d74 | 307 | |
554bbe72 KK |
308 | This driver can also be built as a module. If so, the module |
309 | will be called spi-dln2. | |
3d8c0d74 | 310 | |
011f23a3 MW |
311 | config SPI_EP93XX |
312 | tristate "Cirrus Logic EP93xx SPI controller" | |
dd1053a9 | 313 | depends on ARCH_EP93XX || COMPILE_TEST |
011f23a3 MW |
314 | help |
315 | This enables using the Cirrus EP93xx SPI controller in master | |
316 | mode. | |
317 | ||
6cd3c7e2 | 318 | config SPI_FALCON |
9c6a3af0 | 319 | bool "Falcon SPI controller support" |
6cd3c7e2 TL |
320 | depends on SOC_FALCON |
321 | help | |
322 | The external bus unit (EBU) found on the FALC-ON SoC has SPI | |
323 | emulation that is designed for serial flash access. This driver | |
324 | has only been tested with m25p80 type chips. The hardware has no | |
325 | support for other types of SPI peripherals. | |
326 | ||
bbb6b2f9 EJ |
327 | config SPI_FSI |
328 | tristate "FSI SPI driver" | |
329 | depends on FSI | |
330 | help | |
331 | This enables support for the driver for FSI bus attached SPI | |
332 | controllers. | |
333 | ||
5314987d GP |
334 | config SPI_FSL_LPSPI |
335 | tristate "Freescale i.MX LPSPI controller" | |
336 | depends on ARCH_MXC || COMPILE_TEST | |
337 | help | |
338 | This enables Freescale i.MX LPSPI controllers in master mode. | |
339 | ||
84d04318 FS |
340 | config SPI_FSL_QUADSPI |
341 | tristate "Freescale QSPI controller" | |
342 | depends on ARCH_MXC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST | |
343 | depends on HAS_IOMEM | |
344 | help | |
345 | This enables support for the Quad SPI controller in master mode. | |
346 | Up to four flash chips can be connected on two buses with two | |
347 | chipselects each. | |
348 | This controller does not support generic SPI messages. It only | |
349 | supports the high-level SPI memory interface. | |
350 | ||
c770d863 JF |
351 | config SPI_HISI_KUNPENG |
352 | tristate "HiSilicon SPI Controller for Kunpeng SoCs" | |
353 | depends on (ARM64 && ACPI) || COMPILE_TEST | |
354 | help | |
355 | This enables support for HiSilicon SPI controller found on | |
356 | Kunpeng SoCs. | |
357 | ||
358 | This driver can also be built as a module. If so, the module | |
359 | will be called hisi-kunpeng-spi. | |
360 | ||
a2ca53b5 | 361 | config SPI_HISI_SFC_V3XX |
3e84cdd4 | 362 | tristate "HiSilicon SPI NOR Flash Controller for Hi16XX chipsets" |
a2ca53b5 JG |
363 | depends on (ARM64 && ACPI) || COMPILE_TEST |
364 | depends on HAS_IOMEM | |
a2ca53b5 | 365 | help |
3e84cdd4 | 366 | This enables support for HiSilicon v3xx SPI NOR flash controller |
a2ca53b5 JG |
367 | found in hi16xx chipsets. |
368 | ||
a5356aef YNG |
369 | config SPI_NXP_FLEXSPI |
370 | tristate "NXP Flex SPI controller" | |
371 | depends on ARCH_LAYERSCAPE || HAS_IOMEM | |
372 | help | |
373 | This enables support for the Flex SPI controller in master mode. | |
374 | Up to four slave devices can be connected on two buses with two | |
375 | chipselects each. | |
376 | This controller does not support generic SPI messages and only | |
377 | supports the high-level SPI memory interface. | |
378 | ||
d29389de DB |
379 | config SPI_GPIO |
380 | tristate "GPIO-based bitbanging SPI Master" | |
5c2301a9 | 381 | depends on GPIOLIB || COMPILE_TEST |
d29389de DB |
382 | select SPI_BITBANG |
383 | help | |
384 | This simple GPIO bitbanging SPI master uses the arch-neutral GPIO | |
385 | interface to manage MOSI, MISO, SCK, and chipselect signals. SPI | |
386 | slaves connected to a bus using this driver are configured as usual, | |
387 | except that the spi_board_info.controller_data holds the GPIO number | |
388 | for the chipselect used by this controller driver. | |
389 | ||
390 | Note that this driver often won't achieve even 1 Mbit/sec speeds, | |
391 | making it unusually slow for SPI. If your platform can inline | |
392 | GPIO operations, you should be able to leverage that for better | |
393 | speed with a custom version of this driver; see the source code. | |
394 | ||
deba2580 AB |
395 | config SPI_IMG_SPFI |
396 | tristate "IMG SPFI controller" | |
397 | depends on MIPS || COMPILE_TEST | |
398 | help | |
399 | This enables support for the SPFI master controller found on | |
400 | IMG SoCs. | |
401 | ||
b5f3294f SH |
402 | config SPI_IMX |
403 | tristate "Freescale i.MX SPI controllers" | |
dd1053a9 | 404 | depends on ARCH_MXC || COMPILE_TEST |
b5f3294f SH |
405 | select SPI_BITBANG |
406 | help | |
2e236baf | 407 | This enables support for the Freescale i.MX SPI controllers. |
b5f3294f | 408 | |
2cb1b3b3 RF |
409 | config SPI_JCORE |
410 | tristate "J-Core SPI Master" | |
411 | depends on OF && (SUPERH || COMPILE_TEST) | |
412 | help | |
413 | This enables support for the SPI master controller in the J-Core | |
414 | synthesizable, open source SoC. | |
415 | ||
78961a57 KB |
416 | config SPI_LM70_LLP |
417 | tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)" | |
6d1f56aa | 418 | depends on PARPORT |
78961a57 KB |
419 | select SPI_BITBANG |
420 | help | |
421 | This driver supports the NS LM70 LLP Evaluation Board, | |
422 | which interfaces to an LM70 temperature sensor using | |
423 | a parallel port. | |
424 | ||
7ecbfff6 SI |
425 | config SPI_LP8841_RTC |
426 | tristate "ICP DAS LP-8841 SPI Controller for RTC" | |
427 | depends on MACH_PXA27X_DT || COMPILE_TEST | |
428 | help | |
429 | This driver provides an SPI master device to drive Maxim | |
430 | DS-1302 real time clock. | |
431 | ||
432 | Say N here unless you plan to run the kernel on an ICP DAS | |
433 | LP-8x4x industrial computer. | |
434 | ||
42bbb709 GL |
435 | config SPI_MPC52xx |
436 | tristate "Freescale MPC52xx SPI (non-PSC) controller support" | |
7433f2b7 | 437 | depends on PPC_MPC52xx |
42bbb709 GL |
438 | help |
439 | This drivers supports the MPC52xx SPI controller in master SPI | |
440 | mode. | |
441 | ||
00b8fd23 DC |
442 | config SPI_MPC52xx_PSC |
443 | tristate "Freescale MPC52xx PSC SPI controller" | |
6d1f56aa | 444 | depends on PPC_MPC52xx |
00b8fd23 DC |
445 | help |
446 | This enables using the Freescale MPC52xx Programmable Serial | |
447 | Controller in master SPI mode. | |
448 | ||
6e27388f AG |
449 | config SPI_MPC512x_PSC |
450 | tristate "Freescale MPC512x PSC SPI controller" | |
5e8afa34 | 451 | depends on PPC_MPC512x |
6e27388f AG |
452 | help |
453 | This enables using the Freescale MPC5121 Programmable Serial | |
454 | Controller in SPI master mode. | |
455 | ||
b36ece83 | 456 | config SPI_FSL_LIB |
e8beacbb AL |
457 | tristate |
458 | depends on OF | |
459 | ||
460 | config SPI_FSL_CPM | |
b36ece83 MH |
461 | tristate |
462 | depends on FSL_SOC | |
463 | ||
3272029f | 464 | config SPI_FSL_SPI |
38455d7a | 465 | tristate "Freescale SPI controller and Aeroflex Gaisler GRLIB SPI controller" |
e8beacbb | 466 | depends on OF |
b36ece83 | 467 | select SPI_FSL_LIB |
e8beacbb | 468 | select SPI_FSL_CPM if FSL_SOC |
ccf06998 | 469 | help |
3272029f MH |
470 | This enables using the Freescale SPI controllers in master mode. |
471 | MPC83xx platform uses the controller in cpu mode or CPM/QE mode. | |
472 | MPC8569 uses the controller in QE mode, MPC8610 in cpu mode. | |
447b0c7b AL |
473 | This also enables using the Aeroflex Gaisler GRLIB SPI controller in |
474 | master mode. | |
ccf06998 | 475 | |
349ad66c CF |
476 | config SPI_FSL_DSPI |
477 | tristate "Freescale DSPI controller" | |
1acbdeb9 | 478 | select REGMAP_MMIO |
ec7ed770 | 479 | depends on SOC_VF610 || SOC_LS1021A || ARCH_LAYERSCAPE || M5441x || COMPILE_TEST |
349ad66c CF |
480 | help |
481 | This enables support for the Freescale DSPI controller in master | |
0dcdcd0e | 482 | mode. VF610, LS1021A and ColdFire platforms uses the controller. |
349ad66c | 483 | |
8b60d6c2 | 484 | config SPI_FSL_ESPI |
38455d7a | 485 | tristate "Freescale eSPI controller" |
8b60d6c2 | 486 | depends on FSL_SOC |
8b60d6c2 MH |
487 | help |
488 | This enables using the Freescale eSPI controllers in master mode. | |
489 | From MPC8536, 85xx platform uses the controller, and all P10xx, | |
490 | P20xx, P30xx,P40xx, P50xx uses this controller. | |
491 | ||
454fa271 NA |
492 | config SPI_MESON_SPICC |
493 | tristate "Amlogic Meson SPICC controller" | |
3e0cf4d3 | 494 | depends on COMMON_CLK |
454fa271 NA |
495 | depends on ARCH_MESON || COMPILE_TEST |
496 | help | |
497 | This enables master mode support for the SPICC (SPI communication | |
498 | controller) available in Amlogic Meson SoCs. | |
499 | ||
c3e4bc54 BG |
500 | config SPI_MESON_SPIFC |
501 | tristate "Amlogic Meson SPIFC controller" | |
502 | depends on ARCH_MESON || COMPILE_TEST | |
1327ecd4 | 503 | select REGMAP_MMIO |
c3e4bc54 BG |
504 | help |
505 | This enables master mode support for the SPIFC (SPI flash | |
506 | controller) available in Amlogic Meson SoCs. | |
507 | ||
a568231f LL |
508 | config SPI_MT65XX |
509 | tristate "MediaTek SPI controller" | |
510 | depends on ARCH_MEDIATEK || COMPILE_TEST | |
511 | help | |
512 | This selects the MediaTek(R) SPI bus driver. | |
513 | If you want to use MediaTek(R) SPI interface, | |
514 | say Y or M here.If you are not sure, say N. | |
515 | SPI drivers for Mediatek MT65XX and MT81XX series ARM SoCs. | |
516 | ||
cbd66c62 SR |
517 | config SPI_MT7621 |
518 | tristate "MediaTek MT7621 SPI Controller" | |
519 | depends on RALINK || COMPILE_TEST | |
520 | help | |
521 | This selects a driver for the MediaTek MT7621 SPI Controller. | |
522 | ||
881d1ee9 CG |
523 | config SPI_MTK_NOR |
524 | tristate "MediaTek SPI NOR controller" | |
525 | depends on ARCH_MEDIATEK || COMPILE_TEST | |
526 | help | |
527 | This enables support for SPI NOR controller found on MediaTek | |
3e84cdd4 | 528 | ARM SoCs. This is a controller specifically for SPI NOR flash. |
881d1ee9 | 529 | It can perform generic SPI transfers up to 6 bytes via generic |
3e84cdd4 | 530 | SPI interface as well as several SPI NOR specific instructions |
881d1ee9 CG |
531 | via SPI MEM interface. |
532 | ||
ace55c41 TM |
533 | config SPI_NPCM_FIU |
534 | tristate "Nuvoton NPCM FLASH Interface Unit" | |
535 | depends on ARCH_NPCM || COMPILE_TEST | |
536 | depends on OF && HAS_IOMEM | |
537 | help | |
538 | This enables support for the Flash Interface Unit SPI controller | |
539 | in master mode. | |
540 | This driver does not support generic SPI. The implementation only | |
541 | supports spi-mem interface. | |
542 | ||
2a22f1b3 TM |
543 | config SPI_NPCM_PSPI |
544 | tristate "Nuvoton NPCM PSPI Controller" | |
545 | depends on ARCH_NPCM || COMPILE_TEST | |
546 | help | |
547 | This driver provides support for Nuvoton NPCM BMC | |
548 | Peripheral SPI controller in master mode. | |
549 | ||
17f84b79 HM |
550 | config SPI_LANTIQ_SSC |
551 | tristate "Lantiq SSC SPI controller" | |
040f7f97 | 552 | depends on LANTIQ || X86 || COMPILE_TEST |
17f84b79 HM |
553 | help |
554 | This driver supports the Lantiq SSC SPI controller in master | |
555 | mode. This controller is found on Intel (former Lantiq) SoCs like | |
040f7f97 | 556 | the Danube, Falcon, xRX200, xRX300, Lightning Mountain. |
17f84b79 | 557 | |
ce792580 TC |
558 | config SPI_OC_TINY |
559 | tristate "OpenCores tiny SPI" | |
5c2301a9 | 560 | depends on GPIOLIB || COMPILE_TEST |
ce792580 TC |
561 | select SPI_BITBANG |
562 | help | |
563 | This is the driver for OpenCores tiny SPI master controller. | |
564 | ||
6b52c00f DD |
565 | config SPI_OCTEON |
566 | tristate "Cavium OCTEON SPI controller" | |
9ddebc46 | 567 | depends on CAVIUM_OCTEON_SOC |
6b52c00f DD |
568 | help |
569 | SPI host driver for the hardware found on some Cavium OCTEON | |
570 | SOCs. | |
571 | ||
fdb3c18d DB |
572 | config SPI_OMAP_UWIRE |
573 | tristate "OMAP1 MicroWire" | |
6291fe2a | 574 | depends on ARCH_OMAP1 |
fdb3c18d DB |
575 | select SPI_BITBANG |
576 | help | |
577 | This hooks up to the MicroWire controller on OMAP1 chips. | |
578 | ||
ccdc7bf9 | 579 | config SPI_OMAP24XX |
8ebeb545 | 580 | tristate "McSPI driver for OMAP" |
81df42d1 | 581 | depends on ARCH_OMAP2PLUS || ARCH_K3 || COMPILE_TEST |
2b32e987 | 582 | select SG_SPLIT |
ccdc7bf9 | 583 | help |
8ebeb545 | 584 | SPI master controller for OMAP24XX and later Multichannel SPI |
ccdc7bf9 | 585 | (McSPI) modules. |
69c202af | 586 | |
505a1495 SP |
587 | config SPI_TI_QSPI |
588 | tristate "DRA7xxx QSPI controller support" | |
589 | depends on ARCH_OMAP2PLUS || COMPILE_TEST | |
590 | help | |
591 | QSPI master controller for DRA7xxx used for flash devices. | |
592 | This device supports single, dual and quad read support, while | |
593 | it only supports single write mode. | |
594 | ||
35c9049b CM |
595 | config SPI_OMAP_100K |
596 | tristate "OMAP SPI 100K" | |
dd1053a9 | 597 | depends on ARCH_OMAP850 || ARCH_OMAP730 || COMPILE_TEST |
35c9049b CM |
598 | help |
599 | OMAP SPI 100K master controller for omap7xx boards. | |
600 | ||
60cadec9 | 601 | config SPI_ORION |
6d1f56aa | 602 | tristate "Orion SPI master" |
710a1d54 | 603 | depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST |
60cadec9 | 604 | help |
73482910 UKK |
605 | This enables using the SPI master controller on the Orion |
606 | and MVEBU chips. | |
60cadec9 | 607 | |
1bcb9f8c PCM |
608 | config SPI_PIC32 |
609 | tristate "Microchip PIC32 series SPI" | |
610 | depends on MACH_PIC32 || COMPILE_TEST | |
611 | help | |
612 | SPI driver for Microchip PIC32 SPI master controller. | |
613 | ||
3270ac23 PCM |
614 | config SPI_PIC32_SQI |
615 | tristate "Microchip PIC32 Quad SPI driver" | |
616 | depends on MACH_PIC32 || COMPILE_TEST | |
617 | help | |
618 | SPI driver for PIC32 Quad SPI controller. | |
619 | ||
b43d65f7 | 620 | config SPI_PL022 |
7f9a4b97 LW |
621 | tristate "ARM AMBA PL022 SSP controller" |
622 | depends on ARM_AMBA | |
f33b29ee | 623 | default y if ARCH_REALVIEW |
624 | default y if INTEGRATOR_IMPD1 | |
625 | default y if ARCH_VERSATILE | |
b43d65f7 LW |
626 | help |
627 | This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP | |
628 | controller. If you have an embedded system with an AMBA(R) | |
629 | bus and a PL022 controller, say Y or M here. | |
630 | ||
44dab88e SF |
631 | config SPI_PPC4xx |
632 | tristate "PPC4xx SPI Controller" | |
5e8afa34 | 633 | depends on PPC32 && 4xx |
44dab88e SF |
634 | select SPI_BITBANG |
635 | help | |
636 | This selects a driver for the PPC4xx SPI Controller. | |
637 | ||
e0c9905e SS |
638 | config SPI_PXA2XX |
639 | tristate "PXA2xx SSP SPI master" | |
0d441644 | 640 | depends on ARCH_PXA || ARCH_MMP || PCI || ACPI || COMPILE_TEST |
128345b1 | 641 | select PXA_SSP if ARCH_PXA || ARCH_MMP |
e0c9905e | 642 | help |
d6ea3df0 SAS |
643 | This enables using a PXA2xx or Sodaville SSP port as a SPI master |
644 | controller. The driver can be configured to use any SSP port and | |
9cdd273e | 645 | additional documentation can be found a Documentation/spi/pxa2xx.rst. |
d6ea3df0 SAS |
646 | |
647 | config SPI_PXA2XX_PCI | |
afa93c90 | 648 | def_tristate SPI_PXA2XX && PCI && COMMON_CLK |
e0c9905e | 649 | |
64e36824 | 650 | config SPI_ROCKCHIP |
651 | tristate "Rockchip SPI controller driver" | |
652 | help | |
653 | This selects a driver for Rockchip SPI controller. | |
654 | ||
655 | If you say yes to this option, support will be included for | |
656 | RK3066, RK3188 and RK3288 families of SPI controller. | |
657 | Rockchip SPI controller support DMA transport and PIO mode. | |
658 | The main usecase of this controller is to use spi flash as boot | |
659 | device. | |
660 | ||
05aec357 BV |
661 | config SPI_RB4XX |
662 | tristate "Mikrotik RB4XX SPI master" | |
663 | depends on SPI_MASTER && ATH79 | |
664 | help | |
665 | SPI controller driver for the Mikrotik RB4xx series boards. | |
666 | ||
eb8d6d46 SS |
667 | config SPI_RPCIF |
668 | tristate "Renesas RPC-IF SPI driver" | |
669 | depends on RENESAS_RPCIF | |
670 | help | |
f4a10fc4 | 671 | SPI driver for Renesas R-Car Gen3 or RZ/G2 RPC-IF. |
eb8d6d46 | 672 | |
0b2182dd | 673 | config SPI_RSPI |
e290c343 | 674 | tristate "Renesas RSPI/QSPI controller" |
3aec3166 | 675 | depends on SUPERH || ARCH_RENESAS || COMPILE_TEST |
0b2182dd | 676 | help |
e290c343 | 677 | SPI driver for Renesas RSPI and QSPI blocks. |
0b2182dd | 678 | |
04000dc6 GM |
679 | config SPI_QCOM_QSPI |
680 | tristate "QTI QSPI controller" | |
681 | depends on ARCH_QCOM | |
682 | help | |
683 | QSPI(Quad SPI) driver for Qualcomm QSPI controller. | |
684 | ||
64ff247a II |
685 | config SPI_QUP |
686 | tristate "Qualcomm SPI controller with QUP interface" | |
2abaad67 | 687 | depends on ARCH_QCOM || COMPILE_TEST |
64ff247a II |
688 | help |
689 | Qualcomm Universal Peripheral (QUP) core is an AHB slave that | |
690 | provides a common data path (an output FIFO and an input FIFO) | |
691 | for serial peripheral interface (SPI) mini-core. SPI in master | |
692 | mode supports up to 50MHz, up to four chip selects, programmable | |
693 | data path from 4 bits to 32 bits and numerous protocol variants. | |
694 | ||
695 | This driver can also be built as a module. If so, the module | |
696 | will be called spi_qup. | |
0b2182dd | 697 | |
561de45f GM |
698 | config SPI_QCOM_GENI |
699 | tristate "Qualcomm GENI based SPI controller" | |
700 | depends on QCOM_GENI_SE | |
701 | help | |
702 | This driver supports GENI serial engine based SPI controller in | |
703 | master mode on the Qualcomm Technologies Inc.'s SoCs. If you say | |
704 | yes to this option, support will be included for the built-in SPI | |
705 | interface on the Qualcomm Technologies Inc.'s SoCs. | |
706 | ||
707 | This driver can also be built as a module. If so, the module | |
708 | will be called spi-geni-qcom. | |
709 | ||
85abfaa7 DB |
710 | config SPI_S3C24XX |
711 | tristate "Samsung S3C24XX series SPI" | |
6d1f56aa | 712 | depends on ARCH_S3C24XX |
da0abc27 | 713 | select SPI_BITBANG |
85abfaa7 DB |
714 | help |
715 | SPI driver for Samsung S3C24XX series ARM SoCs | |
716 | ||
bec0806c BD |
717 | config SPI_S3C24XX_FIQ |
718 | bool "S3C24XX driver with FIQ pseudo-DMA" | |
719 | depends on SPI_S3C24XX | |
720 | select FIQ | |
721 | help | |
722 | Enable FIQ support for the S3C24XX SPI driver to provide pseudo | |
723 | DMA by using the fast-interrupt request framework, This allows | |
724 | the driver to get DMA-like performance when there are either | |
725 | no free DMA channels, or when doing transfers that required both | |
726 | TX and RX data paths. | |
727 | ||
230d42d4 JB |
728 | config SPI_S3C64XX |
729 | tristate "Samsung S3C64XX series type SPI" | |
db8230d2 | 730 | depends on (PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST) |
230d42d4 JB |
731 | help |
732 | SPI driver for Samsung S3C64XX and newer SoCs. | |
733 | ||
3ce8859e GR |
734 | config SPI_SC18IS602 |
735 | tristate "NXP SC18IS602/602B/603 I2C to SPI bridge" | |
736 | depends on I2C | |
737 | help | |
738 | SPI driver for NXP SC18IS602/602B/603 I2C to SPI bridge. | |
739 | ||
8051effc MD |
740 | config SPI_SH_MSIOF |
741 | tristate "SuperH MSIOF SPI controller" | |
e5b43ed2 | 742 | depends on HAVE_CLK |
6ffc84dd | 743 | depends on ARCH_SHMOBILE || ARCH_RENESAS || COMPILE_TEST |
8051effc | 744 | help |
746aeffd | 745 | SPI driver for SuperH and SH Mobile MSIOF blocks. |
8051effc | 746 | |
5c05dd07 YS |
747 | config SPI_SH |
748 | tristate "SuperH SPI controller" | |
dd1053a9 | 749 | depends on SUPERH || COMPILE_TEST |
5c05dd07 YS |
750 | help |
751 | SPI driver for SuperH SPI blocks. | |
752 | ||
37e46640 MD |
753 | config SPI_SH_SCI |
754 | tristate "SuperH SCI SPI controller" | |
6291fe2a | 755 | depends on SUPERH |
37e46640 MD |
756 | select SPI_BITBANG |
757 | help | |
758 | SPI driver for SuperH SCI blocks. | |
759 | ||
d1c8bbd7 KM |
760 | config SPI_SH_HSPI |
761 | tristate "SuperH HSPI controller" | |
3aec3166 | 762 | depends on ARCH_RENESAS || COMPILE_TEST |
d1c8bbd7 KM |
763 | help |
764 | SPI driver for SuperH HSPI blocks. | |
765 | ||
484a9a68 YS |
766 | config SPI_SIFIVE |
767 | tristate "SiFive SPI controller" | |
768 | depends on HAS_IOMEM | |
769 | help | |
770 | This exposes the SPI controller IP from SiFive. | |
771 | ||
805be7dd LL |
772 | config SPI_SLAVE_MT27XX |
773 | tristate "MediaTek SPI slave device" | |
774 | depends on ARCH_MEDIATEK || COMPILE_TEST | |
775 | depends on SPI_SLAVE | |
776 | help | |
777 | This selects the MediaTek(R) SPI slave device driver. | |
778 | If you want to use MediaTek(R) SPI slave interface, | |
779 | say Y or M here.If you are not sure, say N. | |
780 | SPI slave drivers for Mediatek MT27XX series ARM SoCs. | |
781 | ||
e7d973a3 LL |
782 | config SPI_SPRD |
783 | tristate "Spreadtrum SPI controller" | |
784 | depends on ARCH_SPRD || COMPILE_TEST | |
785 | help | |
786 | SPI driver for Spreadtrum SoCs. | |
787 | ||
7e2903cb BW |
788 | config SPI_SPRD_ADI |
789 | tristate "Spreadtrum ADI controller" | |
790 | depends on ARCH_SPRD || COMPILE_TEST | |
e83f3742 | 791 | depends on HWSPINLOCK || (COMPILE_TEST && !HWSPINLOCK) |
7e2903cb BW |
792 | help |
793 | ADI driver based on SPI for Spreadtrum SoCs. | |
794 | ||
dcbe0d84 AD |
795 | config SPI_STM32 |
796 | tristate "STMicroelectronics STM32 SPI controller" | |
797 | depends on ARCH_STM32 || COMPILE_TEST | |
798 | help | |
bb35c9f9 | 799 | SPI driver for STMicroelectronics STM32 SoCs. |
dcbe0d84 AD |
800 | |
801 | STM32 SPI controller supports DMA and PIO modes. When DMA | |
802 | is not available, the driver automatically falls back to | |
803 | PIO mode. | |
804 | ||
c530cd1d LB |
805 | config SPI_STM32_QSPI |
806 | tristate "STMicroelectronics STM32 QUAD SPI controller" | |
807 | depends on ARCH_STM32 || COMPILE_TEST | |
808 | depends on OF | |
809 | help | |
810 | This enables support for the Quad SPI controller in master mode. | |
811 | This driver does not support generic SPI. The implementation only | |
812 | supports spi-mem interface. | |
813 | ||
9e862375 LJ |
814 | config SPI_ST_SSC4 |
815 | tristate "STMicroelectronics SPI SSC-based driver" | |
83fefd2d | 816 | depends on ARCH_STI || COMPILE_TEST |
9e862375 LJ |
817 | help |
818 | STMicroelectronics SoCs support for SPI. If you say yes to | |
819 | this option, support will be included for the SSC driven SPI. | |
820 | ||
b5f65179 MR |
821 | config SPI_SUN4I |
822 | tristate "Allwinner A10 SoCs SPI controller" | |
823 | depends on ARCH_SUNXI || COMPILE_TEST | |
824 | help | |
825 | SPI driver for Allwinner sun4i, sun5i and sun7i SoCs | |
826 | ||
3558fe90 MR |
827 | config SPI_SUN6I |
828 | tristate "Allwinner A31 SPI controller" | |
829 | depends on ARCH_SUNXI || COMPILE_TEST | |
7961656a | 830 | depends on RESET_CONTROLLER |
3558fe90 MR |
831 | help |
832 | This enables using the SPI controller on the Allwinner A31 SoCs. | |
833 | ||
b0823ee3 MK |
834 | config SPI_SYNQUACER |
835 | tristate "Socionext's SynQuacer HighSpeed SPI controller" | |
836 | depends on ARCH_SYNQUACER || COMPILE_TEST | |
837 | help | |
838 | SPI driver for Socionext's High speed SPI controller which provides | |
839 | various operating modes for interfacing to serial peripheral devices | |
840 | that use the de-facto standard SPI protocol. | |
841 | ||
842 | It also supports the new dual-bit and quad-bit SPI protocol. | |
843 | ||
b942d80b | 844 | config SPI_MXIC |
554bbe72 KK |
845 | tristate "Macronix MX25F0A SPI controller" |
846 | depends on SPI_MASTER | |
847 | help | |
848 | This selects the Macronix MX25F0A SPI controller driver. | |
b942d80b | 849 | |
646781d3 MV |
850 | config SPI_MXS |
851 | tristate "Freescale MXS SPI controller" | |
852 | depends on ARCH_MXS | |
853 | select STMP_DEVICE | |
854 | help | |
855 | SPI driver for Freescale MXS devices. | |
856 | ||
921fc183 SK |
857 | config SPI_TEGRA210_QUAD |
858 | tristate "NVIDIA Tegra QSPI Controller" | |
859 | depends on ARCH_TEGRA || COMPILE_TEST | |
860 | depends on RESET_CONTROLLER | |
861 | help | |
862 | QSPI driver for NVIDIA Tegra QSPI Controller interface. This | |
863 | controller is different from the SPI controller and is available | |
864 | on Tegra SoCs starting from Tegra210. | |
865 | ||
f333a331 LD |
866 | config SPI_TEGRA114 |
867 | tristate "NVIDIA Tegra114 SPI Controller" | |
dd1053a9 | 868 | depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST |
e5b43ed2 | 869 | depends on RESET_CONTROLLER |
f333a331 LD |
870 | help |
871 | SPI driver for NVIDIA Tegra114 SPI Controller interface. This controller | |
872 | is different than the older SoCs SPI controller and also register interface | |
873 | get changed with this controller. | |
874 | ||
8528547b LD |
875 | config SPI_TEGRA20_SFLASH |
876 | tristate "Nvidia Tegra20 Serial flash Controller" | |
dd1053a9 | 877 | depends on ARCH_TEGRA || COMPILE_TEST |
ff2251e3 | 878 | depends on RESET_CONTROLLER |
8528547b LD |
879 | help |
880 | SPI driver for Nvidia Tegra20 Serial flash Controller interface. | |
881 | The main usecase of this controller is to use spi flash as boot | |
882 | device. | |
883 | ||
dc4dc360 LD |
884 | config SPI_TEGRA20_SLINK |
885 | tristate "Nvidia Tegra20/Tegra30 SLINK Controller" | |
dd1053a9 | 886 | depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST |
e5b43ed2 | 887 | depends on RESET_CONTROLLER |
dc4dc360 LD |
888 | help |
889 | SPI driver for Nvidia Tegra20/Tegra30 SLINK Controller interface. | |
890 | ||
7347a6c7 JG |
891 | config SPI_THUNDERX |
892 | tristate "Cavium ThunderX SPI controller" | |
893 | depends on PCI && 64BIT && (ARM64 || COMPILE_TEST) | |
894 | help | |
895 | SPI host driver for the hardware found on Cavium ThunderX | |
896 | SOCs. | |
897 | ||
e8b17b5b | 898 | config SPI_TOPCLIFF_PCH |
92b3a5c1 | 899 | tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) SPI" |
f05ca854 | 900 | depends on PCI && (X86_32 || MIPS || COMPILE_TEST) |
e8b17b5b | 901 | help |
cdbc8f04 GL |
902 | SPI driver for the Topcliff PCH (Platform Controller Hub) SPI bus |
903 | used in some x86 embedded processors. | |
e8b17b5b | 904 | |
92b3a5c1 TM |
905 | This driver also supports the ML7213/ML7223/ML7831, a companion chip |
906 | for the Atom E6xx series and compatible with the Intel EG20T PCH. | |
f016aeb6 | 907 | |
5ba155a4 KH |
908 | config SPI_UNIPHIER |
909 | tristate "Socionext UniPhier SPI Controller" | |
910 | depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF | |
6a091404 | 911 | depends on HAS_IOMEM |
5ba155a4 KH |
912 | help |
913 | This enables a driver for the Socionext UniPhier SoC SCSSI SPI controller. | |
914 | ||
915 | UniPhier SoCs have SCSSI and MCSSI SPI controllers. | |
916 | Every UniPhier SoC has SCSSI which supports single channel. | |
917 | Older UniPhier Pro4/Pro5 also has MCSSI which support multiple channels. | |
918 | This driver supports SCSSI only. | |
919 | ||
920 | If your SoC supports SCSSI, say Y here. | |
921 | ||
b3165900 LPC |
922 | config SPI_XCOMM |
923 | tristate "Analog Devices AD-FMCOMMS1-EBZ SPI-I2C-bridge driver" | |
924 | depends on I2C | |
925 | help | |
926 | Support for the SPI-I2C bridge found on the Analog Devices | |
927 | AD-FMCOMMS1-EBZ board. | |
928 | ||
ae918c02 | 929 | config SPI_XILINX |
c9da2e12 | 930 | tristate "Xilinx SPI controller common module" |
6d1f56aa | 931 | depends on HAS_IOMEM |
ae918c02 AK |
932 | select SPI_BITBANG |
933 | help | |
934 | This exposes the SPI controller IP from the Xilinx EDK. | |
935 | ||
936 | See the "OPB Serial Peripheral Interface (SPI) (v1.00e)" | |
937 | Product Specification document (DS464) for hardware details. | |
938 | ||
c9da2e12 RR |
939 | Or for the DS570, see "XPS Serial Peripheral Interface (SPI) (v2.00b)" |
940 | ||
d8c80d49 KP |
941 | config SPI_XLP |
942 | tristate "Netlogic XLP SPI controller driver" | |
251831bd | 943 | depends on CPU_XLP || ARCH_THUNDER2 || COMPILE_TEST |
d8c80d49 KP |
944 | help |
945 | Enable support for the SPI controller on the Netlogic XLP SoCs. | |
946 | Currently supported XLP variants are XLP8XX, XLP3XX, XLP2XX, XLP9XX | |
947 | and XLP5XX. | |
948 | ||
949 | If you have a Netlogic XLP platform say Y here. | |
950 | If unsure, say N. | |
951 | ||
6840cc29 MF |
952 | config SPI_XTENSA_XTFPGA |
953 | tristate "Xtensa SPI controller for xtfpga" | |
be8dde46 | 954 | depends on (XTENSA && XTENSA_PLATFORM_XTFPGA) || COMPILE_TEST |
6840cc29 MF |
955 | select SPI_BITBANG |
956 | help | |
957 | SPI driver for xtfpga SPI master controller. | |
958 | ||
959 | This simple SPI master controller is built into xtfpga bitstreams | |
960 | and is used to control daughterboard audio codec. It always transfers | |
961 | 16 bit words in SPI mode 0, automatically asserting CS on transfer | |
962 | start and deasserting on end. | |
963 | ||
67dca5e5 NSR |
964 | config SPI_ZYNQ_QSPI |
965 | tristate "Xilinx Zynq QSPI controller" | |
966 | depends on ARCH_ZYNQ || COMPILE_TEST | |
967 | help | |
968 | This enables support for the Zynq Quad SPI controller | |
969 | in master mode. | |
970 | This controller only supports SPI memory interface. | |
971 | ||
dfe11a11 RW |
972 | config SPI_ZYNQMP_GQSPI |
973 | tristate "Xilinx ZynqMP GQSPI controller" | |
67dca5e5 | 974 | depends on (SPI_MASTER && HAS_DMA) || COMPILE_TEST |
dfe11a11 RW |
975 | help |
976 | Enables Xilinx GQSPI controller driver for Zynq UltraScale+ MPSoC. | |
977 | ||
bbb336f3 SM |
978 | config SPI_AMD |
979 | tristate "AMD SPI controller" | |
980 | depends on SPI_MASTER || COMPILE_TEST | |
981 | help | |
982 | Enables SPI controller driver for AMD SoC. | |
983 | ||
8ae12a0d DB |
984 | # |
985 | # Add new SPI master controllers in alphabetical order above this line | |
986 | # | |
987 | ||
e9e40543 CP |
988 | comment "SPI Multiplexer support" |
989 | ||
990 | config SPI_MUX | |
991 | tristate "SPI multiplexer support" | |
992 | select MULTIPLEXER | |
993 | help | |
994 | This adds support for SPI multiplexers. Each SPI mux will be | |
995 | accessible as a SPI controller, the devices behind the mux will appear | |
996 | to be chip selects on this controller. It is still necessary to | |
997 | select one or more specific mux-controller drivers. | |
998 | ||
8ae12a0d DB |
999 | # |
1000 | # There are lots of SPI device types, with sensors and memory | |
1001 | # being probably the most widely used ones. | |
1002 | # | |
1003 | comment "SPI Protocol Masters" | |
8ae12a0d | 1004 | |
814a8d50 AP |
1005 | config SPI_SPIDEV |
1006 | tristate "User mode SPI device driver support" | |
814a8d50 AP |
1007 | help |
1008 | This supports user mode SPI protocol drivers. | |
1009 | ||
1010 | Note that this application programming interface is EXPERIMENTAL | |
1011 | and hence SUBJECT TO CHANGE WITHOUT NOTICE while it stabilizes. | |
1012 | ||
97896195 MS |
1013 | config SPI_LOOPBACK_TEST |
1014 | tristate "spi loopback test framework support" | |
1015 | depends on m | |
1016 | help | |
1017 | This enables the SPI loopback testing framework driver | |
1018 | ||
1019 | primarily used for development of spi_master drivers | |
1020 | and to detect regressions | |
1021 | ||
447aef1a BD |
1022 | config SPI_TLE62X0 |
1023 | tristate "Infineon TLE62X0 (for power switching)" | |
6291fe2a | 1024 | depends on SYSFS |
447aef1a BD |
1025 | help |
1026 | SPI driver for Infineon TLE62X0 series line driver chips, | |
1027 | such as the TLE6220, TLE6230 and TLE6240. This provides a | |
1028 | sysfs interface, with each line presented as a kind of GPIO | |
1029 | exposing both switch control and diagnostic feedback. | |
1030 | ||
8ae12a0d DB |
1031 | # |
1032 | # Add new SPI protocol masters in alphabetical order above this line | |
1033 | # | |
1034 | ||
6291fe2a RD |
1035 | endif # SPI_MASTER |
1036 | ||
6c364062 GU |
1037 | # |
1038 | # SLAVE side ... listening to other SPI masters | |
1039 | # | |
1040 | ||
1041 | config SPI_SLAVE | |
1042 | bool "SPI slave protocol handlers" | |
1043 | help | |
1044 | If your system has a slave-capable SPI controller, you can enable | |
1045 | slave protocol handlers. | |
1046 | ||
1047 | if SPI_SLAVE | |
1048 | ||
29f9ffa0 GU |
1049 | config SPI_SLAVE_TIME |
1050 | tristate "SPI slave handler reporting boot up time" | |
1051 | help | |
1052 | SPI slave handler responding with the time of reception of the last | |
1053 | SPI message. | |
1054 | ||
ce70e06c GU |
1055 | config SPI_SLAVE_SYSTEM_CONTROL |
1056 | tristate "SPI slave handler controlling system state" | |
1057 | help | |
1058 | SPI slave handler to allow remote control of system reboot, power | |
1059 | off, halt, and suspend. | |
1060 | ||
6c364062 | 1061 | endif # SPI_SLAVE |
8ae12a0d | 1062 | |
ddf75be4 LW |
1063 | config SPI_DYNAMIC |
1064 | def_bool ACPI || OF_DYNAMIC || SPI_SLAVE | |
1065 | ||
79d8c7a8 | 1066 | endif # SPI |