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Commit | Line | Data |
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8ae12a0d DB |
1 | # |
2 | # SPI driver configuration | |
3 | # | |
4 | # NOTE: the reason this doesn't show SPI slave support is mostly that | |
5 | # nobody's needed a slave side API yet. The master-role API is not | |
6 | # fully appropriate there, so it'd need some thought to do well. | |
7 | # | |
79d8c7a8 | 8 | menuconfig SPI |
8ae12a0d | 9 | bool "SPI support" |
79d8c7a8 | 10 | depends on HAS_IOMEM |
8ae12a0d DB |
11 | help |
12 | The "Serial Peripheral Interface" is a low level synchronous | |
13 | protocol. Chips that support SPI can have data transfer rates | |
14 | up to several tens of Mbit/sec. Chips are addressed with a | |
15 | controller and a chipselect. Most SPI slaves don't support | |
16 | dynamic device discovery; some are even write-only or read-only. | |
17 | ||
3cb2fccc | 18 | SPI is widely used by microcontrollers to talk with sensors, |
8ae12a0d DB |
19 | eeprom and flash memory, codecs and various other controller |
20 | chips, analog to digital (and d-to-a) converters, and more. | |
21 | MMC and SD cards can be accessed using SPI protocol; and for | |
22 | DataFlash cards used in MMC sockets, SPI must always be used. | |
23 | ||
24 | SPI is one of a family of similar protocols using a four wire | |
25 | interface (select, clock, data in, data out) including Microwire | |
26 | (half duplex), SSP, SSI, and PSP. This driver framework should | |
27 | work with most such devices and controllers. | |
28 | ||
79d8c7a8 AG |
29 | if SPI |
30 | ||
8ae12a0d DB |
31 | config SPI_DEBUG |
32 | boolean "Debug support for SPI drivers" | |
79d8c7a8 | 33 | depends on DEBUG_KERNEL |
8ae12a0d DB |
34 | help |
35 | Say "yes" to enable debug messaging (like dev_dbg and pr_debug), | |
36 | sysfs, and debugfs support in SPI controller and protocol drivers. | |
37 | ||
38 | # | |
39 | # MASTER side ... talking to discrete SPI slave chips including microcontrollers | |
40 | # | |
41 | ||
42 | config SPI_MASTER | |
43 | # boolean "SPI Master Support" | |
44 | boolean | |
45 | default SPI | |
46 | help | |
47 | If your system has an master-capable SPI controller (which | |
48 | provides the clock and chipselect), you can enable that | |
49 | controller and the protocol drivers for the SPI slave chips | |
50 | that are connected. | |
51 | ||
6291fe2a RD |
52 | if SPI_MASTER |
53 | ||
8ae12a0d | 54 | comment "SPI Master Controller Drivers" |
8ae12a0d | 55 | |
0b782531 TC |
56 | config SPI_ALTERA |
57 | tristate "Altera SPI Controller" | |
58 | select SPI_BITBANG | |
59 | help | |
60 | This is the driver for the Altera SPI Controller. | |
61 | ||
8efaef4d GJ |
62 | config SPI_ATH79 |
63 | tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver" | |
64 | depends on ATH79 && GENERIC_GPIO | |
65 | select SPI_BITBANG | |
66 | help | |
67 | This enables support for the SPI controller present on the | |
68 | Atheros AR71XX/AR724X/AR913X SoCs. | |
69 | ||
754ce4f2 HS |
70 | config SPI_ATMEL |
71 | tristate "Atmel SPI Controller" | |
6291fe2a | 72 | depends on (ARCH_AT91 || AVR32) |
754ce4f2 HS |
73 | help |
74 | This selects a driver for the Atmel SPI Controller, present on | |
75 | many AT32 (AVR32) and AT91 (ARM) chips. | |
76 | ||
22ac3e82 | 77 | config SPI_BFIN5XX |
a5f6abd4 | 78 | tristate "SPI controller driver for ADI Blackfin5xx" |
6291fe2a | 79 | depends on BLACKFIN |
a5f6abd4 WB |
80 | help |
81 | This is the SPI controller master driver for Blackfin 5xx processor. | |
82 | ||
9c3e7375 CC |
83 | config SPI_BFIN_SPORT |
84 | tristate "SPI bus via Blackfin SPORT" | |
85 | depends on BLACKFIN | |
86 | help | |
87 | Enable support for a SPI bus via the Blackfin SPORT peripheral. | |
88 | ||
63bd2359 | 89 | config SPI_AU1550 |
809f36c6 | 90 | tristate "Au1550/Au1200/Au1300 SPI Controller" |
37663860 | 91 | depends on MIPS_ALCHEMY && EXPERIMENTAL |
63bd2359 JN |
92 | select SPI_BITBANG |
93 | help | |
94 | If you say yes to this option, support will be included for the | |
809f36c6 | 95 | PSC SPI controller found on Au1550, Au1200 and Au1300 series. |
63bd2359 | 96 | |
b42dfed8 FF |
97 | config SPI_BCM63XX |
98 | tristate "Broadcom BCM63xx SPI controller" | |
99 | depends on BCM63XX | |
100 | help | |
101 | Enable support for the SPI controller on the Broadcom BCM63xx SoCs. | |
102 | ||
9904f22a | 103 | config SPI_BITBANG |
d29389de | 104 | tristate "Utilities for Bitbanging SPI masters" |
9904f22a DB |
105 | help |
106 | With a few GPIO pins, your system can bitbang the SPI protocol. | |
107 | Select this to get SPI support through I/O pins (GPIO, parallel | |
108 | port, etc). Or, some systems' SPI master controller drivers use | |
109 | this code to manage the per-word or per-transfer accesses to the | |
110 | hardware shift registers. | |
111 | ||
112 | This is library code, and is automatically selected by drivers that | |
113 | need it. You only need to select this explicitly to support driver | |
114 | modules that aren't part of this kernel tree. | |
8ae12a0d | 115 | |
7111763d DB |
116 | config SPI_BUTTERFLY |
117 | tristate "Parallel port adapter for AVR Butterfly (DEVELOPMENT)" | |
6291fe2a | 118 | depends on PARPORT |
7111763d DB |
119 | select SPI_BITBANG |
120 | help | |
121 | This uses a custom parallel port cable to connect to an AVR | |
122 | Butterfly <http://www.atmel.com/products/avr/butterfly>, an | |
123 | inexpensive battery powered microcontroller evaluation board. | |
124 | This same cable can be used to flash new firmware. | |
125 | ||
34b8c661 SK |
126 | config SPI_COLDFIRE_QSPI |
127 | tristate "Freescale Coldfire QSPI controller" | |
128 | depends on (M520x || M523x || M5249 || M527x || M528x || M532x) | |
129 | help | |
130 | This enables support for the Coldfire QSPI controller in master | |
131 | mode. | |
132 | ||
358934a6 | 133 | config SPI_DAVINCI |
23ce17ad | 134 | tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller" |
5e8afa34 | 135 | depends on ARCH_DAVINCI |
358934a6 SP |
136 | select SPI_BITBANG |
137 | help | |
23ce17ad SN |
138 | SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules. |
139 | ||
011f23a3 MW |
140 | config SPI_EP93XX |
141 | tristate "Cirrus Logic EP93xx SPI controller" | |
142 | depends on ARCH_EP93XX | |
143 | help | |
144 | This enables using the Cirrus EP93xx SPI controller in master | |
145 | mode. | |
146 | ||
d29389de DB |
147 | config SPI_GPIO |
148 | tristate "GPIO-based bitbanging SPI Master" | |
149 | depends on GENERIC_GPIO | |
150 | select SPI_BITBANG | |
151 | help | |
152 | This simple GPIO bitbanging SPI master uses the arch-neutral GPIO | |
153 | interface to manage MOSI, MISO, SCK, and chipselect signals. SPI | |
154 | slaves connected to a bus using this driver are configured as usual, | |
155 | except that the spi_board_info.controller_data holds the GPIO number | |
156 | for the chipselect used by this controller driver. | |
157 | ||
158 | Note that this driver often won't achieve even 1 Mbit/sec speeds, | |
159 | making it unusually slow for SPI. If your platform can inline | |
160 | GPIO operations, you should be able to leverage that for better | |
161 | speed with a custom version of this driver; see the source code. | |
162 | ||
b5f3294f SH |
163 | config SPI_IMX |
164 | tristate "Freescale i.MX SPI controllers" | |
165 | depends on ARCH_MXC | |
166 | select SPI_BITBANG | |
e89524d3 | 167 | default m if IMX_HAVE_PLATFORM_SPI_IMX |
b5f3294f SH |
168 | help |
169 | This enables using the Freescale i.MX SPI controllers in master | |
170 | mode. | |
171 | ||
78961a57 KB |
172 | config SPI_LM70_LLP |
173 | tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)" | |
6291fe2a | 174 | depends on PARPORT && EXPERIMENTAL |
78961a57 KB |
175 | select SPI_BITBANG |
176 | help | |
177 | This driver supports the NS LM70 LLP Evaluation Board, | |
178 | which interfaces to an LM70 temperature sensor using | |
179 | a parallel port. | |
180 | ||
42bbb709 GL |
181 | config SPI_MPC52xx |
182 | tristate "Freescale MPC52xx SPI (non-PSC) controller support" | |
7433f2b7 | 183 | depends on PPC_MPC52xx |
42bbb709 GL |
184 | help |
185 | This drivers supports the MPC52xx SPI controller in master SPI | |
186 | mode. | |
187 | ||
00b8fd23 DC |
188 | config SPI_MPC52xx_PSC |
189 | tristate "Freescale MPC52xx PSC SPI controller" | |
6291fe2a | 190 | depends on PPC_MPC52xx && EXPERIMENTAL |
00b8fd23 DC |
191 | help |
192 | This enables using the Freescale MPC52xx Programmable Serial | |
193 | Controller in master SPI mode. | |
194 | ||
6e27388f AG |
195 | config SPI_MPC512x_PSC |
196 | tristate "Freescale MPC512x PSC SPI controller" | |
5e8afa34 | 197 | depends on PPC_MPC512x |
6e27388f AG |
198 | help |
199 | This enables using the Freescale MPC5121 Programmable Serial | |
200 | Controller in SPI master mode. | |
201 | ||
b36ece83 MH |
202 | config SPI_FSL_LIB |
203 | tristate | |
204 | depends on FSL_SOC | |
205 | ||
3272029f | 206 | config SPI_FSL_SPI |
d9ddcec3 | 207 | bool "Freescale SPI controller" |
9e04b333 | 208 | depends on FSL_SOC |
b36ece83 | 209 | select SPI_FSL_LIB |
ccf06998 | 210 | help |
3272029f MH |
211 | This enables using the Freescale SPI controllers in master mode. |
212 | MPC83xx platform uses the controller in cpu mode or CPM/QE mode. | |
213 | MPC8569 uses the controller in QE mode, MPC8610 in cpu mode. | |
ccf06998 | 214 | |
8b60d6c2 | 215 | config SPI_FSL_ESPI |
d9ddcec3 | 216 | bool "Freescale eSPI controller" |
8b60d6c2 MH |
217 | depends on FSL_SOC |
218 | select SPI_FSL_LIB | |
219 | help | |
220 | This enables using the Freescale eSPI controllers in master mode. | |
221 | From MPC8536, 85xx platform uses the controller, and all P10xx, | |
222 | P20xx, P30xx,P40xx, P50xx uses this controller. | |
223 | ||
ce792580 TC |
224 | config SPI_OC_TINY |
225 | tristate "OpenCores tiny SPI" | |
226 | depends on GENERIC_GPIO | |
227 | select SPI_BITBANG | |
228 | help | |
229 | This is the driver for OpenCores tiny SPI master controller. | |
230 | ||
fdb3c18d DB |
231 | config SPI_OMAP_UWIRE |
232 | tristate "OMAP1 MicroWire" | |
6291fe2a | 233 | depends on ARCH_OMAP1 |
fdb3c18d DB |
234 | select SPI_BITBANG |
235 | help | |
236 | This hooks up to the MicroWire controller on OMAP1 chips. | |
237 | ||
ccdc7bf9 | 238 | config SPI_OMAP24XX |
8ebeb545 SR |
239 | tristate "McSPI driver for OMAP" |
240 | depends on ARCH_OMAP2PLUS | |
ccdc7bf9 | 241 | help |
8ebeb545 | 242 | SPI master controller for OMAP24XX and later Multichannel SPI |
ccdc7bf9 | 243 | (McSPI) modules. |
69c202af | 244 | |
35c9049b CM |
245 | config SPI_OMAP_100K |
246 | tristate "OMAP SPI 100K" | |
5e8afa34 | 247 | depends on ARCH_OMAP850 || ARCH_OMAP730 |
35c9049b CM |
248 | help |
249 | OMAP SPI 100K master controller for omap7xx boards. | |
250 | ||
60cadec9 SA |
251 | config SPI_ORION |
252 | tristate "Orion SPI master (EXPERIMENTAL)" | |
253 | depends on PLAT_ORION && EXPERIMENTAL | |
254 | help | |
255 | This enables using the SPI master controller on the Orion chips. | |
256 | ||
b43d65f7 | 257 | config SPI_PL022 |
7f9a4b97 LW |
258 | tristate "ARM AMBA PL022 SSP controller" |
259 | depends on ARM_AMBA | |
b43d65f7 | 260 | default y if MACH_U300 |
f33b29ee | 261 | default y if ARCH_REALVIEW |
262 | default y if INTEGRATOR_IMPD1 | |
263 | default y if ARCH_VERSATILE | |
b43d65f7 LW |
264 | help |
265 | This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP | |
266 | controller. If you have an embedded system with an AMBA(R) | |
267 | bus and a PL022 controller, say Y or M here. | |
268 | ||
44dab88e SF |
269 | config SPI_PPC4xx |
270 | tristate "PPC4xx SPI Controller" | |
5e8afa34 | 271 | depends on PPC32 && 4xx |
44dab88e SF |
272 | select SPI_BITBANG |
273 | help | |
274 | This selects a driver for the PPC4xx SPI Controller. | |
275 | ||
e0c9905e SS |
276 | config SPI_PXA2XX |
277 | tristate "PXA2xx SSP SPI master" | |
d6ea3df0 SAS |
278 | depends on (ARCH_PXA || (X86_32 && PCI)) && EXPERIMENTAL |
279 | select PXA_SSP if ARCH_PXA | |
e0c9905e | 280 | help |
d6ea3df0 SAS |
281 | This enables using a PXA2xx or Sodaville SSP port as a SPI master |
282 | controller. The driver can be configured to use any SSP port and | |
283 | additional documentation can be found a Documentation/spi/pxa2xx. | |
284 | ||
285 | config SPI_PXA2XX_PCI | |
286 | def_bool SPI_PXA2XX && X86_32 && PCI | |
e0c9905e | 287 | |
0b2182dd SY |
288 | config SPI_RSPI |
289 | tristate "Renesas RSPI controller" | |
290 | depends on SUPERH | |
291 | help | |
292 | SPI driver for Renesas RSPI blocks. | |
293 | ||
85abfaa7 DB |
294 | config SPI_S3C24XX |
295 | tristate "Samsung S3C24XX series SPI" | |
b130d5c2 | 296 | depends on ARCH_S3C24XX && EXPERIMENTAL |
da0abc27 | 297 | select SPI_BITBANG |
85abfaa7 DB |
298 | help |
299 | SPI driver for Samsung S3C24XX series ARM SoCs | |
300 | ||
bec0806c BD |
301 | config SPI_S3C24XX_FIQ |
302 | bool "S3C24XX driver with FIQ pseudo-DMA" | |
303 | depends on SPI_S3C24XX | |
304 | select FIQ | |
305 | help | |
306 | Enable FIQ support for the S3C24XX SPI driver to provide pseudo | |
307 | DMA by using the fast-interrupt request framework, This allows | |
308 | the driver to get DMA-like performance when there are either | |
309 | no free DMA channels, or when doing transfers that required both | |
310 | TX and RX data paths. | |
311 | ||
230d42d4 JB |
312 | config SPI_S3C64XX |
313 | tristate "Samsung S3C64XX series type SPI" | |
c4bec603 | 314 | depends on (ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5P64X0 || ARCH_EXYNOS) |
5f35765d | 315 | select S3C64XX_DMA if ARCH_S3C64XX |
230d42d4 JB |
316 | help |
317 | SPI driver for Samsung S3C64XX and newer SoCs. | |
318 | ||
8051effc MD |
319 | config SPI_SH_MSIOF |
320 | tristate "SuperH MSIOF SPI controller" | |
321 | depends on SUPERH && HAVE_CLK | |
322 | select SPI_BITBANG | |
323 | help | |
324 | SPI driver for SuperH MSIOF blocks. | |
325 | ||
5c05dd07 YS |
326 | config SPI_SH |
327 | tristate "SuperH SPI controller" | |
328 | depends on SUPERH | |
329 | help | |
330 | SPI driver for SuperH SPI blocks. | |
331 | ||
37e46640 MD |
332 | config SPI_SH_SCI |
333 | tristate "SuperH SCI SPI controller" | |
6291fe2a | 334 | depends on SUPERH |
37e46640 MD |
335 | select SPI_BITBANG |
336 | help | |
337 | SPI driver for SuperH SCI blocks. | |
338 | ||
d1c8bbd7 KM |
339 | config SPI_SH_HSPI |
340 | tristate "SuperH HSPI controller" | |
341 | depends on ARCH_SHMOBILE | |
342 | help | |
343 | SPI driver for SuperH HSPI blocks. | |
344 | ||
1cc2df9d ZS |
345 | config SPI_SIRF |
346 | tristate "CSR SiRFprimaII SPI controller" | |
347 | depends on ARCH_PRIMA2 | |
348 | select SPI_BITBANG | |
349 | help | |
350 | SPI driver for CSR SiRFprimaII SoCs | |
351 | ||
0644c486 | 352 | config SPI_STMP3XXX |
353 | tristate "Freescale STMP37xx/378x SPI/SSP controller" | |
5e8afa34 | 354 | depends on ARCH_STMP3XXX |
0644c486 | 355 | help |
356 | SPI driver for Freescale STMP37xx/378x SoC SSP interface | |
357 | ||
0c03a1dd EG |
358 | config SPI_TEGRA |
359 | tristate "Nvidia Tegra SPI controller" | |
14c173eb | 360 | depends on ARCH_TEGRA && TEGRA_SYSTEM_DMA |
0c03a1dd EG |
361 | help |
362 | SPI driver for NVidia Tegra SoCs | |
363 | ||
a72aeefe CC |
364 | config SPI_TI_SSP |
365 | tristate "TI Sequencer Serial Port - SPI Support" | |
366 | depends on MFD_TI_SSP | |
367 | help | |
368 | This selects an SPI master implementation using a TI sequencer | |
369 | serial port. | |
370 | ||
e8b17b5b | 371 | config SPI_TOPCLIFF_PCH |
92b3a5c1 | 372 | tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) SPI" |
e8b17b5b MO |
373 | depends on PCI |
374 | help | |
cdbc8f04 GL |
375 | SPI driver for the Topcliff PCH (Platform Controller Hub) SPI bus |
376 | used in some x86 embedded processors. | |
e8b17b5b | 377 | |
92b3a5c1 TM |
378 | This driver also supports the ML7213/ML7223/ML7831, a companion chip |
379 | for the Atom E6xx series and compatible with the Intel EG20T PCH. | |
f016aeb6 | 380 | |
f2cac67d AN |
381 | config SPI_TXX9 |
382 | tristate "Toshiba TXx9 SPI controller" | |
6291fe2a | 383 | depends on GENERIC_GPIO && CPU_TX49XX |
f2cac67d AN |
384 | help |
385 | SPI driver for Toshiba TXx9 MIPS SoCs | |
386 | ||
ae918c02 | 387 | config SPI_XILINX |
c9da2e12 | 388 | tristate "Xilinx SPI controller common module" |
86fc5935 | 389 | depends on HAS_IOMEM && EXPERIMENTAL |
ae918c02 AK |
390 | select SPI_BITBANG |
391 | help | |
392 | This exposes the SPI controller IP from the Xilinx EDK. | |
393 | ||
394 | See the "OPB Serial Peripheral Interface (SPI) (v1.00e)" | |
395 | Product Specification document (DS464) for hardware details. | |
396 | ||
c9da2e12 RR |
397 | Or for the DS570, see "XPS Serial Peripheral Interface (SPI) (v2.00b)" |
398 | ||
30eaed05 WZ |
399 | config SPI_NUC900 |
400 | tristate "Nuvoton NUC900 series SPI" | |
401 | depends on ARCH_W90X900 && EXPERIMENTAL | |
402 | select SPI_BITBANG | |
403 | help | |
404 | SPI driver for Nuvoton NUC900 series ARM SoCs | |
405 | ||
8ae12a0d DB |
406 | # |
407 | # Add new SPI master controllers in alphabetical order above this line | |
408 | # | |
409 | ||
e24c7452 | 410 | config SPI_DESIGNWARE |
8ca8d15a | 411 | tristate "DesignWare SPI controller core support" |
e24c7452 FT |
412 | help |
413 | general driver for SPI controller core from DesignWare | |
414 | ||
415 | config SPI_DW_PCI | |
416 | tristate "PCI interface driver for DW SPI core" | |
417 | depends on SPI_DESIGNWARE && PCI | |
418 | ||
7063c0d9 FT |
419 | config SPI_DW_MID_DMA |
420 | bool "DMA support for DW SPI controller on Intel Moorestown platform" | |
421 | depends on SPI_DW_PCI && INTEL_MID_DMAC | |
422 | ||
f7b6fd6d JHD |
423 | config SPI_DW_MMIO |
424 | tristate "Memory-mapped io interface driver for DW SPI core" | |
212b3c8b | 425 | depends on SPI_DESIGNWARE && HAVE_CLK |
f7b6fd6d | 426 | |
8ae12a0d DB |
427 | # |
428 | # There are lots of SPI device types, with sensors and memory | |
429 | # being probably the most widely used ones. | |
430 | # | |
431 | comment "SPI Protocol Masters" | |
8ae12a0d | 432 | |
814a8d50 AP |
433 | config SPI_SPIDEV |
434 | tristate "User mode SPI device driver support" | |
6291fe2a | 435 | depends on EXPERIMENTAL |
814a8d50 AP |
436 | help |
437 | This supports user mode SPI protocol drivers. | |
438 | ||
439 | Note that this application programming interface is EXPERIMENTAL | |
440 | and hence SUBJECT TO CHANGE WITHOUT NOTICE while it stabilizes. | |
441 | ||
447aef1a BD |
442 | config SPI_TLE62X0 |
443 | tristate "Infineon TLE62X0 (for power switching)" | |
6291fe2a | 444 | depends on SYSFS |
447aef1a BD |
445 | help |
446 | SPI driver for Infineon TLE62X0 series line driver chips, | |
447 | such as the TLE6220, TLE6230 and TLE6240. This provides a | |
448 | sysfs interface, with each line presented as a kind of GPIO | |
449 | exposing both switch control and diagnostic feedback. | |
450 | ||
8ae12a0d DB |
451 | # |
452 | # Add new SPI protocol masters in alphabetical order above this line | |
453 | # | |
454 | ||
6291fe2a RD |
455 | endif # SPI_MASTER |
456 | ||
8ae12a0d DB |
457 | # (slave support would go here) |
458 | ||
79d8c7a8 | 459 | endif # SPI |