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Commit | Line | Data |
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8ae12a0d DB |
1 | # |
2 | # SPI driver configuration | |
3 | # | |
4 | # NOTE: the reason this doesn't show SPI slave support is mostly that | |
5 | # nobody's needed a slave side API yet. The master-role API is not | |
6 | # fully appropriate there, so it'd need some thought to do well. | |
7 | # | |
79d8c7a8 | 8 | menuconfig SPI |
8ae12a0d | 9 | bool "SPI support" |
79d8c7a8 | 10 | depends on HAS_IOMEM |
8ae12a0d DB |
11 | help |
12 | The "Serial Peripheral Interface" is a low level synchronous | |
13 | protocol. Chips that support SPI can have data transfer rates | |
14 | up to several tens of Mbit/sec. Chips are addressed with a | |
15 | controller and a chipselect. Most SPI slaves don't support | |
16 | dynamic device discovery; some are even write-only or read-only. | |
17 | ||
3cb2fccc | 18 | SPI is widely used by microcontrollers to talk with sensors, |
8ae12a0d DB |
19 | eeprom and flash memory, codecs and various other controller |
20 | chips, analog to digital (and d-to-a) converters, and more. | |
21 | MMC and SD cards can be accessed using SPI protocol; and for | |
22 | DataFlash cards used in MMC sockets, SPI must always be used. | |
23 | ||
24 | SPI is one of a family of similar protocols using a four wire | |
25 | interface (select, clock, data in, data out) including Microwire | |
26 | (half duplex), SSP, SSI, and PSP. This driver framework should | |
27 | work with most such devices and controllers. | |
28 | ||
79d8c7a8 AG |
29 | if SPI |
30 | ||
8ae12a0d DB |
31 | config SPI_DEBUG |
32 | boolean "Debug support for SPI drivers" | |
79d8c7a8 | 33 | depends on DEBUG_KERNEL |
8ae12a0d DB |
34 | help |
35 | Say "yes" to enable debug messaging (like dev_dbg and pr_debug), | |
36 | sysfs, and debugfs support in SPI controller and protocol drivers. | |
37 | ||
38 | # | |
39 | # MASTER side ... talking to discrete SPI slave chips including microcontrollers | |
40 | # | |
41 | ||
42 | config SPI_MASTER | |
43 | # boolean "SPI Master Support" | |
44 | boolean | |
45 | default SPI | |
46 | help | |
47 | If your system has an master-capable SPI controller (which | |
48 | provides the clock and chipselect), you can enable that | |
49 | controller and the protocol drivers for the SPI slave chips | |
50 | that are connected. | |
51 | ||
6291fe2a RD |
52 | if SPI_MASTER |
53 | ||
8ae12a0d | 54 | comment "SPI Master Controller Drivers" |
8ae12a0d | 55 | |
754ce4f2 HS |
56 | config SPI_ATMEL |
57 | tristate "Atmel SPI Controller" | |
6291fe2a | 58 | depends on (ARCH_AT91 || AVR32) |
754ce4f2 HS |
59 | help |
60 | This selects a driver for the Atmel SPI Controller, present on | |
61 | many AT32 (AVR32) and AT91 (ARM) chips. | |
62 | ||
a5f6abd4 WB |
63 | config SPI_BFIN |
64 | tristate "SPI controller driver for ADI Blackfin5xx" | |
6291fe2a | 65 | depends on BLACKFIN |
a5f6abd4 WB |
66 | help |
67 | This is the SPI controller master driver for Blackfin 5xx processor. | |
68 | ||
63bd2359 JN |
69 | config SPI_AU1550 |
70 | tristate "Au1550/Au12x0 SPI Controller" | |
6291fe2a | 71 | depends on (SOC_AU1550 || SOC_AU1200) && EXPERIMENTAL |
63bd2359 JN |
72 | select SPI_BITBANG |
73 | help | |
74 | If you say yes to this option, support will be included for the | |
75 | Au1550 SPI controller (may also work with Au1200,Au1210,Au1250). | |
76 | ||
77 | This driver can also be built as a module. If so, the module | |
78 | will be called au1550_spi. | |
79 | ||
9904f22a | 80 | config SPI_BITBANG |
d29389de | 81 | tristate "Utilities for Bitbanging SPI masters" |
9904f22a DB |
82 | help |
83 | With a few GPIO pins, your system can bitbang the SPI protocol. | |
84 | Select this to get SPI support through I/O pins (GPIO, parallel | |
85 | port, etc). Or, some systems' SPI master controller drivers use | |
86 | this code to manage the per-word or per-transfer accesses to the | |
87 | hardware shift registers. | |
88 | ||
89 | This is library code, and is automatically selected by drivers that | |
90 | need it. You only need to select this explicitly to support driver | |
91 | modules that aren't part of this kernel tree. | |
8ae12a0d | 92 | |
7111763d DB |
93 | config SPI_BUTTERFLY |
94 | tristate "Parallel port adapter for AVR Butterfly (DEVELOPMENT)" | |
6291fe2a | 95 | depends on PARPORT |
7111763d DB |
96 | select SPI_BITBANG |
97 | help | |
98 | This uses a custom parallel port cable to connect to an AVR | |
99 | Butterfly <http://www.atmel.com/products/avr/butterfly>, an | |
100 | inexpensive battery powered microcontroller evaluation board. | |
101 | This same cable can be used to flash new firmware. | |
102 | ||
358934a6 SP |
103 | config SPI_DAVINCI |
104 | tristate "SPI controller driver for DaVinci/DA8xx SoC's" | |
105 | depends on SPI_MASTER && ARCH_DAVINCI | |
106 | select SPI_BITBANG | |
107 | help | |
108 | SPI master controller for DaVinci and DA8xx SPI modules. | |
109 | ||
d29389de DB |
110 | config SPI_GPIO |
111 | tristate "GPIO-based bitbanging SPI Master" | |
112 | depends on GENERIC_GPIO | |
113 | select SPI_BITBANG | |
114 | help | |
115 | This simple GPIO bitbanging SPI master uses the arch-neutral GPIO | |
116 | interface to manage MOSI, MISO, SCK, and chipselect signals. SPI | |
117 | slaves connected to a bus using this driver are configured as usual, | |
118 | except that the spi_board_info.controller_data holds the GPIO number | |
119 | for the chipselect used by this controller driver. | |
120 | ||
121 | Note that this driver often won't achieve even 1 Mbit/sec speeds, | |
122 | making it unusually slow for SPI. If your platform can inline | |
123 | GPIO operations, you should be able to leverage that for better | |
124 | speed with a custom version of this driver; see the source code. | |
125 | ||
b5f3294f SH |
126 | config SPI_IMX |
127 | tristate "Freescale i.MX SPI controllers" | |
128 | depends on ARCH_MXC | |
129 | select SPI_BITBANG | |
130 | help | |
131 | This enables using the Freescale i.MX SPI controllers in master | |
132 | mode. | |
133 | ||
78961a57 KB |
134 | config SPI_LM70_LLP |
135 | tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)" | |
6291fe2a | 136 | depends on PARPORT && EXPERIMENTAL |
78961a57 KB |
137 | select SPI_BITBANG |
138 | help | |
139 | This driver supports the NS LM70 LLP Evaluation Board, | |
140 | which interfaces to an LM70 temperature sensor using | |
141 | a parallel port. | |
142 | ||
42bbb709 GL |
143 | config SPI_MPC52xx |
144 | tristate "Freescale MPC52xx SPI (non-PSC) controller support" | |
145 | depends on PPC_MPC52xx && SPI | |
146 | select SPI_MASTER_OF | |
147 | help | |
148 | This drivers supports the MPC52xx SPI controller in master SPI | |
149 | mode. | |
150 | ||
00b8fd23 DC |
151 | config SPI_MPC52xx_PSC |
152 | tristate "Freescale MPC52xx PSC SPI controller" | |
6291fe2a | 153 | depends on PPC_MPC52xx && EXPERIMENTAL |
00b8fd23 DC |
154 | help |
155 | This enables using the Freescale MPC52xx Programmable Serial | |
156 | Controller in master SPI mode. | |
157 | ||
575c5807 | 158 | config SPI_MPC8xxx |
9e04b333 AV |
159 | tristate "Freescale MPC8xxx SPI controller" |
160 | depends on FSL_SOC | |
ccf06998 | 161 | help |
9e04b333 AV |
162 | This enables using the Freescale MPC8xxx SPI controllers in master |
163 | mode. | |
ccf06998 | 164 | |
fdb3c18d DB |
165 | config SPI_OMAP_UWIRE |
166 | tristate "OMAP1 MicroWire" | |
6291fe2a | 167 | depends on ARCH_OMAP1 |
fdb3c18d DB |
168 | select SPI_BITBANG |
169 | help | |
170 | This hooks up to the MicroWire controller on OMAP1 chips. | |
171 | ||
ccdc7bf9 | 172 | config SPI_OMAP24XX |
ccc7baed | 173 | tristate "McSPI driver for OMAP24xx/OMAP34xx" |
6291fe2a | 174 | depends on ARCH_OMAP24XX || ARCH_OMAP34XX |
ccdc7bf9 | 175 | help |
ccc7baed | 176 | SPI master controller for OMAP24xx/OMAP34xx Multichannel SPI |
ccdc7bf9 | 177 | (McSPI) modules. |
69c202af | 178 | |
35c9049b CM |
179 | config SPI_OMAP_100K |
180 | tristate "OMAP SPI 100K" | |
181 | depends on SPI_MASTER && (ARCH_OMAP850 || ARCH_OMAP730) | |
182 | help | |
183 | OMAP SPI 100K master controller for omap7xx boards. | |
184 | ||
60cadec9 SA |
185 | config SPI_ORION |
186 | tristate "Orion SPI master (EXPERIMENTAL)" | |
187 | depends on PLAT_ORION && EXPERIMENTAL | |
188 | help | |
189 | This enables using the SPI master controller on the Orion chips. | |
190 | ||
b43d65f7 LW |
191 | config SPI_PL022 |
192 | tristate "ARM AMBA PL022 SSP controller (EXPERIMENTAL)" | |
193 | depends on ARM_AMBA && EXPERIMENTAL | |
194 | default y if MACH_U300 | |
f33b29ee | 195 | default y if ARCH_REALVIEW |
196 | default y if INTEGRATOR_IMPD1 | |
197 | default y if ARCH_VERSATILE | |
b43d65f7 LW |
198 | help |
199 | This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP | |
200 | controller. If you have an embedded system with an AMBA(R) | |
201 | bus and a PL022 controller, say Y or M here. | |
202 | ||
44dab88e SF |
203 | config SPI_PPC4xx |
204 | tristate "PPC4xx SPI Controller" | |
205 | depends on PPC32 && 4xx && SPI_MASTER | |
206 | select SPI_BITBANG | |
207 | help | |
208 | This selects a driver for the PPC4xx SPI Controller. | |
209 | ||
e0c9905e SS |
210 | config SPI_PXA2XX |
211 | tristate "PXA2xx SSP SPI master" | |
6291fe2a | 212 | depends on ARCH_PXA && EXPERIMENTAL |
2f1a74e5 | 213 | select PXA_SSP |
e0c9905e SS |
214 | help |
215 | This enables using a PXA2xx SSP port as a SPI master controller. | |
216 | The driver can be configured to use any SSP port and additional | |
217 | documentation can be found a Documentation/spi/pxa2xx. | |
218 | ||
85abfaa7 DB |
219 | config SPI_S3C24XX |
220 | tristate "Samsung S3C24XX series SPI" | |
6291fe2a | 221 | depends on ARCH_S3C2410 && EXPERIMENTAL |
da0abc27 | 222 | select SPI_BITBANG |
85abfaa7 DB |
223 | help |
224 | SPI driver for Samsung S3C24XX series ARM SoCs | |
225 | ||
bec0806c BD |
226 | config SPI_S3C24XX_FIQ |
227 | bool "S3C24XX driver with FIQ pseudo-DMA" | |
228 | depends on SPI_S3C24XX | |
229 | select FIQ | |
230 | help | |
231 | Enable FIQ support for the S3C24XX SPI driver to provide pseudo | |
232 | DMA by using the fast-interrupt request framework, This allows | |
233 | the driver to get DMA-like performance when there are either | |
234 | no free DMA channels, or when doing transfers that required both | |
235 | TX and RX data paths. | |
236 | ||
1fc7547d BD |
237 | config SPI_S3C24XX_GPIO |
238 | tristate "Samsung S3C24XX series SPI by GPIO" | |
6291fe2a | 239 | depends on ARCH_S3C2410 && EXPERIMENTAL |
da0abc27 | 240 | select SPI_BITBANG |
1fc7547d BD |
241 | help |
242 | SPI driver for Samsung S3C24XX series ARM SoCs using | |
243 | GPIO lines to provide the SPI bus. This can be used where | |
244 | the inbuilt hardware cannot provide the transfer mode, or | |
245 | where the board is using non hardware connected pins. | |
ae918c02 | 246 | |
230d42d4 JB |
247 | config SPI_S3C64XX |
248 | tristate "Samsung S3C64XX series type SPI" | |
249 | depends on ARCH_S3C64XX && EXPERIMENTAL | |
250 | select S3C64XX_DMA | |
251 | help | |
252 | SPI driver for Samsung S3C64XX and newer SoCs. | |
253 | ||
8051effc MD |
254 | config SPI_SH_MSIOF |
255 | tristate "SuperH MSIOF SPI controller" | |
256 | depends on SUPERH && HAVE_CLK | |
257 | select SPI_BITBANG | |
258 | help | |
259 | SPI driver for SuperH MSIOF blocks. | |
260 | ||
37e46640 MD |
261 | config SPI_SH_SCI |
262 | tristate "SuperH SCI SPI controller" | |
6291fe2a | 263 | depends on SUPERH |
37e46640 MD |
264 | select SPI_BITBANG |
265 | help | |
266 | SPI driver for SuperH SCI blocks. | |
267 | ||
0644c486 | 268 | config SPI_STMP3XXX |
269 | tristate "Freescale STMP37xx/378x SPI/SSP controller" | |
270 | depends on ARCH_STMP3XXX && SPI_MASTER | |
271 | help | |
272 | SPI driver for Freescale STMP37xx/378x SoC SSP interface | |
273 | ||
f2cac67d AN |
274 | config SPI_TXX9 |
275 | tristate "Toshiba TXx9 SPI controller" | |
6291fe2a | 276 | depends on GENERIC_GPIO && CPU_TX49XX |
f2cac67d AN |
277 | help |
278 | SPI driver for Toshiba TXx9 MIPS SoCs | |
279 | ||
ae918c02 | 280 | config SPI_XILINX |
c9da2e12 | 281 | tristate "Xilinx SPI controller common module" |
86fc5935 | 282 | depends on HAS_IOMEM && EXPERIMENTAL |
ae918c02 | 283 | select SPI_BITBANG |
d5af91a1 | 284 | select SPI_XILINX_OF if (XILINX_VIRTEX || MICROBLAZE) |
ae918c02 AK |
285 | help |
286 | This exposes the SPI controller IP from the Xilinx EDK. | |
287 | ||
288 | See the "OPB Serial Peripheral Interface (SPI) (v1.00e)" | |
289 | Product Specification document (DS464) for hardware details. | |
290 | ||
c9da2e12 RR |
291 | Or for the DS570, see "XPS Serial Peripheral Interface (SPI) (v2.00b)" |
292 | ||
d5af91a1 RR |
293 | config SPI_XILINX_OF |
294 | tristate "Xilinx SPI controller OF device" | |
295 | depends on SPI_XILINX && (XILINX_VIRTEX || MICROBLAZE) | |
296 | help | |
297 | This is the OF driver for the SPI controller IP from the Xilinx EDK. | |
298 | ||
77166934 RR |
299 | config SPI_XILINX_PLTFM |
300 | tristate "Xilinx SPI controller platform device" | |
301 | depends on SPI_XILINX | |
302 | help | |
303 | This is the platform driver for the SPI controller IP | |
304 | from the Xilinx EDK. | |
305 | ||
30eaed05 WZ |
306 | config SPI_NUC900 |
307 | tristate "Nuvoton NUC900 series SPI" | |
308 | depends on ARCH_W90X900 && EXPERIMENTAL | |
309 | select SPI_BITBANG | |
310 | help | |
311 | SPI driver for Nuvoton NUC900 series ARM SoCs | |
312 | ||
8ae12a0d DB |
313 | # |
314 | # Add new SPI master controllers in alphabetical order above this line | |
315 | # | |
316 | ||
e24c7452 FT |
317 | config SPI_DESIGNWARE |
318 | bool "DesignWare SPI controller core support" | |
319 | depends on SPI_MASTER | |
320 | help | |
321 | general driver for SPI controller core from DesignWare | |
322 | ||
323 | config SPI_DW_PCI | |
324 | tristate "PCI interface driver for DW SPI core" | |
325 | depends on SPI_DESIGNWARE && PCI | |
326 | ||
8ae12a0d DB |
327 | # |
328 | # There are lots of SPI device types, with sensors and memory | |
329 | # being probably the most widely used ones. | |
330 | # | |
331 | comment "SPI Protocol Masters" | |
8ae12a0d | 332 | |
814a8d50 AP |
333 | config SPI_SPIDEV |
334 | tristate "User mode SPI device driver support" | |
6291fe2a | 335 | depends on EXPERIMENTAL |
814a8d50 AP |
336 | help |
337 | This supports user mode SPI protocol drivers. | |
338 | ||
339 | Note that this application programming interface is EXPERIMENTAL | |
340 | and hence SUBJECT TO CHANGE WITHOUT NOTICE while it stabilizes. | |
341 | ||
447aef1a BD |
342 | config SPI_TLE62X0 |
343 | tristate "Infineon TLE62X0 (for power switching)" | |
6291fe2a | 344 | depends on SYSFS |
447aef1a BD |
345 | help |
346 | SPI driver for Infineon TLE62X0 series line driver chips, | |
347 | such as the TLE6220, TLE6230 and TLE6240. This provides a | |
348 | sysfs interface, with each line presented as a kind of GPIO | |
349 | exposing both switch control and diagnostic feedback. | |
350 | ||
8ae12a0d DB |
351 | # |
352 | # Add new SPI protocol masters in alphabetical order above this line | |
353 | # | |
354 | ||
6291fe2a RD |
355 | endif # SPI_MASTER |
356 | ||
8ae12a0d DB |
357 | # (slave support would go here) |
358 | ||
79d8c7a8 | 359 | endif # SPI |