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Commit | Line | Data |
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8ae12a0d DB |
1 | # |
2 | # SPI driver configuration | |
3 | # | |
4 | # NOTE: the reason this doesn't show SPI slave support is mostly that | |
5 | # nobody's needed a slave side API yet. The master-role API is not | |
6 | # fully appropriate there, so it'd need some thought to do well. | |
7 | # | |
79d8c7a8 | 8 | menuconfig SPI |
8ae12a0d | 9 | bool "SPI support" |
79d8c7a8 | 10 | depends on HAS_IOMEM |
8ae12a0d DB |
11 | help |
12 | The "Serial Peripheral Interface" is a low level synchronous | |
13 | protocol. Chips that support SPI can have data transfer rates | |
14 | up to several tens of Mbit/sec. Chips are addressed with a | |
15 | controller and a chipselect. Most SPI slaves don't support | |
16 | dynamic device discovery; some are even write-only or read-only. | |
17 | ||
3cb2fccc | 18 | SPI is widely used by microcontrollers to talk with sensors, |
8ae12a0d DB |
19 | eeprom and flash memory, codecs and various other controller |
20 | chips, analog to digital (and d-to-a) converters, and more. | |
21 | MMC and SD cards can be accessed using SPI protocol; and for | |
22 | DataFlash cards used in MMC sockets, SPI must always be used. | |
23 | ||
24 | SPI is one of a family of similar protocols using a four wire | |
25 | interface (select, clock, data in, data out) including Microwire | |
26 | (half duplex), SSP, SSI, and PSP. This driver framework should | |
27 | work with most such devices and controllers. | |
28 | ||
79d8c7a8 AG |
29 | if SPI |
30 | ||
8ae12a0d DB |
31 | config SPI_DEBUG |
32 | boolean "Debug support for SPI drivers" | |
79d8c7a8 | 33 | depends on DEBUG_KERNEL |
8ae12a0d DB |
34 | help |
35 | Say "yes" to enable debug messaging (like dev_dbg and pr_debug), | |
36 | sysfs, and debugfs support in SPI controller and protocol drivers. | |
37 | ||
38 | # | |
39 | # MASTER side ... talking to discrete SPI slave chips including microcontrollers | |
40 | # | |
41 | ||
42 | config SPI_MASTER | |
43 | # boolean "SPI Master Support" | |
44 | boolean | |
45 | default SPI | |
46 | help | |
47 | If your system has an master-capable SPI controller (which | |
48 | provides the clock and chipselect), you can enable that | |
49 | controller and the protocol drivers for the SPI slave chips | |
50 | that are connected. | |
51 | ||
6291fe2a RD |
52 | if SPI_MASTER |
53 | ||
8ae12a0d | 54 | comment "SPI Master Controller Drivers" |
8ae12a0d | 55 | |
754ce4f2 HS |
56 | config SPI_ATMEL |
57 | tristate "Atmel SPI Controller" | |
6291fe2a | 58 | depends on (ARCH_AT91 || AVR32) |
754ce4f2 HS |
59 | help |
60 | This selects a driver for the Atmel SPI Controller, present on | |
61 | many AT32 (AVR32) and AT91 (ARM) chips. | |
62 | ||
a5f6abd4 WB |
63 | config SPI_BFIN |
64 | tristate "SPI controller driver for ADI Blackfin5xx" | |
6291fe2a | 65 | depends on BLACKFIN |
a5f6abd4 WB |
66 | help |
67 | This is the SPI controller master driver for Blackfin 5xx processor. | |
68 | ||
63bd2359 JN |
69 | config SPI_AU1550 |
70 | tristate "Au1550/Au12x0 SPI Controller" | |
6291fe2a | 71 | depends on (SOC_AU1550 || SOC_AU1200) && EXPERIMENTAL |
63bd2359 JN |
72 | select SPI_BITBANG |
73 | help | |
74 | If you say yes to this option, support will be included for the | |
75 | Au1550 SPI controller (may also work with Au1200,Au1210,Au1250). | |
76 | ||
77 | This driver can also be built as a module. If so, the module | |
78 | will be called au1550_spi. | |
79 | ||
9904f22a | 80 | config SPI_BITBANG |
d29389de | 81 | tristate "Utilities for Bitbanging SPI masters" |
9904f22a DB |
82 | help |
83 | With a few GPIO pins, your system can bitbang the SPI protocol. | |
84 | Select this to get SPI support through I/O pins (GPIO, parallel | |
85 | port, etc). Or, some systems' SPI master controller drivers use | |
86 | this code to manage the per-word or per-transfer accesses to the | |
87 | hardware shift registers. | |
88 | ||
89 | This is library code, and is automatically selected by drivers that | |
90 | need it. You only need to select this explicitly to support driver | |
91 | modules that aren't part of this kernel tree. | |
8ae12a0d | 92 | |
7111763d DB |
93 | config SPI_BUTTERFLY |
94 | tristate "Parallel port adapter for AVR Butterfly (DEVELOPMENT)" | |
6291fe2a | 95 | depends on PARPORT |
7111763d DB |
96 | select SPI_BITBANG |
97 | help | |
98 | This uses a custom parallel port cable to connect to an AVR | |
99 | Butterfly <http://www.atmel.com/products/avr/butterfly>, an | |
100 | inexpensive battery powered microcontroller evaluation board. | |
101 | This same cable can be used to flash new firmware. | |
102 | ||
34b8c661 SK |
103 | config SPI_COLDFIRE_QSPI |
104 | tristate "Freescale Coldfire QSPI controller" | |
105 | depends on (M520x || M523x || M5249 || M527x || M528x || M532x) | |
106 | help | |
107 | This enables support for the Coldfire QSPI controller in master | |
108 | mode. | |
109 | ||
110 | This driver can also be built as a module. If so, the module | |
111 | will be called coldfire_qspi. | |
112 | ||
358934a6 | 113 | config SPI_DAVINCI |
23ce17ad | 114 | tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller" |
358934a6 SP |
115 | depends on SPI_MASTER && ARCH_DAVINCI |
116 | select SPI_BITBANG | |
117 | help | |
23ce17ad SN |
118 | SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules. |
119 | ||
120 | This driver can also be built as a module. The module will be called | |
121 | davinci_spi. | |
358934a6 | 122 | |
011f23a3 MW |
123 | config SPI_EP93XX |
124 | tristate "Cirrus Logic EP93xx SPI controller" | |
125 | depends on ARCH_EP93XX | |
126 | help | |
127 | This enables using the Cirrus EP93xx SPI controller in master | |
128 | mode. | |
129 | ||
130 | To compile this driver as a module, choose M here. The module will be | |
131 | called ep93xx_spi. | |
132 | ||
d29389de DB |
133 | config SPI_GPIO |
134 | tristate "GPIO-based bitbanging SPI Master" | |
135 | depends on GENERIC_GPIO | |
136 | select SPI_BITBANG | |
137 | help | |
138 | This simple GPIO bitbanging SPI master uses the arch-neutral GPIO | |
139 | interface to manage MOSI, MISO, SCK, and chipselect signals. SPI | |
140 | slaves connected to a bus using this driver are configured as usual, | |
141 | except that the spi_board_info.controller_data holds the GPIO number | |
142 | for the chipselect used by this controller driver. | |
143 | ||
144 | Note that this driver often won't achieve even 1 Mbit/sec speeds, | |
145 | making it unusually slow for SPI. If your platform can inline | |
146 | GPIO operations, you should be able to leverage that for better | |
147 | speed with a custom version of this driver; see the source code. | |
148 | ||
f4ba6315 UKK |
149 | config SPI_IMX_VER_IMX1 |
150 | def_bool y if SOC_IMX1 | |
151 | ||
152 | config SPI_IMX_VER_0_0 | |
153 | def_bool y if SOC_IMX21 || SOC_IMX27 | |
154 | ||
155 | config SPI_IMX_VER_0_4 | |
156 | def_bool y if ARCH_MX31 | |
157 | ||
158 | config SPI_IMX_VER_0_7 | |
77e7bc61 | 159 | def_bool y if ARCH_MX25 || ARCH_MX35 || ARCH_MX51 || ARCH_MX53 |
0b599603 UKK |
160 | |
161 | config SPI_IMX_VER_2_3 | |
77e7bc61 | 162 | def_bool y if ARCH_MX51 || ARCH_MX53 |
f4ba6315 | 163 | |
b5f3294f SH |
164 | config SPI_IMX |
165 | tristate "Freescale i.MX SPI controllers" | |
166 | depends on ARCH_MXC | |
167 | select SPI_BITBANG | |
e89524d3 | 168 | default m if IMX_HAVE_PLATFORM_SPI_IMX |
b5f3294f SH |
169 | help |
170 | This enables using the Freescale i.MX SPI controllers in master | |
171 | mode. | |
172 | ||
78961a57 KB |
173 | config SPI_LM70_LLP |
174 | tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)" | |
6291fe2a | 175 | depends on PARPORT && EXPERIMENTAL |
78961a57 KB |
176 | select SPI_BITBANG |
177 | help | |
178 | This driver supports the NS LM70 LLP Evaluation Board, | |
179 | which interfaces to an LM70 temperature sensor using | |
180 | a parallel port. | |
181 | ||
42bbb709 GL |
182 | config SPI_MPC52xx |
183 | tristate "Freescale MPC52xx SPI (non-PSC) controller support" | |
184 | depends on PPC_MPC52xx && SPI | |
185 | select SPI_MASTER_OF | |
186 | help | |
187 | This drivers supports the MPC52xx SPI controller in master SPI | |
188 | mode. | |
189 | ||
00b8fd23 DC |
190 | config SPI_MPC52xx_PSC |
191 | tristate "Freescale MPC52xx PSC SPI controller" | |
6291fe2a | 192 | depends on PPC_MPC52xx && EXPERIMENTAL |
00b8fd23 DC |
193 | help |
194 | This enables using the Freescale MPC52xx Programmable Serial | |
195 | Controller in master SPI mode. | |
196 | ||
6e27388f AG |
197 | config SPI_MPC512x_PSC |
198 | tristate "Freescale MPC512x PSC SPI controller" | |
199 | depends on SPI_MASTER && PPC_MPC512x | |
200 | help | |
201 | This enables using the Freescale MPC5121 Programmable Serial | |
202 | Controller in SPI master mode. | |
203 | ||
b36ece83 MH |
204 | config SPI_FSL_LIB |
205 | tristate | |
206 | depends on FSL_SOC | |
207 | ||
3272029f MH |
208 | config SPI_FSL_SPI |
209 | tristate "Freescale SPI controller" | |
9e04b333 | 210 | depends on FSL_SOC |
b36ece83 | 211 | select SPI_FSL_LIB |
ccf06998 | 212 | help |
3272029f MH |
213 | This enables using the Freescale SPI controllers in master mode. |
214 | MPC83xx platform uses the controller in cpu mode or CPM/QE mode. | |
215 | MPC8569 uses the controller in QE mode, MPC8610 in cpu mode. | |
ccf06998 | 216 | |
8b60d6c2 MH |
217 | config SPI_FSL_ESPI |
218 | tristate "Freescale eSPI controller" | |
219 | depends on FSL_SOC | |
220 | select SPI_FSL_LIB | |
221 | help | |
222 | This enables using the Freescale eSPI controllers in master mode. | |
223 | From MPC8536, 85xx platform uses the controller, and all P10xx, | |
224 | P20xx, P30xx,P40xx, P50xx uses this controller. | |
225 | ||
fdb3c18d DB |
226 | config SPI_OMAP_UWIRE |
227 | tristate "OMAP1 MicroWire" | |
6291fe2a | 228 | depends on ARCH_OMAP1 |
fdb3c18d DB |
229 | select SPI_BITBANG |
230 | help | |
231 | This hooks up to the MicroWire controller on OMAP1 chips. | |
232 | ||
ccdc7bf9 | 233 | config SPI_OMAP24XX |
8ebeb545 SR |
234 | tristate "McSPI driver for OMAP" |
235 | depends on ARCH_OMAP2PLUS | |
ccdc7bf9 | 236 | help |
8ebeb545 | 237 | SPI master controller for OMAP24XX and later Multichannel SPI |
ccdc7bf9 | 238 | (McSPI) modules. |
69c202af | 239 | |
35c9049b CM |
240 | config SPI_OMAP_100K |
241 | tristate "OMAP SPI 100K" | |
242 | depends on SPI_MASTER && (ARCH_OMAP850 || ARCH_OMAP730) | |
243 | help | |
244 | OMAP SPI 100K master controller for omap7xx boards. | |
245 | ||
60cadec9 SA |
246 | config SPI_ORION |
247 | tristate "Orion SPI master (EXPERIMENTAL)" | |
248 | depends on PLAT_ORION && EXPERIMENTAL | |
249 | help | |
250 | This enables using the SPI master controller on the Orion chips. | |
251 | ||
b43d65f7 LW |
252 | config SPI_PL022 |
253 | tristate "ARM AMBA PL022 SSP controller (EXPERIMENTAL)" | |
254 | depends on ARM_AMBA && EXPERIMENTAL | |
255 | default y if MACH_U300 | |
f33b29ee | 256 | default y if ARCH_REALVIEW |
257 | default y if INTEGRATOR_IMPD1 | |
258 | default y if ARCH_VERSATILE | |
b43d65f7 LW |
259 | help |
260 | This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP | |
261 | controller. If you have an embedded system with an AMBA(R) | |
262 | bus and a PL022 controller, say Y or M here. | |
263 | ||
44dab88e SF |
264 | config SPI_PPC4xx |
265 | tristate "PPC4xx SPI Controller" | |
266 | depends on PPC32 && 4xx && SPI_MASTER | |
267 | select SPI_BITBANG | |
268 | help | |
269 | This selects a driver for the PPC4xx SPI Controller. | |
270 | ||
e0c9905e SS |
271 | config SPI_PXA2XX |
272 | tristate "PXA2xx SSP SPI master" | |
d6ea3df0 SAS |
273 | depends on (ARCH_PXA || (X86_32 && PCI)) && EXPERIMENTAL |
274 | select PXA_SSP if ARCH_PXA | |
e0c9905e | 275 | help |
d6ea3df0 SAS |
276 | This enables using a PXA2xx or Sodaville SSP port as a SPI master |
277 | controller. The driver can be configured to use any SSP port and | |
278 | additional documentation can be found a Documentation/spi/pxa2xx. | |
279 | ||
280 | config SPI_PXA2XX_PCI | |
281 | def_bool SPI_PXA2XX && X86_32 && PCI | |
e0c9905e | 282 | |
85abfaa7 DB |
283 | config SPI_S3C24XX |
284 | tristate "Samsung S3C24XX series SPI" | |
6291fe2a | 285 | depends on ARCH_S3C2410 && EXPERIMENTAL |
da0abc27 | 286 | select SPI_BITBANG |
85abfaa7 DB |
287 | help |
288 | SPI driver for Samsung S3C24XX series ARM SoCs | |
289 | ||
bec0806c BD |
290 | config SPI_S3C24XX_FIQ |
291 | bool "S3C24XX driver with FIQ pseudo-DMA" | |
292 | depends on SPI_S3C24XX | |
293 | select FIQ | |
294 | help | |
295 | Enable FIQ support for the S3C24XX SPI driver to provide pseudo | |
296 | DMA by using the fast-interrupt request framework, This allows | |
297 | the driver to get DMA-like performance when there are either | |
298 | no free DMA channels, or when doing transfers that required both | |
299 | TX and RX data paths. | |
300 | ||
1fc7547d BD |
301 | config SPI_S3C24XX_GPIO |
302 | tristate "Samsung S3C24XX series SPI by GPIO" | |
6291fe2a | 303 | depends on ARCH_S3C2410 && EXPERIMENTAL |
da0abc27 | 304 | select SPI_BITBANG |
1fc7547d BD |
305 | help |
306 | SPI driver for Samsung S3C24XX series ARM SoCs using | |
307 | GPIO lines to provide the SPI bus. This can be used where | |
308 | the inbuilt hardware cannot provide the transfer mode, or | |
309 | where the board is using non hardware connected pins. | |
ae918c02 | 310 | |
230d42d4 JB |
311 | config SPI_S3C64XX |
312 | tristate "Samsung S3C64XX series type SPI" | |
5f35765d AK |
313 | depends on (ARCH_S3C64XX || ARCH_S5P64X0) |
314 | select S3C64XX_DMA if ARCH_S3C64XX | |
230d42d4 JB |
315 | help |
316 | SPI driver for Samsung S3C64XX and newer SoCs. | |
317 | ||
8051effc MD |
318 | config SPI_SH_MSIOF |
319 | tristate "SuperH MSIOF SPI controller" | |
320 | depends on SUPERH && HAVE_CLK | |
321 | select SPI_BITBANG | |
322 | help | |
323 | SPI driver for SuperH MSIOF blocks. | |
324 | ||
37e46640 MD |
325 | config SPI_SH_SCI |
326 | tristate "SuperH SCI SPI controller" | |
6291fe2a | 327 | depends on SUPERH |
37e46640 MD |
328 | select SPI_BITBANG |
329 | help | |
330 | SPI driver for SuperH SCI blocks. | |
331 | ||
0644c486 | 332 | config SPI_STMP3XXX |
333 | tristate "Freescale STMP37xx/378x SPI/SSP controller" | |
334 | depends on ARCH_STMP3XXX && SPI_MASTER | |
335 | help | |
336 | SPI driver for Freescale STMP37xx/378x SoC SSP interface | |
337 | ||
0c03a1dd EG |
338 | config SPI_TEGRA |
339 | tristate "Nvidia Tegra SPI controller" | |
340 | depends on ARCH_TEGRA | |
341 | select TEGRA_SYSTEM_DMA | |
342 | help | |
343 | SPI driver for NVidia Tegra SoCs | |
344 | ||
e8b17b5b | 345 | config SPI_TOPCLIFF_PCH |
cdbc8f04 | 346 | tristate "Topcliff PCH SPI Controller" |
e8b17b5b MO |
347 | depends on PCI |
348 | help | |
cdbc8f04 GL |
349 | SPI driver for the Topcliff PCH (Platform Controller Hub) SPI bus |
350 | used in some x86 embedded processors. | |
e8b17b5b | 351 | |
f2cac67d AN |
352 | config SPI_TXX9 |
353 | tristate "Toshiba TXx9 SPI controller" | |
6291fe2a | 354 | depends on GENERIC_GPIO && CPU_TX49XX |
f2cac67d AN |
355 | help |
356 | SPI driver for Toshiba TXx9 MIPS SoCs | |
357 | ||
ae918c02 | 358 | config SPI_XILINX |
c9da2e12 | 359 | tristate "Xilinx SPI controller common module" |
86fc5935 | 360 | depends on HAS_IOMEM && EXPERIMENTAL |
ae918c02 AK |
361 | select SPI_BITBANG |
362 | help | |
363 | This exposes the SPI controller IP from the Xilinx EDK. | |
364 | ||
365 | See the "OPB Serial Peripheral Interface (SPI) (v1.00e)" | |
366 | Product Specification document (DS464) for hardware details. | |
367 | ||
c9da2e12 RR |
368 | Or for the DS570, see "XPS Serial Peripheral Interface (SPI) (v2.00b)" |
369 | ||
30eaed05 WZ |
370 | config SPI_NUC900 |
371 | tristate "Nuvoton NUC900 series SPI" | |
372 | depends on ARCH_W90X900 && EXPERIMENTAL | |
373 | select SPI_BITBANG | |
374 | help | |
375 | SPI driver for Nuvoton NUC900 series ARM SoCs | |
376 | ||
8ae12a0d DB |
377 | # |
378 | # Add new SPI master controllers in alphabetical order above this line | |
379 | # | |
380 | ||
e24c7452 | 381 | config SPI_DESIGNWARE |
8ca8d15a | 382 | tristate "DesignWare SPI controller core support" |
e24c7452 FT |
383 | depends on SPI_MASTER |
384 | help | |
385 | general driver for SPI controller core from DesignWare | |
386 | ||
387 | config SPI_DW_PCI | |
388 | tristate "PCI interface driver for DW SPI core" | |
389 | depends on SPI_DESIGNWARE && PCI | |
390 | ||
7063c0d9 FT |
391 | config SPI_DW_MID_DMA |
392 | bool "DMA support for DW SPI controller on Intel Moorestown platform" | |
393 | depends on SPI_DW_PCI && INTEL_MID_DMAC | |
394 | ||
f7b6fd6d JHD |
395 | config SPI_DW_MMIO |
396 | tristate "Memory-mapped io interface driver for DW SPI core" | |
212b3c8b | 397 | depends on SPI_DESIGNWARE && HAVE_CLK |
f7b6fd6d | 398 | |
8ae12a0d DB |
399 | # |
400 | # There are lots of SPI device types, with sensors and memory | |
401 | # being probably the most widely used ones. | |
402 | # | |
403 | comment "SPI Protocol Masters" | |
8ae12a0d | 404 | |
814a8d50 AP |
405 | config SPI_SPIDEV |
406 | tristate "User mode SPI device driver support" | |
6291fe2a | 407 | depends on EXPERIMENTAL |
814a8d50 AP |
408 | help |
409 | This supports user mode SPI protocol drivers. | |
410 | ||
411 | Note that this application programming interface is EXPERIMENTAL | |
412 | and hence SUBJECT TO CHANGE WITHOUT NOTICE while it stabilizes. | |
413 | ||
447aef1a BD |
414 | config SPI_TLE62X0 |
415 | tristate "Infineon TLE62X0 (for power switching)" | |
6291fe2a | 416 | depends on SYSFS |
447aef1a BD |
417 | help |
418 | SPI driver for Infineon TLE62X0 series line driver chips, | |
419 | such as the TLE6220, TLE6230 and TLE6240. This provides a | |
420 | sysfs interface, with each line presented as a kind of GPIO | |
421 | exposing both switch control and diagnostic feedback. | |
422 | ||
8ae12a0d DB |
423 | # |
424 | # Add new SPI protocol masters in alphabetical order above this line | |
425 | # | |
426 | ||
6291fe2a RD |
427 | endif # SPI_MASTER |
428 | ||
8ae12a0d DB |
429 | # (slave support would go here) |
430 | ||
79d8c7a8 | 431 | endif # SPI |