[mirror_ubuntu-jammy-kernel.git] / drivers / spi / spi-altera.c

/*
 * Altera SPI driver
 *
 * Copyright (C) 2008 Thomas Chou <thomas@wytron.com.tw>
 *
 * Based on spi_s3c24xx.c, which is:
 * Copyright (c) 2006 Ben Dooks
 * Copyright (c) 2006 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/interrupt.h>
#include <linux/errno.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/io.h>
#include <linux/of.h>

#define DRV_NAME "spi_altera"

#define ALTERA_SPI_RXDATA	0
#define ALTERA_SPI_TXDATA	4
#define ALTERA_SPI_STATUS	8
#define ALTERA_SPI_CONTROL	12
#define ALTERA_SPI_SLAVE_SEL	20

#define ALTERA_SPI_STATUS_ROE_MSK	0x8
#define ALTERA_SPI_STATUS_TOE_MSK	0x10
#define ALTERA_SPI_STATUS_TMT_MSK	0x20
#define ALTERA_SPI_STATUS_TRDY_MSK	0x40
#define ALTERA_SPI_STATUS_RRDY_MSK	0x80
#define ALTERA_SPI_STATUS_E_MSK		0x100

#define ALTERA_SPI_CONTROL_IROE_MSK	0x8
#define ALTERA_SPI_CONTROL_ITOE_MSK	0x10
#define ALTERA_SPI_CONTROL_ITRDY_MSK	0x40
#define ALTERA_SPI_CONTROL_IRRDY_MSK	0x80
#define ALTERA_SPI_CONTROL_IE_MSK	0x100
#define ALTERA_SPI_CONTROL_SSO_MSK	0x400

struct altera_spi {
	void __iomem *base;
	int irq;
	int len;
	int count;
	int bytes_per_word;
	unsigned long imr;

	/* data buffers */
	const unsigned char *tx;
	unsigned char *rx;
};

static inline struct altera_spi *altera_spi_to_hw(struct spi_device *sdev)
{
	return spi_master_get_devdata(sdev->master);
}

static void altera_spi_set_cs(struct spi_device *spi, bool is_high)
{
	struct altera_spi *hw = altera_spi_to_hw(spi);

	if (is_high) {
		hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK;
		writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
		writel(0, hw->base + ALTERA_SPI_SLAVE_SEL);
	} else {
		writel(BIT(spi->chip_select), hw->base + ALTERA_SPI_SLAVE_SEL);
		hw->imr |= ALTERA_SPI_CONTROL_SSO_MSK;
		writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
	}
}

static void altera_spi_tx_word(struct altera_spi *hw)
{
	unsigned int txd = 0;

	if (hw->tx) {
		switch (hw->bytes_per_word) {
		case 1:
			txd = hw->tx[hw->count];
			break;
		case 2:
			txd = (hw->tx[hw->count * 2]
				| (hw->tx[hw->count * 2 + 1] << 8));
			break;
		}
	}

	writel(txd, hw->base + ALTERA_SPI_TXDATA);
}

static void altera_spi_rx_word(struct altera_spi *hw)
{
	unsigned int rxd;

	rxd = readl(hw->base + ALTERA_SPI_RXDATA);
	if (hw->rx) {
		switch (hw->bytes_per_word) {
		case 1:
			hw->rx[hw->count] = rxd;
			break;
		case 2:
			hw->rx[hw->count * 2] = rxd;
			hw->rx[hw->count * 2 + 1] = rxd >> 8;
			break;
		}
	}

	hw->count++;
}

static int altera_spi_txrx(struct spi_master *master,
	struct spi_device *spi, struct spi_transfer *t)
{
	struct altera_spi *hw = spi_master_get_devdata(master);

	hw->tx = t->tx_buf;
	hw->rx = t->rx_buf;
	hw->count = 0;
	hw->bytes_per_word = DIV_ROUND_UP(t->bits_per_word, 8);
	hw->len = t->len / hw->bytes_per_word;

	if (hw->irq >= 0) {
		/* enable receive interrupt */
		hw->imr |= ALTERA_SPI_CONTROL_IRRDY_MSK;
		writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);

		/* send the first byte */
		altera_spi_tx_word(hw);
	} else {
		while (hw->count < hw->len) {
			altera_spi_tx_word(hw);

			while (!(readl(hw->base + ALTERA_SPI_STATUS) &
				 ALTERA_SPI_STATUS_RRDY_MSK))
				cpu_relax();

			altera_spi_rx_word(hw);
		}
		spi_finalize_current_transfer(master);
	}

	return t->len;
}

static irqreturn_t altera_spi_irq(int irq, void *dev)
{
	struct spi_master *master = dev;
	struct altera_spi *hw = spi_master_get_devdata(master);

	altera_spi_rx_word(hw);

	if (hw->count < hw->len) {
		altera_spi_tx_word(hw);
	} else {
		/* disable receive interrupt */
		hw->imr &= ~ALTERA_SPI_CONTROL_IRRDY_MSK;
		writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);

		spi_finalize_current_transfer(master);
	}

	return IRQ_HANDLED;
}

static int altera_spi_probe(struct platform_device *pdev)
{
	struct altera_spi *hw;
	struct spi_master *master;
	struct resource *res;
	int err = -ENODEV;

	master = spi_alloc_master(&pdev->dev, sizeof(struct altera_spi));
	if (!master)
		return err;

	/* setup the master state. */
	master->bus_num = pdev->id;
	master->num_chipselect = 16;
	master->mode_bits = SPI_CS_HIGH;
	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
	master->dev.of_node = pdev->dev.of_node;
	master->transfer_one = altera_spi_txrx;
	master->set_cs = altera_spi_set_cs;

	hw = spi_master_get_devdata(master);

	/* find and map our resources */
	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	hw->base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(hw->base)) {
		err = PTR_ERR(hw->base);
		goto exit;
	}
	/* program defaults into the registers */
	hw->imr = 0;		/* disable spi interrupts */
	writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
	writel(0, hw->base + ALTERA_SPI_STATUS);	/* clear status reg */
	if (readl(hw->base + ALTERA_SPI_STATUS) & ALTERA_SPI_STATUS_RRDY_MSK)
		readl(hw->base + ALTERA_SPI_RXDATA);	/* flush rxdata */
	/* irq is optional */
	hw->irq = platform_get_irq(pdev, 0);
	if (hw->irq >= 0) {
		err = devm_request_irq(&pdev->dev, hw->irq, altera_spi_irq, 0,
				       pdev->name, master);
		if (err)
			goto exit;
	}

	err = devm_spi_register_master(&pdev->dev, master);
	if (err)
		goto exit;
	dev_info(&pdev->dev, "base %p, irq %d\n", hw->base, hw->irq);

	return 0;
exit:
	spi_master_put(master);
	return err;
}

#ifdef CONFIG_OF
static const struct of_device_id altera_spi_match[] = {
	{ .compatible = "ALTR,spi-1.0", },
	{ .compatible = "altr,spi-1.0", },
	{},
};
MODULE_DEVICE_TABLE(of, altera_spi_match);
#endif /* CONFIG_OF */

static struct platform_driver altera_spi_driver = {
	.probe = altera_spi_probe,
	.driver = {
		.name = DRV_NAME,
		.pm = NULL,
		.of_match_table = of_match_ptr(altera_spi_match),
	},
};
module_platform_driver(altera_spi_driver);

MODULE_DESCRIPTION("Altera SPI driver");
MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:" DRV_NAME);
Commit	Line	Data
0b782531 TC	1	/*
	2	* Altera SPI driver
	3	*
	4	* Copyright (C) 2008 Thomas Chou <thomas@wytron.com.tw>
	5	*
	6	* Based on spi_s3c24xx.c, which is:
	7	* Copyright (c) 2006 Ben Dooks
	8	* Copyright (c) 2006 Simtec Electronics
	9	* Ben Dooks <ben@simtec.co.uk>
	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of the GNU General Public License version 2 as
	13	* published by the Free Software Foundation.
	14	*/
	15
0b782531 TC	16	#include <linux/interrupt.h>
0b782531 TC	17	#include <linux/errno.h>
d7614de4	18	#include <linux/module.h>
0b782531 TC	19	#include <linux/platform_device.h>
0b782531 TC	20	#include <linux/spi/spi.h>
0b782531 TC	21	#include <linux/io.h>
	22	#include <linux/of.h>
	23
	24	#define DRV_NAME "spi_altera"
	25
	26	#define ALTERA_SPI_RXDATA 0
	27	#define ALTERA_SPI_TXDATA 4
	28	#define ALTERA_SPI_STATUS 8
	29	#define ALTERA_SPI_CONTROL 12
	30	#define ALTERA_SPI_SLAVE_SEL 20
	31
	32	#define ALTERA_SPI_STATUS_ROE_MSK 0x8
	33	#define ALTERA_SPI_STATUS_TOE_MSK 0x10
	34	#define ALTERA_SPI_STATUS_TMT_MSK 0x20
	35	#define ALTERA_SPI_STATUS_TRDY_MSK 0x40
	36	#define ALTERA_SPI_STATUS_RRDY_MSK 0x80
	37	#define ALTERA_SPI_STATUS_E_MSK 0x100
	38
	39	#define ALTERA_SPI_CONTROL_IROE_MSK 0x8
	40	#define ALTERA_SPI_CONTROL_ITOE_MSK 0x10
	41	#define ALTERA_SPI_CONTROL_ITRDY_MSK 0x40
	42	#define ALTERA_SPI_CONTROL_IRRDY_MSK 0x80
	43	#define ALTERA_SPI_CONTROL_IE_MSK 0x100
	44	#define ALTERA_SPI_CONTROL_SSO_MSK 0x400
	45
	46	struct altera_spi {
0b782531 TC	47	void __iomem *base;
	48	int irq;
	49	int len;
	50	int count;
	51	int bytes_per_word;
	52	unsigned long imr;
	53
	54	/* data buffers */
	55	const unsigned char *tx;
	56	unsigned char *rx;
	57	};
	58
	59	static inline struct altera_spi altera_spi_to_hw(struct spi_device sdev)
	60	{
	61	return spi_master_get_devdata(sdev->master);
	62	}
	63
e19b63cd	64	static void altera_spi_set_cs(struct spi_device *spi, bool is_high)
0b782531 TC	65	{
	66	struct altera_spi *hw = altera_spi_to_hw(spi);
	67
e19b63cd LPC	68	if (is_high) {
	69	hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK;
	70	writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
	71	writel(0, hw->base + ALTERA_SPI_SLAVE_SEL);
0b782531	72	} else {
e19b63cd LPC	73	writel(BIT(spi->chip_select), hw->base + ALTERA_SPI_SLAVE_SEL);
	74	hw->imr \|= ALTERA_SPI_CONTROL_SSO_MSK;
	75	writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
0b782531 TC	76	}
	77	}
	78
b64836a5	79	static void altera_spi_tx_word(struct altera_spi *hw)
0b782531	80	{
b64836a5 LPC	81	unsigned int txd = 0;
b64836a5 LPC	82
0b782531 TC	83	if (hw->tx) {
	84	switch (hw->bytes_per_word) {
	85	case 1:
b64836a5 LPC	86	txd = hw->tx[hw->count];
b64836a5 LPC	87	break;
0b782531	88	case 2:
b64836a5 LPC	89	txd = (hw->tx[hw->count * 2]
	90	\| (hw->tx[hw->count * 2 + 1] << 8));
	91	break;
0b782531 TC	92	}
0b782531 TC	93	}
b64836a5 LPC	94
	95	writel(txd, hw->base + ALTERA_SPI_TXDATA);
	96	}
	97
	98	static void altera_spi_rx_word(struct altera_spi *hw)
	99	{
	100	unsigned int rxd;
	101
	102	rxd = readl(hw->base + ALTERA_SPI_RXDATA);
	103	if (hw->rx) {
	104	switch (hw->bytes_per_word) {
	105	case 1:
	106	hw->rx[hw->count] = rxd;
	107	break;
	108	case 2:
	109	hw->rx[hw->count * 2] = rxd;
	110	hw->rx[hw->count * 2 + 1] = rxd >> 8;
	111	break;
	112	}
	113	}
	114
	115	hw->count++;
0b782531 TC	116	}
0b782531 TC	117
e19b63cd LPC	118	static int altera_spi_txrx(struct spi_master *master,
e19b63cd LPC	119	struct spi_device spi, struct spi_transfer t)
0b782531	120	{
e19b63cd	121	struct altera_spi *hw = spi_master_get_devdata(master);
0b782531 TC	122
	123	hw->tx = t->tx_buf;
	124	hw->rx = t->rx_buf;
	125	hw->count = 0;
f073d37d	126	hw->bytes_per_word = DIV_ROUND_UP(t->bits_per_word, 8);
0b782531 TC	127	hw->len = t->len / hw->bytes_per_word;
	128
	129	if (hw->irq >= 0) {
	130	/* enable receive interrupt */
	131	hw->imr \|= ALTERA_SPI_CONTROL_IRRDY_MSK;
	132	writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
	133
	134	/* send the first byte */
b64836a5	135	altera_spi_tx_word(hw);
0b782531	136	} else {
72be0ee4	137	while (hw->count < hw->len) {
b64836a5	138	altera_spi_tx_word(hw);
72be0ee4	139
0b782531 TC	140	while (!(readl(hw->base + ALTERA_SPI_STATUS) &
	141	ALTERA_SPI_STATUS_RRDY_MSK))
	142	cpu_relax();
	143
b64836a5	144	altera_spi_rx_word(hw);
0b782531	145	}
e19b63cd	146	spi_finalize_current_transfer(master);
0b782531 TC	147	}
0b782531 TC	148
e19b63cd	149	return t->len;
0b782531 TC	150	}
	151
	152	static irqreturn_t altera_spi_irq(int irq, void *dev)
	153	{
e19b63cd LPC	154	struct spi_master *master = dev;
e19b63cd LPC	155	struct altera_spi *hw = spi_master_get_devdata(master);
0b782531	156
b64836a5	157	altera_spi_rx_word(hw);
0b782531	158
e19b63cd	159	if (hw->count < hw->len) {
b64836a5	160	altera_spi_tx_word(hw);
e19b63cd LPC	161	} else {
	162	/* disable receive interrupt */
	163	hw->imr &= ~ALTERA_SPI_CONTROL_IRRDY_MSK;
	164	writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
	165
	166	spi_finalize_current_transfer(master);
	167	}
0b782531 TC	168
	169	return IRQ_HANDLED;
	170	}
	171
fd4a319b	172	static int altera_spi_probe(struct platform_device *pdev)
0b782531	173	{
0b782531 TC	174	struct altera_spi *hw;
	175	struct spi_master *master;
	176	struct resource *res;
	177	int err = -ENODEV;
	178
	179	master = spi_alloc_master(&pdev->dev, sizeof(struct altera_spi));
	180	if (!master)
	181	return err;
	182
	183	/* setup the master state. */
	184	master->bus_num = pdev->id;
	185	master->num_chipselect = 16;
	186	master->mode_bits = SPI_CS_HIGH;
72bb79d0	187	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
bf2f2f79	188	master->dev.of_node = pdev->dev.of_node;
e19b63cd LPC	189	master->transfer_one = altera_spi_txrx;
e19b63cd LPC	190	master->set_cs = altera_spi_set_cs;
0b782531 TC	191
0b782531 TC	192	hw = spi_master_get_devdata(master);
0b782531 TC	193
	194	/* find and map our resources */
	195	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
b3136f8f JL	196	hw->base = devm_ioremap_resource(&pdev->dev, res);
	197	if (IS_ERR(hw->base)) {
	198	err = PTR_ERR(hw->base);
	199	goto exit;
	200	}
0b782531 TC	201	/* program defaults into the registers */
	202	hw->imr = 0; /* disable spi interrupts */
	203	writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
	204	writel(0, hw->base + ALTERA_SPI_STATUS); /* clear status reg */
	205	if (readl(hw->base + ALTERA_SPI_STATUS) & ALTERA_SPI_STATUS_RRDY_MSK)
	206	readl(hw->base + ALTERA_SPI_RXDATA); /* flush rxdata */
	207	/* irq is optional */
	208	hw->irq = platform_get_irq(pdev, 0);
	209	if (hw->irq >= 0) {
0b782531	210	err = devm_request_irq(&pdev->dev, hw->irq, altera_spi_irq, 0,
e19b63cd	211	pdev->name, master);
0b782531 TC	212	if (err)
	213	goto exit;
	214	}
0b782531	215
e19b63cd	216	err = devm_spi_register_master(&pdev->dev, master);
0b782531 TC	217	if (err)
	218	goto exit;
	219	dev_info(&pdev->dev, "base %p, irq %d\n", hw->base, hw->irq);
	220
	221	return 0;
0b782531	222	exit:
0b782531 TC	223	spi_master_put(master);
	224	return err;
	225	}
	226
0b782531 TC	227	#ifdef CONFIG_OF
	228	static const struct of_device_id altera_spi_match[] = {
	229	{ .compatible = "ALTR,spi-1.0", },
13960b47	230	{ .compatible = "altr,spi-1.0", },
0b782531 TC	231	{},
	232	};
	233	MODULE_DEVICE_TABLE(of, altera_spi_match);
0b782531 TC	234	#endif /* CONFIG_OF */
	235
	236	static struct platform_driver altera_spi_driver = {
	237	.probe = altera_spi_probe,
0b782531 TC	238	.driver = {
0b782531 TC	239	.name = DRV_NAME,
0b782531	240	.pm = NULL,
89f98dc5	241	.of_match_table = of_match_ptr(altera_spi_match),
0b782531 TC	242	},
0b782531 TC	243	};
940ab889	244	module_platform_driver(altera_spi_driver);
0b782531 TC	245
	246	MODULE_DESCRIPTION("Altera SPI driver");
	247	MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
	248	MODULE_LICENSE("GPL");
	249	MODULE_ALIAS("platform:" DRV_NAME);