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0b782531 TC |
1 | /* |
2 | * Altera SPI driver | |
3 | * | |
4 | * Copyright (C) 2008 Thomas Chou <thomas@wytron.com.tw> | |
5 | * | |
6 | * Based on spi_s3c24xx.c, which is: | |
7 | * Copyright (c) 2006 Ben Dooks | |
8 | * Copyright (c) 2006 Simtec Electronics | |
9 | * Ben Dooks <ben@simtec.co.uk> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
15 | ||
16 | #include <linux/init.h> | |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/errno.h> | |
d7614de4 | 19 | #include <linux/module.h> |
0b782531 TC |
20 | #include <linux/platform_device.h> |
21 | #include <linux/spi/spi.h> | |
22 | #include <linux/spi/spi_bitbang.h> | |
23 | #include <linux/io.h> | |
24 | #include <linux/of.h> | |
25 | ||
26 | #define DRV_NAME "spi_altera" | |
27 | ||
28 | #define ALTERA_SPI_RXDATA 0 | |
29 | #define ALTERA_SPI_TXDATA 4 | |
30 | #define ALTERA_SPI_STATUS 8 | |
31 | #define ALTERA_SPI_CONTROL 12 | |
32 | #define ALTERA_SPI_SLAVE_SEL 20 | |
33 | ||
34 | #define ALTERA_SPI_STATUS_ROE_MSK 0x8 | |
35 | #define ALTERA_SPI_STATUS_TOE_MSK 0x10 | |
36 | #define ALTERA_SPI_STATUS_TMT_MSK 0x20 | |
37 | #define ALTERA_SPI_STATUS_TRDY_MSK 0x40 | |
38 | #define ALTERA_SPI_STATUS_RRDY_MSK 0x80 | |
39 | #define ALTERA_SPI_STATUS_E_MSK 0x100 | |
40 | ||
41 | #define ALTERA_SPI_CONTROL_IROE_MSK 0x8 | |
42 | #define ALTERA_SPI_CONTROL_ITOE_MSK 0x10 | |
43 | #define ALTERA_SPI_CONTROL_ITRDY_MSK 0x40 | |
44 | #define ALTERA_SPI_CONTROL_IRRDY_MSK 0x80 | |
45 | #define ALTERA_SPI_CONTROL_IE_MSK 0x100 | |
46 | #define ALTERA_SPI_CONTROL_SSO_MSK 0x400 | |
47 | ||
48 | struct altera_spi { | |
49 | /* bitbang has to be first */ | |
50 | struct spi_bitbang bitbang; | |
51 | struct completion done; | |
52 | ||
53 | void __iomem *base; | |
54 | int irq; | |
55 | int len; | |
56 | int count; | |
57 | int bytes_per_word; | |
58 | unsigned long imr; | |
59 | ||
60 | /* data buffers */ | |
61 | const unsigned char *tx; | |
62 | unsigned char *rx; | |
63 | }; | |
64 | ||
65 | static inline struct altera_spi *altera_spi_to_hw(struct spi_device *sdev) | |
66 | { | |
67 | return spi_master_get_devdata(sdev->master); | |
68 | } | |
69 | ||
70 | static void altera_spi_chipsel(struct spi_device *spi, int value) | |
71 | { | |
72 | struct altera_spi *hw = altera_spi_to_hw(spi); | |
73 | ||
74 | if (spi->mode & SPI_CS_HIGH) { | |
75 | switch (value) { | |
76 | case BITBANG_CS_INACTIVE: | |
77 | writel(1 << spi->chip_select, | |
78 | hw->base + ALTERA_SPI_SLAVE_SEL); | |
79 | hw->imr |= ALTERA_SPI_CONTROL_SSO_MSK; | |
80 | writel(hw->imr, hw->base + ALTERA_SPI_CONTROL); | |
81 | break; | |
82 | ||
83 | case BITBANG_CS_ACTIVE: | |
84 | hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK; | |
85 | writel(hw->imr, hw->base + ALTERA_SPI_CONTROL); | |
86 | writel(0, hw->base + ALTERA_SPI_SLAVE_SEL); | |
87 | break; | |
88 | } | |
89 | } else { | |
90 | switch (value) { | |
91 | case BITBANG_CS_INACTIVE: | |
92 | hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK; | |
93 | writel(hw->imr, hw->base + ALTERA_SPI_CONTROL); | |
94 | break; | |
95 | ||
96 | case BITBANG_CS_ACTIVE: | |
97 | writel(1 << spi->chip_select, | |
98 | hw->base + ALTERA_SPI_SLAVE_SEL); | |
99 | hw->imr |= ALTERA_SPI_CONTROL_SSO_MSK; | |
100 | writel(hw->imr, hw->base + ALTERA_SPI_CONTROL); | |
101 | break; | |
102 | } | |
103 | } | |
104 | } | |
105 | ||
103ccee4 SW |
106 | static int altera_spi_setupxfer(struct spi_device *spi, struct spi_transfer *t) |
107 | { | |
108 | return 0; | |
109 | } | |
110 | ||
111 | static int altera_spi_setup(struct spi_device *spi) | |
112 | { | |
113 | return 0; | |
114 | } | |
115 | ||
0b782531 TC |
116 | static inline unsigned int hw_txbyte(struct altera_spi *hw, int count) |
117 | { | |
118 | if (hw->tx) { | |
119 | switch (hw->bytes_per_word) { | |
120 | case 1: | |
121 | return hw->tx[count]; | |
122 | case 2: | |
123 | return (hw->tx[count * 2] | |
124 | | (hw->tx[count * 2 + 1] << 8)); | |
125 | } | |
126 | } | |
127 | return 0; | |
128 | } | |
129 | ||
130 | static int altera_spi_txrx(struct spi_device *spi, struct spi_transfer *t) | |
131 | { | |
132 | struct altera_spi *hw = altera_spi_to_hw(spi); | |
133 | ||
134 | hw->tx = t->tx_buf; | |
135 | hw->rx = t->rx_buf; | |
136 | hw->count = 0; | |
766ed704 | 137 | hw->bytes_per_word = t->bits_per_word / 8; |
0b782531 TC |
138 | hw->len = t->len / hw->bytes_per_word; |
139 | ||
140 | if (hw->irq >= 0) { | |
141 | /* enable receive interrupt */ | |
142 | hw->imr |= ALTERA_SPI_CONTROL_IRRDY_MSK; | |
143 | writel(hw->imr, hw->base + ALTERA_SPI_CONTROL); | |
144 | ||
145 | /* send the first byte */ | |
146 | writel(hw_txbyte(hw, 0), hw->base + ALTERA_SPI_TXDATA); | |
147 | ||
148 | wait_for_completion(&hw->done); | |
149 | /* disable receive interrupt */ | |
150 | hw->imr &= ~ALTERA_SPI_CONTROL_IRRDY_MSK; | |
151 | writel(hw->imr, hw->base + ALTERA_SPI_CONTROL); | |
152 | } else { | |
72be0ee4 | 153 | while (hw->count < hw->len) { |
0b782531 TC |
154 | unsigned int rxd; |
155 | ||
72be0ee4 AL |
156 | writel(hw_txbyte(hw, hw->count), |
157 | hw->base + ALTERA_SPI_TXDATA); | |
158 | ||
0b782531 TC |
159 | while (!(readl(hw->base + ALTERA_SPI_STATUS) & |
160 | ALTERA_SPI_STATUS_RRDY_MSK)) | |
161 | cpu_relax(); | |
162 | ||
163 | rxd = readl(hw->base + ALTERA_SPI_RXDATA); | |
164 | if (hw->rx) { | |
165 | switch (hw->bytes_per_word) { | |
166 | case 1: | |
167 | hw->rx[hw->count] = rxd; | |
168 | break; | |
169 | case 2: | |
170 | hw->rx[hw->count * 2] = rxd; | |
171 | hw->rx[hw->count * 2 + 1] = rxd >> 8; | |
172 | break; | |
173 | } | |
174 | } | |
175 | ||
176 | hw->count++; | |
0b782531 | 177 | } |
0b782531 TC |
178 | } |
179 | ||
180 | return hw->count * hw->bytes_per_word; | |
181 | } | |
182 | ||
183 | static irqreturn_t altera_spi_irq(int irq, void *dev) | |
184 | { | |
185 | struct altera_spi *hw = dev; | |
186 | unsigned int rxd; | |
187 | ||
188 | rxd = readl(hw->base + ALTERA_SPI_RXDATA); | |
189 | if (hw->rx) { | |
190 | switch (hw->bytes_per_word) { | |
191 | case 1: | |
192 | hw->rx[hw->count] = rxd; | |
193 | break; | |
194 | case 2: | |
195 | hw->rx[hw->count * 2] = rxd; | |
196 | hw->rx[hw->count * 2 + 1] = rxd >> 8; | |
197 | break; | |
198 | } | |
199 | } | |
200 | ||
201 | hw->count++; | |
202 | ||
203 | if (hw->count < hw->len) | |
204 | writel(hw_txbyte(hw, hw->count), hw->base + ALTERA_SPI_TXDATA); | |
205 | else | |
206 | complete(&hw->done); | |
207 | ||
208 | return IRQ_HANDLED; | |
209 | } | |
210 | ||
fd4a319b | 211 | static int altera_spi_probe(struct platform_device *pdev) |
0b782531 TC |
212 | { |
213 | struct altera_spi_platform_data *platp = pdev->dev.platform_data; | |
214 | struct altera_spi *hw; | |
215 | struct spi_master *master; | |
216 | struct resource *res; | |
217 | int err = -ENODEV; | |
218 | ||
219 | master = spi_alloc_master(&pdev->dev, sizeof(struct altera_spi)); | |
220 | if (!master) | |
221 | return err; | |
222 | ||
223 | /* setup the master state. */ | |
224 | master->bus_num = pdev->id; | |
225 | master->num_chipselect = 16; | |
226 | master->mode_bits = SPI_CS_HIGH; | |
103ccee4 | 227 | master->setup = altera_spi_setup; |
0b782531 TC |
228 | |
229 | hw = spi_master_get_devdata(master); | |
230 | platform_set_drvdata(pdev, hw); | |
231 | ||
232 | /* setup the state for the bitbang driver */ | |
233 | hw->bitbang.master = spi_master_get(master); | |
234 | if (!hw->bitbang.master) | |
235 | return err; | |
103ccee4 | 236 | hw->bitbang.setup_transfer = altera_spi_setupxfer; |
0b782531 TC |
237 | hw->bitbang.chipselect = altera_spi_chipsel; |
238 | hw->bitbang.txrx_bufs = altera_spi_txrx; | |
239 | ||
240 | /* find and map our resources */ | |
241 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
242 | if (!res) | |
243 | goto exit_busy; | |
244 | if (!devm_request_mem_region(&pdev->dev, res->start, resource_size(res), | |
245 | pdev->name)) | |
246 | goto exit_busy; | |
247 | hw->base = devm_ioremap_nocache(&pdev->dev, res->start, | |
248 | resource_size(res)); | |
249 | if (!hw->base) | |
250 | goto exit_busy; | |
251 | /* program defaults into the registers */ | |
252 | hw->imr = 0; /* disable spi interrupts */ | |
253 | writel(hw->imr, hw->base + ALTERA_SPI_CONTROL); | |
254 | writel(0, hw->base + ALTERA_SPI_STATUS); /* clear status reg */ | |
255 | if (readl(hw->base + ALTERA_SPI_STATUS) & ALTERA_SPI_STATUS_RRDY_MSK) | |
256 | readl(hw->base + ALTERA_SPI_RXDATA); /* flush rxdata */ | |
257 | /* irq is optional */ | |
258 | hw->irq = platform_get_irq(pdev, 0); | |
259 | if (hw->irq >= 0) { | |
260 | init_completion(&hw->done); | |
261 | err = devm_request_irq(&pdev->dev, hw->irq, altera_spi_irq, 0, | |
262 | pdev->name, hw); | |
263 | if (err) | |
264 | goto exit; | |
265 | } | |
266 | /* find platform data */ | |
267 | if (!platp) | |
268 | hw->bitbang.master->dev.of_node = pdev->dev.of_node; | |
269 | ||
270 | /* register our spi controller */ | |
271 | err = spi_bitbang_start(&hw->bitbang); | |
272 | if (err) | |
273 | goto exit; | |
274 | dev_info(&pdev->dev, "base %p, irq %d\n", hw->base, hw->irq); | |
275 | ||
276 | return 0; | |
277 | ||
278 | exit_busy: | |
279 | err = -EBUSY; | |
280 | exit: | |
0b782531 TC |
281 | spi_master_put(master); |
282 | return err; | |
283 | } | |
284 | ||
fd4a319b | 285 | static int altera_spi_remove(struct platform_device *dev) |
0b782531 TC |
286 | { |
287 | struct altera_spi *hw = platform_get_drvdata(dev); | |
288 | struct spi_master *master = hw->bitbang.master; | |
289 | ||
290 | spi_bitbang_stop(&hw->bitbang); | |
0b782531 TC |
291 | spi_master_put(master); |
292 | return 0; | |
293 | } | |
294 | ||
295 | #ifdef CONFIG_OF | |
296 | static const struct of_device_id altera_spi_match[] = { | |
297 | { .compatible = "ALTR,spi-1.0", }, | |
298 | {}, | |
299 | }; | |
300 | MODULE_DEVICE_TABLE(of, altera_spi_match); | |
0b782531 TC |
301 | #endif /* CONFIG_OF */ |
302 | ||
303 | static struct platform_driver altera_spi_driver = { | |
304 | .probe = altera_spi_probe, | |
fd4a319b | 305 | .remove = altera_spi_remove, |
0b782531 TC |
306 | .driver = { |
307 | .name = DRV_NAME, | |
308 | .owner = THIS_MODULE, | |
309 | .pm = NULL, | |
89f98dc5 | 310 | .of_match_table = of_match_ptr(altera_spi_match), |
0b782531 TC |
311 | }, |
312 | }; | |
940ab889 | 313 | module_platform_driver(altera_spi_driver); |
0b782531 TC |
314 | |
315 | MODULE_DESCRIPTION("Altera SPI driver"); | |
316 | MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>"); | |
317 | MODULE_LICENSE("GPL"); | |
318 | MODULE_ALIAS("platform:" DRV_NAME); |